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Chia-I Wu214dac62014-08-05 11:07:40 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu214dac62014-08-05 11:07:40 +080026 */
27
28#ifndef GPU_H
29#define GPU_H
30
31#include "intel.h"
32
Chia-I Wu9269d1c2014-08-16 12:47:47 +080033#define INTEL_GPU_ASSERT(gpu, min_gen, max_gen) \
34 assert(intel_gpu_gen(gpu) >= INTEL_GEN(min_gen) && \
35 intel_gpu_gen(gpu) <= INTEL_GEN(max_gen))
36
Chia-I Wu1db76e02014-09-15 14:21:14 +080037enum intel_ext_type {
38 INTEL_EXT_WSI_X11,
39
40 INTEL_EXT_COUNT,
41 INTEL_EXT_INVALID = INTEL_EXT_COUNT,
42};
43
Chia-I Wu214dac62014-08-05 11:07:40 +080044enum intel_gpu_engine_type {
45 /* TODO BLT support */
46 INTEL_GPU_ENGINE_3D,
47
48 INTEL_GPU_ENGINE_COUNT
49};
50
Chia-I Wu1db76e02014-09-15 14:21:14 +080051struct intel_wsi_x11;
52
Chia-I Wu214dac62014-08-05 11:07:40 +080053/*
54 * intel_gpu is the only object that does not inherit from intel_base.
55 */
56struct intel_gpu {
57 const struct icd_dispatch_table *dispatch;
58
59 struct intel_gpu *next;
60
61 int devid; /* PCI device ID */
Chia-I Wuf07865e2014-09-15 13:52:21 +080062 char *primary_node; /* path to the primary node */
63 char *render_node; /* path to the render node */
64 int gen_opaque; /* always read this with intel_gpu_gen() */
Chia-I Wu960f1952014-08-28 23:27:10 +080065 int gt;
Chia-I Wu214dac62014-08-05 11:07:40 +080066
Chia-I Wubd657942014-08-21 14:37:35 +080067 XGL_GPU_SIZE max_batch_buffer_size;
Chia-I Wud6109bb2014-08-21 09:12:19 +080068 XGL_UINT batch_buffer_reloc_count;
Chia-I Wu214dac62014-08-05 11:07:40 +080069
70 /*
Chia-I Wuf07865e2014-09-15 13:52:21 +080071 * The enabled hardware features could be limited by the kernel. These
72 * mutable fds allows us to talk to the kernel before the device is
73 * created.
Chia-I Wu214dac62014-08-05 11:07:40 +080074 */
Chia-I Wuf07865e2014-09-15 13:52:21 +080075 int primary_fd_internal;
76 int render_fd_internal;
Chia-I Wu214dac62014-08-05 11:07:40 +080077
Chia-I Wu1db76e02014-09-15 14:21:14 +080078#ifdef ENABLE_WSI_X11
79 struct intel_wsi_x11 *x11;
80#endif
81
Chia-I Wuf07865e2014-09-15 13:52:21 +080082 int device_fd;
Chia-I Wu214dac62014-08-05 11:07:40 +080083};
84
85static inline struct intel_gpu *intel_gpu(XGL_PHYSICAL_GPU gpu)
86{
87 return (struct intel_gpu *) gpu;
88}
89
90static inline int intel_gpu_gen(const struct intel_gpu *gpu)
91{
92#ifdef INTEL_GEN_SPECIALIZED
93 return INTEL_GEN(INTEL_GEN_SPECIALIZED);
94#else
95 return gpu->gen_opaque;
96#endif
97}
98
99bool intel_gpu_is_valid(const struct intel_gpu *gpu);
100
Chia-I Wuf07865e2014-09-15 13:52:21 +0800101XGL_RESULT intel_gpu_add(int devid, const char *primary_node,
102 const char *render_node, struct intel_gpu **gpu_ret);
Chia-I Wu214dac62014-08-05 11:07:40 +0800103void intel_gpu_remove_all(void);
104struct intel_gpu *intel_gpu_get_list(void);
105
106void intel_gpu_get_props(const struct intel_gpu *gpu,
107 XGL_PHYSICAL_GPU_PROPERTIES *props);
108void intel_gpu_get_perf(const struct intel_gpu *gpu,
109 XGL_PHYSICAL_GPU_PERFORMANCE *perf);
110void intel_gpu_get_queue_props(const struct intel_gpu *gpu,
111 enum intel_gpu_engine_type engine,
112 XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *props);
113void intel_gpu_get_memory_props(const struct intel_gpu *gpu,
114 XGL_PHYSICAL_GPU_MEMORY_PROPERTIES *props);
115
Chia-I Wu1db76e02014-09-15 14:21:14 +0800116void intel_gpu_associate_x11(struct intel_gpu *gpu,
117 struct intel_wsi_x11 *x11,
118 int fd);
Chia-I Wu214dac62014-08-05 11:07:40 +0800119XGL_RESULT intel_gpu_open(struct intel_gpu *gpu);
120void intel_gpu_close(struct intel_gpu *gpu);
121
Chia-I Wu1db76e02014-09-15 14:21:14 +0800122enum intel_ext_type intel_gpu_lookup_extension(const struct intel_gpu *gpu,
123 const char *ext);
Chia-I Wu214dac62014-08-05 11:07:40 +0800124
Chia-I Wubec90a02014-08-06 12:33:03 +0800125XGL_RESULT XGLAPI intelGetGpuInfo(
126 XGL_PHYSICAL_GPU gpu,
127 XGL_PHYSICAL_GPU_INFO_TYPE infoType,
128 XGL_SIZE* pDataSize,
129 XGL_VOID* pData);
130
131XGL_RESULT XGLAPI intelGetExtensionSupport(
132 XGL_PHYSICAL_GPU gpu,
133 const XGL_CHAR* pExtName);
134
Chia-I Wu251e7d92014-08-19 13:35:42 +0800135XGL_RESULT XGLAPI intelGetMultiGpuCompatibility(
136 XGL_PHYSICAL_GPU gpu0,
137 XGL_PHYSICAL_GPU gpu1,
138 XGL_GPU_COMPATIBILITY_INFO* pInfo);
139
Chia-I Wu214dac62014-08-05 11:07:40 +0800140#endif /* GPU_H */