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Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef MEM_H
26#define MEM_H
27
Chia-I Wu37fe8412014-08-07 13:34:57 +080028#include "kmd/winsys.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080029#include "intel.h"
30
Chia-I Wuf9911eb2014-08-06 13:50:31 +080031struct intel_mem {
32 struct intel_base base;
33
34 struct intel_bo *bo;
Chia-I Wu000747d2014-08-20 15:39:36 +080035 XGL_GPU_SIZE size;
Chia-I Wuf9911eb2014-08-06 13:50:31 +080036};
37
38XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
39 const XGL_MEMORY_ALLOC_INFO *info,
40 struct intel_mem **mem_ret);
41void intel_mem_free(struct intel_mem *mem);
42
43XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
44 XGL_MEMORY_PRIORITY priority);
45
Chia-I Wu37fe8412014-08-07 13:34:57 +080046static inline void *intel_mem_map(struct intel_mem *mem, XGL_FLAGS flags)
47{
Chia-I Wu32a22462014-08-26 14:13:46 +080048 return intel_bo_map_gtt_async(mem->bo);
Chia-I Wu37fe8412014-08-07 13:34:57 +080049}
50
51static inline void *intel_mem_map_sync(struct intel_mem *mem, bool rw)
52{
53 return intel_bo_map(mem->bo, rw);
54}
55
56static inline void intel_mem_unmap(struct intel_mem *mem)
57{
58 intel_bo_unmap(mem->bo);
59}
60
61static inline bool intel_mem_is_busy(struct intel_mem *mem)
62{
63 return intel_bo_is_busy(mem->bo);
64}
Chia-I Wuf9911eb2014-08-06 13:50:31 +080065
66static inline struct intel_mem *intel_mem(XGL_GPU_MEMORY mem)
67{
68 return (struct intel_mem *) mem;
69}
70
71XGL_RESULT XGLAPI intelAllocMemory(
72 XGL_DEVICE device,
73 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
74 XGL_GPU_MEMORY* pMem);
75
76XGL_RESULT XGLAPI intelFreeMemory(
77 XGL_GPU_MEMORY mem);
78
79XGL_RESULT XGLAPI intelSetMemoryPriority(
80 XGL_GPU_MEMORY mem,
81 XGL_MEMORY_PRIORITY priority);
82
83XGL_RESULT XGLAPI intelMapMemory(
84 XGL_GPU_MEMORY mem,
85 XGL_FLAGS flags,
86 XGL_VOID** ppData);
87
88XGL_RESULT XGLAPI intelUnmapMemory(
89 XGL_GPU_MEMORY mem);
90
Chia-I Wu251e7d92014-08-19 13:35:42 +080091XGL_RESULT XGLAPI intelPinSystemMemory(
92 XGL_DEVICE device,
93 const XGL_VOID* pSysMem,
94 XGL_SIZE memSize,
95 XGL_GPU_MEMORY* pMem);
96
97XGL_RESULT XGLAPI intelRemapVirtualMemoryPages(
98 XGL_DEVICE device,
99 XGL_UINT rangeCount,
100 const XGL_VIRTUAL_MEMORY_REMAP_RANGE* pRanges,
101 XGL_UINT preWaitSemaphoreCount,
102 const XGL_QUEUE_SEMAPHORE* pPreWaitSemaphores,
103 XGL_UINT postSignalSemaphoreCount,
104 const XGL_QUEUE_SEMAPHORE* pPostSignalSemaphores);
105
106XGL_RESULT XGLAPI intelOpenSharedMemory(
107 XGL_DEVICE device,
108 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
109 XGL_GPU_MEMORY* pMem);
110
111XGL_RESULT XGLAPI intelOpenPeerMemory(
112 XGL_DEVICE device,
113 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
114 XGL_GPU_MEMORY* pMem);
115
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800116#endif /* MEM_H */