blob: 41726225a0f0e2268c1901ffa0c3dcb5705b06e2 [file] [log] [blame]
Chia-I Wu4ea339e2014-08-08 21:56:26 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wue46da3e2014-08-08 21:52:48 +080025#include "kmd/winsys.h"
26#include "dev.h"
27#include "gpu.h"
28#include "img.h"
Chia-I Wu4ea339e2014-08-08 21:56:26 +080029
Chia-I Wu4ea339e2014-08-08 21:56:26 +080030/*
31 * From the Ivy Bridge PRM, volume 1 part 1, page 105:
32 *
33 * "In addition to restrictions on maximum height, width, and depth,
34 * surfaces are also restricted to a maximum size in bytes. This
35 * maximum is 2 GB for all products and all surface types."
36 */
Chia-I Wue46da3e2014-08-08 21:52:48 +080037static const size_t intel_max_resource_size = 1u << 31;
Chia-I Wu4ea339e2014-08-08 21:56:26 +080038
Chia-I Wufeb441f2014-08-08 21:27:38 +080039static void img_destroy(struct intel_obj *obj)
40{
41 struct intel_img *img = intel_img_from_obj(obj);
42
43 intel_img_destroy(img);
44}
45
46static XGL_RESULT img_get_info(struct intel_base *base, int type,
47 XGL_SIZE *size, XGL_VOID *data)
48{
49 struct intel_img *img = intel_img_from_base(base);
50 XGL_RESULT ret = XGL_SUCCESS;
51
52 switch (type) {
53 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
54 {
55 XGL_MEMORY_REQUIREMENTS *mem_req = data;
56
Chia-I Wu2b685d72014-08-14 13:45:37 +080057 mem_req->size = img->layout.bo_stride * img->layout.bo_height;
Chia-I Wufeb441f2014-08-08 21:27:38 +080058 mem_req->alignment = 4096;
59 mem_req->heapCount = 1;
60 mem_req->heaps[0] = 0;
61
62 *size = sizeof(*mem_req);
63 }
64 break;
65 default:
66 ret = intel_base_get_info(base, type, size, data);
67 break;
68 }
69
70 return ret;
71}
72
73XGL_RESULT intel_img_create(struct intel_dev *dev,
74 const XGL_IMAGE_CREATE_INFO *info,
75 struct intel_img **img_ret)
76{
Chia-I Wufeb441f2014-08-08 21:27:38 +080077 struct intel_img *img;
Chia-I Wu37cba152014-08-15 16:03:10 +080078 struct intel_layout *layout;
Chia-I Wufeb441f2014-08-08 21:27:38 +080079
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060080 img = (struct intel_img *) intel_base_create(dev, sizeof(*img),
Chia-I Wufeb441f2014-08-08 21:27:38 +080081 dev->base.dbg, XGL_DBG_OBJECT_IMAGE, info, 0);
82 if (!img)
83 return XGL_ERROR_OUT_OF_MEMORY;
84
Chia-I Wu37cba152014-08-15 16:03:10 +080085 layout = &img->layout;
86
87 intel_layout_init(layout, dev, info);
88
89 if (layout->bo_stride > intel_max_resource_size / layout->bo_height) {
90 intel_dev_log(dev, XGL_DBG_MSG_ERROR, XGL_VALIDATION_LEVEL_0,
91 XGL_NULL_HANDLE, 0, 0, "image too big");
92 intel_img_destroy(img);
93 return XGL_ERROR_INVALID_MEMORY_SIZE;
94 }
Chia-I Wufeb441f2014-08-08 21:27:38 +080095
96 /* TODO */
Chia-I Wu37cba152014-08-15 16:03:10 +080097 if (layout->aux_type != INTEL_LAYOUT_AUX_NONE ||
98 layout->separate_stencil) {
Chia-I Wufeb441f2014-08-08 21:27:38 +080099 intel_dev_log(dev, XGL_DBG_MSG_ERROR, XGL_VALIDATION_LEVEL_0,
Chia-I Wu37cba152014-08-15 16:03:10 +0800100 XGL_NULL_HANDLE, 0, 0, "HiZ or separate stencil required");
Chia-I Wufeb441f2014-08-08 21:27:38 +0800101 intel_img_destroy(img);
102 return XGL_ERROR_INVALID_MEMORY_SIZE;
103 }
104
Chia-I Wufeb441f2014-08-08 21:27:38 +0800105 img->obj.destroy = img_destroy;
106 img->obj.base.get_info = img_get_info;
107
108 *img_ret = img;
109
110 return XGL_SUCCESS;
111}
112
113void intel_img_destroy(struct intel_img *img)
114{
Chia-I Wufeb441f2014-08-08 21:27:38 +0800115 intel_base_destroy(&img->obj.base);
116}
117
118XGL_RESULT XGLAPI intelCreateImage(
119 XGL_DEVICE device,
120 const XGL_IMAGE_CREATE_INFO* pCreateInfo,
121 XGL_IMAGE* pImage)
122{
123 struct intel_dev *dev = intel_dev(device);
124
125 return intel_img_create(dev, pCreateInfo, (struct intel_img **) pImage);
126}
127
128XGL_RESULT XGLAPI intelGetImageSubresourceInfo(
129 XGL_IMAGE image,
130 const XGL_IMAGE_SUBRESOURCE* pSubresource,
131 XGL_SUBRESOURCE_INFO_TYPE infoType,
132 XGL_SIZE* pDataSize,
133 XGL_VOID* pData)
134{
135 const struct intel_img *img = intel_img(image);
136 XGL_RESULT ret = XGL_SUCCESS;
137
138 switch (infoType) {
139 case XGL_INFO_TYPE_SUBRESOURCE_LAYOUT:
140 {
141 XGL_SUBRESOURCE_LAYOUT *layout = (XGL_SUBRESOURCE_LAYOUT *) pData;
Chia-I Wu2b685d72014-08-14 13:45:37 +0800142 unsigned x, y;
143
144 intel_layout_get_slice_pos(&img->layout, pSubresource->mipLevel,
145 pSubresource->arraySlice, &x, &y);
146 intel_layout_pos_to_mem(&img->layout, x, y, &x, &y);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800147
148 *pDataSize = sizeof(XGL_SUBRESOURCE_LAYOUT);
149
Chia-I Wu2b685d72014-08-14 13:45:37 +0800150 layout->offset = intel_layout_mem_to_off(&img->layout, x, y);
151 layout->size = intel_layout_get_slice_size(&img->layout,
152 pSubresource->mipLevel);
153 layout->rowPitch = img->layout.bo_stride;
154 layout->depthPitch = intel_layout_get_slice_stride(&img->layout,
155 pSubresource->mipLevel);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800156 }
157 break;
158 default:
159 ret = XGL_ERROR_INVALID_VALUE;
160 break;
161 }
162
163 return ret;
164}