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Chia-I Wue18ff1b2014-08-07 13:38:51 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wue18ff1b2014-08-07 13:38:51 +080026 */
27
28#include "dev.h"
29#include "mem.h"
30#include "query.h"
31
32static void query_destroy(struct intel_obj *obj)
33{
34 struct intel_query *query = intel_query_from_obj(obj);
35
36 intel_query_destroy(query);
37}
38
39static XGL_RESULT query_get_info(struct intel_base *base, int type,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -060040 size_t *size, void *data)
Chia-I Wue18ff1b2014-08-07 13:38:51 +080041{
42 struct intel_query *query = intel_query_from_base(base);
43 XGL_RESULT ret = XGL_SUCCESS;
44
45 switch (type) {
46 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
47 {
48 XGL_MEMORY_REQUIREMENTS *mem_req = data;
49
Jon Ashburn408daec2014-12-05 09:23:52 -070050 *size = sizeof(XGL_MEMORY_REQUIREMENTS);
51 if (data == NULL)
52 return ret;
Chia-I Wue18ff1b2014-08-07 13:38:51 +080053 mem_req->size = query->slot_stride * query->slot_count;
54 mem_req->alignment = 64;
Jon Ashburnd8031332015-01-22 10:52:13 -070055 mem_req->memType = XGL_MEMORY_TYPE_OTHER;
Chia-I Wue18ff1b2014-08-07 13:38:51 +080056 }
57 break;
58 default:
59 ret = intel_base_get_info(base, type, size, data);
60 break;
61 }
62
63 return ret;
64}
65
66XGL_RESULT intel_query_create(struct intel_dev *dev,
67 const XGL_QUERY_POOL_CREATE_INFO *info,
68 struct intel_query **query_ret)
69{
70 struct intel_query *query;
71
Chia-I Wu545c2e12015-02-22 13:19:54 +080072 query = (struct intel_query *) intel_base_create(&dev->base.handle,
73 sizeof(*query), dev->base.dbg, XGL_DBG_OBJECT_QUERY_POOL,
74 info, 0);
Chia-I Wue18ff1b2014-08-07 13:38:51 +080075 if (!query)
76 return XGL_ERROR_OUT_OF_MEMORY;
77
78 query->type = info->queryType;
79 query->slot_count = info->slots;
80
Chia-I Wu659650f2014-08-07 14:11:49 +080081 /*
82 * For each query type, the GPU will be asked to write the values of some
83 * registers to a buffer before and after a sequence of commands. We will
84 * compare the differences to get the query results.
85 */
Chia-I Wue18ff1b2014-08-07 13:38:51 +080086 switch (info->queryType) {
87 case XGL_QUERY_OCCLUSION:
Chia-I Wu759fa2e2014-08-30 18:44:47 +080088 query->slot_stride = u_align(sizeof(uint64_t) * 2, 64);
Chia-I Wue18ff1b2014-08-07 13:38:51 +080089 break;
90 case XGL_QUERY_PIPELINE_STATISTICS:
91 query->slot_stride =
Chia-I Wu2132b562014-08-08 21:52:26 +080092 u_align(sizeof(XGL_PIPELINE_STATISTICS_DATA) * 2, 64);
Chia-I Wue18ff1b2014-08-07 13:38:51 +080093 break;
94 default:
95 break;
96 }
97
98 if (!query->slot_stride) {
99 intel_query_destroy(query);
100 return XGL_ERROR_INVALID_VALUE;
101 }
102
103 query->obj.base.get_info = query_get_info;
104 query->obj.destroy = query_destroy;
105
106 *query_ret = query;
107
108 return XGL_SUCCESS;
109}
110
111void intel_query_destroy(struct intel_query *query)
112{
113 intel_base_destroy(&query->obj.base);
114}
115
Chia-I Wu659650f2014-08-07 14:11:49 +0800116static void
117query_process_occlusion(const struct intel_query *query,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600118 uint32_t count, const uint8_t *raw,
Chia-I Wu659650f2014-08-07 14:11:49 +0800119 uint64_t *results)
120{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600121 uint32_t i;
Chia-I Wu659650f2014-08-07 14:11:49 +0800122
123 for (i = 0; i < count; i++) {
124 const uint32_t *pair = (const uint32_t *) raw;
125
126 results[i] = pair[1] - pair[0];
127 raw += query->slot_stride;
128 }
129}
130
131static void
132query_process_pipeline_statistics(const struct intel_query *query,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600133 uint32_t count, const uint8_t *raw,
Chia-I Wu659650f2014-08-07 14:11:49 +0800134 XGL_PIPELINE_STATISTICS_DATA *results)
135{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600136 const uint32_t num_regs = sizeof(results[0]) / sizeof(uint64_t);
137 uint32_t i, j;
Chia-I Wu659650f2014-08-07 14:11:49 +0800138
139 for (i = 0; i < count; i++) {
140 const uint64_t *before = (const uint64_t *) raw;
141 const uint64_t *after = before + num_regs;
142 uint64_t *dst = (uint64_t *) (results + i);
143
144 for (j = 0; j < num_regs; j++)
145 dst[j] = after[j] - before[j];
146
147 raw += query->slot_stride;
148 }
149}
150
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800151XGL_RESULT intel_query_get_results(struct intel_query *query,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600152 uint32_t slot_start, uint32_t slot_count,
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800153 void *results)
154{
155 const uint8_t *ptr;
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800156
157 if (!query->obj.mem)
158 return XGL_ERROR_MEMORY_NOT_BOUND;
159
160 if (intel_mem_is_busy(query->obj.mem))
161 return XGL_NOT_READY;
162
163 ptr = (const uint8_t *) intel_mem_map_sync(query->obj.mem, false);
164 if (!ptr)
165 return XGL_ERROR_MEMORY_MAP_FAILED;
166
167 ptr += query->obj.offset + query->slot_stride * slot_start;
168
169 switch (query->type) {
170 case XGL_QUERY_OCCLUSION:
Chia-I Wu659650f2014-08-07 14:11:49 +0800171 query_process_occlusion(query, slot_count, ptr, results);
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800172 break;
173 case XGL_QUERY_PIPELINE_STATISTICS:
Chia-I Wu659650f2014-08-07 14:11:49 +0800174 query_process_pipeline_statistics(query, slot_count, ptr, results);
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800175 break;
176 default:
177 assert(0);
178 break;
179 }
180
181 intel_mem_unmap(query->obj.mem);
182
183 return XGL_SUCCESS;
184}
185
Chia-I Wu96177272015-01-03 15:27:41 +0800186ICD_EXPORT XGL_RESULT XGLAPI xglCreateQueryPool(
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800187 XGL_DEVICE device,
188 const XGL_QUERY_POOL_CREATE_INFO* pCreateInfo,
189 XGL_QUERY_POOL* pQueryPool)
190{
Chia-I Wuf667a6a2014-08-07 14:15:01 +0800191 struct intel_dev *dev = intel_dev(device);
192
193 return intel_query_create(dev, pCreateInfo,
194 (struct intel_query **) pQueryPool);
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800195}
196
Chia-I Wu96177272015-01-03 15:27:41 +0800197ICD_EXPORT XGL_RESULT XGLAPI xglGetQueryPoolResults(
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800198 XGL_QUERY_POOL queryPool,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600199 uint32_t startQuery,
200 uint32_t queryCount,
201 size_t* pDataSize,
202 void* pData)
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800203{
Chia-I Wuf667a6a2014-08-07 14:15:01 +0800204 struct intel_query *query = intel_query(queryPool);
205
206 switch (query->type) {
207 case XGL_QUERY_OCCLUSION:
208 *pDataSize = sizeof(uint64_t) * queryCount;
209 break;
210 case XGL_QUERY_PIPELINE_STATISTICS:
211 *pDataSize = sizeof(XGL_PIPELINE_STATISTICS_DATA) * queryCount;
212 break;
213 default:
214 return XGL_ERROR_INVALID_HANDLE;
215 break;
216 }
217
218 if (pData)
219 return intel_query_get_results(query, startQuery, queryCount, pData);
220 else
221 return XGL_SUCCESS;
Chia-I Wue18ff1b2014-08-07 13:38:51 +0800222}