Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 1 | /* |
| 2 | * XGL |
| 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #ifndef CMD_PRIV_H |
| 26 | #define CMD_PRIV_H |
| 27 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 28 | #include "genhw/genhw.h" |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 29 | #include "dev.h" |
| 30 | #include "gpu.h" |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 31 | #include "cmd.h" |
| 32 | |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 33 | #define CMD_ASSERT(cmd, min_gen, max_gen) \ |
| 34 | INTEL_GPU_ASSERT((cmd)->dev->gpu, (min_gen), (max_gen)) |
| 35 | |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 36 | struct intel_cmd_reloc { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 37 | struct intel_cmd_writer *writer; |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 38 | XGL_UINT pos; |
| 39 | |
| 40 | uint32_t val; |
| 41 | const struct intel_mem *mem; |
| 42 | |
| 43 | /* |
| 44 | * With application state tracking promised by XGL, we should be able to |
| 45 | * set |
| 46 | * |
| 47 | * I915_EXEC_NO_RELOC |
| 48 | * I915_EXEC_HANDLE_LUT |
| 49 | * I915_EXEC_IS_PINNED |
| 50 | * |
| 51 | * once we figure them out. |
| 52 | */ |
| 53 | uint16_t read_domains; |
| 54 | uint16_t write_domain; |
| 55 | }; |
| 56 | |
Chia-I Wu | 9f03986 | 2014-08-20 15:39:56 +0800 | [diff] [blame] | 57 | static inline int cmd_gen(const struct intel_cmd *cmd) |
| 58 | { |
| 59 | return intel_gpu_gen(cmd->dev->gpu); |
| 60 | } |
| 61 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 62 | void cmd_writer_grow(struct intel_cmd *cmd, |
| 63 | struct intel_cmd_writer *writer); |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 64 | |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 65 | /** |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 66 | * Reserve \p len DWords in the batch buffer for writing. |
| 67 | */ |
| 68 | static inline void cmd_batch_reserve(struct intel_cmd *cmd, XGL_UINT len) |
| 69 | { |
| 70 | struct intel_cmd_writer *writer = &cmd->batch; |
| 71 | |
| 72 | if (writer->used + len > writer->size) |
| 73 | cmd_writer_grow(cmd, writer); |
| 74 | assert(writer->used + len <= writer->size); |
| 75 | } |
| 76 | |
| 77 | /** |
| 78 | * Write a DWord to the batch buffer and advance. |
| 79 | */ |
| 80 | static inline void cmd_batch_write(struct intel_cmd *cmd, uint32_t val) |
| 81 | { |
| 82 | struct intel_cmd_writer *writer = &cmd->batch; |
| 83 | |
| 84 | assert(writer->used < writer->size); |
| 85 | ((uint32_t *) writer->ptr_opaque)[writer->used++] = val; |
| 86 | } |
| 87 | |
| 88 | /** |
| 89 | * Add a reloc for the batch buffer and advance. |
| 90 | */ |
| 91 | static inline void cmd_batch_reloc(struct intel_cmd *cmd, |
| 92 | uint32_t val, const struct intel_mem *mem, |
| 93 | uint16_t read_domains, |
| 94 | uint16_t write_domain) |
| 95 | { |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame^] | 96 | struct intel_cmd_reloc *reloc = &cmd->relocs[cmd->reloc_used]; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 97 | struct intel_cmd_writer *writer = &cmd->batch; |
| 98 | |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame^] | 99 | assert(cmd->reloc_used < cmd->reloc_count); |
| 100 | |
| 101 | reloc->writer = writer; |
| 102 | reloc->pos = writer->used; |
| 103 | reloc->val = val; |
| 104 | reloc->mem = mem; |
| 105 | reloc->read_domains = read_domains; |
| 106 | reloc->write_domain = write_domain; |
| 107 | |
| 108 | cmd->reloc_used++; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 109 | writer->used++; |
| 110 | } |
| 111 | |
| 112 | /** |
| 113 | * End the batch buffer. |
| 114 | */ |
| 115 | static inline void cmd_batch_end(struct intel_cmd *cmd) |
| 116 | { |
| 117 | if (cmd->batch.used & 1) { |
| 118 | cmd_batch_reserve(cmd, 1); |
| 119 | cmd_batch_write(cmd, GEN_MI_CMD(MI_BATCH_BUFFER_END)); |
| 120 | } else { |
| 121 | cmd_batch_reserve(cmd, 2); |
| 122 | cmd_batch_write(cmd, GEN_MI_CMD(MI_BATCH_BUFFER_END)); |
| 123 | cmd_batch_write(cmd, GEN_MI_CMD(MI_NOOP)); |
| 124 | } |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 125 | } |
| 126 | |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 127 | #endif /* CMD_PRIV_H */ |