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Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -06001/*
2 * XGL 3-D graphics library
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
Chia-I Wu44e42362014-09-02 08:32:09 +080025 * Courtney Goeltzenleuchter <courtney@lunarg.com>
26 * Chia-I Wu <olv@lunarg.com>
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060027 */
28
Chia-I Wu023ef682014-09-15 11:06:50 +080029#include "icd-enumerate-drm.h"
Chia-I Wua6e33492014-08-05 13:35:08 +080030#include "gpu.h"
31#include "intel.h"
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060032
Chia-I Wu73019ad2014-08-29 12:01:13 +080033static int intel_devid_override;
Chia-I Wu1c527012014-08-23 14:57:35 +080034int intel_debug = -1;
35
36static void intel_debug_init(void)
37{
38 const char *env;
39
40 if (intel_debug >= 0)
41 return;
42
43 intel_debug = 0;
44
45 /* parse comma-separated debug options */
46 env = getenv("INTEL_DEBUG");
47 while (env) {
48 const char *p = strchr(env, ',');
49 size_t len;
50
51 if (p)
52 len = p - env;
53 else
54 len = strlen(env);
55
Courtney Goeltzenleuchterd9fc9842014-10-13 12:58:25 -060056 if (len > 0) {
57 if (strncmp(env, "batch", len) == 0) {
58 intel_debug |= INTEL_DEBUG_BATCH;
59 } else if (strncmp(env, "nohw", len) == 0) {
60 intel_debug |= INTEL_DEBUG_NOHW;
Chia-I Wu3fb47ce2014-10-28 11:19:36 +080061 } else if (strncmp(env, "nocache", len) == 0) {
62 intel_debug |= INTEL_DEBUG_NOCACHE;
Courtney Goeltzenleuchterd9fc9842014-10-13 12:58:25 -060063 } else if (strncmp(env, "0x", 2) == 0) {
64 intel_debug |= INTEL_DEBUG_NOHW;
65 intel_devid_override = strtol(env, NULL, 16);
66 }
Chia-I Wu73019ad2014-08-29 12:01:13 +080067 }
Chia-I Wu1c527012014-08-23 14:57:35 +080068
69 if (!p)
70 break;
71
72 env = p + 1;
73 }
74}
Jon Ashburn815bddd2014-10-16 15:48:50 -060075
Chia-I Wu023ef682014-09-15 11:06:50 +080076ICD_EXPORT XGL_RESULT XGLAPI xglInitAndEnumerateGpus(
77 const XGL_APPLICATION_INFO* pAppInfo,
78 const XGL_ALLOC_CALLBACKS* pAllocCb,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -060079 uint32_t maxGpus,
80 uint32_t* pGpuCount,
Chia-I Wu023ef682014-09-15 11:06:50 +080081 XGL_PHYSICAL_GPU* pGpus)
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060082{
Chia-I Wu023ef682014-09-15 11:06:50 +080083 struct icd_drm_device *devices, *dev;
Chia-I Wu3065c9c2014-08-04 06:28:31 +080084 XGL_RESULT ret;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -060085 uint32_t count;
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060086
Chia-I Wu1c527012014-08-23 14:57:35 +080087 intel_debug_init();
88
Chia-I Wu900364b2015-01-03 13:55:22 +080089 ret = icd_allocator_init(pAllocCb);
Chia-I Wu3065c9c2014-08-04 06:28:31 +080090 if (ret != XGL_SUCCESS)
91 return ret;
92
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060093 /*
Chia-I Wu023ef682014-09-15 11:06:50 +080094 * xglInitAndEnumerateGpus() can be called multiple times. Calling it more
95 * than once forces driver reinitialization.
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060096 */
Chia-I Wua6e33492014-08-05 13:35:08 +080097 intel_gpu_remove_all();
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -060098
Chia-I Wuc7bff532014-08-06 12:14:54 +080099 if (!maxGpus) {
100 *pGpuCount = 0;
Chia-I Wua6e33492014-08-05 13:35:08 +0800101 return XGL_SUCCESS;
Chia-I Wuc7bff532014-08-06 12:14:54 +0800102 }
Chia-I Wua6e33492014-08-05 13:35:08 +0800103
Chia-I Wu023ef682014-09-15 11:06:50 +0800104 devices = icd_drm_enumerate(0x8086);
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600105
Chia-I Wu023ef682014-09-15 11:06:50 +0800106 count = 0;
107 dev = devices;
108 while (dev) {
Chia-I Wuf07865e2014-09-15 13:52:21 +0800109 const char *primary_node, *render_node;
Chia-I Wu4d09f452014-10-13 16:21:39 +0800110 int devid;
Chia-I Wua6e33492014-08-05 13:35:08 +0800111 struct intel_gpu *gpu;
112
Chia-I Wuf07865e2014-09-15 13:52:21 +0800113 primary_node = icd_drm_get_devnode(dev, ICD_DRM_MINOR_LEGACY);
Chia-I Wuf1356882014-09-18 16:39:06 +0800114 if (!primary_node)
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600115 continue;
Chia-I Wua6e33492014-08-05 13:35:08 +0800116
Chia-I Wuf1356882014-09-18 16:39:06 +0800117 render_node = icd_drm_get_devnode(dev, ICD_DRM_MINOR_RENDER);
118
Chia-I Wu4d09f452014-10-13 16:21:39 +0800119 devid = (intel_devid_override) ? intel_devid_override : dev->devid;
120 ret = intel_gpu_add(devid, primary_node, render_node, &gpu);
Chia-I Wua6e33492014-08-05 13:35:08 +0800121 if (ret == XGL_SUCCESS) {
122 pGpus[count++] = (XGL_PHYSICAL_GPU) gpu;
123 if (count >= maxGpus)
124 break;
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600125 }
Chia-I Wu023ef682014-09-15 11:06:50 +0800126
127 dev = dev->next;
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600128 }
Chia-I Wua6e33492014-08-05 13:35:08 +0800129
Chia-I Wu023ef682014-09-15 11:06:50 +0800130 icd_drm_release(devices);
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600131
Chia-I Wua6e33492014-08-05 13:35:08 +0800132 *pGpuCount = count;
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600133
Chia-I Wua6e33492014-08-05 13:35:08 +0800134 return (count > 0) ? XGL_SUCCESS : XGL_ERROR_UNAVAILABLE;
Courtney Goeltzenleuchtere06e72d2014-08-01 12:44:23 -0600135}
Chia-I Wub02558c2015-01-03 15:21:51 +0800136
Jon Ashburnfa836e02015-01-28 18:26:16 -0700137static XGL_RESULT intel_instance_destroy(struct intel_instance *inst)
138{
139 intel_base_destroy(&inst->obj.base);
140 intel_gpu_remove_all();
141 return XGL_SUCCESS;
142}
143
144static void inst_destroy(struct intel_obj *obj)
145{
146 struct intel_instance *inst = intel_instance_from_obj(obj);
147
148 intel_instance_destroy(inst);
149}
150
151static XGL_RESULT intel_instance_create(
152 const XGL_APPLICATION_INFO* info,
153 const XGL_ALLOC_CALLBACKS* cb,
154 struct intel_instance** inst_ret)
155{
156 struct intel_instance *inst;
157 XGL_RESULT ret;
158
159 inst = (struct intel_instance *) intel_base_create(NULL, sizeof(*inst), false,
160 XGL_DBG_OBJECT_INSTANCE, info, 0);
161 if (!inst)
162 return XGL_ERROR_OUT_OF_MEMORY;
163
164 inst->obj.destroy = inst_destroy;
165 inst->obj.base.get_info = intel_base_get_info;
166
167 *inst_ret = inst;
168
169 intel_debug_init();
170
171 ret = icd_allocator_init(cb);
172 return ret;
173}
174
Jon Ashburn349508d2015-01-26 14:51:40 -0700175ICD_EXPORT XGL_RESULT XGLAPI xglCreateInstance(
176 const XGL_APPLICATION_INFO* pAppInfo,
177 const XGL_ALLOC_CALLBACKS* pAllocCb,
178 XGL_INSTANCE* pInstance)
179{
Jon Ashburnfa836e02015-01-28 18:26:16 -0700180 return intel_instance_create(pAppInfo, pAllocCb, (struct intel_instance **) pInstance);
Jon Ashburn349508d2015-01-26 14:51:40 -0700181}
182
183ICD_EXPORT XGL_RESULT XGLAPI xglDestroyInstance(
184 XGL_INSTANCE pInstance)
185{
Jon Ashburnfa836e02015-01-28 18:26:16 -0700186 return intel_instance_destroy((struct intel_instance *) pInstance);
Jon Ashburn349508d2015-01-26 14:51:40 -0700187}
188
189ICD_EXPORT XGL_RESULT XGLAPI xglEnumerateGpus(
190 XGL_INSTANCE instance,
191 uint32_t maxGpus,
192 uint32_t* pGpuCount,
193 XGL_PHYSICAL_GPU* pGpus)
194{
Jon Ashburn5f078e92015-01-28 19:15:45 -0700195 struct icd_drm_device *devices, *dev;
196 XGL_RESULT ret;
Jon Ashburn92e80132015-01-29 15:47:01 -0700197 uint32_t count;
Jon Ashburn5f078e92015-01-28 19:15:45 -0700198
199 if (!maxGpus) {
200 *pGpuCount = 0;
201 return XGL_SUCCESS;
202 }
203
204 devices = icd_drm_enumerate(0x8086);
205
206 count = 0;
207 dev = devices;
208 while (dev) {
209 const char *primary_node, *render_node;
210 int devid;
211 struct intel_gpu *gpu;
212
213 primary_node = icd_drm_get_devnode(dev, ICD_DRM_MINOR_LEGACY);
214 if (!primary_node)
215 continue;
216
217 render_node = icd_drm_get_devnode(dev, ICD_DRM_MINOR_RENDER);
218
219 devid = (intel_devid_override) ? intel_devid_override : dev->devid;
220 ret = intel_gpu_add(devid, primary_node, render_node, &gpu);
221 if (ret == XGL_SUCCESS) {
222 pGpus[count++] = (XGL_PHYSICAL_GPU) gpu;
223 if (count >= maxGpus)
224 break;
225 }
226
227 dev = dev->next;
228 }
229
230 icd_drm_release(devices);
231
232 *pGpuCount = count;
233
234 return (count > 0) ? XGL_SUCCESS : XGL_ERROR_UNAVAILABLE;
Jon Ashburn349508d2015-01-26 14:51:40 -0700235}
236
Chia-I Wu64b5aa82015-01-03 23:36:36 +0800237ICD_EXPORT XGL_RESULT XGLAPI xglEnumerateLayers(
238 XGL_PHYSICAL_GPU gpu,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600239 size_t maxLayerCount,
240 size_t maxStringSize,
241 size_t* pOutLayerCount,
242 char* const* pOutLayers,
243 void* pReserved)
Chia-I Wu64b5aa82015-01-03 23:36:36 +0800244{
245 if (!pOutLayerCount)
246 return XGL_ERROR_INVALID_POINTER;
247
248 *pOutLayerCount = 0;
249
250 return XGL_SUCCESS;
251}
252
Chia-I Wu96177272015-01-03 15:27:41 +0800253ICD_EXPORT XGL_RESULT XGLAPI xglDbgRegisterMsgCallback(
Chia-I Wub02558c2015-01-03 15:21:51 +0800254 XGL_DBG_MSG_CALLBACK_FUNCTION pfnMsgCallback,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600255 void* pUserData)
Chia-I Wub02558c2015-01-03 15:21:51 +0800256{
257 return icd_logger_add_callback(pfnMsgCallback, pUserData);
258}
259
Chia-I Wu96177272015-01-03 15:27:41 +0800260ICD_EXPORT XGL_RESULT XGLAPI xglDbgUnregisterMsgCallback(
Chia-I Wub02558c2015-01-03 15:21:51 +0800261 XGL_DBG_MSG_CALLBACK_FUNCTION pfnMsgCallback)
262{
263 return icd_logger_remove_callback(pfnMsgCallback);
264}
265
Chia-I Wu96177272015-01-03 15:27:41 +0800266ICD_EXPORT XGL_RESULT XGLAPI xglDbgSetGlobalOption(
Chia-I Wub02558c2015-01-03 15:21:51 +0800267 XGL_DBG_GLOBAL_OPTION dbgOption,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600268 size_t dataSize,
269 const void* pData)
Chia-I Wub02558c2015-01-03 15:21:51 +0800270{
271 XGL_RESULT res = XGL_SUCCESS;
272
273 if (dataSize == 0)
274 return XGL_ERROR_INVALID_VALUE;
275
276 switch (dbgOption) {
277 case XGL_DBG_OPTION_DEBUG_ECHO_ENABLE:
278 case XGL_DBG_OPTION_BREAK_ON_ERROR:
279 case XGL_DBG_OPTION_BREAK_ON_WARNING:
280 res = icd_logger_set_bool(dbgOption, *((const bool *) pData));
281 break;
282 default:
283 res = XGL_ERROR_INVALID_VALUE;
284 break;
285 }
286
287 return res;
288}