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Chia-I Wu09142132014-08-11 15:42:55 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef CMD_H
26#define CMD_H
27
28#include "intel.h"
29#include "obj.h"
Chia-I Wub2755562014-08-20 13:38:52 +080030#include "view.h"
31
32struct intel_pipeline;
33struct intel_pipeline_delta;
34struct intel_viewport_state;
35struct intel_raster_state;
36struct intel_msaa_state;
37struct intel_blend_state;
38struct intel_ds_state;
39struct intel_dset;
40
41/*
42 * States bounded to the command buffer. We want to write states directly to
43 * the command buffer when possible, and reduce this struct.
44 */
45struct intel_cmd_bind {
46 struct {
47 const struct intel_pipeline *graphics;
48 const struct intel_pipeline *compute;
49 const struct intel_pipeline_delta *graphics_delta;
50 const struct intel_pipeline_delta *compute_delta;
51 } pipeline;
52
53 struct {
54 const struct intel_viewport_state *viewport;
55 const struct intel_raster_state *raster;
56 const struct intel_msaa_state *msaa;
57 const struct intel_blend_state *blend;
58 const struct intel_ds_state *ds;
59 } state;
60
61 struct {
62 const struct intel_dset *graphics;
63 XGL_UINT graphics_offset;
64 const struct intel_dset *compute;
65 XGL_UINT compute_offset;
66 } dset;
67
68 struct {
69 struct intel_mem_view graphics;
70 struct intel_mem_view compute;
71 } mem_view;
72
73 struct {
74 const struct intel_mem *mem;
75 XGL_GPU_SIZE offset;
76 XGL_INDEX_TYPE type;
77 } index;
78
79 struct {
80 const struct intel_rt_view *rt[XGL_MAX_COLOR_ATTACHMENTS];
81 XGL_UINT rt_count;
82
83 const struct intel_ds_view *ds;
84 } att;
85};
Chia-I Wu09142132014-08-11 15:42:55 +080086
Chia-I Wu343b1372014-08-20 16:39:20 +080087struct intel_cmd_reloc {
88 XGL_UINT pos;
89
90 uint32_t val;
91 struct intel_mem *mem;
92
93 /*
94 * With application state tracking promised by XGL, we should be able to
95 * set
96 *
97 * I915_EXEC_NO_RELOC
98 * I915_EXEC_HANDLE_LUT
99 * I915_EXEC_IS_PINNED
100 *
101 * once we figure them out.
102 */
103 uint16_t read_domains;
104 uint16_t write_domain;
105};
106
Chia-I Wu730e5362014-08-19 12:15:09 +0800107struct intel_cmd {
108 struct intel_obj obj;
109
110 struct intel_dev *dev;
111
Chia-I Wu343b1372014-08-20 16:39:20 +0800112 struct intel_cmd_reloc *relocs;
113 XGL_UINT reloc_count;
114
Chia-I Wu730e5362014-08-19 12:15:09 +0800115 XGL_FLAGS flags;
116
117 XGL_SIZE bo_size;
118 struct intel_bo *bo;
Chia-I Wu32710d72014-08-20 16:05:22 +0800119 void *ptr_opaque;
Chia-I Wu730e5362014-08-19 12:15:09 +0800120
121 XGL_UINT used, size;
Chia-I Wu343b1372014-08-20 16:39:20 +0800122 XGL_UINT reloc_used;
Chia-I Wu04966702014-08-20 15:05:03 +0800123 XGL_RESULT result;
Chia-I Wub2755562014-08-20 13:38:52 +0800124
125 struct intel_cmd_bind bind;
Chia-I Wu730e5362014-08-19 12:15:09 +0800126};
127
128static inline struct intel_cmd *intel_cmd(XGL_CMD_BUFFER cmd)
129{
130 return (struct intel_cmd *) cmd;
131}
132
133static inline struct intel_cmd *intel_cmd_from_obj(struct intel_obj *obj)
134{
135 return (struct intel_cmd *) obj;
136}
137
138XGL_RESULT intel_cmd_create(struct intel_dev *dev,
139 const XGL_CMD_BUFFER_CREATE_INFO *info,
140 struct intel_cmd **cmd_ret);
141void intel_cmd_destroy(struct intel_cmd *cmd);
142
143XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags);
144XGL_RESULT intel_cmd_end(struct intel_cmd *cmd);
145
Chia-I Wu09142132014-08-11 15:42:55 +0800146XGL_RESULT XGLAPI intelCreateCommandBuffer(
147 XGL_DEVICE device,
148 const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo,
149 XGL_CMD_BUFFER* pCmdBuffer);
150
151XGL_RESULT XGLAPI intelBeginCommandBuffer(
152 XGL_CMD_BUFFER cmdBuffer,
153 XGL_FLAGS flags);
154
155XGL_RESULT XGLAPI intelEndCommandBuffer(
156 XGL_CMD_BUFFER cmdBuffer);
157
158XGL_RESULT XGLAPI intelResetCommandBuffer(
159 XGL_CMD_BUFFER cmdBuffer);
160
161XGL_VOID XGLAPI intelCmdBindPipeline(
162 XGL_CMD_BUFFER cmdBuffer,
163 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
164 XGL_PIPELINE pipeline);
165
166XGL_VOID XGLAPI intelCmdBindPipelineDelta(
167 XGL_CMD_BUFFER cmdBuffer,
168 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
169 XGL_PIPELINE_DELTA delta);
170
171XGL_VOID XGLAPI intelCmdBindStateObject(
172 XGL_CMD_BUFFER cmdBuffer,
173 XGL_STATE_BIND_POINT stateBindPoint,
174 XGL_STATE_OBJECT state);
175
176XGL_VOID XGLAPI intelCmdBindDescriptorSet(
177 XGL_CMD_BUFFER cmdBuffer,
178 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
179 XGL_UINT index,
180 XGL_DESCRIPTOR_SET descriptorSet,
181 XGL_UINT slotOffset);
182
183XGL_VOID XGLAPI intelCmdBindDynamicMemoryView(
184 XGL_CMD_BUFFER cmdBuffer,
185 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
186 const XGL_MEMORY_VIEW_ATTACH_INFO* pMemView);
187
188XGL_VOID XGLAPI intelCmdBindIndexData(
189 XGL_CMD_BUFFER cmdBuffer,
190 XGL_GPU_MEMORY mem,
191 XGL_GPU_SIZE offset,
192 XGL_INDEX_TYPE indexType);
193
194XGL_VOID XGLAPI intelCmdBindAttachments(
195 XGL_CMD_BUFFER cmdBuffer,
196 XGL_UINT colorAttachmentCount,
197 const XGL_COLOR_ATTACHMENT_BIND_INFO* pColorAttachments,
198 const XGL_DEPTH_STENCIL_BIND_INFO* pDepthStencilAttachment);
199
200XGL_VOID XGLAPI intelCmdPrepareMemoryRegions(
201 XGL_CMD_BUFFER cmdBuffer,
202 XGL_UINT transitionCount,
203 const XGL_MEMORY_STATE_TRANSITION* pStateTransitions);
204
205XGL_VOID XGLAPI intelCmdPrepareImages(
206 XGL_CMD_BUFFER cmdBuffer,
207 XGL_UINT transitionCount,
208 const XGL_IMAGE_STATE_TRANSITION* pStateTransitions);
209
210XGL_VOID XGLAPI intelCmdDraw(
211 XGL_CMD_BUFFER cmdBuffer,
212 XGL_UINT firstVertex,
213 XGL_UINT vertexCount,
214 XGL_UINT firstInstance,
215 XGL_UINT instanceCount);
216
217XGL_VOID XGLAPI intelCmdDrawIndexed(
218 XGL_CMD_BUFFER cmdBuffer,
219 XGL_UINT firstIndex,
220 XGL_UINT indexCount,
221 XGL_INT vertexOffset,
222 XGL_UINT firstInstance,
223 XGL_UINT instanceCount);
224
225XGL_VOID XGLAPI intelCmdDrawIndirect(
226 XGL_CMD_BUFFER cmdBuffer,
227 XGL_GPU_MEMORY mem,
228 XGL_GPU_SIZE offset,
229 XGL_UINT32 count,
230 XGL_UINT32 stride);
231
232XGL_VOID XGLAPI intelCmdDrawIndexedIndirect(
233 XGL_CMD_BUFFER cmdBuffer,
234 XGL_GPU_MEMORY mem,
235 XGL_GPU_SIZE offset,
236 XGL_UINT32 count,
237 XGL_UINT32 stride);
238
239XGL_VOID XGLAPI intelCmdDispatch(
240 XGL_CMD_BUFFER cmdBuffer,
241 XGL_UINT x,
242 XGL_UINT y,
243 XGL_UINT z);
244
245XGL_VOID XGLAPI intelCmdDispatchIndirect(
246 XGL_CMD_BUFFER cmdBuffer,
247 XGL_GPU_MEMORY mem,
248 XGL_GPU_SIZE offset);
249
250XGL_VOID XGLAPI intelCmdCopyMemory(
251 XGL_CMD_BUFFER cmdBuffer,
252 XGL_GPU_MEMORY srcMem,
253 XGL_GPU_MEMORY destMem,
254 XGL_UINT regionCount,
255 const XGL_MEMORY_COPY* pRegions);
256
257XGL_VOID XGLAPI intelCmdCopyImage(
258 XGL_CMD_BUFFER cmdBuffer,
259 XGL_IMAGE srcImage,
260 XGL_IMAGE destImage,
261 XGL_UINT regionCount,
262 const XGL_IMAGE_COPY* pRegions);
263
264XGL_VOID XGLAPI intelCmdCopyMemoryToImage(
265 XGL_CMD_BUFFER cmdBuffer,
266 XGL_GPU_MEMORY srcMem,
267 XGL_IMAGE destImage,
268 XGL_UINT regionCount,
269 const XGL_MEMORY_IMAGE_COPY* pRegions);
270
271XGL_VOID XGLAPI intelCmdCopyImageToMemory(
272 XGL_CMD_BUFFER cmdBuffer,
273 XGL_IMAGE srcImage,
274 XGL_GPU_MEMORY destMem,
275 XGL_UINT regionCount,
276 const XGL_MEMORY_IMAGE_COPY* pRegions);
277
278XGL_VOID XGLAPI intelCmdCloneImageData(
279 XGL_CMD_BUFFER cmdBuffer,
280 XGL_IMAGE srcImage,
281 XGL_IMAGE_STATE srcImageState,
282 XGL_IMAGE destImage,
283 XGL_IMAGE_STATE destImageState);
284
285XGL_VOID XGLAPI intelCmdUpdateMemory(
286 XGL_CMD_BUFFER cmdBuffer,
287 XGL_GPU_MEMORY destMem,
288 XGL_GPU_SIZE destOffset,
289 XGL_GPU_SIZE dataSize,
290 const XGL_UINT32* pData);
291
292XGL_VOID XGLAPI intelCmdFillMemory(
293 XGL_CMD_BUFFER cmdBuffer,
294 XGL_GPU_MEMORY destMem,
295 XGL_GPU_SIZE destOffset,
296 XGL_GPU_SIZE fillSize,
297 XGL_UINT32 data);
298
299XGL_VOID XGLAPI intelCmdClearColorImage(
300 XGL_CMD_BUFFER cmdBuffer,
301 XGL_IMAGE image,
302 const XGL_FLOAT color[4],
303 XGL_UINT rangeCount,
304 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
305
306XGL_VOID XGLAPI intelCmdClearColorImageRaw(
307 XGL_CMD_BUFFER cmdBuffer,
308 XGL_IMAGE image,
309 const XGL_UINT32 color[4],
310 XGL_UINT rangeCount,
311 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
312
313XGL_VOID XGLAPI intelCmdClearDepthStencil(
314 XGL_CMD_BUFFER cmdBuffer,
315 XGL_IMAGE image,
316 XGL_FLOAT depth,
317 XGL_UINT32 stencil,
318 XGL_UINT rangeCount,
319 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
320
321XGL_VOID XGLAPI intelCmdResolveImage(
322 XGL_CMD_BUFFER cmdBuffer,
323 XGL_IMAGE srcImage,
324 XGL_IMAGE destImage,
325 XGL_UINT rectCount,
326 const XGL_IMAGE_RESOLVE* pRects);
327
328XGL_VOID XGLAPI intelCmdSetEvent(
329 XGL_CMD_BUFFER cmdBuffer,
330 XGL_EVENT event);
331
332XGL_VOID XGLAPI intelCmdResetEvent(
333 XGL_CMD_BUFFER cmdBuffer,
334 XGL_EVENT event);
335
336XGL_VOID XGLAPI intelCmdMemoryAtomic(
337 XGL_CMD_BUFFER cmdBuffer,
338 XGL_GPU_MEMORY destMem,
339 XGL_GPU_SIZE destOffset,
340 XGL_UINT64 srcData,
341 XGL_ATOMIC_OP atomicOp);
342
343XGL_VOID XGLAPI intelCmdBeginQuery(
344 XGL_CMD_BUFFER cmdBuffer,
345 XGL_QUERY_POOL queryPool,
346 XGL_UINT slot,
347 XGL_FLAGS flags);
348
349XGL_VOID XGLAPI intelCmdEndQuery(
350 XGL_CMD_BUFFER cmdBuffer,
351 XGL_QUERY_POOL queryPool,
352 XGL_UINT slot);
353
354XGL_VOID XGLAPI intelCmdResetQueryPool(
355 XGL_CMD_BUFFER cmdBuffer,
356 XGL_QUERY_POOL queryPool,
357 XGL_UINT startQuery,
358 XGL_UINT queryCount);
359
360XGL_VOID XGLAPI intelCmdWriteTimestamp(
361 XGL_CMD_BUFFER cmdBuffer,
362 XGL_TIMESTAMP_TYPE timestampType,
363 XGL_GPU_MEMORY destMem,
364 XGL_GPU_SIZE destOffset);
365
366XGL_VOID XGLAPI intelCmdInitAtomicCounters(
367 XGL_CMD_BUFFER cmdBuffer,
368 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
369 XGL_UINT startCounter,
370 XGL_UINT counterCount,
371 const XGL_UINT32* pData);
372
373XGL_VOID XGLAPI intelCmdLoadAtomicCounters(
374 XGL_CMD_BUFFER cmdBuffer,
375 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
376 XGL_UINT startCounter,
377 XGL_UINT counterCount,
378 XGL_GPU_MEMORY srcMem,
379 XGL_GPU_SIZE srcOffset);
380
381XGL_VOID XGLAPI intelCmdSaveAtomicCounters(
382 XGL_CMD_BUFFER cmdBuffer,
383 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
384 XGL_UINT startCounter,
385 XGL_UINT counterCount,
386 XGL_GPU_MEMORY destMem,
387 XGL_GPU_SIZE destOffset);
388
389XGL_VOID XGLAPI intelCmdDbgMarkerBegin(
390 XGL_CMD_BUFFER cmdBuffer,
391 const XGL_CHAR* pMarker);
392
393XGL_VOID XGLAPI intelCmdDbgMarkerEnd(
394 XGL_CMD_BUFFER cmdBuffer);
395
396#endif /* CMD_H */