blob: 114d8481dbb4d34e1603ae3be2b48d28be3bb980 [file] [log] [blame]
Chia-I Wu46c29dd2014-12-02 21:09:20 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
Chia-I Wud4bae362014-07-29 11:15:00 +080024#include <stdlib.h>
25#include <stdio.h>
26#include <stdbool.h>
27#include <string.h>
Chia-I Wu46c29dd2014-12-02 21:09:20 +080028#include <assert.h>
Chia-I Wud4bae362014-07-29 11:15:00 +080029
30#include <xgl.h>
Chia-I Wu46c29dd2014-12-02 21:09:20 +080031
32#define ERR(err) printf("%s:%d: failed with %s\n", \
33 __FILE__, __LINE__, xgl_result_string(err));
34
35#define ERR_EXIT(err) do { ERR(err); exit(-1); } while (0)
36
37#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
38
39#define MAX_GPUS 8
40
41#define MAX_QUEUE_TYPES 5
42
43struct app_gpu;
44
45struct app_dev {
46 struct app_gpu *gpu; /* point back to the GPU */
47
48 XGL_DEVICE obj;
49
50 XGL_UINT heap_count;
51 XGL_MEMORY_HEAP_PROPERTIES *heap_props;
Chia-I Wu46c29dd2014-12-02 21:09:20 +080052
53 XGL_FORMAT_PROPERTIES format_props[XGL_MAX_CH_FMT][XGL_MAX_NUM_FMT];
54};
55
56struct app_gpu {
57 XGL_UINT id;
58 XGL_PHYSICAL_GPU obj;
59
60 XGL_PHYSICAL_GPU_PROPERTIES props;
61 XGL_PHYSICAL_GPU_PERFORMANCE perf;
62
63 XGL_UINT queue_count;
64 XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *queue_props;
65 XGL_DEVICE_QUEUE_CREATE_INFO *queue_reqs;
66
67 XGL_PHYSICAL_GPU_MEMORY_PROPERTIES memory_props;
68
69 XGL_UINT extension_count;
70 const XGL_CHAR **extensions;
71
72 struct app_dev dev;
73};
74
75static const char *xgl_result_string(XGL_RESULT err)
76{
77 switch (err) {
78#define STR(r) case r: return #r
79 STR(XGL_SUCCESS);
80 STR(XGL_UNSUPPORTED);
81 STR(XGL_NOT_READY);
82 STR(XGL_TIMEOUT);
83 STR(XGL_EVENT_SET);
84 STR(XGL_EVENT_RESET);
85 STR(XGL_ERROR_UNKNOWN);
86 STR(XGL_ERROR_UNAVAILABLE);
87 STR(XGL_ERROR_INITIALIZATION_FAILED);
88 STR(XGL_ERROR_OUT_OF_MEMORY);
89 STR(XGL_ERROR_OUT_OF_GPU_MEMORY);
90 STR(XGL_ERROR_DEVICE_ALREADY_CREATED);
91 STR(XGL_ERROR_DEVICE_LOST);
92 STR(XGL_ERROR_INVALID_POINTER);
93 STR(XGL_ERROR_INVALID_VALUE);
94 STR(XGL_ERROR_INVALID_HANDLE);
95 STR(XGL_ERROR_INVALID_ORDINAL);
96 STR(XGL_ERROR_INVALID_MEMORY_SIZE);
97 STR(XGL_ERROR_INVALID_EXTENSION);
98 STR(XGL_ERROR_INVALID_FLAGS);
99 STR(XGL_ERROR_INVALID_ALIGNMENT);
100 STR(XGL_ERROR_INVALID_FORMAT);
101 STR(XGL_ERROR_INVALID_IMAGE);
102 STR(XGL_ERROR_INVALID_DESCRIPTOR_SET_DATA);
103 STR(XGL_ERROR_INVALID_QUEUE_TYPE);
104 STR(XGL_ERROR_INVALID_OBJECT_TYPE);
105 STR(XGL_ERROR_UNSUPPORTED_SHADER_IL_VERSION);
106 STR(XGL_ERROR_BAD_SHADER_CODE);
107 STR(XGL_ERROR_BAD_PIPELINE_DATA);
108 STR(XGL_ERROR_TOO_MANY_MEMORY_REFERENCES);
109 STR(XGL_ERROR_NOT_MAPPABLE);
110 STR(XGL_ERROR_MEMORY_MAP_FAILED);
111 STR(XGL_ERROR_MEMORY_UNMAP_FAILED);
112 STR(XGL_ERROR_INCOMPATIBLE_DEVICE);
113 STR(XGL_ERROR_INCOMPATIBLE_DRIVER);
114 STR(XGL_ERROR_INCOMPLETE_COMMAND_BUFFER);
115 STR(XGL_ERROR_BUILDING_COMMAND_BUFFER);
116 STR(XGL_ERROR_MEMORY_NOT_BOUND);
117 STR(XGL_ERROR_INCOMPATIBLE_QUEUE);
118 STR(XGL_ERROR_NOT_SHAREABLE);
119#undef STR
120 default: return "UNKNOWN_RESULT";
121 }
122}
Chia-I Wud4bae362014-07-29 11:15:00 +0800123
124static const char *xgl_gpu_type_string(XGL_PHYSICAL_GPU_TYPE type)
125{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800126 switch (type) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800127#define STR(r) case XGL_GPU_TYPE_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800128 STR(OTHER);
129 STR(INTEGRATED);
130 STR(DISCRETE);
131 STR(VIRTUAL);
Chia-I Wud4bae362014-07-29 11:15:00 +0800132#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800133 default: return "UNKNOWN_GPU";
134 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800135}
136
137static const char *xgl_heap_type_string(XGL_HEAP_MEMORY_TYPE type)
138{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800139 switch (type) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800140#define STR(r) case XGL_HEAP_MEMORY_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800141 STR(OTHER);
142 STR(LOCAL);
143 STR(REMOTE);
144 STR(EMBEDDED);
Chia-I Wud4bae362014-07-29 11:15:00 +0800145#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800146 default: return "UNKNOWN_HEAP";
147 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800148}
149
150static const char *xgl_channel_format_string(XGL_CHANNEL_FORMAT ch)
151{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800152 switch (ch) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800153#define STR(r) case XGL_CH_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800154 STR(UNDEFINED);
155 STR(R4G4);
156 STR(R4G4B4A4);
157 STR(R5G6B5);
158 STR(B5G6R5);
159 STR(R5G5B5A1);
160 STR(R8);
161 STR(R8G8);
162 STR(R8G8B8A8);
163 STR(B8G8R8A8);
164 STR(R10G11B11);
165 STR(R11G11B10);
166 STR(R10G10B10A2);
167 STR(R16);
168 STR(R16G16);
169 STR(R16G16B16A16);
170 STR(R32);
171 STR(R32G32);
172 STR(R32G32B32);
173 STR(R32G32B32A32);
174 STR(R16G8);
175 STR(R32G8);
176 STR(R9G9B9E5);
177 STR(BC1);
178 STR(BC2);
179 STR(BC3);
180 STR(BC4);
181 STR(BC5);
182 STR(BC6U);
183 STR(BC6S);
184 STR(BC7);
Chia-I Wuc581bd52015-01-18 14:51:02 +0800185 STR(R8G8B8);
186 STR(R16G16B16);
187 STR(B10G10R10A2);
188 STR(R64);
189 STR(R64G64);
190 STR(R64G64B64);
191 STR(R64G64B64A64);
Chia-I Wud4bae362014-07-29 11:15:00 +0800192#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800193 default: return "UNKNOWN_CH";
194 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800195}
196
197static const char *xgl_numeric_format_string(XGL_NUM_FORMAT num)
198{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800199 switch (num) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800200#define STR(r) case XGL_NUM_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800201 STR(UNDEFINED);
202 STR(UNORM);
203 STR(SNORM);
204 STR(UINT);
205 STR(SINT);
206 STR(FLOAT);
207 STR(SRGB);
208 STR(DS);
Chia-I Wuc581bd52015-01-18 14:51:02 +0800209 STR(USCALED);
210 STR(SSCALED);
Chia-I Wud4bae362014-07-29 11:15:00 +0800211#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800212 default: return "UNKNOWN_NUM";
213 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800214}
215
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800216static void app_dev_init_formats(struct app_dev *dev)
217{
218 XGL_CHANNEL_FORMAT ch;
219 XGL_NUM_FORMAT num;
220
221 for (ch = 0; ch < XGL_MAX_CH_FMT; ch++) {
222 for (num = 0; num < XGL_MAX_NUM_FMT; num++) {
223 const XGL_FORMAT fmt = {
224 .channelFormat = ch,
225 .numericFormat = num,
226 };
227 XGL_RESULT err;
228 XGL_SIZE size = sizeof(dev->format_props[ch][num]);
229
230 err = xglGetFormatInfo(dev->obj, fmt,
231 XGL_INFO_TYPE_FORMAT_PROPERTIES,
232 &size, &dev->format_props[ch][num]);
233 if (err) {
234 memset(&dev->format_props[ch][num], 0,
235 sizeof(dev->format_props[ch][num]));
236 }
237 else if (size != sizeof(dev->format_props[ch][num])) {
238 ERR_EXIT(XGL_ERROR_UNKNOWN);
239 }
240 }
241 }
242}
243
244static void app_dev_init(struct app_dev *dev, struct app_gpu *gpu)
245{
246 XGL_DEVICE_CREATE_INFO info = {
247 .sType = XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO,
248 .pNext = NULL,
249 .queueRecordCount = 0,
250 .pRequestedQueues = NULL,
251 .extensionCount = 0,
252 .ppEnabledExtensionNames = NULL,
253 .maxValidationLevel = XGL_VALIDATION_LEVEL_END_RANGE,
254 .flags = XGL_DEVICE_CREATE_VALIDATION_BIT,
255 };
256 XGL_RESULT err;
257 XGL_SIZE size;
258 XGL_UINT i;
259
260 /* request all queues */
261 info.queueRecordCount = gpu->queue_count;
262 info.pRequestedQueues = gpu->queue_reqs;
263
264 /* enable all extensions */
265 info.extensionCount = gpu->extension_count;
266 info.ppEnabledExtensionNames = gpu->extensions;
267 dev->gpu = gpu;
268 err = xglCreateDevice(gpu->obj, &info, &dev->obj);
269 if (err)
270 ERR_EXIT(err);
271
272 err = xglGetMemoryHeapCount(dev->obj, &dev->heap_count);
273 if (err)
274 ERR_EXIT(err);
275
276 dev->heap_props =
277 malloc(sizeof(dev->heap_props[0]) * dev->heap_count);
278 if (!dev->heap_props)
279 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
280
281 for (i = 0; i < dev->heap_count; i++) {
282 size = sizeof(dev->heap_props[0]);
283 err = xglGetMemoryHeapInfo(dev->obj, i,
284 XGL_INFO_TYPE_MEMORY_HEAP_PROPERTIES,
285 &size, &dev->heap_props[i]);
286 if (err || size != sizeof(dev->heap_props[0]))
287 ERR_EXIT(err);
288 }
289}
290
291static void app_dev_destroy(struct app_dev *dev)
292{
293 free(dev->heap_props);
294 xglDestroyDevice(dev->obj);
295}
296
297static void app_gpu_init_extensions(struct app_gpu *gpu)
298{
299 XGL_RESULT err;
300 XGL_UINT i;
301
302 static const XGL_CHAR *known_extensions[] = {
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800303 "XGL_WSI_X11",
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800304 };
305
306 for (i = 0; i < ARRAY_SIZE(known_extensions); i++) {
307 err = xglGetExtensionSupport(gpu->obj, known_extensions[i]);
308 if (!err)
309 gpu->extension_count++;
310 }
311
312 gpu->extensions =
313 malloc(sizeof(gpu->extensions[0]) * gpu->extension_count);
314 if (!gpu->extensions)
315 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
316
317 gpu->extension_count = 0;
318 for (i = 0; i < ARRAY_SIZE(known_extensions); i++) {
319 err = xglGetExtensionSupport(gpu->obj, known_extensions[i]);
320 if (!err)
321 gpu->extensions[gpu->extension_count++] = known_extensions[i];
322 }
323}
324
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800325static void app_gpu_init(struct app_gpu *gpu, XGL_UINT id, XGL_PHYSICAL_GPU obj)
326{
327 XGL_SIZE size;
328 XGL_RESULT err;
329 int i;
330
331 memset(gpu, 0, sizeof(*gpu));
332
333 gpu->id = id;
334 gpu->obj = obj;
335 size = sizeof(gpu->props);
336 err = xglGetGpuInfo(gpu->obj,
337 XGL_INFO_TYPE_PHYSICAL_GPU_PROPERTIES,
338 &size, &gpu->props);
339 if (err || size != sizeof(gpu->props))
340 ERR_EXIT(err);
341
342 size = sizeof(gpu->perf);
343 err = xglGetGpuInfo(gpu->obj,
344 XGL_INFO_TYPE_PHYSICAL_GPU_PERFORMANCE,
345 &size, &gpu->perf);
346 if (err || size != sizeof(gpu->perf))
347 ERR_EXIT(err);
348
349 /* get queue count */
350 err = xglGetGpuInfo(gpu->obj,
351 XGL_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES,
352 &size, NULL);
353 if (err || size % sizeof(gpu->queue_props[0]))
354 ERR_EXIT(err);
355 gpu->queue_count = size / sizeof(gpu->queue_props[0]);
356
357 gpu->queue_props =
358 malloc(sizeof(gpu->queue_props[0]) * gpu->queue_count);
359 size = sizeof(gpu->queue_props[0]) * gpu->queue_count;
360 if (!gpu->queue_props)
361 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
362 err = xglGetGpuInfo(gpu->obj,
363 XGL_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES,
364 &size, gpu->queue_props);
365 if (err || size != sizeof(gpu->queue_props[0]) * gpu->queue_count)
366 ERR_EXIT(err);
367
368 /* set up queue requests */
369 size = sizeof(*gpu->queue_reqs) * gpu->queue_count;
370 gpu->queue_reqs = malloc(sizeof(*gpu->queue_reqs) * gpu->queue_count);
371 if (!gpu->queue_reqs)
372 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
373 for (i = 0; i < gpu->queue_count; i++) {
374 gpu->queue_reqs[i].queueNodeIndex = i;
375 gpu->queue_reqs[i].queueCount = gpu->queue_props[i].queueCount;
376 }
377
378 size = sizeof(gpu->memory_props);
379 err = xglGetGpuInfo(gpu->obj,
380 XGL_INFO_TYPE_PHYSICAL_GPU_MEMORY_PROPERTIES,
381 &size, &gpu->memory_props);
382 if (err || size != sizeof(gpu->memory_props))
383 ERR_EXIT(err);
384
385 app_gpu_init_extensions(gpu);
386 app_dev_init(&gpu->dev, gpu);
387 app_dev_init_formats(&gpu->dev);
388}
389
390static void app_gpu_destroy(struct app_gpu *gpu)
391{
392 app_dev_destroy(&gpu->dev);
393 free(gpu->extensions);
394 free(gpu->queue_reqs);
395 free(gpu->queue_props);
396}
397
Chia-I Wud4bae362014-07-29 11:15:00 +0800398static void app_dev_dump_format_props(const struct app_dev *dev, XGL_CHANNEL_FORMAT ch, XGL_NUM_FORMAT num)
399{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800400 const XGL_FORMAT_PROPERTIES *props = &dev->format_props[ch][num];
401 struct {
402 const char *name;
403 XGL_FLAGS flags;
404 } tilings[2];
405 XGL_UINT i;
Chia-I Wud4bae362014-07-29 11:15:00 +0800406
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800407 if (!props->linearTilingFeatures && !props->optimalTilingFeatures)
408 return;
Chia-I Wud4bae362014-07-29 11:15:00 +0800409
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800410 tilings[0].name = "linear";
411 tilings[0].flags = props->linearTilingFeatures;
412 tilings[1].name = "optimal";
413 tilings[1].flags = props->optimalTilingFeatures;
Chia-I Wud4bae362014-07-29 11:15:00 +0800414
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800415 printf("FORMAT_%s_%s\n", xgl_channel_format_string(ch),
416 xgl_numeric_format_string(num));
417 for (i = 0; i < ARRAY_SIZE(tilings); i++) {
418 if (!tilings[i].flags)
419 continue;
Chia-I Wud4bae362014-07-29 11:15:00 +0800420
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800421 printf("\t%s tiling image =%s%s%s\n", tilings[i].name,
422 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_READ_BIT) ? " read" : "",
423 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_WRITE_BIT) ? " write" : "",
424 (tilings[i].flags & XGL_FORMAT_IMAGE_COPY_BIT) ? " copy" : "");
425 printf("\t%s tiling memory =%s\n", tilings[i].name,
426 (tilings[i].flags & XGL_FORMAT_MEMORY_SHADER_ACCESS_BIT) ? " access" : "");
427 printf("\t%s tiling attachment =%s%s%s%s%s\n", tilings[i].name,
428 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_WRITE_BIT) ? " color" : "",
429 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_BLEND_BIT) ? " blend" : "",
430 (tilings[i].flags & XGL_FORMAT_DEPTH_ATTACHMENT_BIT) ? " depth" : "",
431 (tilings[i].flags & XGL_FORMAT_STENCIL_ATTACHMENT_BIT) ? " stencil" : "",
432 (tilings[i].flags & XGL_FORMAT_MSAA_ATTACHMENT_BIT) ? " msaa" : "");
433 printf("\t%s tiling conversion = %u\n", tilings[i].name,
434 (bool) (tilings[i].flags & XGL_FORMAT_CONVERSION_BIT));
435 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800436}
437
438static void app_dev_dump_heap_props(const struct app_dev *dev, XGL_UINT id)
439{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800440 const XGL_MEMORY_HEAP_PROPERTIES *props = &dev->heap_props[id];
Chia-I Wud4bae362014-07-29 11:15:00 +0800441
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800442 printf("XGL_MEMORY_HEAP_PROPERTIES[%u]\n", id);
Chia-I Wu54ed0792014-12-27 14:14:50 +0800443 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800444 printf("\theapMemoryType = %s\n", xgl_heap_type_string(props->heapMemoryType));
Chia-I Wu54ed0792014-12-27 14:14:50 +0800445 printf("\theapSize = %zu\n", props->heapSize);
446 printf("\tpagesSize = %zu\n", props->pageSize);
Chia-I Wud4bae362014-07-29 11:15:00 +0800447
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800448 printf("\tflags =%s%s%s%s%s%s\n",
449 (props->flags & XGL_MEMORY_HEAP_CPU_VISIBLE_BIT) ? " visible" : "",
450 (props->flags & XGL_MEMORY_HEAP_CPU_GPU_COHERENT_BIT) ? " coherent" : "",
451 (props->flags & XGL_MEMORY_HEAP_CPU_UNCACHED_BIT) ? " uc" : "",
452 (props->flags & XGL_MEMORY_HEAP_CPU_WRITE_COMBINED_BIT) ? " wc" : "",
453 (props->flags & XGL_MEMORY_HEAP_HOLDS_PINNED_BIT) ? " pinnable" : "",
454 (props->flags & XGL_MEMORY_HEAP_SHAREABLE_BIT) ? " shareable" : "");
Chia-I Wud4bae362014-07-29 11:15:00 +0800455
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800456 printf("\tgpuReadPerfRating = %f\n", props->gpuReadPerfRating);
457 printf("\tgpuWritePerfRating = %f\n", props->gpuWritePerfRating);
458 printf("\tcpuReadPerfRating = %f\n", props->cpuReadPerfRating);
459 printf("\tcpuWritePerfRating = %f\n", props->cpuWritePerfRating);
Chia-I Wud4bae362014-07-29 11:15:00 +0800460}
461
462static void
463app_dev_dump(const struct app_dev *dev)
464{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800465 XGL_CHANNEL_FORMAT ch;
466 XGL_NUM_FORMAT num;
467 XGL_UINT i;
Chia-I Wud4bae362014-07-29 11:15:00 +0800468
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800469 for (i = 0; i < dev->heap_count; i++) {
470 app_dev_dump_heap_props(dev, i);
471 printf("\n");
472 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800473
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800474 for (ch = 0; ch < XGL_MAX_CH_FMT; ch++) {
475 for (num = 0; num < XGL_MAX_NUM_FMT; num++)
476 app_dev_dump_format_props(dev, ch, num);
477 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800478}
479
480static void app_gpu_dump_multi_compat(const struct app_gpu *gpu, const struct app_gpu *other,
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800481 const XGL_GPU_COMPATIBILITY_INFO *info)
Chia-I Wud4bae362014-07-29 11:15:00 +0800482{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800483 printf("XGL_GPU_COMPATIBILITY_INFO[GPU%d]\n", other->id);
Chia-I Wud4bae362014-07-29 11:15:00 +0800484
485#define TEST(info, b) printf(#b " = %u\n", (bool) (info->compatibilityFlags & XGL_GPU_COMPAT_ ##b## _BIT))
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800486 TEST(info, ASIC_FEATURES);
487 TEST(info, IQ_MATCH);
488 TEST(info, PEER_TRANSFER);
489 TEST(info, SHARED_MEMORY);
490 TEST(info, SHARED_SYNC);
491 TEST(info, SHARED_GPU0_DISPLAY);
492 TEST(info, SHARED_GPU1_DISPLAY);
Chia-I Wud4bae362014-07-29 11:15:00 +0800493#undef TEST
494}
495
Courtney Goeltzenleuchterd183e712014-08-06 16:12:02 -0600496static void app_gpu_multi_compat(struct app_gpu *gpus, XGL_UINT gpu_count)
497{
498 XGL_RESULT err;
499 XGL_UINT i, j;
500
501 for (i = 0; i < gpu_count; i++) {
502 for (j = 0; j < gpu_count; j++) {
503 XGL_GPU_COMPATIBILITY_INFO info;
504
505 if (i == j)
506 continue;
507
508 err = xglGetMultiGpuCompatibility(gpus[i].obj,
509 gpus[j].obj, &info);
510 if (err)
511 ERR_EXIT(err);
512
513 app_gpu_dump_multi_compat(&gpus[i], &gpus[j], &info);
514 }
515 }
516}
517
Chia-I Wud4bae362014-07-29 11:15:00 +0800518static void app_gpu_dump_props(const struct app_gpu *gpu)
519{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800520 const XGL_PHYSICAL_GPU_PROPERTIES *props = &gpu->props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800521
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800522 printf("XGL_PHYSICAL_GPU_PROPERTIES\n");
Chia-I Wu54ed0792014-12-27 14:14:50 +0800523 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800524 printf("\tapiVersion = %u\n", props->apiVersion);
525 printf("\tdriverVersion = %u\n", props->driverVersion);
526 printf("\tvendorId = 0x%04x\n", props->vendorId);
527 printf("\tdeviceId = 0x%04x\n", props->deviceId);
528 printf("\tgpuType = %s\n", xgl_gpu_type_string(props->gpuType));
529 printf("\tgpuName = %s\n", props->gpuName);
530 printf("\tmaxMemRefsPerSubmission = %u\n", props->maxMemRefsPerSubmission);
Chia-I Wu54ed0792014-12-27 14:14:50 +0800531 printf("\tmaxInlineMemoryUpdateSize = %zu\n", props->maxInlineMemoryUpdateSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800532 printf("\tmaxBoundDescriptorSets = %u\n", props->maxBoundDescriptorSets);
533 printf("\tmaxThreadGroupSize = %u\n", props->maxThreadGroupSize);
534 printf("\ttimestampFrequency = %lu\n", props->timestampFrequency);
535 printf("\tmultiColorAttachmentClears = %u\n", props->multiColorAttachmentClears);
Chia-I Wud4bae362014-07-29 11:15:00 +0800536}
537
538static void app_gpu_dump_perf(const struct app_gpu *gpu)
539{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800540 const XGL_PHYSICAL_GPU_PERFORMANCE *perf = &gpu->perf;
Chia-I Wud4bae362014-07-29 11:15:00 +0800541
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800542 printf("XGL_PHYSICAL_GPU_PERFORMANCE\n");
543 printf("\tmaxGpuClock = %f\n", perf->maxGpuClock);
544 printf("\taluPerClock = %f\n", perf->aluPerClock);
545 printf("\ttexPerClock = %f\n", perf->texPerClock);
546 printf("\tprimsPerClock = %f\n", perf->primsPerClock);
547 printf("\tpixelsPerClock = %f\n", perf->pixelsPerClock);
Chia-I Wud4bae362014-07-29 11:15:00 +0800548}
549
Courtney Goeltzenleuchterff87c822014-10-03 18:05:10 -0600550static void app_gpu_dump_extensions(const struct app_gpu *gpu)
551{
552 int i;
553 printf("Extensions");
554 printf("\tcount = %d\n", gpu->extension_count);
555 printf("\t");
556 for (i=0; i< gpu->extension_count; i++) {
557 if (i>0)
558 printf(", "); // separator between extension names
559 printf("%s", gpu->extensions[i]);
560 }
561 printf("\n");
562}
563
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800564static void app_gpu_dump_queue_props(const struct app_gpu *gpu, XGL_UINT id)
Chia-I Wud4bae362014-07-29 11:15:00 +0800565{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800566 const XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *props = &gpu->queue_props[id];
Chia-I Wud4bae362014-07-29 11:15:00 +0800567
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800568 printf("XGL_PHYSICAL_GPU_QUEUE_PROPERTIES[%d]\n", id);
Chia-I Wu54ed0792014-12-27 14:14:50 +0800569 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800570 printf("\tqueueFlags = %c%c%c%c\n",
571 (props->queueFlags & XGL_QUEUE_GRAPHICS_BIT) ? 'G' : '.',
572 (props->queueFlags & XGL_QUEUE_COMPUTE_BIT) ? 'C' : '.',
573 (props->queueFlags & XGL_QUEUE_DMA_BIT) ? 'D' : '.',
574 (props->queueFlags & XGL_QUEUE_EXTENDED_BIT) ? 'X' : '.');
575 printf("\tqueueCount = %u\n", props->queueCount);
576 printf("\tmaxAtomicCounters = %u\n", props->maxAtomicCounters);
577 printf("\tsupportsTimestamps = %u\n", props->supportsTimestamps);
Chia-I Wud4bae362014-07-29 11:15:00 +0800578}
579
580static void app_gpu_dump_memory_props(const struct app_gpu *gpu)
581{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800582 const XGL_PHYSICAL_GPU_MEMORY_PROPERTIES *props = &gpu->memory_props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800583
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800584 printf("XGL_PHYSICAL_GPU_MEMORY_PROPERTIES\n");
Chia-I Wu54ed0792014-12-27 14:14:50 +0800585 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800586 printf("\tsupportsMigration = %u\n", props->supportsMigration);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800587 printf("\tsupportsPinning = %u\n", props->supportsPinning);
Chia-I Wud4bae362014-07-29 11:15:00 +0800588}
589
590static void app_gpu_dump(const struct app_gpu *gpu)
591{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800592 XGL_UINT i;
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800593
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800594 printf("GPU%u\n", gpu->id);
595 app_gpu_dump_props(gpu);
596 printf("\n");
Courtney Goeltzenleuchterff87c822014-10-03 18:05:10 -0600597 app_gpu_dump_extensions(gpu);
598 printf("\n");
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800599 app_gpu_dump_perf(gpu);
600 printf("\n");
601 for (i = 0; i < gpu->queue_count; i++) {
602 app_gpu_dump_queue_props(gpu, i);
603 printf("\n");
604 }
605 app_gpu_dump_memory_props(gpu);
606 printf("\n");
607 app_dev_dump(&gpu->dev);
Chia-I Wud4bae362014-07-29 11:15:00 +0800608}
609
Chia-I Wud4bae362014-07-29 11:15:00 +0800610int main(int argc, char **argv)
611{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800612 static const XGL_APPLICATION_INFO app_info = {
613 .sType = XGL_STRUCTURE_TYPE_APPLICATION_INFO,
614 .pNext = NULL,
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800615 .pAppName = "xglinfo",
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800616 .appVersion = 1,
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800617 .pEngineName = "xglinfo",
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800618 .engineVersion = 1,
619 .apiVersion = XGL_MAKE_VERSION(0, 22, 0),
620 };
621 struct app_gpu gpus[MAX_GPUS];
622 XGL_PHYSICAL_GPU objs[MAX_GPUS];
623 XGL_UINT gpu_count, i;
624 XGL_RESULT err;
Chia-I Wud4bae362014-07-29 11:15:00 +0800625
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800626 err = xglInitAndEnumerateGpus(&app_info, NULL,
627 MAX_GPUS, &gpu_count, objs);
628 if (err)
629 ERR_EXIT(err);
Chia-I Wud4bae362014-07-29 11:15:00 +0800630
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800631 for (i = 0; i < gpu_count; i++) {
632 app_gpu_init(&gpus[i], i, objs[i]);
633 app_gpu_dump(&gpus[i]);
634 printf("\n\n");
635 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800636
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800637 app_gpu_multi_compat(gpus, gpu_count);
Chia-I Wud4bae362014-07-29 11:15:00 +0800638
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800639 for (i = 0; i < gpu_count; i++)
640 app_gpu_destroy(&gpus[i]);
Chia-I Wud4bae362014-07-29 11:15:00 +0800641
Chia-I Wu0b9a7372014-08-06 12:09:19 +0800642 xglInitAndEnumerateGpus(&app_info, NULL, 0, &gpu_count, NULL);
643
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800644 return 0;
Chia-I Wud4bae362014-07-29 11:15:00 +0800645}