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Chia-I Wua5714e82014-08-11 15:33:42 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wua5714e82014-08-11 15:33:42 +080026 */
27
Chia-I Wu97702a62014-08-11 15:33:42 +080028#include <math.h>
29#include "genhw/genhw.h"
Chia-I Wua5714e82014-08-11 15:33:42 +080030#include "dev.h"
31#include "state.h"
32
Chia-I Wu97702a62014-08-11 15:33:42 +080033static void
34viewport_get_guardband(const struct intel_gpu *gpu,
35 int center_x, int center_y,
36 int *min_gbx, int *max_gbx,
37 int *min_gby, int *max_gby)
38{
39 /*
40 * From the Sandy Bridge PRM, volume 2 part 1, page 234:
41 *
42 * "Per-Device Guardband Extents
43 *
44 * - Supported X,Y ScreenSpace "Guardband" Extent: [-16K,16K-1]
45 * - Maximum Post-Clamp Delta (X or Y): 16K"
46 *
47 * "In addition, in order to be correctly rendered, objects must have a
48 * screenspace bounding box not exceeding 8K in the X or Y direction.
49 * This additional restriction must also be comprehended by software,
50 * i.e., enforced by use of clipping."
51 *
52 * From the Ivy Bridge PRM, volume 2 part 1, page 248:
53 *
54 * "Per-Device Guardband Extents
55 *
56 * - Supported X,Y ScreenSpace "Guardband" Extent: [-32K,32K-1]
57 * - Maximum Post-Clamp Delta (X or Y): N/A"
58 *
59 * "In addition, in order to be correctly rendered, objects must have a
60 * screenspace bounding box not exceeding 8K in the X or Y direction.
61 * This additional restriction must also be comprehended by software,
62 * i.e., enforced by use of clipping."
63 *
64 * Combined, the bounding box of any object can not exceed 8K in both
65 * width and height.
66 *
67 * Below we set the guardband as a squre of length 8K, centered at where
68 * the viewport is. This makes sure all objects passing the GB test are
69 * valid to the renderer, and those failing the XY clipping have a
70 * better chance of passing the GB test.
71 */
72 const int max_extent = (intel_gpu_gen(gpu) >= INTEL_GEN(7)) ? 32768 : 16384;
73 const int half_len = 8192 / 2;
74
75 /* make sure the guardband is within the valid range */
76 if (center_x - half_len < -max_extent)
77 center_x = -max_extent + half_len;
78 else if (center_x + half_len > max_extent - 1)
79 center_x = max_extent - half_len;
80
81 if (center_y - half_len < -max_extent)
82 center_y = -max_extent + half_len;
83 else if (center_y + half_len > max_extent - 1)
84 center_y = max_extent - half_len;
85
86 *min_gbx = (float) (center_x - half_len);
87 *max_gbx = (float) (center_x + half_len);
88 *min_gby = (float) (center_y - half_len);
89 *max_gby = (float) (center_y + half_len);
90}
91
92static XGL_RESULT
Tony Barbourfa6cac72015-01-16 14:27:35 -070093viewport_state_alloc_cmd(struct intel_dynamic_vp *state,
Chia-I Wu7b566a42014-08-22 10:58:57 +080094 const struct intel_gpu *gpu,
Tony Barbourfa6cac72015-01-16 14:27:35 -070095 const XGL_DYNAMIC_VP_STATE_CREATE_INFO *info)
Chia-I Wu7b566a42014-08-22 10:58:57 +080096{
97 INTEL_GPU_ASSERT(gpu, 6, 7.5);
98
Chia-I Wu7d841502014-08-30 14:29:15 +080099 state->viewport_count = info->viewportCount;
Tony Barbourfa6cac72015-01-16 14:27:35 -0700100 state->has_scissor_rects = (info->scissorCount > 0);
101
102 assert(info->viewportCount < INTEL_MAX_RENDER_TARGETS);
103 assert(info->scissorCount < INTEL_MAX_RENDER_TARGETS);
104 assert(!state->has_scissor_rects || info->scissorCount == info->viewportCount);
Chia-I Wu7b566a42014-08-22 10:58:57 +0800105
106 if (intel_gpu_gen(gpu) >= INTEL_GEN(7)) {
Chia-I Wu7b566a42014-08-22 10:58:57 +0800107 state->cmd_len = 16 * info->viewportCount;
108
Chia-I Wub1d450a2014-09-09 13:48:03 +0800109 state->cmd_clip_pos = 8;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800110 } else {
Chia-I Wu7b566a42014-08-22 10:58:57 +0800111 state->cmd_len = 8 * info->viewportCount;
112
Chia-I Wub1d450a2014-09-09 13:48:03 +0800113 state->cmd_clip_pos = state->cmd_len;
114 state->cmd_len += 4 * info->viewportCount;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800115 }
116
Chia-I Wub1d450a2014-09-09 13:48:03 +0800117 state->cmd_cc_pos = state->cmd_len;
118 state->cmd_len += 2 * info->viewportCount;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800119
Tony Barbourfa6cac72015-01-16 14:27:35 -0700120 if (state->has_scissor_rects) {
Chia-I Wub1d450a2014-09-09 13:48:03 +0800121 state->cmd_scissor_rect_pos = state->cmd_len;
122 state->cmd_len += 2 * info->viewportCount;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800123 }
124
125 state->cmd = icd_alloc(sizeof(uint32_t) * state->cmd_len,
126 0, XGL_SYSTEM_ALLOC_INTERNAL);
127 if (!state->cmd)
128 return XGL_ERROR_OUT_OF_MEMORY;
129
130 return XGL_SUCCESS;
131}
132
133static XGL_RESULT
Tony Barbourfa6cac72015-01-16 14:27:35 -0700134viewport_state_init(struct intel_dynamic_vp *state,
Chia-I Wu97702a62014-08-11 15:33:42 +0800135 const struct intel_gpu *gpu,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700136 const XGL_DYNAMIC_VP_STATE_CREATE_INFO *info)
Chia-I Wu97702a62014-08-11 15:33:42 +0800137{
138 const XGL_UINT sf_stride = (intel_gpu_gen(gpu) >= INTEL_GEN(7)) ? 16 : 8;
139 const XGL_UINT clip_stride = (intel_gpu_gen(gpu) >= INTEL_GEN(7)) ? 16 : 4;
140 uint32_t *sf_viewport, *clip_viewport, *cc_viewport, *scissor_rect;
141 XGL_UINT i;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800142 XGL_RESULT ret;
Chia-I Wu97702a62014-08-11 15:33:42 +0800143
144 INTEL_GPU_ASSERT(gpu, 6, 7.5);
145
Chia-I Wu7b566a42014-08-22 10:58:57 +0800146 ret = viewport_state_alloc_cmd(state, gpu, info);
147 if (ret != XGL_SUCCESS)
148 return ret;
Chia-I Wu97702a62014-08-11 15:33:42 +0800149
150 sf_viewport = state->cmd;
Chia-I Wub1d450a2014-09-09 13:48:03 +0800151 clip_viewport = state->cmd + state->cmd_clip_pos;
152 cc_viewport = state->cmd + state->cmd_cc_pos;
153 scissor_rect = state->cmd + state->cmd_scissor_rect_pos;
Chia-I Wu97702a62014-08-11 15:33:42 +0800154
155 for (i = 0; i < info->viewportCount; i++) {
Tony Barbourfa6cac72015-01-16 14:27:35 -0700156 const XGL_VIEWPORT *viewport = &info->pViewports[i];
Chia-I Wu97702a62014-08-11 15:33:42 +0800157 uint32_t *dw = NULL;
158 float translate[3], scale[3];
159 int min_gbx, max_gbx, min_gby, max_gby;
160
161 scale[0] = viewport->width / 2.0f;
162 scale[1] = viewport->height / 2.0f;
163 scale[2] = (viewport->maxDepth - viewport->minDepth) / 2.0;
164 translate[0] = viewport->originX + scale[0];
165 translate[1] = viewport->originY + scale[1];
166 translate[2] = (viewport->minDepth + viewport->maxDepth) / 2.0f;
167
168 viewport_get_guardband(gpu, (int) translate[0], (int) translate[1],
169 &min_gbx, &max_gbx, &min_gby, &max_gby);
170
171 /* SF_VIEWPORT */
172 dw = sf_viewport;
173 dw[0] = u_fui(scale[0]);
174 dw[1] = u_fui(scale[1]);
175 dw[2] = u_fui(scale[2]);
176 dw[3] = u_fui(translate[0]);
177 dw[4] = u_fui(translate[1]);
178 dw[5] = u_fui(translate[2]);
179 dw[6] = 0;
180 dw[7] = 0;
181 sf_viewport += sf_stride;
182
183 /* CLIP_VIEWPORT */
184 dw = clip_viewport;
Chia-I Wu3a702202014-08-30 18:23:55 +0800185 dw[0] = u_fui(((float) min_gbx - translate[0]) / fabsf(scale[0]));
186 dw[1] = u_fui(((float) max_gbx - translate[0]) / fabsf(scale[0]));
187 dw[2] = u_fui(((float) min_gby - translate[1]) / fabsf(scale[1]));
188 dw[3] = u_fui(((float) max_gby - translate[1]) / fabsf(scale[1]));
Chia-I Wu97702a62014-08-11 15:33:42 +0800189 clip_viewport += clip_stride;
190
191 /* CC_VIEWPORT */
192 dw = cc_viewport;
193 dw[0] = u_fui(viewport->minDepth);
194 dw[1] = u_fui(viewport->maxDepth);
195 cc_viewport += 2;
Tony Barbourfa6cac72015-01-16 14:27:35 -0700196 }
Chia-I Wu97702a62014-08-11 15:33:42 +0800197
Tony Barbourfa6cac72015-01-16 14:27:35 -0700198 for (i = 0; i < info->scissorCount; i++) {
199 const XGL_RECT *scissor = &info->pScissors[i];
Chia-I Wu97702a62014-08-11 15:33:42 +0800200 /* SCISSOR_RECT */
Tony Barbourfa6cac72015-01-16 14:27:35 -0700201 int16_t max_x, max_y;
202 uint32_t *dw = NULL;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800203
Tony Barbourfa6cac72015-01-16 14:27:35 -0700204 max_x = (scissor->offset.x + scissor->extent.width - 1) & 0xffff;
205 max_y = (scissor->offset.y + scissor->extent.height - 1) & 0xffff;
Chia-I Wu7b566a42014-08-22 10:58:57 +0800206
Tony Barbourfa6cac72015-01-16 14:27:35 -0700207 dw = scissor_rect;
208 if (scissor->extent.width && scissor->extent.height) {
209 dw[0] = (scissor->offset.y & 0xffff) << 16 |
210 (scissor->offset.x & 0xffff);
211 dw[1] = max_y << 16 | max_x;
212 } else {
213 dw[0] = 1 << 16 | 1;
214 dw[1] = 0;
Chia-I Wu97702a62014-08-11 15:33:42 +0800215 }
Tony Barbourfa6cac72015-01-16 14:27:35 -0700216 scissor_rect += 2;
Chia-I Wu97702a62014-08-11 15:33:42 +0800217 }
218
219 return XGL_SUCCESS;
220}
221
Chia-I Wua5714e82014-08-11 15:33:42 +0800222static void viewport_state_destroy(struct intel_obj *obj)
223{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700224 struct intel_dynamic_vp *state = intel_viewport_state_from_obj(obj);
Chia-I Wua5714e82014-08-11 15:33:42 +0800225
226 intel_viewport_state_destroy(state);
227}
228
229XGL_RESULT intel_viewport_state_create(struct intel_dev *dev,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700230 const XGL_DYNAMIC_VP_STATE_CREATE_INFO *info,
231 struct intel_dynamic_vp **state_ret)
Chia-I Wua5714e82014-08-11 15:33:42 +0800232{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700233 struct intel_dynamic_vp *state;
Chia-I Wu97702a62014-08-11 15:33:42 +0800234 XGL_RESULT ret;
Chia-I Wua5714e82014-08-11 15:33:42 +0800235
Tony Barbourfa6cac72015-01-16 14:27:35 -0700236 state = (struct intel_dynamic_vp *) intel_base_create(dev,
Chia-I Wua5714e82014-08-11 15:33:42 +0800237 sizeof(*state), dev->base.dbg, XGL_DBG_OBJECT_VIEWPORT_STATE,
238 info, 0);
239 if (!state)
240 return XGL_ERROR_OUT_OF_MEMORY;
241
242 state->obj.destroy = viewport_state_destroy;
243
Chia-I Wu97702a62014-08-11 15:33:42 +0800244 ret = viewport_state_init(state, dev->gpu, info);
245 if (ret != XGL_SUCCESS) {
246 intel_viewport_state_destroy(state);
247 return ret;
248 }
Chia-I Wua5714e82014-08-11 15:33:42 +0800249
250 *state_ret = state;
251
252 return XGL_SUCCESS;
253}
254
Tony Barbourfa6cac72015-01-16 14:27:35 -0700255void intel_viewport_state_destroy(struct intel_dynamic_vp *state)
Chia-I Wua5714e82014-08-11 15:33:42 +0800256{
Chia-I Wu97702a62014-08-11 15:33:42 +0800257 icd_free(state->cmd);
Chia-I Wua5714e82014-08-11 15:33:42 +0800258 intel_base_destroy(&state->obj.base);
259}
260
261static void raster_state_destroy(struct intel_obj *obj)
262{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700263 struct intel_dynamic_rs *state = intel_raster_state_from_obj(obj);
Chia-I Wua5714e82014-08-11 15:33:42 +0800264
265 intel_raster_state_destroy(state);
266}
267
268XGL_RESULT intel_raster_state_create(struct intel_dev *dev,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700269 const XGL_DYNAMIC_RS_STATE_CREATE_INFO *info,
270 struct intel_dynamic_rs **state_ret)
Chia-I Wua5714e82014-08-11 15:33:42 +0800271{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700272 struct intel_dynamic_rs *state;
Chia-I Wua5714e82014-08-11 15:33:42 +0800273
Tony Barbourfa6cac72015-01-16 14:27:35 -0700274 state = (struct intel_dynamic_rs *) intel_base_create(dev,
Chia-I Wua5714e82014-08-11 15:33:42 +0800275 sizeof(*state), dev->base.dbg, XGL_DBG_OBJECT_RASTER_STATE,
276 info, 0);
277 if (!state)
278 return XGL_ERROR_OUT_OF_MEMORY;
279
280 state->obj.destroy = raster_state_destroy;
Tony Barbourfa6cac72015-01-16 14:27:35 -0700281 state->rs_info = *info;
Chia-I Wua5714e82014-08-11 15:33:42 +0800282
283 *state_ret = state;
284
285 return XGL_SUCCESS;
286}
287
Tony Barbourfa6cac72015-01-16 14:27:35 -0700288void intel_raster_state_destroy(struct intel_dynamic_rs *state)
Chia-I Wua5714e82014-08-11 15:33:42 +0800289{
290 intel_base_destroy(&state->obj.base);
291}
292
293static void blend_state_destroy(struct intel_obj *obj)
294{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700295 struct intel_dynamic_cb *state = intel_blend_state_from_obj(obj);
Chia-I Wua5714e82014-08-11 15:33:42 +0800296
297 intel_blend_state_destroy(state);
298}
299
300XGL_RESULT intel_blend_state_create(struct intel_dev *dev,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700301 const XGL_DYNAMIC_CB_STATE_CREATE_INFO *info,
302 struct intel_dynamic_cb **state_ret)
Chia-I Wua5714e82014-08-11 15:33:42 +0800303{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700304 struct intel_dynamic_cb *state;
Chia-I Wua5714e82014-08-11 15:33:42 +0800305
Tony Barbourfa6cac72015-01-16 14:27:35 -0700306 state = (struct intel_dynamic_cb *) intel_base_create(dev,
Courtney Goeltzenleuchter985ad492014-08-27 14:04:17 -0600307 sizeof(*state), dev->base.dbg, XGL_DBG_OBJECT_COLOR_BLEND_STATE,
Chia-I Wua5714e82014-08-11 15:33:42 +0800308 info, 0);
309 if (!state)
310 return XGL_ERROR_OUT_OF_MEMORY;
311
312 state->obj.destroy = blend_state_destroy;
Tony Barbourfa6cac72015-01-16 14:27:35 -0700313 state->cb_info = *info;
Chia-I Wua5714e82014-08-11 15:33:42 +0800314
315 *state_ret = state;
316
317 return XGL_SUCCESS;
318}
319
Tony Barbourfa6cac72015-01-16 14:27:35 -0700320void intel_blend_state_destroy(struct intel_dynamic_cb *state)
Chia-I Wua5714e82014-08-11 15:33:42 +0800321{
322 intel_base_destroy(&state->obj.base);
323}
324
325static void ds_state_destroy(struct intel_obj *obj)
326{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700327 struct intel_dynamic_ds *state = intel_ds_state_from_obj(obj);
Chia-I Wua5714e82014-08-11 15:33:42 +0800328
329 intel_ds_state_destroy(state);
330}
331
332XGL_RESULT intel_ds_state_create(struct intel_dev *dev,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700333 const XGL_DYNAMIC_DS_STATE_CREATE_INFO *info,
334 struct intel_dynamic_ds **state_ret)
Chia-I Wua5714e82014-08-11 15:33:42 +0800335{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700336 struct intel_dynamic_ds *state;
Chia-I Wua5714e82014-08-11 15:33:42 +0800337
Tony Barbourfa6cac72015-01-16 14:27:35 -0700338 state = (struct intel_dynamic_ds *) intel_base_create(dev,
Courtney Goeltzenleuchtere7dc05f2014-08-22 16:26:07 -0600339 sizeof(*state), dev->base.dbg, XGL_DBG_OBJECT_DEPTH_STENCIL_STATE,
Chia-I Wua5714e82014-08-11 15:33:42 +0800340 info, 0);
341 if (!state)
342 return XGL_ERROR_OUT_OF_MEMORY;
343
344 state->obj.destroy = ds_state_destroy;
345
Tony Barbourfa6cac72015-01-16 14:27:35 -0700346 /*
347 * From the Sandy Bridge PRM, volume 2 part 1, page 359:
348 *
349 * "If the Depth Buffer is either undefined or does not have a surface
350 * format of D32_FLOAT_S8X24_UINT or D24_UNORM_S8_UINT and separate
351 * stencil buffer is disabled, Stencil Test Enable must be DISABLED"
352 *
353 * From the Sandy Bridge PRM, volume 2 part 1, page 370:
354 *
355 * "This field (Stencil Test Enable) cannot be enabled if
356 * Surface Format in 3DSTATE_DEPTH_BUFFER is set to D16_UNORM."
357 *
358 * TODO We do not check these yet.
359 */
360
361 state->ds_info = *info;
Chia-I Wua5714e82014-08-11 15:33:42 +0800362
363 *state_ret = state;
364
365 return XGL_SUCCESS;
366}
367
Tony Barbourfa6cac72015-01-16 14:27:35 -0700368void intel_ds_state_destroy(struct intel_dynamic_ds *state)
Chia-I Wua5714e82014-08-11 15:33:42 +0800369{
370 intel_base_destroy(&state->obj.base);
371}
372
Tony Barbourfa6cac72015-01-16 14:27:35 -0700373ICD_EXPORT XGL_RESULT XGLAPI xglCreateDynamicViewportState(
Chia-I Wua5714e82014-08-11 15:33:42 +0800374 XGL_DEVICE device,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700375 const XGL_DYNAMIC_VP_STATE_CREATE_INFO* pCreateInfo,
376 XGL_DYNAMIC_VP_STATE_OBJECT* pState)
Chia-I Wua5714e82014-08-11 15:33:42 +0800377{
378 struct intel_dev *dev = intel_dev(device);
379
380 return intel_viewport_state_create(dev, pCreateInfo,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700381 (struct intel_dynamic_vp **) pState);
Chia-I Wua5714e82014-08-11 15:33:42 +0800382}
383
Tony Barbourfa6cac72015-01-16 14:27:35 -0700384ICD_EXPORT XGL_RESULT XGLAPI xglCreateDynamicRasterState(
Chia-I Wua5714e82014-08-11 15:33:42 +0800385 XGL_DEVICE device,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700386 const XGL_DYNAMIC_RS_STATE_CREATE_INFO* pCreateInfo,
387 XGL_DYNAMIC_RS_STATE_OBJECT* pState)
Chia-I Wua5714e82014-08-11 15:33:42 +0800388{
389 struct intel_dev *dev = intel_dev(device);
390
391 return intel_raster_state_create(dev, pCreateInfo,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700392 (struct intel_dynamic_rs **) pState);
Chia-I Wua5714e82014-08-11 15:33:42 +0800393}
394
Tony Barbourfa6cac72015-01-16 14:27:35 -0700395ICD_EXPORT XGL_RESULT XGLAPI xglCreateDynamicColorBlendState(
Chia-I Wua5714e82014-08-11 15:33:42 +0800396 XGL_DEVICE device,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700397 const XGL_DYNAMIC_CB_STATE_CREATE_INFO* pCreateInfo,
398 XGL_DYNAMIC_CB_STATE_OBJECT* pState)
Chia-I Wua5714e82014-08-11 15:33:42 +0800399{
400 struct intel_dev *dev = intel_dev(device);
401
402 return intel_blend_state_create(dev, pCreateInfo,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700403 (struct intel_dynamic_cb **) pState);
Chia-I Wua5714e82014-08-11 15:33:42 +0800404}
405
Tony Barbourfa6cac72015-01-16 14:27:35 -0700406ICD_EXPORT XGL_RESULT XGLAPI xglCreateDynamicDepthStencilState(
Chia-I Wua5714e82014-08-11 15:33:42 +0800407 XGL_DEVICE device,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700408 const XGL_DYNAMIC_DS_STATE_CREATE_INFO* pCreateInfo,
409 XGL_DYNAMIC_DS_STATE_OBJECT* pState)
Chia-I Wua5714e82014-08-11 15:33:42 +0800410{
411 struct intel_dev *dev = intel_dev(device);
412
413 return intel_ds_state_create(dev, pCreateInfo,
Tony Barbourfa6cac72015-01-16 14:27:35 -0700414 (struct intel_dynamic_ds **) pState);
Chia-I Wua5714e82014-08-11 15:33:42 +0800415}