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Chia-I Wu09142132014-08-11 15:42:55 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wu730e5362014-08-19 12:15:09 +080025#include "genhw/genhw.h"
26#include "kmd/winsys.h"
27#include "dev.h"
Chia-I Wu343b1372014-08-20 16:39:20 +080028#include "mem.h"
Chia-I Wu730e5362014-08-19 12:15:09 +080029#include "obj.h"
Chia-I Wu00a23b22014-08-20 15:28:08 +080030#include "cmd_priv.h"
Chia-I Wu09142132014-08-11 15:42:55 +080031
Chia-I Wue24c3292014-08-21 14:05:23 +080032static XGL_RESULT cmd_writer_alloc_and_map(struct intel_cmd *cmd,
33 struct intel_cmd_writer *writer,
34 XGL_UINT size)
Chia-I Wu730e5362014-08-19 12:15:09 +080035{
36 struct intel_winsys *winsys = cmd->dev->winsys;
Chia-I Wue24c3292014-08-21 14:05:23 +080037 const XGL_GPU_SIZE bo_size = sizeof(uint32_t) * size;
Chia-I Wu730e5362014-08-19 12:15:09 +080038 struct intel_bo *bo;
39 void *ptr;
40
41 bo = intel_winsys_alloc_buffer(winsys,
42 "batch buffer", bo_size, INTEL_DOMAIN_CPU);
43 if (!bo)
44 return XGL_ERROR_OUT_OF_GPU_MEMORY;
45
46 ptr = intel_bo_map(bo, true);
47 if (!bo) {
48 intel_bo_unreference(bo);
49 return XGL_ERROR_MEMORY_MAP_FAILED;
50 }
51
Chia-I Wue24c3292014-08-21 14:05:23 +080052 writer->bo = bo;
53 writer->ptr_opaque = ptr;
54 writer->size = size;
55 writer->used = 0;
Chia-I Wu730e5362014-08-19 12:15:09 +080056
57 return XGL_SUCCESS;
58}
59
Chia-I Wue24c3292014-08-21 14:05:23 +080060void cmd_writer_grow(struct intel_cmd *cmd,
61 struct intel_cmd_writer *writer)
Chia-I Wu730e5362014-08-19 12:15:09 +080062{
Chia-I Wue24c3292014-08-21 14:05:23 +080063 const XGL_UINT size = writer->size << 1;
64 const XGL_UINT old_used = writer->used;
65 struct intel_bo *old_bo = writer->bo;
66 void *old_ptr = writer->ptr_opaque;
67
68 if (size >= writer->size &&
69 cmd_writer_alloc_and_map(cmd, writer, size) == XGL_SUCCESS) {
70 cmd_writer_copy(cmd, writer, (const uint32_t *) old_ptr, old_used);
71
72 intel_bo_unmap(old_bo);
73 intel_bo_unreference(old_bo);
74 } else {
75 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
76 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
77 "failed to grow command buffer of size %u", writer->size);
78
79 /* wrap it and fail silently */
80 writer->used = 0;
81 cmd->result = XGL_ERROR_OUT_OF_GPU_MEMORY;
82 }
Chia-I Wu730e5362014-08-19 12:15:09 +080083}
84
Chia-I Wue24c3292014-08-21 14:05:23 +080085static void cmd_writer_unmap(struct intel_cmd *cmd,
86 struct intel_cmd_writer *writer)
Chia-I Wu730e5362014-08-19 12:15:09 +080087{
Chia-I Wue24c3292014-08-21 14:05:23 +080088 intel_bo_unmap(writer->bo);
89 writer->ptr_opaque = NULL;
90}
91
92static void cmd_writer_free(struct intel_cmd *cmd,
93 struct intel_cmd_writer *writer)
94{
95 intel_bo_unreference(writer->bo);
96 writer->bo = NULL;
97}
98
99static void cmd_writer_reset(struct intel_cmd *cmd,
100 struct intel_cmd_writer *writer)
101{
102 /* do not reset writer->size as we want to know how big it has grown to */
103 writer->used = 0;
104
105 if (writer->ptr_opaque)
106 cmd_writer_unmap(cmd, writer);
107 if (writer->bo)
108 cmd_writer_free(cmd, writer);
109}
110
111static void cmd_unmap(struct intel_cmd *cmd)
112{
113 cmd_writer_unmap(cmd, &cmd->batch);
Chia-I Wu730e5362014-08-19 12:15:09 +0800114}
115
116static void cmd_reset(struct intel_cmd *cmd)
117{
Chia-I Wue24c3292014-08-21 14:05:23 +0800118 cmd_writer_reset(cmd, &cmd->batch);
Chia-I Wu343b1372014-08-20 16:39:20 +0800119 cmd->reloc_used = 0;
Chia-I Wu04966702014-08-20 15:05:03 +0800120 cmd->result = XGL_SUCCESS;
Chia-I Wu730e5362014-08-19 12:15:09 +0800121}
122
123static void cmd_destroy(struct intel_obj *obj)
124{
125 struct intel_cmd *cmd = intel_cmd_from_obj(obj);
126
127 intel_cmd_destroy(cmd);
128}
129
130XGL_RESULT intel_cmd_create(struct intel_dev *dev,
131 const XGL_CMD_BUFFER_CREATE_INFO *info,
132 struct intel_cmd **cmd_ret)
133{
134 struct intel_cmd *cmd;
135
136 cmd = (struct intel_cmd *) intel_base_create(dev, sizeof(*cmd),
137 dev->base.dbg, XGL_DBG_OBJECT_CMD_BUFFER, info, 0);
138 if (!cmd)
139 return XGL_ERROR_OUT_OF_MEMORY;
140
141 cmd->obj.destroy = cmd_destroy;
142
143 cmd->dev = dev;
Chia-I Wue24c3292014-08-21 14:05:23 +0800144
Chia-I Wu343b1372014-08-20 16:39:20 +0800145 cmd->reloc_count = dev->gpu->batch_buffer_reloc_count;
146 cmd->relocs = icd_alloc(sizeof(cmd->relocs[0]) * cmd->reloc_count,
147 4096, XGL_SYSTEM_ALLOC_INTERNAL);
148 if (!cmd->relocs) {
149 intel_cmd_destroy(cmd);
150 return XGL_ERROR_OUT_OF_MEMORY;
151 }
Chia-I Wu730e5362014-08-19 12:15:09 +0800152
153 *cmd_ret = cmd;
154
155 return XGL_SUCCESS;
156}
157
158void intel_cmd_destroy(struct intel_cmd *cmd)
159{
160 cmd_reset(cmd);
Chia-I Wue24c3292014-08-21 14:05:23 +0800161
162 icd_free(cmd->relocs);
Chia-I Wu730e5362014-08-19 12:15:09 +0800163 intel_base_destroy(&cmd->obj.base);
164}
165
166XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags)
167{
Chia-I Wue24c3292014-08-21 14:05:23 +0800168 XGL_UINT size = cmd->batch.size;
Chia-I Wu730e5362014-08-19 12:15:09 +0800169
170 cmd_reset(cmd);
171
Chia-I Wue24c3292014-08-21 14:05:23 +0800172 if (!size || cmd->flags != flags) {
173 XGL_GPU_SIZE bo_size = cmd->dev->gpu->max_batch_buffer_size;
Chia-I Wu730e5362014-08-19 12:15:09 +0800174
Chia-I Wu730e5362014-08-19 12:15:09 +0800175 if (flags & XGL_CMD_BUFFER_OPTIMIZE_GPU_SMALL_BATCH_BIT)
176 bo_size /= 2;
177
Chia-I Wue24c3292014-08-21 14:05:23 +0800178 size = bo_size / sizeof(uint32_t);
179
180 cmd->flags = flags;
Chia-I Wu730e5362014-08-19 12:15:09 +0800181 }
182
Chia-I Wue24c3292014-08-21 14:05:23 +0800183 return cmd_writer_alloc_and_map(cmd, &cmd->batch, size);
Chia-I Wu730e5362014-08-19 12:15:09 +0800184}
185
186XGL_RESULT intel_cmd_end(struct intel_cmd *cmd)
187{
188 struct intel_winsys *winsys = cmd->dev->winsys;
Chia-I Wu343b1372014-08-20 16:39:20 +0800189 XGL_UINT i;
Chia-I Wu730e5362014-08-19 12:15:09 +0800190
Chia-I Wue24c3292014-08-21 14:05:23 +0800191 cmd_batch_end(cmd);
Chia-I Wu730e5362014-08-19 12:15:09 +0800192
Chia-I Wu343b1372014-08-20 16:39:20 +0800193 /* TODO we need a more "explicit" winsys */
194 for (i = 0; i < cmd->reloc_count; i++) {
195 const struct intel_cmd_reloc *reloc = &cmd->relocs[i];
196 uint64_t presumed_offset;
197 int err;
198
Chia-I Wue24c3292014-08-21 14:05:23 +0800199 err = intel_bo_add_reloc(reloc->writer->bo,
200 sizeof(uint32_t) * reloc->pos, reloc->mem->bo, reloc->val,
201 reloc->read_domains, reloc->write_domain, &presumed_offset);
Chia-I Wu343b1372014-08-20 16:39:20 +0800202 if (err) {
203 cmd->result = XGL_ERROR_UNKNOWN;
204 break;
205 }
206
207 assert(presumed_offset == (uint64_t) (uint32_t) presumed_offset);
Chia-I Wue24c3292014-08-21 14:05:23 +0800208 cmd_writer_patch(cmd, reloc->writer, reloc->pos,
209 (uint32_t) presumed_offset);
Chia-I Wu343b1372014-08-20 16:39:20 +0800210 }
211
Chia-I Wu730e5362014-08-19 12:15:09 +0800212 cmd_unmap(cmd);
213
Chia-I Wu04966702014-08-20 15:05:03 +0800214 if (cmd->result != XGL_SUCCESS)
215 return cmd->result;
Chia-I Wue24c3292014-08-21 14:05:23 +0800216
217 if (intel_winsys_can_submit_bo(winsys, &cmd->batch.bo, 1))
Chia-I Wu730e5362014-08-19 12:15:09 +0800218 return XGL_SUCCESS;
219 else
220 return XGL_ERROR_TOO_MANY_MEMORY_REFERENCES;
221}
222
Chia-I Wu09142132014-08-11 15:42:55 +0800223XGL_RESULT XGLAPI intelCreateCommandBuffer(
224 XGL_DEVICE device,
225 const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo,
226 XGL_CMD_BUFFER* pCmdBuffer)
227{
Chia-I Wu730e5362014-08-19 12:15:09 +0800228 struct intel_dev *dev = intel_dev(device);
229
230 return intel_cmd_create(dev, pCreateInfo,
231 (struct intel_cmd **) pCmdBuffer);
Chia-I Wu09142132014-08-11 15:42:55 +0800232}
233
234XGL_RESULT XGLAPI intelBeginCommandBuffer(
235 XGL_CMD_BUFFER cmdBuffer,
236 XGL_FLAGS flags)
237{
Chia-I Wu730e5362014-08-19 12:15:09 +0800238 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
239
240 return intel_cmd_begin(cmd, flags);
Chia-I Wu09142132014-08-11 15:42:55 +0800241}
242
243XGL_RESULT XGLAPI intelEndCommandBuffer(
244 XGL_CMD_BUFFER cmdBuffer)
245{
Chia-I Wu730e5362014-08-19 12:15:09 +0800246 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
247
248 return intel_cmd_end(cmd);
Chia-I Wu09142132014-08-11 15:42:55 +0800249}
250
251XGL_RESULT XGLAPI intelResetCommandBuffer(
252 XGL_CMD_BUFFER cmdBuffer)
253{
Chia-I Wu730e5362014-08-19 12:15:09 +0800254 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
255
256 cmd_reset(cmd);
257
258 return XGL_SUCCESS;
Chia-I Wu09142132014-08-11 15:42:55 +0800259}
260
Chia-I Wu09142132014-08-11 15:42:55 +0800261XGL_VOID XGLAPI intelCmdPrepareMemoryRegions(
262 XGL_CMD_BUFFER cmdBuffer,
263 XGL_UINT transitionCount,
264 const XGL_MEMORY_STATE_TRANSITION* pStateTransitions)
265{
266}
267
268XGL_VOID XGLAPI intelCmdPrepareImages(
269 XGL_CMD_BUFFER cmdBuffer,
270 XGL_UINT transitionCount,
271 const XGL_IMAGE_STATE_TRANSITION* pStateTransitions)
272{
273}
274
Chia-I Wu09142132014-08-11 15:42:55 +0800275XGL_VOID XGLAPI intelCmdCopyMemory(
276 XGL_CMD_BUFFER cmdBuffer,
277 XGL_GPU_MEMORY srcMem,
278 XGL_GPU_MEMORY destMem,
279 XGL_UINT regionCount,
280 const XGL_MEMORY_COPY* pRegions)
281{
282}
283
284XGL_VOID XGLAPI intelCmdCopyImage(
285 XGL_CMD_BUFFER cmdBuffer,
286 XGL_IMAGE srcImage,
287 XGL_IMAGE destImage,
288 XGL_UINT regionCount,
289 const XGL_IMAGE_COPY* pRegions)
290{
291}
292
293XGL_VOID XGLAPI intelCmdCopyMemoryToImage(
294 XGL_CMD_BUFFER cmdBuffer,
295 XGL_GPU_MEMORY srcMem,
296 XGL_IMAGE destImage,
297 XGL_UINT regionCount,
298 const XGL_MEMORY_IMAGE_COPY* pRegions)
299{
300}
301
302XGL_VOID XGLAPI intelCmdCopyImageToMemory(
303 XGL_CMD_BUFFER cmdBuffer,
304 XGL_IMAGE srcImage,
305 XGL_GPU_MEMORY destMem,
306 XGL_UINT regionCount,
307 const XGL_MEMORY_IMAGE_COPY* pRegions)
308{
309}
310
311XGL_VOID XGLAPI intelCmdCloneImageData(
312 XGL_CMD_BUFFER cmdBuffer,
313 XGL_IMAGE srcImage,
314 XGL_IMAGE_STATE srcImageState,
315 XGL_IMAGE destImage,
316 XGL_IMAGE_STATE destImageState)
317{
318}
319
320XGL_VOID XGLAPI intelCmdUpdateMemory(
321 XGL_CMD_BUFFER cmdBuffer,
322 XGL_GPU_MEMORY destMem,
323 XGL_GPU_SIZE destOffset,
324 XGL_GPU_SIZE dataSize,
325 const XGL_UINT32* pData)
326{
327}
328
329XGL_VOID XGLAPI intelCmdFillMemory(
330 XGL_CMD_BUFFER cmdBuffer,
331 XGL_GPU_MEMORY destMem,
332 XGL_GPU_SIZE destOffset,
333 XGL_GPU_SIZE fillSize,
334 XGL_UINT32 data)
335{
336}
337
338XGL_VOID XGLAPI intelCmdClearColorImage(
339 XGL_CMD_BUFFER cmdBuffer,
340 XGL_IMAGE image,
341 const XGL_FLOAT color[4],
342 XGL_UINT rangeCount,
343 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
344{
345}
346
347XGL_VOID XGLAPI intelCmdClearColorImageRaw(
348 XGL_CMD_BUFFER cmdBuffer,
349 XGL_IMAGE image,
350 const XGL_UINT32 color[4],
351 XGL_UINT rangeCount,
352 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
353{
354}
355
356XGL_VOID XGLAPI intelCmdClearDepthStencil(
357 XGL_CMD_BUFFER cmdBuffer,
358 XGL_IMAGE image,
359 XGL_FLOAT depth,
360 XGL_UINT32 stencil,
361 XGL_UINT rangeCount,
362 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
363{
364}
365
366XGL_VOID XGLAPI intelCmdResolveImage(
367 XGL_CMD_BUFFER cmdBuffer,
368 XGL_IMAGE srcImage,
369 XGL_IMAGE destImage,
370 XGL_UINT rectCount,
371 const XGL_IMAGE_RESOLVE* pRects)
372{
373}
374
375XGL_VOID XGLAPI intelCmdSetEvent(
376 XGL_CMD_BUFFER cmdBuffer,
377 XGL_EVENT event)
378{
379}
380
381XGL_VOID XGLAPI intelCmdResetEvent(
382 XGL_CMD_BUFFER cmdBuffer,
383 XGL_EVENT event)
384{
385}
386
387XGL_VOID XGLAPI intelCmdMemoryAtomic(
388 XGL_CMD_BUFFER cmdBuffer,
389 XGL_GPU_MEMORY destMem,
390 XGL_GPU_SIZE destOffset,
391 XGL_UINT64 srcData,
392 XGL_ATOMIC_OP atomicOp)
393{
394}
395
396XGL_VOID XGLAPI intelCmdBeginQuery(
397 XGL_CMD_BUFFER cmdBuffer,
398 XGL_QUERY_POOL queryPool,
399 XGL_UINT slot,
400 XGL_FLAGS flags)
401{
402}
403
404XGL_VOID XGLAPI intelCmdEndQuery(
405 XGL_CMD_BUFFER cmdBuffer,
406 XGL_QUERY_POOL queryPool,
407 XGL_UINT slot)
408{
409}
410
411XGL_VOID XGLAPI intelCmdResetQueryPool(
412 XGL_CMD_BUFFER cmdBuffer,
413 XGL_QUERY_POOL queryPool,
414 XGL_UINT startQuery,
415 XGL_UINT queryCount)
416{
417}
418
419XGL_VOID XGLAPI intelCmdWriteTimestamp(
420 XGL_CMD_BUFFER cmdBuffer,
421 XGL_TIMESTAMP_TYPE timestampType,
422 XGL_GPU_MEMORY destMem,
423 XGL_GPU_SIZE destOffset)
424{
425}
426
427XGL_VOID XGLAPI intelCmdInitAtomicCounters(
428 XGL_CMD_BUFFER cmdBuffer,
429 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
430 XGL_UINT startCounter,
431 XGL_UINT counterCount,
432 const XGL_UINT32* pData)
433{
434}
435
436XGL_VOID XGLAPI intelCmdLoadAtomicCounters(
437 XGL_CMD_BUFFER cmdBuffer,
438 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
439 XGL_UINT startCounter,
440 XGL_UINT counterCount,
441 XGL_GPU_MEMORY srcMem,
442 XGL_GPU_SIZE srcOffset)
443{
444}
445
446XGL_VOID XGLAPI intelCmdSaveAtomicCounters(
447 XGL_CMD_BUFFER cmdBuffer,
448 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
449 XGL_UINT startCounter,
450 XGL_UINT counterCount,
451 XGL_GPU_MEMORY destMem,
452 XGL_GPU_SIZE destOffset)
453{
454}
455
456XGL_VOID XGLAPI intelCmdDbgMarkerBegin(
457 XGL_CMD_BUFFER cmdBuffer,
458 const XGL_CHAR* pMarker)
459{
460}
461
462XGL_VOID XGLAPI intelCmdDbgMarkerEnd(
463 XGL_CMD_BUFFER cmdBuffer)
464{
465}