Zonr Chang | c72c4dd | 2012-04-12 15:38:53 +0800 | [diff] [blame] | 1 | #ifndef BCC_CONFIG_CONFIG_H |
| 2 | #define BCC_CONFIG_CONFIG_H |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 3 | |
| 4 | //--------------------------------------------------------------------------- |
Logan Chien | 4885cf8 | 2011-07-20 10:18:05 +0800 | [diff] [blame] | 5 | // Configuration for Disassembler |
Logan | 1dc6314 | 2011-02-25 17:14:51 +0800 | [diff] [blame] | 6 | //--------------------------------------------------------------------------- |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 7 | |
Stephen Hines | 3699962 | 2012-03-11 19:15:51 -0700 | [diff] [blame] | 8 | #if DEBUG_MC_DISASSEMBLER |
Logan Chien | 4885cf8 | 2011-07-20 10:18:05 +0800 | [diff] [blame] | 9 | #define USE_DISASSEMBLER 1 |
| 10 | #else |
| 11 | #define USE_DISASSEMBLER 0 |
| 12 | #endif |
| 13 | |
Andrew Hsieh | 1704c74 | 2011-11-20 20:43:36 -0800 | [diff] [blame] | 14 | #if defined(__HOST__) |
Shih-wei Liao | d7f1bd6 | 2012-07-23 23:14:34 -0700 | [diff] [blame] | 15 | #define DEBUG_DISASSEMBLER_FILE "/tmp/mc-dis.s" |
Andrew Hsieh | 1704c74 | 2011-11-20 20:43:36 -0800 | [diff] [blame] | 16 | #else |
Shih-wei Liao | d7f1bd6 | 2012-07-23 23:14:34 -0700 | [diff] [blame] | 17 | #define DEBUG_DISASSEMBLER_FILE "/data/local/tmp/mc-dis.s" |
Andrew Hsieh | 1704c74 | 2011-11-20 20:43:36 -0800 | [diff] [blame] | 18 | #endif // defined(__HOST__) |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 19 | |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 20 | //--------------------------------------------------------------------------- |
Logan | 1dc6314 | 2011-02-25 17:14:51 +0800 | [diff] [blame] | 21 | // Configuration for CodeGen and CompilerRT |
| 22 | //--------------------------------------------------------------------------- |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 23 | |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 24 | #if defined(FORCE_ARM_CODEGEN) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 25 | #define PROVIDE_ARM_CODEGEN 1 |
| 26 | #define DEFAULT_ARM_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 27 | |
Tim Murray | c2074ca | 2014-04-08 15:39:08 -0700 | [diff] [blame] | 28 | #elif defined(FORCE_ARM64_CODEGEN) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 29 | #define PROVIDE_ARM_CODEGEN 1 |
| 30 | #define PROVIDE_ARM64_CODEGEN 1 |
| 31 | #define DEFAULT_ARM64_CODEGEN 1 |
Tim Murray | c2074ca | 2014-04-08 15:39:08 -0700 | [diff] [blame] | 32 | |
Logan Chien | 21392f0 | 2011-11-26 20:32:01 +0800 | [diff] [blame] | 33 | #elif defined(FORCE_MIPS_CODEGEN) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 34 | #define PROVIDE_MIPS_CODEGEN 1 |
| 35 | #define DEFAULT_MIPS_CODEGEN 1 |
Logan Chien | 21392f0 | 2011-11-26 20:32:01 +0800 | [diff] [blame] | 36 | |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 37 | #elif defined(FORCE_MIPS64_CODEGEN) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 38 | #define PROVIDE_MIPS_CODEGEN 1 |
| 39 | #define PROVIDE_MIPS64_CODEGEN 1 |
| 40 | #define DEFAULT_MIPS64_CODEGEN 1 |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 41 | |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 42 | #elif defined(FORCE_X86_CODEGEN) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 43 | #define PROVIDE_X86_CODEGEN 1 |
| 44 | #define DEFAULT_X86_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 45 | |
Stephen Hines | 0467bc4 | 2014-05-05 15:11:12 -0700 | [diff] [blame] | 46 | #elif defined(FORCE_X86_64_CODEGEN) |
| 47 | // There is no separate X86_64 code generation target. It is all part of X86. |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 48 | #define PROVIDE_X86_CODEGEN 1 |
| 49 | #define DEFAULT_X86_64_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 50 | |
| 51 | #else |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 52 | #define PROVIDE_ARM_CODEGEN 1 |
| 53 | #define PROVIDE_ARM64_CODEGEN 1 |
| 54 | #define PROVIDE_MIPS_CODEGEN 1 |
| 55 | #define PROVIDE_MIPS64_CODEGEN 1 |
| 56 | #define PROVIDE_X86_CODEGEN 1 |
| 57 | #define PROVIDE_X86_64_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 58 | |
| 59 | #if defined(__arm__) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 60 | #define DEFAULT_ARM_CODEGEN 1 |
Logan Chien | 867e8dd | 2014-09-03 23:16:11 +0800 | [diff] [blame] | 61 | #elif defined(__aarch64__) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 62 | #define DEFAULT_ARM64_CODEGEN 1 |
Logan Chien | 21392f0 | 2011-11-26 20:32:01 +0800 | [diff] [blame] | 63 | #elif defined(__mips__) |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 64 | #if defined(__LP64__) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 65 | #define DEFAULT_MIPS64_CODEGEN 1 |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 66 | #else |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 67 | #define DEFAULT_MIPS_CODEGEN 1 |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 68 | #endif |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 69 | #elif defined(__i386__) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 70 | #define DEFAULT_X86_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 71 | #elif defined(__x86_64__) |
Victor Khimenko | cd2cedc | 2018-03-21 20:03:32 +0100 | [diff] [blame] | 72 | #define DEFAULT_X86_64_CODEGEN 1 |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 73 | #endif |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 74 | #endif |
| 75 | |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 76 | #define DEFAULT_ARM_TRIPLE_STRING "armv7-none-linux-gnueabi" |
Shih-wei Liao | 99c8a6b | 2012-08-16 01:55:50 -0700 | [diff] [blame] | 77 | #define DEFAULT_THUMB_TRIPLE_STRING "thumbv7-none-linux-gnueabi" |
Tim Murray | c2074ca | 2014-04-08 15:39:08 -0700 | [diff] [blame] | 78 | #define DEFAULT_ARM64_TRIPLE_STRING "aarch64-none-linux-gnueabi" |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 79 | #define DEFAULT_MIPS_TRIPLE_STRING "mipsel-none-linux-gnueabi" |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 80 | #define DEFAULT_MIPS64_TRIPLE_STRING "mips64el-none-linux-gnueabi" |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 81 | #define DEFAULT_X86_TRIPLE_STRING "i686-unknown-linux" |
| 82 | #define DEFAULT_X86_64_TRIPLE_STRING "x86_64-unknown-linux" |
| 83 | |
Yong Chen | f039d98 | 2015-10-21 13:28:09 +0800 | [diff] [blame] | 84 | // Custom DataLayout string for X86 with i64 and f64 set to match the ARM32 |
| 85 | // alignment requirement of 64-bits. |
| 86 | #define X86_CUSTOM_DL_STRING "e-m:e-p:32:32-i64:64-f64:64:64-f80:32-n8:16:32-S128" |
Pirama Arumuga Nainar | d2d5ee3 | 2016-04-12 14:04:50 -0700 | [diff] [blame] | 87 | // Default DataLayout string for X86. Present to detect future LLVM datalayout |
| 88 | // changes so X86_CUSTOM_DL_STRING above can be modified appropriately. |
| 89 | #define X86_DEFAULT_DL_STRING "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" |
Yong Chen | f039d98 | 2015-10-21 13:28:09 +0800 | [diff] [blame] | 90 | |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 91 | #if defined(DEFAULT_ARM_CODEGEN) |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 92 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_ARM_TRIPLE_STRING |
Tim Murray | c2074ca | 2014-04-08 15:39:08 -0700 | [diff] [blame] | 93 | #elif defined(DEFAULT_ARM64_CODEGEN) |
| 94 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_ARM64_TRIPLE_STRING |
Logan Chien | 21392f0 | 2011-11-26 20:32:01 +0800 | [diff] [blame] | 95 | #elif defined(DEFAULT_MIPS_CODEGEN) |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 96 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_MIPS_TRIPLE_STRING |
Dragoslav Sicarov | d5a4204 | 2014-05-22 15:00:18 +0000 | [diff] [blame] | 97 | #elif defined(DEFAULT_MIPS64_CODEGEN) |
| 98 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_MIPS64_TRIPLE_STRING |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 99 | #elif defined(DEFAULT_X86_CODEGEN) |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 100 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_X86_TRIPLE_STRING |
Logan Chien | 3bb7707 | 2011-09-17 16:53:53 +0800 | [diff] [blame] | 101 | #elif defined(DEFAULT_X86_64_CODEGEN) |
Zonr Chang | f74ee19 | 2012-04-12 15:34:58 +0800 | [diff] [blame] | 102 | #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_X86_64_TRIPLE_STRING |
Logan | 3584900 | 2011-01-15 07:30:43 +0800 | [diff] [blame] | 103 | #endif |
| 104 | |
| 105 | #if (defined(__VFP_FP__) && !defined(__SOFTFP__)) |
| 106 | #define ARM_USE_VFP |
| 107 | #endif |
| 108 | |
| 109 | //--------------------------------------------------------------------------- |
| 110 | |
Zonr Chang | c72c4dd | 2012-04-12 15:38:53 +0800 | [diff] [blame] | 111 | #endif // BCC_CONFIG_CONFIG_H |