jdk/make/common/internal/NativeCompileRules.gmk

#
# Copyright 1995-2007 Sun Microsystems, Inc.  All Rights Reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation.  Sun designates this
# particular file as subject to the "Classpath" exception as provided
# by Sun in the LICENSE file that accompanied this code.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
# CA 95054 USA or visit www.sun.com if you need additional information or
# have any questions.
#

#
# Native C/C++ Compile Rules
#

#
# INCREMENTAL_BUILD: Record the #include file dependencies.
#
# NOTE: We build make include files with the suffix
#       $(DEPEND_SUFFIX) on every compilation. These are initially 
#       created as temp files just in case a ^C kills it in the middle.
#	Compiler is smart enough to handle ^C and not create the .o file, or
#	is supposed to be that smart, but the .$(DEPEND_SUFFIX) file 
#       creation here isn't.
#	These .$(DEPEND_SUFFIX) files are included by Library.gmk and 
#       Program.gmk, when they exist (Search for 'make dependencies').
#

ifeq ($(INCREMENTAL_BUILD),true)

$(OBJDIR)/%.$(DEPEND_SUFFIX): %.c
	@$(prep-target)
	@$(ECHO) "Creating $@"
	@$(RM) $@.temp
	@$(CC) $(CC_DEPEND) $(CPPFLAGS) $< 2> $(DEV_NULL) | \
	    $(CC_DEPEND_FILTER) > $@.temp
	@$(MV) $@.temp $@

$(OBJDIR)/%.$(DEPEND_SUFFIX): %.cpp
	@$(prep-target)
	@$(ECHO) "Creating $@"
	@$(RM) $@.temp
	@$(CXX) $(CC_DEPEND) $(CPPFLAGS) $(CXXFLAGS) $< 2> $(DEV_NULL) | \
	    $(CC_DEPEND_FILTER) > $@.temp
	@$(MV) $@.temp $@

endif # INCREMENTAL_BUILD

#
# C, C++, asm files.
#
# Normal or parallel compile rule is the same, but batch compiles require
#  we save up the sources files that use the same compile line so that we
#  can do one compile line.
#

ifneq ($(COMPILE_APPROACH), batch)

$(OBJDIR)/%.$(OBJECT_SUFFIX): %.c
	@$(prep-target)
	$(COMPILE.c) $(CC_OBJECT_OUTPUT_FLAG)$@ $(CFLAGS_GPROF) $<
	@$(check-conventions)

$(OBJDIR)/%.$(OBJECT_SUFFIX): %.cpp
	@$(prep-target)
	$(COMPILE.cc) $(CC_OBJECT_OUTPUT_FLAG)$@ $(CFLAGS_GPROF) $<
	@$(check-conventions)

else
  
  #
  # Batch compiling might be faster if the compiler was smart about recognizing
  #   optimization opportunities available when all files are being compiled
  #   the same way. Unfortunately this is rare.
  #   Automatic pre-compiled headers (pch) might be a possibility so we
  #   add any auto pch options here.
  # So we save all the source files that have the same compile line as the
  #   first file. A normal compile pass is made after the batch compile
  #   to catch anything missed.
  # If the compilers had a -o option that allowed us to direct where to
  #   write the object files to, then we would not need to save the object
  #   file list or move them from the make directory to the build directory.
  #

  # Source names
  COMPILE_LIST.c         = $(OBJDIR)/.source_names_c
  COMPILE_LIST.cpp       = $(OBJDIR)/.source_names_cpp

  # Object file list
  COMPILE_OBJ_LIST.c     = $(OBJDIR)/.obj_names_c
  COMPILE_OBJ_LIST.cpp   = $(OBJDIR)/.obj_names_cpp
  
  # The compile line
  COMPILE_BATCH.c        = $(OBJDIR)/.compile_c
  COMPILE_BATCH.cpp      = $(OBJDIR)/.compile_cpp

  # The compile line for the current target
  THIS_COMPILE_BATCH.c   = $(COMPILE_BATCH.c)-$(@F)
  THIS_COMPILE_BATCH.cpp = $(COMPILE_BATCH.cpp)-$(@F)

$(OBJDIR)/%.$(OBJECT_SUFFIX): %.c
	@$(prep-target)
	@$(ECHO) "$(COMPILE.c) $(CFLAGS_GPROF)" > $(THIS_COMPILE_BATCH.c)
	@if [ ! -s $(COMPILE_BATCH.c) ] ; then \
	  $(CP) $(THIS_COMPILE_BATCH.c) $(COMPILE_BATCH.c) ; \
	  $(ECHO) $< > $(COMPILE_LIST.c); \
	  $(ECHO) $(@F) > $(COMPILE_OBJ_LIST.c); \
	elif [ "`$(DIFF) -w -b $(THIS_COMPILE_BATCH.c) $(COMPILE_BATCH.c)`" \
	       = "" ] ; then \
	  $(ECHO) $< >> $(COMPILE_LIST.c); \
	  $(ECHO) $(@F) >> $(COMPILE_OBJ_LIST.c); \
	fi
	@$(RM) $(THIS_COMPILE_BATCH.c)
	@$(check-conventions)

$(OBJDIR)/%.$(OBJECT_SUFFIX): %.cpp
	@$(prep-target)
	@$(ECHO) "$(COMPILE.cpp) $(CFLAGS_GPROF)" > $(THIS_COMPILE_BATCH.cpp)
	@if [ ! -s $(COMPILE_BATCH.cpp) ] ; then \
	  $(CP) $(THIS_COMPILE_BATCH.cpp) $(COMPILE_BATCH.cpp) ; \
	  $(ECHO) $< > $(COMPILE_LIST.cpp); \
	  $(ECHO) $(@F) > $(COMPILE_OBJ_LIST.cpp); \
	elif [ "`$(DIFF) -w -b $(THIS_COMPILE_BATCH.cpp) $(COMPILE_BATCH.cpp)`"\
	       = "" ] ; then \
	  $(ECHO) $< >> $(COMPILE_LIST.cpp); \
	  $(ECHO) $(@F) >> $(COMPILE_OBJ_LIST.cpp); \
	fi
	@$(RM) $(THIS_COMPILE_BATCH.cpp)
	@$(check-conventions)

batch_compile: $(FILES_o)
	@$(ECHO) "Doing batch compilations"
	@if [ -s $(COMPILE_LIST.c) ] ; then \
	  $(ECHO) "$(COMPILE.c) $(CFLAGS_GPROF) $(AUTOMATIC_PCH_OPTION) \
	   `$(CAT) $(COMPILE_LIST.c)`" ; \
	  ( $(COMPILE.c) $(CFLAGS_GPROF) $(AUTOMATIC_PCH_OPTION) \
	    `$(CAT) $(COMPILE_LIST.c)` && \
	    $(ECHO) "$(MV) `$(CAT) $(COMPILE_OBJ_LIST.c)` $(OBJDIR)" && \
	    $(MV) `$(CAT) $(COMPILE_OBJ_LIST.c)` $(OBJDIR) ) || exit 1 ; \
	fi
	@if [ -s $(COMPILE_LIST.cpp) ] ; then \
	  $(ECHO) "$(COMPILE.cpp) $(CFLAGS_GPROF) $(AUTOMATIC_PCH_OPTION) \
	   `$(CAT) $(COMPILE_LIST.cpp)`" ; \
	  ( $(COMPILE.cpp) $(CFLAGS_GPROF) $(AUTOMATIC_PCH_OPTION) \
	    `$(CAT) $(COMPILE_LIST.cpp)` && \
	    $(ECHO) "$(MV) `$(CAT) $(COMPILE_OBJ_LIST.cpp)` $(OBJDIR)" && \
	    $(MV) `$(CAT) $(COMPILE_OBJ_LIST.cpp)` $(OBJDIR) ) || exit 1 ; \
	fi
	@$(RM) $(COMPILE_BATCH.c)   $(COMPILE_LIST.c)   $(COMPILE_OBJ_LIST.c)
	@$(RM) $(COMPILE_BATCH.cpp) $(COMPILE_LIST.cpp) $(COMPILE_OBJ_LIST.cpp)

endif

# newer as does not handle c++ style comments
$(OBJDIR)/%.$(OBJECT_SUFFIX): %.s
    ifneq ($(CC_VERSION), gcc)
	@$(prep-target)
	$(COMPILE.s) $(CC_OBJECT_OUTPUT_FLAG)$@ $<
    else
	@$(prep-target)
	$(CPP) -x assembler-with-cpp $< | $(COMPILE.s) -o $@
    endif
	@$(check-conventions)

#
# Quick hack for making the compiler generate just the assembly file.
#	$ gnumake obj/sparc/myfile.s
#
$(OBJDIR)/%.s: %.c
	@$(prep-target)
	$(COMPILE.c) $(CC_OBJECT_OUTPUT_FLAG)$@ -S $<
	@$(check-conventions)

# remove the intermediate files from the directories.
#    (If VARIANT=OPT, this removes all debug and fastdebug files too)
clobber clean::
	$(RM) -r $(OBJDIR)
	$(RM) -r $(OBJDIR)_*

#
# Lint support
# (The 'lint' rule below is an older rule not using the .$(LINT_SUFFIX) files)
#

ifeq ($(PLATFORM), solaris)
$(OBJDIR)/%.$(LINT_SUFFIX): %.c
	@$(prep-target)
	$(LINT.c) -dirout=$(OBJDIR) -c $<
lint.clean:
	$(RM) $(OBJDIR)/*.$(LINT_SUFFIX)
# Old rule
lint: $(FILES_c)
        ifneq ($(FILES_c),)
	  $(LINT.c) -Ncheck -Nlevel=3 $? $(LDLIBS) > lint.$(ARCH) 2>&1
        endif
endif

.PHONY: batch_compile