J. Duke | 319a3b9 | 2007-12-01 00:00:00 +0000 | [diff] [blame^] | 1 | ! Copyright 2003 Sun Microsystems, Inc. All Rights Reserved. |
| 2 | ! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 3 | ! |
| 4 | ! This code is free software; you can redistribute it and/or modify it |
| 5 | ! under the terms of the GNU General Public License version 2 only, as |
| 6 | ! published by the Free Software Foundation. Sun designates this |
| 7 | ! particular file as subject to the "Classpath" exception as provided |
| 8 | ! by Sun in the LICENSE file that accompanied this code. |
| 9 | ! |
| 10 | ! This code is distributed in the hope that it will be useful, but WITHOUT |
| 11 | ! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | ! FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 13 | ! version 2 for more details (a copy is included in the LICENSE file that |
| 14 | ! accompanied this code). |
| 15 | ! |
| 16 | ! You should have received a copy of the GNU General Public License version |
| 17 | ! 2 along with this work; if not, write to the Free Software Foundation, |
| 18 | ! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| 19 | ! |
| 20 | ! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 21 | ! CA 95054 USA or visit www.sun.com if you need additional information or |
| 22 | ! have any questions. |
| 23 | ! |
| 24 | ! This file contains inline procedures for VIS instructions in 32-bit mode. |
| 25 | ! |
| 26 | !-------------------------------------------------------------------- |
| 27 | ! Pure edge handling instructions |
| 28 | ! |
| 29 | ! int vis_edge8(void */*frs1*/, void */*frs2*/); |
| 30 | ! |
| 31 | .inline vis_edge8,8 |
| 32 | edge8 %o0,%o1,%o0 |
| 33 | .end |
| 34 | ! |
| 35 | ! int vis_edge8l(void */*frs1*/, void */*frs2*/); |
| 36 | ! |
| 37 | .inline vis_edge8l,8 |
| 38 | edge8l %o0,%o1,%o0 |
| 39 | .end |
| 40 | ! |
| 41 | ! int vis_edge16(void */*frs1*/, void */*frs2*/); |
| 42 | ! |
| 43 | .inline vis_edge16,8 |
| 44 | edge16 %o0,%o1,%o0 |
| 45 | .end |
| 46 | ! |
| 47 | ! int vis_edge16l(void */*frs1*/, void */*frs2*/); |
| 48 | ! |
| 49 | .inline vis_edge16l,8 |
| 50 | edge16l %o0,%o1,%o0 |
| 51 | .end |
| 52 | ! |
| 53 | ! int vis_edge32(void */*frs1*/, void */*frs2*/); |
| 54 | ! |
| 55 | .inline vis_edge32,8 |
| 56 | edge32 %o0,%o1,%o0 |
| 57 | .end |
| 58 | ! |
| 59 | ! int vis_edge32l(void */*frs1*/, void */*frs2*/); |
| 60 | ! |
| 61 | .inline vis_edge32l,8 |
| 62 | edge32l %o0,%o1,%o0 |
| 63 | .end |
| 64 | |
| 65 | !-------------------------------------------------------------------- |
| 66 | ! Edge handling instructions with negative return values if cc set |
| 67 | ! |
| 68 | ! int vis_edge8cc(void */*frs1*/, void */*frs2*/); |
| 69 | ! |
| 70 | .inline vis_edge8cc,8 |
| 71 | edge8 %o0,%o1,%o0 |
| 72 | mov 0,%o1 |
| 73 | movgu %icc,-1024,%o1 |
| 74 | or %o1,%o0,%o0 |
| 75 | .end |
| 76 | ! |
| 77 | ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/); |
| 78 | ! |
| 79 | .inline vis_edge8lcc,8 |
| 80 | edge8l %o0,%o1,%o0 |
| 81 | mov 0,%o1 |
| 82 | movgu %icc,-1024,%o1 |
| 83 | or %o1,%o0,%o0 |
| 84 | .end |
| 85 | ! |
| 86 | ! int vis_edge16cc(void */*frs1*/, void */*frs2*/); |
| 87 | ! |
| 88 | .inline vis_edge16cc,8 |
| 89 | edge16 %o0,%o1,%o0 |
| 90 | mov 0,%o1 |
| 91 | movgu %icc,-1024,%o1 |
| 92 | or %o1,%o0,%o0 |
| 93 | .end |
| 94 | ! |
| 95 | ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/); |
| 96 | ! |
| 97 | .inline vis_edge16lcc,8 |
| 98 | edge16l %o0,%o1,%o0 |
| 99 | mov 0,%o1 |
| 100 | movgu %icc,-1024,%o1 |
| 101 | or %o1,%o0,%o0 |
| 102 | .end |
| 103 | ! |
| 104 | ! int vis_edge32cc(void */*frs1*/, void */*frs2*/); |
| 105 | ! |
| 106 | .inline vis_edge32cc,8 |
| 107 | edge32 %o0,%o1,%o0 |
| 108 | mov 0,%o1 |
| 109 | movgu %icc,-1024,%o1 |
| 110 | or %o1,%o0,%o0 |
| 111 | .end |
| 112 | ! |
| 113 | ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/); |
| 114 | ! |
| 115 | .inline vis_edge32lcc,8 |
| 116 | edge32l %o0,%o1,%o0 |
| 117 | mov 0,%o1 |
| 118 | movgu %icc,-1024,%o1 |
| 119 | or %o1,%o0,%o0 |
| 120 | .end |
| 121 | |
| 122 | !-------------------------------------------------------------------- |
| 123 | ! Alignment instructions |
| 124 | ! |
| 125 | ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/); |
| 126 | ! |
| 127 | .inline vis_alignaddr,8 |
| 128 | alignaddr %o0,%o1,%o0 |
| 129 | .end |
| 130 | ! |
| 131 | ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/); |
| 132 | ! |
| 133 | .inline vis_alignaddrl,8 |
| 134 | alignaddrl %o0,%o1,%o0 |
| 135 | .end |
| 136 | ! |
| 137 | ! double vis_faligndata(double /*frs1*/, double /*frs2*/); |
| 138 | ! |
| 139 | .inline vis_faligndata,16 |
| 140 | std %o0,[%sp+0x48] |
| 141 | ldd [%sp+0x48],%f4 |
| 142 | std %o2,[%sp+0x48] |
| 143 | ldd [%sp+0x48],%f10 |
| 144 | faligndata %f4,%f10,%f0 |
| 145 | .end |
| 146 | |
| 147 | !-------------------------------------------------------------------- |
| 148 | ! Partitioned comparison instructions |
| 149 | ! |
| 150 | ! int vis_fcmple16(double /*frs1*/, double /*frs2*/); |
| 151 | ! |
| 152 | .inline vis_fcmple16,16 |
| 153 | std %o0,[%sp+0x48] |
| 154 | ldd [%sp+0x48],%f4 |
| 155 | std %o2,[%sp+0x48] |
| 156 | ldd [%sp+0x48],%f10 |
| 157 | fcmple16 %f4,%f10,%o0 |
| 158 | .end |
| 159 | ! |
| 160 | ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/); |
| 161 | ! |
| 162 | .inline vis_fcmpne16,16 |
| 163 | std %o0,[%sp+0x48] |
| 164 | ldd [%sp+0x48],%f4 |
| 165 | std %o2,[%sp+0x48] |
| 166 | ldd [%sp+0x48],%f10 |
| 167 | fcmpne16 %f4,%f10,%o0 |
| 168 | .end |
| 169 | ! |
| 170 | ! int vis_fcmple32(double /*frs1*/, double /*frs2*/); |
| 171 | ! |
| 172 | .inline vis_fcmple32,16 |
| 173 | std %o0,[%sp+0x48] |
| 174 | ldd [%sp+0x48],%f4 |
| 175 | std %o2,[%sp+0x48] |
| 176 | ldd [%sp+0x48],%f10 |
| 177 | fcmple32 %f4,%f10,%o0 |
| 178 | .end |
| 179 | ! |
| 180 | ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/); |
| 181 | ! |
| 182 | .inline vis_fcmpne32,16 |
| 183 | std %o0,[%sp+0x48] |
| 184 | ldd [%sp+0x48],%f4 |
| 185 | std %o2,[%sp+0x48] |
| 186 | ldd [%sp+0x48],%f10 |
| 187 | fcmpne32 %f4,%f10,%o0 |
| 188 | .end |
| 189 | ! |
| 190 | ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/); |
| 191 | ! |
| 192 | .inline vis_fcmpgt16,16 |
| 193 | std %o0,[%sp+0x48] |
| 194 | ldd [%sp+0x48],%f4 |
| 195 | std %o2,[%sp+0x48] |
| 196 | ldd [%sp+0x48],%f10 |
| 197 | fcmpgt16 %f4,%f10,%o0 |
| 198 | .end |
| 199 | ! |
| 200 | ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/); |
| 201 | ! |
| 202 | .inline vis_fcmpeq16,16 |
| 203 | std %o0,[%sp+0x48] |
| 204 | ldd [%sp+0x48],%f4 |
| 205 | std %o2,[%sp+0x48] |
| 206 | ldd [%sp+0x48],%f10 |
| 207 | fcmpeq16 %f4,%f10,%o0 |
| 208 | .end |
| 209 | ! |
| 210 | ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/); |
| 211 | ! |
| 212 | .inline vis_fcmpgt32,16 |
| 213 | std %o0,[%sp+0x48] |
| 214 | ldd [%sp+0x48],%f4 |
| 215 | std %o2,[%sp+0x48] |
| 216 | ldd [%sp+0x48],%f10 |
| 217 | fcmpgt32 %f4,%f10,%o0 |
| 218 | .end |
| 219 | ! |
| 220 | ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/); |
| 221 | ! |
| 222 | .inline vis_fcmpeq32,16 |
| 223 | std %o0,[%sp+0x48] |
| 224 | ldd [%sp+0x48],%f4 |
| 225 | std %o2,[%sp+0x48] |
| 226 | ldd [%sp+0x48],%f10 |
| 227 | fcmpeq32 %f4,%f10,%o0 |
| 228 | .end |
| 229 | |
| 230 | !-------------------------------------------------------------------- |
| 231 | ! Partitioned arithmetic |
| 232 | ! |
| 233 | ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/); |
| 234 | ! |
| 235 | .inline vis_fmul8x16,12 |
| 236 | st %o0,[%sp+0x44] |
| 237 | ld [%sp+0x44],%f4 |
| 238 | st %o1,[%sp+0x48] |
| 239 | st %o2,[%sp+0x4c] |
| 240 | ldd [%sp+0x48],%f10 |
| 241 | fmul8x16 %f4,%f10,%f0 |
| 242 | .end |
| 243 | ! |
| 244 | ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/); |
| 245 | ! |
| 246 | .inline vis_fmul8x16_dummy,16 |
| 247 | st %o0,[%sp+0x44] |
| 248 | ld [%sp+0x44],%f4 |
| 249 | std %o2,[%sp+0x48] |
| 250 | ldd [%sp+0x48],%f10 |
| 251 | fmul8x16 %f4,%f10,%f0 |
| 252 | .end |
| 253 | ! |
| 254 | ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/); |
| 255 | ! |
| 256 | .inline vis_fmul8x16au,8 |
| 257 | st %o0,[%sp+0x48] |
| 258 | ld [%sp+0x48],%f4 |
| 259 | st %o1,[%sp+0x48] |
| 260 | ld [%sp+0x48],%f10 |
| 261 | fmul8x16au %f4,%f10,%f0 |
| 262 | .end |
| 263 | ! |
| 264 | ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/); |
| 265 | ! |
| 266 | .inline vis_fmul8x16al,8 |
| 267 | st %o0,[%sp+0x44] |
| 268 | ld [%sp+0x44],%f4 |
| 269 | st %o1,[%sp+0x48] |
| 270 | ld [%sp+0x48],%f10 |
| 271 | fmul8x16al %f4,%f10,%f0 |
| 272 | .end |
| 273 | ! |
| 274 | ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/); |
| 275 | ! |
| 276 | .inline vis_fmul8sux16,16 |
| 277 | std %o0,[%sp+0x48] |
| 278 | ldd [%sp+0x48],%f4 |
| 279 | std %o2,[%sp+0x48] |
| 280 | ldd [%sp+0x48],%f10 |
| 281 | fmul8sux16 %f4,%f10,%f0 |
| 282 | .end |
| 283 | ! |
| 284 | ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/); |
| 285 | ! |
| 286 | .inline vis_fmul8ulx16,16 |
| 287 | std %o0,[%sp+0x48] |
| 288 | ldd [%sp+0x48],%f4 |
| 289 | std %o2,[%sp+0x48] |
| 290 | ldd [%sp+0x48],%f10 |
| 291 | fmul8ulx16 %f4,%f10,%f0 |
| 292 | .end |
| 293 | ! |
| 294 | ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/); |
| 295 | ! |
| 296 | .inline vis_fmuld8sux16,8 |
| 297 | st %o0,[%sp+0x48] |
| 298 | ld [%sp+0x48],%f4 |
| 299 | st %o1,[%sp+0x48] |
| 300 | ld [%sp+0x48],%f10 |
| 301 | fmuld8sux16 %f4,%f10,%f0 |
| 302 | .end |
| 303 | ! |
| 304 | ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/); |
| 305 | ! |
| 306 | .inline vis_fmuld8ulx16,8 |
| 307 | st %o0,[%sp+0x48] |
| 308 | ld [%sp+0x48],%f4 |
| 309 | st %o1,[%sp+0x48] |
| 310 | ld [%sp+0x48],%f10 |
| 311 | fmuld8ulx16 %f4,%f10,%f0 |
| 312 | .end |
| 313 | ! |
| 314 | ! double vis_fpadd16(double /*frs1*/, double /*frs2*/); |
| 315 | ! |
| 316 | .inline vis_fpadd16,16 |
| 317 | std %o0,[%sp+0x40] |
| 318 | ldd [%sp+0x40],%f4 |
| 319 | std %o2,[%sp+0x48] |
| 320 | ldd [%sp+0x48],%f10 |
| 321 | fpadd16 %f4,%f10,%f0 |
| 322 | .end |
| 323 | ! |
| 324 | ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/); |
| 325 | ! |
| 326 | .inline vis_fpadd16s,8 |
| 327 | st %o0,[%sp+0x48] |
| 328 | ld [%sp+0x48],%f4 |
| 329 | st %o1,[%sp+0x48] |
| 330 | ld [%sp+0x48],%f10 |
| 331 | fpadd16s %f4,%f10,%f0 |
| 332 | .end |
| 333 | ! |
| 334 | ! double vis_fpadd32(double /*frs1*/, double /*frs2*/); |
| 335 | ! |
| 336 | .inline vis_fpadd32,16 |
| 337 | std %o0,[%sp+0x48] |
| 338 | ldd [%sp+0x48],%f4 |
| 339 | std %o2,[%sp+0x48] |
| 340 | ldd [%sp+0x48],%f10 |
| 341 | fpadd32 %f4,%f10,%f0 |
| 342 | .end |
| 343 | ! |
| 344 | ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/); |
| 345 | ! |
| 346 | .inline vis_fpadd32s,8 |
| 347 | st %o0,[%sp+0x48] |
| 348 | ld [%sp+0x48],%f4 |
| 349 | st %o1,[%sp+0x48] |
| 350 | ld [%sp+0x48],%f10 |
| 351 | fpadd32s %f4,%f10,%f0 |
| 352 | .end |
| 353 | ! |
| 354 | ! double vis_fpsub16(double /*frs1*/, double /*frs2*/); |
| 355 | ! |
| 356 | .inline vis_fpsub16,16 |
| 357 | std %o0,[%sp+0x48] |
| 358 | ldd [%sp+0x48],%f4 |
| 359 | std %o2,[%sp+0x48] |
| 360 | ldd [%sp+0x48],%f10 |
| 361 | fpsub16 %f4,%f10,%f0 |
| 362 | .end |
| 363 | ! |
| 364 | ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/); |
| 365 | ! |
| 366 | .inline vis_fpsub16s,8 |
| 367 | st %o0,[%sp+0x48] |
| 368 | ld [%sp+0x48],%f4 |
| 369 | st %o1,[%sp+0x48] |
| 370 | ld [%sp+0x48],%f10 |
| 371 | fpsub16s %f4,%f10,%f0 |
| 372 | .end |
| 373 | ! |
| 374 | ! double vis_fpsub32(double /*frs1*/, double /*frs2*/); |
| 375 | ! |
| 376 | .inline vis_fpsub32,16 |
| 377 | std %o0,[%sp+0x48] |
| 378 | ldd [%sp+0x48],%f4 |
| 379 | std %o2,[%sp+0x48] |
| 380 | ldd [%sp+0x48],%f10 |
| 381 | fpsub32 %f4,%f10,%f0 |
| 382 | .end |
| 383 | ! |
| 384 | ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/); |
| 385 | ! |
| 386 | .inline vis_fpsub32s,8 |
| 387 | st %o0,[%sp+0x48] |
| 388 | ld [%sp+0x48],%f4 |
| 389 | st %o1,[%sp+0x48] |
| 390 | ld [%sp+0x48],%f10 |
| 391 | fpsub32s %f4,%f10,%f0 |
| 392 | .end |
| 393 | |
| 394 | !-------------------------------------------------------------------- |
| 395 | ! Pixel packing |
| 396 | ! |
| 397 | ! float vis_fpack16(double /*frs2*/); |
| 398 | ! |
| 399 | .inline vis_fpack16,8 |
| 400 | std %o0,[%sp+0x48] |
| 401 | ldd [%sp+0x48],%f4 |
| 402 | fpack16 %f4,%f0 |
| 403 | .end |
| 404 | ! |
| 405 | ! double vis_fpack32(double /*frs1*/, double /*frs2*/); |
| 406 | ! |
| 407 | .inline vis_fpack32,16 |
| 408 | std %o0,[%sp+0x48] |
| 409 | ldd [%sp+0x48],%f4 |
| 410 | std %o2,[%sp+0x48] |
| 411 | ldd [%sp+0x48],%f10 |
| 412 | fpack32 %f4,%f10,%f0 |
| 413 | .end |
| 414 | ! |
| 415 | ! float vis_fpackfix(double /*frs2*/); |
| 416 | ! |
| 417 | .inline vis_fpackfix,8 |
| 418 | std %o0,[%sp+0x48] |
| 419 | ldd [%sp+0x48],%f4 |
| 420 | fpackfix %f4,%f0 |
| 421 | .end |
| 422 | ! |
| 423 | ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/); |
| 424 | ! |
| 425 | .inline vis_fpack16_pair,16 |
| 426 | std %o0,[%sp+0x48] |
| 427 | ldd [%sp+0x48],%f4 |
| 428 | std %o2,[%sp+0x48] |
| 429 | ldd [%sp+0x48],%f10 |
| 430 | fpack16 %f4,%f0 |
| 431 | fpack16 %f10,%f1 |
| 432 | .end |
| 433 | ! |
| 434 | ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/); |
| 435 | ! |
| 436 | .inline vis_fpackfix_pair,16 |
| 437 | std %o0,[%sp+0x48] |
| 438 | ldd [%sp+0x48],%f4 |
| 439 | std %o2,[%sp+0x48] |
| 440 | ldd [%sp+0x48],%f6 |
| 441 | fpackfix %f4,%f0 |
| 442 | fpackfix %f6,%f1 |
| 443 | .end |
| 444 | ! |
| 445 | ! void vis_st2_fpack16(double, double, double *); |
| 446 | ! |
| 447 | .inline vis_st2_fpack16,20 |
| 448 | std %o0,[%sp+0x48] |
| 449 | ldd [%sp+0x48],%f4 |
| 450 | std %o2,[%sp+0x48] |
| 451 | ldd [%sp+0x48],%f10 |
| 452 | fpack16 %f4,%f0 |
| 453 | fpack16 %f10,%f1 |
| 454 | st %f0,[%o4+0] |
| 455 | st %f1,[%o4+4] |
| 456 | .end |
| 457 | ! |
| 458 | ! void vis_std_fpack16(double, double, double *); |
| 459 | ! |
| 460 | .inline vis_std_fpack16,20 |
| 461 | std %o0,[%sp+0x48] |
| 462 | ldd [%sp+0x48],%f4 |
| 463 | std %o2,[%sp+0x48] |
| 464 | ldd [%sp+0x48],%f10 |
| 465 | fpack16 %f4,%f0 |
| 466 | fpack16 %f10,%f1 |
| 467 | std %f0,[%o4] |
| 468 | .end |
| 469 | ! |
| 470 | ! void vis_st2_fpackfix(double, double, double *); |
| 471 | ! |
| 472 | .inline vis_st2_fpackfix,20 |
| 473 | std %o0,[%sp+0x48] |
| 474 | ldd [%sp+0x48],%f4 |
| 475 | std %o2,[%sp+0x48] |
| 476 | ldd [%sp+0x48],%f10 |
| 477 | fpackfix %f4,%f0 |
| 478 | fpackfix %f10,%f1 |
| 479 | st %f0,[%o4+0] |
| 480 | st %f1,[%o4+4] |
| 481 | .end |
| 482 | ! |
| 483 | ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/); |
| 484 | ! |
| 485 | .inline vis_fpack16_to_hi,16 |
| 486 | std %o0,[%sp+0x48] |
| 487 | ldd [%sp+0x48],%f0 |
| 488 | std %o2,[%sp+0x48] |
| 489 | ldd [%sp+0x48],%f4 |
| 490 | fpack16 %f4,%f0 |
| 491 | .end |
| 492 | ! |
| 493 | ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/); |
| 494 | ! |
| 495 | .inline vis_fpack16_to_lo,16 |
| 496 | std %o0,[%sp+0x48] |
| 497 | ldd [%sp+0x48],%f0 |
| 498 | std %o2,[%sp+0x48] |
| 499 | ldd [%sp+0x48],%f4 |
| 500 | fpack16 %f4,%f3 |
| 501 | fmovs %f3,%f1 /* without this, optimizer goes wrong */ |
| 502 | .end |
| 503 | |
| 504 | !-------------------------------------------------------------------- |
| 505 | ! Motion estimation |
| 506 | ! |
| 507 | ! double vis_pdist(double /*frs1*/, double /*frs2*/, double /*frd*/); |
| 508 | ! |
| 509 | .inline vis_pdist,24 |
| 510 | std %o4,[%sp+0x48] |
| 511 | ldd [%sp+0x48],%f0 |
| 512 | std %o0,[%sp+0x48] |
| 513 | ldd [%sp+0x48],%f4 |
| 514 | std %o2,[%sp+0x48] |
| 515 | ldd [%sp+0x48],%f10 |
| 516 | pdist %f4,%f10,%f0 |
| 517 | .end |
| 518 | |
| 519 | !-------------------------------------------------------------------- |
| 520 | ! Channel merging |
| 521 | ! |
| 522 | ! double vis_fpmerge(float /*frs1*/, float /*frs2*/); |
| 523 | ! |
| 524 | .inline vis_fpmerge,8 |
| 525 | st %o0,[%sp+0x48] |
| 526 | ld [%sp+0x48],%f4 |
| 527 | st %o1,[%sp+0x48] |
| 528 | ld [%sp+0x48],%f10 |
| 529 | fpmerge %f4,%f10,%f0 |
| 530 | .end |
| 531 | |
| 532 | !-------------------------------------------------------------------- |
| 533 | ! Pixel expansion |
| 534 | ! |
| 535 | ! double vis_fexpand(float /*frs2*/); |
| 536 | ! |
| 537 | .inline vis_fexpand,4 |
| 538 | st %o0,[%sp+0x48] |
| 539 | ld [%sp+0x48],%f4 |
| 540 | fexpand %f4,%f0 |
| 541 | .end |
| 542 | ! |
| 543 | ! double vis_fexpand_hi(double /*frs2*/); |
| 544 | ! |
| 545 | .inline vis_fexpand_hi,8 |
| 546 | std %o0,[%sp+0x48] |
| 547 | ldd [%sp+0x48],%f4 |
| 548 | fexpand %f4,%f0 |
| 549 | .end |
| 550 | ! |
| 551 | ! double vis_fexpand_lo(double /*frs2*/); |
| 552 | ! |
| 553 | .inline vis_fexpand_lo,8 |
| 554 | std %o0,[%sp+0x48] |
| 555 | ldd [%sp+0x48],%f4 |
| 556 | fmovs %f5, %f2 |
| 557 | fexpand %f2,%f0 |
| 558 | .end |
| 559 | |
| 560 | !-------------------------------------------------------------------- |
| 561 | ! Bitwise logical operations |
| 562 | ! |
| 563 | ! double vis_fnor(double /*frs1*/, double /*frs2*/); |
| 564 | ! |
| 565 | .inline vis_fnor,16 |
| 566 | std %o0,[%sp+0x48] |
| 567 | ldd [%sp+0x48],%f4 |
| 568 | std %o2,[%sp+0x48] |
| 569 | ldd [%sp+0x48],%f10 |
| 570 | fnor %f4,%f10,%f0 |
| 571 | .end |
| 572 | ! |
| 573 | ! float vis_fnors(float /*frs1*/, float /*frs2*/); |
| 574 | ! |
| 575 | .inline vis_fnors,8 |
| 576 | st %o0,[%sp+0x48] |
| 577 | ld [%sp+0x48],%f4 |
| 578 | st %o1,[%sp+0x48] |
| 579 | ld [%sp+0x48],%f10 |
| 580 | fnors %f4,%f10,%f0 |
| 581 | .end |
| 582 | ! |
| 583 | ! double vis_fandnot(double /*frs1*/, double /*frs2*/); |
| 584 | ! |
| 585 | .inline vis_fandnot,16 |
| 586 | std %o0,[%sp+0x48] |
| 587 | ldd [%sp+0x48],%f4 |
| 588 | std %o2,[%sp+0x48] |
| 589 | ldd [%sp+0x48],%f10 |
| 590 | fandnot1 %f4,%f10,%f0 |
| 591 | .end |
| 592 | ! |
| 593 | ! float vis_fandnots(float /*frs1*/, float /*frs2*/); |
| 594 | ! |
| 595 | .inline vis_fandnots,8 |
| 596 | st %o0,[%sp+0x48] |
| 597 | ld [%sp+0x48],%f4 |
| 598 | st %o1,[%sp+0x48] |
| 599 | ld [%sp+0x48],%f10 |
| 600 | fandnot1s %f4,%f10,%f0 |
| 601 | .end |
| 602 | ! |
| 603 | ! double vis_fnot(double /*frs1*/); |
| 604 | ! |
| 605 | .inline vis_fnot,8 |
| 606 | std %o0,[%sp+0x48] |
| 607 | ldd [%sp+0x48],%f4 |
| 608 | fnot1 %f4,%f0 |
| 609 | .end |
| 610 | ! |
| 611 | ! float vis_fnots(float /*frs1*/); |
| 612 | ! |
| 613 | .inline vis_fnots,4 |
| 614 | st %o0,[%sp+0x48] |
| 615 | ld [%sp+0x48],%f4 |
| 616 | fnot1s %f4,%f0 |
| 617 | .end |
| 618 | ! |
| 619 | ! double vis_fxor(double /*frs1*/, double /*frs2*/); |
| 620 | ! |
| 621 | .inline vis_fxor,16 |
| 622 | std %o0,[%sp+0x48] |
| 623 | ldd [%sp+0x48],%f4 |
| 624 | std %o2,[%sp+0x48] |
| 625 | ldd [%sp+0x48],%f10 |
| 626 | fxor %f4,%f10,%f0 |
| 627 | .end |
| 628 | ! |
| 629 | ! float vis_fxors(float /*frs1*/, float /*frs2*/); |
| 630 | ! |
| 631 | .inline vis_fxors,8 |
| 632 | st %o0,[%sp+0x48] |
| 633 | ld [%sp+0x48],%f4 |
| 634 | st %o1,[%sp+0x48] |
| 635 | ld [%sp+0x48],%f10 |
| 636 | fxors %f4,%f10,%f0 |
| 637 | .end |
| 638 | ! |
| 639 | ! double vis_fnand(double /*frs1*/, double /*frs2*/); |
| 640 | ! |
| 641 | .inline vis_fnand,16 |
| 642 | std %o0,[%sp+0x48] |
| 643 | ldd [%sp+0x48],%f4 |
| 644 | std %o2,[%sp+0x48] |
| 645 | ldd [%sp+0x48],%f10 |
| 646 | fnand %f4,%f10,%f0 |
| 647 | .end |
| 648 | ! |
| 649 | ! float vis_fnands(float /*frs1*/, float /*frs2*/); |
| 650 | ! |
| 651 | .inline vis_fnands,8 |
| 652 | st %o0,[%sp+0x48] |
| 653 | ld [%sp+0x48],%f4 |
| 654 | st %o1,[%sp+0x48] |
| 655 | ld [%sp+0x48],%f10 |
| 656 | fnands %f4,%f10,%f0 |
| 657 | .end |
| 658 | ! |
| 659 | ! double vis_fand(double /*frs1*/, double /*frs2*/); |
| 660 | ! |
| 661 | .inline vis_fand,16 |
| 662 | std %o0,[%sp+0x48] |
| 663 | ldd [%sp+0x48],%f4 |
| 664 | std %o2,[%sp+0x48] |
| 665 | ldd [%sp+0x48],%f10 |
| 666 | fand %f4,%f10,%f0 |
| 667 | .end |
| 668 | ! |
| 669 | ! float vis_fands(float /*frs1*/, float /*frs2*/); |
| 670 | ! |
| 671 | .inline vis_fands,8 |
| 672 | st %o0,[%sp+0x48] |
| 673 | ld [%sp+0x48],%f4 |
| 674 | st %o1,[%sp+0x48] |
| 675 | ld [%sp+0x48],%f10 |
| 676 | fands %f4,%f10,%f0 |
| 677 | .end |
| 678 | ! |
| 679 | ! double vis_fxnor(double /*frs1*/, double /*frs2*/); |
| 680 | ! |
| 681 | .inline vis_fxnor,16 |
| 682 | std %o0,[%sp+0x48] |
| 683 | ldd [%sp+0x48],%f4 |
| 684 | std %o2,[%sp+0x48] |
| 685 | ldd [%sp+0x48],%f10 |
| 686 | fxnor %f4,%f10,%f0 |
| 687 | .end |
| 688 | ! |
| 689 | ! float vis_fxnors(float /*frs1*/, float /*frs2*/); |
| 690 | ! |
| 691 | .inline vis_fxnors,8 |
| 692 | st %o0,[%sp+0x48] |
| 693 | ld [%sp+0x48],%f4 |
| 694 | st %o1,[%sp+0x48] |
| 695 | ld [%sp+0x48],%f10 |
| 696 | fxnors %f4,%f10,%f0 |
| 697 | .end |
| 698 | ! |
| 699 | ! double vis_fsrc(double /*frs1*/); |
| 700 | ! |
| 701 | .inline vis_fsrc,8 |
| 702 | std %o0,[%sp+0x48] |
| 703 | ldd [%sp+0x48],%f4 |
| 704 | fsrc1 %f4,%f0 |
| 705 | .end |
| 706 | ! |
| 707 | ! float vis_fsrcs(float /*frs1*/); |
| 708 | ! |
| 709 | .inline vis_fsrcs,4 |
| 710 | st %o0,[%sp+0x48] |
| 711 | ld [%sp+0x48],%f4 |
| 712 | fsrc1s %f4,%f0 |
| 713 | .end |
| 714 | ! |
| 715 | ! double vis_fornot(double /*frs1*/, double /*frs2*/); |
| 716 | ! |
| 717 | .inline vis_fornot,16 |
| 718 | std %o0,[%sp+0x48] |
| 719 | ldd [%sp+0x48],%f4 |
| 720 | std %o2,[%sp+0x48] |
| 721 | ldd [%sp+0x48],%f10 |
| 722 | fornot1 %f4,%f10,%f0 |
| 723 | .end |
| 724 | ! |
| 725 | ! float vis_fornots(float /*frs1*/, float /*frs2*/); |
| 726 | ! |
| 727 | .inline vis_fornots,8 |
| 728 | st %o0,[%sp+0x48] |
| 729 | ld [%sp+0x48],%f4 |
| 730 | st %o1,[%sp+0x48] |
| 731 | ld [%sp+0x48],%f10 |
| 732 | fornot1s %f4,%f10,%f0 |
| 733 | .end |
| 734 | ! |
| 735 | ! double vis_for(double /*frs1*/, double /*frs2*/); |
| 736 | ! |
| 737 | .inline vis_for,16 |
| 738 | std %o0,[%sp+0x48] |
| 739 | ldd [%sp+0x48],%f4 |
| 740 | std %o2,[%sp+0x48] |
| 741 | ldd [%sp+0x48],%f10 |
| 742 | for %f4,%f10,%f0 |
| 743 | .end |
| 744 | ! |
| 745 | ! float vis_fors(float /*frs1*/, float /*frs2*/); |
| 746 | ! |
| 747 | .inline vis_fors,8 |
| 748 | st %o0,[%sp+0x48] |
| 749 | ld [%sp+0x48],%f4 |
| 750 | st %o1,[%sp+0x48] |
| 751 | ld [%sp+0x48],%f10 |
| 752 | fors %f4,%f10,%f0 |
| 753 | .end |
| 754 | ! |
| 755 | ! double vis_fzero(void); |
| 756 | ! |
| 757 | .inline vis_fzero,0 |
| 758 | fzero %f0 |
| 759 | .end |
| 760 | ! |
| 761 | ! float vis_fzeros(void); |
| 762 | ! |
| 763 | .inline vis_fzeros,0 |
| 764 | fzeros %f0 |
| 765 | .end |
| 766 | ! |
| 767 | ! double vis_fone(void); |
| 768 | ! |
| 769 | .inline vis_fone,0 |
| 770 | fone %f0 |
| 771 | .end |
| 772 | ! |
| 773 | ! float vis_fones(void); |
| 774 | ! |
| 775 | .inline vis_fones,0 |
| 776 | fones %f0 |
| 777 | .end |
| 778 | |
| 779 | !-------------------------------------------------------------------- |
| 780 | ! Partial store instructions |
| 781 | ! |
| 782 | ! void vis_stdfa_ASI_PST8P(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 783 | ! |
| 784 | .inline vis_stdfa_ASI_PST8P,16 |
| 785 | std %o0,[%sp+0x48] |
| 786 | ldd [%sp+0x48],%f4 |
| 787 | stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P |
| 788 | .end |
| 789 | ! |
| 790 | ! void vis_stdfa_ASI_PST8PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 791 | ! |
| 792 | .inline vis_stdfa_ASI_PST8PL,16 |
| 793 | std %o0,[%sp+0x48] |
| 794 | ldd [%sp+0x48],%f4 |
| 795 | stda %f4,[%o2]%o3,0xc8 ! ASI_PST8_PL |
| 796 | .end |
| 797 | ! |
| 798 | ! void vis_stdfa_ASI_PST8S(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 799 | ! |
| 800 | .inline vis_stdfa_ASI_PST8S,16 |
| 801 | std %o0,[%sp+0x48] |
| 802 | ldd [%sp+0x48],%f4 |
| 803 | stda %f4,[%o2]%o3,0xc1 ! ASI_PST8_S |
| 804 | .end |
| 805 | ! |
| 806 | ! void vis_stdfa_ASI_PST8P_int_pair(void * /*rs1*/, void * /*rs2*/, void * /*rs3*/, int /*rmask*/); |
| 807 | ! |
| 808 | .inline vis_stdfa_ASI_PST8P_int_pair,16 |
| 809 | ld [%o0],%f4 |
| 810 | ld [%o1],%f5 |
| 811 | stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P |
| 812 | .end |
| 813 | ! |
| 814 | ! void vis_stdfa_ASI_PST16P(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 815 | ! |
| 816 | .inline vis_stdfa_ASI_PST16P,16 |
| 817 | std %o0,[%sp+0x48] |
| 818 | ldd [%sp+0x48],%f4 |
| 819 | stda %f4,[%o2]%o3,0xc2 ! ASI_PST16_P |
| 820 | .end |
| 821 | ! |
| 822 | ! void vis_stdfa_ASI_PST16PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 823 | ! |
| 824 | .inline vis_stdfa_ASI_PST16PL,16 |
| 825 | std %o0,[%sp+0x48] |
| 826 | ldd [%sp+0x48],%f4 |
| 827 | stda %f4,[%o2]%o3,0xca ! ASI_PST16_PL |
| 828 | .end |
| 829 | ! |
| 830 | ! void vis_stdfa_ASI_PST16S(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 831 | ! |
| 832 | .inline vis_stdfa_ASI_PST16S,16 |
| 833 | std %o0,[%sp+0x48] |
| 834 | ldd [%sp+0x48],%f4 |
| 835 | stda %f4,[%o2]%o3,0xc3 ! ASI_PST16_S |
| 836 | .end |
| 837 | ! |
| 838 | ! void vis_stdfa_ASI_PST32P(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 839 | ! |
| 840 | .inline vis_stdfa_ASI_PST32P,16 |
| 841 | std %o0,[%sp+0x48] |
| 842 | ldd [%sp+0x48],%f4 |
| 843 | stda %f4,[%o2]%o3,0xc4 ! ASI_PST32_P |
| 844 | .end |
| 845 | ! |
| 846 | ! void vis_stdfa_ASI_PST32PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 847 | ! |
| 848 | .inline vis_stdfa_ASI_PST32PL,16 |
| 849 | std %o0,[%sp+0x48] |
| 850 | ldd [%sp+0x48],%f4 |
| 851 | stda %f4,[%o2]%o3,0xcc ! ASI_PST32_PL |
| 852 | .end |
| 853 | ! |
| 854 | ! void vis_stdfa_ASI_PST32S(double /*frd*/, void * /*rs1*/, int /*rmask*/); |
| 855 | ! |
| 856 | .inline vis_stdfa_ASI_PST32S,16 |
| 857 | std %o0,[%sp+0x48] |
| 858 | ldd [%sp+0x48],%f4 |
| 859 | stda %f4,[%o2]%o3,0xc5 ! ASI_PST32_S |
| 860 | .end |
| 861 | |
| 862 | !-------------------------------------------------------------------- |
| 863 | ! Byte & short store instructions |
| 864 | ! |
| 865 | ! void vis_stdfa_ASI_FL8P(double /*frd*/, void * /*rs1*/); |
| 866 | ! |
| 867 | .inline vis_stdfa_ASI_FL8P,12 |
| 868 | std %o0,[%sp+0x48] |
| 869 | ldd [%sp+0x48],%f4 |
| 870 | stda %f4,[%o2]0xd0 ! ASI_FL8_P |
| 871 | .end |
| 872 | ! |
| 873 | ! void vis_stdfa_ASI_FL8P_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 874 | ! |
| 875 | .inline vis_stdfa_ASI_FL8P_index,16 |
| 876 | std %o0,[%sp+0x48] |
| 877 | ldd [%sp+0x48],%f4 |
| 878 | stda %f4,[%o2+%o3]0xd0 ! ASI_FL8_P |
| 879 | .end |
| 880 | ! |
| 881 | ! void vis_stdfa_ASI_FL8S(double /*frd*/, void * /*rs1*/); |
| 882 | ! |
| 883 | .inline vis_stdfa_ASI_FL8S,12 |
| 884 | std %o0,[%sp+0x48] |
| 885 | ldd [%sp+0x48],%f4 |
| 886 | stda %f4,[%o2]0xd1 ! ASI_FL8_S |
| 887 | .end |
| 888 | ! |
| 889 | ! void vis_stdfa_ASI_FL16P(double /*frd*/, void * /*rs1*/); |
| 890 | ! |
| 891 | .inline vis_stdfa_ASI_FL16P,12 |
| 892 | std %o0,[%sp+0x48] |
| 893 | ldd [%sp+0x48],%f4 |
| 894 | stda %f4,[%o2]0xd2 ! ASI_FL16_P |
| 895 | .end |
| 896 | ! |
| 897 | ! void vis_stdfa_ASI_FL16P_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 898 | ! |
| 899 | .inline vis_stdfa_ASI_FL16P_index,16 |
| 900 | std %o0,[%sp+0x48] |
| 901 | ldd [%sp+0x48],%f4 |
| 902 | stda %f4,[%o2+%o3]0xd2 ! ASI_FL16_P |
| 903 | .end |
| 904 | ! |
| 905 | ! void vis_stdfa_ASI_FL16S(double /*frd*/, void * /*rs1*/); |
| 906 | ! |
| 907 | .inline vis_stdfa_ASI_FL16S,12 |
| 908 | std %o0,[%sp+0x48] |
| 909 | ldd [%sp+0x48],%f4 |
| 910 | stda %f4,[%o2]0xd3 ! ASI_FL16_S |
| 911 | .end |
| 912 | ! |
| 913 | ! void vis_stdfa_ASI_FL8PL(double /*frd*/, void * /*rs1*/); |
| 914 | ! |
| 915 | .inline vis_stdfa_ASI_FL8PL,12 |
| 916 | std %o0,[%sp+0x48] |
| 917 | ldd [%sp+0x48],%f4 |
| 918 | stda %f4,[%o2]0xd8 ! ASI_FL8_PL |
| 919 | .end |
| 920 | ! |
| 921 | ! void vis_stdfa_ASI_FL8PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 922 | ! |
| 923 | .inline vis_stdfa_ASI_FL8PL_index,16 |
| 924 | std %o0,[%sp+0x48] |
| 925 | ldd [%sp+0x48],%f4 |
| 926 | stda %f4,[%o2+%o3]0xd8 ! ASI_FL8_PL |
| 927 | .end |
| 928 | ! |
| 929 | ! void vis_stdfa_ASI_FL8SL(double /*frd*/, void * /*rs1*/); |
| 930 | ! |
| 931 | .inline vis_stdfa_ASI_FL8SL,12 |
| 932 | std %o0,[%sp+0x48] |
| 933 | ldd [%sp+0x48],%f4 |
| 934 | stda %f4,[%o2]0xd9 ! ASI_FL8_SL |
| 935 | .end |
| 936 | ! |
| 937 | ! void vis_stdfa_ASI_FL16PL(double /*frd*/, void * /*rs1*/); |
| 938 | ! |
| 939 | .inline vis_stdfa_ASI_FL16PL,12 |
| 940 | std %o0,[%sp+0x48] |
| 941 | ldd [%sp+0x48],%f4 |
| 942 | stda %f4,[%o2]0xda ! ASI_FL16_PL |
| 943 | .end |
| 944 | ! |
| 945 | ! void vis_stdfa_ASI_FL16PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 946 | ! |
| 947 | .inline vis_stdfa_ASI_FL16PL_index,16 |
| 948 | std %o0,[%sp+0x48] |
| 949 | ldd [%sp+0x48],%f4 |
| 950 | stda %f4,[%o2+%o3]0xda ! ASI_FL16_PL |
| 951 | .end |
| 952 | ! |
| 953 | ! void vis_stdfa_ASI_FL16SL(double /*frd*/, void * /*rs1*/); |
| 954 | ! |
| 955 | .inline vis_stdfa_ASI_FL16SL,12 |
| 956 | std %o0,[%sp+0x48] |
| 957 | ldd [%sp+0x48],%f4 |
| 958 | stda %f4,[%o2]0xdb ! ASI_FL16_SL |
| 959 | .end |
| 960 | |
| 961 | !-------------------------------------------------------------------- |
| 962 | ! Byte & short load instructions |
| 963 | ! |
| 964 | ! double vis_lddfa_ASI_FL8P(void * /*rs1*/); |
| 965 | ! |
| 966 | .inline vis_lddfa_ASI_FL8P,4 |
| 967 | ldda [%o0]0xd0,%f0 ! ASI_FL8_P |
| 968 | .end |
| 969 | ! |
| 970 | ! double vis_lddfa_ASI_FL8P_index(void * /*rs1*/, long /*index*/); |
| 971 | ! |
| 972 | .inline vis_lddfa_ASI_FL8P_index,8 |
| 973 | ldda [%o0+%o1]0xd0,%f0 ! ASI_FL8_P |
| 974 | .end |
| 975 | ! |
| 976 | ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int /*index*/); |
| 977 | ! |
| 978 | .inline vis_lddfa_ASI_FL8P_hi,8 |
| 979 | sra %o1,16,%o1 |
| 980 | ldda [%o0+%o1]0xd0,%f0 ! ASI_FL8_P |
| 981 | .end |
| 982 | ! |
| 983 | ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int /*index*/); |
| 984 | ! |
| 985 | .inline vis_lddfa_ASI_FL8P_lo,8 |
| 986 | sll %o1,16,%o1 |
| 987 | sra %o1,16,%o1 |
| 988 | ldda [%o0+%o1]0xd0,%f0 ! ASI_FL8_P |
| 989 | .end |
| 990 | ! |
| 991 | ! double vis_lddfa_ASI_FL8S(void * /*rs1*/); |
| 992 | ! |
| 993 | .inline vis_lddfa_ASI_FL8S,4 |
| 994 | ldda [%o0]0xd1,%f0 ! ASI_FL8_S |
| 995 | .end |
| 996 | ! |
| 997 | ! double vis_lddfa_ASI_FL16P(void * /*rs1*/); |
| 998 | ! |
| 999 | .inline vis_lddfa_ASI_FL16P,4 |
| 1000 | ldda [%o0]0xd2,%f0 ! ASI_FL16_P |
| 1001 | .end |
| 1002 | ! |
| 1003 | ! double vis_lddfa_ASI_FL16P_index(void * /*rs1*/, long /*index*/); |
| 1004 | ! |
| 1005 | .inline vis_lddfa_ASI_FL16P_index,8 |
| 1006 | ldda [%o0+%o1]0xd2,%f0 ! ASI_FL16_P |
| 1007 | .end |
| 1008 | ! |
| 1009 | ! double vis_lddfa_ASI_FL16S(void * /*rs1*/); |
| 1010 | ! |
| 1011 | .inline vis_lddfa_ASI_FL16S,4 |
| 1012 | ldda [%o0]0xd3,%f0 ! ASI_FL16_S |
| 1013 | .end |
| 1014 | ! |
| 1015 | ! double vis_lddfa_ASI_FL8PL(void * /*rs1*/); |
| 1016 | ! |
| 1017 | .inline vis_lddfa_ASI_FL8PL,4 |
| 1018 | ldda [%o0]0xd8,%f0 ! ASI_FL8_PL |
| 1019 | .end |
| 1020 | ! |
| 1021 | ! double vis_lddfa_ASI_FL8PL_index(void * /*rs1*/, long /*index*/); |
| 1022 | ! |
| 1023 | .inline vis_lddfa_ASI_FL8PL_index,8 |
| 1024 | ldda [%o0+%o1]0xd8,%f0 ! ASI_FL8_PL |
| 1025 | .end |
| 1026 | ! |
| 1027 | ! double vis_lddfa_ASI_FL8SL(void * /*rs1*/); |
| 1028 | ! |
| 1029 | .inline vis_lddfa_ASI_FL8SL,4 |
| 1030 | ldda [%o0]0xd9,%f0 ! ASI_FL8_SL |
| 1031 | .end |
| 1032 | ! |
| 1033 | ! double vis_lddfa_ASI_FL16PL(void * /*rs1*/); |
| 1034 | ! |
| 1035 | .inline vis_lddfa_ASI_FL16PL,4 |
| 1036 | ldda [%o0]0xda,%f0 ! ASI_FL16_PL |
| 1037 | .end |
| 1038 | ! |
| 1039 | ! double vis_lddfa_ASI_FL16PL_index(void * /*rs1*/, long /*index*/); |
| 1040 | ! |
| 1041 | .inline vis_lddfa_ASI_FL16PL_index,8 |
| 1042 | ldda [%o0+%o1]0xda,%f0 ! ASI_FL16_PL |
| 1043 | .end |
| 1044 | ! |
| 1045 | ! double vis_lddfa_ASI_FL16SL(void * /*rs1*/); |
| 1046 | ! |
| 1047 | .inline vis_lddfa_ASI_FL16SL,4 |
| 1048 | ldda [%o0]0xdb,%f0 ! ASI_FL16_SL |
| 1049 | .end |
| 1050 | |
| 1051 | !-------------------------------------------------------------------- |
| 1052 | ! Graphics status register |
| 1053 | ! |
| 1054 | ! unsigned int vis_read_gsr32(void); |
| 1055 | ! |
| 1056 | .inline vis_read_gsr32,0 |
| 1057 | rd %gsr,%o0 |
| 1058 | .end |
| 1059 | ! |
| 1060 | ! void vis_write_gsr32(unsigned int /* GSR */); |
| 1061 | ! |
| 1062 | .inline vis_write_gsr32,4 |
| 1063 | wr %g0,%o0,%gsr |
| 1064 | .end |
| 1065 | |
| 1066 | !-------------------------------------------------------------------- |
| 1067 | ! Voxel texture mapping |
| 1068 | ! |
| 1069 | ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/); |
| 1070 | ! |
| 1071 | .inline vis_array8,12 |
| 1072 | sllx %o0,32,%o0 |
| 1073 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
| 1074 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
| 1075 | array8 %o3,%o2,%o0 |
| 1076 | .end |
| 1077 | ! |
| 1078 | ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/); |
| 1079 | ! |
| 1080 | .inline vis_array16,12 |
| 1081 | sllx %o0,32,%o0 |
| 1082 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
| 1083 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
| 1084 | array16 %o3,%o2,%o0 |
| 1085 | .end |
| 1086 | ! |
| 1087 | ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/); |
| 1088 | ! |
| 1089 | .inline vis_array32,12 |
| 1090 | sllx %o0,32,%o0 |
| 1091 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
| 1092 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
| 1093 | array32 %o3,%o2,%o0 |
| 1094 | .end |
| 1095 | |
| 1096 | !-------------------------------------------------------------------- |
| 1097 | ! Register aliasing and type casts |
| 1098 | ! |
| 1099 | ! float vis_read_hi(double /* frs1 */); |
| 1100 | ! |
| 1101 | .inline vis_read_hi,8 |
| 1102 | std %o0,[%sp+0x48] ! store double frs1 |
| 1103 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; return %f0; |
| 1104 | .end |
| 1105 | ! |
| 1106 | ! float vis_read_lo(double /* frs1 */); |
| 1107 | ! |
| 1108 | .inline vis_read_lo,8 |
| 1109 | std %o0,[%sp+0x48] ! store double frs1 |
| 1110 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
| 1111 | fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0; |
| 1112 | .end |
| 1113 | ! |
| 1114 | ! double vis_write_hi(double /* frs1 */, float /* frs2 */); |
| 1115 | ! |
| 1116 | .inline vis_write_hi,12 |
| 1117 | std %o0,[%sp+0x48] ! store double frs1; |
| 1118 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
| 1119 | st %o2,[%sp+0x44] ! store float frs2; |
| 1120 | ld [%sp+0x44],%f2 ! %f2 = float frs2; |
| 1121 | fmovs %f2,%f0 ! %f0 = float frs2; return %f0:f1; |
| 1122 | .end |
| 1123 | ! |
| 1124 | ! double vis_write_lo(double /* frs1 */, float /* frs2 */); |
| 1125 | ! |
| 1126 | .inline vis_write_lo,12 |
| 1127 | std %o0,[%sp+0x48] ! store double frs1; |
| 1128 | ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; |
| 1129 | st %o2,[%sp+0x44] ! store float frs2; |
| 1130 | ld [%sp+0x44],%f2 ! %f2 = float frs2; |
| 1131 | fmovs %f2,%f1 ! %f1 = float frs2; return %f0:f1; |
| 1132 | .end |
| 1133 | ! |
| 1134 | ! double vis_freg_pair(float /* frs1 */, float /* frs2 */); |
| 1135 | ! |
| 1136 | .inline vis_freg_pair,8 |
| 1137 | st %o0,[%sp+0x48] ! store float frs1 |
| 1138 | ld [%sp+0x48],%f0 |
| 1139 | st %o1,[%sp+0x48] ! store float frs2 |
| 1140 | ld [%sp+0x48],%f1 |
| 1141 | .end |
| 1142 | ! |
| 1143 | ! float vis_to_float(unsigned int /*value*/); |
| 1144 | ! |
| 1145 | .inline vis_to_float,4 |
| 1146 | st %o0,[%sp+0x48] |
| 1147 | ld [%sp+0x48],%f0 |
| 1148 | .end |
| 1149 | ! |
| 1150 | ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/); |
| 1151 | ! |
| 1152 | .inline vis_to_double,8 |
| 1153 | std %o0,[%sp+0x48] |
| 1154 | ldd [%sp+0x48],%f0 |
| 1155 | .end |
| 1156 | ! |
| 1157 | ! double vis_to_double_dup(unsigned int /*value*/); |
| 1158 | ! |
| 1159 | .inline vis_to_double_dup,4 |
| 1160 | st %o0,[%sp+0x48] |
| 1161 | ld [%sp+0x48],%f1 |
| 1162 | fmovs %f1,%f0 ! duplicate value |
| 1163 | .end |
| 1164 | ! |
| 1165 | ! double vis_ll_to_double(unsigned long long /*value*/); |
| 1166 | ! |
| 1167 | .inline vis_ll_to_double,8 |
| 1168 | std %o0,[%sp+0x48] |
| 1169 | ldd [%sp+0x48],%f0 |
| 1170 | .end |
| 1171 | |
| 1172 | !-------------------------------------------------------------------- |
| 1173 | ! Address space identifier (ASI) register |
| 1174 | ! |
| 1175 | ! unsigned int vis_read_asi(void); |
| 1176 | ! |
| 1177 | .inline vis_read_asi,0 |
| 1178 | rd %asi,%o0 |
| 1179 | .end |
| 1180 | ! |
| 1181 | ! void vis_write_asi(unsigned int /* ASI */); |
| 1182 | ! |
| 1183 | .inline vis_write_asi,4 |
| 1184 | wr %g0,%o0,%asi |
| 1185 | .end |
| 1186 | |
| 1187 | !-------------------------------------------------------------------- |
| 1188 | ! Load/store from/into alternate space |
| 1189 | ! |
| 1190 | ! float vis_ldfa_ASI_REG(void * /*rs1*/); |
| 1191 | ! |
| 1192 | .inline vis_ldfa_ASI_REG,4 |
| 1193 | lda [%o0]%asi,%f0 |
| 1194 | .end |
| 1195 | ! |
| 1196 | ! float vis_ldfa_ASI_P(void * /*rs1*/); |
| 1197 | ! |
| 1198 | .inline vis_ldfa_ASI_P,4 |
| 1199 | lda [%o0]0x80,%f0 ! ASI_P |
| 1200 | .end |
| 1201 | ! |
| 1202 | ! float vis_ldfa_ASI_P_index(void * /*rs1*/, long /*index*/); |
| 1203 | ! |
| 1204 | .inline vis_ldfa_ASI_P_index,8 |
| 1205 | lda [%o0+%o1]0x80,%f0 ! ASI_PL |
| 1206 | .end |
| 1207 | ! |
| 1208 | ! float vis_ldfa_ASI_PL(void * /*rs1*/); |
| 1209 | ! |
| 1210 | .inline vis_ldfa_ASI_PL,4 |
| 1211 | lda [%o0]0x88,%f0 ! ASI_PL |
| 1212 | .end |
| 1213 | ! |
| 1214 | ! float vis_ldfa_ASI_PL_index(void * /*rs1*/, long /*index*/); |
| 1215 | ! |
| 1216 | .inline vis_ldfa_ASI_PL_index,8 |
| 1217 | lda [%o0+%o1]0x88,%f0 ! ASI_PL |
| 1218 | .end |
| 1219 | ! |
| 1220 | ! double vis_lddfa_ASI_REG(void * /*rs1*/); |
| 1221 | ! |
| 1222 | .inline vis_lddfa_ASI_REG,4 |
| 1223 | ldda [%o0]%asi,%f0 |
| 1224 | .end |
| 1225 | ! |
| 1226 | ! double vis_lddfa_ASI_P(void * /*rs1*/); |
| 1227 | ! |
| 1228 | .inline vis_lddfa_ASI_P,4 |
| 1229 | ldda [%o0]0x80,%f0 ! ASI_P |
| 1230 | .end |
| 1231 | ! |
| 1232 | ! double vis_lddfa_ASI_P_index(void * /*rs1*/, long /*index*/); |
| 1233 | ! |
| 1234 | .inline vis_lddfa_ASI_P_index,8 |
| 1235 | ldda [%o0+%o1]0x80,%f0 ! ASI_P |
| 1236 | .end |
| 1237 | ! |
| 1238 | ! double vis_lddfa_ASI_PL(void * /*rs1*/); |
| 1239 | ! |
| 1240 | .inline vis_lddfa_ASI_PL,4 |
| 1241 | ldda [%o0]0x88,%f0 ! ASI_PL |
| 1242 | .end |
| 1243 | ! |
| 1244 | ! double vis_lddfa_ASI_PL_index(void * /*rs1*/, long /*index*/); |
| 1245 | ! |
| 1246 | .inline vis_lddfa_ASI_PL_index,8 |
| 1247 | ldda [%o0+%o1]0x88,%f0 ! ASI_PL |
| 1248 | .end |
| 1249 | ! |
| 1250 | ! void vis_stfa_ASI_REG(float /*frs*/, void * /*rs1*/); |
| 1251 | ! |
| 1252 | .inline vis_stfa_ASI_REG,8 |
| 1253 | st %o0,[%sp+0x48] |
| 1254 | ld [%sp+0x48],%f4 |
| 1255 | sta %f4,[%o1+0]%asi |
| 1256 | .end |
| 1257 | ! |
| 1258 | ! void vis_stfa_ASI_P(float /*frs*/, void * /*rs1*/); |
| 1259 | ! |
| 1260 | .inline vis_stfa_ASI_P,8 |
| 1261 | st %o0,[%sp+0x48] |
| 1262 | ld [%sp+0x48],%f4 |
| 1263 | sta %f4,[%o1]0x80 ! ASI_P |
| 1264 | .end |
| 1265 | ! |
| 1266 | ! void vis_stfa_ASI_P_index(float /*frs*/, void * /*rs1*/, long /*index*/); |
| 1267 | ! |
| 1268 | .inline vis_stfa_ASI_P_index,8 |
| 1269 | st %o0,[%sp+0x48] |
| 1270 | ld [%sp+0x48],%f4 |
| 1271 | sta %f4,[%o1+%o2]0x80 ! ASI_P |
| 1272 | .end |
| 1273 | ! |
| 1274 | ! void vis_stfa_ASI_PL(float /*frs*/, void * /*rs1*/); |
| 1275 | ! |
| 1276 | .inline vis_stfa_ASI_PL,8 |
| 1277 | st %o0,[%sp+0x48] |
| 1278 | ld [%sp+0x48],%f4 |
| 1279 | sta %f4,[%o1]0x88 ! ASI_PL |
| 1280 | .end |
| 1281 | ! |
| 1282 | ! void vis_stfa_ASI_PL_index(float /*frs*/, void * /*rs1*/, long /*index*/); |
| 1283 | ! |
| 1284 | .inline vis_stfa_ASI_PL_index,8 |
| 1285 | st %o0,[%sp+0x48] |
| 1286 | ld [%sp+0x48],%f4 |
| 1287 | sta %f4,[%o1+%o2]0x88 ! ASI_PL |
| 1288 | .end |
| 1289 | ! |
| 1290 | ! void vis_stdfa_ASI_REG(double /*frd*/, void * /*rs1*/); |
| 1291 | ! |
| 1292 | .inline vis_stdfa_ASI_REG,12 |
| 1293 | std %o0,[%sp+0x48] |
| 1294 | ldd [%sp+0x48],%f4 |
| 1295 | stda %f4,[%o2+0]%asi |
| 1296 | .end |
| 1297 | ! |
| 1298 | ! void vis_stdfa_ASI_P(double /*frd*/, void * /*rs1*/); |
| 1299 | ! |
| 1300 | .inline vis_stdfa_ASI_P,12 |
| 1301 | std %o0,[%sp+0x48] |
| 1302 | ldd [%sp+0x48],%f4 |
| 1303 | stda %f4,[%o2]0x80 ! ASI_P |
| 1304 | .end |
| 1305 | ! |
| 1306 | ! void vis_stdfa_ASI_P_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 1307 | ! |
| 1308 | .inline vis_stdfa_ASI_P_index,16 |
| 1309 | std %o0,[%sp+0x48] |
| 1310 | ldd [%sp+0x48],%f4 |
| 1311 | stda %f4,[%o2+%o3]0x80 ! ASI_P |
| 1312 | .end |
| 1313 | ! |
| 1314 | ! void vis_stdfa_ASI_PL(double /*frd*/, void * /*rs1*/); |
| 1315 | ! |
| 1316 | .inline vis_stdfa_ASI_PL,12 |
| 1317 | std %o0,[%sp+0x48] |
| 1318 | ldd [%sp+0x48],%f4 |
| 1319 | stda %f4,[%o2]0x88 ! ASI_PL |
| 1320 | .end |
| 1321 | ! |
| 1322 | ! void vis_stdfa_ASI_PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); |
| 1323 | ! |
| 1324 | .inline vis_stdfa_ASI_PL_index,16 |
| 1325 | std %o0,[%sp+0x48] |
| 1326 | ldd [%sp+0x48],%f4 |
| 1327 | stda %f4,[%o2+%o3]0x88 ! ASI_PL |
| 1328 | .end |
| 1329 | ! |
| 1330 | ! unsigned short vis_lduha_ASI_REG(void * /*rs1*/); |
| 1331 | ! |
| 1332 | .inline vis_lduha_ASI_REG,4 |
| 1333 | lduha [%o0]%asi,%o0 |
| 1334 | .end |
| 1335 | ! |
| 1336 | ! unsigned short vis_lduha_ASI_P(void * /*rs1*/); |
| 1337 | ! |
| 1338 | .inline vis_lduha_ASI_P,4 |
| 1339 | lduha [%o0]0x80,%o0 ! ASI_P |
| 1340 | .end |
| 1341 | ! |
| 1342 | ! unsigned short vis_lduha_ASI_PL(void * /*rs1*/); |
| 1343 | ! |
| 1344 | .inline vis_lduha_ASI_PL,4 |
| 1345 | lduha [%o0]0x88,%o0 ! ASI_PL |
| 1346 | .end |
| 1347 | ! |
| 1348 | ! unsigned short vis_lduha_ASI_P_index(void * /*rs1*/, long /*index*/); |
| 1349 | ! |
| 1350 | .inline vis_lduha_ASI_P_index,8 |
| 1351 | lduha [%o0+%o1]0x80,%o0 ! ASI_P |
| 1352 | .end |
| 1353 | ! |
| 1354 | ! unsigned short vis_lduha_ASI_PL_index(void * /*rs1*/, long /*index*/); |
| 1355 | ! |
| 1356 | .inline vis_lduha_ASI_PL_index,8 |
| 1357 | lduha [%o0+%o1]0x88,%o0 ! ASI_PL |
| 1358 | .end |
| 1359 | |
| 1360 | !-------------------------------------------------------------------- |
| 1361 | ! Prefetch |
| 1362 | ! |
| 1363 | ! void vis_prefetch_read(void * /*address*/); |
| 1364 | ! |
| 1365 | .inline vis_prefetch_read,4 |
| 1366 | prefetch [%o0],0 |
| 1367 | .end |
| 1368 | ! |
| 1369 | ! void vis_prefetch_write(void * /*address*/); |
| 1370 | ! |
| 1371 | .inline vis_prefetch_write,4 |
| 1372 | prefetch [%o0],2 |
| 1373 | .end |
| 1374 | |
| 1375 | !-------------------------------------------------------------------- |
| 1376 | ! Nonfaulting load instructions |
| 1377 | ! |
| 1378 | ! char vis_ldsba_ASI_PNF(void * /*rs1*/); |
| 1379 | ! |
| 1380 | .inline vis_ldsba_ASI_PNF,4 |
| 1381 | ldsba [%o0]0x82,%o0 ! ASI_PNF |
| 1382 | .end |
| 1383 | ! |
| 1384 | ! char vis_ldsba_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1385 | ! |
| 1386 | .inline vis_ldsba_ASI_PNF_index,8 |
| 1387 | ldsba [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1388 | .end |
| 1389 | ! |
| 1390 | ! char vis_ldsba_ASI_PNFL(void * /*rs1*/); |
| 1391 | ! |
| 1392 | .inline vis_ldsba_ASI_PNFL,4 |
| 1393 | ldsba [%o0]0x8a,%o0 ! ASI_PNFL |
| 1394 | .end |
| 1395 | ! |
| 1396 | ! char vis_ldsba_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1397 | ! |
| 1398 | .inline vis_ldsba_ASI_PNFL_index,8 |
| 1399 | ldsba [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1400 | .end |
| 1401 | ! |
| 1402 | ! unsigned char vis_lduba_ASI_PNF(void * /*rs1*/); |
| 1403 | ! |
| 1404 | .inline vis_lduba_ASI_PNF,4 |
| 1405 | lduba [%o0]0x82,%o0 ! ASI_PNF |
| 1406 | .end |
| 1407 | ! |
| 1408 | ! unsigned char vis_lduba_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1409 | ! |
| 1410 | .inline vis_lduba_ASI_PNF_index,8 |
| 1411 | lduba [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1412 | .end |
| 1413 | ! |
| 1414 | ! unsigned char vis_lduba_ASI_PNFL(void * /*rs1*/); |
| 1415 | ! |
| 1416 | .inline vis_lduba_ASI_PNFL,4 |
| 1417 | lduba [%o0]0x8a,%o0 ! ASI_PNFL |
| 1418 | .end |
| 1419 | ! |
| 1420 | ! unsigned char vis_lduba_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1421 | ! |
| 1422 | .inline vis_lduba_ASI_PNFL_index,8 |
| 1423 | lduba [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1424 | .end |
| 1425 | ! |
| 1426 | ! short vis_ldsha_ASI_PNF(void * /*rs1*/); |
| 1427 | ! |
| 1428 | .inline vis_ldsha_ASI_PNF,4 |
| 1429 | ldsha [%o0]0x82,%o0 ! ASI_PNF |
| 1430 | .end |
| 1431 | ! |
| 1432 | ! short vis_ldsha_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1433 | ! |
| 1434 | .inline vis_ldsha_ASI_PNF_index,8 |
| 1435 | ldsha [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1436 | .end |
| 1437 | ! |
| 1438 | ! short vis_ldsha_ASI_PNFL(void * /*rs1*/); |
| 1439 | ! |
| 1440 | .inline vis_ldsha_ASI_PNFL,4 |
| 1441 | ldsha [%o0]0x8a,%o0 ! ASI_PNFL |
| 1442 | .end |
| 1443 | ! |
| 1444 | ! short vis_ldsha_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1445 | ! |
| 1446 | .inline vis_ldsha_ASI_PNFL_index,8 |
| 1447 | ldsha [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1448 | .end |
| 1449 | ! |
| 1450 | ! unsigned short vis_lduha_ASI_PNF(void * /*rs1*/); |
| 1451 | ! |
| 1452 | .inline vis_lduha_ASI_PNF,4 |
| 1453 | lduha [%o0]0x82,%o0 ! ASI_PNF |
| 1454 | .end |
| 1455 | ! |
| 1456 | ! unsigned short vis_lduha_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1457 | ! |
| 1458 | .inline vis_lduha_ASI_PNF_index,8 |
| 1459 | lduha [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1460 | .end |
| 1461 | ! |
| 1462 | ! unsigned short vis_lduha_ASI_PNFL(void * /*rs1*/); |
| 1463 | ! |
| 1464 | .inline vis_lduha_ASI_PNFL,4 |
| 1465 | lduha [%o0]0x8a,%o0 ! ASI_PNFL |
| 1466 | .end |
| 1467 | ! |
| 1468 | ! unsigned short vis_lduha_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1469 | ! |
| 1470 | .inline vis_lduha_ASI_PNFL_index,8 |
| 1471 | lduha [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1472 | .end |
| 1473 | ! |
| 1474 | ! int vis_ldswa_ASI_PNF(void * /*rs1*/); |
| 1475 | ! |
| 1476 | .inline vis_ldswa_ASI_PNF,4 |
| 1477 | ldswa [%o0]0x82,%o0 ! ASI_PNF |
| 1478 | .end |
| 1479 | ! |
| 1480 | ! int vis_ldswa_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1481 | ! |
| 1482 | .inline vis_ldswa_ASI_PNF_index,8 |
| 1483 | ldswa [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1484 | .end |
| 1485 | ! |
| 1486 | ! int vis_ldswa_ASI_PNFL(void * /*rs1*/); |
| 1487 | ! |
| 1488 | .inline vis_ldswa_ASI_PNFL,4 |
| 1489 | ldswa [%o0]0x8a,%o0 ! ASI_PNFL |
| 1490 | .end |
| 1491 | ! |
| 1492 | ! int vis_ldswa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1493 | ! |
| 1494 | .inline vis_ldswa_ASI_PNFL_index,8 |
| 1495 | ldswa [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1496 | .end |
| 1497 | ! |
| 1498 | ! unsigned int vis_lduwa_ASI_PNF(void * /*rs1*/); |
| 1499 | ! |
| 1500 | .inline vis_lduwa_ASI_PNF,4 |
| 1501 | lduwa [%o0]0x82,%o0 ! ASI_PNF |
| 1502 | .end |
| 1503 | ! |
| 1504 | ! unsigned int vis_lduwa_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1505 | ! |
| 1506 | .inline vis_lduwa_ASI_PNF_index,8 |
| 1507 | lduwa [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1508 | .end |
| 1509 | ! |
| 1510 | ! unsigned int vis_lduwa_ASI_PNFL(void * /*rs1*/); |
| 1511 | ! |
| 1512 | .inline vis_lduwa_ASI_PNFL,4 |
| 1513 | lduwa [%o0]0x8a,%o0 ! ASI_PNFL |
| 1514 | .end |
| 1515 | ! |
| 1516 | ! unsigned int vis_lduwa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1517 | ! |
| 1518 | .inline vis_lduwa_ASI_PNFL_index,8 |
| 1519 | lduwa [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1520 | .end |
| 1521 | ! |
| 1522 | ! long vis_ldxa_ASI_PNF(void * /*rs1*/); |
| 1523 | ! |
| 1524 | .inline vis_ldxa_ASI_PNF,4 |
| 1525 | ldxa [%o0]0x82,%o0 ! ASI_PNF |
| 1526 | .end |
| 1527 | ! |
| 1528 | ! long vis_ldxa_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1529 | ! |
| 1530 | .inline vis_ldxa_ASI_PNF_index,8 |
| 1531 | ldxa [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1532 | .end |
| 1533 | ! |
| 1534 | ! long vis_ldxa_ASI_PNFL(void * /*rs1*/); |
| 1535 | ! |
| 1536 | .inline vis_ldxa_ASI_PNFL,4 |
| 1537 | ldxa [%o0]0x8a,%o0 ! ASI_PNFL |
| 1538 | .end |
| 1539 | ! |
| 1540 | ! long vis_ldxa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1541 | ! |
| 1542 | .inline vis_ldxa_ASI_PNFL_index,8 |
| 1543 | ldxa [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1544 | .end |
| 1545 | ! |
| 1546 | ! long long vis_ldda_ASI_PNF(void * /*rs1*/); |
| 1547 | ! |
| 1548 | .inline vis_ldda_ASI_PNF,4 |
| 1549 | ldda [%o0]0x82,%o0 ! ASI_PNF |
| 1550 | .end |
| 1551 | ! |
| 1552 | ! long long vis_ldda_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1553 | ! |
| 1554 | .inline vis_ldda_ASI_PNF_index,8 |
| 1555 | ldda [%o0+%o1]0x82,%o0 ! ASI_PNF |
| 1556 | .end |
| 1557 | ! |
| 1558 | ! long long vis_ldda_ASI_PNFL(void * /*rs1*/); |
| 1559 | ! |
| 1560 | .inline vis_ldda_ASI_PNFL,4 |
| 1561 | ldda [%o0]0x8a,%o0 ! ASI_PNFL |
| 1562 | .end |
| 1563 | ! |
| 1564 | ! long long vis_ldda_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1565 | ! |
| 1566 | .inline vis_ldda_ASI_PNFL_index,8 |
| 1567 | ldda [%o0+%o1]0x8a,%o0 ! ASI_PNFL |
| 1568 | .end |
| 1569 | ! |
| 1570 | ! float vis_ldfa_ASI_PNF(void * /*rs1*/); |
| 1571 | ! |
| 1572 | .inline vis_ldfa_ASI_PNF,4 |
| 1573 | lda [%o0]0x82,%f0 ! ASI_PNF |
| 1574 | .end |
| 1575 | ! |
| 1576 | ! float vis_ldfa_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1577 | ! |
| 1578 | .inline vis_ldfa_ASI_PNF_index,8 |
| 1579 | lda [%o0+%o1]0x82,%f0 ! ASI_PNF |
| 1580 | .end |
| 1581 | ! |
| 1582 | ! float vis_ldfa_ASI_PNFL(void * /*rs1*/); |
| 1583 | ! |
| 1584 | .inline vis_ldfa_ASI_PNFL,4 |
| 1585 | lda [%o0]0x8a,%f0 ! ASI_PNFL |
| 1586 | .end |
| 1587 | ! |
| 1588 | ! float vis_ldfa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1589 | ! |
| 1590 | .inline vis_ldfa_ASI_PNFL_index,8 |
| 1591 | lda [%o0+%o1]0x8a,%f0 ! ASI_PNFL |
| 1592 | .end |
| 1593 | ! |
| 1594 | ! double vis_lddfa_ASI_PNF(void * /*rs1*/); |
| 1595 | ! |
| 1596 | .inline vis_lddfa_ASI_PNF,4 |
| 1597 | ldda [%o0]0x82,%f0 ! ASI_PNF |
| 1598 | .end |
| 1599 | ! |
| 1600 | ! double vis_lddfa_ASI_PNF_index(void * /*rs1*/, long /*index*/); |
| 1601 | ! |
| 1602 | .inline vis_lddfa_ASI_PNF_index,8 |
| 1603 | ldda [%o0+%o1]0x82,%f0 ! ASI_PNF |
| 1604 | .end |
| 1605 | ! |
| 1606 | ! double vis_lddfa_ASI_PNFL(void * /*rs1*/); |
| 1607 | ! |
| 1608 | .inline vis_lddfa_ASI_PNFL,4 |
| 1609 | ldda [%o0]0x8a,%f0 ! ASI_PNFL |
| 1610 | .end |
| 1611 | ! |
| 1612 | ! double vis_lddfa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); |
| 1613 | ! |
| 1614 | .inline vis_lddfa_ASI_PNFL_index,8 |
| 1615 | ldda [%o0+%o1]0x8a,%f0 ! ASI_PNFL |
| 1616 | .end |
| 1617 | |
| 1618 | !-------------------------------------------------------------------- |
| 1619 | ! |
| 1620 | ! The following are the new VIS 2.0 instructions. |
| 1621 | ! |
| 1622 | |
| 1623 | ! |
| 1624 | ! Edge handling instructions which do not set the integer condition codes |
| 1625 | ! |
| 1626 | ! int vis_edge8n(void * /*rs1*/, void * /*rs2*/); |
| 1627 | ! |
| 1628 | .inline vis_edge8n,8 |
| 1629 | edge8n %o0,%o1,%o0 |
| 1630 | .end |
| 1631 | ! |
| 1632 | ! int vis_edge8ln(void * /*rs1*/, void * /*rs2*/); |
| 1633 | ! |
| 1634 | .inline vis_edge8ln,8 |
| 1635 | edge8ln %o0,%o1,%o0 |
| 1636 | .end |
| 1637 | ! |
| 1638 | ! int vis_edge16n(void * /*rs1*/, void * /*rs2*/); |
| 1639 | ! |
| 1640 | .inline vis_edge16n,8 |
| 1641 | edge16n %o0,%o1,%o0 |
| 1642 | .end |
| 1643 | ! |
| 1644 | ! int vis_edge16ln(void * /*rs1*/, void * /*rs2*/); |
| 1645 | ! |
| 1646 | .inline vis_edge16ln,8 |
| 1647 | edge16ln %o0,%o1,%o0 |
| 1648 | .end |
| 1649 | ! |
| 1650 | ! int vis_edge32n(void * /*rs1*/, void * /*rs2*/); |
| 1651 | ! |
| 1652 | .inline vis_edge32n,8 |
| 1653 | edge32n %o0,%o1,%o0 |
| 1654 | .end |
| 1655 | ! |
| 1656 | ! int vis_edge32ln(void * /*rs1*/, void * /*rs2*/); |
| 1657 | ! |
| 1658 | .inline vis_edge32ln,8 |
| 1659 | edge32ln %o0,%o1,%o0 |
| 1660 | .end |
| 1661 | |
| 1662 | !-------------------------------------------------------------------- |
| 1663 | ! Byte mask and shuffle instructions |
| 1664 | ! |
| 1665 | ! void vis_write_bmask(unsigned int /*rs1*/, unsigned int /*rs2*/); |
| 1666 | ! |
| 1667 | .inline vis_write_bmask,8 |
| 1668 | bmask %o0,%o1,%o0 |
| 1669 | .end |
| 1670 | ! |
| 1671 | ! double vis_bshuffle(double /*frs1*/, double /*frs2*/); |
| 1672 | ! |
| 1673 | .inline vis_bshuffle,16 |
| 1674 | std %o0,[%sp+0x48] |
| 1675 | ldd [%sp+0x48],%f4 |
| 1676 | std %o2,[%sp+0x48] |
| 1677 | ldd [%sp+0x48],%f10 |
| 1678 | bshuffle %f4,%f10,%f0 |
| 1679 | .end |
| 1680 | |
| 1681 | !-------------------------------------------------------------------- |
| 1682 | ! Graphics status register |
| 1683 | ! |
| 1684 | ! unsigned int vis_read_bmask(void); |
| 1685 | ! |
| 1686 | .inline vis_read_bmask,0 |
| 1687 | rd %gsr,%o0 |
| 1688 | srlx %o0,32,%o0 |
| 1689 | .end |
| 1690 | ! |
| 1691 | ! unsigned long long vis_read_gsr64(void); |
| 1692 | ! |
| 1693 | .inline vis_read_gsr64,0 |
| 1694 | rd %gsr,%o1 |
| 1695 | srlx %o1,32,%o0 |
| 1696 | .end |
| 1697 | ! |
| 1698 | ! void vis_write_gsr64(unsigned long long /* GSR */); |
| 1699 | ! |
| 1700 | .inline vis_write_gsr64,8 |
| 1701 | sllx %o0,32,%o0 |
| 1702 | srl %o1,0,%o1 ! clear the most significant 32 bits of %o1 |
| 1703 | or %o0,%o1,%o3 ! join %o0 and %o1 into %o3 |
| 1704 | wr %g0,%o3,%gsr |
| 1705 | .end |