| Colin Cross | 07a5832 | 2022-02-08 19:45:27 -0800 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI_LINUX_PSCI_H |
| 20 | #define _UAPI_LINUX_PSCI_H |
| 21 | #define PSCI_0_2_FN_BASE 0x84000000 |
| 22 | #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) |
| 23 | #define PSCI_0_2_64BIT 0x40000000 |
| 24 | #define PSCI_0_2_FN64_BASE (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) |
| 25 | #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) |
| 26 | #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) |
| 27 | #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) |
| 28 | #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) |
| 29 | #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) |
| 30 | #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) |
| 31 | #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) |
| 32 | #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) |
| 33 | #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) |
| 34 | #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) |
| 35 | #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) |
| 36 | #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) |
| 37 | #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) |
| 38 | #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) |
| 39 | #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) |
| 40 | #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) |
| 41 | #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) |
| 42 | #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) |
| 43 | #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) |
| 44 | #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) |
| 45 | #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) |
| 46 | #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) |
| 47 | #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff |
| 48 | #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 |
| 49 | #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 |
| 50 | #define PSCI_0_2_POWER_STATE_TYPE_MASK (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) |
| 51 | #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 |
| 52 | #define PSCI_0_2_POWER_STATE_AFFL_MASK (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) |
| 53 | #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff |
| 54 | #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 |
| 55 | #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 |
| 56 | #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) |
| 57 | #define PSCI_0_2_AFFINITY_LEVEL_ON 0 |
| 58 | #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 |
| 59 | #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 |
| 60 | #define PSCI_0_2_TOS_UP_MIGRATE 0 |
| 61 | #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 |
| 62 | #define PSCI_0_2_TOS_MP 2 |
| Jordan Demeulenaere | 2d50582 | 2022-08-11 17:20:14 +0200 | [diff] [blame] | 63 | #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 |
| 64 | #define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U |
| Colin Cross | 07a5832 | 2022-02-08 19:45:27 -0800 | [diff] [blame] | 65 | #define PSCI_VERSION_MAJOR_SHIFT 16 |
| 66 | #define PSCI_VERSION_MINOR_MASK ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) |
| 67 | #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK |
| 68 | #define PSCI_VERSION_MAJOR(ver) (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) |
| 69 | #define PSCI_VERSION_MINOR(ver) ((ver) & PSCI_VERSION_MINOR_MASK) |
| 70 | #define PSCI_VERSION(maj,min) ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | ((min) & PSCI_VERSION_MINOR_MASK)) |
| 71 | #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 |
| 72 | #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) |
| 73 | #define PSCI_1_0_OS_INITIATED BIT(0) |
| 74 | #define PSCI_1_0_SUSPEND_MODE_PC 0 |
| 75 | #define PSCI_1_0_SUSPEND_MODE_OSI 1 |
| 76 | #define PSCI_RET_SUCCESS 0 |
| 77 | #define PSCI_RET_NOT_SUPPORTED - 1 |
| 78 | #define PSCI_RET_INVALID_PARAMS - 2 |
| 79 | #define PSCI_RET_DENIED - 3 |
| 80 | #define PSCI_RET_ALREADY_ON - 4 |
| 81 | #define PSCI_RET_ON_PENDING - 5 |
| 82 | #define PSCI_RET_INTERNAL_FAILURE - 6 |
| 83 | #define PSCI_RET_NOT_PRESENT - 7 |
| 84 | #define PSCI_RET_DISABLED - 8 |
| 85 | #define PSCI_RET_INVALID_ADDRESS - 9 |
| 86 | #endif |