Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 1 | /* ===-------- intrin.h ---------------------------------------------------=== |
| 2 | * |
Logan Chien | df4f766 | 2019-09-04 16:45:23 -0700 | [diff] [blame] | 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | * See https://llvm.org/LICENSE.txt for license information. |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 6 | * |
| 7 | *===-----------------------------------------------------------------------=== |
| 8 | */ |
| 9 | |
| 10 | /* Only include this if we're compiling for the windows platform. */ |
| 11 | #ifndef _MSC_VER |
| 12 | #include_next <intrin.h> |
| 13 | #else |
| 14 | |
| 15 | #ifndef __INTRIN_H |
| 16 | #define __INTRIN_H |
| 17 | |
| 18 | /* First include the standard intrinsics. */ |
| 19 | #if defined(__i386__) || defined(__x86_64__) |
| 20 | #include <x86intrin.h> |
| 21 | #endif |
| 22 | |
| 23 | #if defined(__arm__) |
| 24 | #include <armintr.h> |
| 25 | #endif |
| 26 | |
| 27 | #if defined(__aarch64__) |
| 28 | #include <arm64intr.h> |
| 29 | #endif |
| 30 | |
| 31 | /* For the definition of jmp_buf. */ |
| 32 | #if __STDC_HOSTED__ |
| 33 | #include <setjmp.h> |
| 34 | #endif |
| 35 | |
| 36 | /* Define the default attributes for the functions in this file. */ |
| 37 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) |
| 38 | |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 39 | #if __x86_64__ |
| 40 | #define __LPTRINT_TYPE__ __int64 |
| 41 | #else |
| 42 | #define __LPTRINT_TYPE__ long |
| 43 | #endif |
| 44 | |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 45 | #ifdef __cplusplus |
| 46 | extern "C" { |
| 47 | #endif |
| 48 | |
| 49 | #if defined(__MMX__) |
| 50 | /* And the random ones that aren't in those files. */ |
| 51 | __m64 _m_from_float(float); |
| 52 | float _m_to_float(__m64); |
| 53 | #endif |
| 54 | |
| 55 | /* Other assorted instruction intrinsics. */ |
| 56 | void __addfsbyte(unsigned long, unsigned char); |
| 57 | void __addfsdword(unsigned long, unsigned long); |
| 58 | void __addfsword(unsigned long, unsigned short); |
| 59 | void __code_seg(const char *); |
| 60 | static __inline__ |
| 61 | void __cpuid(int[4], int); |
| 62 | static __inline__ |
| 63 | void __cpuidex(int[4], int, int); |
| 64 | static __inline__ |
| 65 | __int64 __emul(int, int); |
| 66 | static __inline__ |
| 67 | unsigned __int64 __emulu(unsigned int, unsigned int); |
| 68 | unsigned int __getcallerseflags(void); |
| 69 | static __inline__ |
| 70 | void __halt(void); |
| 71 | unsigned char __inbyte(unsigned short); |
| 72 | void __inbytestring(unsigned short, unsigned char *, unsigned long); |
| 73 | void __incfsbyte(unsigned long); |
| 74 | void __incfsdword(unsigned long); |
| 75 | void __incfsword(unsigned long); |
| 76 | unsigned long __indword(unsigned short); |
| 77 | void __indwordstring(unsigned short, unsigned long *, unsigned long); |
| 78 | void __int2c(void); |
| 79 | void __invlpg(void *); |
| 80 | unsigned short __inword(unsigned short); |
| 81 | void __inwordstring(unsigned short, unsigned short *, unsigned long); |
| 82 | void __lidt(void *); |
| 83 | unsigned __int64 __ll_lshift(unsigned __int64, int); |
| 84 | __int64 __ll_rshift(__int64, int); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 85 | static __inline__ |
| 86 | void __movsb(unsigned char *, unsigned char const *, size_t); |
| 87 | static __inline__ |
| 88 | void __movsd(unsigned long *, unsigned long const *, size_t); |
| 89 | static __inline__ |
| 90 | void __movsw(unsigned short *, unsigned short const *, size_t); |
| 91 | static __inline__ |
| 92 | void __nop(void); |
| 93 | void __nvreg_restore_fence(void); |
| 94 | void __nvreg_save_fence(void); |
| 95 | void __outbyte(unsigned short, unsigned char); |
| 96 | void __outbytestring(unsigned short, unsigned char *, unsigned long); |
| 97 | void __outdword(unsigned short, unsigned long); |
| 98 | void __outdwordstring(unsigned short, unsigned long *, unsigned long); |
| 99 | void __outword(unsigned short, unsigned short); |
| 100 | void __outwordstring(unsigned short, unsigned short *, unsigned long); |
| 101 | unsigned long __readcr0(void); |
| 102 | unsigned long __readcr2(void); |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 103 | unsigned __LPTRINT_TYPE__ __readcr3(void); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 104 | unsigned long __readcr4(void); |
| 105 | unsigned long __readcr8(void); |
| 106 | unsigned int __readdr(unsigned int); |
| 107 | #ifdef __i386__ |
| 108 | static __inline__ |
| 109 | unsigned char __readfsbyte(unsigned long); |
| 110 | static __inline__ |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 111 | unsigned short __readfsword(unsigned long); |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 112 | static __inline__ |
| 113 | unsigned long __readfsdword(unsigned long); |
| 114 | static __inline__ |
| 115 | unsigned __int64 __readfsqword(unsigned long); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 116 | #endif |
| 117 | static __inline__ |
| 118 | unsigned __int64 __readmsr(unsigned long); |
| 119 | unsigned __int64 __readpmc(unsigned long); |
| 120 | unsigned long __segmentlimit(unsigned long); |
| 121 | void __sidt(void *); |
| 122 | static __inline__ |
| 123 | void __stosb(unsigned char *, unsigned char, size_t); |
| 124 | static __inline__ |
| 125 | void __stosd(unsigned long *, unsigned long, size_t); |
| 126 | static __inline__ |
| 127 | void __stosw(unsigned short *, unsigned short, size_t); |
| 128 | void __svm_clgi(void); |
| 129 | void __svm_invlpga(void *, int); |
| 130 | void __svm_skinit(int); |
| 131 | void __svm_stgi(void); |
| 132 | void __svm_vmload(size_t); |
| 133 | void __svm_vmrun(size_t); |
| 134 | void __svm_vmsave(size_t); |
| 135 | void __ud2(void); |
| 136 | unsigned __int64 __ull_rshift(unsigned __int64, int); |
| 137 | void __vmx_off(void); |
| 138 | void __vmx_vmptrst(unsigned __int64 *); |
| 139 | void __wbinvd(void); |
| 140 | void __writecr0(unsigned int); |
| 141 | static __inline__ |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 142 | void __writecr3(unsigned __INTPTR_TYPE__); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 143 | void __writecr4(unsigned int); |
| 144 | void __writecr8(unsigned int); |
| 145 | void __writedr(unsigned int, unsigned int); |
| 146 | void __writefsbyte(unsigned long, unsigned char); |
| 147 | void __writefsdword(unsigned long, unsigned long); |
| 148 | void __writefsqword(unsigned long, unsigned __int64); |
| 149 | void __writefsword(unsigned long, unsigned short); |
| 150 | void __writemsr(unsigned long, unsigned __int64); |
| 151 | static __inline__ |
| 152 | void *_AddressOfReturnAddress(void); |
| 153 | static __inline__ |
| 154 | unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask); |
| 155 | static __inline__ |
| 156 | unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask); |
| 157 | unsigned char _bittest(long const *, long); |
| 158 | unsigned char _bittestandcomplement(long *, long); |
| 159 | unsigned char _bittestandreset(long *, long); |
| 160 | unsigned char _bittestandset(long *, long); |
| 161 | void __cdecl _disable(void); |
| 162 | void __cdecl _enable(void); |
| 163 | long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value); |
| 164 | unsigned char _interlockedbittestandreset(long volatile *, long); |
| 165 | unsigned char _interlockedbittestandset(long volatile *, long); |
| 166 | void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *, |
| 167 | void *); |
| 168 | void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *, |
| 169 | void *); |
| 170 | long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long); |
| 171 | long _InterlockedExchangeAdd_HLERelease(long volatile *, long); |
| 172 | __int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64); |
| 173 | __int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 174 | static __inline__ void |
| 175 | __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) |
| 176 | _ReadBarrier(void); |
| 177 | static __inline__ void |
| 178 | __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) |
| 179 | _ReadWriteBarrier(void); |
| 180 | unsigned int _rorx_u32(unsigned int, const unsigned int); |
| 181 | int _sarx_i32(int, unsigned int); |
| 182 | #if __STDC_HOSTED__ |
| 183 | int __cdecl _setjmp(jmp_buf); |
| 184 | #endif |
| 185 | unsigned int _shlx_u32(unsigned int, unsigned int); |
| 186 | unsigned int _shrx_u32(unsigned int, unsigned int); |
| 187 | void _Store_HLERelease(long volatile *, long); |
| 188 | void _Store64_HLERelease(__int64 volatile *, __int64); |
| 189 | void _StorePointer_HLERelease(void *volatile *, void *); |
| 190 | static __inline__ void |
| 191 | __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) |
| 192 | _WriteBarrier(void); |
| 193 | unsigned __int32 xbegin(void); |
| 194 | void _xend(void); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 195 | |
| 196 | /* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */ |
| 197 | #ifdef __x86_64__ |
| 198 | void __addgsbyte(unsigned long, unsigned char); |
| 199 | void __addgsdword(unsigned long, unsigned long); |
| 200 | void __addgsqword(unsigned long, unsigned __int64); |
| 201 | void __addgsword(unsigned long, unsigned short); |
| 202 | static __inline__ |
| 203 | void __faststorefence(void); |
| 204 | void __incgsbyte(unsigned long); |
| 205 | void __incgsdword(unsigned long); |
| 206 | void __incgsqword(unsigned long); |
| 207 | void __incgsword(unsigned long); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 208 | static __inline__ |
| 209 | void __movsq(unsigned long long *, unsigned long long const *, size_t); |
| 210 | static __inline__ |
| 211 | unsigned char __readgsbyte(unsigned long); |
| 212 | static __inline__ |
| 213 | unsigned long __readgsdword(unsigned long); |
| 214 | static __inline__ |
| 215 | unsigned __int64 __readgsqword(unsigned long); |
| 216 | unsigned short __readgsword(unsigned long); |
| 217 | unsigned __int64 __shiftleft128(unsigned __int64 _LowPart, |
| 218 | unsigned __int64 _HighPart, |
| 219 | unsigned char _Shift); |
| 220 | unsigned __int64 __shiftright128(unsigned __int64 _LowPart, |
| 221 | unsigned __int64 _HighPart, |
| 222 | unsigned char _Shift); |
| 223 | static __inline__ |
| 224 | void __stosq(unsigned __int64 *, unsigned __int64, size_t); |
| 225 | unsigned char __vmx_on(unsigned __int64 *); |
| 226 | unsigned char __vmx_vmclear(unsigned __int64 *); |
| 227 | unsigned char __vmx_vmlaunch(void); |
| 228 | unsigned char __vmx_vmptrld(unsigned __int64 *); |
| 229 | unsigned char __vmx_vmread(size_t, size_t *); |
| 230 | unsigned char __vmx_vmresume(void); |
| 231 | unsigned char __vmx_vmwrite(size_t, size_t); |
| 232 | void __writegsbyte(unsigned long, unsigned char); |
| 233 | void __writegsdword(unsigned long, unsigned long); |
| 234 | void __writegsqword(unsigned long, unsigned __int64); |
| 235 | void __writegsword(unsigned long, unsigned short); |
| 236 | unsigned char _bittest64(__int64 const *, __int64); |
| 237 | unsigned char _bittestandcomplement64(__int64 *, __int64); |
| 238 | unsigned char _bittestandreset64(__int64 *, __int64); |
| 239 | unsigned char _bittestandset64(__int64 *, __int64); |
| 240 | long _InterlockedAnd_np(long volatile *_Value, long _Mask); |
| 241 | short _InterlockedAnd16_np(short volatile *_Value, short _Mask); |
| 242 | __int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask); |
| 243 | char _InterlockedAnd8_np(char volatile *_Value, char _Mask); |
| 244 | unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64); |
| 245 | unsigned char _interlockedbittestandset64(__int64 volatile *, __int64); |
| 246 | long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange, |
| 247 | long _Comparand); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 248 | unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination, |
| 249 | __int64 _ExchangeHigh, |
| 250 | __int64 _ExchangeLow, |
| 251 | __int64 *_ComparandResult); |
| 252 | short _InterlockedCompareExchange16_np(short volatile *_Destination, |
| 253 | short _Exchange, short _Comparand); |
| 254 | __int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination, |
| 255 | __int64 _Exchange, __int64 _Comparand); |
| 256 | void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination, |
| 257 | void *_Exchange, void *_Comparand); |
| 258 | long _InterlockedOr_np(long volatile *_Value, long _Mask); |
| 259 | short _InterlockedOr16_np(short volatile *_Value, short _Mask); |
| 260 | __int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask); |
| 261 | char _InterlockedOr8_np(char volatile *_Value, char _Mask); |
| 262 | long _InterlockedXor_np(long volatile *_Value, long _Mask); |
| 263 | short _InterlockedXor16_np(short volatile *_Value, short _Mask); |
| 264 | __int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask); |
| 265 | char _InterlockedXor8_np(char volatile *_Value, char _Mask); |
| 266 | unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int); |
| 267 | __int64 _sarx_i64(__int64, unsigned int); |
| 268 | unsigned __int64 _shlx_u64(unsigned __int64, unsigned int); |
| 269 | unsigned __int64 _shrx_u64(unsigned __int64, unsigned int); |
| 270 | static __inline__ |
| 271 | __int64 __mulh(__int64, __int64); |
| 272 | static __inline__ |
| 273 | unsigned __int64 __umulh(unsigned __int64, unsigned __int64); |
| 274 | static __inline__ |
| 275 | __int64 _mul128(__int64, __int64, __int64*); |
| 276 | static __inline__ |
| 277 | unsigned __int64 _umul128(unsigned __int64, |
| 278 | unsigned __int64, |
| 279 | unsigned __int64*); |
| 280 | |
| 281 | #endif /* __x86_64__ */ |
| 282 | |
| 283 | #if defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) |
| 284 | |
| 285 | static __inline__ |
| 286 | unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask); |
| 287 | static __inline__ |
| 288 | unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask); |
| 289 | |
Sasha Smundak | 0fc590b | 2020-10-07 08:11:59 -0700 | [diff] [blame] | 290 | #endif |
| 291 | |
| 292 | #if defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 293 | static __inline__ |
| 294 | __int64 _InterlockedDecrement64(__int64 volatile *_Addend); |
| 295 | static __inline__ |
| 296 | __int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value); |
| 297 | static __inline__ |
| 298 | __int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value); |
| 299 | static __inline__ |
| 300 | __int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value); |
| 301 | static __inline__ |
| 302 | __int64 _InterlockedIncrement64(__int64 volatile *_Addend); |
| 303 | static __inline__ |
| 304 | __int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask); |
| 305 | static __inline__ |
| 306 | __int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask); |
| 307 | static __inline__ |
| 308 | __int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask); |
| 309 | |
| 310 | #endif |
| 311 | |
| 312 | /*----------------------------------------------------------------------------*\ |
| 313 | |* Interlocked Exchange Add |
| 314 | \*----------------------------------------------------------------------------*/ |
| 315 | #if defined(__arm__) || defined(__aarch64__) |
| 316 | char _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value); |
| 317 | char _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value); |
| 318 | char _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value); |
| 319 | short _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value); |
| 320 | short _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value); |
| 321 | short _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value); |
| 322 | long _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value); |
| 323 | long _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value); |
| 324 | long _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value); |
| 325 | __int64 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, __int64 _Value); |
| 326 | __int64 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value); |
| 327 | __int64 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, __int64 _Value); |
| 328 | #endif |
| 329 | /*----------------------------------------------------------------------------*\ |
| 330 | |* Interlocked Increment |
| 331 | \*----------------------------------------------------------------------------*/ |
| 332 | #if defined(__arm__) || defined(__aarch64__) |
| 333 | short _InterlockedIncrement16_acq(short volatile *_Value); |
| 334 | short _InterlockedIncrement16_nf(short volatile *_Value); |
| 335 | short _InterlockedIncrement16_rel(short volatile *_Value); |
| 336 | long _InterlockedIncrement_acq(long volatile *_Value); |
| 337 | long _InterlockedIncrement_nf(long volatile *_Value); |
| 338 | long _InterlockedIncrement_rel(long volatile *_Value); |
| 339 | __int64 _InterlockedIncrement64_acq(__int64 volatile *_Value); |
| 340 | __int64 _InterlockedIncrement64_nf(__int64 volatile *_Value); |
| 341 | __int64 _InterlockedIncrement64_rel(__int64 volatile *_Value); |
| 342 | #endif |
| 343 | /*----------------------------------------------------------------------------*\ |
| 344 | |* Interlocked Decrement |
| 345 | \*----------------------------------------------------------------------------*/ |
| 346 | #if defined(__arm__) || defined(__aarch64__) |
| 347 | short _InterlockedDecrement16_acq(short volatile *_Value); |
| 348 | short _InterlockedDecrement16_nf(short volatile *_Value); |
| 349 | short _InterlockedDecrement16_rel(short volatile *_Value); |
| 350 | long _InterlockedDecrement_acq(long volatile *_Value); |
| 351 | long _InterlockedDecrement_nf(long volatile *_Value); |
| 352 | long _InterlockedDecrement_rel(long volatile *_Value); |
| 353 | __int64 _InterlockedDecrement64_acq(__int64 volatile *_Value); |
| 354 | __int64 _InterlockedDecrement64_nf(__int64 volatile *_Value); |
| 355 | __int64 _InterlockedDecrement64_rel(__int64 volatile *_Value); |
| 356 | #endif |
| 357 | /*----------------------------------------------------------------------------*\ |
| 358 | |* Interlocked And |
| 359 | \*----------------------------------------------------------------------------*/ |
| 360 | #if defined(__arm__) || defined(__aarch64__) |
| 361 | char _InterlockedAnd8_acq(char volatile *_Value, char _Mask); |
| 362 | char _InterlockedAnd8_nf(char volatile *_Value, char _Mask); |
| 363 | char _InterlockedAnd8_rel(char volatile *_Value, char _Mask); |
| 364 | short _InterlockedAnd16_acq(short volatile *_Value, short _Mask); |
| 365 | short _InterlockedAnd16_nf(short volatile *_Value, short _Mask); |
| 366 | short _InterlockedAnd16_rel(short volatile *_Value, short _Mask); |
| 367 | long _InterlockedAnd_acq(long volatile *_Value, long _Mask); |
| 368 | long _InterlockedAnd_nf(long volatile *_Value, long _Mask); |
| 369 | long _InterlockedAnd_rel(long volatile *_Value, long _Mask); |
| 370 | __int64 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask); |
| 371 | __int64 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask); |
| 372 | __int64 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask); |
| 373 | #endif |
| 374 | /*----------------------------------------------------------------------------*\ |
| 375 | |* Bit Counting and Testing |
| 376 | \*----------------------------------------------------------------------------*/ |
| 377 | #if defined(__arm__) || defined(__aarch64__) |
| 378 | unsigned char _interlockedbittestandset_acq(long volatile *_BitBase, |
| 379 | long _BitPos); |
| 380 | unsigned char _interlockedbittestandset_nf(long volatile *_BitBase, |
| 381 | long _BitPos); |
| 382 | unsigned char _interlockedbittestandset_rel(long volatile *_BitBase, |
| 383 | long _BitPos); |
| 384 | unsigned char _interlockedbittestandreset_acq(long volatile *_BitBase, |
| 385 | long _BitPos); |
| 386 | unsigned char _interlockedbittestandreset_nf(long volatile *_BitBase, |
| 387 | long _BitPos); |
| 388 | unsigned char _interlockedbittestandreset_rel(long volatile *_BitBase, |
| 389 | long _BitPos); |
| 390 | #endif |
| 391 | /*----------------------------------------------------------------------------*\ |
| 392 | |* Interlocked Or |
| 393 | \*----------------------------------------------------------------------------*/ |
| 394 | #if defined(__arm__) || defined(__aarch64__) |
| 395 | char _InterlockedOr8_acq(char volatile *_Value, char _Mask); |
| 396 | char _InterlockedOr8_nf(char volatile *_Value, char _Mask); |
| 397 | char _InterlockedOr8_rel(char volatile *_Value, char _Mask); |
| 398 | short _InterlockedOr16_acq(short volatile *_Value, short _Mask); |
| 399 | short _InterlockedOr16_nf(short volatile *_Value, short _Mask); |
| 400 | short _InterlockedOr16_rel(short volatile *_Value, short _Mask); |
| 401 | long _InterlockedOr_acq(long volatile *_Value, long _Mask); |
| 402 | long _InterlockedOr_nf(long volatile *_Value, long _Mask); |
| 403 | long _InterlockedOr_rel(long volatile *_Value, long _Mask); |
| 404 | __int64 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask); |
| 405 | __int64 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask); |
| 406 | __int64 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask); |
| 407 | #endif |
| 408 | /*----------------------------------------------------------------------------*\ |
| 409 | |* Interlocked Xor |
| 410 | \*----------------------------------------------------------------------------*/ |
| 411 | #if defined(__arm__) || defined(__aarch64__) |
| 412 | char _InterlockedXor8_acq(char volatile *_Value, char _Mask); |
| 413 | char _InterlockedXor8_nf(char volatile *_Value, char _Mask); |
| 414 | char _InterlockedXor8_rel(char volatile *_Value, char _Mask); |
| 415 | short _InterlockedXor16_acq(short volatile *_Value, short _Mask); |
| 416 | short _InterlockedXor16_nf(short volatile *_Value, short _Mask); |
| 417 | short _InterlockedXor16_rel(short volatile *_Value, short _Mask); |
| 418 | long _InterlockedXor_acq(long volatile *_Value, long _Mask); |
| 419 | long _InterlockedXor_nf(long volatile *_Value, long _Mask); |
| 420 | long _InterlockedXor_rel(long volatile *_Value, long _Mask); |
| 421 | __int64 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask); |
| 422 | __int64 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask); |
| 423 | __int64 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask); |
| 424 | #endif |
| 425 | /*----------------------------------------------------------------------------*\ |
| 426 | |* Interlocked Exchange |
| 427 | \*----------------------------------------------------------------------------*/ |
| 428 | #if defined(__arm__) || defined(__aarch64__) |
| 429 | char _InterlockedExchange8_acq(char volatile *_Target, char _Value); |
| 430 | char _InterlockedExchange8_nf(char volatile *_Target, char _Value); |
| 431 | char _InterlockedExchange8_rel(char volatile *_Target, char _Value); |
| 432 | short _InterlockedExchange16_acq(short volatile *_Target, short _Value); |
| 433 | short _InterlockedExchange16_nf(short volatile *_Target, short _Value); |
| 434 | short _InterlockedExchange16_rel(short volatile *_Target, short _Value); |
| 435 | long _InterlockedExchange_acq(long volatile *_Target, long _Value); |
| 436 | long _InterlockedExchange_nf(long volatile *_Target, long _Value); |
| 437 | long _InterlockedExchange_rel(long volatile *_Target, long _Value); |
| 438 | __int64 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value); |
| 439 | __int64 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value); |
| 440 | __int64 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value); |
| 441 | #endif |
| 442 | /*----------------------------------------------------------------------------*\ |
| 443 | |* Interlocked Compare Exchange |
| 444 | \*----------------------------------------------------------------------------*/ |
| 445 | #if defined(__arm__) || defined(__aarch64__) |
| 446 | char _InterlockedCompareExchange8_acq(char volatile *_Destination, |
| 447 | char _Exchange, char _Comparand); |
| 448 | char _InterlockedCompareExchange8_nf(char volatile *_Destination, |
| 449 | char _Exchange, char _Comparand); |
| 450 | char _InterlockedCompareExchange8_rel(char volatile *_Destination, |
| 451 | char _Exchange, char _Comparand); |
| 452 | short _InterlockedCompareExchange16_acq(short volatile *_Destination, |
| 453 | short _Exchange, short _Comparand); |
| 454 | short _InterlockedCompareExchange16_nf(short volatile *_Destination, |
| 455 | short _Exchange, short _Comparand); |
| 456 | short _InterlockedCompareExchange16_rel(short volatile *_Destination, |
| 457 | short _Exchange, short _Comparand); |
| 458 | long _InterlockedCompareExchange_acq(long volatile *_Destination, |
| 459 | long _Exchange, long _Comparand); |
| 460 | long _InterlockedCompareExchange_nf(long volatile *_Destination, |
| 461 | long _Exchange, long _Comparand); |
| 462 | long _InterlockedCompareExchange_rel(long volatile *_Destination, |
| 463 | long _Exchange, long _Comparand); |
| 464 | __int64 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination, |
| 465 | __int64 _Exchange, __int64 _Comparand); |
| 466 | __int64 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination, |
| 467 | __int64 _Exchange, __int64 _Comparand); |
| 468 | __int64 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination, |
| 469 | __int64 _Exchange, __int64 _Comparand); |
| 470 | #endif |
Pirama Arumuga Nainar | 986b880 | 2021-06-03 16:00:34 -0700 | [diff] [blame] | 471 | #if defined(__x86_64__) || defined(__aarch64__) |
| 472 | unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination, |
| 473 | __int64 _ExchangeHigh, |
| 474 | __int64 _ExchangeLow, |
| 475 | __int64 *_ComparandResult); |
| 476 | #endif |
| 477 | #if defined(__aarch64__) |
| 478 | unsigned char _InterlockedCompareExchange128_acq(__int64 volatile *_Destination, |
| 479 | __int64 _ExchangeHigh, |
| 480 | __int64 _ExchangeLow, |
| 481 | __int64 *_ComparandResult); |
| 482 | unsigned char _InterlockedCompareExchange128_nf(__int64 volatile *_Destination, |
| 483 | __int64 _ExchangeHigh, |
| 484 | __int64 _ExchangeLow, |
| 485 | __int64 *_ComparandResult); |
| 486 | unsigned char _InterlockedCompareExchange128_rel(__int64 volatile *_Destination, |
| 487 | __int64 _ExchangeHigh, |
| 488 | __int64 _ExchangeLow, |
| 489 | __int64 *_ComparandResult); |
| 490 | #endif |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 491 | |
| 492 | /*----------------------------------------------------------------------------*\ |
| 493 | |* movs, stos |
| 494 | \*----------------------------------------------------------------------------*/ |
| 495 | #if defined(__i386__) || defined(__x86_64__) |
| 496 | static __inline__ void __DEFAULT_FN_ATTRS |
| 497 | __movsb(unsigned char *__dst, unsigned char const *__src, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 498 | #if defined(__x86_64__) |
| 499 | __asm__ __volatile__("rep movsb" |
| 500 | : "+D"(__dst), "+S"(__src), "+c"(__n) |
| 501 | : |
| 502 | : "memory"); |
| 503 | #else |
| 504 | __asm__ __volatile__("xchg %%esi, %1\nrep movsb\nxchg %%esi, %1" |
| 505 | : "+D"(__dst), "+r"(__src), "+c"(__n) |
| 506 | : |
| 507 | : "memory"); |
| 508 | #endif |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 509 | } |
| 510 | static __inline__ void __DEFAULT_FN_ATTRS |
| 511 | __movsd(unsigned long *__dst, unsigned long const *__src, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 512 | #if defined(__x86_64__) |
| 513 | __asm__ __volatile__("rep movsl" |
| 514 | : "+D"(__dst), "+S"(__src), "+c"(__n) |
| 515 | : |
| 516 | : "memory"); |
| 517 | #else |
| 518 | __asm__ __volatile__("xchg %%esi, %1\nrep movsl\nxchg %%esi, %1" |
| 519 | : "+D"(__dst), "+r"(__src), "+c"(__n) |
| 520 | : |
| 521 | : "memory"); |
| 522 | #endif |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 523 | } |
| 524 | static __inline__ void __DEFAULT_FN_ATTRS |
| 525 | __movsw(unsigned short *__dst, unsigned short const *__src, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 526 | #if defined(__x86_64__) |
| 527 | __asm__ __volatile__("rep movsw" |
| 528 | : "+D"(__dst), "+S"(__src), "+c"(__n) |
| 529 | : |
| 530 | : "memory"); |
| 531 | #else |
| 532 | __asm__ __volatile__("xchg %%esi, %1\nrep movsw\nxchg %%esi, %1" |
| 533 | : "+D"(__dst), "+r"(__src), "+c"(__n) |
| 534 | : |
| 535 | : "memory"); |
| 536 | #endif |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 537 | } |
| 538 | static __inline__ void __DEFAULT_FN_ATTRS |
| 539 | __stosd(unsigned long *__dst, unsigned long __x, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 540 | __asm__ __volatile__("rep stosl" |
| 541 | : "+D"(__dst), "+c"(__n) |
| 542 | : "a"(__x) |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 543 | : "memory"); |
| 544 | } |
| 545 | static __inline__ void __DEFAULT_FN_ATTRS |
| 546 | __stosw(unsigned short *__dst, unsigned short __x, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 547 | __asm__ __volatile__("rep stosw" |
| 548 | : "+D"(__dst), "+c"(__n) |
| 549 | : "a"(__x) |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 550 | : "memory"); |
| 551 | } |
| 552 | #endif |
| 553 | #ifdef __x86_64__ |
| 554 | static __inline__ void __DEFAULT_FN_ATTRS |
| 555 | __movsq(unsigned long long *__dst, unsigned long long const *__src, size_t __n) { |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 556 | __asm__ __volatile__("rep movsq" |
| 557 | : "+D"(__dst), "+S"(__src), "+c"(__n) |
| 558 | : |
| 559 | : "memory"); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 560 | } |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 561 | static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned __int64 *__dst, |
| 562 | unsigned __int64 __x, |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 563 | static __inline__ void __DEFAULT_FN_ATTRS |
| 564 | __stosq(unsigned __int64 *__dst, unsigned __int64 __x, size_t __n) { |
| 565 | __asm__ __volatile__("rep stosq" : "+D"(__dst), "+c"(__n) : "a"(__x) |
| 566 | : "memory"); |
| 567 | } |
| 568 | #endif |
| 569 | |
| 570 | /*----------------------------------------------------------------------------*\ |
| 571 | |* Misc |
| 572 | \*----------------------------------------------------------------------------*/ |
| 573 | #if defined(__i386__) || defined(__x86_64__) |
Pirama Arumuga Nainar | 7e1f839 | 2021-08-16 17:30:48 -0700 | [diff] [blame] | 574 | #if defined(__i386__) |
| 575 | #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \ |
| 576 | __asm("cpuid" \ |
| 577 | : "=a"(__eax), "=b"(__ebx), "=c"(__ecx), "=d"(__edx) \ |
| 578 | : "0"(__leaf), "2"(__count)) |
| 579 | #else |
| 580 | /* x86-64 uses %rbx as the base register, so preserve it. */ |
| 581 | #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \ |
| 582 | __asm("xchgq %%rbx,%q1\n" \ |
| 583 | "cpuid\n" \ |
| 584 | "xchgq %%rbx,%q1" \ |
| 585 | : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \ |
| 586 | : "0"(__leaf), "2"(__count)) |
| 587 | #endif |
| 588 | static __inline__ void __DEFAULT_FN_ATTRS __cpuid(int __info[4], int __level) { |
| 589 | __cpuid_count(__level, 0, __info[0], __info[1], __info[2], __info[3]); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 590 | } |
Pirama Arumuga Nainar | 7e1f839 | 2021-08-16 17:30:48 -0700 | [diff] [blame] | 591 | static __inline__ void __DEFAULT_FN_ATTRS __cpuidex(int __info[4], int __level, |
| 592 | int __ecx) { |
| 593 | __cpuid_count(__level, __ecx, __info[0], __info[1], __info[2], __info[3]); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 594 | } |
Pirama Arumuga Nainar | 7e1f839 | 2021-08-16 17:30:48 -0700 | [diff] [blame] | 595 | static __inline__ void __DEFAULT_FN_ATTRS __halt(void) { |
| 596 | __asm__ volatile("hlt"); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 597 | } |
Logan Chien | dbcf412 | 2019-03-21 10:50:25 +0800 | [diff] [blame] | 598 | #endif |
| 599 | |
| 600 | #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) |
Pirama Arumuga Nainar | 7e1f839 | 2021-08-16 17:30:48 -0700 | [diff] [blame] | 601 | static __inline__ void __DEFAULT_FN_ATTRS __nop(void) { |
| 602 | __asm__ volatile("nop"); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 603 | } |
| 604 | #endif |
| 605 | |
| 606 | /*----------------------------------------------------------------------------*\ |
| 607 | |* MS AArch64 specific |
| 608 | \*----------------------------------------------------------------------------*/ |
| 609 | #if defined(__aarch64__) |
| 610 | unsigned __int64 __getReg(int); |
| 611 | long _InterlockedAdd(long volatile *Addend, long Value); |
Logan Chien | dbcf412 | 2019-03-21 10:50:25 +0800 | [diff] [blame] | 612 | __int64 _ReadStatusReg(int); |
| 613 | void _WriteStatusReg(int, __int64); |
| 614 | |
| 615 | unsigned short __cdecl _byteswap_ushort(unsigned short val); |
| 616 | unsigned long __cdecl _byteswap_ulong (unsigned long val); |
| 617 | unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val); |
Pirama Arumuga Nainar | 494f645 | 2021-12-02 10:42:14 -0800 | [diff] [blame^] | 618 | |
| 619 | __int64 __mulh(__int64 __a, __int64 __b); |
| 620 | unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 621 | #endif |
| 622 | |
| 623 | /*----------------------------------------------------------------------------*\ |
| 624 | |* Privileged intrinsics |
| 625 | \*----------------------------------------------------------------------------*/ |
| 626 | #if defined(__i386__) || defined(__x86_64__) |
| 627 | static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS |
| 628 | __readmsr(unsigned long __register) { |
| 629 | // Loads the contents of a 64-bit model specific register (MSR) specified in |
| 630 | // the ECX register into registers EDX:EAX. The EDX register is loaded with |
| 631 | // the high-order 32 bits of the MSR and the EAX register is loaded with the |
| 632 | // low-order 32 bits. If less than 64 bits are implemented in the MSR being |
| 633 | // read, the values returned to EDX:EAX in unimplemented bit locations are |
| 634 | // undefined. |
| 635 | unsigned long __edx; |
| 636 | unsigned long __eax; |
| 637 | __asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register)); |
| 638 | return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax; |
| 639 | } |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 640 | #endif |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 641 | |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 642 | static __inline__ unsigned __LPTRINT_TYPE__ __DEFAULT_FN_ATTRS |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 643 | __readcr3(void) { |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 644 | unsigned __LPTRINT_TYPE__ __cr3_val; |
| 645 | __asm__ __volatile__ ("mov %%cr3, %0" : "=r"(__cr3_val) : : "memory"); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 646 | return __cr3_val; |
| 647 | } |
| 648 | |
| 649 | static __inline__ void __DEFAULT_FN_ATTRS |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 650 | __writecr3(unsigned __INTPTR_TYPE__ __cr3_val) { |
| 651 | __asm__ ("mov %0, %%cr3" : : "r"(__cr3_val) : "memory"); |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 652 | } |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 653 | |
| 654 | #ifdef __cplusplus |
| 655 | } |
| 656 | #endif |
| 657 | |
Sasha Smundak | 746b022 | 2020-02-25 09:19:04 -0800 | [diff] [blame] | 658 | #undef __LPTRINT_TYPE__ |
| 659 | |
Logan Chien | 969aea6 | 2018-12-05 18:40:57 +0800 | [diff] [blame] | 660 | #undef __DEFAULT_FN_ATTRS |
| 661 | |
| 662 | #endif /* __INTRIN_H */ |
| 663 | #endif /* _MSC_VER */ |