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Logan Chien2833ffb2018-10-09 10:03:24 +08001/*===---- avx512dqintrin.h - AVX512DQ intrinsics ---------------------------===
2 *
Logan Chiendf4f7662019-09-04 16:45:23 -07003 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Logan Chien2833ffb2018-10-09 10:03:24 +08006 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error "Never use <avx512dqintrin.h> directly; include <immintrin.h> instead."
12#endif
13
14#ifndef __AVX512DQINTRIN_H
15#define __AVX512DQINTRIN_H
16
17/* Define the default attributes for the functions in this file. */
Logan Chienb0c84022018-11-09 16:19:54 +080018#define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"), __min_vector_width__(512)))
19#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq")))
Logan Chien2833ffb2018-10-09 10:03:24 +080020
Logan Chienb0c84022018-11-09 16:19:54 +080021static __inline __mmask8 __DEFAULT_FN_ATTRS
22_knot_mask8(__mmask8 __M)
23{
24 return __builtin_ia32_knotqi(__M);
25}
26
27static __inline__ __mmask8 __DEFAULT_FN_ATTRS
28_kand_mask8(__mmask8 __A, __mmask8 __B)
29{
30 return (__mmask8)__builtin_ia32_kandqi((__mmask8)__A, (__mmask8)__B);
31}
32
33static __inline__ __mmask8 __DEFAULT_FN_ATTRS
34_kandn_mask8(__mmask8 __A, __mmask8 __B)
35{
36 return (__mmask8)__builtin_ia32_kandnqi((__mmask8)__A, (__mmask8)__B);
37}
38
39static __inline__ __mmask8 __DEFAULT_FN_ATTRS
40_kor_mask8(__mmask8 __A, __mmask8 __B)
41{
42 return (__mmask8)__builtin_ia32_korqi((__mmask8)__A, (__mmask8)__B);
43}
44
45static __inline__ __mmask8 __DEFAULT_FN_ATTRS
46_kxnor_mask8(__mmask8 __A, __mmask8 __B)
47{
48 return (__mmask8)__builtin_ia32_kxnorqi((__mmask8)__A, (__mmask8)__B);
49}
50
51static __inline__ __mmask8 __DEFAULT_FN_ATTRS
52_kxor_mask8(__mmask8 __A, __mmask8 __B)
53{
54 return (__mmask8)__builtin_ia32_kxorqi((__mmask8)__A, (__mmask8)__B);
55}
56
57static __inline__ unsigned char __DEFAULT_FN_ATTRS
58_kortestc_mask8_u8(__mmask8 __A, __mmask8 __B)
59{
60 return (unsigned char)__builtin_ia32_kortestcqi(__A, __B);
61}
62
63static __inline__ unsigned char __DEFAULT_FN_ATTRS
64_kortestz_mask8_u8(__mmask8 __A, __mmask8 __B)
65{
66 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);
67}
68
69static __inline__ unsigned char __DEFAULT_FN_ATTRS
70_kortest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {
71 *__C = (unsigned char)__builtin_ia32_kortestcqi(__A, __B);
72 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);
73}
74
75static __inline__ unsigned char __DEFAULT_FN_ATTRS
76_ktestc_mask8_u8(__mmask8 __A, __mmask8 __B)
77{
78 return (unsigned char)__builtin_ia32_ktestcqi(__A, __B);
79}
80
81static __inline__ unsigned char __DEFAULT_FN_ATTRS
82_ktestz_mask8_u8(__mmask8 __A, __mmask8 __B)
83{
84 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);
85}
86
87static __inline__ unsigned char __DEFAULT_FN_ATTRS
88_ktest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {
89 *__C = (unsigned char)__builtin_ia32_ktestcqi(__A, __B);
90 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);
91}
92
93static __inline__ unsigned char __DEFAULT_FN_ATTRS
94_ktestc_mask16_u8(__mmask16 __A, __mmask16 __B)
95{
96 return (unsigned char)__builtin_ia32_ktestchi(__A, __B);
97}
98
99static __inline__ unsigned char __DEFAULT_FN_ATTRS
100_ktestz_mask16_u8(__mmask16 __A, __mmask16 __B)
101{
102 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);
103}
104
105static __inline__ unsigned char __DEFAULT_FN_ATTRS
106_ktest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) {
107 *__C = (unsigned char)__builtin_ia32_ktestchi(__A, __B);
108 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);
109}
110
111static __inline__ __mmask8 __DEFAULT_FN_ATTRS
112_kadd_mask8(__mmask8 __A, __mmask8 __B)
113{
114 return (__mmask8)__builtin_ia32_kaddqi((__mmask8)__A, (__mmask8)__B);
115}
116
117static __inline__ __mmask16 __DEFAULT_FN_ATTRS
118_kadd_mask16(__mmask16 __A, __mmask16 __B)
119{
120 return (__mmask16)__builtin_ia32_kaddhi((__mmask16)__A, (__mmask16)__B);
121}
122
123#define _kshiftli_mask8(A, I) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800124 ((__mmask8)__builtin_ia32_kshiftliqi((__mmask8)(A), (unsigned int)(I)))
Logan Chienb0c84022018-11-09 16:19:54 +0800125
126#define _kshiftri_mask8(A, I) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800127 ((__mmask8)__builtin_ia32_kshiftriqi((__mmask8)(A), (unsigned int)(I)))
Logan Chienb0c84022018-11-09 16:19:54 +0800128
129static __inline__ unsigned int __DEFAULT_FN_ATTRS
130_cvtmask8_u32(__mmask8 __A) {
131 return (unsigned int)__builtin_ia32_kmovb((__mmask8)__A);
132}
133
134static __inline__ __mmask8 __DEFAULT_FN_ATTRS
135_cvtu32_mask8(unsigned int __A) {
136 return (__mmask8)__builtin_ia32_kmovb((__mmask8)__A);
137}
138
139static __inline__ __mmask8 __DEFAULT_FN_ATTRS
140_load_mask8(__mmask8 *__A) {
141 return (__mmask8)__builtin_ia32_kmovb(*(__mmask8 *)__A);
142}
143
144static __inline__ void __DEFAULT_FN_ATTRS
145_store_mask8(__mmask8 *__A, __mmask8 __B) {
146 *(__mmask8 *)__A = __builtin_ia32_kmovb((__mmask8)__B);
147}
148
149static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800150_mm512_mullo_epi64 (__m512i __A, __m512i __B) {
151 return (__m512i) ((__v8du) __A * (__v8du) __B);
152}
153
Logan Chienb0c84022018-11-09 16:19:54 +0800154static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800155_mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
156 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
157 (__v8di)_mm512_mullo_epi64(__A, __B),
158 (__v8di)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800159}
160
Logan Chienb0c84022018-11-09 16:19:54 +0800161static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800162_mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
163 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
164 (__v8di)_mm512_mullo_epi64(__A, __B),
165 (__v8di)_mm512_setzero_si512());
Logan Chien2833ffb2018-10-09 10:03:24 +0800166}
167
Logan Chienb0c84022018-11-09 16:19:54 +0800168static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800169_mm512_xor_pd(__m512d __A, __m512d __B) {
170 return (__m512d)((__v8du)__A ^ (__v8du)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800171}
172
Logan Chienb0c84022018-11-09 16:19:54 +0800173static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800174_mm512_mask_xor_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
175 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
176 (__v8df)_mm512_xor_pd(__A, __B),
177 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800178}
179
Logan Chienb0c84022018-11-09 16:19:54 +0800180static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800181_mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B) {
182 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
183 (__v8df)_mm512_xor_pd(__A, __B),
184 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800185}
186
Logan Chienb0c84022018-11-09 16:19:54 +0800187static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800188_mm512_xor_ps (__m512 __A, __m512 __B) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800189 return (__m512)((__v16su)__A ^ (__v16su)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800190}
191
Logan Chienb0c84022018-11-09 16:19:54 +0800192static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800193_mm512_mask_xor_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
194 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
195 (__v16sf)_mm512_xor_ps(__A, __B),
196 (__v16sf)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800197}
198
Logan Chienb0c84022018-11-09 16:19:54 +0800199static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800200_mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B) {
201 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
202 (__v16sf)_mm512_xor_ps(__A, __B),
203 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +0800204}
205
Logan Chienb0c84022018-11-09 16:19:54 +0800206static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800207_mm512_or_pd(__m512d __A, __m512d __B) {
208 return (__m512d)((__v8du)__A | (__v8du)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800209}
210
Logan Chienb0c84022018-11-09 16:19:54 +0800211static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800212_mm512_mask_or_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
213 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
214 (__v8df)_mm512_or_pd(__A, __B),
215 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800216}
217
Logan Chienb0c84022018-11-09 16:19:54 +0800218static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800219_mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B) {
220 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
221 (__v8df)_mm512_or_pd(__A, __B),
222 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800223}
224
Logan Chienb0c84022018-11-09 16:19:54 +0800225static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800226_mm512_or_ps(__m512 __A, __m512 __B) {
227 return (__m512)((__v16su)__A | (__v16su)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800228}
229
Logan Chienb0c84022018-11-09 16:19:54 +0800230static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800231_mm512_mask_or_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
232 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
233 (__v16sf)_mm512_or_ps(__A, __B),
234 (__v16sf)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800235}
236
Logan Chienb0c84022018-11-09 16:19:54 +0800237static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800238_mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B) {
239 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
240 (__v16sf)_mm512_or_ps(__A, __B),
241 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +0800242}
243
Logan Chienb0c84022018-11-09 16:19:54 +0800244static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800245_mm512_and_pd(__m512d __A, __m512d __B) {
246 return (__m512d)((__v8du)__A & (__v8du)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800247}
248
Logan Chienb0c84022018-11-09 16:19:54 +0800249static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800250_mm512_mask_and_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
251 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
252 (__v8df)_mm512_and_pd(__A, __B),
253 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800254}
255
Logan Chienb0c84022018-11-09 16:19:54 +0800256static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800257_mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B) {
258 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
259 (__v8df)_mm512_and_pd(__A, __B),
260 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800261}
262
Logan Chienb0c84022018-11-09 16:19:54 +0800263static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800264_mm512_and_ps(__m512 __A, __m512 __B) {
265 return (__m512)((__v16su)__A & (__v16su)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800266}
267
Logan Chienb0c84022018-11-09 16:19:54 +0800268static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800269_mm512_mask_and_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
270 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
271 (__v16sf)_mm512_and_ps(__A, __B),
272 (__v16sf)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800273}
274
Logan Chienb0c84022018-11-09 16:19:54 +0800275static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800276_mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B) {
277 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
278 (__v16sf)_mm512_and_ps(__A, __B),
279 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +0800280}
281
Logan Chienb0c84022018-11-09 16:19:54 +0800282static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800283_mm512_andnot_pd(__m512d __A, __m512d __B) {
284 return (__m512d)(~(__v8du)__A & (__v8du)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800285}
286
Logan Chienb0c84022018-11-09 16:19:54 +0800287static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800288_mm512_mask_andnot_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
289 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
290 (__v8df)_mm512_andnot_pd(__A, __B),
291 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800292}
293
Logan Chienb0c84022018-11-09 16:19:54 +0800294static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800295_mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B) {
296 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
297 (__v8df)_mm512_andnot_pd(__A, __B),
298 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800299}
300
Logan Chienb0c84022018-11-09 16:19:54 +0800301static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800302_mm512_andnot_ps(__m512 __A, __m512 __B) {
303 return (__m512)(~(__v16su)__A & (__v16su)__B);
Logan Chien2833ffb2018-10-09 10:03:24 +0800304}
305
Logan Chienb0c84022018-11-09 16:19:54 +0800306static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800307_mm512_mask_andnot_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
308 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
309 (__v16sf)_mm512_andnot_ps(__A, __B),
310 (__v16sf)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800311}
312
Logan Chienb0c84022018-11-09 16:19:54 +0800313static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +0800314_mm512_maskz_andnot_ps(__mmask16 __U, __m512 __A, __m512 __B) {
315 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
316 (__v16sf)_mm512_andnot_ps(__A, __B),
317 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +0800318}
319
Logan Chienb0c84022018-11-09 16:19:54 +0800320static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800321_mm512_cvtpd_epi64 (__m512d __A) {
322 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
323 (__v8di) _mm512_setzero_si512(),
324 (__mmask8) -1,
325 _MM_FROUND_CUR_DIRECTION);
326}
327
Logan Chienb0c84022018-11-09 16:19:54 +0800328static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800329_mm512_mask_cvtpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
330 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
331 (__v8di) __W,
332 (__mmask8) __U,
333 _MM_FROUND_CUR_DIRECTION);
334}
335
Logan Chienb0c84022018-11-09 16:19:54 +0800336static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800337_mm512_maskz_cvtpd_epi64 (__mmask8 __U, __m512d __A) {
338 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
339 (__v8di) _mm512_setzero_si512(),
340 (__mmask8) __U,
341 _MM_FROUND_CUR_DIRECTION);
342}
343
Logan Chien55afb0a2018-10-15 10:42:14 +0800344#define _mm512_cvt_roundpd_epi64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800345 ((__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
346 (__v8di)_mm512_setzero_si512(), \
347 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800348
Logan Chien55afb0a2018-10-15 10:42:14 +0800349#define _mm512_mask_cvt_roundpd_epi64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800350 ((__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
351 (__v8di)(__m512i)(W), \
352 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800353
Logan Chien55afb0a2018-10-15 10:42:14 +0800354#define _mm512_maskz_cvt_roundpd_epi64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800355 ((__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
356 (__v8di)_mm512_setzero_si512(), \
357 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800358
Logan Chienb0c84022018-11-09 16:19:54 +0800359static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800360_mm512_cvtpd_epu64 (__m512d __A) {
361 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
362 (__v8di) _mm512_setzero_si512(),
363 (__mmask8) -1,
364 _MM_FROUND_CUR_DIRECTION);
365}
366
Logan Chienb0c84022018-11-09 16:19:54 +0800367static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800368_mm512_mask_cvtpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) {
369 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
370 (__v8di) __W,
371 (__mmask8) __U,
372 _MM_FROUND_CUR_DIRECTION);
373}
374
Logan Chienb0c84022018-11-09 16:19:54 +0800375static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800376_mm512_maskz_cvtpd_epu64 (__mmask8 __U, __m512d __A) {
377 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
378 (__v8di) _mm512_setzero_si512(),
379 (__mmask8) __U,
380 _MM_FROUND_CUR_DIRECTION);
381}
382
Logan Chien55afb0a2018-10-15 10:42:14 +0800383#define _mm512_cvt_roundpd_epu64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800384 ((__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
385 (__v8di)_mm512_setzero_si512(), \
386 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800387
Logan Chien55afb0a2018-10-15 10:42:14 +0800388#define _mm512_mask_cvt_roundpd_epu64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800389 ((__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
390 (__v8di)(__m512i)(W), \
391 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800392
Logan Chien55afb0a2018-10-15 10:42:14 +0800393#define _mm512_maskz_cvt_roundpd_epu64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800394 ((__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
395 (__v8di)_mm512_setzero_si512(), \
396 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800397
Logan Chienb0c84022018-11-09 16:19:54 +0800398static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800399_mm512_cvtps_epi64 (__m256 __A) {
400 return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
401 (__v8di) _mm512_setzero_si512(),
402 (__mmask8) -1,
403 _MM_FROUND_CUR_DIRECTION);
404}
405
Logan Chienb0c84022018-11-09 16:19:54 +0800406static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800407_mm512_mask_cvtps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) {
408 return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
409 (__v8di) __W,
410 (__mmask8) __U,
411 _MM_FROUND_CUR_DIRECTION);
412}
413
Logan Chienb0c84022018-11-09 16:19:54 +0800414static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800415_mm512_maskz_cvtps_epi64 (__mmask8 __U, __m256 __A) {
416 return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
417 (__v8di) _mm512_setzero_si512(),
418 (__mmask8) __U,
419 _MM_FROUND_CUR_DIRECTION);
420}
421
Logan Chien55afb0a2018-10-15 10:42:14 +0800422#define _mm512_cvt_roundps_epi64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800423 ((__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
424 (__v8di)_mm512_setzero_si512(), \
425 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800426
Logan Chien55afb0a2018-10-15 10:42:14 +0800427#define _mm512_mask_cvt_roundps_epi64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800428 ((__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
429 (__v8di)(__m512i)(W), \
430 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800431
Logan Chien55afb0a2018-10-15 10:42:14 +0800432#define _mm512_maskz_cvt_roundps_epi64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800433 ((__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
434 (__v8di)_mm512_setzero_si512(), \
435 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800436
Logan Chienb0c84022018-11-09 16:19:54 +0800437static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800438_mm512_cvtps_epu64 (__m256 __A) {
439 return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
440 (__v8di) _mm512_setzero_si512(),
441 (__mmask8) -1,
442 _MM_FROUND_CUR_DIRECTION);
443}
444
Logan Chienb0c84022018-11-09 16:19:54 +0800445static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800446_mm512_mask_cvtps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) {
447 return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
448 (__v8di) __W,
449 (__mmask8) __U,
450 _MM_FROUND_CUR_DIRECTION);
451}
452
Logan Chienb0c84022018-11-09 16:19:54 +0800453static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800454_mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) {
455 return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
456 (__v8di) _mm512_setzero_si512(),
457 (__mmask8) __U,
458 _MM_FROUND_CUR_DIRECTION);
459}
460
Logan Chien55afb0a2018-10-15 10:42:14 +0800461#define _mm512_cvt_roundps_epu64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800462 ((__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
463 (__v8di)_mm512_setzero_si512(), \
464 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800465
Logan Chien55afb0a2018-10-15 10:42:14 +0800466#define _mm512_mask_cvt_roundps_epu64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800467 ((__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
468 (__v8di)(__m512i)(W), \
469 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800470
Logan Chien55afb0a2018-10-15 10:42:14 +0800471#define _mm512_maskz_cvt_roundps_epu64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800472 ((__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
473 (__v8di)_mm512_setzero_si512(), \
474 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800475
476
Logan Chienb0c84022018-11-09 16:19:54 +0800477static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800478_mm512_cvtepi64_pd (__m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800479 return (__m512d)__builtin_convertvector((__v8di)__A, __v8df);
Logan Chien2833ffb2018-10-09 10:03:24 +0800480}
481
Logan Chienb0c84022018-11-09 16:19:54 +0800482static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800483_mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800484 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
485 (__v8df)_mm512_cvtepi64_pd(__A),
486 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800487}
488
Logan Chienb0c84022018-11-09 16:19:54 +0800489static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800490_mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800491 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
492 (__v8df)_mm512_cvtepi64_pd(__A),
493 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800494}
495
Logan Chien55afb0a2018-10-15 10:42:14 +0800496#define _mm512_cvt_roundepi64_pd(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800497 ((__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
498 (__v8df)_mm512_setzero_pd(), \
499 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800500
Logan Chien55afb0a2018-10-15 10:42:14 +0800501#define _mm512_mask_cvt_roundepi64_pd(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800502 ((__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
503 (__v8df)(__m512d)(W), \
504 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800505
Logan Chien55afb0a2018-10-15 10:42:14 +0800506#define _mm512_maskz_cvt_roundepi64_pd(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800507 ((__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
508 (__v8df)_mm512_setzero_pd(), \
509 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800510
Logan Chienb0c84022018-11-09 16:19:54 +0800511static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800512_mm512_cvtepi64_ps (__m512i __A) {
513 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
514 (__v8sf) _mm256_setzero_ps(),
515 (__mmask8) -1,
516 _MM_FROUND_CUR_DIRECTION);
517}
518
Logan Chienb0c84022018-11-09 16:19:54 +0800519static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800520_mm512_mask_cvtepi64_ps (__m256 __W, __mmask8 __U, __m512i __A) {
521 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
522 (__v8sf) __W,
523 (__mmask8) __U,
524 _MM_FROUND_CUR_DIRECTION);
525}
526
Logan Chienb0c84022018-11-09 16:19:54 +0800527static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800528_mm512_maskz_cvtepi64_ps (__mmask8 __U, __m512i __A) {
529 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
530 (__v8sf) _mm256_setzero_ps(),
531 (__mmask8) __U,
532 _MM_FROUND_CUR_DIRECTION);
533}
534
Logan Chien55afb0a2018-10-15 10:42:14 +0800535#define _mm512_cvt_roundepi64_ps(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800536 ((__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
537 (__v8sf)_mm256_setzero_ps(), \
538 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800539
Logan Chien55afb0a2018-10-15 10:42:14 +0800540#define _mm512_mask_cvt_roundepi64_ps(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800541 ((__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
542 (__v8sf)(__m256)(W), (__mmask8)(U), \
543 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800544
Logan Chien55afb0a2018-10-15 10:42:14 +0800545#define _mm512_maskz_cvt_roundepi64_ps(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800546 ((__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
547 (__v8sf)_mm256_setzero_ps(), \
548 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800549
550
Logan Chienb0c84022018-11-09 16:19:54 +0800551static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800552_mm512_cvttpd_epi64 (__m512d __A) {
553 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
554 (__v8di) _mm512_setzero_si512(),
555 (__mmask8) -1,
556 _MM_FROUND_CUR_DIRECTION);
557}
558
Logan Chienb0c84022018-11-09 16:19:54 +0800559static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800560_mm512_mask_cvttpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
561 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
562 (__v8di) __W,
563 (__mmask8) __U,
564 _MM_FROUND_CUR_DIRECTION);
565}
566
Logan Chienb0c84022018-11-09 16:19:54 +0800567static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800568_mm512_maskz_cvttpd_epi64 (__mmask8 __U, __m512d __A) {
569 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
570 (__v8di) _mm512_setzero_si512(),
571 (__mmask8) __U,
572 _MM_FROUND_CUR_DIRECTION);
573}
574
Logan Chien55afb0a2018-10-15 10:42:14 +0800575#define _mm512_cvtt_roundpd_epi64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800576 ((__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
577 (__v8di)_mm512_setzero_si512(), \
578 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800579
Logan Chien55afb0a2018-10-15 10:42:14 +0800580#define _mm512_mask_cvtt_roundpd_epi64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800581 ((__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
582 (__v8di)(__m512i)(W), \
583 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800584
Logan Chien55afb0a2018-10-15 10:42:14 +0800585#define _mm512_maskz_cvtt_roundpd_epi64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800586 ((__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
587 (__v8di)_mm512_setzero_si512(), \
588 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800589
Logan Chienb0c84022018-11-09 16:19:54 +0800590static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800591_mm512_cvttpd_epu64 (__m512d __A) {
592 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
593 (__v8di) _mm512_setzero_si512(),
594 (__mmask8) -1,
595 _MM_FROUND_CUR_DIRECTION);
596}
597
Logan Chienb0c84022018-11-09 16:19:54 +0800598static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800599_mm512_mask_cvttpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) {
600 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
601 (__v8di) __W,
602 (__mmask8) __U,
603 _MM_FROUND_CUR_DIRECTION);
604}
605
Logan Chienb0c84022018-11-09 16:19:54 +0800606static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800607_mm512_maskz_cvttpd_epu64 (__mmask8 __U, __m512d __A) {
608 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
609 (__v8di) _mm512_setzero_si512(),
610 (__mmask8) __U,
611 _MM_FROUND_CUR_DIRECTION);
612}
613
Logan Chien55afb0a2018-10-15 10:42:14 +0800614#define _mm512_cvtt_roundpd_epu64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800615 ((__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
616 (__v8di)_mm512_setzero_si512(), \
617 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800618
Logan Chien55afb0a2018-10-15 10:42:14 +0800619#define _mm512_mask_cvtt_roundpd_epu64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800620 ((__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
621 (__v8di)(__m512i)(W), \
622 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800623
Logan Chien55afb0a2018-10-15 10:42:14 +0800624#define _mm512_maskz_cvtt_roundpd_epu64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800625 ((__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
626 (__v8di)_mm512_setzero_si512(), \
627 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800628
Logan Chienb0c84022018-11-09 16:19:54 +0800629static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800630_mm512_cvttps_epi64 (__m256 __A) {
631 return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
632 (__v8di) _mm512_setzero_si512(),
633 (__mmask8) -1,
634 _MM_FROUND_CUR_DIRECTION);
635}
636
Logan Chienb0c84022018-11-09 16:19:54 +0800637static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800638_mm512_mask_cvttps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) {
639 return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
640 (__v8di) __W,
641 (__mmask8) __U,
642 _MM_FROUND_CUR_DIRECTION);
643}
644
Logan Chienb0c84022018-11-09 16:19:54 +0800645static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800646_mm512_maskz_cvttps_epi64 (__mmask8 __U, __m256 __A) {
647 return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
648 (__v8di) _mm512_setzero_si512(),
649 (__mmask8) __U,
650 _MM_FROUND_CUR_DIRECTION);
651}
652
Logan Chien55afb0a2018-10-15 10:42:14 +0800653#define _mm512_cvtt_roundps_epi64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800654 ((__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
655 (__v8di)_mm512_setzero_si512(), \
656 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800657
Logan Chien55afb0a2018-10-15 10:42:14 +0800658#define _mm512_mask_cvtt_roundps_epi64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800659 ((__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
660 (__v8di)(__m512i)(W), \
661 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800662
Logan Chien55afb0a2018-10-15 10:42:14 +0800663#define _mm512_maskz_cvtt_roundps_epi64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800664 ((__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
665 (__v8di)_mm512_setzero_si512(), \
666 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800667
Logan Chienb0c84022018-11-09 16:19:54 +0800668static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800669_mm512_cvttps_epu64 (__m256 __A) {
670 return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
671 (__v8di) _mm512_setzero_si512(),
672 (__mmask8) -1,
673 _MM_FROUND_CUR_DIRECTION);
674}
675
Logan Chienb0c84022018-11-09 16:19:54 +0800676static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800677_mm512_mask_cvttps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) {
678 return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
679 (__v8di) __W,
680 (__mmask8) __U,
681 _MM_FROUND_CUR_DIRECTION);
682}
683
Logan Chienb0c84022018-11-09 16:19:54 +0800684static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800685_mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) {
686 return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
687 (__v8di) _mm512_setzero_si512(),
688 (__mmask8) __U,
689 _MM_FROUND_CUR_DIRECTION);
690}
691
Logan Chien55afb0a2018-10-15 10:42:14 +0800692#define _mm512_cvtt_roundps_epu64(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800693 ((__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
694 (__v8di)_mm512_setzero_si512(), \
695 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800696
Logan Chien55afb0a2018-10-15 10:42:14 +0800697#define _mm512_mask_cvtt_roundps_epu64(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800698 ((__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
699 (__v8di)(__m512i)(W), \
700 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800701
Logan Chien55afb0a2018-10-15 10:42:14 +0800702#define _mm512_maskz_cvtt_roundps_epu64(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800703 ((__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
704 (__v8di)_mm512_setzero_si512(), \
705 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800706
Logan Chienb0c84022018-11-09 16:19:54 +0800707static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800708_mm512_cvtepu64_pd (__m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800709 return (__m512d)__builtin_convertvector((__v8du)__A, __v8df);
Logan Chien2833ffb2018-10-09 10:03:24 +0800710}
711
Logan Chienb0c84022018-11-09 16:19:54 +0800712static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800713_mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800714 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
715 (__v8df)_mm512_cvtepu64_pd(__A),
716 (__v8df)__W);
Logan Chien2833ffb2018-10-09 10:03:24 +0800717}
718
Logan Chienb0c84022018-11-09 16:19:54 +0800719static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800720_mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) {
Logan Chien55afb0a2018-10-15 10:42:14 +0800721 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
722 (__v8df)_mm512_cvtepu64_pd(__A),
723 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +0800724}
725
Logan Chien55afb0a2018-10-15 10:42:14 +0800726#define _mm512_cvt_roundepu64_pd(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800727 ((__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
728 (__v8df)_mm512_setzero_pd(), \
729 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800730
Logan Chien55afb0a2018-10-15 10:42:14 +0800731#define _mm512_mask_cvt_roundepu64_pd(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800732 ((__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
733 (__v8df)(__m512d)(W), \
734 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800735
736
Logan Chien55afb0a2018-10-15 10:42:14 +0800737#define _mm512_maskz_cvt_roundepu64_pd(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800738 ((__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
739 (__v8df)_mm512_setzero_pd(), \
740 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800741
742
Logan Chienb0c84022018-11-09 16:19:54 +0800743static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800744_mm512_cvtepu64_ps (__m512i __A) {
745 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
746 (__v8sf) _mm256_setzero_ps(),
747 (__mmask8) -1,
748 _MM_FROUND_CUR_DIRECTION);
749}
750
Logan Chienb0c84022018-11-09 16:19:54 +0800751static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800752_mm512_mask_cvtepu64_ps (__m256 __W, __mmask8 __U, __m512i __A) {
753 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
754 (__v8sf) __W,
755 (__mmask8) __U,
756 _MM_FROUND_CUR_DIRECTION);
757}
758
Logan Chienb0c84022018-11-09 16:19:54 +0800759static __inline__ __m256 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +0800760_mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
761 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
762 (__v8sf) _mm256_setzero_ps(),
763 (__mmask8) __U,
764 _MM_FROUND_CUR_DIRECTION);
765}
766
Logan Chien55afb0a2018-10-15 10:42:14 +0800767#define _mm512_cvt_roundepu64_ps(A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800768 ((__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
769 (__v8sf)_mm256_setzero_ps(), \
770 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800771
Logan Chien55afb0a2018-10-15 10:42:14 +0800772#define _mm512_mask_cvt_roundepu64_ps(W, U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800773 ((__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
774 (__v8sf)(__m256)(W), (__mmask8)(U), \
775 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800776
Logan Chien55afb0a2018-10-15 10:42:14 +0800777#define _mm512_maskz_cvt_roundepu64_ps(U, A, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800778 ((__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
779 (__v8sf)_mm256_setzero_ps(), \
780 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800781
Logan Chien55afb0a2018-10-15 10:42:14 +0800782#define _mm512_range_pd(A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800783 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
784 (__v8df)(__m512d)(B), (int)(C), \
785 (__v8df)_mm512_setzero_pd(), \
786 (__mmask8)-1, \
787 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800788
Logan Chien55afb0a2018-10-15 10:42:14 +0800789#define _mm512_mask_range_pd(W, U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800790 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
791 (__v8df)(__m512d)(B), (int)(C), \
792 (__v8df)(__m512d)(W), (__mmask8)(U), \
793 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800794
Logan Chien55afb0a2018-10-15 10:42:14 +0800795#define _mm512_maskz_range_pd(U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800796 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
797 (__v8df)(__m512d)(B), (int)(C), \
798 (__v8df)_mm512_setzero_pd(), \
799 (__mmask8)(U), \
800 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800801
Logan Chien55afb0a2018-10-15 10:42:14 +0800802#define _mm512_range_round_pd(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800803 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
804 (__v8df)(__m512d)(B), (int)(C), \
805 (__v8df)_mm512_setzero_pd(), \
806 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800807
Logan Chien55afb0a2018-10-15 10:42:14 +0800808#define _mm512_mask_range_round_pd(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800809 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
810 (__v8df)(__m512d)(B), (int)(C), \
811 (__v8df)(__m512d)(W), (__mmask8)(U), \
812 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800813
Logan Chien55afb0a2018-10-15 10:42:14 +0800814#define _mm512_maskz_range_round_pd(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800815 ((__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
816 (__v8df)(__m512d)(B), (int)(C), \
817 (__v8df)_mm512_setzero_pd(), \
818 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800819
Logan Chien55afb0a2018-10-15 10:42:14 +0800820#define _mm512_range_ps(A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800821 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
822 (__v16sf)(__m512)(B), (int)(C), \
823 (__v16sf)_mm512_setzero_ps(), \
824 (__mmask16)-1, \
825 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800826
Logan Chien55afb0a2018-10-15 10:42:14 +0800827#define _mm512_mask_range_ps(W, U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800828 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
829 (__v16sf)(__m512)(B), (int)(C), \
830 (__v16sf)(__m512)(W), (__mmask16)(U), \
831 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800832
Logan Chien55afb0a2018-10-15 10:42:14 +0800833#define _mm512_maskz_range_ps(U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800834 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
835 (__v16sf)(__m512)(B), (int)(C), \
836 (__v16sf)_mm512_setzero_ps(), \
837 (__mmask16)(U), \
838 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800839
Logan Chien55afb0a2018-10-15 10:42:14 +0800840#define _mm512_range_round_ps(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800841 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
842 (__v16sf)(__m512)(B), (int)(C), \
843 (__v16sf)_mm512_setzero_ps(), \
844 (__mmask16)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800845
Logan Chien55afb0a2018-10-15 10:42:14 +0800846#define _mm512_mask_range_round_ps(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800847 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
848 (__v16sf)(__m512)(B), (int)(C), \
849 (__v16sf)(__m512)(W), (__mmask16)(U), \
850 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800851
Logan Chien55afb0a2018-10-15 10:42:14 +0800852#define _mm512_maskz_range_round_ps(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800853 ((__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
854 (__v16sf)(__m512)(B), (int)(C), \
855 (__v16sf)_mm512_setzero_ps(), \
856 (__mmask16)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800857
Logan Chien55afb0a2018-10-15 10:42:14 +0800858#define _mm_range_round_ss(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800859 ((__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
860 (__v4sf)(__m128)(B), \
861 (__v4sf)_mm_setzero_ps(), \
862 (__mmask8) -1, (int)(C),\
863 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800864
865#define _mm_range_ss(A ,B , C) _mm_range_round_ss(A, B, C ,_MM_FROUND_CUR_DIRECTION)
866
Logan Chien55afb0a2018-10-15 10:42:14 +0800867#define _mm_mask_range_round_ss(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800868 ((__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
869 (__v4sf)(__m128)(B), \
870 (__v4sf)(__m128)(W),\
871 (__mmask8)(U), (int)(C),\
872 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800873
874#define _mm_mask_range_ss(W , U, A, B, C) _mm_mask_range_round_ss(W, U, A, B, C , _MM_FROUND_CUR_DIRECTION)
875
Logan Chien55afb0a2018-10-15 10:42:14 +0800876#define _mm_maskz_range_round_ss(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800877 ((__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
878 (__v4sf)(__m128)(B), \
879 (__v4sf)_mm_setzero_ps(), \
880 (__mmask8)(U), (int)(C),\
881 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800882
883#define _mm_maskz_range_ss(U, A ,B , C) _mm_maskz_range_round_ss(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
884
Logan Chien55afb0a2018-10-15 10:42:14 +0800885#define _mm_range_round_sd(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800886 ((__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
887 (__v2df)(__m128d)(B), \
888 (__v2df)_mm_setzero_pd(), \
889 (__mmask8) -1, (int)(C),\
890 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800891
892#define _mm_range_sd(A ,B , C) _mm_range_round_sd(A, B, C ,_MM_FROUND_CUR_DIRECTION)
893
Logan Chien55afb0a2018-10-15 10:42:14 +0800894#define _mm_mask_range_round_sd(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800895 ((__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
896 (__v2df)(__m128d)(B), \
897 (__v2df)(__m128d)(W),\
898 (__mmask8)(U), (int)(C),\
899 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800900
901#define _mm_mask_range_sd(W, U, A, B, C) _mm_mask_range_round_sd(W, U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
902
Logan Chien55afb0a2018-10-15 10:42:14 +0800903#define _mm_maskz_range_round_sd(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800904 ((__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
905 (__v2df)(__m128d)(B), \
906 (__v2df)_mm_setzero_pd(), \
907 (__mmask8)(U), (int)(C),\
908 (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800909
910#define _mm_maskz_range_sd(U, A, B, C) _mm_maskz_range_round_sd(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
911
Logan Chien55afb0a2018-10-15 10:42:14 +0800912#define _mm512_reduce_pd(A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800913 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
914 (__v8df)_mm512_setzero_pd(), \
915 (__mmask8)-1, \
916 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800917
Logan Chien55afb0a2018-10-15 10:42:14 +0800918#define _mm512_mask_reduce_pd(W, U, A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800919 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
920 (__v8df)(__m512d)(W), \
921 (__mmask8)(U), \
922 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800923
Logan Chien55afb0a2018-10-15 10:42:14 +0800924#define _mm512_maskz_reduce_pd(U, A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800925 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
926 (__v8df)_mm512_setzero_pd(), \
927 (__mmask8)(U), \
928 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800929
Logan Chien55afb0a2018-10-15 10:42:14 +0800930#define _mm512_reduce_ps(A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800931 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
932 (__v16sf)_mm512_setzero_ps(), \
933 (__mmask16)-1, \
934 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800935
Logan Chien55afb0a2018-10-15 10:42:14 +0800936#define _mm512_mask_reduce_ps(W, U, A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800937 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
938 (__v16sf)(__m512)(W), \
939 (__mmask16)(U), \
940 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800941
Logan Chien55afb0a2018-10-15 10:42:14 +0800942#define _mm512_maskz_reduce_ps(U, A, B) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800943 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
944 (__v16sf)_mm512_setzero_ps(), \
945 (__mmask16)(U), \
946 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800947
Logan Chien55afb0a2018-10-15 10:42:14 +0800948#define _mm512_reduce_round_pd(A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800949 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
950 (__v8df)_mm512_setzero_pd(), \
951 (__mmask8)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800952
Logan Chien55afb0a2018-10-15 10:42:14 +0800953#define _mm512_mask_reduce_round_pd(W, U, A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800954 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
955 (__v8df)(__m512d)(W), \
956 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800957
Logan Chien55afb0a2018-10-15 10:42:14 +0800958#define _mm512_maskz_reduce_round_pd(U, A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800959 ((__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
960 (__v8df)_mm512_setzero_pd(), \
961 (__mmask8)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800962
Logan Chien55afb0a2018-10-15 10:42:14 +0800963#define _mm512_reduce_round_ps(A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800964 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
965 (__v16sf)_mm512_setzero_ps(), \
966 (__mmask16)-1, (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800967
Logan Chien55afb0a2018-10-15 10:42:14 +0800968#define _mm512_mask_reduce_round_ps(W, U, A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800969 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
970 (__v16sf)(__m512)(W), \
971 (__mmask16)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800972
Logan Chien55afb0a2018-10-15 10:42:14 +0800973#define _mm512_maskz_reduce_round_ps(U, A, B, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800974 ((__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
975 (__v16sf)_mm512_setzero_ps(), \
976 (__mmask16)(U), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +0800977
Logan Chien55afb0a2018-10-15 10:42:14 +0800978#define _mm_reduce_ss(A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800979 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
980 (__v4sf)(__m128)(B), \
981 (__v4sf)_mm_setzero_ps(), (__mmask8)-1, \
982 (int)(C), _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800983
Logan Chien55afb0a2018-10-15 10:42:14 +0800984#define _mm_mask_reduce_ss(W, U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800985 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
986 (__v4sf)(__m128)(B), \
987 (__v4sf)(__m128)(W), (__mmask8)(U), \
988 (int)(C), _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800989
Logan Chien55afb0a2018-10-15 10:42:14 +0800990#define _mm_maskz_reduce_ss(U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800991 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
992 (__v4sf)(__m128)(B), \
993 (__v4sf)_mm_setzero_ps(), \
994 (__mmask8)(U), (int)(C), \
995 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +0800996
Logan Chien55afb0a2018-10-15 10:42:14 +0800997#define _mm_reduce_round_ss(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800998 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
999 (__v4sf)(__m128)(B), \
1000 (__v4sf)_mm_setzero_ps(), (__mmask8)-1, \
1001 (int)(C), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001002
Logan Chien55afb0a2018-10-15 10:42:14 +08001003#define _mm_mask_reduce_round_ss(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001004 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
1005 (__v4sf)(__m128)(B), \
1006 (__v4sf)(__m128)(W), (__mmask8)(U), \
1007 (int)(C), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001008
Logan Chien55afb0a2018-10-15 10:42:14 +08001009#define _mm_maskz_reduce_round_ss(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001010 ((__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
1011 (__v4sf)(__m128)(B), \
1012 (__v4sf)_mm_setzero_ps(), \
1013 (__mmask8)(U), (int)(C), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001014
Logan Chien55afb0a2018-10-15 10:42:14 +08001015#define _mm_reduce_sd(A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001016 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1017 (__v2df)(__m128d)(B), \
1018 (__v2df)_mm_setzero_pd(), \
1019 (__mmask8)-1, (int)(C), \
1020 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +08001021
Logan Chien55afb0a2018-10-15 10:42:14 +08001022#define _mm_mask_reduce_sd(W, U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001023 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1024 (__v2df)(__m128d)(B), \
1025 (__v2df)(__m128d)(W), (__mmask8)(U), \
1026 (int)(C), _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +08001027
Logan Chien55afb0a2018-10-15 10:42:14 +08001028#define _mm_maskz_reduce_sd(U, A, B, C) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001029 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1030 (__v2df)(__m128d)(B), \
1031 (__v2df)_mm_setzero_pd(), \
1032 (__mmask8)(U), (int)(C), \
1033 _MM_FROUND_CUR_DIRECTION))
Logan Chien2833ffb2018-10-09 10:03:24 +08001034
Logan Chien55afb0a2018-10-15 10:42:14 +08001035#define _mm_reduce_round_sd(A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001036 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1037 (__v2df)(__m128d)(B), \
1038 (__v2df)_mm_setzero_pd(), \
1039 (__mmask8)-1, (int)(C), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001040
Logan Chien55afb0a2018-10-15 10:42:14 +08001041#define _mm_mask_reduce_round_sd(W, U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001042 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1043 (__v2df)(__m128d)(B), \
1044 (__v2df)(__m128d)(W), (__mmask8)(U), \
1045 (int)(C), (int)(R)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001046
Logan Chien55afb0a2018-10-15 10:42:14 +08001047#define _mm_maskz_reduce_round_sd(U, A, B, C, R) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001048 ((__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
1049 (__v2df)(__m128d)(B), \
1050 (__v2df)_mm_setzero_pd(), \
1051 (__mmask8)(U), (int)(C), (int)(R)))
Logan Chien55afb0a2018-10-15 10:42:14 +08001052
Logan Chienb0c84022018-11-09 16:19:54 +08001053static __inline__ __mmask16 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001054_mm512_movepi32_mask (__m512i __A)
1055{
1056 return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A);
1057}
1058
Logan Chienb0c84022018-11-09 16:19:54 +08001059static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001060_mm512_movm_epi32 (__mmask16 __A)
1061{
1062 return (__m512i) __builtin_ia32_cvtmask2d512 (__A);
1063}
1064
Logan Chienb0c84022018-11-09 16:19:54 +08001065static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001066_mm512_movm_epi64 (__mmask8 __A)
1067{
1068 return (__m512i) __builtin_ia32_cvtmask2q512 (__A);
1069}
1070
Logan Chienb0c84022018-11-09 16:19:54 +08001071static __inline__ __mmask8 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001072_mm512_movepi64_mask (__m512i __A)
1073{
1074 return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A);
1075}
1076
1077
Logan Chienb0c84022018-11-09 16:19:54 +08001078static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001079_mm512_broadcast_f32x2 (__m128 __A)
1080{
Logan Chien55afb0a2018-10-15 10:42:14 +08001081 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
1082 0, 1, 0, 1, 0, 1, 0, 1,
1083 0, 1, 0, 1, 0, 1, 0, 1);
Logan Chien2833ffb2018-10-09 10:03:24 +08001084}
1085
Logan Chienb0c84022018-11-09 16:19:54 +08001086static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001087_mm512_mask_broadcast_f32x2 (__m512 __O, __mmask16 __M, __m128 __A)
1088{
Logan Chien55afb0a2018-10-15 10:42:14 +08001089 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1090 (__v16sf)_mm512_broadcast_f32x2(__A),
1091 (__v16sf)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001092}
1093
Logan Chienb0c84022018-11-09 16:19:54 +08001094static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001095_mm512_maskz_broadcast_f32x2 (__mmask16 __M, __m128 __A)
1096{
Logan Chien55afb0a2018-10-15 10:42:14 +08001097 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1098 (__v16sf)_mm512_broadcast_f32x2(__A),
1099 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +08001100}
1101
Logan Chienb0c84022018-11-09 16:19:54 +08001102static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001103_mm512_broadcast_f32x8(__m256 __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001104{
Logan Chien55afb0a2018-10-15 10:42:14 +08001105 return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A,
1106 0, 1, 2, 3, 4, 5, 6, 7,
1107 0, 1, 2, 3, 4, 5, 6, 7);
Logan Chien2833ffb2018-10-09 10:03:24 +08001108}
1109
Logan Chienb0c84022018-11-09 16:19:54 +08001110static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001111_mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001112{
Logan Chien55afb0a2018-10-15 10:42:14 +08001113 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1114 (__v16sf)_mm512_broadcast_f32x8(__A),
1115 (__v16sf)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001116}
1117
Logan Chienb0c84022018-11-09 16:19:54 +08001118static __inline__ __m512 __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001119_mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001120{
Logan Chien55afb0a2018-10-15 10:42:14 +08001121 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1122 (__v16sf)_mm512_broadcast_f32x8(__A),
1123 (__v16sf)_mm512_setzero_ps());
Logan Chien2833ffb2018-10-09 10:03:24 +08001124}
1125
Logan Chienb0c84022018-11-09 16:19:54 +08001126static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001127_mm512_broadcast_f64x2(__m128d __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001128{
Logan Chien55afb0a2018-10-15 10:42:14 +08001129 return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,
1130 0, 1, 0, 1, 0, 1, 0, 1);
Logan Chien2833ffb2018-10-09 10:03:24 +08001131}
1132
Logan Chienb0c84022018-11-09 16:19:54 +08001133static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001134_mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001135{
Logan Chien55afb0a2018-10-15 10:42:14 +08001136 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1137 (__v8df)_mm512_broadcast_f64x2(__A),
1138 (__v8df)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001139}
1140
Logan Chienb0c84022018-11-09 16:19:54 +08001141static __inline__ __m512d __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001142_mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001143{
Logan Chien55afb0a2018-10-15 10:42:14 +08001144 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1145 (__v8df)_mm512_broadcast_f64x2(__A),
1146 (__v8df)_mm512_setzero_pd());
Logan Chien2833ffb2018-10-09 10:03:24 +08001147}
1148
Logan Chienb0c84022018-11-09 16:19:54 +08001149static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001150_mm512_broadcast_i32x2 (__m128i __A)
1151{
Logan Chien55afb0a2018-10-15 10:42:14 +08001152 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
1153 0, 1, 0, 1, 0, 1, 0, 1,
1154 0, 1, 0, 1, 0, 1, 0, 1);
Logan Chien2833ffb2018-10-09 10:03:24 +08001155}
1156
Logan Chienb0c84022018-11-09 16:19:54 +08001157static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001158_mm512_mask_broadcast_i32x2 (__m512i __O, __mmask16 __M, __m128i __A)
1159{
Logan Chien55afb0a2018-10-15 10:42:14 +08001160 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1161 (__v16si)_mm512_broadcast_i32x2(__A),
1162 (__v16si)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001163}
1164
Logan Chienb0c84022018-11-09 16:19:54 +08001165static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001166_mm512_maskz_broadcast_i32x2 (__mmask16 __M, __m128i __A)
1167{
Logan Chien55afb0a2018-10-15 10:42:14 +08001168 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1169 (__v16si)_mm512_broadcast_i32x2(__A),
1170 (__v16si)_mm512_setzero_si512());
Logan Chien2833ffb2018-10-09 10:03:24 +08001171}
1172
Logan Chienb0c84022018-11-09 16:19:54 +08001173static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001174_mm512_broadcast_i32x8(__m256i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001175{
Logan Chien55afb0a2018-10-15 10:42:14 +08001176 return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A,
1177 0, 1, 2, 3, 4, 5, 6, 7,
1178 0, 1, 2, 3, 4, 5, 6, 7);
Logan Chien2833ffb2018-10-09 10:03:24 +08001179}
1180
Logan Chienb0c84022018-11-09 16:19:54 +08001181static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001182_mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001183{
Logan Chien55afb0a2018-10-15 10:42:14 +08001184 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1185 (__v16si)_mm512_broadcast_i32x8(__A),
1186 (__v16si)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001187}
1188
Logan Chienb0c84022018-11-09 16:19:54 +08001189static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001190_mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001191{
Logan Chien55afb0a2018-10-15 10:42:14 +08001192 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1193 (__v16si)_mm512_broadcast_i32x8(__A),
1194 (__v16si)_mm512_setzero_si512());
Logan Chien2833ffb2018-10-09 10:03:24 +08001195}
1196
Logan Chienb0c84022018-11-09 16:19:54 +08001197static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001198_mm512_broadcast_i64x2(__m128i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001199{
Logan Chien55afb0a2018-10-15 10:42:14 +08001200 return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,
1201 0, 1, 0, 1, 0, 1, 0, 1);
Logan Chien2833ffb2018-10-09 10:03:24 +08001202}
1203
Logan Chienb0c84022018-11-09 16:19:54 +08001204static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001205_mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001206{
Logan Chien55afb0a2018-10-15 10:42:14 +08001207 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1208 (__v8di)_mm512_broadcast_i64x2(__A),
1209 (__v8di)__O);
Logan Chien2833ffb2018-10-09 10:03:24 +08001210}
1211
Logan Chienb0c84022018-11-09 16:19:54 +08001212static __inline__ __m512i __DEFAULT_FN_ATTRS512
Logan Chien55afb0a2018-10-15 10:42:14 +08001213_mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
Logan Chien2833ffb2018-10-09 10:03:24 +08001214{
Logan Chien55afb0a2018-10-15 10:42:14 +08001215 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1216 (__v8di)_mm512_broadcast_i64x2(__A),
1217 (__v8di)_mm512_setzero_si512());
Logan Chien2833ffb2018-10-09 10:03:24 +08001218}
1219
Logan Chien55afb0a2018-10-15 10:42:14 +08001220#define _mm512_extractf32x8_ps(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001221 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1222 (__v8sf)_mm256_undefined_ps(), \
1223 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001224
Logan Chien55afb0a2018-10-15 10:42:14 +08001225#define _mm512_mask_extractf32x8_ps(W, U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001226 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1227 (__v8sf)(__m256)(W), \
1228 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001229
Logan Chien55afb0a2018-10-15 10:42:14 +08001230#define _mm512_maskz_extractf32x8_ps(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001231 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1232 (__v8sf)_mm256_setzero_ps(), \
1233 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001234
Logan Chien55afb0a2018-10-15 10:42:14 +08001235#define _mm512_extractf64x2_pd(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001236 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1237 (int)(imm), \
1238 (__v2df)_mm_undefined_pd(), \
1239 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001240
Logan Chien55afb0a2018-10-15 10:42:14 +08001241#define _mm512_mask_extractf64x2_pd(W, U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001242 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1243 (int)(imm), \
1244 (__v2df)(__m128d)(W), \
1245 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001246
Logan Chien55afb0a2018-10-15 10:42:14 +08001247#define _mm512_maskz_extractf64x2_pd(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001248 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1249 (int)(imm), \
1250 (__v2df)_mm_setzero_pd(), \
1251 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001252
Logan Chien55afb0a2018-10-15 10:42:14 +08001253#define _mm512_extracti32x8_epi32(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001254 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \
1255 (__v8si)_mm256_undefined_si256(), \
1256 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001257
Logan Chien55afb0a2018-10-15 10:42:14 +08001258#define _mm512_mask_extracti32x8_epi32(W, U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001259 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \
1260 (__v8si)(__m256i)(W), \
1261 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001262
Logan Chien55afb0a2018-10-15 10:42:14 +08001263#define _mm512_maskz_extracti32x8_epi32(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001264 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \
1265 (__v8si)_mm256_setzero_si256(), \
1266 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001267
Logan Chien55afb0a2018-10-15 10:42:14 +08001268#define _mm512_extracti64x2_epi64(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001269 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
Logan Chien2833ffb2018-10-09 10:03:24 +08001270 (int)(imm), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001271 (__v2di)_mm_undefined_si128(), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001272 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001273
Logan Chien55afb0a2018-10-15 10:42:14 +08001274#define _mm512_mask_extracti64x2_epi64(W, U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001275 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
1276 (int)(imm), \
1277 (__v2di)(__m128i)(W), \
1278 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001279
Logan Chien55afb0a2018-10-15 10:42:14 +08001280#define _mm512_maskz_extracti64x2_epi64(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001281 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
1282 (int)(imm), \
1283 (__v2di)_mm_setzero_si128(), \
1284 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001285
Logan Chien55afb0a2018-10-15 10:42:14 +08001286#define _mm512_insertf32x8(A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001287 ((__m512)__builtin_ia32_insertf32x8((__v16sf)(__m512)(A), \
1288 (__v8sf)(__m256)(B), (int)(imm)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001289
Logan Chien55afb0a2018-10-15 10:42:14 +08001290#define _mm512_mask_insertf32x8(W, U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001291 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001292 (__v16sf)_mm512_insertf32x8((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001293 (__v16sf)(__m512)(W)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001294
Logan Chien55afb0a2018-10-15 10:42:14 +08001295#define _mm512_maskz_insertf32x8(U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001296 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001297 (__v16sf)_mm512_insertf32x8((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001298 (__v16sf)_mm512_setzero_ps()))
Logan Chien2833ffb2018-10-09 10:03:24 +08001299
Logan Chien55afb0a2018-10-15 10:42:14 +08001300#define _mm512_insertf64x2(A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001301 ((__m512d)__builtin_ia32_insertf64x2_512((__v8df)(__m512d)(A), \
1302 (__v2df)(__m128d)(B), (int)(imm)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001303
Logan Chien55afb0a2018-10-15 10:42:14 +08001304#define _mm512_mask_insertf64x2(W, U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001305 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001306 (__v8df)_mm512_insertf64x2((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001307 (__v8df)(__m512d)(W)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001308
Logan Chien55afb0a2018-10-15 10:42:14 +08001309#define _mm512_maskz_insertf64x2(U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001310 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001311 (__v8df)_mm512_insertf64x2((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001312 (__v8df)_mm512_setzero_pd()))
Logan Chien2833ffb2018-10-09 10:03:24 +08001313
Logan Chien55afb0a2018-10-15 10:42:14 +08001314#define _mm512_inserti32x8(A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001315 ((__m512i)__builtin_ia32_inserti32x8((__v16si)(__m512i)(A), \
1316 (__v8si)(__m256i)(B), (int)(imm)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001317
Logan Chien55afb0a2018-10-15 10:42:14 +08001318#define _mm512_mask_inserti32x8(W, U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001319 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001320 (__v16si)_mm512_inserti32x8((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001321 (__v16si)(__m512i)(W)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001322
Logan Chien55afb0a2018-10-15 10:42:14 +08001323#define _mm512_maskz_inserti32x8(U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001324 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001325 (__v16si)_mm512_inserti32x8((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001326 (__v16si)_mm512_setzero_si512()))
Logan Chien2833ffb2018-10-09 10:03:24 +08001327
Logan Chien55afb0a2018-10-15 10:42:14 +08001328#define _mm512_inserti64x2(A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001329 ((__m512i)__builtin_ia32_inserti64x2_512((__v8di)(__m512i)(A), \
1330 (__v2di)(__m128i)(B), (int)(imm)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001331
Logan Chien55afb0a2018-10-15 10:42:14 +08001332#define _mm512_mask_inserti64x2(W, U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001333 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001334 (__v8di)_mm512_inserti64x2((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001335 (__v8di)(__m512i)(W)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001336
Logan Chien55afb0a2018-10-15 10:42:14 +08001337#define _mm512_maskz_inserti64x2(U, A, B, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001338 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
Logan Chien55afb0a2018-10-15 10:42:14 +08001339 (__v8di)_mm512_inserti64x2((A), (B), (imm)), \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001340 (__v8di)_mm512_setzero_si512()))
Logan Chien2833ffb2018-10-09 10:03:24 +08001341
Logan Chien55afb0a2018-10-15 10:42:14 +08001342#define _mm512_mask_fpclass_ps_mask(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001343 ((__mmask16)__builtin_ia32_fpclassps512_mask((__v16sf)(__m512)(A), \
1344 (int)(imm), (__mmask16)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001345
Logan Chien55afb0a2018-10-15 10:42:14 +08001346#define _mm512_fpclass_ps_mask(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001347 ((__mmask16)__builtin_ia32_fpclassps512_mask((__v16sf)(__m512)(A), \
1348 (int)(imm), (__mmask16)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001349
Logan Chien55afb0a2018-10-15 10:42:14 +08001350#define _mm512_mask_fpclass_pd_mask(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001351 ((__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \
1352 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001353
Logan Chien55afb0a2018-10-15 10:42:14 +08001354#define _mm512_fpclass_pd_mask(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001355 ((__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \
1356 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001357
Logan Chien55afb0a2018-10-15 10:42:14 +08001358#define _mm_fpclass_sd_mask(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001359 ((__mmask8)__builtin_ia32_fpclasssd_mask((__v2df)(__m128d)(A), (int)(imm), \
1360 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001361
Logan Chien55afb0a2018-10-15 10:42:14 +08001362#define _mm_mask_fpclass_sd_mask(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001363 ((__mmask8)__builtin_ia32_fpclasssd_mask((__v2df)(__m128d)(A), (int)(imm), \
1364 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001365
Logan Chien55afb0a2018-10-15 10:42:14 +08001366#define _mm_fpclass_ss_mask(A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001367 ((__mmask8)__builtin_ia32_fpclassss_mask((__v4sf)(__m128)(A), (int)(imm), \
1368 (__mmask8)-1))
Logan Chien2833ffb2018-10-09 10:03:24 +08001369
Logan Chien55afb0a2018-10-15 10:42:14 +08001370#define _mm_mask_fpclass_ss_mask(U, A, imm) \
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -08001371 ((__mmask8)__builtin_ia32_fpclassss_mask((__v4sf)(__m128)(A), (int)(imm), \
1372 (__mmask8)(U)))
Logan Chien2833ffb2018-10-09 10:03:24 +08001373
Logan Chienb0c84022018-11-09 16:19:54 +08001374#undef __DEFAULT_FN_ATTRS512
Logan Chien2833ffb2018-10-09 10:03:24 +08001375#undef __DEFAULT_FN_ATTRS
1376
1377#endif