Martin Stjernholm | c15e7e4 | 2020-12-02 22:50:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ |
| 18 | #define ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ |
| 19 | |
| 20 | #include <iosfwd> |
| 21 | #include <string> |
| 22 | |
| 23 | #include "base/enums.h" |
| 24 | #include "base/macros.h" |
| 25 | |
| 26 | namespace art { |
| 27 | |
| 28 | enum class InstructionSet { |
| 29 | kNone, |
| 30 | kArm, |
| 31 | kArm64, |
| 32 | kThumb2, |
| 33 | kX86, |
| 34 | kX86_64, |
| 35 | kLast = kX86_64 |
| 36 | }; |
| 37 | std::ostream& operator<<(std::ostream& os, InstructionSet rhs); |
| 38 | |
| 39 | #if defined(__arm__) |
| 40 | static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm; |
| 41 | #elif defined(__aarch64__) |
| 42 | static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm64; |
| 43 | #elif defined(__i386__) |
| 44 | static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86; |
| 45 | #elif defined(__x86_64__) |
| 46 | static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86_64; |
| 47 | #else |
| 48 | static constexpr InstructionSet kRuntimeISA = InstructionSet::kNone; |
| 49 | #endif |
| 50 | |
| 51 | // Architecture-specific pointer sizes |
| 52 | static constexpr PointerSize kArmPointerSize = PointerSize::k32; |
| 53 | static constexpr PointerSize kArm64PointerSize = PointerSize::k64; |
| 54 | static constexpr PointerSize kX86PointerSize = PointerSize::k32; |
| 55 | static constexpr PointerSize kX86_64PointerSize = PointerSize::k64; |
| 56 | |
| 57 | // ARM instruction alignment. ARM processors require code to be 4-byte aligned, |
| 58 | // but ARM ELF requires 8.. |
| 59 | static constexpr size_t kArmAlignment = 8; |
| 60 | |
| 61 | // ARM64 instruction alignment. This is the recommended alignment for maximum performance. |
| 62 | static constexpr size_t kArm64Alignment = 16; |
| 63 | |
Paul Duffin | 7d02088 | 2021-02-08 10:16:27 +0000 | [diff] [blame] | 64 | // ARM64 default SVE vector length. |
| 65 | static constexpr size_t kArm64DefaultSVEVectorLength = 256; |
| 66 | |
Martin Stjernholm | c15e7e4 | 2020-12-02 22:50:53 +0000 | [diff] [blame] | 67 | // X86 instruction alignment. This is the recommended alignment for maximum performance. |
| 68 | static constexpr size_t kX86Alignment = 16; |
| 69 | |
| 70 | // Different than code alignment since code alignment is only first instruction of method. |
| 71 | static constexpr size_t kThumb2InstructionAlignment = 2; |
| 72 | static constexpr size_t kArm64InstructionAlignment = 4; |
| 73 | static constexpr size_t kX86InstructionAlignment = 1; |
| 74 | static constexpr size_t kX86_64InstructionAlignment = 1; |
| 75 | |
| 76 | const char* GetInstructionSetString(InstructionSet isa); |
| 77 | |
| 78 | // Note: Returns kNone when the string cannot be parsed to a known value. |
| 79 | InstructionSet GetInstructionSetFromString(const char* instruction_set); |
| 80 | |
| 81 | // Fatal logging out of line to keep the header clean of logging.h. |
| 82 | NO_RETURN void InstructionSetAbort(InstructionSet isa); |
| 83 | |
| 84 | constexpr PointerSize GetInstructionSetPointerSize(InstructionSet isa) { |
| 85 | switch (isa) { |
| 86 | case InstructionSet::kArm: |
| 87 | // Fall-through. |
| 88 | case InstructionSet::kThumb2: |
| 89 | return kArmPointerSize; |
| 90 | case InstructionSet::kArm64: |
| 91 | return kArm64PointerSize; |
| 92 | case InstructionSet::kX86: |
| 93 | return kX86PointerSize; |
| 94 | case InstructionSet::kX86_64: |
| 95 | return kX86_64PointerSize; |
| 96 | |
| 97 | case InstructionSet::kNone: |
| 98 | break; |
| 99 | } |
| 100 | InstructionSetAbort(isa); |
| 101 | } |
| 102 | |
| 103 | constexpr size_t GetInstructionSetInstructionAlignment(InstructionSet isa) { |
| 104 | switch (isa) { |
| 105 | case InstructionSet::kArm: |
| 106 | // Fall-through. |
| 107 | case InstructionSet::kThumb2: |
| 108 | return kThumb2InstructionAlignment; |
| 109 | case InstructionSet::kArm64: |
| 110 | return kArm64InstructionAlignment; |
| 111 | case InstructionSet::kX86: |
| 112 | return kX86InstructionAlignment; |
| 113 | case InstructionSet::kX86_64: |
| 114 | return kX86_64InstructionAlignment; |
| 115 | |
| 116 | case InstructionSet::kNone: |
| 117 | break; |
| 118 | } |
| 119 | InstructionSetAbort(isa); |
| 120 | } |
| 121 | |
| 122 | constexpr bool IsValidInstructionSet(InstructionSet isa) { |
| 123 | switch (isa) { |
| 124 | case InstructionSet::kArm: |
| 125 | case InstructionSet::kThumb2: |
| 126 | case InstructionSet::kArm64: |
| 127 | case InstructionSet::kX86: |
| 128 | case InstructionSet::kX86_64: |
| 129 | return true; |
| 130 | |
| 131 | case InstructionSet::kNone: |
| 132 | return false; |
| 133 | } |
| 134 | return false; |
| 135 | } |
| 136 | |
| 137 | size_t GetInstructionSetAlignment(InstructionSet isa); |
| 138 | |
| 139 | constexpr bool Is64BitInstructionSet(InstructionSet isa) { |
| 140 | switch (isa) { |
| 141 | case InstructionSet::kArm: |
| 142 | case InstructionSet::kThumb2: |
| 143 | case InstructionSet::kX86: |
| 144 | return false; |
| 145 | |
| 146 | case InstructionSet::kArm64: |
| 147 | case InstructionSet::kX86_64: |
| 148 | return true; |
| 149 | |
| 150 | case InstructionSet::kNone: |
| 151 | break; |
| 152 | } |
| 153 | InstructionSetAbort(isa); |
| 154 | } |
| 155 | |
| 156 | constexpr PointerSize InstructionSetPointerSize(InstructionSet isa) { |
| 157 | return Is64BitInstructionSet(isa) ? PointerSize::k64 : PointerSize::k32; |
| 158 | } |
| 159 | |
| 160 | constexpr size_t GetBytesPerGprSpillLocation(InstructionSet isa) { |
| 161 | switch (isa) { |
| 162 | case InstructionSet::kArm: |
| 163 | // Fall-through. |
| 164 | case InstructionSet::kThumb2: |
| 165 | return 4; |
| 166 | case InstructionSet::kArm64: |
| 167 | return 8; |
| 168 | case InstructionSet::kX86: |
| 169 | return 4; |
| 170 | case InstructionSet::kX86_64: |
| 171 | return 8; |
| 172 | |
| 173 | case InstructionSet::kNone: |
| 174 | break; |
| 175 | } |
| 176 | InstructionSetAbort(isa); |
| 177 | } |
| 178 | |
| 179 | constexpr size_t GetBytesPerFprSpillLocation(InstructionSet isa) { |
| 180 | switch (isa) { |
| 181 | case InstructionSet::kArm: |
| 182 | // Fall-through. |
| 183 | case InstructionSet::kThumb2: |
| 184 | return 4; |
| 185 | case InstructionSet::kArm64: |
| 186 | return 8; |
| 187 | case InstructionSet::kX86: |
| 188 | return 8; |
| 189 | case InstructionSet::kX86_64: |
| 190 | return 8; |
| 191 | |
| 192 | case InstructionSet::kNone: |
| 193 | break; |
| 194 | } |
| 195 | InstructionSetAbort(isa); |
| 196 | } |
| 197 | |
| 198 | namespace instruction_set_details { |
| 199 | |
| 200 | #if !defined(ART_STACK_OVERFLOW_GAP_arm) || !defined(ART_STACK_OVERFLOW_GAP_arm64) || \ |
| 201 | !defined(ART_STACK_OVERFLOW_GAP_x86) || !defined(ART_STACK_OVERFLOW_GAP_x86_64) |
| 202 | #error "Missing defines for stack overflow gap" |
| 203 | #endif |
| 204 | |
| 205 | static constexpr size_t kArmStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm; |
| 206 | static constexpr size_t kArm64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm64; |
| 207 | static constexpr size_t kX86StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86; |
| 208 | static constexpr size_t kX86_64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86_64; |
| 209 | |
| 210 | NO_RETURN void GetStackOverflowReservedBytesFailure(const char* error_msg); |
| 211 | |
| 212 | } // namespace instruction_set_details |
| 213 | |
| 214 | ALWAYS_INLINE |
| 215 | constexpr size_t GetStackOverflowReservedBytes(InstructionSet isa) { |
| 216 | switch (isa) { |
| 217 | case InstructionSet::kArm: // Intentional fall-through. |
| 218 | case InstructionSet::kThumb2: |
| 219 | return instruction_set_details::kArmStackOverflowReservedBytes; |
| 220 | |
| 221 | case InstructionSet::kArm64: |
| 222 | return instruction_set_details::kArm64StackOverflowReservedBytes; |
| 223 | |
| 224 | case InstructionSet::kX86: |
| 225 | return instruction_set_details::kX86StackOverflowReservedBytes; |
| 226 | |
| 227 | case InstructionSet::kX86_64: |
| 228 | return instruction_set_details::kX86_64StackOverflowReservedBytes; |
| 229 | |
| 230 | case InstructionSet::kNone: |
| 231 | instruction_set_details::GetStackOverflowReservedBytesFailure( |
| 232 | "kNone has no stack overflow size"); |
| 233 | } |
| 234 | instruction_set_details::GetStackOverflowReservedBytesFailure("Unknown instruction set"); |
| 235 | } |
| 236 | |
| 237 | // The following definitions create return types for two word-sized entities that will be passed |
| 238 | // in registers so that memory operations for the interface trampolines can be avoided. The entities |
| 239 | // are the resolved method and the pointer to the code to be invoked. |
| 240 | // |
| 241 | // On x86 and ARM32, this is given for a *scalar* 64bit value. The definition thus *must* be |
| 242 | // uint64_t or long long int. |
| 243 | // |
| 244 | // On x86_64 and ARM64, structs are decomposed for allocation, so we can create a structs of |
| 245 | // two size_t-sized values. |
| 246 | // |
| 247 | // We need two operations: |
| 248 | // |
| 249 | // 1) A flag value that signals failure. The assembly stubs expect the lower part to be "0". |
| 250 | // GetTwoWordFailureValue() will return a value that has lower part == 0. |
| 251 | // |
| 252 | // 2) A value that combines two word-sized values. |
| 253 | // GetTwoWordSuccessValue() constructs this. |
| 254 | // |
| 255 | // IMPORTANT: If you use this to transfer object pointers, it is your responsibility to ensure |
| 256 | // that the object does not move or the value is updated. Simple use of this is NOT SAFE |
| 257 | // when the garbage collector can move objects concurrently. Ensure that required locks |
| 258 | // are held when using! |
| 259 | |
| 260 | #if defined(__i386__) || defined(__arm__) |
android-t1 | 3d2c5b2 | 2022-10-12 13:43:18 +0800 | [diff] [blame] | 261 | using TwoWordReturn = uint64_t; |
Martin Stjernholm | c15e7e4 | 2020-12-02 22:50:53 +0000 | [diff] [blame] | 262 | |
| 263 | // Encodes method_ptr==nullptr and code_ptr==nullptr |
| 264 | static inline constexpr TwoWordReturn GetTwoWordFailureValue() { |
| 265 | return 0; |
| 266 | } |
| 267 | |
| 268 | // Use the lower 32b for the method pointer and the upper 32b for the code pointer. |
| 269 | static inline constexpr TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { |
| 270 | static_assert(sizeof(uint32_t) == sizeof(uintptr_t), "Unexpected size difference"); |
| 271 | uint32_t lo32 = lo; |
| 272 | uint64_t hi64 = static_cast<uint64_t>(hi); |
| 273 | return ((hi64 << 32) | lo32); |
| 274 | } |
| 275 | |
| 276 | #elif defined(__x86_64__) || defined(__aarch64__) |
| 277 | |
| 278 | // Note: TwoWordReturn can't be constexpr for 64-bit targets. We'd need a constexpr constructor, |
| 279 | // which would violate C-linkage in the entrypoint functions. |
| 280 | |
| 281 | struct TwoWordReturn { |
| 282 | uintptr_t lo; |
| 283 | uintptr_t hi; |
| 284 | }; |
| 285 | |
| 286 | // Encodes method_ptr==nullptr. Leaves random value in code pointer. |
| 287 | static inline TwoWordReturn GetTwoWordFailureValue() { |
| 288 | TwoWordReturn ret; |
| 289 | ret.lo = 0; |
| 290 | return ret; |
| 291 | } |
| 292 | |
| 293 | // Write values into their respective members. |
| 294 | static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { |
| 295 | TwoWordReturn ret; |
| 296 | ret.lo = lo; |
| 297 | ret.hi = hi; |
| 298 | return ret; |
| 299 | } |
| 300 | #else |
| 301 | #error "Unsupported architecture" |
| 302 | #endif |
| 303 | |
| 304 | } // namespace art |
| 305 | |
| 306 | #endif // ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ |