Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 1 | /*===------------- avx512bwintrin.h - AVX512BW intrinsics ------------------=== |
| 2 | * |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 5 | * of this software and associated documentation files (the "Software"), to deal |
| 6 | * in the Software without restriction, including without limitation the rights |
| 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 8 | * copies of the Software, and to permit persons to whom the Software is |
| 9 | * furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 20 | * THE SOFTWARE. |
| 21 | * |
| 22 | *===-----------------------------------------------------------------------=== |
| 23 | */ |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 24 | #ifndef __IMMINTRIN_H |
| 25 | #error "Never use <avx512bwintrin.h> directly; include <immintrin.h> instead." |
| 26 | #endif |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 27 | |
| 28 | #ifndef __AVX512BWINTRIN_H |
| 29 | #define __AVX512BWINTRIN_H |
| 30 | |
| 31 | typedef unsigned int __mmask32; |
| 32 | typedef unsigned long long __mmask64; |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 33 | typedef char __v64qi __attribute__ ((__vector_size__ (64))); |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 34 | typedef short __v32hi __attribute__ ((__vector_size__ (64))); |
| 35 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 36 | /* Define the default attributes for the functions in this file. */ |
| 37 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"))) |
| 38 | |
| 39 | static __inline __v64qi __DEFAULT_FN_ATTRS |
| 40 | _mm512_setzero_qi(void) { |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 41 | return (__v64qi){ 0, 0, 0, 0, 0, 0, 0, 0, |
| 42 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 43 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 44 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 45 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 46 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 47 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 48 | 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 49 | } |
| 50 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 51 | static __inline __v32hi __DEFAULT_FN_ATTRS |
| 52 | _mm512_setzero_hi(void) { |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 53 | return (__v32hi){ 0, 0, 0, 0, 0, 0, 0, 0, |
| 54 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 55 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 56 | 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 57 | } |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 58 | |
| 59 | /* Integer compare */ |
| 60 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 61 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 62 | _mm512_cmpeq_epi8_mask(__m512i __a, __m512i __b) { |
| 63 | return (__mmask64)__builtin_ia32_pcmpeqb512_mask((__v64qi)__a, (__v64qi)__b, |
| 64 | (__mmask64)-1); |
| 65 | } |
| 66 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 67 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 68 | _mm512_mask_cmpeq_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 69 | return (__mmask64)__builtin_ia32_pcmpeqb512_mask((__v64qi)__a, (__v64qi)__b, |
| 70 | __u); |
| 71 | } |
| 72 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 73 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 74 | _mm512_cmpeq_epu8_mask(__m512i __a, __m512i __b) { |
| 75 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 0, |
| 76 | (__mmask64)-1); |
| 77 | } |
| 78 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 79 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 80 | _mm512_mask_cmpeq_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 81 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 0, |
| 82 | __u); |
| 83 | } |
| 84 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 85 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 86 | _mm512_cmpeq_epi16_mask(__m512i __a, __m512i __b) { |
| 87 | return (__mmask32)__builtin_ia32_pcmpeqw512_mask((__v32hi)__a, (__v32hi)__b, |
| 88 | (__mmask32)-1); |
| 89 | } |
| 90 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 91 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 92 | _mm512_mask_cmpeq_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 93 | return (__mmask32)__builtin_ia32_pcmpeqw512_mask((__v32hi)__a, (__v32hi)__b, |
| 94 | __u); |
| 95 | } |
| 96 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 97 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 98 | _mm512_cmpeq_epu16_mask(__m512i __a, __m512i __b) { |
| 99 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 0, |
| 100 | (__mmask32)-1); |
| 101 | } |
| 102 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 103 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 104 | _mm512_mask_cmpeq_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 105 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 0, |
| 106 | __u); |
| 107 | } |
| 108 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 109 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 110 | _mm512_cmpge_epi8_mask(__m512i __a, __m512i __b) { |
| 111 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 5, |
| 112 | (__mmask64)-1); |
| 113 | } |
| 114 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 115 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 116 | _mm512_mask_cmpge_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 117 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 5, |
| 118 | __u); |
| 119 | } |
| 120 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 121 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 122 | _mm512_cmpge_epu8_mask(__m512i __a, __m512i __b) { |
| 123 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 5, |
| 124 | (__mmask64)-1); |
| 125 | } |
| 126 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 127 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 128 | _mm512_mask_cmpge_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 129 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 5, |
| 130 | __u); |
| 131 | } |
| 132 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 133 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 134 | _mm512_cmpge_epi16_mask(__m512i __a, __m512i __b) { |
| 135 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 5, |
| 136 | (__mmask32)-1); |
| 137 | } |
| 138 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 139 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 140 | _mm512_mask_cmpge_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 141 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 5, |
| 142 | __u); |
| 143 | } |
| 144 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 145 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 146 | _mm512_cmpge_epu16_mask(__m512i __a, __m512i __b) { |
| 147 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 5, |
| 148 | (__mmask32)-1); |
| 149 | } |
| 150 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 151 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 152 | _mm512_mask_cmpge_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 153 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 5, |
| 154 | __u); |
| 155 | } |
| 156 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 157 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 158 | _mm512_cmpgt_epi8_mask(__m512i __a, __m512i __b) { |
| 159 | return (__mmask64)__builtin_ia32_pcmpgtb512_mask((__v64qi)__a, (__v64qi)__b, |
| 160 | (__mmask64)-1); |
| 161 | } |
| 162 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 163 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 164 | _mm512_mask_cmpgt_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 165 | return (__mmask64)__builtin_ia32_pcmpgtb512_mask((__v64qi)__a, (__v64qi)__b, |
| 166 | __u); |
| 167 | } |
| 168 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 169 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 170 | _mm512_cmpgt_epu8_mask(__m512i __a, __m512i __b) { |
| 171 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 6, |
| 172 | (__mmask64)-1); |
| 173 | } |
| 174 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 175 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 176 | _mm512_mask_cmpgt_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 177 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 6, |
| 178 | __u); |
| 179 | } |
| 180 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 181 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 182 | _mm512_cmpgt_epi16_mask(__m512i __a, __m512i __b) { |
| 183 | return (__mmask32)__builtin_ia32_pcmpgtw512_mask((__v32hi)__a, (__v32hi)__b, |
| 184 | (__mmask32)-1); |
| 185 | } |
| 186 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 187 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 188 | _mm512_mask_cmpgt_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 189 | return (__mmask32)__builtin_ia32_pcmpgtw512_mask((__v32hi)__a, (__v32hi)__b, |
| 190 | __u); |
| 191 | } |
| 192 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 193 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 194 | _mm512_cmpgt_epu16_mask(__m512i __a, __m512i __b) { |
| 195 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 6, |
| 196 | (__mmask32)-1); |
| 197 | } |
| 198 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 199 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 200 | _mm512_mask_cmpgt_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 201 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 6, |
| 202 | __u); |
| 203 | } |
| 204 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 205 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 206 | _mm512_cmple_epi8_mask(__m512i __a, __m512i __b) { |
| 207 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 2, |
| 208 | (__mmask64)-1); |
| 209 | } |
| 210 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 211 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 212 | _mm512_mask_cmple_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 213 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 2, |
| 214 | __u); |
| 215 | } |
| 216 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 217 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 218 | _mm512_cmple_epu8_mask(__m512i __a, __m512i __b) { |
| 219 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 2, |
| 220 | (__mmask64)-1); |
| 221 | } |
| 222 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 223 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 224 | _mm512_mask_cmple_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 225 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 2, |
| 226 | __u); |
| 227 | } |
| 228 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 229 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 230 | _mm512_cmple_epi16_mask(__m512i __a, __m512i __b) { |
| 231 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 2, |
| 232 | (__mmask32)-1); |
| 233 | } |
| 234 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 235 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 236 | _mm512_mask_cmple_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 237 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 2, |
| 238 | __u); |
| 239 | } |
| 240 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 241 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 242 | _mm512_cmple_epu16_mask(__m512i __a, __m512i __b) { |
| 243 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 2, |
| 244 | (__mmask32)-1); |
| 245 | } |
| 246 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 247 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 248 | _mm512_mask_cmple_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 249 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 2, |
| 250 | __u); |
| 251 | } |
| 252 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 253 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 254 | _mm512_cmplt_epi8_mask(__m512i __a, __m512i __b) { |
| 255 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 1, |
| 256 | (__mmask64)-1); |
| 257 | } |
| 258 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 259 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 260 | _mm512_mask_cmplt_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 261 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 1, |
| 262 | __u); |
| 263 | } |
| 264 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 265 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 266 | _mm512_cmplt_epu8_mask(__m512i __a, __m512i __b) { |
| 267 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 1, |
| 268 | (__mmask64)-1); |
| 269 | } |
| 270 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 271 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 272 | _mm512_mask_cmplt_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 273 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 1, |
| 274 | __u); |
| 275 | } |
| 276 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 277 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 278 | _mm512_cmplt_epi16_mask(__m512i __a, __m512i __b) { |
| 279 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 1, |
| 280 | (__mmask32)-1); |
| 281 | } |
| 282 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 283 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 284 | _mm512_mask_cmplt_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 285 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 1, |
| 286 | __u); |
| 287 | } |
| 288 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 289 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 290 | _mm512_cmplt_epu16_mask(__m512i __a, __m512i __b) { |
| 291 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 1, |
| 292 | (__mmask32)-1); |
| 293 | } |
| 294 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 295 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 296 | _mm512_mask_cmplt_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 297 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 1, |
| 298 | __u); |
| 299 | } |
| 300 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 301 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 302 | _mm512_cmpneq_epi8_mask(__m512i __a, __m512i __b) { |
| 303 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 4, |
| 304 | (__mmask64)-1); |
| 305 | } |
| 306 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 307 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 308 | _mm512_mask_cmpneq_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 309 | return (__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)__a, (__v64qi)__b, 4, |
| 310 | __u); |
| 311 | } |
| 312 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 313 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 314 | _mm512_cmpneq_epu8_mask(__m512i __a, __m512i __b) { |
| 315 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 4, |
| 316 | (__mmask64)-1); |
| 317 | } |
| 318 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 319 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 320 | _mm512_mask_cmpneq_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { |
| 321 | return (__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)__a, (__v64qi)__b, 4, |
| 322 | __u); |
| 323 | } |
| 324 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 325 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 326 | _mm512_cmpneq_epi16_mask(__m512i __a, __m512i __b) { |
| 327 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 4, |
| 328 | (__mmask32)-1); |
| 329 | } |
| 330 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 331 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 332 | _mm512_mask_cmpneq_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 333 | return (__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)__a, (__v32hi)__b, 4, |
| 334 | __u); |
| 335 | } |
| 336 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 337 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 338 | _mm512_cmpneq_epu16_mask(__m512i __a, __m512i __b) { |
| 339 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 4, |
| 340 | (__mmask32)-1); |
| 341 | } |
| 342 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 343 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 344 | _mm512_mask_cmpneq_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { |
| 345 | return (__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)__a, (__v32hi)__b, 4, |
| 346 | __u); |
| 347 | } |
| 348 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 349 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 350 | _mm512_add_epi8 (__m512i __A, __m512i __B) { |
| 351 | return (__m512i) ((__v64qi) __A + (__v64qi) __B); |
| 352 | } |
| 353 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 354 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 355 | _mm512_mask_add_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 356 | return (__m512i) __builtin_ia32_paddb512_mask ((__v64qi) __A, |
| 357 | (__v64qi) __B, |
| 358 | (__v64qi) __W, |
| 359 | (__mmask64) __U); |
| 360 | } |
| 361 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 362 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 363 | _mm512_maskz_add_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { |
| 364 | return (__m512i) __builtin_ia32_paddb512_mask ((__v64qi) __A, |
| 365 | (__v64qi) __B, |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 366 | (__v64qi) _mm512_setzero_qi(), |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 367 | (__mmask64) __U); |
| 368 | } |
| 369 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 370 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 371 | _mm512_sub_epi8 (__m512i __A, __m512i __B) { |
| 372 | return (__m512i) ((__v64qi) __A - (__v64qi) __B); |
| 373 | } |
| 374 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 375 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 376 | _mm512_mask_sub_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 377 | return (__m512i) __builtin_ia32_psubb512_mask ((__v64qi) __A, |
| 378 | (__v64qi) __B, |
| 379 | (__v64qi) __W, |
| 380 | (__mmask64) __U); |
| 381 | } |
| 382 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 383 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 384 | _mm512_maskz_sub_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { |
| 385 | return (__m512i) __builtin_ia32_psubb512_mask ((__v64qi) __A, |
| 386 | (__v64qi) __B, |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 387 | (__v64qi) _mm512_setzero_qi(), |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 388 | (__mmask64) __U); |
| 389 | } |
| 390 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 391 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 392 | _mm512_add_epi16 (__m512i __A, __m512i __B) { |
| 393 | return (__m512i) ((__v32hi) __A + (__v32hi) __B); |
| 394 | } |
| 395 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 396 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 397 | _mm512_mask_add_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 398 | return (__m512i) __builtin_ia32_paddw512_mask ((__v32hi) __A, |
| 399 | (__v32hi) __B, |
| 400 | (__v32hi) __W, |
| 401 | (__mmask32) __U); |
| 402 | } |
| 403 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 404 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 405 | _mm512_maskz_add_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { |
| 406 | return (__m512i) __builtin_ia32_paddw512_mask ((__v32hi) __A, |
| 407 | (__v32hi) __B, |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 408 | (__v32hi) _mm512_setzero_hi(), |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 409 | (__mmask32) __U); |
| 410 | } |
| 411 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 412 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 413 | _mm512_sub_epi16 (__m512i __A, __m512i __B) { |
| 414 | return (__m512i) ((__v32hi) __A - (__v32hi) __B); |
| 415 | } |
| 416 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 417 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 418 | _mm512_mask_sub_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 419 | return (__m512i) __builtin_ia32_psubw512_mask ((__v32hi) __A, |
| 420 | (__v32hi) __B, |
| 421 | (__v32hi) __W, |
| 422 | (__mmask32) __U); |
| 423 | } |
| 424 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 425 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 426 | _mm512_maskz_sub_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { |
| 427 | return (__m512i) __builtin_ia32_psubw512_mask ((__v32hi) __A, |
| 428 | (__v32hi) __B, |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 429 | (__v32hi) _mm512_setzero_hi(), |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 430 | (__mmask32) __U); |
| 431 | } |
| 432 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 433 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 434 | _mm512_mullo_epi16 (__m512i __A, __m512i __B) { |
| 435 | return (__m512i) ((__v32hi) __A * (__v32hi) __B); |
| 436 | } |
| 437 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 438 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 439 | _mm512_mask_mullo_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 440 | return (__m512i) __builtin_ia32_pmullw512_mask ((__v32hi) __A, |
| 441 | (__v32hi) __B, |
| 442 | (__v32hi) __W, |
| 443 | (__mmask32) __U); |
| 444 | } |
| 445 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 446 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 447 | _mm512_maskz_mullo_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { |
| 448 | return (__m512i) __builtin_ia32_pmullw512_mask ((__v32hi) __A, |
| 449 | (__v32hi) __B, |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 450 | (__v32hi) _mm512_setzero_hi(), |
Stephen Hines | 28c5e1e | 2015-08-13 18:18:46 -0700 | [diff] [blame] | 451 | (__mmask32) __U); |
| 452 | } |
| 453 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 454 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 455 | _mm512_mask_blend_epi8 (__mmask64 __U, __m512i __A, __m512i __W) |
| 456 | { |
| 457 | return (__m512i) __builtin_ia32_blendmb_512_mask ((__v64qi) __A, |
| 458 | (__v64qi) __W, |
| 459 | (__mmask64) __U); |
| 460 | } |
| 461 | |
| 462 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 463 | _mm512_mask_blend_epi16 (__mmask32 __U, __m512i __A, __m512i __W) |
| 464 | { |
| 465 | return (__m512i) __builtin_ia32_blendmw_512_mask ((__v32hi) __A, |
| 466 | (__v32hi) __W, |
| 467 | (__mmask32) __U); |
| 468 | } |
| 469 | |
| 470 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 471 | _mm512_abs_epi8 (__m512i __A) |
| 472 | { |
| 473 | return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A, |
| 474 | (__v64qi) _mm512_setzero_qi(), |
| 475 | (__mmask64) -1); |
| 476 | } |
| 477 | |
| 478 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 479 | _mm512_mask_abs_epi8 (__m512i __W, __mmask64 __U, __m512i __A) |
| 480 | { |
| 481 | return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A, |
| 482 | (__v64qi) __W, |
| 483 | (__mmask64) __U); |
| 484 | } |
| 485 | |
| 486 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 487 | _mm512_maskz_abs_epi8 (__mmask64 __U, __m512i __A) |
| 488 | { |
| 489 | return (__m512i) __builtin_ia32_pabsb512_mask ((__v64qi) __A, |
| 490 | (__v64qi) _mm512_setzero_qi(), |
| 491 | (__mmask64) __U); |
| 492 | } |
| 493 | |
| 494 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 495 | _mm512_abs_epi16 (__m512i __A) |
| 496 | { |
| 497 | return (__m512i) __builtin_ia32_pabsw512_mask ((__v32hi) __A, |
| 498 | (__v32hi) _mm512_setzero_hi(), |
| 499 | (__mmask32) -1); |
| 500 | } |
| 501 | |
| 502 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 503 | _mm512_mask_abs_epi16 (__m512i __W, __mmask32 __U, __m512i __A) |
| 504 | { |
| 505 | return (__m512i) __builtin_ia32_pabsw512_mask ((__v32hi) __A, |
| 506 | (__v32hi) __W, |
| 507 | (__mmask32) __U); |
| 508 | } |
| 509 | |
| 510 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 511 | _mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A) |
| 512 | { |
| 513 | return (__m512i) __builtin_ia32_pabsw512_mask ((__v32hi) __A, |
| 514 | (__v32hi) _mm512_setzero_hi(), |
| 515 | (__mmask32) __U); |
| 516 | } |
| 517 | |
| 518 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 519 | _mm512_packs_epi32 (__m512i __A, __m512i __B) |
| 520 | { |
| 521 | return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A, |
| 522 | (__v16si) __B, |
| 523 | (__v32hi) _mm512_setzero_hi(), |
| 524 | (__mmask32) -1); |
| 525 | } |
| 526 | |
| 527 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 528 | _mm512_maskz_packs_epi32 (__mmask32 __M, __m512i __A, __m512i __B) |
| 529 | { |
| 530 | return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A, |
| 531 | (__v16si) __B, |
| 532 | (__v32hi) _mm512_setzero_hi(), |
| 533 | __M); |
| 534 | } |
| 535 | |
| 536 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 537 | _mm512_mask_packs_epi32 (__m512i __W, __mmask32 __M, __m512i __A, |
| 538 | __m512i __B) |
| 539 | { |
| 540 | return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A, |
| 541 | (__v16si) __B, |
| 542 | (__v32hi) __W, |
| 543 | __M); |
| 544 | } |
| 545 | |
| 546 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 547 | _mm512_packs_epi16 (__m512i __A, __m512i __B) |
| 548 | { |
| 549 | return (__m512i) __builtin_ia32_packsswb512_mask ((__v32hi) __A, |
| 550 | (__v32hi) __B, |
| 551 | (__v64qi) _mm512_setzero_qi(), |
| 552 | (__mmask64) -1); |
| 553 | } |
| 554 | |
| 555 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 556 | _mm512_mask_packs_epi16 (__m512i __W, __mmask64 __M, __m512i __A, |
| 557 | __m512i __B) |
| 558 | { |
| 559 | return (__m512i) __builtin_ia32_packsswb512_mask ((__v32hi) __A, |
| 560 | (__v32hi) __B, |
| 561 | (__v64qi) __W, |
| 562 | (__mmask64) __M); |
| 563 | } |
| 564 | |
| 565 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 566 | _mm512_maskz_packs_epi16 (__mmask64 __M, __m512i __A, __m512i __B) |
| 567 | { |
| 568 | return (__m512i) __builtin_ia32_packsswb512_mask ((__v32hi) __A, |
| 569 | (__v32hi) __B, |
| 570 | (__v64qi) _mm512_setzero_qi(), |
| 571 | __M); |
| 572 | } |
| 573 | |
| 574 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 575 | _mm512_packus_epi32 (__m512i __A, __m512i __B) |
| 576 | { |
| 577 | return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A, |
| 578 | (__v16si) __B, |
| 579 | (__v32hi) _mm512_setzero_hi(), |
| 580 | (__mmask32) -1); |
| 581 | } |
| 582 | |
| 583 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 584 | _mm512_maskz_packus_epi32 (__mmask32 __M, __m512i __A, __m512i __B) |
| 585 | { |
| 586 | return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A, |
| 587 | (__v16si) __B, |
| 588 | (__v32hi) _mm512_setzero_hi(), |
| 589 | __M); |
| 590 | } |
| 591 | |
| 592 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 593 | _mm512_mask_packus_epi32 (__m512i __W, __mmask32 __M, __m512i __A, |
| 594 | __m512i __B) |
| 595 | { |
| 596 | return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A, |
| 597 | (__v16si) __B, |
| 598 | (__v32hi) __W, |
| 599 | __M); |
| 600 | } |
| 601 | |
| 602 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 603 | _mm512_packus_epi16 (__m512i __A, __m512i __B) |
| 604 | { |
| 605 | return (__m512i) __builtin_ia32_packuswb512_mask ((__v32hi) __A, |
| 606 | (__v32hi) __B, |
| 607 | (__v64qi) _mm512_setzero_qi(), |
| 608 | (__mmask64) -1); |
| 609 | } |
| 610 | |
| 611 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 612 | _mm512_mask_packus_epi16 (__m512i __W, __mmask64 __M, __m512i __A, |
| 613 | __m512i __B) |
| 614 | { |
| 615 | return (__m512i) __builtin_ia32_packuswb512_mask ((__v32hi) __A, |
| 616 | (__v32hi) __B, |
| 617 | (__v64qi) __W, |
| 618 | (__mmask64) __M); |
| 619 | } |
| 620 | |
| 621 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 622 | _mm512_maskz_packus_epi16 (__mmask64 __M, __m512i __A, __m512i __B) |
| 623 | { |
| 624 | return (__m512i) __builtin_ia32_packuswb512_mask ((__v32hi) __A, |
| 625 | (__v32hi) __B, |
| 626 | (__v64qi) _mm512_setzero_qi(), |
| 627 | (__mmask64) __M); |
| 628 | } |
| 629 | |
| 630 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 631 | _mm512_adds_epi8 (__m512i __A, __m512i __B) |
| 632 | { |
| 633 | return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A, |
| 634 | (__v64qi) __B, |
| 635 | (__v64qi) _mm512_setzero_qi(), |
| 636 | (__mmask64) -1); |
| 637 | } |
| 638 | |
| 639 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 640 | _mm512_mask_adds_epi8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 641 | __m512i __B) |
| 642 | { |
| 643 | return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A, |
| 644 | (__v64qi) __B, |
| 645 | (__v64qi) __W, |
| 646 | (__mmask64) __U); |
| 647 | } |
| 648 | |
| 649 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 650 | _mm512_maskz_adds_epi8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 651 | { |
| 652 | return (__m512i) __builtin_ia32_paddsb512_mask ((__v64qi) __A, |
| 653 | (__v64qi) __B, |
| 654 | (__v64qi) _mm512_setzero_qi(), |
| 655 | (__mmask64) __U); |
| 656 | } |
| 657 | |
| 658 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 659 | _mm512_adds_epi16 (__m512i __A, __m512i __B) |
| 660 | { |
| 661 | return (__m512i) __builtin_ia32_paddsw512_mask ((__v32hi) __A, |
| 662 | (__v32hi) __B, |
| 663 | (__v32hi) _mm512_setzero_hi(), |
| 664 | (__mmask32) -1); |
| 665 | } |
| 666 | |
| 667 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 668 | _mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 669 | __m512i __B) |
| 670 | { |
| 671 | return (__m512i) __builtin_ia32_paddsw512_mask ((__v32hi) __A, |
| 672 | (__v32hi) __B, |
| 673 | (__v32hi) __W, |
| 674 | (__mmask32) __U); |
| 675 | } |
| 676 | |
| 677 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 678 | _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 679 | { |
| 680 | return (__m512i) __builtin_ia32_paddsw512_mask ((__v32hi) __A, |
| 681 | (__v32hi) __B, |
| 682 | (__v32hi) _mm512_setzero_hi(), |
| 683 | (__mmask32) __U); |
| 684 | } |
| 685 | |
| 686 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 687 | _mm512_adds_epu8 (__m512i __A, __m512i __B) |
| 688 | { |
| 689 | return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A, |
| 690 | (__v64qi) __B, |
| 691 | (__v64qi) _mm512_setzero_qi(), |
| 692 | (__mmask64) -1); |
| 693 | } |
| 694 | |
| 695 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 696 | _mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 697 | __m512i __B) |
| 698 | { |
| 699 | return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A, |
| 700 | (__v64qi) __B, |
| 701 | (__v64qi) __W, |
| 702 | (__mmask64) __U); |
| 703 | } |
| 704 | |
| 705 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 706 | _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 707 | { |
| 708 | return (__m512i) __builtin_ia32_paddusb512_mask ((__v64qi) __A, |
| 709 | (__v64qi) __B, |
| 710 | (__v64qi) _mm512_setzero_qi(), |
| 711 | (__mmask64) __U); |
| 712 | } |
| 713 | |
| 714 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 715 | _mm512_adds_epu16 (__m512i __A, __m512i __B) |
| 716 | { |
| 717 | return (__m512i) __builtin_ia32_paddusw512_mask ((__v32hi) __A, |
| 718 | (__v32hi) __B, |
| 719 | (__v32hi) _mm512_setzero_hi(), |
| 720 | (__mmask32) -1); |
| 721 | } |
| 722 | |
| 723 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 724 | _mm512_mask_adds_epu16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 725 | __m512i __B) |
| 726 | { |
| 727 | return (__m512i) __builtin_ia32_paddusw512_mask ((__v32hi) __A, |
| 728 | (__v32hi) __B, |
| 729 | (__v32hi) __W, |
| 730 | (__mmask32) __U); |
| 731 | } |
| 732 | |
| 733 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 734 | _mm512_maskz_adds_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 735 | { |
| 736 | return (__m512i) __builtin_ia32_paddusw512_mask ((__v32hi) __A, |
| 737 | (__v32hi) __B, |
| 738 | (__v32hi) _mm512_setzero_hi(), |
| 739 | (__mmask32) __U); |
| 740 | } |
| 741 | |
| 742 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 743 | _mm512_avg_epu8 (__m512i __A, __m512i __B) |
| 744 | { |
| 745 | return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A, |
| 746 | (__v64qi) __B, |
| 747 | (__v64qi) _mm512_setzero_qi(), |
| 748 | (__mmask64) -1); |
| 749 | } |
| 750 | |
| 751 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 752 | _mm512_mask_avg_epu8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 753 | __m512i __B) |
| 754 | { |
| 755 | return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A, |
| 756 | (__v64qi) __B, |
| 757 | (__v64qi) __W, |
| 758 | (__mmask64) __U); |
| 759 | } |
| 760 | |
| 761 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 762 | _mm512_maskz_avg_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 763 | { |
| 764 | return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A, |
| 765 | (__v64qi) __B, |
| 766 | (__v64qi) _mm512_setzero_qi(), |
| 767 | (__mmask64) __U); |
| 768 | } |
| 769 | |
| 770 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 771 | _mm512_avg_epu16 (__m512i __A, __m512i __B) |
| 772 | { |
| 773 | return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A, |
| 774 | (__v32hi) __B, |
| 775 | (__v32hi) _mm512_setzero_hi(), |
| 776 | (__mmask32) -1); |
| 777 | } |
| 778 | |
| 779 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 780 | _mm512_mask_avg_epu16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 781 | __m512i __B) |
| 782 | { |
| 783 | return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A, |
| 784 | (__v32hi) __B, |
| 785 | (__v32hi) __W, |
| 786 | (__mmask32) __U); |
| 787 | } |
| 788 | |
| 789 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 790 | _mm512_maskz_avg_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 791 | { |
| 792 | return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A, |
| 793 | (__v32hi) __B, |
| 794 | (__v32hi) _mm512_setzero_hi(), |
| 795 | (__mmask32) __U); |
| 796 | } |
| 797 | |
| 798 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 799 | _mm512_max_epi8 (__m512i __A, __m512i __B) |
| 800 | { |
| 801 | return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A, |
| 802 | (__v64qi) __B, |
| 803 | (__v64qi) _mm512_setzero_qi(), |
| 804 | (__mmask64) -1); |
| 805 | } |
| 806 | |
| 807 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 808 | _mm512_maskz_max_epi8 (__mmask64 __M, __m512i __A, __m512i __B) |
| 809 | { |
| 810 | return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A, |
| 811 | (__v64qi) __B, |
| 812 | (__v64qi) _mm512_setzero_qi(), |
| 813 | (__mmask64) __M); |
| 814 | } |
| 815 | |
| 816 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 817 | _mm512_mask_max_epi8 (__m512i __W, __mmask64 __M, __m512i __A, |
| 818 | __m512i __B) |
| 819 | { |
| 820 | return (__m512i) __builtin_ia32_pmaxsb512_mask ((__v64qi) __A, |
| 821 | (__v64qi) __B, |
| 822 | (__v64qi) __W, |
| 823 | (__mmask64) __M); |
| 824 | } |
| 825 | |
| 826 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 827 | _mm512_max_epi16 (__m512i __A, __m512i __B) |
| 828 | { |
| 829 | return (__m512i) __builtin_ia32_pmaxsw512_mask ((__v32hi) __A, |
| 830 | (__v32hi) __B, |
| 831 | (__v32hi) _mm512_setzero_hi(), |
| 832 | (__mmask32) -1); |
| 833 | } |
| 834 | |
| 835 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 836 | _mm512_maskz_max_epi16 (__mmask32 __M, __m512i __A, __m512i __B) |
| 837 | { |
| 838 | return (__m512i) __builtin_ia32_pmaxsw512_mask ((__v32hi) __A, |
| 839 | (__v32hi) __B, |
| 840 | (__v32hi) _mm512_setzero_hi(), |
| 841 | (__mmask32) __M); |
| 842 | } |
| 843 | |
| 844 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 845 | _mm512_mask_max_epi16 (__m512i __W, __mmask32 __M, __m512i __A, |
| 846 | __m512i __B) |
| 847 | { |
| 848 | return (__m512i) __builtin_ia32_pmaxsw512_mask ((__v32hi) __A, |
| 849 | (__v32hi) __B, |
| 850 | (__v32hi) __W, |
| 851 | (__mmask32) __M); |
| 852 | } |
| 853 | |
| 854 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 855 | _mm512_max_epu8 (__m512i __A, __m512i __B) |
| 856 | { |
| 857 | return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A, |
| 858 | (__v64qi) __B, |
| 859 | (__v64qi) _mm512_setzero_qi(), |
| 860 | (__mmask64) -1); |
| 861 | } |
| 862 | |
| 863 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 864 | _mm512_maskz_max_epu8 (__mmask64 __M, __m512i __A, __m512i __B) |
| 865 | { |
| 866 | return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A, |
| 867 | (__v64qi) __B, |
| 868 | (__v64qi) _mm512_setzero_qi(), |
| 869 | (__mmask64) __M); |
| 870 | } |
| 871 | |
| 872 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 873 | _mm512_mask_max_epu8 (__m512i __W, __mmask64 __M, __m512i __A, |
| 874 | __m512i __B) |
| 875 | { |
| 876 | return (__m512i) __builtin_ia32_pmaxub512_mask ((__v64qi) __A, |
| 877 | (__v64qi) __B, |
| 878 | (__v64qi) __W, |
| 879 | (__mmask64) __M); |
| 880 | } |
| 881 | |
| 882 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 883 | _mm512_max_epu16 (__m512i __A, __m512i __B) |
| 884 | { |
| 885 | return (__m512i) __builtin_ia32_pmaxuw512_mask ((__v32hi) __A, |
| 886 | (__v32hi) __B, |
| 887 | (__v32hi) _mm512_setzero_hi(), |
| 888 | (__mmask32) -1); |
| 889 | } |
| 890 | |
| 891 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 892 | _mm512_maskz_max_epu16 (__mmask32 __M, __m512i __A, __m512i __B) |
| 893 | { |
| 894 | return (__m512i) __builtin_ia32_pmaxuw512_mask ((__v32hi) __A, |
| 895 | (__v32hi) __B, |
| 896 | (__v32hi) _mm512_setzero_hi(), |
| 897 | (__mmask32) __M); |
| 898 | } |
| 899 | |
| 900 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 901 | _mm512_mask_max_epu16 (__m512i __W, __mmask32 __M, __m512i __A, |
| 902 | __m512i __B) |
| 903 | { |
| 904 | return (__m512i) __builtin_ia32_pmaxuw512_mask ((__v32hi) __A, |
| 905 | (__v32hi) __B, |
| 906 | (__v32hi) __W, |
| 907 | (__mmask32) __M); |
| 908 | } |
| 909 | |
| 910 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 911 | _mm512_min_epi8 (__m512i __A, __m512i __B) |
| 912 | { |
| 913 | return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A, |
| 914 | (__v64qi) __B, |
| 915 | (__v64qi) _mm512_setzero_qi(), |
| 916 | (__mmask64) -1); |
| 917 | } |
| 918 | |
| 919 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 920 | _mm512_maskz_min_epi8 (__mmask64 __M, __m512i __A, __m512i __B) |
| 921 | { |
| 922 | return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A, |
| 923 | (__v64qi) __B, |
| 924 | (__v64qi) _mm512_setzero_qi(), |
| 925 | (__mmask64) __M); |
| 926 | } |
| 927 | |
| 928 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 929 | _mm512_mask_min_epi8 (__m512i __W, __mmask64 __M, __m512i __A, |
| 930 | __m512i __B) |
| 931 | { |
| 932 | return (__m512i) __builtin_ia32_pminsb512_mask ((__v64qi) __A, |
| 933 | (__v64qi) __B, |
| 934 | (__v64qi) __W, |
| 935 | (__mmask64) __M); |
| 936 | } |
| 937 | |
| 938 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 939 | _mm512_min_epi16 (__m512i __A, __m512i __B) |
| 940 | { |
| 941 | return (__m512i) __builtin_ia32_pminsw512_mask ((__v32hi) __A, |
| 942 | (__v32hi) __B, |
| 943 | (__v32hi) _mm512_setzero_hi(), |
| 944 | (__mmask32) -1); |
| 945 | } |
| 946 | |
| 947 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 948 | _mm512_maskz_min_epi16 (__mmask32 __M, __m512i __A, __m512i __B) |
| 949 | { |
| 950 | return (__m512i) __builtin_ia32_pminsw512_mask ((__v32hi) __A, |
| 951 | (__v32hi) __B, |
| 952 | (__v32hi) _mm512_setzero_hi(), |
| 953 | (__mmask32) __M); |
| 954 | } |
| 955 | |
| 956 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 957 | _mm512_mask_min_epi16 (__m512i __W, __mmask32 __M, __m512i __A, |
| 958 | __m512i __B) |
| 959 | { |
| 960 | return (__m512i) __builtin_ia32_pminsw512_mask ((__v32hi) __A, |
| 961 | (__v32hi) __B, |
| 962 | (__v32hi) __W, |
| 963 | (__mmask32) __M); |
| 964 | } |
| 965 | |
| 966 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 967 | _mm512_min_epu8 (__m512i __A, __m512i __B) |
| 968 | { |
| 969 | return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A, |
| 970 | (__v64qi) __B, |
| 971 | (__v64qi) _mm512_setzero_qi(), |
| 972 | (__mmask64) -1); |
| 973 | } |
| 974 | |
| 975 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 976 | _mm512_maskz_min_epu8 (__mmask64 __M, __m512i __A, __m512i __B) |
| 977 | { |
| 978 | return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A, |
| 979 | (__v64qi) __B, |
| 980 | (__v64qi) _mm512_setzero_qi(), |
| 981 | (__mmask64) __M); |
| 982 | } |
| 983 | |
| 984 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 985 | _mm512_mask_min_epu8 (__m512i __W, __mmask64 __M, __m512i __A, |
| 986 | __m512i __B) |
| 987 | { |
| 988 | return (__m512i) __builtin_ia32_pminub512_mask ((__v64qi) __A, |
| 989 | (__v64qi) __B, |
| 990 | (__v64qi) __W, |
| 991 | (__mmask64) __M); |
| 992 | } |
| 993 | |
| 994 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 995 | _mm512_min_epu16 (__m512i __A, __m512i __B) |
| 996 | { |
| 997 | return (__m512i) __builtin_ia32_pminuw512_mask ((__v32hi) __A, |
| 998 | (__v32hi) __B, |
| 999 | (__v32hi) _mm512_setzero_hi(), |
| 1000 | (__mmask32) -1); |
| 1001 | } |
| 1002 | |
| 1003 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1004 | _mm512_maskz_min_epu16 (__mmask32 __M, __m512i __A, __m512i __B) |
| 1005 | { |
| 1006 | return (__m512i) __builtin_ia32_pminuw512_mask ((__v32hi) __A, |
| 1007 | (__v32hi) __B, |
| 1008 | (__v32hi) _mm512_setzero_hi(), |
| 1009 | (__mmask32) __M); |
| 1010 | } |
| 1011 | |
| 1012 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1013 | _mm512_mask_min_epu16 (__m512i __W, __mmask32 __M, __m512i __A, |
| 1014 | __m512i __B) |
| 1015 | { |
| 1016 | return (__m512i) __builtin_ia32_pminuw512_mask ((__v32hi) __A, |
| 1017 | (__v32hi) __B, |
| 1018 | (__v32hi) __W, |
| 1019 | (__mmask32) __M); |
| 1020 | } |
| 1021 | |
| 1022 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1023 | _mm512_shuffle_epi8 (__m512i __A, __m512i __B) |
| 1024 | { |
| 1025 | return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A, |
| 1026 | (__v64qi) __B, |
| 1027 | (__v64qi) _mm512_setzero_qi(), |
| 1028 | (__mmask64) -1); |
| 1029 | } |
| 1030 | |
| 1031 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1032 | _mm512_mask_shuffle_epi8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 1033 | __m512i __B) |
| 1034 | { |
| 1035 | return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A, |
| 1036 | (__v64qi) __B, |
| 1037 | (__v64qi) __W, |
| 1038 | (__mmask64) __U); |
| 1039 | } |
| 1040 | |
| 1041 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1042 | _mm512_maskz_shuffle_epi8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 1043 | { |
| 1044 | return (__m512i) __builtin_ia32_pshufb512_mask ((__v64qi) __A, |
| 1045 | (__v64qi) __B, |
| 1046 | (__v64qi) _mm512_setzero_qi(), |
| 1047 | (__mmask64) __U); |
| 1048 | } |
| 1049 | |
| 1050 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1051 | _mm512_subs_epi8 (__m512i __A, __m512i __B) |
| 1052 | { |
| 1053 | return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A, |
| 1054 | (__v64qi) __B, |
| 1055 | (__v64qi) _mm512_setzero_qi(), |
| 1056 | (__mmask64) -1); |
| 1057 | } |
| 1058 | |
| 1059 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1060 | _mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 1061 | __m512i __B) |
| 1062 | { |
| 1063 | return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A, |
| 1064 | (__v64qi) __B, |
| 1065 | (__v64qi) __W, |
| 1066 | (__mmask64) __U); |
| 1067 | } |
| 1068 | |
| 1069 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1070 | _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 1071 | { |
| 1072 | return (__m512i) __builtin_ia32_psubsb512_mask ((__v64qi) __A, |
| 1073 | (__v64qi) __B, |
| 1074 | (__v64qi) _mm512_setzero_qi(), |
| 1075 | (__mmask64) __U); |
| 1076 | } |
| 1077 | |
| 1078 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1079 | _mm512_subs_epi16 (__m512i __A, __m512i __B) |
| 1080 | { |
| 1081 | return (__m512i) __builtin_ia32_psubsw512_mask ((__v32hi) __A, |
| 1082 | (__v32hi) __B, |
| 1083 | (__v32hi) _mm512_setzero_hi(), |
| 1084 | (__mmask32) -1); |
| 1085 | } |
| 1086 | |
| 1087 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1088 | _mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1089 | __m512i __B) |
| 1090 | { |
| 1091 | return (__m512i) __builtin_ia32_psubsw512_mask ((__v32hi) __A, |
| 1092 | (__v32hi) __B, |
| 1093 | (__v32hi) __W, |
| 1094 | (__mmask32) __U); |
| 1095 | } |
| 1096 | |
| 1097 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1098 | _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1099 | { |
| 1100 | return (__m512i) __builtin_ia32_psubsw512_mask ((__v32hi) __A, |
| 1101 | (__v32hi) __B, |
| 1102 | (__v32hi) _mm512_setzero_hi(), |
| 1103 | (__mmask32) __U); |
| 1104 | } |
| 1105 | |
| 1106 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1107 | _mm512_subs_epu8 (__m512i __A, __m512i __B) |
| 1108 | { |
| 1109 | return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A, |
| 1110 | (__v64qi) __B, |
| 1111 | (__v64qi) _mm512_setzero_qi(), |
| 1112 | (__mmask64) -1); |
| 1113 | } |
| 1114 | |
| 1115 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1116 | _mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 1117 | __m512i __B) |
| 1118 | { |
| 1119 | return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A, |
| 1120 | (__v64qi) __B, |
| 1121 | (__v64qi) __W, |
| 1122 | (__mmask64) __U); |
| 1123 | } |
| 1124 | |
| 1125 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1126 | _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 1127 | { |
| 1128 | return (__m512i) __builtin_ia32_psubusb512_mask ((__v64qi) __A, |
| 1129 | (__v64qi) __B, |
| 1130 | (__v64qi) _mm512_setzero_qi(), |
| 1131 | (__mmask64) __U); |
| 1132 | } |
| 1133 | |
| 1134 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1135 | _mm512_subs_epu16 (__m512i __A, __m512i __B) |
| 1136 | { |
| 1137 | return (__m512i) __builtin_ia32_psubusw512_mask ((__v32hi) __A, |
| 1138 | (__v32hi) __B, |
| 1139 | (__v32hi) _mm512_setzero_hi(), |
| 1140 | (__mmask32) -1); |
| 1141 | } |
| 1142 | |
| 1143 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1144 | _mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1145 | __m512i __B) |
| 1146 | { |
| 1147 | return (__m512i) __builtin_ia32_psubusw512_mask ((__v32hi) __A, |
| 1148 | (__v32hi) __B, |
| 1149 | (__v32hi) __W, |
| 1150 | (__mmask32) __U); |
| 1151 | } |
| 1152 | |
| 1153 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1154 | _mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1155 | { |
| 1156 | return (__m512i) __builtin_ia32_psubusw512_mask ((__v32hi) __A, |
| 1157 | (__v32hi) __B, |
| 1158 | (__v32hi) _mm512_setzero_hi(), |
| 1159 | (__mmask32) __U); |
| 1160 | } |
| 1161 | |
| 1162 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1163 | _mm512_mask2_permutex2var_epi16 (__m512i __A, __m512i __I, |
| 1164 | __mmask32 __U, __m512i __B) |
| 1165 | { |
| 1166 | return (__m512i) __builtin_ia32_vpermi2varhi512_mask ((__v32hi) __A, |
| 1167 | (__v32hi) __I /* idx */ , |
| 1168 | (__v32hi) __B, |
| 1169 | (__mmask32) __U); |
| 1170 | } |
| 1171 | |
| 1172 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1173 | _mm512_permutex2var_epi16 (__m512i __A, __m512i __I, __m512i __B) |
| 1174 | { |
| 1175 | return (__m512i) __builtin_ia32_vpermt2varhi512_mask ((__v32hi) __I /* idx */, |
| 1176 | (__v32hi) __A, |
| 1177 | (__v32hi) __B, |
| 1178 | (__mmask32) -1); |
| 1179 | } |
| 1180 | |
| 1181 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1182 | _mm512_mask_permutex2var_epi16 (__m512i __A, __mmask32 __U, |
| 1183 | __m512i __I, __m512i __B) |
| 1184 | { |
| 1185 | return (__m512i) __builtin_ia32_vpermt2varhi512_mask ((__v32hi) __I /* idx */, |
| 1186 | (__v32hi) __A, |
| 1187 | (__v32hi) __B, |
| 1188 | (__mmask32) __U); |
| 1189 | } |
| 1190 | |
| 1191 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1192 | _mm512_maskz_permutex2var_epi16 (__mmask32 __U, __m512i __A, |
| 1193 | __m512i __I, __m512i __B) |
| 1194 | { |
| 1195 | return (__m512i) __builtin_ia32_vpermt2varhi512_maskz ((__v32hi) __I |
| 1196 | /* idx */ , |
| 1197 | (__v32hi) __A, |
| 1198 | (__v32hi) __B, |
| 1199 | (__mmask32) __U); |
| 1200 | } |
| 1201 | |
| 1202 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1203 | _mm512_mulhrs_epi16 (__m512i __A, __m512i __B) |
| 1204 | { |
| 1205 | return (__m512i) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A, |
| 1206 | (__v32hi) __B, |
| 1207 | (__v32hi) _mm512_setzero_hi(), |
| 1208 | (__mmask32) -1); |
| 1209 | } |
| 1210 | |
| 1211 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1212 | _mm512_mask_mulhrs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1213 | __m512i __B) |
| 1214 | { |
| 1215 | return (__m512i) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A, |
| 1216 | (__v32hi) __B, |
| 1217 | (__v32hi) __W, |
| 1218 | (__mmask32) __U); |
| 1219 | } |
| 1220 | |
| 1221 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1222 | _mm512_maskz_mulhrs_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1223 | { |
| 1224 | return (__m512i) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A, |
| 1225 | (__v32hi) __B, |
| 1226 | (__v32hi) _mm512_setzero_hi(), |
| 1227 | (__mmask32) __U); |
| 1228 | } |
| 1229 | |
| 1230 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1231 | _mm512_mulhi_epi16 (__m512i __A, __m512i __B) |
| 1232 | { |
| 1233 | return (__m512i) __builtin_ia32_pmulhw512_mask ((__v32hi) __A, |
| 1234 | (__v32hi) __B, |
| 1235 | (__v32hi) _mm512_setzero_hi(), |
| 1236 | (__mmask32) -1); |
| 1237 | } |
| 1238 | |
| 1239 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1240 | _mm512_mask_mulhi_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1241 | __m512i __B) |
| 1242 | { |
| 1243 | return (__m512i) __builtin_ia32_pmulhw512_mask ((__v32hi) __A, |
| 1244 | (__v32hi) __B, |
| 1245 | (__v32hi) __W, |
| 1246 | (__mmask32) __U); |
| 1247 | } |
| 1248 | |
| 1249 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1250 | _mm512_maskz_mulhi_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1251 | { |
| 1252 | return (__m512i) __builtin_ia32_pmulhw512_mask ((__v32hi) __A, |
| 1253 | (__v32hi) __B, |
| 1254 | (__v32hi) _mm512_setzero_hi(), |
| 1255 | (__mmask32) __U); |
| 1256 | } |
| 1257 | |
| 1258 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1259 | _mm512_mulhi_epu16 (__m512i __A, __m512i __B) |
| 1260 | { |
| 1261 | return (__m512i) __builtin_ia32_pmulhuw512_mask ((__v32hi) __A, |
| 1262 | (__v32hi) __B, |
| 1263 | (__v32hi) _mm512_setzero_hi(), |
| 1264 | (__mmask32) -1); |
| 1265 | } |
| 1266 | |
| 1267 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1268 | _mm512_mask_mulhi_epu16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1269 | __m512i __B) |
| 1270 | { |
| 1271 | return (__m512i) __builtin_ia32_pmulhuw512_mask ((__v32hi) __A, |
| 1272 | (__v32hi) __B, |
| 1273 | (__v32hi) __W, |
| 1274 | (__mmask32) __U); |
| 1275 | } |
| 1276 | |
| 1277 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1278 | _mm512_maskz_mulhi_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1279 | { |
| 1280 | return (__m512i) __builtin_ia32_pmulhuw512_mask ((__v32hi) __A, |
| 1281 | (__v32hi) __B, |
| 1282 | (__v32hi) _mm512_setzero_hi(), |
| 1283 | (__mmask32) __U); |
| 1284 | } |
| 1285 | |
| 1286 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1287 | _mm512_maddubs_epi16 (__m512i __X, __m512i __Y) { |
| 1288 | return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X, |
| 1289 | (__v64qi) __Y, |
| 1290 | (__v32hi) _mm512_setzero_hi(), |
| 1291 | (__mmask32) -1); |
| 1292 | } |
| 1293 | |
| 1294 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1295 | _mm512_mask_maddubs_epi16 (__m512i __W, __mmask32 __U, __m512i __X, |
| 1296 | __m512i __Y) { |
| 1297 | return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X, |
| 1298 | (__v64qi) __Y, |
| 1299 | (__v32hi) __W, |
| 1300 | (__mmask32) __U); |
| 1301 | } |
| 1302 | |
| 1303 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1304 | _mm512_maskz_maddubs_epi16 (__mmask32 __U, __m512i __X, __m512i __Y) { |
| 1305 | return (__m512i) __builtin_ia32_pmaddubsw512_mask ((__v64qi) __X, |
| 1306 | (__v64qi) __Y, |
| 1307 | (__v32hi) _mm512_setzero_hi(), |
| 1308 | (__mmask32) __U); |
| 1309 | } |
| 1310 | |
| 1311 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1312 | _mm512_madd_epi16 (__m512i __A, __m512i __B) { |
| 1313 | return (__m512i) __builtin_ia32_pmaddwd512_mask ((__v32hi) __A, |
| 1314 | (__v32hi) __B, |
| 1315 | (__v16si) _mm512_setzero_si512(), |
| 1316 | (__mmask16) -1); |
| 1317 | } |
| 1318 | |
| 1319 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1320 | _mm512_mask_madd_epi16 (__m512i __W, __mmask16 __U, __m512i __A, |
| 1321 | __m512i __B) { |
| 1322 | return (__m512i) __builtin_ia32_pmaddwd512_mask ((__v32hi) __A, |
| 1323 | (__v32hi) __B, |
| 1324 | (__v16si) __W, |
| 1325 | (__mmask16) __U); |
| 1326 | } |
| 1327 | |
| 1328 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1329 | _mm512_maskz_madd_epi16 (__mmask16 __U, __m512i __A, __m512i __B) { |
| 1330 | return (__m512i) __builtin_ia32_pmaddwd512_mask ((__v32hi) __A, |
| 1331 | (__v32hi) __B, |
| 1332 | (__v16si) _mm512_setzero_si512(), |
| 1333 | (__mmask16) __U); |
| 1334 | } |
| 1335 | |
| 1336 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1337 | _mm512_cvtsepi16_epi8 (__m512i __A) { |
| 1338 | return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A, |
| 1339 | (__v32qi)_mm256_setzero_si256(), |
| 1340 | (__mmask32) -1); |
| 1341 | } |
| 1342 | |
| 1343 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1344 | _mm512_mask_cvtsepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) { |
| 1345 | return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A, |
| 1346 | (__v32qi)__O, |
| 1347 | __M); |
| 1348 | } |
| 1349 | |
| 1350 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1351 | _mm512_maskz_cvtsepi16_epi8 (__mmask32 __M, __m512i __A) { |
| 1352 | return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A, |
| 1353 | (__v32qi) _mm256_setzero_si256(), |
| 1354 | __M); |
| 1355 | } |
| 1356 | |
| 1357 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1358 | _mm512_cvtusepi16_epi8 (__m512i __A) { |
| 1359 | return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A, |
| 1360 | (__v32qi) _mm256_setzero_si256(), |
| 1361 | (__mmask32) -1); |
| 1362 | } |
| 1363 | |
| 1364 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1365 | _mm512_mask_cvtusepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) { |
| 1366 | return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A, |
| 1367 | (__v32qi) __O, |
| 1368 | __M); |
| 1369 | } |
| 1370 | |
| 1371 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1372 | _mm512_maskz_cvtusepi16_epi8 (__mmask32 __M, __m512i __A) { |
| 1373 | return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A, |
| 1374 | (__v32qi) _mm256_setzero_si256(), |
| 1375 | __M); |
| 1376 | } |
| 1377 | |
| 1378 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1379 | _mm512_cvtepi16_epi8 (__m512i __A) { |
| 1380 | return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A, |
| 1381 | (__v32qi) _mm256_setzero_si256(), |
| 1382 | (__mmask32) -1); |
| 1383 | } |
| 1384 | |
| 1385 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1386 | _mm512_mask_cvtepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) { |
| 1387 | return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A, |
| 1388 | (__v32qi) __O, |
| 1389 | __M); |
| 1390 | } |
| 1391 | |
| 1392 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 1393 | _mm512_maskz_cvtepi16_epi8 (__mmask32 __M, __m512i __A) { |
| 1394 | return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A, |
| 1395 | (__v32qi) _mm256_setzero_si256(), |
| 1396 | __M); |
| 1397 | } |
| 1398 | |
| 1399 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1400 | _mm512_unpackhi_epi8 (__m512i __A, __m512i __B) { |
| 1401 | return (__m512i) __builtin_ia32_punpckhbw512_mask ((__v64qi) __A, |
| 1402 | (__v64qi) __B, |
| 1403 | (__v64qi) _mm512_setzero_qi(), |
| 1404 | (__mmask64) -1); |
| 1405 | } |
| 1406 | |
| 1407 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1408 | _mm512_mask_unpackhi_epi8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 1409 | __m512i __B) { |
| 1410 | return (__m512i) __builtin_ia32_punpckhbw512_mask ((__v64qi) __A, |
| 1411 | (__v64qi) __B, |
| 1412 | (__v64qi) __W, |
| 1413 | (__mmask64) __U); |
| 1414 | } |
| 1415 | |
| 1416 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1417 | _mm512_maskz_unpackhi_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { |
| 1418 | return (__m512i) __builtin_ia32_punpckhbw512_mask ((__v64qi) __A, |
| 1419 | (__v64qi) __B, |
| 1420 | (__v64qi) _mm512_setzero_qi(), |
| 1421 | (__mmask64) __U); |
| 1422 | } |
| 1423 | |
| 1424 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1425 | _mm512_unpackhi_epi16 (__m512i __A, __m512i __B) { |
| 1426 | return (__m512i) __builtin_ia32_punpckhwd512_mask ((__v32hi) __A, |
| 1427 | (__v32hi) __B, |
| 1428 | (__v32hi) _mm512_setzero_hi(), |
| 1429 | (__mmask32) -1); |
| 1430 | } |
| 1431 | |
| 1432 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1433 | _mm512_mask_unpackhi_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1434 | __m512i __B) { |
| 1435 | return (__m512i) __builtin_ia32_punpckhwd512_mask ((__v32hi) __A, |
| 1436 | (__v32hi) __B, |
| 1437 | (__v32hi) __W, |
| 1438 | (__mmask32) __U); |
| 1439 | } |
| 1440 | |
| 1441 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1442 | _mm512_maskz_unpackhi_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { |
| 1443 | return (__m512i) __builtin_ia32_punpckhwd512_mask ((__v32hi) __A, |
| 1444 | (__v32hi) __B, |
| 1445 | (__v32hi) _mm512_setzero_hi(), |
| 1446 | (__mmask32) __U); |
| 1447 | } |
| 1448 | |
| 1449 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1450 | _mm512_unpacklo_epi8 (__m512i __A, __m512i __B) { |
| 1451 | return (__m512i) __builtin_ia32_punpcklbw512_mask ((__v64qi) __A, |
| 1452 | (__v64qi) __B, |
| 1453 | (__v64qi) _mm512_setzero_qi(), |
| 1454 | (__mmask64) -1); |
| 1455 | } |
| 1456 | |
| 1457 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1458 | _mm512_mask_unpacklo_epi8 (__m512i __W, __mmask64 __U, __m512i __A, |
| 1459 | __m512i __B) { |
| 1460 | return (__m512i) __builtin_ia32_punpcklbw512_mask ((__v64qi) __A, |
| 1461 | (__v64qi) __B, |
| 1462 | (__v64qi) __W, |
| 1463 | (__mmask64) __U); |
| 1464 | } |
| 1465 | |
| 1466 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1467 | _mm512_maskz_unpacklo_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { |
| 1468 | return (__m512i) __builtin_ia32_punpcklbw512_mask ((__v64qi) __A, |
| 1469 | (__v64qi) __B, |
| 1470 | (__v64qi) _mm512_setzero_qi(), |
| 1471 | (__mmask64) __U); |
| 1472 | } |
| 1473 | |
| 1474 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1475 | _mm512_unpacklo_epi16 (__m512i __A, __m512i __B) { |
| 1476 | return (__m512i) __builtin_ia32_punpcklwd512_mask ((__v32hi) __A, |
| 1477 | (__v32hi) __B, |
| 1478 | (__v32hi) _mm512_setzero_hi(), |
| 1479 | (__mmask32) -1); |
| 1480 | } |
| 1481 | |
| 1482 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1483 | _mm512_mask_unpacklo_epi16 (__m512i __W, __mmask32 __U, __m512i __A, |
| 1484 | __m512i __B) { |
| 1485 | return (__m512i) __builtin_ia32_punpcklwd512_mask ((__v32hi) __A, |
| 1486 | (__v32hi) __B, |
| 1487 | (__v32hi) __W, |
| 1488 | (__mmask32) __U); |
| 1489 | } |
| 1490 | |
| 1491 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 1492 | _mm512_maskz_unpacklo_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { |
| 1493 | return (__m512i) __builtin_ia32_punpcklwd512_mask ((__v32hi) __A, |
| 1494 | (__v32hi) __B, |
| 1495 | (__v32hi) _mm512_setzero_hi(), |
| 1496 | (__mmask32) __U); |
| 1497 | } |
| 1498 | |
Stephen Hines | b4d9c8b | 2015-03-30 16:04:04 -0700 | [diff] [blame] | 1499 | #define _mm512_cmp_epi8_mask(a, b, p) __extension__ ({ \ |
| 1500 | (__mmask16)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \ |
| 1501 | (__v64qi)(__m512i)(b), \ |
| 1502 | (p), (__mmask64)-1); }) |
| 1503 | |
| 1504 | #define _mm512_mask_cmp_epi8_mask(m, a, b, p) __extension__ ({ \ |
| 1505 | (__mmask16)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \ |
| 1506 | (__v64qi)(__m512i)(b), \ |
| 1507 | (p), (__mmask64)(m)); }) |
| 1508 | |
| 1509 | #define _mm512_cmp_epu8_mask(a, b, p) __extension__ ({ \ |
| 1510 | (__mmask16)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \ |
| 1511 | (__v64qi)(__m512i)(b), \ |
| 1512 | (p), (__mmask64)-1); }) |
| 1513 | |
| 1514 | #define _mm512_mask_cmp_epu8_mask(m, a, b, p) __extension__ ({ \ |
| 1515 | (__mmask16)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \ |
| 1516 | (__v64qi)(__m512i)(b), \ |
| 1517 | (p), (__mmask64)(m)); }) |
| 1518 | |
| 1519 | #define _mm512_cmp_epi16_mask(a, b, p) __extension__ ({ \ |
| 1520 | (__mmask16)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \ |
| 1521 | (__v32hi)(__m512i)(b), \ |
| 1522 | (p), (__mmask32)-1); }) |
| 1523 | |
| 1524 | #define _mm512_mask_cmp_epi16_mask(m, a, b, p) __extension__ ({ \ |
| 1525 | (__mmask16)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \ |
| 1526 | (__v32hi)(__m512i)(b), \ |
| 1527 | (p), (__mmask32)(m)); }) |
| 1528 | |
| 1529 | #define _mm512_cmp_epu16_mask(a, b, p) __extension__ ({ \ |
| 1530 | (__mmask16)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \ |
| 1531 | (__v32hi)(__m512i)(b), \ |
| 1532 | (p), (__mmask32)-1); }) |
| 1533 | |
| 1534 | #define _mm512_mask_cmp_epu16_mask(m, a, b, p) __extension__ ({ \ |
| 1535 | (__mmask16)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \ |
| 1536 | (__v32hi)(__m512i)(b), \ |
| 1537 | (p), (__mmask32)(m)); }) |
| 1538 | |
Pirama Arumuga Nainar | 4e74a02 | 2016-03-17 18:03:02 -0700 | [diff] [blame^] | 1539 | |
| 1540 | #undef __DEFAULT_FN_ATTRS |
| 1541 | |
Stephen Hines | ee4ca28 | 2014-12-02 17:05:12 -0800 | [diff] [blame] | 1542 | #endif |