| // SPDX-License-Identifier: GPL-2.0-only |
| /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. |
| */ |
| #include <linux/clk.h> |
| #include <linux/delay.h> |
| #include <linux/gpio.h> |
| #include <linux/of_gpio.h> |
| #include <linux/platform_device.h> |
| #include <linux/slab.h> |
| #include <linux/i2c.h> |
| #include <linux/io.h> |
| #include <linux/module.h> |
| #include <linux/input.h> |
| #include <linux/of_device.h> |
| #include <linux/pm_qos.h> |
| #include <linux/regulator/consumer.h> |
| #include <sound/core.h> |
| #include <sound/soc.h> |
| #include <sound/soc-dapm.h> |
| #include <sound/pcm.h> |
| #include <sound/pcm_params.h> |
| #include <sound/info.h> |
| #include <dsp/audio_notifier.h> |
| #include <dsp/apr_audio-v2.h> |
| #include <dsp/q6afe-v2.h> |
| #include <dsp/q6core.h> |
| #include <dsp/msm_mdf.h> |
| #include "device_event.h" |
| #include "msm-pcm-routing-v2.h" |
| #include <asoc/msm-cdc-pinctrl.h> |
| #include "codecs/wcd9335.h" |
| #include "codecs/wsa881x.h" |
| #include "codecs/csra66x0/csra66x0.h" |
| #include <dt-bindings/sound/audio-codec-port-types.h> |
| #include "codecs/bolero/bolero-cdc.h" |
| #include "codecs/bolero/wsa-macro.h" |
| |
| #define DRV_NAME "qcs405-asoc-snd" |
| |
| #define __CHIPSET__ "QCS405 " |
| #define MSM_DAILINK_NAME(name) (__CHIPSET__#name) |
| |
| #define DEV_NAME_STR_LEN 32 |
| |
| #define SAMPLING_RATE_8KHZ 8000 |
| #define SAMPLING_RATE_11P025KHZ 11025 |
| #define SAMPLING_RATE_16KHZ 16000 |
| #define SAMPLING_RATE_22P05KHZ 22050 |
| #define SAMPLING_RATE_32KHZ 32000 |
| #define SAMPLING_RATE_44P1KHZ 44100 |
| #define SAMPLING_RATE_48KHZ 48000 |
| #define SAMPLING_RATE_88P2KHZ 88200 |
| #define SAMPLING_RATE_96KHZ 96000 |
| #define SAMPLING_RATE_176P4KHZ 176400 |
| #define SAMPLING_RATE_192KHZ 192000 |
| #define SAMPLING_RATE_352P8KHZ 352800 |
| #define SAMPLING_RATE_384KHZ 384000 |
| |
| #define SPDIF_TX_CORE_CLK_163_P84_MHZ 163840000 |
| #define TLMM_EAST_SPARE 0x07BA0000 |
| #define TLMM_SPDIF_HDMI_ARC_CTL 0x07BA2000 |
| |
| #define WSA8810_NAME_1 "wsa881x.20170211" |
| #define WSA8810_NAME_2 "wsa881x.20170212" |
| #define WCN_CDC_SLIM_RX_CH_MAX 2 |
| #define WCN_CDC_SLIM_TX_CH_MAX 4 |
| #define TDM_CHANNEL_MAX 8 |
| #define BT_SLIM_TX SLIM_TX_9 |
| |
| #define ADSP_STATE_READY_TIMEOUT_MS 3000 |
| #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */ |
| |
| enum { |
| SLIM_RX_0 = 0, |
| SLIM_RX_1, |
| SLIM_RX_2, |
| SLIM_RX_3, |
| SLIM_RX_4, |
| SLIM_RX_5, |
| SLIM_RX_6, |
| SLIM_RX_7, |
| SLIM_RX_MAX, |
| }; |
| |
| enum { |
| SLIM_TX_0 = 0, |
| SLIM_TX_1, |
| SLIM_TX_2, |
| SLIM_TX_3, |
| SLIM_TX_4, |
| SLIM_TX_5, |
| SLIM_TX_6, |
| SLIM_TX_7, |
| SLIM_TX_8, |
| SLIM_TX_9, |
| SLIM_TX_MAX, |
| }; |
| |
| enum { |
| PRIM_MI2S = 0, |
| SEC_MI2S, |
| TERT_MI2S, |
| QUAT_MI2S, |
| QUIN_MI2S, |
| SEN_MI2S, |
| MI2S_MAX, |
| }; |
| |
| enum { |
| PRIM_META_MI2S = 0, |
| SEC_META_MI2S, |
| META_MI2S_MAX, |
| }; |
| |
| enum { |
| PRIM_AUX_PCM = 0, |
| SEC_AUX_PCM, |
| TERT_AUX_PCM, |
| QUAT_AUX_PCM, |
| QUIN_AUX_PCM, |
| SEN_AUX_PCM, |
| AUX_PCM_MAX, |
| }; |
| |
| enum { |
| WSA_CDC_DMA_RX_0 = 0, |
| WSA_CDC_DMA_RX_1, |
| CDC_DMA_RX_MAX, |
| }; |
| |
| enum { |
| WSA_CDC_DMA_TX_0 = 0, |
| WSA_CDC_DMA_TX_1, |
| WSA_CDC_DMA_TX_2, |
| VA_CDC_DMA_TX_0, |
| VA_CDC_DMA_TX_1, |
| CDC_DMA_TX_MAX, |
| }; |
| |
| enum { |
| PRIM_SPDIF_RX = 0, |
| SEC_SPDIF_RX, |
| SPDIF_RX_MAX, |
| }; |
| |
| enum { |
| PRIM_SPDIF_TX = 0, |
| SEC_SPDIF_TX, |
| SPDIF_TX_MAX, |
| }; |
| |
| enum { |
| HDMI_RX_IDX = 0, |
| EXT_HDMI_RX_IDX_MAX, |
| }; |
| |
| struct mi2s_conf { |
| struct mutex lock; |
| u32 ref_cnt; |
| u32 msm_is_mi2s_master; |
| }; |
| |
| static u32 mi2s_ebit_clk[MI2S_MAX] = { |
| Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT, |
| Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT, |
| Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT, |
| Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT, |
| Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT, |
| Q6AFE_LPASS_CLK_ID_SEN_MI2S_EBIT |
| }; |
| |
| struct meta_mi2s_conf { |
| u32 num_member_ports; |
| u32 member_port[MAX_NUM_I2S_META_PORT_MEMBER_PORTS]; |
| bool clk_enable[MAX_NUM_I2S_META_PORT_MEMBER_PORTS]; |
| }; |
| |
| struct dev_config { |
| u32 sample_rate; |
| u32 bit_format; |
| u32 channels; |
| u32 data_format; |
| }; |
| |
| struct msm_wsa881x_dev_info { |
| struct device_node *of_node; |
| u32 index; |
| }; |
| |
| struct msm_csra66x0_dev_info { |
| struct device_node *of_node; |
| u32 index; |
| }; |
| |
| struct msm_asoc_mach_data { |
| struct snd_info_entry *codec_root; |
| struct device_node *dmic_01_gpio_p; /* used by pinctrl API */ |
| struct device_node *dmic_23_gpio_p; /* used by pinctrl API */ |
| struct device_node *dmic_45_gpio_p; /* used by pinctrl API */ |
| struct device_node *dmic_67_gpio_p; /* used by pinctrl API */ |
| struct device_node *lineout_booster_gpio_p; /* used by pinctrl API */ |
| struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */ |
| int dmic_01_gpio_cnt; |
| int dmic_23_gpio_cnt; |
| int dmic_45_gpio_cnt; |
| int dmic_67_gpio_cnt; |
| struct regulator *tdm_micb_supply; |
| u32 tdm_micb_voltage; |
| u32 tdm_micb_current; |
| bool codec_is_csra; |
| void __iomem *mi2s_dsd_mode[MI2S_MAX]; |
| }; |
| |
| struct msm_asoc_wcd93xx_codec { |
| void* (*get_afe_config_fn)(struct snd_soc_component *component, |
| enum afe_config_type config_type); |
| }; |
| |
| static const char *const pin_states[] = {"sleep", "i2s-active", |
| "tdm-active"}; |
| |
| enum { |
| TDM_0 = 0, |
| TDM_1, |
| TDM_2, |
| TDM_3, |
| TDM_4, |
| TDM_5, |
| TDM_6, |
| TDM_7, |
| TDM_PORT_MAX, |
| }; |
| |
| enum { |
| TDM_PRI = 0, |
| TDM_SEC, |
| TDM_TERT, |
| TDM_QUAT, |
| TDM_QUIN, |
| TDM_INTERFACE_MAX, |
| }; |
| |
| struct tdm_port { |
| u32 mode; |
| u32 channel; |
| }; |
| |
| /* TDM default config */ |
| static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = { |
| { /* PRI TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */ |
| }, |
| { /* SEC TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */ |
| }, |
| { /* TERT TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */ |
| }, |
| { /* QUAT TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */ |
| }, |
| { /* QUIN TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */ |
| } |
| }; |
| |
| /* TDM default config */ |
| static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = { |
| { /* PRI TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */ |
| }, |
| { /* SEC TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */ |
| }, |
| { /* TERT TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */ |
| }, |
| { /* QUAT TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */ |
| }, |
| { /* QUIN TDM */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */ |
| {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */ |
| } |
| }; |
| static struct dev_config ext_hdmi_rx_cfg[] = { |
| [HDMI_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| /* Default configuration of slimbus channels */ |
| static struct dev_config slim_rx_cfg[] = { |
| [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| }; |
| |
| static struct dev_config slim_tx_cfg[] = { |
| [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SLIM_TX_9] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| }; |
| |
| /* Default configuration of Codec DMA Interface Tx */ |
| static struct dev_config cdc_dma_rx_cfg[] = { |
| [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| /* Default configuration of Codec DMA Interface Rx */ |
| static struct dev_config cdc_dma_tx_cfg[] = { |
| [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8}, |
| [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8}, |
| }; |
| |
| static struct dev_config usb_rx_cfg = { |
| .sample_rate = SAMPLING_RATE_48KHZ, |
| .bit_format = SNDRV_PCM_FORMAT_S16_LE, |
| .channels = 2, |
| }; |
| |
| static struct dev_config usb_tx_cfg = { |
| .sample_rate = SAMPLING_RATE_48KHZ, |
| .bit_format = SNDRV_PCM_FORMAT_S16_LE, |
| .channels = 1, |
| }; |
| |
| static struct dev_config proxy_rx_cfg = { |
| .sample_rate = SAMPLING_RATE_48KHZ, |
| .bit_format = SNDRV_PCM_FORMAT_S16_LE, |
| .channels = 2, |
| }; |
| |
| /* Default configuration of MI2S channels */ |
| static struct dev_config mi2s_rx_cfg[] = { |
| [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| static struct dev_config meta_mi2s_rx_cfg[] = { |
| [PRIM_META_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SEC_META_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| /* Default configuration of SPDIF channels */ |
| static struct dev_config spdif_rx_cfg[] = { |
| [PRIM_SPDIF_RX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SEC_SPDIF_RX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| static struct dev_config spdif_tx_cfg[] = { |
| [PRIM_SPDIF_TX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| [SEC_SPDIF_TX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, |
| }; |
| |
| static struct dev_config mi2s_tx_cfg[] = { |
| [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| }; |
| |
| static struct dev_config aux_pcm_rx_cfg[] = { |
| [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| }; |
| |
| static struct dev_config aux_pcm_tx_cfg[] = { |
| [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, |
| }; |
| |
| static struct dev_config afe_lb_tx_cfg = { |
| .sample_rate = SAMPLING_RATE_48KHZ, |
| .bit_format = SNDRV_PCM_FORMAT_S16_LE, |
| .channels = 2, |
| }; |
| |
| static int msm_vi_feed_tx_ch = 2; |
| static const char *const slim_rx_ch_text[] = {"One", "Two"}; |
| static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four", |
| "Five", "Six", "Seven", |
| "Eight"}; |
| static const char *const vi_feed_ch_text[] = {"One", "Two"}; |
| static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE", |
| "S32_LE"}; |
| static const char *const data_format_text[] = { |
| "LPCM", |
| "Compr", |
| "LPCM-60958", |
| "Compr-60958", |
| "NA4", |
| "NA5", |
| "NA6", |
| "NA7", |
| "NA8", |
| "DSD_DOP_W_MARKER", |
| "NATIVE_DSD_DATA" |
| }; |
| static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16", |
| "KHZ_32", "KHZ_44P1", "KHZ_48", |
| "KHZ_88P2", "KHZ_96", "KHZ_176P4", |
| "KHZ_192", "KHZ_352P8", "KHZ_384"}; |
| static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", |
| "KHZ_44P1", "KHZ_48", |
| "KHZ_88P2", "KHZ_96"}; |
| static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four", |
| "Five", "Six", "Seven", |
| "Eight"}; |
| static char const *ch_text[] = {"Two", "Three", "Four", "Five", |
| "Six", "Seven", "Eight"}; |
| static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025", |
| "KHZ_16", "KHZ_22P05", |
| "KHZ_32", "KHZ_44P1", "KHZ_48", |
| "KHZ_88P2", "KHZ_96", "KHZ_176P4", |
| "KHZ_192", "KHZ_352P8", "KHZ_384"}; |
| static char const *ext_hdmi_sample_rate_text[] = {"KHZ_48", "KHZ_96", |
| "KHZ_192", "KHZ_32", "KHZ_44P1", |
| "KHZ_88P2", "KHZ_176P4"}; |
| static char const *ext_hdmi_bit_format_text[] = {"S16_LE", "S24_LE", |
| "S24_3LE"}; |
| |
| static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four", |
| "Five", "Six", "Seven", "Eight"}; |
| static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"}; |
| static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32", |
| "KHZ_48", "KHZ_176P4", |
| "KHZ_352P8"}; |
| static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"}; |
| static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16", |
| "KHZ_22P05", "KHZ_32", "KHZ_44P1", |
| "KHZ_48", "KHZ_88P2", "KHZ_96", "KHZ_176P4", |
| "KHZ_192", "KHZ_352P8", "KHZ_384"}; |
| static const char *const mi2s_ch_text[] = { |
| "One", "Two", "Three", "Four", "Five", "Six", "Seven", |
| "Eight", "Nine", "Ten", "Eleven", "Twelve", "Thirteen", |
| "Fourteen", "Fifteen", "Sixteen" |
| }; |
| static const char *const meta_mi2s_ch_text[] = { |
| "One", "Two", "Three", "Four", "Five", "Six", "Seven", |
| "Eight", "Nine", "Ten", "Eleven", "Twelve", "Thirteen", |
| "Fourteen", "Fifteen", "Sixteen", "Seventeen", "Eighteen", |
| "Nineteen", "Twenty", "TwentyOne", "TwentyTwo", "TwentyThree", |
| "TwentyFour", "TwentyFive", "TwentySix", "TwentySeven", |
| "TwentyEight", "TwentyNine", "Thirty", "ThirtyOne", "ThirtyTwo" |
| }; |
| static const char *const qos_text[] = {"Disable", "Enable"}; |
| |
| static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"}; |
| static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four", |
| "Five", "Six", "Seven", "Eight", "Nine", "Ten", "Eleven", |
| "Twelve", "Thirteen", "Fourteen", "Fifteen", "Sixteen"}; |
| static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025", |
| "KHZ_16", "KHZ_22P05", |
| "KHZ_32", "KHZ_44P1", "KHZ_48", |
| "KHZ_88P2", "KHZ_96", "KHZ_176P4", |
| "KHZ_192", "KHZ_352P8", "KHZ_384"}; |
| |
| static const char *spdif_rate_text[] = {"KHZ_32", "KHZ_44P1", "KHZ_48", |
| "KHZ_88P2", "KHZ_96", "KHZ_176P4", |
| "KHZ_192"}; |
| static const char *spdif_ch_text[] = {"One", "Two"}; |
| static const char *spdif_bit_format_text[] = {"S16_LE", "S24_LE"}; |
| |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(ext_hdmi_rx_chs, ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(ext_hdmi_rx_format, ext_hdmi_bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_sink, bt_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(ext_hdmi_rx_sample_rate, |
| ext_hdmi_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_data_format, data_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_data_format, data_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_meta_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_meta_mi2s_rx_sample_rate, mi2s_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_meta_mi2s_rx_chs, meta_mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_meta_mi2s_rx_chs, meta_mi2s_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(prim_meta_mi2s_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(sec_meta_mi2s_rx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate, |
| cdc_dma_sample_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_rx_sample_rate, spdif_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_tx_sample_rate, spdif_rate_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_rx_chs, spdif_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_tx_chs, spdif_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_rx_format, spdif_bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(spdif_tx_format, spdif_bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(afe_lb_tx_chs, cdc_dma_tx_ch_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(afe_lb_tx_format, bit_format_text); |
| static SOC_ENUM_SINGLE_EXT_DECL(afe_lb_tx_sample_rate, |
| cdc_dma_sample_rate_text); |
| |
| static struct platform_device *spdev; |
| |
| static bool is_initial_boot; |
| static bool codec_reg_done; |
| static struct snd_soc_aux_dev *msm_aux_dev; |
| static struct snd_soc_codec_conf *msm_codec_conf; |
| static struct msm_asoc_wcd93xx_codec msm_codec_fn; |
| |
| static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component, |
| int enable, bool dapm); |
| static int msm_wsa881x_init(struct snd_soc_component *component); |
| static int msm_snd_vad_cfg_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol); |
| |
| static struct snd_soc_dapm_route wcd_audio_paths[] = { |
| {"MIC BIAS1", NULL, "MCLK TX"}, |
| {"MIC BIAS2", NULL, "MCLK TX"}, |
| {"MIC BIAS3", NULL, "MCLK TX"}, |
| {"MIC BIAS4", NULL, "MCLK TX"}, |
| }; |
| |
| static struct afe_clk_set mi2s_clk[MI2S_MAX] = { |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| }, |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| }, |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| }, |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| }, |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| }, |
| { |
| AFE_API_VERSION_I2S_CONFIG, |
| Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT, |
| Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 0, |
| } |
| |
| }; |
| |
| static struct mi2s_conf mi2s_intf_conf[MI2S_MAX]; |
| |
| static struct meta_mi2s_conf meta_mi2s_intf_conf[META_MI2S_MAX]; |
| |
| static int msm_island_vad_get_portid_from_beid(int32_t be_id, int *port_id) |
| { |
| *port_id = 0xFFFF; |
| |
| switch (be_id) { |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0: |
| *port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0; |
| break; |
| case MSM_BACKEND_DAI_QUINARY_MI2S_TX: |
| *port_id = AFE_PORT_ID_QUINARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_QUIN_TDM_TX_0: |
| *port_id = AFE_PORT_ID_QUINARY_TDM_TX; |
| break; |
| case MSM_BACKEND_DAI_QUIN_AUXPCM_TX: |
| *port_id = AFE_PORT_ID_QUINARY_PCM_TX; |
| break; |
| default: |
| return -EINVAL; |
| } |
| return 0; |
| } |
| |
| static int qcs405_send_island_vad_config(int32_t be_id) |
| { |
| int rc = 0; |
| int port_id = 0xFFFF; |
| |
| rc = msm_island_vad_get_portid_from_beid(be_id, &port_id); |
| if (rc) { |
| pr_debug("%s: Invalid island interface\n", __func__); |
| } else { |
| /* |
| * send island mode config |
| * This should be the first configuration |
| */ |
| rc = afe_send_port_island_mode(port_id); |
| if (rc) { |
| pr_err("%s: afe send island mode failed %d\n", |
| __func__, rc); |
| return rc; |
| } |
| |
| rc = afe_send_port_vad_cfg_params(port_id); |
| if (rc) { |
| pr_err("%s: afe send vad config failed %d\n", |
| __func__, rc); |
| return rc; |
| } |
| } |
| |
| return 0; |
| } |
| |
| static int slim_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val = 0; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 10; |
| break; |
| default: |
| sample_rate_val = 4; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int slim_get_sample_rate(int value) |
| { |
| int sample_rate = 0; |
| |
| switch (value) { |
| case 0: |
| sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| case 1: |
| sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 2: |
| sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 4: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 5: |
| sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 6: |
| sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 7: |
| sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 8: |
| sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 9: |
| sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 10: |
| sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| default: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| static int slim_get_bit_format_val(int bit_format) |
| { |
| int val = 0; |
| |
| switch (bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| val = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| val = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| val = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| val = 0; |
| break; |
| } |
| return val; |
| } |
| |
| static int slim_get_bit_format(int val) |
| { |
| int bit_fmt = SNDRV_PCM_FORMAT_S16_LE; |
| |
| switch (val) { |
| case 0: |
| bit_fmt = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| case 1: |
| bit_fmt = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 2: |
| bit_fmt = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 3: |
| bit_fmt = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| default: |
| bit_fmt = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| return bit_fmt; |
| } |
| |
| static int slim_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int port_id = 0; |
| |
| if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) { |
| port_id = SLIM_RX_0; |
| } else if (strnstr(kcontrol->id.name, |
| "SLIM_2_RX", sizeof("SLIM_2_RX"))) { |
| port_id = SLIM_RX_2; |
| } else if (strnstr(kcontrol->id.name, |
| "SLIM_5_RX", sizeof("SLIM_5_RX"))) { |
| port_id = SLIM_RX_5; |
| } else if (strnstr(kcontrol->id.name, |
| "SLIM_6_RX", sizeof("SLIM_6_RX"))) { |
| port_id = SLIM_RX_6; |
| } else if (strnstr(kcontrol->id.name, |
| "SLIM_0_TX", sizeof("SLIM_0_TX"))) { |
| port_id = SLIM_TX_0; |
| } else if (strnstr(kcontrol->id.name, |
| "SLIM_1_TX", sizeof("SLIM_1_TX"))) { |
| port_id = SLIM_TX_1; |
| } else { |
| pr_err("%s: unsupported channel: %s", |
| __func__, kcontrol->id.name); |
| return -EINVAL; |
| } |
| |
| return port_id; |
| } |
| |
| static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| ucontrol->value.enumerated.item[0] = |
| slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate); |
| |
| pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| ch_num, slim_rx_cfg[ch_num].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| slim_rx_cfg[ch_num].sample_rate = |
| slim_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| ch_num, slim_rx_cfg[ch_num].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| ucontrol->value.enumerated.item[0] = |
| slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate); |
| |
| pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| ch_num, slim_tx_cfg[ch_num].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate = 0; |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| if (sample_rate == SAMPLING_RATE_44P1KHZ) { |
| pr_err("%s: Unsupported sample rate %d: for Tx path\n", |
| __func__, sample_rate); |
| return -EINVAL; |
| } |
| slim_tx_cfg[ch_num].sample_rate = sample_rate; |
| |
| pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__, |
| ch_num, slim_tx_cfg[ch_num].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| ucontrol->value.enumerated.item[0] = |
| slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format); |
| |
| pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n", |
| __func__, ch_num, slim_rx_cfg[ch_num].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| slim_rx_cfg[ch_num].bit_format = |
| slim_get_bit_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n", |
| __func__, ch_num, slim_rx_cfg[ch_num].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| ucontrol->value.enumerated.item[0] = |
| slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format); |
| |
| pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n", |
| __func__, ch_num, slim_tx_cfg[ch_num].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| slim_tx_cfg[ch_num].bit_format = |
| slim_get_bit_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n", |
| __func__, ch_num, slim_tx_cfg[ch_num].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int slim_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__, |
| ch_num, slim_rx_cfg[ch_num].channels); |
| ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1; |
| |
| return 0; |
| } |
| |
| static int slim_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__, |
| ch_num, slim_rx_cfg[ch_num].channels); |
| |
| return 1; |
| } |
| |
| static int slim_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__, |
| ch_num, slim_tx_cfg[ch_num].channels); |
| ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1; |
| |
| return 0; |
| } |
| |
| static int slim_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = slim_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__, |
| ch_num, slim_tx_cfg[ch_num].channels); |
| |
| return 1; |
| } |
| |
| static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1; |
| pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch); |
| return 1; |
| } |
| |
| static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| /* |
| * Slimbus_7_Rx/Tx sample rate values should always be in sync (same) |
| * when used for BT_SCO use case. Return either Rx or Tx sample rate |
| * value. |
| */ |
| switch (slim_rx_cfg[SLIM_RX_7].sample_rate) { |
| case SAMPLING_RATE_96KHZ: |
| ucontrol->value.integer.value[0] = 5; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| ucontrol->value.integer.value[0] = 4; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| pr_debug("%s: sample rate = %d", __func__, |
| slim_rx_cfg[SLIM_RX_7].sample_rate); |
| |
| return 0; |
| } |
| |
| static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 1: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 2: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 3: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 4: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 5: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 0: |
| default: |
| slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ; |
| slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| } |
| pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n", |
| __func__, |
| slim_rx_cfg[SLIM_RX_7].sample_rate, |
| slim_tx_cfg[SLIM_TX_7].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_bt_sample_rate_sink_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (slim_tx_cfg[BT_SLIM_TX].sample_rate) { |
| case SAMPLING_RATE_96KHZ: |
| ucontrol->value.integer.value[0] = 5; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| ucontrol->value.integer.value[0] = 4; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| pr_debug("%s: sample rate = %d", __func__, |
| slim_tx_cfg[BT_SLIM_TX].sample_rate); |
| |
| return 0; |
| } |
| |
| static int msm_bt_sample_rate_sink_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 1: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 2: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 3: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 4: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 5: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 0: |
| default: |
| slim_tx_cfg[BT_SLIM_TX].sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| } |
| pr_debug("%s: sample rate = %d, value = %d\n", |
| __func__, |
| slim_tx_cfg[BT_SLIM_TX].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx = 0; |
| |
| if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0", |
| sizeof("WSA_CDC_DMA_RX_0"))) |
| idx = WSA_CDC_DMA_RX_0; |
| else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1", |
| sizeof("WSA_CDC_DMA_RX_0"))) |
| idx = WSA_CDC_DMA_RX_1; |
| else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0", |
| sizeof("WSA_CDC_DMA_TX_0"))) |
| idx = WSA_CDC_DMA_TX_0; |
| else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1", |
| sizeof("WSA_CDC_DMA_TX_1"))) |
| idx = WSA_CDC_DMA_TX_1; |
| else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2", |
| sizeof("WSA_CDC_DMA_TX_2"))) |
| idx = WSA_CDC_DMA_TX_2; |
| else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0", |
| sizeof("VA_CDC_DMA_TX_0"))) |
| idx = VA_CDC_DMA_TX_0; |
| else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1", |
| sizeof("VA_CDC_DMA_TX_1"))) |
| idx = VA_CDC_DMA_TX_1; |
| else { |
| pr_err("%s: unsupported port: %s\n", |
| __func__, kcontrol->id.name); |
| return -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__, |
| cdc_dma_rx_cfg[ch_num].channels - 1); |
| ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1; |
| return 0; |
| } |
| |
| static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__, |
| cdc_dma_rx_cfg[ch_num].channels); |
| return 1; |
| } |
| |
| static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (cdc_dma_rx_cfg[ch_num].bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n", |
| __func__, cdc_dma_rx_cfg[ch_num].bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int rc = 0; |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 3: |
| cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| case 2: |
| cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 1: |
| cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n", |
| __func__, cdc_dma_rx_cfg[ch_num].bit_format, |
| ucontrol->value.integer.value[0]); |
| |
| return rc; |
| } |
| |
| static int cdc_dma_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val = 0; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| default: |
| sample_rate_val = 6; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int cdc_dma_get_sample_rate(int value) |
| { |
| int sample_rate = 0; |
| |
| switch (value) { |
| case 0: |
| sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| case 1: |
| sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 2: |
| sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 3: |
| sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 4: |
| sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 5: |
| sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 6: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 7: |
| sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 8: |
| sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 9: |
| sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 10: |
| sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 11: |
| sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 12: |
| sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| default: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| |
| static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| ucontrol->value.enumerated.item[0] = |
| cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate); |
| |
| pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__, |
| cdc_dma_rx_cfg[ch_num].sample_rate); |
| return 0; |
| } |
| |
| static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| if (ch_num < 0) |
| return ch_num; |
| |
| cdc_dma_rx_cfg[ch_num].sample_rate = |
| cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| |
| pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n", |
| __func__, ucontrol->value.enumerated.item[0], |
| cdc_dma_rx_cfg[ch_num].sample_rate); |
| return 0; |
| } |
| |
| static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__, |
| cdc_dma_tx_cfg[ch_num].channels); |
| ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1; |
| return 0; |
| } |
| |
| static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__, |
| cdc_dma_tx_cfg[ch_num].channels); |
| return 1; |
| } |
| |
| static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate_val; |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (cdc_dma_tx_cfg[ch_num].sample_rate) { |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| default: |
| sample_rate_val = 6; |
| break; |
| } |
| |
| ucontrol->value.integer.value[0] = sample_rate_val; |
| pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__, |
| cdc_dma_tx_cfg[ch_num].sample_rate); |
| return 0; |
| } |
| |
| static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 12: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| case 11: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 10: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 9: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 8: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 7: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 6: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 5: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 4: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 2: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 1: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 0: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| default: |
| cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| |
| pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n", |
| __func__, ucontrol->value.integer.value[0], |
| cdc_dma_tx_cfg[ch_num].sample_rate); |
| return 0; |
| } |
| |
| static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (cdc_dma_tx_cfg[ch_num].bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n", |
| __func__, cdc_dma_tx_cfg[ch_num].bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int rc = 0; |
| int ch_num = cdc_dma_get_port_idx(kcontrol); |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 3: |
| cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| case 2: |
| cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 1: |
| cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n", |
| __func__, cdc_dma_tx_cfg[ch_num].bit_format, |
| ucontrol->value.integer.value[0]); |
| |
| return rc; |
| } |
| |
| static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, |
| usb_rx_cfg.channels); |
| ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1; |
| return 0; |
| } |
| |
| static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels); |
| return 1; |
| } |
| |
| static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate_val; |
| |
| switch (usb_rx_cfg.sample_rate) { |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| default: |
| sample_rate_val = 0; |
| break; |
| } |
| |
| ucontrol->value.integer.value[0] = sample_rate_val; |
| pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__, |
| usb_rx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 12: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| case 11: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 10: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 9: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 8: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 7: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 6: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 5: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 4: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 2: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 1: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 0: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| default: |
| usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| |
| pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n", |
| __func__, ucontrol->value.integer.value[0], |
| usb_rx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (usb_rx_cfg.bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n", |
| __func__, usb_rx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int rc = 0; |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 3: |
| usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| case 2: |
| usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 1: |
| usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n", |
| __func__, usb_rx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| |
| return rc; |
| } |
| |
| static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, |
| usb_tx_cfg.channels); |
| ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1; |
| return 0; |
| } |
| |
| static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels); |
| return 1; |
| } |
| |
| static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate_val; |
| |
| switch (usb_tx_cfg.sample_rate) { |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| default: |
| sample_rate_val = 6; |
| break; |
| } |
| |
| ucontrol->value.integer.value[0] = sample_rate_val; |
| pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__, |
| usb_tx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 12: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| case 11: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 10: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 9: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 8: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 7: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 6: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 5: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 4: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 2: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 1: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 0: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| default: |
| usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| |
| pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n", |
| __func__, ucontrol->value.integer.value[0], |
| usb_tx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (usb_tx_cfg.bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n", |
| __func__, usb_tx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int rc = 0; |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 3: |
| usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| case 2: |
| usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 1: |
| usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n", |
| __func__, usb_tx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| |
| return rc; |
| } |
| |
| static int ext_hdmi_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx; |
| |
| if (strnstr(kcontrol->id.name, "HDMI_RX", |
| sizeof("HDMI_RX"))) { |
| idx = HDMI_RX_IDX; |
| } else { |
| pr_err("%s: unsupported BE: %s", |
| __func__, kcontrol->id.name); |
| idx = -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int ext_hdmi_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| switch (ext_hdmi_rx_cfg[idx].bit_format) { |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: ext_hdmi_rx[%d].format = %d, ucontrol value = %ld\n", |
| __func__, idx, ext_hdmi_rx_cfg[idx].bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int ext_hdmi_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 1: |
| ext_hdmi_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| ext_hdmi_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| pr_debug("%s: ext_hdmi_rx[%d].format = %d, ucontrol value = %ld\n", |
| __func__, idx, ext_hdmi_rx_cfg[idx].bit_format, |
| ucontrol->value.integer.value[0]); |
| |
| return 0; |
| } |
| |
| static int ext_hdmi_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.integer.value[0] = |
| ext_hdmi_rx_cfg[idx].channels - 2; |
| |
| pr_debug("%s: ext_hdmi_rx[%d].ch = %d\n", __func__, |
| idx, ext_hdmi_rx_cfg[idx].channels); |
| |
| return 0; |
| } |
| |
| static int ext_hdmi_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ext_hdmi_rx_cfg[idx].channels = |
| ucontrol->value.integer.value[0] + 2; |
| |
| pr_debug("%s: ext_hdmi_rx[%d].ch = %d\n", __func__, |
| idx, ext_hdmi_rx_cfg[idx].channels); |
| return 0; |
| } |
| |
| static int ext_hdmi_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate_val; |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| switch (ext_hdmi_rx_cfg[idx].sample_rate) { |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 6; |
| break; |
| |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 5; |
| break; |
| |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 4; |
| break; |
| |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 3; |
| break; |
| |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 2; |
| break; |
| |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 1; |
| break; |
| |
| case SAMPLING_RATE_48KHZ: |
| default: |
| sample_rate_val = 0; |
| break; |
| } |
| |
| ucontrol->value.integer.value[0] = sample_rate_val; |
| pr_debug("%s: ext_hdmi_rx[%d].sample_rate = %d\n", __func__, |
| idx, ext_hdmi_rx_cfg[idx].sample_rate); |
| |
| return 0; |
| } |
| |
| |
| static int ext_hdmi_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = ext_hdmi_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| switch (ucontrol->value.integer.value[0]) { |
| case 6: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 5: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 4: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 3: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 2: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 1: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 0: |
| default: |
| ext_hdmi_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| |
| pr_debug("%s: control value = %ld, ext_hdmi_rx[%d].sample_rate = %d\n", |
| __func__, ucontrol->value.integer.value[0], idx, |
| ext_hdmi_rx_cfg[idx].sample_rate); |
| return 0; |
| } |
| |
| static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| pr_debug("%s: proxy_rx channels = %d\n", |
| __func__, proxy_rx_cfg.channels); |
| ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2; |
| |
| return 0; |
| } |
| |
| static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2; |
| pr_debug("%s: proxy_rx channels = %d\n", |
| __func__, proxy_rx_cfg.channels); |
| |
| return 1; |
| } |
| |
| static int tdm_get_sample_rate(int value) |
| { |
| int sample_rate = 0; |
| |
| switch (value) { |
| case 0: |
| sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| case 1: |
| sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 2: |
| sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 4: |
| sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 5: |
| sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| default: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| static int aux_pcm_get_sample_rate(int value) |
| { |
| int sample_rate; |
| |
| switch (value) { |
| case 1: |
| sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 0: |
| default: |
| sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| static int tdm_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val = 0; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 5; |
| break; |
| default: |
| sample_rate_val = 3; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int aux_pcm_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| default: |
| sample_rate_val = 0; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int tdm_get_port_idx(struct snd_kcontrol *kcontrol, |
| struct tdm_port *port) |
| { |
| if (port) { |
| if (strnstr(kcontrol->id.name, "PRI", |
| sizeof(kcontrol->id.name))) { |
| port->mode = TDM_PRI; |
| } else if (strnstr(kcontrol->id.name, "SEC", |
| sizeof(kcontrol->id.name))) { |
| port->mode = TDM_SEC; |
| } else if (strnstr(kcontrol->id.name, "TERT", |
| sizeof(kcontrol->id.name))) { |
| port->mode = TDM_TERT; |
| } else if (strnstr(kcontrol->id.name, "QUAT", |
| sizeof(kcontrol->id.name))) { |
| port->mode = TDM_QUAT; |
| } else if (strnstr(kcontrol->id.name, "QUIN", |
| sizeof(kcontrol->id.name))) { |
| port->mode = TDM_QUIN; |
| } else { |
| pr_err("%s: unsupported mode in: %s", |
| __func__, kcontrol->id.name); |
| return -EINVAL; |
| } |
| |
| if (strnstr(kcontrol->id.name, "RX_0", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_0", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_0; |
| } else if (strnstr(kcontrol->id.name, "RX_1", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_1", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_1; |
| } else if (strnstr(kcontrol->id.name, "RX_2", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_2", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_2; |
| } else if (strnstr(kcontrol->id.name, "RX_3", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_3", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_3; |
| } else if (strnstr(kcontrol->id.name, "RX_4", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_4", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_4; |
| } else if (strnstr(kcontrol->id.name, "RX_5", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_5", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_5; |
| } else if (strnstr(kcontrol->id.name, "RX_6", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_6", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_6; |
| } else if (strnstr(kcontrol->id.name, "RX_7", |
| sizeof(kcontrol->id.name)) || |
| strnstr(kcontrol->id.name, "TX_7", |
| sizeof(kcontrol->id.name))) { |
| port->channel = TDM_7; |
| } else { |
| pr_err("%s: unsupported channel in: %s", |
| __func__, kcontrol->id.name); |
| return -EINVAL; |
| } |
| } else |
| return -EINVAL; |
| return 0; |
| } |
| |
| static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val( |
| tdm_rx_cfg[port.mode][port.channel].sample_rate); |
| |
| pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_rx_cfg[port.mode][port.channel].sample_rate = |
| tdm_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val( |
| tdm_tx_cfg[port.mode][port.channel].sample_rate); |
| |
| pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_tx_cfg[port.mode][port.channel].sample_rate = |
| tdm_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_get_format(int value) |
| { |
| int format = 0; |
| |
| switch (value) { |
| case 0: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| case 1: |
| format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 2: |
| format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| default: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| return format; |
| } |
| |
| static int tdm_get_format_val(int format) |
| { |
| int value = 0; |
| |
| switch (format) { |
| case SNDRV_PCM_FORMAT_S16_LE: |
| value = 0; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| value = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S32_LE: |
| value = 2; |
| break; |
| default: |
| value = 0; |
| break; |
| } |
| return value; |
| } |
| |
| static int tdm_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| ucontrol->value.enumerated.item[0] = tdm_get_format_val( |
| tdm_rx_cfg[port.mode][port.channel].bit_format); |
| |
| pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_rx_cfg[port.mode][port.channel].bit_format = |
| tdm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| ucontrol->value.enumerated.item[0] = tdm_get_format_val( |
| tdm_tx_cfg[port.mode][port.channel].bit_format); |
| |
| pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_tx_cfg[port.mode][port.channel].bit_format = |
| tdm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| |
| ucontrol->value.enumerated.item[0] = |
| tdm_rx_cfg[port.mode][port.channel].channels - 1; |
| |
| pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].channels - 1, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_rx_cfg[port.mode][port.channel].channels = |
| ucontrol->value.enumerated.item[0] + 1; |
| |
| pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__, |
| tdm_rx_cfg[port.mode][port.channel].channels, |
| ucontrol->value.enumerated.item[0] + 1); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| ucontrol->value.enumerated.item[0] = |
| tdm_tx_cfg[port.mode][port.channel].channels - 1; |
| |
| pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].channels - 1, |
| ucontrol->value.enumerated.item[0]); |
| } |
| return ret; |
| } |
| |
| static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct tdm_port port; |
| int ret = tdm_get_port_idx(kcontrol, &port); |
| |
| if (ret) { |
| pr_err("%s: unsupported control: %s", |
| __func__, kcontrol->id.name); |
| } else { |
| tdm_tx_cfg[port.mode][port.channel].channels = |
| ucontrol->value.enumerated.item[0] + 1; |
| |
| pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__, |
| tdm_tx_cfg[port.mode][port.channel].channels, |
| ucontrol->value.enumerated.item[0] + 1); |
| } |
| return ret; |
| } |
| |
| static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx; |
| |
| if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM", |
| sizeof("PRIM_AUX_PCM"))) |
| idx = PRIM_AUX_PCM; |
| else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM", |
| sizeof("SEC_AUX_PCM"))) |
| idx = SEC_AUX_PCM; |
| else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM", |
| sizeof("TERT_AUX_PCM"))) |
| idx = TERT_AUX_PCM; |
| else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM", |
| sizeof("QUAT_AUX_PCM"))) |
| idx = QUAT_AUX_PCM; |
| else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM", |
| sizeof("QUIN_AUX_PCM"))) |
| idx = QUIN_AUX_PCM; |
| else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM", |
| sizeof("SENN_AUX_PCM"))) |
| idx = SEN_AUX_PCM; |
| else { |
| pr_err("%s: unsupported port: %s", |
| __func__, kcontrol->id.name); |
| idx = -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| aux_pcm_rx_cfg[idx].sample_rate = |
| aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, aux_pcm_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, aux_pcm_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| aux_pcm_tx_cfg[idx].sample_rate = |
| aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, aux_pcm_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, aux_pcm_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx; |
| |
| if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX", |
| sizeof("PRIM_MI2S_RX"))) |
| idx = PRIM_MI2S; |
| else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX", |
| sizeof("SEC_MI2S_RX"))) |
| idx = SEC_MI2S; |
| else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX", |
| sizeof("TERT_MI2S_RX"))) |
| idx = TERT_MI2S; |
| else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX", |
| sizeof("QUAT_MI2S_RX"))) |
| idx = QUAT_MI2S; |
| else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX", |
| sizeof("QUIN_MI2S_RX"))) |
| idx = QUIN_MI2S; |
| else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX", |
| sizeof("SEN_MI2S_RX"))) |
| idx = SEN_MI2S; |
| else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX", |
| sizeof("PRIM_MI2S_TX"))) |
| idx = PRIM_MI2S; |
| else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX", |
| sizeof("SEC_MI2S_TX"))) |
| idx = SEC_MI2S; |
| else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX", |
| sizeof("TERT_MI2S_TX"))) |
| idx = TERT_MI2S; |
| else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX", |
| sizeof("QUAT_MI2S_TX"))) |
| idx = QUAT_MI2S; |
| else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX", |
| sizeof("QUIN_MI2S_TX"))) |
| idx = QUIN_MI2S; |
| else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX", |
| sizeof("SEN_MI2S_TX"))) |
| idx = SEN_MI2S; |
| else { |
| pr_err("%s: unsupported channel: %s", |
| __func__, kcontrol->id.name); |
| idx = -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int mi2s_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| default: |
| sample_rate_val = 6; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int mi2s_get_sample_rate(int value) |
| { |
| int sample_rate; |
| |
| switch (value) { |
| case 0: |
| sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| case 1: |
| sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 2: |
| sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 3: |
| sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 4: |
| sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 5: |
| sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 6: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 7: |
| sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 8: |
| sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 9: |
| sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 10: |
| sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 11: |
| sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 12: |
| sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| default: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| static int mi2s_auxpcm_get_format(int value) |
| { |
| int format; |
| |
| switch (value) { |
| case 0: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| case 1: |
| format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 2: |
| format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 3: |
| format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| default: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| return format; |
| } |
| |
| static int mi2s_auxpcm_get_format_value(int format) |
| { |
| int value; |
| |
| switch (format) { |
| case SNDRV_PCM_FORMAT_S16_LE: |
| value = 0; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| value = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| value = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S32_LE: |
| value = 3; |
| break; |
| default: |
| value = 0; |
| break; |
| } |
| return value; |
| } |
| |
| static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_rx_cfg[idx].sample_rate = |
| mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_tx_cfg[idx].sample_rate = |
| mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].channels); |
| ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1; |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].channels); |
| |
| return 1; |
| } |
| |
| static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].channels); |
| ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1; |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].channels); |
| |
| return 1; |
| } |
| |
| static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| |
| struct msm_asoc_mach_data *pdata = NULL; |
| struct snd_soc_component *component = NULL; |
| struct snd_soc_card *card = NULL; |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| component = snd_soc_kcontrol_component(kcontrol); |
| card = kcontrol->private_data; |
| pdata = snd_soc_card_get_drvdata(card); |
| |
| if (idx < 0) |
| return idx; |
| |
| /* check for PRIM_MI2S and CSRAx config to allow 24bit BE config only */ |
| if ((idx == PRIM_MI2S) && (pdata->codec_is_csra == true) |
| && mi2s_rx_cfg[idx].data_format != AFE_DSD_DATA) |
| { |
| mi2s_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| pr_debug("%s: Keeping default format idx[%d]_rx_format = %d, item = %d\n", |
| __func__, idx, mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } else { |
| mi2s_rx_cfg[idx].bit_format = |
| mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_tx_cfg[idx].bit_format = |
| mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_tx_data_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_tx_cfg[idx].data_format = ucontrol->value.enumerated.item[0]; |
| |
| pr_debug("%s: idx[%d]_data_format = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].data_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_rx_data_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| mi2s_rx_cfg[idx].data_format = ucontrol->value.enumerated.item[0]; |
| |
| pr_debug("%s: idx[%d]_data_format = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].data_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_tx_data_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].data_format; |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, mi2s_tx_cfg[idx].data_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_mi2s_rx_data_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].data_format; |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, mi2s_rx_cfg[idx].data_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_meta_mi2s_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx = 0; |
| |
| if (strnstr(kcontrol->id.name, "PRIM_META_MI2S_RX", |
| sizeof("PRIM_META_MI2S_RX"))) { |
| idx = PRIM_META_MI2S; |
| } else if (strnstr(kcontrol->id.name, "SEC_META_MI2S_RX", |
| sizeof("SEC_META_MI2S_RX"))) { |
| idx = SEC_META_MI2S; |
| } else { |
| pr_err("%s: unsupported port: %s", |
| __func__, kcontrol->id.name); |
| idx = -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int msm_meta_mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_get_sample_rate_val(meta_mi2s_rx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_meta_mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| meta_mi2s_rx_cfg[idx].sample_rate = |
| mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_meta_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = meta_mi2s_rx_cfg[idx].channels - 1; |
| |
| pr_debug("%s: meta_mi2s_[%d]_rx_ch = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].channels); |
| |
| return 0; |
| } |
| |
| static int msm_meta_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| meta_mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; |
| |
| pr_debug("%s: meta_mi2s_[%d]_rx_ch = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].channels); |
| |
| return 1; |
| } |
| |
| static int msm_meta_mi2s_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_auxpcm_get_format_value(meta_mi2s_rx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_meta_mi2s_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| struct msm_asoc_mach_data *pdata = NULL; |
| struct snd_soc_card *card = NULL; |
| int idx = msm_meta_mi2s_get_port_idx(kcontrol); |
| |
| card = kcontrol->private_data; |
| pdata = snd_soc_card_get_drvdata(card); |
| |
| if (idx < 0) |
| return idx; |
| |
| /* check for PRIM_META_MI2S and CSRAx to allow 24bit BE config only */ |
| if ((idx == PRIM_META_MI2S) && pdata->codec_is_csra) { |
| meta_mi2s_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| pr_debug("%s: Keeping default format idx[%d]_rx_format = %d, item = %d\n", |
| __func__, idx, meta_mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } else { |
| meta_mi2s_rx_cfg[idx].bit_format = |
| mi2s_auxpcm_get_format( |
| ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, meta_mi2s_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| } |
| |
| return 0; |
| } |
| |
| static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, aux_pcm_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| aux_pcm_rx_cfg[idx].bit_format = |
| mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, aux_pcm_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, aux_pcm_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = aux_pcm_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| aux_pcm_tx_cfg[idx].bit_format = |
| mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, aux_pcm_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int spdif_get_port_idx(struct snd_kcontrol *kcontrol) |
| { |
| int idx; |
| |
| if (strnstr(kcontrol->id.name, "PRIM_SPDIF_RX", |
| sizeof("PRIM_SPDIF_RX"))) |
| idx = PRIM_SPDIF_RX; |
| else if (strnstr(kcontrol->id.name, "SEC_SPDIF_RX", |
| sizeof("SEC_SPDIF_RX"))) |
| idx = SEC_SPDIF_RX; |
| else if (strnstr(kcontrol->id.name, "PRIM_SPDIF_TX", |
| sizeof("PRIM_SPDIF_TX"))) |
| idx = PRIM_SPDIF_TX; |
| else if (strnstr(kcontrol->id.name, "SEC_SPDIF_TX", |
| sizeof("SEC_SPDIF_TX"))) |
| idx = SEC_SPDIF_TX; |
| else { |
| pr_err("%s: unsupported channel: %s", |
| __func__, kcontrol->id.name); |
| idx = -EINVAL; |
| } |
| |
| return idx; |
| } |
| |
| static int spdif_get_sample_rate_val(int sample_rate) |
| { |
| int sample_rate_val; |
| |
| switch (sample_rate) { |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 0; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 6; |
| break; |
| default: |
| sample_rate_val = 2; |
| break; |
| } |
| return sample_rate_val; |
| } |
| |
| static int spdif_get_sample_rate(int value) |
| { |
| int sample_rate; |
| |
| switch (value) { |
| case 0: |
| sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 1: |
| sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 2: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 3: |
| sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 4: |
| sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 5: |
| sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 6: |
| sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| default: |
| sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| return sample_rate; |
| } |
| |
| static int spdif_get_format(int value) |
| { |
| int format; |
| |
| switch (value) { |
| case 0: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| case 1: |
| format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| default: |
| format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| return format; |
| } |
| |
| static int spdif_get_format_value(int format) |
| { |
| int value; |
| |
| switch (format) { |
| case SNDRV_PCM_FORMAT_S16_LE: |
| value = 0; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| value = 1; |
| break; |
| default: |
| value = 0; |
| break; |
| } |
| return value; |
| } |
| |
| static int msm_spdif_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_rx_cfg[idx].sample_rate = |
| spdif_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| spdif_get_sample_rate_val(spdif_rx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_tx_cfg[idx].sample_rate = |
| spdif_get_sample_rate(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| spdif_get_sample_rate_val(spdif_tx_cfg[idx].sample_rate); |
| |
| pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].sample_rate, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_rx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| pr_debug("%s: msm_spdif_[%d]_rx_ch = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].channels); |
| ucontrol->value.enumerated.item[0] = spdif_rx_cfg[idx].channels - 1; |
| |
| return 0; |
| } |
| |
| static int msm_spdif_rx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_spdif_[%d]_rx_ch = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].channels); |
| |
| return 1; |
| } |
| |
| static int msm_spdif_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| pr_debug("%s: msm_spdif_[%d]_tx_ch = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].channels); |
| ucontrol->value.enumerated.item[0] = spdif_tx_cfg[idx].channels - 1; |
| |
| return 0; |
| } |
| |
| static int msm_spdif_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; |
| pr_debug("%s: msm_spdif_[%d]_tx_ch = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].channels); |
| |
| return 1; |
| } |
| |
| static int msm_spdif_rx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| spdif_get_format_value(spdif_rx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_rx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_rx_cfg[idx].bit_format = |
| spdif_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__, |
| idx, spdif_rx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| ucontrol->value.enumerated.item[0] = |
| spdif_get_format_value(spdif_tx_cfg[idx].bit_format); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int msm_spdif_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int idx = spdif_get_port_idx(kcontrol); |
| |
| if (idx < 0) |
| return idx; |
| |
| spdif_tx_cfg[idx].bit_format = |
| spdif_get_format(ucontrol->value.enumerated.item[0]); |
| |
| pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__, |
| idx, spdif_tx_cfg[idx].bit_format, |
| ucontrol->value.enumerated.item[0]); |
| |
| return 0; |
| } |
| |
| static int afe_lb_tx_ch_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| pr_debug("%s: afe_lb_tx_ch = %d\n", __func__, |
| afe_lb_tx_cfg.channels); |
| ucontrol->value.integer.value[0] = afe_lb_tx_cfg.channels - 1; |
| return 0; |
| } |
| |
| static int afe_lb_tx_ch_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| afe_lb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1; |
| |
| pr_debug("%s: afe_lb_tx_ch = %d\n", __func__, afe_lb_tx_cfg.channels); |
| return 0; |
| } |
| |
| static int afe_lb_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int sample_rate_val; |
| |
| switch (afe_lb_tx_cfg.sample_rate) { |
| case SAMPLING_RATE_384KHZ: |
| sample_rate_val = 12; |
| break; |
| case SAMPLING_RATE_352P8KHZ: |
| sample_rate_val = 11; |
| break; |
| case SAMPLING_RATE_192KHZ: |
| sample_rate_val = 10; |
| break; |
| case SAMPLING_RATE_176P4KHZ: |
| sample_rate_val = 9; |
| break; |
| case SAMPLING_RATE_96KHZ: |
| sample_rate_val = 8; |
| break; |
| case SAMPLING_RATE_88P2KHZ: |
| sample_rate_val = 7; |
| break; |
| case SAMPLING_RATE_48KHZ: |
| sample_rate_val = 6; |
| break; |
| case SAMPLING_RATE_44P1KHZ: |
| sample_rate_val = 5; |
| break; |
| case SAMPLING_RATE_32KHZ: |
| sample_rate_val = 4; |
| break; |
| case SAMPLING_RATE_22P05KHZ: |
| sample_rate_val = 3; |
| break; |
| case SAMPLING_RATE_16KHZ: |
| sample_rate_val = 2; |
| break; |
| case SAMPLING_RATE_11P025KHZ: |
| sample_rate_val = 1; |
| break; |
| case SAMPLING_RATE_8KHZ: |
| sample_rate_val = 0; |
| break; |
| default: |
| sample_rate_val = 6; |
| break; |
| } |
| |
| ucontrol->value.integer.value[0] = sample_rate_val; |
| pr_debug("%s: afe_lb_tx_sample_rate = %d\n", __func__, |
| afe_lb_tx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int afe_lb_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 12: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ; |
| break; |
| case 11: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ; |
| break; |
| case 10: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ; |
| break; |
| case 9: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ; |
| break; |
| case 8: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ; |
| break; |
| case 7: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ; |
| break; |
| case 6: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| case 5: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ; |
| break; |
| case 4: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ; |
| break; |
| case 3: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ; |
| break; |
| case 2: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ; |
| break; |
| case 1: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ; |
| break; |
| case 0: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ; |
| break; |
| default: |
| afe_lb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| |
| pr_debug("%s: control value = %ld, afe_lb_tx_sample_rate = %d\n", |
| __func__, ucontrol->value.integer.value[0], |
| afe_lb_tx_cfg.sample_rate); |
| return 0; |
| } |
| |
| static int afe_lb_tx_format_get(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (afe_lb_tx_cfg.bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| ucontrol->value.integer.value[0] = 3; |
| break; |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| ucontrol->value.integer.value[0] = 2; |
| break; |
| case SNDRV_PCM_FORMAT_S24_LE: |
| ucontrol->value.integer.value[0] = 1; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| ucontrol->value.integer.value[0] = 0; |
| break; |
| } |
| |
| pr_debug("%s: afe_lb_tx_format = %d, ucontrol value = %ld\n", |
| __func__, afe_lb_tx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static int afe_lb_tx_format_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| switch (ucontrol->value.integer.value[0]) { |
| case 3: |
| afe_lb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| break; |
| case 2: |
| afe_lb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| break; |
| case 1: |
| afe_lb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| break; |
| case 0: |
| default: |
| afe_lb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| break; |
| } |
| |
| pr_debug("%s: afe_lb_tx_format = %d, ucontrol value = %ld\n", |
| __func__, afe_lb_tx_cfg.bit_format, |
| ucontrol->value.integer.value[0]); |
| return 0; |
| } |
| |
| static const struct snd_kcontrol_new msm_snd_sb_controls[] = { |
| SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs, |
| slim_rx_ch_get, slim_rx_ch_put), |
| SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs, |
| slim_rx_ch_get, slim_rx_ch_put), |
| SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs, |
| slim_tx_ch_get, slim_tx_ch_put), |
| SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs, |
| slim_tx_ch_get, slim_tx_ch_put), |
| SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs, |
| slim_rx_ch_get, slim_rx_ch_put), |
| SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs, |
| slim_rx_ch_get, slim_rx_ch_put), |
| SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format, |
| slim_rx_bit_format_get, slim_rx_bit_format_put), |
| SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format, |
| slim_rx_bit_format_get, slim_rx_bit_format_put), |
| SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format, |
| slim_rx_bit_format_get, slim_rx_bit_format_put), |
| SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format, |
| slim_tx_bit_format_get, slim_tx_bit_format_put), |
| SOC_ENUM_EXT("HDMI_RX Bit Format", ext_hdmi_rx_format, |
| ext_hdmi_rx_format_get, ext_hdmi_rx_format_put), |
| SOC_ENUM_EXT("HDMI_RX SampleRate", ext_hdmi_rx_sample_rate, |
| ext_hdmi_rx_sample_rate_get, |
| ext_hdmi_rx_sample_rate_put), |
| SOC_ENUM_EXT("HDMI_RX Channels", ext_hdmi_rx_chs, |
| ext_hdmi_rx_ch_get, |
| ext_hdmi_rx_ch_put), |
| SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate, |
| slim_rx_sample_rate_get, slim_rx_sample_rate_put), |
| SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate, |
| slim_rx_sample_rate_get, slim_rx_sample_rate_put), |
| SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate, |
| slim_tx_sample_rate_get, slim_tx_sample_rate_put), |
| SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate, |
| slim_rx_sample_rate_get, slim_rx_sample_rate_put), |
| SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate, |
| slim_rx_sample_rate_get, slim_rx_sample_rate_put), |
| }; |
| |
| static const struct snd_kcontrol_new msm_snd_va_controls[] = { |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs, |
| cdc_dma_tx_ch_get, cdc_dma_tx_ch_put), |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs, |
| cdc_dma_tx_ch_get, cdc_dma_tx_ch_put), |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format, |
| cdc_dma_tx_format_get, cdc_dma_tx_format_put), |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format, |
| cdc_dma_tx_format_get, cdc_dma_tx_format_put), |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate", |
| va_cdc_dma_tx_0_sample_rate, |
| cdc_dma_tx_sample_rate_get, |
| cdc_dma_tx_sample_rate_put), |
| SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate", |
| va_cdc_dma_tx_1_sample_rate, |
| cdc_dma_tx_sample_rate_get, |
| cdc_dma_tx_sample_rate_put), |
| }; |
| |
| static const struct snd_kcontrol_new msm_snd_wsa_controls[] = { |
| SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs, |
| msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs, |
| cdc_dma_rx_ch_get, cdc_dma_rx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs, |
| cdc_dma_rx_ch_get, cdc_dma_rx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs, |
| cdc_dma_tx_ch_get, cdc_dma_tx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs, |
| cdc_dma_tx_ch_get, cdc_dma_tx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs, |
| cdc_dma_tx_ch_get, cdc_dma_tx_ch_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format, |
| cdc_dma_rx_format_get, cdc_dma_rx_format_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format, |
| cdc_dma_rx_format_get, cdc_dma_rx_format_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format, |
| cdc_dma_tx_format_get, cdc_dma_tx_format_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format, |
| cdc_dma_tx_format_get, cdc_dma_tx_format_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate", |
| wsa_cdc_dma_rx_0_sample_rate, |
| cdc_dma_rx_sample_rate_get, |
| cdc_dma_rx_sample_rate_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate", |
| wsa_cdc_dma_rx_1_sample_rate, |
| cdc_dma_rx_sample_rate_get, |
| cdc_dma_rx_sample_rate_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate", |
| wsa_cdc_dma_tx_0_sample_rate, |
| cdc_dma_tx_sample_rate_get, |
| cdc_dma_tx_sample_rate_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate", |
| wsa_cdc_dma_tx_1_sample_rate, |
| cdc_dma_tx_sample_rate_get, |
| cdc_dma_tx_sample_rate_put), |
| SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate", |
| wsa_cdc_dma_tx_2_sample_rate, |
| cdc_dma_tx_sample_rate_get, |
| cdc_dma_tx_sample_rate_put), |
| }; |
| |
| static const struct snd_kcontrol_new msm_snd_controls[] = { |
| SOC_ENUM_EXT("BT_TX SampleRate", bt_sample_rate_sink, |
| msm_bt_sample_rate_sink_get, |
| msm_bt_sample_rate_sink_put), |
| SOC_ENUM_EXT("BT SampleRate", bt_sample_rate, |
| msm_bt_sample_rate_get, |
| msm_bt_sample_rate_put), |
| SOC_ENUM_EXT("BT_RX SampleRate", bt_sample_rate, |
| msm_bt_sample_rate_get, |
| msm_bt_sample_rate_put), |
| SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs, |
| proxy_rx_ch_get, proxy_rx_ch_put), |
| SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs, |
| usb_audio_rx_ch_get, usb_audio_rx_ch_put), |
| SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs, |
| usb_audio_tx_ch_get, usb_audio_tx_ch_put), |
| SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format, |
| usb_audio_rx_format_get, usb_audio_rx_format_put), |
| SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format, |
| usb_audio_tx_format_get, usb_audio_tx_format_put), |
| SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate, |
| usb_audio_rx_sample_rate_get, |
| usb_audio_rx_sample_rate_put), |
| SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate, |
| usb_audio_tx_sample_rate_get, |
| usb_audio_tx_sample_rate_put), |
| SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate, |
| tdm_rx_sample_rate_get, |
| tdm_rx_sample_rate_put), |
| SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate, |
| tdm_tx_sample_rate_get, |
| tdm_tx_sample_rate_put), |
| SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format, |
| tdm_rx_format_get, |
| tdm_rx_format_put), |
| SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format, |
| tdm_tx_format_get, |
| tdm_tx_format_put), |
| SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs, |
| tdm_rx_ch_get, |
| tdm_rx_ch_put), |
| SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs, |
| tdm_tx_ch_get, |
| tdm_tx_ch_put), |
| SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate, |
| tdm_rx_sample_rate_get, |
| tdm_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate, |
| tdm_tx_sample_rate_get, |
| tdm_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format, |
| tdm_rx_format_get, |
| tdm_rx_format_put), |
| SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format, |
| tdm_tx_format_get, |
| tdm_tx_format_put), |
| SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs, |
| tdm_rx_ch_get, |
| tdm_rx_ch_put), |
| SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs, |
| tdm_tx_ch_get, |
| tdm_tx_ch_put), |
| SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate, |
| tdm_rx_sample_rate_get, |
| tdm_rx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate, |
| tdm_tx_sample_rate_get, |
| tdm_tx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format, |
| tdm_rx_format_get, |
| tdm_rx_format_put), |
| SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format, |
| tdm_tx_format_get, |
| tdm_tx_format_put), |
| SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs, |
| tdm_rx_ch_get, |
| tdm_rx_ch_put), |
| SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs, |
| tdm_tx_ch_get, |
| tdm_tx_ch_put), |
| SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate, |
| tdm_rx_sample_rate_get, |
| tdm_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate, |
| tdm_tx_sample_rate_get, |
| tdm_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format, |
| tdm_rx_format_get, |
| tdm_rx_format_put), |
| SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format, |
| tdm_tx_format_get, |
| tdm_tx_format_put), |
| SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs, |
| tdm_rx_ch_get, |
| tdm_rx_ch_put), |
| SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs, |
| tdm_tx_ch_get, |
| tdm_tx_ch_put), |
| SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate, |
| tdm_rx_sample_rate_get, |
| tdm_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate, |
| tdm_tx_sample_rate_get, |
| tdm_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format, |
| tdm_rx_format_get, |
| tdm_rx_format_put), |
| SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format, |
| tdm_tx_format_get, |
| tdm_tx_format_put), |
| SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs, |
| tdm_rx_ch_get, |
| tdm_rx_ch_put), |
| SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs, |
| tdm_tx_ch_get, |
| tdm_tx_ch_put), |
| SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate, |
| aux_pcm_rx_sample_rate_get, |
| aux_pcm_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate, |
| aux_pcm_rx_sample_rate_get, |
| aux_pcm_rx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate, |
| aux_pcm_rx_sample_rate_get, |
| aux_pcm_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate, |
| aux_pcm_rx_sample_rate_get, |
| aux_pcm_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate, |
| aux_pcm_rx_sample_rate_get, |
| aux_pcm_rx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate, |
| aux_pcm_tx_sample_rate_get, |
| aux_pcm_tx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate, |
| mi2s_rx_sample_rate_get, |
| mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate, |
| mi2s_tx_sample_rate_get, |
| mi2s_tx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs, |
| msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs, |
| msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), |
| SOC_ENUM_EXT("PRIM_MI2S_TX DataFormat", mi2s_tx_data_format, |
| msm_mi2s_tx_data_format_get, |
| msm_mi2s_tx_data_format_put), |
| SOC_ENUM_EXT("QUAT_MI2S_TX DataFormat", mi2s_tx_data_format, |
| msm_mi2s_tx_data_format_get, |
| msm_mi2s_tx_data_format_put), |
| SOC_ENUM_EXT("PRIM_MI2S_RX DataFormat", mi2s_rx_data_format, |
| msm_mi2s_rx_data_format_get, |
| msm_mi2s_rx_data_format_put), |
| SOC_ENUM_EXT("QUAT_MI2S_RX DataFormat", mi2s_rx_data_format, |
| msm_mi2s_rx_data_format_get, |
| msm_mi2s_rx_data_format_put), |
| SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format, |
| msm_mi2s_rx_format_get, msm_mi2s_rx_format_put), |
| SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format, |
| msm_mi2s_tx_format_get, msm_mi2s_tx_format_put), |
| SOC_ENUM_EXT("PRIM_META_MI2S_RX SampleRate", |
| prim_meta_mi2s_rx_sample_rate, |
| msm_meta_mi2s_rx_sample_rate_get, |
| msm_meta_mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_META_MI2S_RX SampleRate", |
| sec_meta_mi2s_rx_sample_rate, |
| msm_meta_mi2s_rx_sample_rate_get, |
| msm_meta_mi2s_rx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_META_MI2S_RX Channels", prim_meta_mi2s_rx_chs, |
| msm_meta_mi2s_rx_ch_get, |
| msm_meta_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("SEC_META_MI2S_RX Channels", sec_meta_mi2s_rx_chs, |
| msm_meta_mi2s_rx_ch_get, |
| msm_meta_mi2s_rx_ch_put), |
| SOC_ENUM_EXT("PRIM_META_MI2S_RX Format", mi2s_rx_format, |
| msm_meta_mi2s_rx_format_get, |
| msm_meta_mi2s_rx_format_put), |
| SOC_ENUM_EXT("SEC_META_MI2S_RX Format", mi2s_rx_format, |
| msm_meta_mi2s_rx_format_get, |
| msm_meta_mi2s_rx_format_put), |
| SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format, |
| msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put), |
| SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format, |
| msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put), |
| SOC_SINGLE_MULTI_EXT("VAD CFG", SND_SOC_NOPM, 0, 1000, 0, 3, NULL, |
| msm_snd_vad_cfg_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_RX SampleRate", spdif_rx_sample_rate, |
| msm_spdif_rx_sample_rate_get, |
| msm_spdif_rx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_TX SampleRate", spdif_tx_sample_rate, |
| msm_spdif_tx_sample_rate_get, |
| msm_spdif_tx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_SPDIF_RX SampleRate", spdif_rx_sample_rate, |
| msm_spdif_rx_sample_rate_get, |
| msm_spdif_rx_sample_rate_put), |
| SOC_ENUM_EXT("SEC_SPDIF_TX SampleRate", spdif_tx_sample_rate, |
| msm_spdif_tx_sample_rate_get, |
| msm_spdif_tx_sample_rate_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_RX Channels", spdif_rx_chs, |
| msm_spdif_rx_ch_get, msm_spdif_rx_ch_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_TX Channels", spdif_tx_chs, |
| msm_spdif_tx_ch_get, msm_spdif_tx_ch_put), |
| SOC_ENUM_EXT("SEC_SPDIF_RX Channels", spdif_rx_chs, |
| msm_spdif_rx_ch_get, msm_spdif_rx_ch_put), |
| SOC_ENUM_EXT("SEC_SPDIF_TX Channels", spdif_tx_chs, |
| msm_spdif_tx_ch_get, msm_spdif_tx_ch_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_RX Format", spdif_rx_format, |
| msm_spdif_rx_format_get, msm_spdif_rx_format_put), |
| SOC_ENUM_EXT("PRIM_SPDIF_TX Format", spdif_tx_format, |
| msm_spdif_tx_format_get, msm_spdif_tx_format_put), |
| SOC_ENUM_EXT("SEC_SPDIF_RX Format", spdif_rx_format, |
| msm_spdif_rx_format_get, msm_spdif_rx_format_put), |
| SOC_ENUM_EXT("SEC_SPDIF_TX Format", spdif_tx_format, |
| msm_spdif_tx_format_get, msm_spdif_tx_format_put), |
| SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_lb_tx_chs, |
| afe_lb_tx_ch_get, afe_lb_tx_ch_put), |
| SOC_ENUM_EXT("AFE_LOOPBACK_TX Format", afe_lb_tx_format, |
| afe_lb_tx_format_get, afe_lb_tx_format_put), |
| SOC_ENUM_EXT("AFE_LOOPBACK_TX SampleRate", afe_lb_tx_sample_rate, |
| afe_lb_tx_sample_rate_get, |
| afe_lb_tx_sample_rate_put), |
| }; |
| |
| static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component, |
| int enable, bool dapm) |
| { |
| int ret = 0; |
| |
| if (!strcmp(component.name, "tasha_codec")) { |
| ret = tasha_cdc_mclk_enable(component, enable, dapm); |
| } else { |
| dev_err(component->dev, "%s: unknown codec to enable ext clk\n", |
| __func__); |
| ret = -EINVAL; |
| } |
| return ret; |
| } |
| |
| static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component, |
| int enable, bool dapm) |
| { |
| int ret = 0; |
| |
| if (!strcmp(component.name, "tasha_codec")) { |
| ret = tasha_cdc_mclk_tx_enable(component, enable, dapm); |
| } else { |
| dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n", |
| __func__); |
| ret = -EINVAL; |
| } |
| |
| return ret; |
| } |
| |
| static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w, |
| struct snd_kcontrol *kcontrol, int event) |
| { |
| struct snd_soc_component *component = |
| snd_soc_dapm_to_component(w->dapm); |
| |
| pr_debug("%s: event = %d\n", __func__, event); |
| |
| switch (event) { |
| case SND_SOC_DAPM_PRE_PMU: |
| return msm_snd_enable_codec_ext_tx_clk(component, 1, true); |
| case SND_SOC_DAPM_POST_PMD: |
| return msm_snd_enable_codec_ext_tx_clk(component, 0, true); |
| } |
| return 0; |
| } |
| |
| static int msm_mclk_event(struct snd_soc_dapm_widget *w, |
| struct snd_kcontrol *kcontrol, int event) |
| { |
| struct snd_soc_component *component = |
| snd_soc_dapm_to_component(w->dapm); |
| |
| pr_debug("%s: event = %d\n", __func__, event); |
| |
| switch (event) { |
| case SND_SOC_DAPM_PRE_PMU: |
| return msm_snd_enable_codec_ext_clk(component, 1, true); |
| case SND_SOC_DAPM_POST_PMD: |
| return msm_snd_enable_codec_ext_clk(component, 0, true); |
| } |
| return 0; |
| } |
| |
| static int msm_lineout_booster_ctrl_event(struct snd_soc_dapm_widget *w, |
| struct snd_kcontrol *k, int event) |
| { |
| struct snd_soc_component *component = |
| snd_soc_dapm_to_component(w->dapm); |
| struct snd_soc_card *card = component->card; |
| struct msm_asoc_mach_data *pdata = |
| snd_soc_card_get_drvdata(card); |
| |
| pr_debug("%s: event = %d\n", __func__, event); |
| switch (event) { |
| case SND_SOC_DAPM_POST_PMU: |
| msm_cdc_pinctrl_select_active_state( |
| pdata->lineout_booster_gpio_p); |
| break; |
| case SND_SOC_DAPM_PRE_PMD: |
| msm_cdc_pinctrl_select_sleep_state( |
| pdata->lineout_booster_gpio_p); |
| break; |
| } |
| |
| return 0; |
| } |
| |
| static const struct snd_soc_dapm_widget msm_dapm_widgets[] = { |
| |
| SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0, |
| msm_mclk_event, |
| SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| |
| SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0, |
| msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| |
| SND_SOC_DAPM_SPK("lineout booster", msm_lineout_booster_ctrl_event), |
| SND_SOC_DAPM_MIC("Analog Mic3", NULL), |
| SND_SOC_DAPM_MIC("Analog Mic4", NULL), |
| |
| }; |
| |
| static int msm_dmic_event(struct snd_soc_dapm_widget *w, |
| struct snd_kcontrol *kcontrol, int event) |
| { |
| struct msm_asoc_mach_data *pdata = NULL; |
| struct snd_soc_component *component = |
| snd_soc_dapm_to_component(w->dapm); |
| int ret = 0; |
| uint32_t dmic_idx; |
| int *dmic_gpio_cnt; |
| struct device_node *dmic_gpio; |
| char *wname; |
| |
| wname = strpbrk(w->name, "01234567"); |
| if (!wname) { |
| dev_err(component->dev, "%s: widget not found\n", __func__); |
| return -EINVAL; |
| } |
| |
| ret = kstrtouint(wname, 10, &dmic_idx); |
| if (ret < 0) { |
| dev_err(component->dev, "%s: Invalid DMIC line on the codec\n", |
| __func__); |
| return -EINVAL; |
| } |
| |
| pdata = snd_soc_card_get_drvdata(component->card); |
| |
| switch (dmic_idx) { |
| case 0: |
| case 1: |
| dmic_gpio_cnt = &pdata->dmic_01_gpio_cnt; |
| dmic_gpio = pdata->dmic_01_gpio_p; |
| break; |
| case 2: |
| case 3: |
| dmic_gpio_cnt = &pdata->dmic_23_gpio_cnt; |
| dmic_gpio = pdata->dmic_23_gpio_p; |
| break; |
| case 4: |
| case 5: |
| dmic_gpio_cnt = &pdata->dmic_45_gpio_cnt; |
| dmic_gpio = pdata->dmic_45_gpio_p; |
| break; |
| case 6: |
| case 7: |
| dmic_gpio_cnt = &pdata->dmic_67_gpio_cnt; |
| dmic_gpio = pdata->dmic_67_gpio_p; |
| break; |
| default: |
| dev_err(component->dev, "%s: Invalid DMIC Selection\n", |
| __func__); |
| return -EINVAL; |
| } |
| |
| dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n", |
| __func__, event, dmic_idx, *dmic_gpio_cnt); |
| |
| switch (event) { |
| case SND_SOC_DAPM_PRE_PMU: |
| (*dmic_gpio_cnt)++; |
| if (*dmic_gpio_cnt == 1) { |
| ret = msm_cdc_pinctrl_select_active_state( |
| dmic_gpio); |
| if (ret < 0) { |
| dev_err(component->dev, "%s: gpio set cannot be activated %sd\n", |
| __func__, "dmic_gpio"); |
| return ret; |
| } |
| } |
| break; |
| case SND_SOC_DAPM_POST_PMD: |
| (*dmic_gpio_cnt)--; |
| if (*dmic_gpio_cnt == 0) { |
| ret = msm_cdc_pinctrl_select_sleep_state( |
| dmic_gpio); |
| if (ret < 0) { |
| dev_err(component->dev, "%s: gpio set cannot be de-activated %sd\n", |
| __func__, "dmic_gpio"); |
| return ret; |
| } |
| } |
| break; |
| default: |
| dev_err(component->dev, "%s: invalid DAPM event %d\n", |
| __func__, event); |
| return -EINVAL; |
| } |
| return 0; |
| } |
| |
| |
| static const struct snd_soc_dapm_widget msm_va_dapm_widgets[] = { |
| |
| SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic6", msm_dmic_event), |
| SND_SOC_DAPM_MIC("Digital Mic7", msm_dmic_event), |
| }; |
| |
| static const struct snd_soc_dapm_widget msm_wsa_dapm_widgets[] = { |
| |
| }; |
| |
| static inline int param_is_mask(int p) |
| { |
| return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) && |
| (p <= SNDRV_PCM_HW_PARAM_LAST_MASK); |
| } |
| |
| static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p, |
| int n) |
| { |
| return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]); |
| } |
| |
| static void param_set_mask(struct snd_pcm_hw_params *p, int n, |
| unsigned int bit) |
| { |
| if (bit >= SNDRV_MASK_MAX) |
| return; |
| if (param_is_mask(n)) { |
| struct snd_mask *m = param_to_mask(p, n); |
| |
| m->bits[0] = 0; |
| m->bits[1] = 0; |
| m->bits[bit >> 5] |= (1 << (bit & 31)); |
| } |
| } |
| |
| static int msm_slim_get_ch_from_beid(int32_t be_id) |
| { |
| int ch_id = 0; |
| |
| switch (be_id) { |
| case MSM_BACKEND_DAI_SLIMBUS_0_RX: |
| ch_id = SLIM_RX_0; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_1_RX: |
| ch_id = SLIM_RX_1; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_2_RX: |
| ch_id = SLIM_RX_2; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_3_RX: |
| ch_id = SLIM_RX_3; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_4_RX: |
| ch_id = SLIM_RX_4; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_6_RX: |
| ch_id = SLIM_RX_6; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_0_TX: |
| ch_id = SLIM_TX_0; |
| break; |
| case MSM_BACKEND_DAI_SLIMBUS_3_TX: |
| ch_id = SLIM_TX_3; |
| break; |
| default: |
| ch_id = SLIM_RX_0; |
| break; |
| } |
| |
| return ch_id; |
| } |
| |
| static int msm_ext_hdmi_get_idx_from_beid(int32_t be_id) |
| { |
| int idx; |
| |
| switch (be_id) { |
| case MSM_BACKEND_DAI_HDMI_RX_MS: |
| idx = HDMI_RX_IDX; |
| break; |
| default: |
| pr_err("%s: Incorrect ext_hdmi BE id %d\n", __func__, be_id); |
| idx = -EINVAL; |
| break; |
| } |
| |
| return idx; |
| } |
| |
| static int msm_cdc_dma_get_idx_from_beid(int32_t be_id) |
| { |
| int idx = 0; |
| |
| switch (be_id) { |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0: |
| idx = WSA_CDC_DMA_RX_0; |
| break; |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0: |
| idx = WSA_CDC_DMA_TX_0; |
| break; |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1: |
| idx = WSA_CDC_DMA_RX_1; |
| break; |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1: |
| idx = WSA_CDC_DMA_TX_1; |
| break; |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2: |
| idx = WSA_CDC_DMA_TX_2; |
| break; |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0: |
| idx = VA_CDC_DMA_TX_0; |
| break; |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1: |
| idx = VA_CDC_DMA_TX_1; |
| break; |
| default: |
| idx = VA_CDC_DMA_TX_0; |
| break; |
| } |
| |
| return idx; |
| } |
| |
| static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| struct snd_interval *rate = hw_param_interval(params, |
| SNDRV_PCM_HW_PARAM_RATE); |
| struct snd_interval *channels = hw_param_interval(params, |
| SNDRV_PCM_HW_PARAM_CHANNELS); |
| int rc = 0; |
| int idx; |
| void *config = NULL; |
| struct snd_soc_component *component = NULL; |
| |
| pr_debug("%s: format = %d, rate = %d\n", |
| __func__, params_format(params), params_rate(params)); |
| |
| switch (dai_link->id) { |
| case MSM_BACKEND_DAI_SLIMBUS_0_RX: |
| case MSM_BACKEND_DAI_SLIMBUS_1_RX: |
| case MSM_BACKEND_DAI_SLIMBUS_2_RX: |
| case MSM_BACKEND_DAI_SLIMBUS_3_RX: |
| case MSM_BACKEND_DAI_SLIMBUS_4_RX: |
| case MSM_BACKEND_DAI_SLIMBUS_6_RX: |
| idx = msm_slim_get_ch_from_beid(dai_link->id); |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_rx_cfg[idx].bit_format); |
| rate->min = rate->max = slim_rx_cfg[idx].sample_rate; |
| channels->min = channels->max = slim_rx_cfg[idx].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_0_TX: |
| case MSM_BACKEND_DAI_SLIMBUS_3_TX: |
| idx = msm_slim_get_ch_from_beid(dai_link->id); |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_tx_cfg[idx].bit_format); |
| rate->min = rate->max = slim_tx_cfg[idx].sample_rate; |
| channels->min = channels->max = slim_tx_cfg[idx].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_1_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_tx_cfg[1].bit_format); |
| rate->min = rate->max = slim_tx_cfg[1].sample_rate; |
| channels->min = channels->max = slim_tx_cfg[1].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_4_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| SNDRV_PCM_FORMAT_S32_LE); |
| rate->min = rate->max = SAMPLING_RATE_8KHZ; |
| channels->min = channels->max = msm_vi_feed_tx_ch; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_5_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_rx_cfg[5].bit_format); |
| rate->min = rate->max = slim_rx_cfg[5].sample_rate; |
| channels->min = channels->max = slim_rx_cfg[5].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_5_TX: |
| component = snd_soc_rtdcom_lookup(rtd, "tasha_codec"); |
| if (!component) { |
| pr_err("%s: component is NULL\n", __func__); |
| return -EINVAL; |
| } |
| |
| rate->min = rate->max = SAMPLING_RATE_16KHZ; |
| channels->min = channels->max = 1; |
| |
| config = msm_codec_fn.get_afe_config_fn(component, |
| AFE_SLIMBUS_SLAVE_PORT_CONFIG); |
| if (config) { |
| rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG, |
| config, SLIMBUS_5_TX); |
| if (rc) |
| pr_err("%s: Failed to set slimbus slave port config %d\n", |
| __func__, rc); |
| } |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_7_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_rx_cfg[SLIM_RX_7].bit_format); |
| rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate; |
| channels->min = channels->max = |
| slim_rx_cfg[SLIM_RX_7].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_7_TX: |
| rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate; |
| channels->min = channels->max = |
| slim_tx_cfg[SLIM_TX_7].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_8_TX: |
| rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate; |
| channels->min = channels->max = |
| slim_tx_cfg[SLIM_TX_8].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SLIMBUS_9_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| slim_tx_cfg[SLIM_TX_9].bit_format); |
| rate->min = rate->max = slim_tx_cfg[SLIM_TX_9].sample_rate; |
| channels->min = channels->max = |
| slim_tx_cfg[SLIM_TX_9].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_USB_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| usb_rx_cfg.bit_format); |
| rate->min = rate->max = usb_rx_cfg.sample_rate; |
| channels->min = channels->max = usb_rx_cfg.channels; |
| break; |
| |
| case MSM_BACKEND_DAI_USB_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| usb_tx_cfg.bit_format); |
| rate->min = rate->max = usb_tx_cfg.sample_rate; |
| channels->min = channels->max = usb_tx_cfg.channels; |
| break; |
| |
| case MSM_BACKEND_DAI_AFE_PCM_RX: |
| channels->min = channels->max = proxy_rx_cfg.channels; |
| rate->min = rate->max = SAMPLING_RATE_48KHZ; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_TDM_RX_0: |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_PRI][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_PRI][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_TDM_TX_0: |
| channels->min = channels->max = |
| tdm_tx_cfg[TDM_PRI][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_tx_cfg[TDM_PRI][TDM_0].bit_format); |
| rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_TDM_RX_0: |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_SEC][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_SEC][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_TDM_TX_0: |
| channels->min = channels->max = |
| tdm_tx_cfg[TDM_SEC][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_tx_cfg[TDM_SEC][TDM_0].bit_format); |
| rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_TERT_TDM_RX_0: |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_TERT][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_TERT][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_TERT_TDM_TX_0: |
| channels->min = channels->max = |
| tdm_tx_cfg[TDM_TERT][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_tx_cfg[TDM_TERT][TDM_0].bit_format); |
| rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_QUAT_TDM_RX_0: |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_QUAT][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_QUAT_TDM_TX_0: |
| channels->min = channels->max = |
| tdm_tx_cfg[TDM_QUAT][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format); |
| rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_QUIN_TDM_RX_0: |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_QUIN][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_QUIN_TDM_TX_0: |
| channels->min = channels->max = |
| tdm_tx_cfg[TDM_QUIN][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format); |
| rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate; |
| break; |
| |
| case MSM_BACKEND_DAI_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[PRIM_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[PRIM_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[SEC_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[SEC_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_TERT_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[TERT_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_TERT_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[TERT_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUAT_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[QUAT_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUAT_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[QUAT_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUIN_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[QUIN_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUIN_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[QUIN_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEN_AUXPCM_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_rx_cfg[SEN_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEN_AUXPCM_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format); |
| rate->min = rate->max = |
| aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate; |
| channels->min = channels->max = |
| aux_pcm_tx_cfg[SEN_AUX_PCM].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[PRIM_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[PRIM_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[PRIM_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[PRIM_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SECONDARY_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[SEC_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[SEC_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SECONDARY_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[SEC_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[SEC_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_TERTIARY_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[TERT_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[TERT_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_TERTIARY_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[TERT_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[TERT_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[QUAT_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[QUAT_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[QUAT_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[QUAT_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUINARY_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[QUIN_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[QUIN_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_QUINARY_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[QUIN_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[QUIN_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SENARY_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_rx_cfg[SEN_MI2S].bit_format); |
| rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_rx_cfg[SEN_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SENARY_MI2S_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| mi2s_tx_cfg[SEN_MI2S].bit_format); |
| rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate; |
| channels->min = channels->max = |
| mi2s_tx_cfg[SEN_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_META_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| meta_mi2s_rx_cfg[PRIM_META_MI2S].bit_format); |
| rate->min = rate->max = |
| meta_mi2s_rx_cfg[PRIM_META_MI2S].sample_rate; |
| channels->min = channels->max = |
| meta_mi2s_rx_cfg[PRIM_META_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_META_MI2S_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| meta_mi2s_rx_cfg[SEC_META_MI2S].bit_format); |
| rate->min = rate->max = |
| meta_mi2s_rx_cfg[SEC_META_MI2S].sample_rate; |
| channels->min = channels->max = |
| meta_mi2s_rx_cfg[SEC_META_MI2S].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0: |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1: |
| idx = msm_cdc_dma_get_idx_from_beid(dai_link->id); |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| cdc_dma_rx_cfg[idx].bit_format); |
| rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate; |
| channels->min = channels->max = cdc_dma_rx_cfg[idx].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1: |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2: |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0: |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1: |
| idx = msm_cdc_dma_get_idx_from_beid(dai_link->id); |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| cdc_dma_tx_cfg[idx].bit_format); |
| rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate; |
| channels->min = channels->max = cdc_dma_tx_cfg[idx].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| SNDRV_PCM_FORMAT_S32_LE); |
| rate->min = rate->max = SAMPLING_RATE_8KHZ; |
| channels->min = channels->max = msm_vi_feed_tx_ch; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_SPDIF_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| spdif_rx_cfg[PRIM_SPDIF_RX].bit_format); |
| rate->min = rate->max = |
| spdif_rx_cfg[PRIM_SPDIF_RX].sample_rate; |
| channels->min = channels->max = |
| spdif_rx_cfg[PRIM_SPDIF_RX].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_PRI_SPDIF_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| spdif_tx_cfg[PRIM_SPDIF_TX].bit_format); |
| rate->min = rate->max = |
| spdif_tx_cfg[PRIM_SPDIF_TX].sample_rate; |
| channels->min = channels->max = |
| spdif_tx_cfg[PRIM_SPDIF_TX].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_SPDIF_RX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| spdif_rx_cfg[SEC_SPDIF_RX].bit_format); |
| rate->min = rate->max = |
| spdif_rx_cfg[SEC_SPDIF_RX].sample_rate; |
| channels->min = channels->max = |
| spdif_rx_cfg[SEC_SPDIF_RX].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_SEC_SPDIF_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| spdif_tx_cfg[SEC_SPDIF_TX].bit_format); |
| rate->min = rate->max = |
| spdif_tx_cfg[SEC_SPDIF_TX].sample_rate; |
| channels->min = channels->max = |
| spdif_tx_cfg[SEC_SPDIF_TX].channels; |
| break; |
| |
| case MSM_BACKEND_DAI_AFE_LOOPBACK_TX: |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| afe_lb_tx_cfg.bit_format); |
| rate->min = rate->max = afe_lb_tx_cfg.sample_rate; |
| channels->min = channels->max = afe_lb_tx_cfg.channels; |
| break; |
| |
| case MSM_BACKEND_DAI_HDMI_RX_MS: |
| idx = msm_ext_hdmi_get_idx_from_beid(dai_link->id); |
| |
| if (idx < 0) { |
| pr_err("%s: Incorrect ext hdmi idx %d\n", |
| __func__, idx); |
| rc = idx; |
| goto done; |
| } |
| |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| ext_hdmi_rx_cfg[idx].bit_format); |
| rate->min = rate->max = ext_hdmi_rx_cfg[idx].sample_rate; |
| channels->min = channels->max = ext_hdmi_rx_cfg[idx].channels; |
| break; |
| |
| default: |
| rate->min = rate->max = SAMPLING_RATE_48KHZ; |
| break; |
| } |
| done: |
| return rc; |
| } |
| |
| static int msm_afe_set_config(struct snd_soc_component *component) |
| { |
| int ret = 0; |
| void *config_data = NULL; |
| |
| if (!msm_codec_fn.get_afe_config_fn) { |
| dev_err(component->dev, "%s: codec get afe config not init'ed\n", |
| __func__); |
| return -EINVAL; |
| } |
| |
| config_data = msm_codec_fn.get_afe_config_fn(component, |
| AFE_CDC_REGISTERS_CONFIG); |
| if (config_data) { |
| ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0); |
| if (ret) { |
| dev_err(component->dev, |
| "%s: Failed to set codec registers config %d\n", |
| __func__, ret); |
| return ret; |
| } |
| } |
| |
| config_data = msm_codec_fn.get_afe_config_fn(component, |
| AFE_CDC_REGISTER_PAGE_CONFIG); |
| if (config_data) { |
| ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data, |
| 0); |
| if (ret) |
| dev_err(component->dev, |
| "%s: Failed to set cdc register page config\n", |
| __func__); |
| } |
| |
| config_data = msm_codec_fn.get_afe_config_fn(component, |
| AFE_SLIMBUS_SLAVE_CONFIG); |
| if (config_data) { |
| ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0); |
| if (ret) { |
| dev_err(component->dev, |
| "%s: Failed to set slimbus slave config %d\n", |
| __func__, ret); |
| return ret; |
| } |
| } |
| |
| return 0; |
| } |
| |
| static void msm_afe_clear_config(void) |
| { |
| afe_clear_config(AFE_CDC_REGISTERS_CONFIG); |
| afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG); |
| } |
| |
| static int msm_adsp_power_up_config(struct snd_soc_component *component, |
| struct snd_card *card) |
| { |
| int ret = 0; |
| unsigned long timeout; |
| int adsp_ready = 0; |
| bool snd_card_online = 0; |
| |
| timeout = jiffies + |
| msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS); |
| |
| do { |
| if (!snd_card_online) { |
| snd_card_online = snd_card_is_online_state(card); |
| pr_debug("%s: Sound card is %s\n", __func__, |
| snd_card_online ? "Online" : "Offline"); |
| } |
| if (!adsp_ready) { |
| adsp_ready = q6core_is_adsp_ready(); |
| pr_debug("%s: ADSP Audio is %s\n", __func__, |
| adsp_ready ? "ready" : "not ready"); |
| } |
| if (snd_card_online && adsp_ready) |
| break; |
| |
| /* |
| * Sound card/ADSP will be coming up after subsystem restart and |
| * it might not be fully up when the control reaches |
| * here. So, wait for 50msec before checking ADSP state |
| */ |
| msleep(50); |
| } while (time_after(timeout, jiffies)); |
| |
| if (!snd_card_online || !adsp_ready) { |
| pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n", |
| __func__, |
| snd_card_online ? "Online" : "Offline", |
| adsp_ready ? "ready" : "not ready"); |
| ret = -ETIMEDOUT; |
| goto err; |
| } |
| |
| ret = msm_afe_set_config(component); |
| if (ret) |
| pr_err("%s: Failed to set AFE config. err %d\n", |
| __func__, ret); |
| |
| return 0; |
| |
| err: |
| return ret; |
| } |
| |
| static int qcs405_notifier_service_cb(struct notifier_block *this, |
| unsigned long opcode, void *ptr) |
| { |
| int ret; |
| struct snd_soc_card *card = NULL; |
| const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX; |
| struct snd_soc_pcm_runtime *rtd; |
| struct snd_soc_dai *codec_dai; |
| struct snd_soc_component *component; |
| |
| pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode); |
| |
| switch (opcode) { |
| case AUDIO_NOTIFIER_SERVICE_DOWN: |
| /* |
| * Use flag to ignore initial boot notifications |
| * On initial boot msm_adsp_power_up_config is |
| * called on init. There is no need to clear |
| * and set the config again on initial boot. |
| */ |
| if (is_initial_boot) |
| break; |
| msm_afe_clear_config(); |
| break; |
| case AUDIO_NOTIFIER_SERVICE_UP: |
| if (is_initial_boot) { |
| is_initial_boot = false; |
| break; |
| } |
| if (!spdev) |
| return -EINVAL; |
| |
| card = platform_get_drvdata(spdev); |
| rtd = snd_soc_get_pcm_runtime(card, be_dl_name); |
| if (!rtd) { |
| dev_err(card->dev, |
| "%s: snd_soc_get_pcm_runtime for %s failed!\n", |
| __func__, be_dl_name); |
| ret = -EINVAL; |
| goto err; |
| } |
| codec_dai = rtd->codec_dai; |
| if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) |
| component = snd_soc_rtdcom_lookup(rtd, "tasha_codec"); |
| |
| ret = msm_adsp_power_up_config(component, card->snd_card); |
| if (ret < 0) { |
| dev_err(card->dev, |
| "%s: msm_adsp_power_up_config failed ret = %d!\n", |
| __func__, ret); |
| goto err; |
| } |
| break; |
| default: |
| break; |
| } |
| err: |
| return NOTIFY_OK; |
| } |
| |
| static struct notifier_block service_nb = { |
| .notifier_call = qcs405_notifier_service_cb, |
| .priority = -INT_MAX, |
| }; |
| |
| static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd) |
| { |
| int ret = 0; |
| void *config_data; |
| struct snd_soc_component *component; |
| struct snd_soc_dapm_context *dapm; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| struct snd_card *card; |
| struct msm_asoc_mach_data *pdata = |
| snd_soc_card_get_drvdata(rtd->card); |
| |
| /* |
| * Codec SLIMBUS configuration |
| * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8 |
| * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13 |
| * TX14, TX15, TX16 |
| */ |
| unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150, |
| 151, 152, 153, 154, 155, 156}; |
| unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133, |
| 134, 135, 136, 137, 138, 139, |
| 140, 141, 142, 143}; |
| |
| pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev)); |
| |
| rtd->pmdown_time = 0; |
| |
| if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| component = snd_soc_rtdcom_lookup(rtd, "tasha_codec"); |
| dapm = snd_soc_component_get_dapm(component); |
| } |
| |
| ret = snd_soc_add_component_controls(component, msm_snd_sb_controls, |
| ARRAY_SIZE(msm_snd_sb_controls)); |
| if (ret < 0) { |
| pr_err("%s: add_codec_controls failed, err %d\n", |
| __func__, ret); |
| return ret; |
| } |
| |
| snd_soc_dapm_new_controls(dapm, msm_dapm_widgets, |
| ARRAY_SIZE(msm_dapm_widgets)); |
| |
| snd_soc_dapm_add_routes(dapm, wcd_audio_paths, |
| ARRAY_SIZE(wcd_audio_paths)); |
| |
| snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1"); |
| snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2"); |
| snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3"); |
| snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4"); |
| snd_soc_dapm_ignore_suspend(dapm, "lineout booster"); |
| |
| snd_soc_dapm_sync(dapm); |
| |
| snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch), |
| tx_ch, ARRAY_SIZE(rx_ch), rx_ch); |
| |
| msm_codec_fn.get_afe_config_fn = tasha_get_afe_config; |
| |
| ret = msm_adsp_power_up_config(component, rtd->card->snd_card); |
| if (ret) { |
| dev_err(component->dev, "%s: Failed to set AFE config %d\n", |
| __func__, ret); |
| goto err; |
| } |
| |
| config_data = msm_codec_fn.get_afe_config_fn(component, |
| AFE_AANC_VERSION); |
| if (config_data) { |
| ret = afe_set_config(AFE_AANC_VERSION, config_data, 0); |
| if (ret) { |
| dev_err(component->dev, "%s: Failed to set aanc version %d\n", |
| __func__, ret); |
| goto err; |
| } |
| } |
| |
| card = rtd->card->snd_card; |
| if (!pdata->codec_root) |
| pdata->codec_root = snd_info_create_subdir(card->module, |
| "codecs", card->proc_root); |
| if (!pdata->codec_root) { |
| dev_dbg(codec->dev, "%s: Cannot create codecs module entry\n", |
| __func__); |
| ret = 0; |
| goto err; |
| } |
| tasha_codec_info_create_codec_entry(pdata->codec_root, component); |
| |
| codec_reg_done = true; |
| return 0; |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_va_cdc_dma_init(struct snd_soc_pcm_runtime *rtd) |
| { |
| int ret = 0; |
| struct snd_soc_component *component; |
| struct snd_soc_dapm_context *dapm; |
| struct snd_card *card; |
| struct msm_asoc_mach_data *pdata = |
| snd_soc_card_get_drvdata(rtd->card); |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| |
| component = snd_soc_rtdcom_lookup(rtd, "bolero_codec"); |
| if (!component) { |
| pr_err("%s: component is NULL\n", __func__); |
| return -EINVAL; |
| } |
| |
| dapm = snd_soc_component_get_dapm(component); |
| |
| ret = snd_soc_add_component_controls(component, msm_snd_va_controls, |
| ARRAY_SIZE(msm_snd_va_controls)); |
| if (ret < 0) { |
| dev_err(component->dev, "%s: add_component_controls for va failed, err %d\n", |
| __func__, ret); |
| return ret; |
| } |
| |
| snd_soc_dapm_new_controls(dapm, msm_va_dapm_widgets, |
| ARRAY_SIZE(msm_va_dapm_widgets)); |
| |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6"); |
| snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7"); |
| |
| snd_soc_dapm_sync(dapm); |
| |
| card = rtd->card->snd_card; |
| if (!pdata->codec_root) |
| pdata->codec_root = snd_info_create_subdir(card->module, |
| "codecs", card->proc_root); |
| if (!pdata->codec_root) { |
| dev_dbg(codec->dev, "%s: Cannot create codecs module entry\n", |
| __func__); |
| ret = 0; |
| goto done; |
| } |
| bolero_info_create_codec_entry(pdata->codec_root, component); |
| done: |
| return ret; |
| } |
| |
| static int msm_wsa_cdc_dma_init(struct snd_soc_pcm_runtime *rtd) |
| { |
| int ret = 0; |
| struct snd_soc_component *component = NULL; |
| struct snd_soc_dapm_context *dapm = NULL; |
| struct snd_soc_component *aux_comp = NULL; |
| struct snd_card *card = NULL; |
| struct msm_asoc_mach_data *pdata = |
| snd_soc_card_get_drvdata(rtd->card); |
| |
| component = snd_soc_rtdcom_lookup(rtd, "bolero_codec"); |
| if (!component) { |
| pr_err("%s: component is NULL\n", __func__); |
| return -EINVAL; |
| } |
| dapm = snd_soc_component_get_dapm(component); |
| |
| ret = snd_soc_add_component_controls(component, msm_snd_wsa_controls, |
| ARRAY_SIZE(msm_snd_wsa_controls)); |
| if (ret < 0) { |
| dev_err(component->dev, "%s: add_codec_controls for wsa failed, err %d\n", |
| __func__, ret); |
| return ret; |
| } |
| snd_soc_dapm_new_controls(dapm, msm_wsa_dapm_widgets, |
| ARRAY_SIZE(msm_wsa_dapm_widgets)); |
| |
| snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT"); |
| snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT"); |
| snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI"); |
| snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA"); |
| |
| snd_soc_dapm_sync(dapm); |
| |
| /* |
| * Send speaker configuration only for WSA8810. |
| * Default configuration is for WSA8815. |
| */ |
| dev_dbg(component->dev, "%s: Number of aux devices: %d\n", |
| __func__, rtd->card->num_aux_devs); |
| if (rtd->card->num_aux_devs && |
| !list_empty(&rtd->card->component_dev_list)) { |
| aux_comp = list_first_entry( |
| &rtd->card->component_dev_list, |
| struct snd_soc_component, |
| card_aux_list); |
| if (!strcmp(aux_comp->name, WSA8810_NAME_1) || |
| !strcmp(aux_comp->name, WSA8810_NAME_2)) { |
| wsa_macro_set_spkr_mode(component, |
| WSA_MACRO_SPKR_MODE_1); |
| wsa_macro_set_spkr_gain_offset(component, |
| WSA_MACRO_GAIN_OFFSET_M1P5_DB); |
| } |
| } |
| card = rtd->card->snd_card; |
| if (!pdata->codec_root) |
| pdata->codec_root = snd_info_create_subdir(card->module, |
| "codecs", card->proc_root); |
| if (!pdata->codec_root) { |
| dev_dbg(component->dev, "%s: Cannot create codecs module entry\n", |
| __func__); |
| ret = 0; |
| goto done; |
| } |
| bolero_info_create_codec_entry(pdata->codec_root, component); |
| done: |
| return ret; |
| } |
| |
| static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd) |
| { |
| unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158}; |
| unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161, 162}; |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| |
| return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch), |
| tx_ch, ARRAY_SIZE(rx_ch), rx_ch); |
| } |
| |
| static int msm_snd_hw_params(struct snd_pcm_substream *substream, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| |
| int ret = 0; |
| u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS]; |
| u32 rx_ch_cnt = 0, tx_ch_cnt = 0; |
| u32 user_set_tx_ch = 0; |
| u32 rx_ch_count; |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| ret = snd_soc_dai_get_channel_map(codec_dai, |
| &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| if (ret < 0) { |
| pr_err("%s: failed to get codec chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) { |
| pr_debug("%s: rx_5_ch=%d\n", __func__, |
| slim_rx_cfg[5].channels); |
| rx_ch_count = slim_rx_cfg[5].channels; |
| } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) { |
| pr_debug("%s: rx_2_ch=%d\n", __func__, |
| slim_rx_cfg[2].channels); |
| rx_ch_count = slim_rx_cfg[2].channels; |
| } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) { |
| pr_debug("%s: rx_6_ch=%d\n", __func__, |
| slim_rx_cfg[6].channels); |
| rx_ch_count = slim_rx_cfg[6].channels; |
| } else { |
| pr_debug("%s: rx_0_ch=%d\n", __func__, |
| slim_rx_cfg[0].channels); |
| rx_ch_count = slim_rx_cfg[0].channels; |
| } |
| ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0, |
| rx_ch_count, rx_ch); |
| if (ret < 0) { |
| pr_err("%s: failed to set cpu chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| } else { |
| |
| pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__, |
| codec_dai->name, codec_dai->id, user_set_tx_ch); |
| ret = snd_soc_dai_get_channel_map(codec_dai, |
| &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| if (ret < 0) { |
| pr_err("%s: failed to get tx codec chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| /* For <codec>_tx1 case */ |
| if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX) |
| user_set_tx_ch = slim_tx_cfg[0].channels; |
| /* For <codec>_tx3 case */ |
| else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX) |
| user_set_tx_ch = slim_tx_cfg[1].channels; |
| else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX) |
| user_set_tx_ch = msm_vi_feed_tx_ch; |
| else |
| user_set_tx_ch = tx_ch_cnt; |
| |
| pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n", |
| __func__, slim_tx_cfg[0].channels, user_set_tx_ch, |
| tx_ch_cnt, dai_link->id); |
| |
| ret = snd_soc_dai_set_channel_map(cpu_dai, |
| user_set_tx_ch, tx_ch, 0, 0); |
| if (ret < 0) |
| pr_err("%s: failed to set tx cpu chan map, err:%d\n", |
| __func__, ret); |
| } |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_snd_auxpcm_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| |
| ret = qcs405_send_island_vad_config(dai_link->id); |
| if (ret) { |
| pr_err("%s: send island/vad cfg failed, err = %d\n", |
| __func__, ret); |
| } |
| return ret; |
| } |
| |
| static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| |
| ret = qcs405_send_island_vad_config(dai_link->id); |
| if (ret) { |
| pr_err("%s: send island/vad cfg failed, err = %d\n", |
| __func__, ret); |
| } |
| return ret; |
| } |
| |
| static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| |
| int ret = 0; |
| u32 rx_ch_cdc_dma, tx_ch_cdc_dma; |
| u32 rx_ch_cnt = 0, tx_ch_cnt = 0; |
| u32 user_set_tx_ch = 0; |
| u32 user_set_rx_ch = 0; |
| u32 ch_id; |
| |
| ret = snd_soc_dai_get_channel_map(codec_dai, |
| &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt, |
| &rx_ch_cdc_dma); |
| if (ret < 0) { |
| pr_err("%s: failed to get codec chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| switch (dai_link->id) { |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0: |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1: |
| { |
| ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id); |
| pr_debug("%s: id %d rx_ch=%d\n", __func__, |
| ch_id, cdc_dma_rx_cfg[ch_id].channels); |
| user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels; |
| ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0, |
| user_set_rx_ch, &rx_ch_cdc_dma); |
| if (ret < 0) { |
| pr_err("%s: failed to set cpu chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| |
| } |
| break; |
| } |
| } else { |
| switch (dai_link->id) { |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0: |
| { |
| user_set_tx_ch = msm_vi_feed_tx_ch; |
| } |
| break; |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1: |
| case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2: |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0: |
| case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1: |
| { |
| ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id); |
| pr_debug("%s: id %d tx_ch=%d\n", __func__, |
| ch_id, cdc_dma_tx_cfg[ch_id].channels); |
| user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels; |
| } |
| break; |
| } |
| |
| ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch, |
| &tx_ch_cdc_dma, 0, 0); |
| if (ret < 0) { |
| pr_err("%s: failed to set cpu chan map, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| } |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_wcn_hw_params(struct snd_pcm_substream *substream, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX]; |
| u32 rx_ch_cnt = 0, tx_ch_cnt = 0; |
| int ret; |
| |
| dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__, |
| codec_dai->name, codec_dai->id); |
| ret = snd_soc_dai_get_channel_map(codec_dai, |
| &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| if (ret) { |
| dev_err(rtd->dev, |
| "%s: failed to get BTFM codec chan map\n, err:%d\n", |
| __func__, ret); |
| goto err; |
| } |
| |
| dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n", |
| __func__, tx_ch_cnt, dai_link->id); |
| |
| ret = snd_soc_dai_set_channel_map(cpu_dai, |
| tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch); |
| if (ret) |
| dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n", |
| __func__, ret); |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_get_port_id(int be_id) |
| { |
| int afe_port_id; |
| |
| switch (be_id) { |
| case MSM_BACKEND_DAI_PRI_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_PRI_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_SECONDARY_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_SECONDARY_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_TERTIARY_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_TERTIARY_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_QUINARY_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_QUINARY_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX; |
| break; |
| case MSM_BACKEND_DAI_SENARY_MI2S_RX: |
| afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX; |
| break; |
| case MSM_BACKEND_DAI_SENARY_MI2S_TX: |
| afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX; |
| break; |
| default: |
| pr_err("%s: Invalid BE id: %d\n", __func__, be_id); |
| afe_port_id = -EINVAL; |
| } |
| |
| return afe_port_id; |
| } |
| |
| static u32 get_mi2s_bits_per_sample(u32 bit_format) |
| { |
| u32 bit_per_sample; |
| |
| switch (bit_format) { |
| case SNDRV_PCM_FORMAT_S32_LE: |
| case SNDRV_PCM_FORMAT_S24_3LE: |
| case SNDRV_PCM_FORMAT_S24_LE: |
| bit_per_sample = 32; |
| break; |
| case SNDRV_PCM_FORMAT_S16_LE: |
| default: |
| bit_per_sample = 16; |
| break; |
| } |
| |
| return bit_per_sample; |
| } |
| |
| static void update_mi2s_clk_val(int dai_id, int stream) |
| { |
| u32 bit_per_sample; |
| |
| if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| bit_per_sample = |
| get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format); |
| mi2s_clk[dai_id].clk_freq_in_hz = |
| mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample; |
| } else { |
| bit_per_sample = |
| get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format); |
| mi2s_clk[dai_id].clk_freq_in_hz = |
| mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample; |
| } |
| } |
| |
| static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int port_id = 0; |
| int index = cpu_dai->id; |
| |
| port_id = msm_get_port_id(rtd->dai_link->id); |
| if (port_id < 0) { |
| dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__); |
| ret = port_id; |
| goto err; |
| } |
| |
| if (enable) { |
| update_mi2s_clk_val(index, substream->stream); |
| dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, |
| mi2s_clk[index].clk_freq_in_hz); |
| } |
| |
| mi2s_clk[index].enable = enable; |
| ret = afe_set_lpass_clock_v2(port_id, |
| &mi2s_clk[index]); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed for port 0x%x , err:%d\n", |
| __func__, port_id, ret); |
| goto err; |
| } |
| |
| err: |
| return ret; |
| } |
| |
| |
| static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_interval *rate = hw_param_interval(params, |
| SNDRV_PCM_HW_PARAM_RATE); |
| struct snd_interval *channels = hw_param_interval(params, |
| SNDRV_PCM_HW_PARAM_CHANNELS); |
| |
| if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) { |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_QUAT][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format); |
| rate->min = rate->max = |
| tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate; |
| } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) { |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_SEC][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_SEC][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate; |
| } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) { |
| channels->min = channels->max = |
| tdm_rx_cfg[TDM_QUIN][TDM_0].channels; |
| param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format); |
| rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate; |
| } else { |
| pr_err("%s: dai id 0x%x not supported\n", |
| __func__, cpu_dai->id); |
| return -EINVAL; |
| } |
| |
| pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n", |
| __func__, cpu_dai->id, channels->max, rate->max, |
| params_format(params)); |
| |
| return 0; |
| } |
| |
| static int qcs405_tdm_snd_hw_params(struct snd_pcm_substream *substream, |
| struct snd_pcm_hw_params *params) |
| { |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int ret = 0; |
| int slot_width = 32; |
| int channels, slots = 8; |
| unsigned int slot_mask, rate, clk_freq; |
| unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28}; |
| |
| pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id); |
| |
| /* currently only supporting TDM_RX_0 and TDM_TX_0 */ |
| switch (cpu_dai->id) { |
| case AFE_PORT_ID_PRIMARY_TDM_RX: |
| channels = tdm_rx_cfg[TDM_PRI][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_SECONDARY_TDM_RX: |
| channels = tdm_rx_cfg[TDM_SEC][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_TERTIARY_TDM_RX: |
| channels = tdm_rx_cfg[TDM_TERT][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_QUATERNARY_TDM_RX: |
| channels = tdm_rx_cfg[TDM_QUAT][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_QUINARY_TDM_RX: |
| channels = tdm_rx_cfg[TDM_QUIN][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_PRIMARY_TDM_TX: |
| channels = tdm_tx_cfg[TDM_PRI][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_SECONDARY_TDM_TX: |
| channels = tdm_tx_cfg[TDM_SEC][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_TERTIARY_TDM_TX: |
| channels = tdm_tx_cfg[TDM_TERT][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_QUATERNARY_TDM_TX: |
| channels = tdm_tx_cfg[TDM_QUAT][TDM_0].channels; |
| break; |
| case AFE_PORT_ID_QUINARY_TDM_TX: |
| channels = tdm_tx_cfg[TDM_QUIN][TDM_0].channels; |
| break; |
| default: |
| pr_err("%s: dai id 0x%x not supported\n", |
| __func__, cpu_dai->id); |
| return -EINVAL; |
| } |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| /*2 slot config - bits 0 and 1 set for the first two slots */ |
| slot_mask = 0x0000FFFF >> (16-channels); |
| |
| pr_debug("%s: tdm rx slot_width %d slots %d\n", |
| __func__, slot_width, slots); |
| |
| ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask, |
| slots, slot_width); |
| if (ret < 0) { |
| pr_err("%s: failed to set tdm rx slot, err:%d\n", |
| __func__, ret); |
| goto end; |
| } |
| |
| ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 0, NULL, channels, slot_offset); |
| if (ret < 0) { |
| pr_err("%s: failed to set tdm rx channel map, err:%d\n", |
| __func__, ret); |
| goto end; |
| } |
| } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| /*2 slot config - bits 0 and 1 set for the first two slots */ |
| slot_mask = 0x0000FFFF >> (16-channels); |
| |
| pr_debug("%s: tdm tx slot_width %d slots %d\n", |
| __func__, slot_width, slots); |
| |
| ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0, |
| slots, slot_width); |
| if (ret < 0) { |
| pr_err("%s: failed to set tdm tx slot, err:%d\n", |
| __func__, ret); |
| goto end; |
| } |
| |
| ret = snd_soc_dai_set_channel_map(cpu_dai, |
| channels, slot_offset, 0, NULL); |
| if (ret < 0) { |
| pr_err("%s: failed to set tdm tx channel map, err:%d\n", |
| __func__, ret); |
| goto end; |
| } |
| } else { |
| ret = -EINVAL; |
| pr_err("%s: invalid use case, err:%d\n", |
| __func__, ret); |
| goto end; |
| } |
| |
| rate = params_rate(params); |
| clk_freq = rate * slot_width * slots; |
| ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT); |
| if (ret < 0) |
| pr_err("%s: failed to set tdm clk, err:%d\n", |
| __func__, ret); |
| |
| end: |
| return ret; |
| } |
| |
| static int msm_get_tdm_mode(u32 port_id) |
| { |
| u32 tdm_mode; |
| |
| switch (port_id) { |
| case AFE_PORT_ID_PRIMARY_TDM_RX: |
| case AFE_PORT_ID_PRIMARY_TDM_TX: |
| tdm_mode = TDM_PRI; |
| break; |
| case AFE_PORT_ID_SECONDARY_TDM_RX: |
| case AFE_PORT_ID_SECONDARY_TDM_TX: |
| tdm_mode = TDM_SEC; |
| break; |
| case AFE_PORT_ID_TERTIARY_TDM_RX: |
| case AFE_PORT_ID_TERTIARY_TDM_TX: |
| tdm_mode = TDM_TERT; |
| break; |
| case AFE_PORT_ID_QUATERNARY_TDM_RX: |
| case AFE_PORT_ID_QUATERNARY_TDM_TX: |
| tdm_mode = TDM_QUAT; |
| break; |
| case AFE_PORT_ID_QUINARY_TDM_RX: |
| case AFE_PORT_ID_QUINARY_TDM_TX: |
| tdm_mode = TDM_QUIN; |
| break; |
| default: |
| pr_err("%s: Invalid port id: %d\n", __func__, port_id); |
| tdm_mode = -EINVAL; |
| } |
| return tdm_mode; |
| } |
| |
| static int qcs405_tdm_snd_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| u32 tdm_mode = msm_get_tdm_mode(cpu_dai->id); |
| |
| if (tdm_mode >= TDM_INTERFACE_MAX) { |
| ret = -EINVAL; |
| pr_err("%s: Invalid TDM interface %d\n", |
| __func__, ret); |
| return ret; |
| } |
| |
| if (pdata->mi2s_gpio_p[tdm_mode]) { |
| ret = msm_cdc_pinctrl_select_active_state( |
| pdata->mi2s_gpio_p[tdm_mode]); |
| if (ret) |
| pr_err("%s: TDM GPIO pinctrl set active failed with %d\n", |
| __func__, ret); |
| } |
| |
| /* Enable Mic bias for TDM Mics */ |
| if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_TX) { |
| if (pdata->tdm_micb_supply) { |
| ret = regulator_set_voltage(pdata->tdm_micb_supply, |
| pdata->tdm_micb_voltage, |
| pdata->tdm_micb_voltage); |
| if (ret) { |
| pr_err("%s: Setting voltage failed, err = %d\n", |
| __func__, ret); |
| return ret; |
| } |
| ret = regulator_set_load(pdata->tdm_micb_supply, |
| pdata->tdm_micb_current); |
| if (ret) { |
| pr_err("%s: Setting current failed, err = %d\n", |
| __func__, ret); |
| return ret; |
| } |
| ret = regulator_enable(pdata->tdm_micb_supply); |
| if (ret) { |
| pr_err("%s: regulator enable failed, err = %d\n", |
| __func__, ret); |
| return ret; |
| } |
| } |
| } |
| |
| ret = qcs405_send_island_vad_config(dai_link->id); |
| if (ret) { |
| pr_err("%s: send island/vad cfg failed, err = %d\n", |
| __func__, ret); |
| return ret; |
| } |
| |
| return ret; |
| } |
| |
| static void qcs405_tdm_snd_shutdown(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| u32 tdm_mode = msm_get_tdm_mode(cpu_dai->id); |
| |
| if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_TX) { |
| if (pdata->tdm_micb_supply) { |
| ret = regulator_disable(pdata->tdm_micb_supply); |
| if (ret) |
| pr_err("%s: regulator disable failed, err = %d\n", |
| __func__, ret); |
| regulator_set_voltage(pdata->tdm_micb_supply, 0, |
| pdata->tdm_micb_voltage); |
| regulator_set_load(pdata->tdm_micb_supply, 0); |
| } |
| } |
| |
| if (pdata->mi2s_gpio_p[tdm_mode]) { |
| ret = msm_cdc_pinctrl_select_sleep_state( |
| pdata->mi2s_gpio_p[tdm_mode]); |
| if (ret) |
| pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n", |
| __func__, ret); |
| } |
| } |
| |
| static struct snd_soc_ops qcs405_tdm_be_ops = { |
| .hw_params = qcs405_tdm_snd_hw_params, |
| .startup = qcs405_tdm_snd_startup, |
| .shutdown = qcs405_tdm_snd_shutdown |
| }; |
| |
| static int msm_fe_qos_prepare(struct snd_pcm_substream *substream) |
| { |
| cpumask_t mask; |
| |
| if (pm_qos_request_active(&substream->latency_pm_qos_req)) |
| pm_qos_remove_request(&substream->latency_pm_qos_req); |
| |
| cpumask_clear(&mask); |
| cpumask_set_cpu(1, &mask); /* affine to core 1 */ |
| cpumask_set_cpu(2, &mask); /* affine to core 2 */ |
| cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask); |
| |
| substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES; |
| |
| pm_qos_add_request(&substream->latency_pm_qos_req, |
| PM_QOS_CPU_DMA_LATENCY, |
| MSM_LL_QOS_VALUE); |
| return 0; |
| } |
| |
| static struct snd_soc_ops msm_fe_qos_ops = { |
| .prepare = msm_fe_qos_prepare, |
| }; |
| |
| static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0, val = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| int index = cpu_dai->id; |
| unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| int data_format; |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| data_format = mi2s_rx_cfg[index].data_format; |
| else |
| data_format = mi2s_tx_cfg[index].data_format; |
| |
| dev_dbg(rtd->card->dev, |
| "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", |
| __func__, substream->name, substream->stream, |
| cpu_dai->name, cpu_dai->id); |
| |
| if (index < PRIM_MI2S || index >= MI2S_MAX) { |
| ret = -EINVAL; |
| dev_err(rtd->card->dev, |
| "%s: CPU DAI id (%d) out of range\n", |
| __func__, cpu_dai->id); |
| goto err; |
| } |
| /* |
| * Mutex protection in case the same MI2S |
| * interface using for both TX and RX so |
| * that the same clock won't be enable twice. |
| */ |
| mutex_lock(&mi2s_intf_conf[index].lock); |
| if (++mi2s_intf_conf[index].ref_cnt == 1) { |
| /* Check if msm needs to provide the clock to the interface */ |
| if (!mi2s_intf_conf[index].msm_is_mi2s_master) { |
| mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; |
| fmt = SND_SOC_DAIFMT_CBM_CFM; |
| } |
| |
| if (data_format == AFE_DSD_DATA) |
| fmt = SND_SOC_DAIFMT_CBM_CFS; |
| ret = msm_mi2s_set_sclk(substream, true); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed to enable MI2S clock, err:%d\n", |
| __func__, ret); |
| goto clean_up; |
| } |
| |
| ret = snd_soc_dai_set_fmt(cpu_dai, fmt); |
| if (ret < 0) { |
| pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", |
| __func__, index, ret); |
| goto clk_off; |
| } |
| |
| if (pdata->mi2s_gpio_p[index]) { |
| if ((data_format == AFE_DSD_DATA) && |
| ((index == QUAT_MI2S) || |
| (index == PRIM_MI2S))) { |
| msm_cdc_pinctrl_select_alt_active_state( |
| pdata->mi2s_gpio_p[index]); |
| } else { |
| msm_cdc_pinctrl_select_active_state( |
| pdata->mi2s_gpio_p[index]); |
| } |
| } |
| |
| if (index == QUAT_MI2S || index == PRIM_MI2S) { |
| switch (data_format) { |
| case AFE_DSD_DATA: |
| if (pdata->mi2s_dsd_mode[index]) { |
| val = ioread32( |
| pdata->mi2s_dsd_mode[index]); |
| val = val | 0x1; |
| iowrite32(val, |
| pdata->mi2s_dsd_mode[index]); |
| } |
| break; |
| default: |
| break; |
| } |
| } |
| } |
| |
| ret = qcs405_send_island_vad_config(dai_link->id); |
| if (ret) { |
| pr_err("%s: send island/vad cfg failed, err = %d\n", |
| __func__, ret); |
| return ret; |
| } |
| |
| clk_off: |
| if (ret < 0) |
| msm_mi2s_set_sclk(substream, false); |
| clean_up: |
| if (ret < 0) |
| mi2s_intf_conf[index].ref_cnt--; |
| mutex_unlock(&mi2s_intf_conf[index].lock); |
| err: |
| return ret; |
| } |
| |
| static int msm_mi2s_snd_hw_free(struct snd_pcm_substream *substream) |
| { |
| int i, data_format = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| int index = rtd->cpu_dai->id; |
| struct snd_soc_card *card = rtd->card; |
| struct snd_soc_component *component; |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| data_format = mi2s_rx_cfg[index].data_format; |
| else |
| data_format = mi2s_tx_cfg[index].data_format; |
| |
| pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| substream->name, substream->stream); |
| |
| /* Call csra mute function if data format is DSD, else return */ |
| if (data_format != AFE_DSD_DATA) |
| return 0; |
| |
| for (i = 0; i < card->num_aux_devs; i++) { |
| component = |
| soc_find_component(card->aux_dev[i].codec_of_node, |
| NULL); |
| csra66x0_hw_free_mute(component); |
| } |
| |
| return 0; |
| } |
| |
| static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream) |
| { |
| int ret; |
| int val; |
| int data_format; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| int index = rtd->cpu_dai->id; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| |
| if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| data_format = mi2s_rx_cfg[index].data_format; |
| else |
| data_format = mi2s_tx_cfg[index].data_format; |
| |
| pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| substream->name, substream->stream); |
| if (index < PRIM_MI2S || index >= MI2S_MAX) { |
| pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index); |
| return; |
| } |
| |
| mutex_lock(&mi2s_intf_conf[index].lock); |
| if (--mi2s_intf_conf[index].ref_cnt == 0) { |
| if (pdata->mi2s_gpio_p[index]) |
| msm_cdc_pinctrl_select_sleep_state( |
| pdata->mi2s_gpio_p[index]); |
| |
| if (index == QUAT_MI2S || index == PRIM_MI2S) { |
| switch (data_format) { |
| case AFE_DSD_DATA: |
| if (pdata->mi2s_dsd_mode[index]) { |
| val = ioread32( |
| pdata->mi2s_dsd_mode[index]); |
| val = val & ~1; |
| iowrite32(val, |
| pdata->mi2s_dsd_mode[index]); |
| } |
| break; |
| default: |
| break; |
| } |
| } |
| |
| ret = msm_mi2s_set_sclk(substream, false); |
| if (ret < 0) |
| pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n", |
| __func__, index, ret); |
| } |
| mutex_unlock(&mi2s_intf_conf[index].lock); |
| } |
| |
| static int msm_meta_mi2s_set_sclk(struct snd_pcm_substream *substream, |
| int member_id, bool enable) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int be_id = 0; |
| int port_id = 0; |
| int index = cpu_dai->id; |
| u32 bit_per_sample = 0; |
| |
| switch (member_id) { |
| case PRIM_MI2S: |
| be_id = MSM_BACKEND_DAI_PRI_MI2S_RX; |
| break; |
| case SEC_MI2S: |
| be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX; |
| break; |
| case TERT_MI2S: |
| be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX; |
| break; |
| case QUAT_MI2S: |
| be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX; |
| break; |
| default: |
| dev_err(rtd->card->dev, "%s: Invalid member_id\n", __func__); |
| ret = -EINVAL; |
| goto err; |
| } |
| |
| port_id = msm_get_port_id(be_id); |
| if (port_id < 0) { |
| dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__); |
| ret = port_id; |
| goto err; |
| } |
| |
| if (enable) { |
| bit_per_sample = |
| get_mi2s_bits_per_sample( |
| meta_mi2s_rx_cfg[index].bit_format); |
| mi2s_clk[member_id].clk_freq_in_hz = |
| meta_mi2s_rx_cfg[index].sample_rate * 2 * |
| bit_per_sample; |
| |
| dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, |
| mi2s_clk[member_id].clk_freq_in_hz); |
| } |
| |
| mi2s_clk[member_id].enable = enable; |
| ret = afe_set_lpass_clock_v2(port_id, &mi2s_clk[member_id]); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed for port 0x%x , err:%d\n", |
| __func__, port_id, ret); |
| goto err; |
| } |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_meta_mi2s_snd_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| int i = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int index = cpu_dai->id; |
| int member_port = 0; |
| unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| u16 port_id = 0; |
| |
| dev_dbg(rtd->card->dev, |
| "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", |
| __func__, substream->name, substream->stream, |
| cpu_dai->name, cpu_dai->id); |
| |
| if (index < PRIM_META_MI2S || index >= META_MI2S_MAX) { |
| ret = -EINVAL; |
| dev_err(rtd->card->dev, |
| "%s: CPU DAI id (%d) out of range\n", |
| __func__, cpu_dai->id); |
| goto err; |
| } |
| |
| for (i = 0; i < meta_mi2s_intf_conf[index].num_member_ports; i++) { |
| member_port = meta_mi2s_intf_conf[index].member_port[i]; |
| |
| if (!mi2s_intf_conf[member_port].msm_is_mi2s_master) { |
| mi2s_clk[member_port].clk_id = |
| mi2s_ebit_clk[member_port]; |
| fmt = SND_SOC_DAIFMT_CBM_CFM; |
| } |
| |
| ret = msm_meta_mi2s_set_sclk(substream, member_port, true); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed to enable MI2S clock, err:%d\n", |
| __func__, ret); |
| goto clk_off; |
| } |
| meta_mi2s_intf_conf[index].clk_enable[i] = true; |
| |
| if (i == 0) { |
| port_id = msm_get_port_id(rtd->dai_link->id); |
| ret = afe_set_clk_id(port_id, |
| mi2s_clk[member_port].clk_id); |
| if (ret < 0) |
| pr_err("%s: afe_set_clk_id fail %d\n", |
| __func__, ret); |
| |
| ret = snd_soc_dai_set_fmt(cpu_dai, fmt); |
| if (ret < 0) { |
| pr_err("%s: set fmt cpu dai failed for META_MI2S (%d), err:%d\n", |
| __func__, index, ret); |
| goto clk_off; |
| } |
| } |
| if (pdata->mi2s_gpio_p[member_port]) |
| msm_cdc_pinctrl_select_active_state( |
| pdata->mi2s_gpio_p[member_port]); |
| } |
| return 0; |
| |
| clk_off: |
| for (i = 0; i < meta_mi2s_intf_conf[index].num_member_ports; i++) { |
| member_port = meta_mi2s_intf_conf[index].member_port[i]; |
| if (pdata->mi2s_gpio_p[member_port]) |
| msm_cdc_pinctrl_select_sleep_state( |
| pdata->mi2s_gpio_p[member_port]); |
| |
| if (meta_mi2s_intf_conf[index].clk_enable[i]) { |
| msm_meta_mi2s_set_sclk(substream, member_port, false); |
| meta_mi2s_intf_conf[index].clk_enable[i] = false; |
| } |
| } |
| err: |
| return ret; |
| } |
| |
| static void msm_meta_mi2s_snd_shutdown(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| int i = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| int index = rtd->cpu_dai->id; |
| int member_port = 0; |
| struct snd_soc_card *card = rtd->card; |
| struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| |
| pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| substream->name, substream->stream); |
| if (index < PRIM_MI2S || index >= MI2S_MAX) { |
| pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index); |
| return; |
| } |
| |
| for (i = 0; i < meta_mi2s_intf_conf[index].num_member_ports; i++) { |
| member_port = meta_mi2s_intf_conf[index].member_port[i]; |
| |
| if (pdata->mi2s_gpio_p[member_port]) |
| msm_cdc_pinctrl_select_sleep_state( |
| pdata->mi2s_gpio_p[member_port]); |
| |
| ret = msm_meta_mi2s_set_sclk(substream, member_port, false); |
| if (ret < 0) |
| pr_err("%s:clock disable failed for META MI2S (%d); ret=%d\n", |
| __func__, index, ret); |
| } |
| } |
| |
| static int msm_spdif_set_clk(struct snd_pcm_substream *substream, bool enable) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int port_id = cpu_dai->id; |
| struct afe_clk_set clk_cfg; |
| |
| clk_cfg.clk_set_minor_version = Q6AFE_LPASS_CLK_CONFIG_API_VERSION; |
| clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO; |
| clk_cfg.clk_root = Q6AFE_LPASS_CLK_ROOT_DEFAULT; |
| clk_cfg.enable = enable; |
| |
| /* Set core clock (based on sample rate for RX, fixed for TX) */ |
| switch (port_id) { |
| case AFE_PORT_ID_PRIMARY_SPDIF_RX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_PRI_SPDIF_OUTPUT_CORE; |
| /* rate x 2ch x 2_for_biphase_coding x 32_bits_per_sample */ |
| clk_cfg.clk_freq_in_hz = |
| spdif_rx_cfg[PRIM_SPDIF_RX].sample_rate * 2 * 2 * 32; |
| break; |
| case AFE_PORT_ID_SECONDARY_SPDIF_RX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_SEC_SPDIF_OUTPUT_CORE; |
| clk_cfg.clk_freq_in_hz = |
| spdif_rx_cfg[SEC_SPDIF_RX].sample_rate * 2 * 2 * 32; |
| break; |
| case AFE_PORT_ID_PRIMARY_SPDIF_TX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_PRI_SPDIF_INPUT_CORE; |
| clk_cfg.clk_freq_in_hz = SPDIF_TX_CORE_CLK_163_P84_MHZ; |
| break; |
| case AFE_PORT_ID_SECONDARY_SPDIF_TX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_SEC_SPDIF_INPUT_CORE; |
| clk_cfg.clk_freq_in_hz = SPDIF_TX_CORE_CLK_163_P84_MHZ; |
| break; |
| } |
| |
| ret = afe_set_lpass_clock_v2(port_id, &clk_cfg); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed for port 0x%x , err:%d\n", |
| __func__, port_id, ret); |
| goto err; |
| } |
| |
| /* Set NPL clock for RX in addition */ |
| switch (port_id) { |
| case AFE_PORT_ID_PRIMARY_SPDIF_RX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_PRI_SPDIF_OUTPUT_NPL; |
| |
| ret = afe_set_lpass_clock_v2(port_id, &clk_cfg); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe NPL failed port 0x%x, err:%d\n", |
| __func__, port_id, ret); |
| goto err; |
| } |
| break; |
| case AFE_PORT_ID_SECONDARY_SPDIF_RX: |
| clk_cfg.clk_id = AFE_CLOCK_SET_CLOCK_ID_SEC_SPDIF_OUTPUT_NPL; |
| |
| ret = afe_set_lpass_clock_v2(port_id, &clk_cfg); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe NPL failed for port 0x%x, err:%d\n", |
| __func__, port_id, ret); |
| goto err; |
| } |
| break; |
| } |
| |
| if (enable) { |
| dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, |
| clk_cfg.clk_freq_in_hz); |
| } |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_spdif_snd_startup(struct snd_pcm_substream *substream) |
| { |
| int ret = 0; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| int port_id = cpu_dai->id; |
| |
| dev_dbg(rtd->card->dev, |
| "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", |
| __func__, substream->name, substream->stream, |
| cpu_dai->name, cpu_dai->id); |
| |
| if (port_id < AFE_PORT_ID_PRIMARY_SPDIF_RX || |
| port_id > AFE_PORT_ID_SECONDARY_SPDIF_TX) { |
| ret = -EINVAL; |
| dev_err(rtd->card->dev, |
| "%s: CPU DAI id (%d) out of range\n", |
| __func__, cpu_dai->id); |
| goto err; |
| } |
| |
| ret = msm_spdif_set_clk(substream, true); |
| if (ret < 0) { |
| dev_err(rtd->card->dev, |
| "%s: afe lpass clock failed to enable (%d), err:%d\n", |
| __func__, port_id, ret); |
| } |
| err: |
| return ret; |
| } |
| |
| static void msm_spdif_snd_shutdown(struct snd_pcm_substream *substream) |
| { |
| int ret; |
| struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| int port_id = rtd->cpu_dai->id; |
| |
| pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| substream->name, substream->stream); |
| if (port_id < AFE_PORT_ID_PRIMARY_SPDIF_RX || |
| port_id > AFE_PORT_ID_SECONDARY_SPDIF_TX) { |
| pr_err("%s:invalid SPDIF DAI(%d)\n", __func__, port_id); |
| return; |
| } |
| |
| ret = msm_spdif_set_clk(substream, false); |
| if (ret < 0) |
| pr_err("%s:clock disable failed for SPDIF (%d); ret=%d\n", |
| __func__, port_id, ret); |
| } |
| |
| static struct snd_soc_ops msm_mi2s_be_ops = { |
| .startup = msm_mi2s_snd_startup, |
| .hw_free = msm_mi2s_snd_hw_free, |
| .shutdown = msm_mi2s_snd_shutdown, |
| }; |
| |
| static struct snd_soc_ops msm_meta_mi2s_be_ops = { |
| .startup = msm_meta_mi2s_snd_startup, |
| .shutdown = msm_meta_mi2s_snd_shutdown, |
| }; |
| |
| static struct snd_soc_ops msm_auxpcm_be_ops = { |
| .startup = msm_snd_auxpcm_startup, |
| }; |
| static struct snd_soc_ops msm_cdc_dma_be_ops = { |
| .startup = msm_snd_cdc_dma_startup, |
| .hw_params = msm_snd_cdc_dma_hw_params, |
| }; |
| |
| static struct snd_soc_ops msm_be_ops = { |
| .hw_params = msm_snd_hw_params, |
| }; |
| |
| static struct snd_soc_ops msm_wcn_ops = { |
| .hw_params = msm_wcn_hw_params, |
| }; |
| |
| static struct snd_soc_ops msm_spdif_be_ops = { |
| .startup = msm_spdif_snd_startup, |
| .shutdown = msm_spdif_snd_shutdown, |
| }; |
| |
| |
| /* Digital audio interface glue - connects codec <---> CPU */ |
| static struct snd_soc_dai_link msm_common_dai_links[] = { |
| /* FrontEnd DAI Links */ |
| { |
| .name = MSM_DAILINK_NAME(Media1), |
| .stream_name = "MultiMedia1", |
| .cpu_dai_name = "MultiMedia1", |
| .platform_name = "msm-pcm-dsp.0", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_PREPARE, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA1 |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Media2), |
| .stream_name = "MultiMedia2", |
| .cpu_dai_name = "MultiMedia2", |
| .platform_name = "msm-pcm-dsp.0", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA2, |
| }, |
| { |
| .name = "VoiceMMode1", |
| .stream_name = "VoiceMMode1", |
| .cpu_dai_name = "VoiceMMode1", |
| .platform_name = "msm-pcm-voice", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_VOICEMMODE1, |
| }, |
| { |
| .name = "MSM VoIP", |
| .stream_name = "VoIP", |
| .cpu_dai_name = "VoIP", |
| .platform_name = "msm-voip-dsp", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_VOIP, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(ULL), |
| .stream_name = "MultiMedia3", |
| .cpu_dai_name = "MultiMedia3", |
| .platform_name = "msm-pcm-dsp.2", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_PREPARE, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA3, |
| }, |
| /* Hostless PCM purpose */ |
| { |
| .name = "SLIMBUS_0 Hostless", |
| .stream_name = "SLIMBUS_0 Hostless", |
| .cpu_dai_name = "SLIMBUS0_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dailink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "MSM AFE-PCM RX", |
| .stream_name = "AFE-PROXY RX", |
| .cpu_dai_name = "msm-dai-q6-dev.241", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .platform_name = "msm-pcm-afe", |
| .dpcm_playback = 1, |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = "MSM AFE-PCM TX", |
| .stream_name = "AFE-PROXY TX", |
| .cpu_dai_name = "msm-dai-q6-dev.240", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .platform_name = "msm-pcm-afe", |
| .dpcm_capture = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress1), |
| .stream_name = "Compress1", |
| .cpu_dai_name = "MultiMedia4", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA4, |
| }, |
| { |
| .name = "AUXPCM Hostless", |
| .stream_name = "AUXPCM Hostless", |
| .cpu_dai_name = "AUXPCM_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "SLIMBUS_1 Hostless", |
| .stream_name = "SLIMBUS_1 Hostless", |
| .cpu_dai_name = "SLIMBUS1_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dailink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "SLIMBUS_3 Hostless", |
| .stream_name = "SLIMBUS_3 Hostless", |
| .cpu_dai_name = "SLIMBUS3_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dailink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "SLIMBUS_4 Hostless", |
| .stream_name = "SLIMBUS_4 Hostless", |
| .cpu_dai_name = "SLIMBUS4_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dailink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = MSM_DAILINK_NAME(LowLatency), |
| .stream_name = "MultiMedia5", |
| .cpu_dai_name = "MultiMedia5", |
| .platform_name = "msm-pcm-dsp.1", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_PREPARE, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA5, |
| .ops = &msm_fe_qos_ops, |
| }, |
| { |
| .name = "Listen 1 Audio Service", |
| .stream_name = "Listen 1 Audio Service", |
| .cpu_dai_name = "LSM1", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM1, |
| }, |
| /* Multiple Tunnel instances */ |
| { |
| .name = MSM_DAILINK_NAME(Compress2), |
| .stream_name = "Compress2", |
| .cpu_dai_name = "MultiMedia7", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA7, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(MultiMedia10), |
| .stream_name = "MultiMedia10", |
| .cpu_dai_name = "MultiMedia10", |
| .platform_name = "msm-pcm-dsp.1", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA10, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(ULL_NOIRQ), |
| .stream_name = "MM_NOIRQ", |
| .cpu_dai_name = "MultiMedia8", |
| .platform_name = "msm-pcm-dsp-noirq", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA8, |
| .ops = &msm_fe_qos_ops, |
| }, |
| /* HDMI Hostless */ |
| { |
| .name = "HDMI_RX_HOSTLESS", |
| .stream_name = "HDMI_RX_HOSTLESS", |
| .cpu_dai_name = "HDMI_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "VoiceMMode2", |
| .stream_name = "VoiceMMode2", |
| .cpu_dai_name = "VoiceMMode2", |
| .platform_name = "msm-pcm-voice", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_VOICEMMODE2, |
| }, |
| /* LSM FE */ |
| { |
| .name = "Listen 2 Audio Service", |
| .stream_name = "Listen 2 Audio Service", |
| .cpu_dai_name = "LSM2", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM2, |
| }, |
| { |
| .name = "Listen 3 Audio Service", |
| .stream_name = "Listen 3 Audio Service", |
| .cpu_dai_name = "LSM3", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM3, |
| }, |
| { |
| .name = "Listen 4 Audio Service", |
| .stream_name = "Listen 4 Audio Service", |
| .cpu_dai_name = "LSM4", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM4, |
| }, |
| { |
| .name = "Listen 5 Audio Service", |
| .stream_name = "Listen 5 Audio Service", |
| .cpu_dai_name = "LSM5", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM5, |
| }, |
| { |
| .name = "Listen 6 Audio Service", |
| .stream_name = "Listen 6 Audio Service", |
| .cpu_dai_name = "LSM6", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM6, |
| }, |
| { |
| .name = "Listen 7 Audio Service", |
| .stream_name = "Listen 7 Audio Service", |
| .cpu_dai_name = "LSM7", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM7, |
| }, |
| { |
| .name = "Listen 8 Audio Service", |
| .stream_name = "Listen 8 Audio Service", |
| .cpu_dai_name = "LSM8", |
| .platform_name = "msm-lsm-client", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = { SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST }, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .id = MSM_FRONTEND_DAI_LSM8, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Media9), |
| .stream_name = "MultiMedia9", |
| .cpu_dai_name = "MultiMedia9", |
| .platform_name = "msm-pcm-dsp.0", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA9, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress4), |
| .stream_name = "Compress4", |
| .cpu_dai_name = "MultiMedia11", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA11, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress5), |
| .stream_name = "Compress5", |
| .cpu_dai_name = "MultiMedia12", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA12, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress6), |
| .stream_name = "Compress6", |
| .cpu_dai_name = "MultiMedia13", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA13, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress7), |
| .stream_name = "Compress7", |
| .cpu_dai_name = "MultiMedia14", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA14, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compress8), |
| .stream_name = "Compress8", |
| .cpu_dai_name = "MultiMedia15", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA15, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(ULL_NOIRQ_2), |
| .stream_name = "MM_NOIRQ_2", |
| .cpu_dai_name = "MultiMedia16", |
| .platform_name = "msm-pcm-dsp-noirq", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dainlink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA16, |
| }, |
| { |
| .name = "SLIMBUS_8 Hostless", |
| .stream_name = "SLIMBUS8_HOSTLESS Capture", |
| .cpu_dai_name = "SLIMBUS8_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| /* Hostless PCM purpose */ |
| { |
| .name = "CDC_DMA Hostless", |
| .stream_name = "CDC_DMA Hostless", |
| .cpu_dai_name = "CDC_DMA_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| /* this dailink has playback support */ |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = { |
| { |
| .name = LPASS_BE_WSA_CDC_DMA_TX_0, |
| .stream_name = "WSA CDC DMA0 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45057", |
| .platform_name = "msm-pcm-hostless", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "wsa_macro_vifeedback", |
| .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = { |
| { |
| .name = MSM_DAILINK_NAME(ASM Loopback), |
| .stream_name = "MultiMedia6", |
| .cpu_dai_name = "MultiMedia6", |
| .platform_name = "msm-pcm-loopback", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_suspend = 1, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA6, |
| }, |
| { |
| .name = "USB Audio Hostless", |
| .stream_name = "USB Audio Hostless", |
| .cpu_dai_name = "USBAUDIO_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = "SLIMBUS_7 Hostless", |
| .stream_name = "SLIMBUS_7 Hostless", |
| .cpu_dai_name = "SLIMBUS7_HOSTLESS", |
| .platform_name = "msm-pcm-hostless", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .no_host_mode = SND_SOC_DAI_LINK_NO_HOST, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compr Capture2), |
| .stream_name = "Compr Capture2", |
| .cpu_dai_name = "MultiMedia18", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA18, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Transcode Loopback Playback), |
| .stream_name = "Transcode Loopback Playback", |
| .cpu_dai_name = "MultiMedia26", |
| .platform_name = "msm-transcode-loopback", |
| .dynamic = 1, |
| .dpcm_playback = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| /* this dailink has playback support */ |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA26, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Transcode Loopback Capture), |
| .stream_name = "Transcode Loopback Capture", |
| .cpu_dai_name = "MultiMedia27", |
| .platform_name = "msm-transcode-loopback", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA27, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compr Capture3), |
| .stream_name = "Compr Capture3", |
| .cpu_dai_name = "MultiMedia19", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA19, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compr Capture4), |
| .stream_name = "Compr Capture4", |
| .cpu_dai_name = "MultiMedia28", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA28, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compr Capture5), |
| .stream_name = "Compr Capture5", |
| .cpu_dai_name = "MultiMedia29", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA29, |
| }, |
| { |
| .name = MSM_DAILINK_NAME(Compr Capture6), |
| .stream_name = "Compr Capture6", |
| .cpu_dai_name = "MultiMedia30", |
| .platform_name = "msm-compress-dsp", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS, |
| .dpcm_capture = 1, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA30, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link ext_hdmi_be_dai_link[] = { |
| /* HDMI RX BACK END DAI Link */ |
| { |
| .name = LPASS_BE_HDMI_MS, |
| .stream_name = "HDMI MS Playback", |
| .cpu_dai_name = "msm-dai-q6-hdmi.24578", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-ext-disp-audio-codec-rx", |
| .codec_dai_name = "msm_hdmi_ms_audio_codec_rx_dai", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_HDMI_RX_MS, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_common_be_dai_links[] = { |
| /* Backend AFE DAI Links */ |
| { |
| .name = LPASS_BE_AFE_PCM_RX, |
| .stream_name = "AFE Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.224", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_AFE_PCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_AFE_PCM_TX, |
| .stream_name = "AFE Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.225", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_AFE_PCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| }, |
| /* Incall Record Uplink BACK END DAI Link */ |
| { |
| .name = LPASS_BE_INCALL_RECORD_TX, |
| .stream_name = "Voice Uplink Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.32772", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_INCALL_RECORD_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| }, |
| /* Incall Record Downlink BACK END DAI Link */ |
| { |
| .name = LPASS_BE_INCALL_RECORD_RX, |
| .stream_name = "Voice Downlink Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.32771", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_INCALL_RECORD_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| }, |
| /* Incall Music BACK END DAI Link */ |
| { |
| .name = LPASS_BE_VOICE_PLAYBACK_TX, |
| .stream_name = "Voice Farend Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.32773", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| /* Incall Music 2 BACK END DAI Link */ |
| { |
| .name = LPASS_BE_VOICE2_PLAYBACK_TX, |
| .stream_name = "Voice2 Farend Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.32770", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_USB_AUDIO_RX, |
| .stream_name = "USB Audio Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.28672", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_USB_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_USB_AUDIO_TX, |
| .stream_name = "USB Audio Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.28673", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_USB_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_PRI_TDM_RX_0, |
| .stream_name = "Primary TDM0 Playback", |
| .cpu_dai_name = "msm-dai-q6-tdm.36864", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_PRI_TDM_RX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_PRI_TDM_TX_0, |
| .stream_name = "Primary TDM0 Capture", |
| .cpu_dai_name = "msm-dai-q6-tdm.36865", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_PRI_TDM_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_TDM_RX_0, |
| .stream_name = "Secondary TDM0 Playback", |
| .cpu_dai_name = "msm-dai-q6-tdm.36880", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SEC_TDM_RX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_TDM_TX_0, |
| .stream_name = "Secondary TDM0 Capture", |
| .cpu_dai_name = "msm-dai-q6-tdm.36881", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SEC_TDM_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_TERT_TDM_RX_0, |
| .stream_name = "Tertiary TDM0 Playback", |
| .cpu_dai_name = "msm-dai-q6-tdm.36896", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_TERT_TDM_RX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_TERT_TDM_TX_0, |
| .stream_name = "Tertiary TDM0 Capture", |
| .cpu_dai_name = "msm-dai-q6-tdm.36897", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_TERT_TDM_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUAT_TDM_RX_0, |
| .stream_name = "Quaternary TDM0 Playback", |
| .cpu_dai_name = "msm-dai-q6-tdm.36912", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0, |
| .be_hw_params_fixup = msm_tdm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_QUAT_TDM_TX_0, |
| .stream_name = "Quaternary TDM0 Capture", |
| .cpu_dai_name = "msm-dai-q6-tdm.36913", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUIN_TDM_RX_0, |
| .stream_name = "Quinary TDM0 Playback", |
| .cpu_dai_name = "msm-dai-q6-tdm.36928", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0, |
| .be_hw_params_fixup = msm_tdm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_QUIN_TDM_TX_0, |
| .stream_name = "Quinary TDM0 Capture", |
| .cpu_dai_name = "msm-dai-q6-tdm.36929", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &qcs405_tdm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_tasha_be_dai_links[] = { |
| { |
| .name = LPASS_BE_SLIMBUS_0_RX, |
| .stream_name = "Slimbus Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16384", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_mix_rx1", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_0_RX, |
| .init = &msm_audrx_init, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| .ops = &msm_be_ops, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_0_TX, |
| .stream_name = "Slimbus Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16385", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_tx1", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_0_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_be_ops, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_1_RX, |
| .stream_name = "Slimbus1 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16386", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_mix_rx1", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_1_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_1_TX, |
| .stream_name = "Slimbus1 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16387", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_tx3", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_1_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_2_RX, |
| .stream_name = "Slimbus2 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16388", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_rx2", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_2_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_3_RX, |
| .stream_name = "Slimbus3 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16390", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_mix_rx1", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_3_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_3_TX, |
| .stream_name = "Slimbus3 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16391", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_tx1", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_3_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_4_RX, |
| .stream_name = "Slimbus4 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16392", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_mix_rx1", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_4_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_5_RX, |
| .stream_name = "Slimbus5 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16394", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_rx3", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_5_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_6_RX, |
| .stream_name = "Slimbus6 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16396", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_rx4", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_6_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| /* Slimbus VI Recording */ |
| { |
| .name = LPASS_BE_SLIMBUS_TX_VI, |
| .stream_name = "Slimbus4 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16393", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "tasha_codec", |
| .codec_dai_name = "tasha_vifeedback", |
| .id = MSM_BACKEND_DAI_SLIMBUS_4_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_be_ops, |
| .ignore_suspend = 1, |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_wcn_be_dai_links[] = { |
| { |
| .name = LPASS_BE_SLIMBUS_7_RX, |
| .stream_name = "Slimbus7 Playback", |
| .cpu_dai_name = "msm-dai-q6-dev.16398", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "btfmslim_slave", |
| /* BT codec driver determines capabilities based on |
| * dai name, bt codecdai name should always contains |
| * supported usecase information |
| */ |
| .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_7_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_wcn_ops, |
| /* dai link has playback support */ |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_7_TX, |
| .stream_name = "Slimbus7 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16399", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "btfmslim_slave", |
| .codec_dai_name = "btfm_bt_sco_slim_tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_7_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_wcn_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_8_TX, |
| .stream_name = "Slimbus8 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16401", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "btfmslim_slave", |
| .codec_dai_name = "btfm_fm_slim_tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_8_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .init = &msm_wcn_init, |
| .ops = &msm_wcn_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SLIMBUS_9_TX, |
| .stream_name = "Slimbus9 Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.16403", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "btfmslim_slave", |
| .codec_dai_name = "btfm_bt_split_a2dp_slim_tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SLIMBUS_9_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_wcn_ops, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = { |
| { |
| .name = LPASS_BE_PRI_MI2S_RX, |
| .stream_name = "Primary MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-mi2s.0", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_PRI_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_PRI_MI2S_TX, |
| .stream_name = "Primary MI2S Capture", |
| .cpu_dai_name = "msm-dai-q6-mi2s.0", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_PRI_MI2S_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_MI2S_RX, |
| .stream_name = "Secondary MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-mi2s.1", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_MI2S_TX, |
| .stream_name = "Secondary MI2S Capture", |
| .cpu_dai_name = "msm-dai-q6-mi2s.1", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_TERT_MI2S_RX, |
| .stream_name = "Tertiary MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-mi2s.2", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_TERT_MI2S_TX, |
| .stream_name = "Tertiary MI2S Capture", |
| .cpu_dai_name = "msm-dai-q6-mi2s.2", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUAT_MI2S_RX, |
| .stream_name = "Quaternary MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-mi2s.3", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_QUAT_MI2S_TX, |
| .stream_name = "Quaternary MI2S Capture", |
| .cpu_dai_name = "msm-dai-q6-mi2s.3", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUIN_MI2S_RX, |
| .stream_name = "Quinary MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-mi2s.4", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_QUIN_MI2S_TX, |
| .stream_name = "Quinary MI2S Capture", |
| .cpu_dai_name = "msm-dai-q6-mi2s.4", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_mi2s_be_ops, |
| .ignore_suspend = 1, |
| }, |
| |
| }; |
| |
| static struct snd_soc_dai_link msm_meta_mi2s_be_dai_links[] = { |
| { |
| .name = LPASS_BE_PRI_META_MI2S_RX, |
| .stream_name = "Primary META MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-meta-mi2s.4864", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_PRI_META_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_meta_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_META_MI2S_RX, |
| .stream_name = "Secondary META MI2S Playback", |
| .cpu_dai_name = "msm-dai-q6-meta-mi2s.4866", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SEC_META_MI2S_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_meta_mi2s_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = { |
| /* Primary AUX PCM Backend DAI Links */ |
| { |
| .name = LPASS_BE_AUXPCM_RX, |
| .stream_name = "AUX PCM Playback", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.1", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_AUXPCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_AUXPCM_TX, |
| .stream_name = "AUX PCM Capture", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.1", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_AUXPCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| /* Secondary AUX PCM Backend DAI Links */ |
| { |
| .name = LPASS_BE_SEC_AUXPCM_RX, |
| .stream_name = "Sec AUX PCM Playback", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.2", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_AUXPCM_TX, |
| .stream_name = "Sec AUX PCM Capture", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.2", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| /* Tertiary AUX PCM Backend DAI Links */ |
| { |
| .name = LPASS_BE_TERT_AUXPCM_RX, |
| .stream_name = "Tert AUX PCM Playback", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.3", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_TERT_AUXPCM_TX, |
| .stream_name = "Tert AUX PCM Capture", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.3", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| /* Quaternary AUX PCM Backend DAI Links */ |
| { |
| .name = LPASS_BE_QUAT_AUXPCM_RX, |
| .stream_name = "Quat AUX PCM Playback", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.4", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUAT_AUXPCM_TX, |
| .stream_name = "Quat AUX PCM Capture", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.4", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| /* Quinary AUX PCM Backend DAI Links */ |
| { |
| .name = LPASS_BE_QUIN_AUXPCM_RX, |
| .stream_name = "Quin AUX PCM Playback", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.5", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_QUIN_AUXPCM_TX, |
| .stream_name = "Quin AUX PCM Capture", |
| .cpu_dai_name = "msm-dai-q6-auxpcm.5", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_auxpcm_be_ops, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = { |
| /* WSA CDC DMA Backend DAI Links */ |
| { |
| .name = LPASS_BE_WSA_CDC_DMA_RX_0, |
| .stream_name = "WSA CDC DMA0 Playback", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45056", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "wsa_macro_rx1", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .init = &msm_wsa_cdc_dma_init, |
| .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| { |
| .name = LPASS_BE_WSA_CDC_DMA_RX_1, |
| .stream_name = "WSA CDC DMA1 Playback", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45058", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "wsa_macro_rx_mix", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| { |
| .name = LPASS_BE_WSA_CDC_DMA_TX_1, |
| .stream_name = "WSA CDC DMA1 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45059", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "wsa_macro_echo", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = { |
| { |
| .name = LPASS_BE_VA_CDC_DMA_TX_0, |
| .stream_name = "VA CDC DMA0 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45089", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "va_macro_tx1", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .init = &msm_va_cdc_dma_init, |
| .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| { |
| .name = LPASS_BE_VA_CDC_DMA_TX_1, |
| .stream_name = "VA CDC DMA1 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45091", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "va_macro_tx2", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_spdif_be_dai_links[] = { |
| { |
| .name = LPASS_BE_PRI_SPDIF_RX, |
| .stream_name = "Primary SPDIF Playback", |
| .cpu_dai_name = "msm-dai-q6-spdif.20480", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_PRI_SPDIF_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_spdif_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_PRI_SPDIF_TX, |
| .stream_name = "Primary SPDIF Capture", |
| .cpu_dai_name = "msm-dai-q6-spdif.20481", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_PRI_SPDIF_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_spdif_be_ops, |
| .ignore_suspend = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_SPDIF_RX, |
| .stream_name = "Secondary SPDIF Playback", |
| .cpu_dai_name = "msm-dai-q6-spdif.20482", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-rx", |
| .no_pcm = 1, |
| .dpcm_playback = 1, |
| .id = MSM_BACKEND_DAI_SEC_SPDIF_RX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_spdif_be_ops, |
| .ignore_suspend = 1, |
| .ignore_pmdown_time = 1, |
| }, |
| { |
| .name = LPASS_BE_SEC_SPDIF_TX, |
| .stream_name = "Secondary SPDIF Capture", |
| .cpu_dai_name = "msm-dai-q6-spdif.20483", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_SEC_SPDIF_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ops = &msm_spdif_be_ops, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = { |
| { |
| .name = LPASS_BE_AFE_LOOPBACK_TX, |
| .stream_name = "AFE Loopback Capture", |
| .cpu_dai_name = "msm-dai-q6-dev.24577", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "msm-stub-codec.1", |
| .codec_dai_name = "msm-stub-tx", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_pmdown_time = 1, |
| .ignore_suspend = 1, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_qcs405_dai_links[ |
| ARRAY_SIZE(msm_common_dai_links) + |
| ARRAY_SIZE(msm_common_misc_fe_dai_links) + |
| ARRAY_SIZE(msm_common_be_dai_links) + |
| ARRAY_SIZE(msm_tasha_be_dai_links) + |
| ARRAY_SIZE(msm_wcn_be_dai_links) + |
| ARRAY_SIZE(msm_mi2s_be_dai_links) + |
| ARRAY_SIZE(msm_meta_mi2s_be_dai_links) + |
| ARRAY_SIZE(msm_auxpcm_be_dai_links) + |
| ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) + |
| ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) + |
| ARRAY_SIZE(msm_bolero_fe_dai_links) + |
| ARRAY_SIZE(msm_spdif_be_dai_links) + |
| ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) + |
| ARRAY_SIZE(ext_hdmi_be_dai_link)]; |
| |
| static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card) |
| { |
| int ret = 0; |
| |
| ret = audio_notifier_register("qcs405", AUDIO_NOTIFIER_ADSP_DOMAIN, |
| &service_nb); |
| if (ret < 0) |
| pr_err("%s: Audio notifier register failed ret = %d\n", |
| __func__, ret); |
| |
| return ret; |
| } |
| |
| |
| static int msm_snd_vad_cfg_put(struct snd_kcontrol *kcontrol, |
| struct snd_ctl_elem_value *ucontrol) |
| { |
| int ret = 0; |
| int port_id; |
| uint32_t vad_enable = ucontrol->value.integer.value[0]; |
| uint32_t preroll_config = ucontrol->value.integer.value[1]; |
| uint32_t vad_intf = ucontrol->value.integer.value[2]; |
| |
| if ((preroll_config < 0) || (preroll_config > 1000) || |
| (vad_enable < 0) || (vad_enable > 1) || |
| (vad_intf > MSM_BACKEND_DAI_MAX)) { |
| pr_err("%s: Invalid arguments\n", __func__); |
| ret = -EINVAL; |
| goto done; |
| } |
| |
| pr_debug("%s: vad_enable=%d preroll_config=%d vad_intf=%d\n", __func__, |
| vad_enable, preroll_config, vad_intf); |
| |
| ret = msm_island_vad_get_portid_from_beid(vad_intf, &port_id); |
| if (ret) { |
| pr_err("%s: Invalid vad interface\n", __func__); |
| goto done; |
| } |
| |
| afe_set_vad_cfg(vad_enable, preroll_config, port_id); |
| |
| done: |
| return ret; |
| } |
| |
| static int msm_snd_card_codec_late_probe(struct snd_soc_card *card) |
| { |
| int ret = 0; |
| uint32_t tasha_codec = 0; |
| |
| ret = afe_cal_init_hwdep(card); |
| if (ret) { |
| dev_err(card->dev, "afe cal hwdep init failed (%d)\n", ret); |
| ret = 0; |
| } |
| |
| /* tasha late probe when it is present */ |
| ret = of_property_read_u32(card->dev->of_node, "qcom,tasha-codec", |
| &tasha_codec); |
| if (ret) { |
| dev_err(card->dev, "%s: No DT match tasha codec\n", __func__); |
| ret = 0; |
| } else { |
| if (tasha_codec) { |
| ret = msm_snd_card_tasha_late_probe(card); |
| if (ret) |
| dev_err(card->dev, "%s: tasha late probe err\n", |
| __func__); |
| } |
| } |
| return ret; |
| } |
| |
| struct snd_soc_card snd_soc_card_qcs405_msm = { |
| .name = "qcs405-snd-card", |
| .controls = msm_snd_controls, |
| .num_controls = ARRAY_SIZE(msm_snd_controls), |
| .late_probe = msm_snd_card_codec_late_probe, |
| }; |
| |
| static int msm_populate_dai_link_component_of_node( |
| struct snd_soc_card *card) |
| { |
| int i, index, ret = 0; |
| struct device *cdev = card->dev; |
| struct snd_soc_dai_link *dai_link = card->dai_link; |
| struct device_node *np; |
| |
| if (!cdev) { |
| pr_err("%s: Sound card device memory NULL\n", __func__); |
| return -ENODEV; |
| } |
| |
| for (i = 0; i < card->num_links; i++) { |
| if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node) |
| continue; |
| |
| /* populate platform_of_node for snd card dai links */ |
| if (dai_link[i].platform_name && |
| !dai_link[i].platform_of_node) { |
| index = of_property_match_string(cdev->of_node, |
| "asoc-platform-names", |
| dai_link[i].platform_name); |
| if (index < 0) { |
| pr_err("%s: No match found for platform name: %s\n", |
| __func__, dai_link[i].platform_name); |
| ret = index; |
| goto err; |
| } |
| np = of_parse_phandle(cdev->of_node, "asoc-platform", |
| index); |
| if (!np) { |
| pr_err("%s: retrieving phandle for platform %s, index %d failed\n", |
| __func__, dai_link[i].platform_name, |
| index); |
| ret = -ENODEV; |
| goto err; |
| } |
| dai_link[i].platform_of_node = np; |
| dai_link[i].platform_name = NULL; |
| } |
| |
| /* populate cpu_of_node for snd card dai links */ |
| if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) { |
| index = of_property_match_string(cdev->of_node, |
| "asoc-cpu-names", |
| dai_link[i].cpu_dai_name); |
| if (index >= 0) { |
| np = of_parse_phandle(cdev->of_node, "asoc-cpu", |
| index); |
| if (!np) { |
| pr_err("%s: retrieving phandle for cpu dai %s failed\n", |
| __func__, |
| dai_link[i].cpu_dai_name); |
| ret = -ENODEV; |
| goto err; |
| } |
| dai_link[i].cpu_of_node = np; |
| dai_link[i].cpu_dai_name = NULL; |
| } |
| } |
| |
| /* populate codec_of_node for snd card dai links */ |
| if (dai_link[i].codec_name && !dai_link[i].codec_of_node) { |
| index = of_property_match_string(cdev->of_node, |
| "asoc-codec-names", |
| dai_link[i].codec_name); |
| if (index < 0) |
| continue; |
| np = of_parse_phandle(cdev->of_node, "asoc-codec", |
| index); |
| if (!np) { |
| pr_err("%s: retrieving phandle for codec %s failed\n", |
| __func__, dai_link[i].codec_name); |
| ret = -ENODEV; |
| goto err; |
| } |
| dai_link[i].codec_of_node = np; |
| dai_link[i].codec_name = NULL; |
| } |
| } |
| |
| err: |
| return ret; |
| } |
| |
| static struct snd_soc_dai_link msm_stub_fe_dai_links[] = { |
| |
| /* FrontEnd DAI Links */ |
| { |
| .name = "MSMSTUB Media1", |
| .stream_name = "MultiMedia1", |
| .cpu_dai_name = "MultiMedia1", |
| .platform_name = "msm-pcm-dsp.0", |
| .dynamic = 1, |
| .async_ops = ASYNC_DPCM_SND_SOC_PREPARE, |
| .dpcm_playback = 1, |
| .dpcm_capture = 1, |
| .trigger = {SND_SOC_DPCM_TRIGGER_POST, |
| SND_SOC_DPCM_TRIGGER_POST}, |
| .codec_dai_name = "snd-soc-dummy-dai", |
| .codec_name = "snd-soc-dummy", |
| .ignore_suspend = 1, |
| /* this dainlink has playback support */ |
| .ignore_pmdown_time = 1, |
| .id = MSM_FRONTEND_DAI_MULTIMEDIA1 |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_stub_be_dai_links[] = { |
| |
| /* Backend DAI Links */ |
| { |
| .name = LPASS_BE_VA_CDC_DMA_TX_0, |
| .stream_name = "VA CDC DMA0 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45089", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "va_macro_tx1", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .init = &msm_va_cdc_dma_init, |
| .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| { |
| .name = LPASS_BE_VA_CDC_DMA_TX_1, |
| .stream_name = "VA CDC DMA1 Capture", |
| .cpu_dai_name = "msm-dai-cdc-dma-dev.45091", |
| .platform_name = "msm-pcm-routing", |
| .codec_name = "bolero_codec", |
| .codec_dai_name = "va_macro_tx2", |
| .no_pcm = 1, |
| .dpcm_capture = 1, |
| .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1, |
| .be_hw_params_fixup = msm_be_hw_params_fixup, |
| .ignore_suspend = 1, |
| .ops = &msm_cdc_dma_be_ops, |
| }, |
| }; |
| |
| static struct snd_soc_dai_link msm_stub_dai_links[ |
| ARRAY_SIZE(msm_stub_fe_dai_links) + |
| ARRAY_SIZE(msm_stub_be_dai_links)]; |
| |
| struct snd_soc_card snd_soc_card_stub_msm = { |
| .name = "qcs405-stub-snd-card", |
| }; |
| |
| static const struct of_device_id qcs405_asoc_machine_of_match[] = { |
| { .compatible = "qcom,qcs405-asoc-snd", |
| .data = "codec"}, |
| { .compatible = "qcom,qcs405-asoc-snd-stub", |
| .data = "stub_codec"}, |
| {}, |
| }; |
| |
| static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev) |
| { |
| struct snd_soc_card *card = NULL; |
| struct snd_soc_dai_link *dailink; |
| int total_links = 0; |
| uint32_t tasha_codec = 0, auxpcm_audio_intf = 0; |
| uint32_t va_bolero_codec = 0, wsa_bolero_codec = 0, mi2s_audio_intf = 0; |
| uint32_t spdif_audio_intf = 0, wcn_audio_intf = 0; |
| uint32_t afe_loopback_intf = 0, meta_mi2s_intf = 0; |
| uint32_t ext_disp_hdmi_rx = 0; |
| const struct of_device_id *match; |
| char __iomem *spdif_cfg, *spdif_pin_ctl; |
| int rc = 0; |
| |
| match = of_match_node(qcs405_asoc_machine_of_match, dev->of_node); |
| if (!match) { |
| dev_err(dev, "%s: No DT match found for sound card\n", |
| __func__); |
| return NULL; |
| } |
| |
| if (!strcmp(match->data, "codec")) { |
| card = &snd_soc_card_qcs405_msm; |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_common_dai_links, |
| sizeof(msm_common_dai_links)); |
| |
| total_links += ARRAY_SIZE(msm_common_dai_links); |
| |
| rc = of_property_read_u32(dev->of_node, "qcom,wsa-bolero-codec", |
| &wsa_bolero_codec); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match WSA Macro codec\n", |
| __func__); |
| } else { |
| if (wsa_bolero_codec) { |
| dev_dbg(dev, "%s(): WSA macro in bolero codec present\n", |
| __func__); |
| |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_bolero_fe_dai_links, |
| sizeof(msm_bolero_fe_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_bolero_fe_dai_links); |
| } |
| } |
| |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_common_misc_fe_dai_links, |
| sizeof(msm_common_misc_fe_dai_links)); |
| |
| total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links); |
| |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_common_be_dai_links, |
| sizeof(msm_common_be_dai_links)); |
| |
| total_links += ARRAY_SIZE(msm_common_be_dai_links); |
| |
| rc = of_property_read_u32(dev->of_node, "qcom,tasha-codec", |
| &tasha_codec); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match tasha codec\n", |
| __func__); |
| } else { |
| if (tasha_codec) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_tasha_be_dai_links, |
| sizeof(msm_tasha_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_tasha_be_dai_links); |
| } |
| } |
| |
| rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec", |
| &va_bolero_codec); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match VA Macro codec\n", |
| __func__); |
| } else { |
| if (va_bolero_codec) { |
| dev_dbg(dev, "%s(): VA macro in bolero codec present\n", |
| __func__); |
| |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_va_cdc_dma_be_dai_links, |
| sizeof(msm_va_cdc_dma_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_va_cdc_dma_be_dai_links); |
| } |
| } |
| |
| if (wsa_bolero_codec) { |
| dev_dbg(dev, "%s(): WSAmacro in bolero codec present\n", |
| __func__); |
| |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_wsa_cdc_dma_be_dai_links, |
| sizeof(msm_wsa_cdc_dma_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links); |
| } |
| |
| rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf", |
| &mi2s_audio_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match MI2S audio interface\n", |
| __func__); |
| } else { |
| if (mi2s_audio_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_mi2s_be_dai_links, |
| sizeof(msm_mi2s_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_mi2s_be_dai_links); |
| } |
| } |
| |
| rc = of_property_read_u32(dev->of_node, "qcom,meta-mi2s-intf", |
| &meta_mi2s_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match META-MI2S interface\n", |
| __func__); |
| } else { |
| if (meta_mi2s_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_meta_mi2s_be_dai_links, |
| sizeof(msm_meta_mi2s_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_meta_mi2s_be_dai_links); |
| } |
| } |
| |
| rc = of_property_read_u32(dev->of_node, |
| "qcom,auxpcm-audio-intf", |
| &auxpcm_audio_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match Aux PCM interface\n", |
| __func__); |
| } else { |
| if (auxpcm_audio_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_auxpcm_be_dai_links, |
| sizeof(msm_auxpcm_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_auxpcm_be_dai_links); |
| } |
| } |
| rc = of_property_read_u32(dev->of_node, "qcom,spdif-audio-intf", |
| &spdif_audio_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match SPDIF audio interface\n", |
| __func__); |
| } else { |
| if (spdif_audio_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_spdif_be_dai_links, |
| sizeof(msm_spdif_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_spdif_be_dai_links); |
| |
| /* enable spdif coax pins */ |
| spdif_cfg = ioremap(TLMM_EAST_SPARE, 0x4); |
| spdif_pin_ctl = |
| ioremap(TLMM_SPDIF_HDMI_ARC_CTL, 0x4); |
| iowrite32(0xc0, spdif_cfg); |
| iowrite32(0x2220, spdif_pin_ctl); |
| } |
| } |
| rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm", |
| &wcn_audio_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match WCN audio interface\n", |
| __func__); |
| } else { |
| if (wcn_audio_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_wcn_be_dai_links, |
| sizeof(msm_wcn_be_dai_links)); |
| total_links += |
| ARRAY_SIZE(msm_wcn_be_dai_links); |
| } |
| } |
| rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb", |
| &afe_loopback_intf); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match AFE loopback audio interface\n", |
| __func__); |
| } else { |
| if (afe_loopback_intf) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| msm_afe_rxtx_lb_be_dai_link, |
| sizeof(msm_afe_rxtx_lb_be_dai_link)); |
| total_links += |
| ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link); |
| } |
| } |
| rc = of_property_read_u32(dev->of_node, |
| "qcom,ext-disp-audio-rx", &ext_disp_hdmi_rx); |
| if (rc) { |
| dev_dbg(dev, "%s: No DT match ext disp hdmi rx\n", |
| __func__); |
| } else { |
| if (ext_disp_hdmi_rx) { |
| memcpy(msm_qcs405_dai_links + total_links, |
| ext_hdmi_be_dai_link, |
| sizeof(ext_hdmi_be_dai_link)); |
| total_links += ARRAY_SIZE(ext_hdmi_be_dai_link); |
| } |
| } |
| |
| dailink = msm_qcs405_dai_links; |
| } else if (!strcmp(match->data, "stub_codec")) { |
| card = &snd_soc_card_stub_msm; |
| |
| memcpy(msm_stub_dai_links + total_links, |
| msm_stub_fe_dai_links, |
| sizeof(msm_stub_fe_dai_links)); |
| total_links += ARRAY_SIZE(msm_stub_fe_dai_links); |
| |
| memcpy(msm_stub_dai_links + total_links, |
| msm_stub_be_dai_links, |
| sizeof(msm_stub_be_dai_links)); |
| total_links += ARRAY_SIZE(msm_stub_be_dai_links); |
| dailink = msm_stub_dai_links; |
| } |
| |
| if (card) { |
| card->dai_link = dailink; |
| card->num_links = total_links; |
| } |
| |
| return card; |
| } |
| |
| static int msm_wsa881x_init(struct snd_soc_component *component) |
| { |
| u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3}; |
| u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3}; |
| u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP, |
| SPKR_L_BOOST, SPKR_L_VI}; |
| u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP, |
| SPKR_R_BOOST, SPKR_R_VI}; |
| unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200}; |
| unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3}; |
| struct msm_asoc_mach_data *pdata; |
| struct snd_soc_dapm_context *dapm; |
| int ret = 0; |
| |
| if (!component) { |
| pr_err("%s component is NULL\n", __func__); |
| return -EINVAL; |
| } |
| dapm = snd_soc_component_get_dapm(component); |
| |
| if (!strcmp(component->name_prefix, "SpkrLeft")) { |
| dev_dbg(component->dev, "%s: setting left ch map to codec %s\n", |
| __func__, component->name); |
| wsa881x_set_channel_map(component, &spkleft_ports[0], |
| WSA881X_MAX_SWR_PORTS, &ch_mask[0], |
| &ch_rate[0], &spkleft_port_types[0]); |
| if (dapm->component) { |
| snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN"); |
| snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR"); |
| } |
| } else if (!strcmp(component->name_prefix, "SpkrRight")) { |
| dev_dbg(component->dev, "%s: setting right ch map to codec %s\n", |
| __func__, component->name); |
| wsa881x_set_channel_map(component, &spkright_ports[0], |
| WSA881X_MAX_SWR_PORTS, &ch_mask[0], |
| &ch_rate[0], &spkright_port_types[0]); |
| if (dapm->component) { |
| snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN"); |
| snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR"); |
| } |
| } else { |
| dev_err(component->dev, "%s: wrong codec name %s\n", __func__, |
| component->name); |
| ret = -EINVAL; |
| goto err; |
| } |
| pdata = snd_soc_card_get_drvdata(component->card); |
| if (pdata && pdata->codec_root) |
| wsa881x_codec_info_create_codec_entry(pdata->codec_root, |
| component); |
| |
| err: |
| return ret; |
| } |
| |
| static int msm_init_wsa_dev(struct platform_device *pdev, |
| struct snd_soc_card *card) |
| { |
| struct device_node *wsa_of_node; |
| u32 wsa_max_devs; |
| u32 wsa_dev_cnt; |
| int i; |
| struct msm_wsa881x_dev_info *wsa881x_dev_info; |
| const char *wsa_auxdev_name_prefix[1]; |
| char *dev_name_str = NULL; |
| int found = 0; |
| int ret = 0; |
| |
| /* Get maximum WSA device count for this platform */ |
| ret = of_property_read_u32(pdev->dev.of_node, |
| "qcom,wsa-max-devs", &wsa_max_devs); |
| if (ret) { |
| dev_info(&pdev->dev, |
| "%s: wsa-max-devs property missing in DT %s, ret = %d\n", |
| __func__, pdev->dev.of_node->full_name, ret); |
| card->num_aux_devs = 0; |
| return 0; |
| } |
| if (wsa_max_devs == 0) { |
| dev_warn(&pdev->dev, |
| "%s: Max WSA devices is 0 for this target?\n", |
| __func__); |
| card->num_aux_devs = 0; |
| return 0; |
| } |
| |
| /* Get count of WSA device phandles for this platform */ |
| wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node, |
| "qcom,wsa-devs", NULL); |
| if (wsa_dev_cnt == -ENOENT) { |
| dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n", |
| __func__); |
| goto err; |
| } else if (wsa_dev_cnt <= 0) { |
| dev_err(&pdev->dev, |
| "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n", |
| __func__, wsa_dev_cnt); |
| ret = -EINVAL; |
| goto err; |
| } |
| |
| /* |
| * Expect total phandles count to be NOT less than maximum possible |
| * WSA count. However, if it is less, then assign same value to |
| * max count as well. |
| */ |
| if (wsa_dev_cnt < wsa_max_devs) { |
| dev_dbg(&pdev->dev, |
| "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n", |
| __func__, wsa_max_devs, wsa_dev_cnt); |
| wsa_max_devs = wsa_dev_cnt; |
| } |
| |
| /* Make sure prefix string passed for each WSA device */ |
| ret = of_property_count_strings(pdev->dev.of_node, |
| "qcom,wsa-aux-dev-prefix"); |
| if (ret != wsa_dev_cnt) { |
| dev_err(&pdev->dev, |
| "%s: expecting %d wsa prefix. Defined only %d in DT\n", |
| __func__, wsa_dev_cnt, ret); |
| ret = -EINVAL; |
| goto err; |
| } |
| |
| /* |
| * Alloc mem to store phandle and index info of WSA device, if already |
| * registered with ALSA core |
| */ |
| wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs, |
| sizeof(struct msm_wsa881x_dev_info), |
| GFP_KERNEL); |
| if (!wsa881x_dev_info) { |
| ret = -ENOMEM; |
| goto err; |
| } |
| |
| /* |
| * search and check whether all WSA devices are already |
| * registered with ALSA core or not. If found a node, store |
| * the node and the index in a local array of struct for later |
| * use. |
| */ |
| for (i = 0; i < wsa_dev_cnt; i++) { |
| wsa_of_node = of_parse_phandle(pdev->dev.of_node, |
| "qcom,wsa-devs", i); |
| if (unlikely(!wsa_of_node)) { |
| /* we should not be here */ |
| dev_err(&pdev->dev, |
| "%s: wsa dev node is not present\n", |
| __func__); |
| ret = -EINVAL; |
| goto err_free_dev_info; |
| } |
| if (soc_find_component(wsa_of_node, NULL)) { |
| /* WSA device registered with ALSA core */ |
| wsa881x_dev_info[found].of_node = wsa_of_node; |
| wsa881x_dev_info[found].index = i; |
| found++; |
| if (found == wsa_max_devs) |
| break; |
| } |
| } |
| |
| if (found < wsa_max_devs) { |
| dev_err(&pdev->dev, |
| "%s: failed to find %d components. Found only %d\n", |
| __func__, wsa_max_devs, found); |
| return -EPROBE_DEFER; |
| } |
| dev_info(&pdev->dev, |
| "%s: found %d wsa881x devices registered with ALSA core\n", |
| __func__, found); |
| |
| card->num_aux_devs = wsa_max_devs; |
| card->num_configs = wsa_max_devs; |
| |
| /* Alloc array of AUX devs struct */ |
| msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs, |
| sizeof(struct snd_soc_aux_dev), |
| GFP_KERNEL); |
| if (!msm_aux_dev) { |
| ret = -ENOMEM; |
| goto err_free_dev_info; |
| } |
| |
| /* Alloc array of codec conf struct */ |
| msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs, |
| sizeof(struct snd_soc_codec_conf), |
| GFP_KERNEL); |
| if (!msm_codec_conf) { |
| ret = -ENOMEM; |
| goto err_free_aux_dev; |
| } |
| |
| for (i = 0; i < card->num_aux_devs; i++) { |
| dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN, |
| GFP_KERNEL); |
| if (!dev_name_str) { |
| ret = -ENOMEM; |
| goto err_free_cdc_conf; |
| } |
| |
| ret = of_property_read_string_index(pdev->dev.of_node, |
| "qcom,wsa-aux-dev-prefix", |
| wsa881x_dev_info[i].index, |
| wsa_auxdev_name_prefix); |
| if (ret) { |
| dev_err(&pdev->dev, |
| "%s: failed to read wsa aux dev prefix, ret = %d\n", |
| __func__, ret); |
| ret = -EINVAL; |
| goto err_free_dev_name_str; |
| } |
| |
| snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i); |
| msm_aux_dev[i].name = dev_name_str; |
| msm_aux_dev[i].codec_name = NULL; |
| msm_aux_dev[i].codec_of_node = |
| wsa881x_dev_info[i].of_node; |
| msm_aux_dev[i].init = msm_wsa881x_init; |
| msm_codec_conf[i].dev_name = NULL; |
| msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0]; |
| msm_codec_conf[i].of_node = |
| wsa881x_dev_info[i].of_node; |
| } |
| card->codec_conf = msm_codec_conf; |
| card->aux_dev = msm_aux_dev; |
| |
| return 0; |
| |
| err_free_dev_name_str: |
| devm_kfree(&pdev->dev, dev_name_str); |
| err_free_cdc_conf: |
| devm_kfree(&pdev->dev, msm_codec_conf); |
| err_free_aux_dev: |
| devm_kfree(&pdev->dev, msm_aux_dev); |
| err_free_dev_info: |
| devm_kfree(&pdev->dev, wsa881x_dev_info); |
| err: |
| return ret; |
| } |
| |
| static int msm_csra66x0_init(struct snd_soc_component *component) |
| { |
| if (!component) { |
| pr_err("%s component is NULL\n", __func__); |
| return -EINVAL; |
| } |
| return 0; |
| } |
| |
| static int msm_init_csra_dev(struct platform_device *pdev, |
| struct snd_soc_card *card) |
| { |
| struct device_node *csra_of_node; |
| u32 csra_max_devs; |
| u32 csra_dev_cnt; |
| char *dev_name_str = NULL; |
| struct msm_csra66x0_dev_info *csra66x0_dev_info; |
| const char *csra_auxdev_name_prefix[1]; |
| int i; |
| int found = 0; |
| int ret = 0; |
| |
| /* Get maximum CSRA device count for this platform */ |
| ret = of_property_read_u32(pdev->dev.of_node, |
| "qcom,csra-max-devs", &csra_max_devs); |
| if (ret) { |
| dev_info(&pdev->dev, |
| "%s: csra-max-devs property missing in DT %s, ret = %d\n", |
| __func__, pdev->dev.of_node->full_name, ret); |
| card->num_aux_devs = 0; |
| return 0; |
| } |
| if (csra_max_devs == 0) { |
| dev_warn(&pdev->dev, |
| "%s: Max CSRA devices is 0 for this target?\n", |
| __func__); |
| return 0; |
| } |
| |
| /* Get count of CSRA device phandles for this platform */ |
| csra_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node, |
| "qcom,csra-devs", NULL); |
| if (csra_dev_cnt == -ENOENT) { |
| dev_warn(&pdev->dev, "%s: No csra device defined in DT.\n", |
| __func__); |
| goto err; |
| } else if (csra_dev_cnt <= 0) { |
| dev_err(&pdev->dev, |
| "%s: Error reading csra device from DT. csra_dev_cnt = %d\n", |
| __func__, csra_dev_cnt); |
| ret = -EINVAL; |
| goto err; |
| } |
| |
| /* |
| * Expect total phandles count to be NOT less than maximum possible |
| * CSRA count. However, if it is less, then assign same value to |
| * max count as well. |
| */ |
| if (csra_dev_cnt < csra_max_devs) { |
| dev_dbg(&pdev->dev, |
| "%s: csra_max_devs = %d cannot exceed csra_dev_cnt = %d\n", |
| __func__, csra_max_devs, csra_dev_cnt); |
| csra_max_devs = csra_dev_cnt; |
| } |
| |
| /* Make sure prefix string passed for each CSRA device */ |
| ret = of_property_count_strings(pdev->dev.of_node, |
| "qcom,csra-aux-dev-prefix"); |
| if (ret != csra_dev_cnt) { |
| dev_err(&pdev->dev, |
| "%s: expecting %d csra prefix. Defined only %d in DT\n", |
| __func__, csra_dev_cnt, ret); |
| ret = -EINVAL; |
| goto err; |
| } |
| |
| /* |
| * Alloc mem to store phandle and index info of CSRA device, if already |
| * registered with ALSA core |
| */ |
| csra66x0_dev_info = devm_kcalloc(&pdev->dev, csra_max_devs, |
| sizeof(struct msm_csra66x0_dev_info), |
| GFP_KERNEL); |
| if (!csra66x0_dev_info) { |
| ret = -ENOMEM; |
| goto err; |
| } |
| |
| /* |
| * search and check whether all CSRA devices are already |
| * registered with ALSA core or not. If found a node, store |
| * the node and the index in a local array of struct for later |
| * use. |
| */ |
| for (i = 0; i < csra_dev_cnt; i++) { |
| csra_of_node = of_parse_phandle(pdev->dev.of_node, |
| "qcom,csra-devs", i); |
| if (unlikely(!csra_of_node)) { |
| /* we should not be here */ |
| dev_err(&pdev->dev, |
| "%s: csra dev node is not present\n", |
| __func__); |
| ret = -EINVAL; |
| goto err_free_dev_info; |
| } |
| if (soc_find_component(csra_of_node, NULL)) { |
| /* CSRA device registered with ALSA core */ |
| csra66x0_dev_info[found].of_node = csra_of_node; |
| csra66x0_dev_info[found].index = i; |
| found++; |
| if (found == csra_max_devs) |
| break; |
| } |
| } |
| |
| if (found < csra_max_devs) { |
| dev_dbg(&pdev->dev, |
| "%s: failed to find %d components. Found only %d\n", |
| __func__, csra_max_devs, found); |
| return -EPROBE_DEFER; |
| } |
| dev_info(&pdev->dev, |
| "%s: found %d csra66x0 devices registered with ALSA core\n", |
| __func__, found); |
| |
| card->num_aux_devs = csra_max_devs; |
| card->num_configs = csra_max_devs; |
| |
| /* Alloc array of AUX devs struct */ |
| msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs, |
| sizeof(struct snd_soc_aux_dev), GFP_KERNEL); |
| if (!msm_aux_dev) { |
| ret = -ENOMEM; |
| goto err_free_dev_info; |
| } |
| |
| /* Alloc array of codec conf struct */ |
| msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs, |
| sizeof(struct snd_soc_codec_conf), GFP_KERNEL); |
| if (!msm_codec_conf) { |
| ret = -ENOMEM; |
| goto err_free_aux_dev; |
| } |
| |
| for (i = 0; i < card->num_aux_devs; i++) { |
| dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN, |
| GFP_KERNEL); |
| if (!dev_name_str) { |
| ret = -ENOMEM; |
| goto err_free_cdc_conf; |
| } |
| |
| ret = of_property_read_string_index(pdev->dev.of_node, |
| "qcom,csra-aux-dev-prefix", |
| csra66x0_dev_info[i].index, |
| csra_auxdev_name_prefix); |
| if (ret) { |
| dev_err(&pdev->dev, |
| "%s: failed to read csra aux dev prefix, ret = %d\n", |
| __func__, ret); |
| ret = -EINVAL; |
| goto err_free_dev_name_str; |
| } |
| |
| snprintf(dev_name_str, strlen("csra66x0.%d"), "csra66x0.%d", i); |
| msm_aux_dev[i].name = dev_name_str; |
| msm_aux_dev[i].codec_name = NULL; |
| msm_aux_dev[i].codec_of_node = |
| csra66x0_dev_info[i].of_node; |
| msm_aux_dev[i].init = msm_csra66x0_init; /* codec specific init */ |
| msm_codec_conf[i].dev_name = NULL; |
| msm_codec_conf[i].name_prefix = csra_auxdev_name_prefix[0]; |
| msm_codec_conf[i].of_node = csra66x0_dev_info[i].of_node; |
| } |
| card->codec_conf = msm_codec_conf; |
| card->aux_dev = msm_aux_dev; |
| |
| return 0; |
| |
| err_free_dev_name_str: |
| devm_kfree(&pdev->dev, dev_name_str); |
| err_free_cdc_conf: |
| devm_kfree(&pdev->dev, msm_codec_conf); |
| err_free_aux_dev: |
| devm_kfree(&pdev->dev, msm_aux_dev); |
| err_free_dev_info: |
| devm_kfree(&pdev->dev, csra66x0_dev_info); |
| err: |
| return ret; |
| } |
| |
| static void msm_i2s_auxpcm_init(struct platform_device *pdev) |
| { |
| int count; |
| u32 mi2s_master_slave[MI2S_MAX]; |
| int ret; |
| |
| for (count = 0; count < MI2S_MAX; count++) { |
| mutex_init(&mi2s_intf_conf[count].lock); |
| mi2s_intf_conf[count].ref_cnt = 0; |
| } |
| |
| ret = of_property_read_u32_array(pdev->dev.of_node, |
| "qcom,msm-mi2s-master", |
| mi2s_master_slave, MI2S_MAX); |
| if (ret) { |
| dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n", |
| __func__); |
| } else { |
| for (count = 0; count < MI2S_MAX; count++) { |
| mi2s_intf_conf[count].msm_is_mi2s_master = |
| mi2s_master_slave[count]; |
| } |
| } |
| } |
| |
| static void msm_i2s_auxpcm_deinit(void) |
| { |
| int count; |
| |
| for (count = 0; count < MI2S_MAX; count++) { |
| mutex_destroy(&mi2s_intf_conf[count].lock); |
| mi2s_intf_conf[count].ref_cnt = 0; |
| mi2s_intf_conf[count].msm_is_mi2s_master = 0; |
| } |
| } |
| |
| static void msm_meta_mi2s_init(struct platform_device *pdev) |
| { |
| int rc = 0; |
| int i = 0; |
| int index = 0; |
| bool parse_of = false; |
| struct snd_soc_card *card = platform_get_drvdata(pdev); |
| struct snd_soc_dai_link *dai_link = card->dai_link; |
| |
| dev_dbg(&pdev->dev, "%s: read from DT\n", __func__); |
| |
| for (index = 0; index < META_MI2S_MAX; index++) { |
| meta_mi2s_intf_conf[index].num_member_ports = 0; |
| meta_mi2s_intf_conf[index].member_port[0] = 0; |
| meta_mi2s_intf_conf[index].member_port[1] = 0; |
| meta_mi2s_intf_conf[index].member_port[2] = 0; |
| meta_mi2s_intf_conf[index].member_port[3] = 0; |
| meta_mi2s_intf_conf[index].clk_enable[0] = false; |
| meta_mi2s_intf_conf[index].clk_enable[1] = false; |
| meta_mi2s_intf_conf[index].clk_enable[2] = false; |
| meta_mi2s_intf_conf[index].clk_enable[3] = false; |
| } |
| |
| /* get member port info to set matching clocks for involved ports */ |
| for (i = 0; i < card->num_links; i++) { |
| if (dai_link[i].id == MSM_BACKEND_DAI_PRI_META_MI2S_RX) { |
| parse_of = true; |
| index = PRIM_META_MI2S; |
| } else if (dai_link[i].id == MSM_BACKEND_DAI_SEC_META_MI2S_RX) { |
| parse_of = true; |
| index = SEC_META_MI2S; |
| } else { |
| parse_of = false; |
| } |
| if (parse_of && dai_link[i].cpu_of_node) { |
| rc = of_property_read_u32(dai_link[i].cpu_of_node, |
| "qcom,msm-mi2s-num-members", |
| &meta_mi2s_intf_conf[index].num_member_ports); |
| if (rc) { |
| dev_err(&pdev->dev, "%s: invalid num from DT file %s\n", |
| __func__, "qcom,msm-mi2s-num-members"); |
| } |
| |
| if (meta_mi2s_intf_conf[index].num_member_ports > |
| MAX_NUM_I2S_META_PORT_MEMBER_PORTS) { |
| dev_err(&pdev->dev, "%s: num-members %d too large from DT file\n", |
| __func__, |
| meta_mi2s_intf_conf[index].num_member_ports); |
| } |
| |
| if (meta_mi2s_intf_conf[index].num_member_ports > 0) { |
| rc = of_property_read_u32_array( |
| dai_link[i].cpu_of_node, |
| "qcom,msm-mi2s-member-id", |
| meta_mi2s_intf_conf[index].member_port, |
| meta_mi2s_intf_conf[index].num_member_ports); |
| if (rc) { |
| dev_err(&pdev->dev, "%s: member-id from DT file %s\n", |
| __func__, |
| "qcom,msm-mi2s-member-id"); |
| } |
| } |
| |
| dev_dbg(&pdev->dev, "dev name %s num-members=%d\n", |
| dev_name(&pdev->dev), |
| meta_mi2s_intf_conf[index].num_member_ports); |
| dev_dbg(&pdev->dev, "member array (%d, %d, %d, %d)\n", |
| meta_mi2s_intf_conf[index].member_port[0], |
| meta_mi2s_intf_conf[index].member_port[1], |
| meta_mi2s_intf_conf[index].member_port[2], |
| meta_mi2s_intf_conf[index].member_port[3]); |
| } |
| } |
| } |
| |
| static int msm_scan_i2c_addr(struct platform_device *pdev, |
| uint32_t busnum, uint32_t addr) |
| { |
| struct i2c_adapter *adap; |
| u8 rbuf; |
| struct i2c_msg msg; |
| int status = 0; |
| |
| adap = i2c_get_adapter(busnum); |
| if (!adap) { |
| dev_err(&pdev->dev, "%s: Cannot get I2C adapter %d\n", |
| __func__, busnum); |
| return -EBUSY; |
| } |
| |
| /* to test presence, read one byte from device */ |
| msg.addr = addr; |
| msg.flags = I2C_M_RD; |
| msg.len = 1; |
| msg.buf = &rbuf; |
| |
| status = i2c_transfer(adap, &msg, 1); |
| |
| i2c_put_adapter(adap); |
| |
| if (status != 1) { |
| dev_dbg(&pdev->dev, "%s: I2C read from addr 0x%02x failed\n", |
| __func__, addr); |
| return -ENODEV; |
| } |
| |
| dev_dbg(&pdev->dev, "%s: I2C read from addr 0x%02x successful\n", |
| __func__, addr); |
| |
| return 0; |
| } |
| |
| static int msm_detect_ep92_dev(struct platform_device *pdev, |
| struct snd_soc_card *card) |
| { |
| int i; |
| uint32_t ep92_busnum = 0; |
| uint32_t ep92_reg = 0; |
| const char *ep92_name = NULL; |
| struct snd_soc_dai_link *dai; |
| int rc = 0; |
| |
| rc = of_property_read_u32(pdev->dev.of_node, "qcom,ep92-busnum", |
| &ep92_busnum); |
| if (rc) { |
| dev_info(&pdev->dev, "%s: No DT match ep92-reg\n", __func__); |
| return 0; |
| } |
| |
| rc = of_property_read_u32(pdev->dev.of_node, "qcom,ep92-reg", |
| &ep92_reg); |
| if (rc) { |
| dev_info(&pdev->dev, "%s: No DT match ep92-busnum\n", __func__); |
| return 0; |
| } |
| |
| rc = of_property_read_string(pdev->dev.of_node, "qcom,ep92-name", |
| &ep92_name); |
| if (rc) { |
| dev_info(&pdev->dev, "%s: No DT match ep92-name\n", __func__); |
| return 0; |
| } |
| |
| /* check I2C bus for connected ep92 chip */ |
| if (msm_scan_i2c_addr(pdev, ep92_busnum, ep92_reg) < 0) { |
| /* check a second time after a short delay */ |
| msleep(20); |
| if (msm_scan_i2c_addr(pdev, ep92_busnum, ep92_reg) < 0) { |
| dev_info(&pdev->dev, "%s: No ep92 device found\n", |
| __func__); |
| /* continue with snd_card registration without ep92 */ |
| return 0; |
| } |
| } |
| |
| dev_info(&pdev->dev, "%s: ep92 device found\n", __func__); |
| |
| /* update codec info in MI2S dai link */ |
| dai = &msm_mi2s_be_dai_links[0]; |
| for (i=0; i<ARRAY_SIZE(msm_mi2s_be_dai_links); i++) { |
| if (strcmp(dai->name, LPASS_BE_SEC_MI2S_TX) == 0) { |
| dev_dbg(&pdev->dev, |
| "%s: Set Sec MI2S dai to ep92 codec\n", |
| __func__); |
| dai->codec_name = ep92_name; |
| dai->codec_dai_name = "ep92-hdmi"; |
| break; |
| } |
| dai++; |
| } |
| |
| /* update codec info in SPDIF dai link */ |
| dai = &msm_spdif_be_dai_links[0]; |
| for (i=0; i<ARRAY_SIZE(msm_spdif_be_dai_links); i++) { |
| if (strcmp(dai->name, LPASS_BE_SEC_SPDIF_TX) == 0) { |
| dev_dbg(&pdev->dev, |
| "%s: Set Sec SPDIF dai to ep92 codec\n", |
| __func__); |
| dai->codec_name = ep92_name; |
| dai->codec_dai_name = "ep92-arc"; |
| break; |
| } |
| dai++; |
| } |
| |
| return 0; |
| } |
| |
| static int msm_asoc_machine_probe(struct platform_device *pdev) |
| { |
| struct snd_soc_card *card; |
| struct msm_asoc_mach_data *pdata; |
| int ret; |
| u32 val; |
| const char *micb_supply_str = "tdm-vdd-micb-supply"; |
| const char *micb_supply_str1 = "tdm-vdd-micb"; |
| const char *micb_voltage_str = "qcom,tdm-vdd-micb-voltage"; |
| const char *micb_current_str = "qcom,tdm-vdd-micb-current"; |
| u32 v_base_addr; |
| |
| if (!pdev->dev.of_node) { |
| dev_err(&pdev->dev, "No platform supplied from device tree\n"); |
| return -EINVAL; |
| } |
| |
| pdata = devm_kzalloc(&pdev->dev, |
| sizeof(struct msm_asoc_mach_data), GFP_KERNEL); |
| if (!pdata) |
| return -ENOMEM; |
| |
| ret = of_property_read_u32( |
| pdev->dev.of_node, "tcsr_i2s_dsd_prim", &v_base_addr); |
| if (ret) { |
| dev_err(&pdev->dev, "MUX addr invalid for MI2S dsd prim\n"); |
| } else { |
| pdata->mi2s_dsd_mode[PRIM_MI2S] = |
| devm_ioremap(&pdev->dev, v_base_addr, 4); |
| if (pdata->mi2s_dsd_mode[PRIM_MI2S] == NULL) { |
| pr_err("%s ioremap failure for muxsel virt addr dsd prim\n", |
| __func__); |
| } |
| } |
| ret = of_property_read_u32( |
| pdev->dev.of_node, "tcsr_i2s_dsd_quat", &v_base_addr); |
| if (ret) { |
| dev_err(&pdev->dev, "MUX addr invalid for MI2S dsd quat\n"); |
| } else { |
| pdata->mi2s_dsd_mode[QUAT_MI2S] = |
| devm_ioremap(&pdev->dev, v_base_addr, 4); |
| if (pdata->mi2s_dsd_mode[QUAT_MI2S] == NULL) { |
| pr_err("%s ioremap failure for muxsel virt addr dsd quat\n", |
| __func__); |
| } |
| } |
| |
| /* test for ep92 HDMI bridge and update dai links accordingly */ |
| ret = msm_detect_ep92_dev(pdev, card); |
| if (ret) |
| goto err; |
| |
| card = populate_snd_card_dailinks(&pdev->dev); |
| if (!card) { |
| dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__); |
| ret = -EINVAL; |
| goto err; |
| } |
| card->dev = &pdev->dev; |
| platform_set_drvdata(pdev, card); |
| snd_soc_card_set_drvdata(card, pdata); |
| |
| ret = snd_soc_of_parse_card_name(card, "qcom,model"); |
| if (ret) { |
| dev_err(&pdev->dev, "parse card name failed, err:%d\n", |
| ret); |
| goto err; |
| } |
| |
| ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing"); |
| if (ret) { |
| dev_err(&pdev->dev, "parse audio routing failed, err:%d\n", |
| ret); |
| goto err; |
| } |
| |
| ret = msm_populate_dai_link_component_of_node(card); |
| if (ret) { |
| ret = -EPROBE_DEFER; |
| goto err; |
| } |
| |
| ret = of_property_read_u32(pdev->dev.of_node, "qcom,csra-codec", &val); |
| if (ret) { |
| dev_info(&pdev->dev, "no 'qcom,csra-codec' in DT\n"); |
| val = 0; |
| } |
| if (val) { |
| pdata->codec_is_csra = true; |
| mi2s_rx_cfg[PRIM_MI2S].bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| meta_mi2s_rx_cfg[PRIM_META_MI2S].bit_format = |
| SNDRV_PCM_FORMAT_S24_LE; |
| ret = msm_init_csra_dev(pdev, card); |
| if (ret) |
| goto err; |
| } else { |
| pdata->codec_is_csra = false; |
| ret = msm_init_wsa_dev(pdev, card); |
| if (ret) |
| goto err; |
| } |
| |
| pdata->dmic_01_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| "qcom,cdc-dmic01-gpios", 0); |
| pdata->dmic_23_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| "qcom,cdc-dmic23-gpios", 0); |
| pdata->dmic_45_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| "qcom,cdc-dmic45-gpios", 0); |
| pdata->dmic_67_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| "qcom,cdc-dmic67-gpios", 0); |
| pdata->lineout_booster_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| "qcom,lineout-booster-gpio", 0); |
| |
| pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| "qcom,pri-mi2s-gpios", 0); |
| pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| "qcom,sec-mi2s-gpios", 0); |
| pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| "qcom,tert-mi2s-gpios", 0); |
| pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| "qcom,quat-mi2s-gpios", 0); |
| pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| "qcom,quin-mi2s-gpios", 0); |
| |
| if (of_parse_phandle(pdev->dev.of_node, micb_supply_str, 0)) { |
| pdata->tdm_micb_supply = devm_regulator_get(&pdev->dev, |
| micb_supply_str1); |
| if (IS_ERR(pdata->tdm_micb_supply)) { |
| ret = PTR_ERR(pdata->tdm_micb_supply); |
| dev_err(&pdev->dev, |
| "%s:Failed to get micbias supply for TDM Mic %d\n", |
| __func__, ret); |
| } |
| ret = of_property_read_u32(pdev->dev.of_node, |
| micb_voltage_str, |
| &pdata->tdm_micb_voltage); |
| if (ret) { |
| dev_err(&pdev->dev, |
| "%s:Looking up %s property in node %s failed\n", |
| __func__, micb_voltage_str, |
| pdev->dev.of_node->full_name); |
| } |
| ret = of_property_read_u32(pdev->dev.of_node, |
| micb_current_str, |
| &pdata->tdm_micb_current); |
| if (ret) { |
| dev_err(&pdev->dev, |
| "%s:Looking up %s property in node %s failed\n", |
| __func__, micb_current_str, |
| pdev->dev.of_node->full_name); |
| } |
| } |
| |
| ret = devm_snd_soc_register_card(&pdev->dev, card); |
| if (ret == -EPROBE_DEFER) { |
| if (codec_reg_done) |
| ret = -EINVAL; |
| goto err; |
| } else if (ret) { |
| dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", |
| ret); |
| goto err; |
| } |
| dev_info(&pdev->dev, "Sound card %s registered\n", card->name); |
| spdev = pdev; |
| |
| ret = msm_mdf_mem_init(); |
| if (ret) |
| dev_err(&pdev->dev, "msm_mdf_mem_init failed (%d)\n", |
| ret); |
| |
| msm_i2s_auxpcm_init(pdev); |
| |
| msm_meta_mi2s_init(pdev); |
| |
| is_initial_boot = true; |
| return 0; |
| err: |
| return ret; |
| } |
| |
| static int msm_asoc_machine_remove(struct platform_device *pdev) |
| { |
| audio_notifier_deregister("qcs405"); |
| msm_i2s_auxpcm_deinit(); |
| msm_mdf_mem_deinit(); |
| |
| return 0; |
| } |
| |
| static struct platform_driver qcs405_asoc_machine_driver = { |
| .driver = { |
| .name = DRV_NAME, |
| .owner = THIS_MODULE, |
| .pm = &snd_soc_pm_ops, |
| .of_match_table = qcs405_asoc_machine_of_match, |
| .suppress_bind_attrs = true, |
| }, |
| .probe = msm_asoc_machine_probe, |
| .remove = msm_asoc_machine_remove, |
| }; |
| module_platform_driver(qcs405_asoc_machine_driver); |
| |
| MODULE_DESCRIPTION("ALSA SoC QCS405 Machine driver"); |
| MODULE_LICENSE("GPL v2"); |
| MODULE_ALIAS("platform:" DRV_NAME); |
| MODULE_DEVICE_TABLE(of, qcs405_asoc_machine_of_match); |