Merge "soc: Fix out of bounds access in register show function"
diff --git a/asoc/codecs/bolero/rx-macro.c b/asoc/codecs/bolero/rx-macro.c
index c6a9d3d..52598ef 100644
--- a/asoc/codecs/bolero/rx-macro.c
+++ b/asoc/codecs/bolero/rx-macro.c
@@ -77,6 +77,8 @@
#define RX_MACRO_EC_MIX_TX1_MASK 0x0f
#define RX_MACRO_EC_MIX_TX2_MASK 0x0f
+#define COMP_MAX_COEFF 25
+
struct wcd_imped_val {
u32 imped_val;
u8 index;
@@ -95,6 +97,75 @@
{13, 9},
};
+struct comp_coeff_val {
+ u8 lsb;
+ u8 msb;
+};
+
+enum {
+ HPH_ULP,
+ HPH_LOHIFI,
+ HPH_MODE_MAX,
+};
+
+static const struct comp_coeff_val
+ comp_coeff_table [HPH_MODE_MAX][COMP_MAX_COEFF] = {
+ {
+ {0x40, 0x00},
+ {0x4C, 0x00},
+ {0x5A, 0x00},
+ {0x6B, 0x00},
+ {0x7F, 0x00},
+ {0x97, 0x00},
+ {0xB3, 0x00},
+ {0xD5, 0x00},
+ {0xFD, 0x00},
+ {0x2D, 0x01},
+ {0x66, 0x01},
+ {0xA7, 0x01},
+ {0xF8, 0x01},
+ {0x57, 0x02},
+ {0xC7, 0x02},
+ {0x4B, 0x03},
+ {0xE9, 0x03},
+ {0xA3, 0x04},
+ {0x7D, 0x05},
+ {0x90, 0x06},
+ {0xD1, 0x07},
+ {0x49, 0x09},
+ {0x00, 0x0B},
+ {0x01, 0x0D},
+ {0x59, 0x0F},
+ },
+ {
+ {0x40, 0x00},
+ {0x4C, 0x00},
+ {0x5A, 0x00},
+ {0x6B, 0x00},
+ {0x80, 0x00},
+ {0x98, 0x00},
+ {0xB4, 0x00},
+ {0xD5, 0x00},
+ {0xFE, 0x00},
+ {0x2E, 0x01},
+ {0x66, 0x01},
+ {0xA9, 0x01},
+ {0xF8, 0x01},
+ {0x56, 0x02},
+ {0xC4, 0x02},
+ {0x4F, 0x03},
+ {0xF0, 0x03},
+ {0xAE, 0x04},
+ {0x8B, 0x05},
+ {0x8E, 0x06},
+ {0xBC, 0x07},
+ {0x56, 0x09},
+ {0x0F, 0x0B},
+ {0x13, 0x0D},
+ {0x6F, 0x0F},
+ },
+};
+
struct rx_macro_reg_mask_val {
u16 reg;
u8 mask;
@@ -1526,6 +1597,47 @@
return 0;
}
+static int rx_macro_load_compander_coeff(struct snd_soc_component *component,
+ struct rx_macro_priv *rx_priv,
+ int interp_n, int event)
+{
+ int comp = 0;
+ u16 comp_coeff_lsb_reg = 0, comp_coeff_msb_reg = 0;
+ int i = 0;
+ int hph_pwr_mode = HPH_LOHIFI;
+
+ if (!rx_priv->comp_enabled[comp])
+ return 0;
+
+ if (interp_n == INTERP_HPHL) {
+ comp_coeff_lsb_reg = BOLERO_CDC_RX_TOP_HPHL_COMP_WR_LSB;
+ comp_coeff_msb_reg = BOLERO_CDC_RX_TOP_HPHL_COMP_WR_MSB;
+ } else if (interp_n == INTERP_HPHR) {
+ comp_coeff_lsb_reg = BOLERO_CDC_RX_TOP_HPHR_COMP_WR_LSB;
+ comp_coeff_msb_reg = BOLERO_CDC_RX_TOP_HPHR_COMP_WR_MSB;
+ } else {
+ /* compander coefficients are loaded only for hph path */
+ return 0;
+ }
+
+ comp = interp_n;
+ hph_pwr_mode = rx_priv->hph_pwr_mode;
+ dev_dbg(component->dev, "%s: event %d compander %d, enabled %d\n",
+ __func__, event, comp + 1, rx_priv->comp_enabled[comp]);
+
+ if (SND_SOC_DAPM_EVENT_ON(event)) {
+ /* Load Compander Coeff */
+ for (i = 0; i < COMP_MAX_COEFF; i++) {
+ snd_soc_component_write(component, comp_coeff_lsb_reg,
+ comp_coeff_table[hph_pwr_mode][i].lsb);
+ snd_soc_component_write(component, comp_coeff_msb_reg,
+ comp_coeff_table[hph_pwr_mode][i].msb);
+ }
+ }
+
+ return 0;
+}
+
static void rx_macro_enable_softclip_clk(struct snd_soc_component *component,
struct rx_macro_priv *rx_priv,
bool enable)
@@ -2245,6 +2357,8 @@
0x20, 0x20);
snd_soc_component_update_bits(component, rx_cfg2_reg,
0x03, 0x03);
+ rx_macro_load_compander_coeff(component, rx_priv,
+ interp_idx, event);
rx_macro_idle_detect_control(component, rx_priv,
interp_idx, event);
if (rx_priv->hph_hd2_mode)
diff --git a/dsp/q6afe.c b/dsp/q6afe.c
index 20ff039..9709772 100644
--- a/dsp/q6afe.c
+++ b/dsp/q6afe.c
@@ -915,6 +915,10 @@
case AFE_PORT_ID_SENARY_MI2S_TX:
ret_size = SIZEOF_CFG_CMD(afe_param_id_i2s_cfg);
break;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ ret_size = SIZEOF_CFG_CMD(afe_param_id_meta_i2s_cfg);
+ break;
case HDMI_RX:
case DISPLAY_PORT_RX:
ret_size =
@@ -4556,6 +4560,10 @@
case AFE_PORT_ID_INT6_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ cfg_type = AFE_PARAM_ID_META_I2S_CONFIG;
+ break;
case HDMI_RX:
case DISPLAY_PORT_RX:
cfg_type = AFE_PARAM_ID_HDMI_CONFIG;
@@ -5091,6 +5099,10 @@
return IDX_AFE_PORT_ID_INT6_MI2S_RX;
case AFE_PORT_ID_INT6_MI2S_TX:
return IDX_AFE_PORT_ID_INT6_MI2S_TX;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ return IDX_AFE_PORT_ID_PRIMARY_META_MI2S_RX;
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ return IDX_AFE_PORT_ID_SECONDARY_META_MI2S_RX;
case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
return IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_0;
case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
@@ -5254,6 +5266,10 @@
case AFE_PORT_ID_SENARY_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ cfg_type = AFE_PARAM_ID_META_I2S_CONFIG;
+ break;
case HDMI_RX:
case DISPLAY_PORT_RX:
cfg_type = AFE_PARAM_ID_HDMI_CONFIG;
@@ -7231,6 +7247,8 @@
case AFE_PORT_ID_QUINARY_MI2S_TX:
case AFE_PORT_ID_SENARY_MI2S_RX:
case AFE_PORT_ID_SENARY_MI2S_TX:
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
case AFE_PORT_ID_PRIMARY_TDM_RX:
case AFE_PORT_ID_PRIMARY_TDM_TX:
case AFE_PORT_ID_PRIMARY_TDM_RX_1:
diff --git a/dsp/q6audio-v2.c b/dsp/q6audio-v2.c
index 8de6060..68b3736 100644
--- a/dsp/q6audio-v2.c
+++ b/dsp/q6audio-v2.c
@@ -337,6 +337,10 @@
return IDX_AFE_PORT_ID_INT6_MI2S_RX;
case AFE_PORT_ID_INT6_MI2S_TX:
return IDX_AFE_PORT_ID_INT6_MI2S_TX;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ return IDX_AFE_PORT_ID_PRIMARY_META_MI2S_RX;
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ return IDX_AFE_PORT_ID_SECONDARY_META_MI2S_RX;
case AFE_PORT_ID_WSA_CODEC_DMA_RX_0:
return IDX_AFE_PORT_ID_WSA_CODEC_DMA_RX_0;
case AFE_PORT_ID_WSA_CODEC_DMA_TX_0:
@@ -487,6 +491,10 @@
return AUDIO_PORT_ID_I2S_RX;
case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1:
return AFE_PORT_ID_SECONDARY_MI2S_RX_SD1;
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ return AFE_PORT_ID_PRIMARY_META_MI2S_RX;
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
+ return AFE_PORT_ID_SECONDARY_META_MI2S_RX;
case AFE_PORT_ID_PRIMARY_TDM_RX:
return AFE_PORT_ID_PRIMARY_TDM_RX;
case AFE_PORT_ID_PRIMARY_TDM_TX:
@@ -820,6 +828,8 @@
case AFE_PORT_ID_SECONDARY_MI2S_TX:
case AUDIO_PORT_ID_I2S_RX:
case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1:
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
case AFE_PORT_ID_PRIMARY_TDM_RX:
case AFE_PORT_ID_PRIMARY_TDM_TX:
case AFE_PORT_ID_PRIMARY_TDM_RX_1:
@@ -1048,6 +1058,8 @@
case AFE_PORT_ID_QUINARY_MI2S_RX:
case AFE_PORT_ID_QUINARY_MI2S_TX:
case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1:
+ case AFE_PORT_ID_PRIMARY_META_MI2S_RX:
+ case AFE_PORT_ID_SECONDARY_META_MI2S_RX:
case AFE_PORT_ID_PRIMARY_TDM_RX:
case AFE_PORT_ID_PRIMARY_TDM_TX:
case AFE_PORT_ID_PRIMARY_TDM_RX_1:
diff --git a/include/dsp/apr_audio-v2.h b/include/dsp/apr_audio-v2.h
index a9a552e..0fcc76a 100644
--- a/include/dsp/apr_audio-v2.h
+++ b/include/dsp/apr_audio-v2.h
@@ -1505,6 +1505,9 @@
/* ID of the senary auxiliary PCM Tx port. */
#define AFE_PORT_ID_SENARY_PCM_TX 0x103F
+#define AFE_PORT_ID_PRIMARY_META_MI2S_RX 0x1300
+#define AFE_PORT_ID_SECONDARY_META_MI2S_RX 0x1302
+
#define AFE_PORT_ID_PRIMARY_SPDIF_RX 0x5000
#define AFE_PORT_ID_PRIMARY_SPDIF_TX 0x5001
#define AFE_PORT_ID_SECONDARY_SPDIF_RX 0x5002
@@ -2650,6 +2653,98 @@
/* This field must be set to zero. */
} __packed;
+/* This param id is used to configure META I2S interface */
+#define AFE_PARAM_ID_META_I2S_CONFIG 0x000102C5
+#define AFE_API_VERSION_META_I2S_CONFIG 0x1
+#define MAX_NUM_I2S_META_PORT_MEMBER_PORTS 4
+
+/* Payload of the #AFE_PARAM_ID_META_I2S_CONFIG
+ * command's (I2S configuration
+ * parameter).
+ */
+struct afe_param_id_meta_i2s_cfg {
+ u32 minor_version;
+/* Minor version used for tracking the version of the I2S
+ * configuration interface.
+ * Supported values: #AFE_API_VERSION_META_I2S_CONFIG
+ */
+
+ u16 bit_width;
+/* Bit width of the sample.
+ * Supported values: 16, 24
+ */
+
+ u16 ws_src;
+/* Word select source: internal or external.
+ * Supported values:
+ * - #AFE_PORT_CONFIG_I2S_WS_SRC_EXTERNAL
+ * - #AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL
+ */
+
+ u32 sample_rate;
+/* Sampling rate of the port.
+ * Supported values:
+ * - #AFE_PORT_SAMPLE_RATE_8K
+ * - #AFE_PORT_SAMPLE_RATE_16K
+ * - #AFE_PORT_SAMPLE_RATE_48K
+ * - #AFE_PORT_SAMPLE_RATE_96K
+ * - #AFE_PORT_SAMPLE_RATE_192K
+ */
+
+ u16 member_port_id[MAX_NUM_I2S_META_PORT_MEMBER_PORTS];
+/* Array of member port IDs in this meta device.
+ * Supported values:
+ * - #AFE_PORT_ID_PRIMARY_MI2S_RX
+ * - #AFE_PORT_ID_SECONDARY_MI2S_RX
+ * - #AFE_PORT_ID_TERTIARY_MI2S_RX
+ * - #AFE_PORT_ID_QUATERNY_MI2S_RX
+ * - #AFE_PORT_ID_INVALID
+ *
+ * Fill these values from index 0. Set unused index to AFE_PORT_ID_INVALID.
+ *
+ * Note:
+ * the first member port will act as WS master in case
+ * meta port ws_src is configured as AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL.
+ * In all other cases member ports will act as slave.
+ * This must be considered when HLOS enables the interface clocks
+ */
+
+ u16 member_port_channel_mode[MAX_NUM_I2S_META_PORT_MEMBER_PORTS];
+/* I2S lines and multichannel operation per member port.
+ * The sequence matches the sequence in member_port_id,
+ * value will be ignored if member port is set to AFE_PORT_ID_INVALID
+ *
+ * Supported values:
+ * - #AFE_PORT_I2S_SD0
+ * - #AFE_PORT_I2S_SD1
+ * - #AFE_PORT_I2S_SD2
+ * - #AFE_PORT_I2S_SD3
+ * - #AFE_PORT_I2S_QUAD01
+ * - #AFE_PORT_I2S_QUAD23
+ * - #AFE_PORT_I2S_6CHS
+ * - #AFE_PORT_I2S_8CHS
+ * - #AFE_PORT_I2S_10CHS
+ * - #AFE_PORT_I2S_12CHS
+ * - #AFE_PORT_I2S_14CHS
+ * - #AFE_PORT_I2S_16CHS
+ * - #AFE_PORT_I2S_SD4
+ * - #AFE_PORT_I2S_SD5
+ * - #AFE_PORT_I2S_SD6
+ * - #AFE_PORT_I2S_SD7
+ * - #AFE_PORT_I2S_QUAD45
+ * - #AFE_PORT_I2S_QUAD67
+ * - #AFE_PORT_I2S_8CHS_2
+ */
+
+ u16 data_format;
+/* data format
+ * Supported values:
+ * - #LINEAR_PCM_DATA
+ */
+ u16 reserved;
+ /* This field must be set to zero. */
+} __packed;
+
/*
* This param id is used to configure PCM interface
*/
@@ -4846,6 +4941,7 @@
union afe_port_config {
struct afe_param_id_pcm_cfg pcm;
struct afe_param_id_i2s_cfg i2s;
+ struct afe_param_id_meta_i2s_cfg meta_i2s;
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg slim_sch;
struct afe_param_id_rt_proxy_port_cfg rtproxy;
@@ -5663,9 +5759,7 @@
/* Left side direct channel. */
#define PCM_CHANNEL_LSD 33
-/* Right side direct channel. Update PCM_MAX_CHMAP_ID when
- * this list is extended.
- */
+/* Right side direct channel. */
#define PCM_CHANNEL_RSD 34
/* Mark unused channel. */
@@ -5690,7 +5784,7 @@
#define PCM_MAX_CHANNEL_MAP 63
/* Max valid channel map index */
-#define PCM_MAX_CHMAP_ID PCM_CHANNEL_RSD
+#define PCM_MAX_CHMAP_ID PCM_MAX_CHANNEL_MAP
#define PCM_FORMAT_MAX_NUM_CHANNEL 8
#define PCM_FORMAT_MAX_CHANNELS_9 9
diff --git a/include/dsp/q6afe-v2.h b/include/dsp/q6afe-v2.h
index 9504ad6..d1b4f3c 100644
--- a/include/dsp/q6afe-v2.h
+++ b/include/dsp/q6afe-v2.h
@@ -281,6 +281,9 @@
IDX_AFE_PORT_ID_SENARY_TDM_TX_6,
IDX_AFE_PORT_ID_SENARY_TDM_RX_7,
IDX_AFE_PORT_ID_SENARY_TDM_TX_7,
+ /* IDX 208-> 209 */
+ IDX_AFE_PORT_ID_PRIMARY_META_MI2S_RX,
+ IDX_AFE_PORT_ID_SECONDARY_META_MI2S_RX,
AFE_MAX_PORTS
};
diff --git a/include/soc/swr-wcd.h b/include/soc/swr-wcd.h
index 25c5339..4ec5094 100644
--- a/include/soc/swr-wcd.h
+++ b/include/soc/swr-wcd.h
@@ -22,6 +22,8 @@
SWR_REGISTER_WAKE_IRQ,
SWR_SET_PORT_MAP,
SWR_REQ_CLK_SWITCH,
+ SWR_REGISTER_WAKEUP,
+ SWR_DEREGISTER_WAKEUP,
};
struct swr_mstr_port {
diff --git a/soc/swr-mstr-ctrl.c b/soc/swr-mstr-ctrl.c
index b42cd5f..0fc24fe 100644
--- a/soc/swr-mstr-ctrl.c
+++ b/soc/swr-mstr-ctrl.c
@@ -1412,6 +1412,7 @@
continue;
if (swr_dev->slave_irq) {
do {
+ swr_dev->slave_irq_pending = 0;
handle_nested_irq(
irq_find_mapping(
swr_dev->slave_irq, 0));
@@ -2885,6 +2886,14 @@
mutex_unlock(&swrm->mlock);
}
break;
+ case SWR_REGISTER_WAKEUP:
+ msm_aud_evt_blocking_notifier_call_chain(
+ SWR_WAKE_IRQ_REGISTER, (void *)swrm);
+ break;
+ case SWR_DEREGISTER_WAKEUP:
+ msm_aud_evt_blocking_notifier_call_chain(
+ SWR_WAKE_IRQ_DEREGISTER, (void *)swrm);
+ break;
case SWR_SET_PORT_MAP:
if (!data) {
dev_err(swrm->dev, "%s: data is NULL for id=%d\n",