blob: dcfb57b6f6ce834d251089e05fdb6a5294b68a83 [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +08001// SPDX-License-Identifier: GPL-2.0-only
Sanjana B51671612019-11-28 14:45:10 +05302/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303 */
4
5#include <linux/kernel.h>
6#include <linux/init.h>
Laxminath Kasam3d89d532019-10-09 23:18:03 +05307#include <linux/io.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05308#include <linux/err.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/of_device.h>
12#include <linux/platform_device.h>
13#include <linux/gpio.h>
14#include <linux/of_gpio.h>
Sudheer Papothi124ec092019-08-01 10:21:08 +053015#include <linux/pinctrl/qcom-pinctrl.h>
Meng Wang11a25cf2018-10-31 14:11:26 +080016#include <asoc/msm-cdc-pinctrl.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053017
Laxminath Kasamc39ed802019-09-16 13:05:53 +053018#define MAX_GPIOS 16
19
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053020struct msm_cdc_pinctrl_info {
21 struct pinctrl *pinctrl;
22 struct pinctrl_state *pinctrl_active;
23 struct pinctrl_state *pinctrl_sleep;
Sanjana B51671612019-11-28 14:45:10 +053024 struct pinctrl_state *pinctrl_alt_active;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053025 int gpio;
26 bool state;
Laxminath Kasamc39ed802019-09-16 13:05:53 +053027 u32 tlmm_gpio[MAX_GPIOS];
Laxminath Kasam3d89d532019-10-09 23:18:03 +053028 char __iomem *chip_wakeup_register[MAX_GPIOS];
29 u32 chip_wakeup_maskbit[MAX_GPIOS];
Laxminath Kasamc39ed802019-09-16 13:05:53 +053030 u32 count;
Laxminath Kasam3d89d532019-10-09 23:18:03 +053031 u32 wakeup_reg_count;
Sudheer Papothi124ec092019-08-01 10:21:08 +053032 bool wakeup_capable;
Laxminath Kasam3d89d532019-10-09 23:18:03 +053033 bool chip_wakeup_reg;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053034};
35
36static struct msm_cdc_pinctrl_info *msm_cdc_pinctrl_get_gpiodata(
37 struct device_node *np)
38{
39 struct platform_device *pdev;
40 struct msm_cdc_pinctrl_info *gpio_data;
41
42 if (!np) {
43 pr_err("%s: device node is null\n", __func__);
44 return NULL;
45 }
46
47 pdev = of_find_device_by_node(np);
48 if (!pdev) {
49 pr_err("%s: platform device not found!\n", __func__);
50 return NULL;
51 }
52
53 gpio_data = dev_get_drvdata(&pdev->dev);
54 if (!gpio_data)
55 dev_err(&pdev->dev, "%s: cannot find cdc gpio info\n",
56 __func__);
57
58 return gpio_data;
59}
60
61/*
62 * msm_cdc_get_gpio_state: select pinctrl sleep state
63 * @np: pointer to struct device_node
64 *
65 * Returns error code for failure and GPIO value on success
66 */
67int msm_cdc_get_gpio_state(struct device_node *np)
68{
69 struct msm_cdc_pinctrl_info *gpio_data;
70 int value = -EINVAL;
71
72 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
73 if (!gpio_data)
74 return value;
75
76 if (gpio_is_valid(gpio_data->gpio))
77 value = gpio_get_value_cansleep(gpio_data->gpio);
78
79 return value;
80}
81EXPORT_SYMBOL(msm_cdc_get_gpio_state);
82
83/*
84 * msm_cdc_pinctrl_select_sleep_state: select pinctrl sleep state
85 * @np: pointer to struct device_node
86 *
87 * Returns error code for failure
88 */
89int msm_cdc_pinctrl_select_sleep_state(struct device_node *np)
90{
91 struct msm_cdc_pinctrl_info *gpio_data;
92
93 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
94 if (!gpio_data)
95 return -EINVAL;
96
97 if (!gpio_data->pinctrl_sleep) {
98 pr_err("%s: pinctrl sleep state is null\n", __func__);
99 return -EINVAL;
100 }
101 gpio_data->state = false;
102
103 return pinctrl_select_state(gpio_data->pinctrl,
104 gpio_data->pinctrl_sleep);
105}
106EXPORT_SYMBOL(msm_cdc_pinctrl_select_sleep_state);
107
108/*
Sanjana B51671612019-11-28 14:45:10 +0530109 * msm_cdc_pinctrl_select_alt_active_state: select pinctrl alt_active state
110 * @np: pointer to struct device_node
111 *
112 * Returns error code for failure
113 */
114int msm_cdc_pinctrl_select_alt_active_state(struct device_node *np)
115{
116 struct msm_cdc_pinctrl_info *gpio_data;
117
118 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
119 if (!gpio_data)
120 return -EINVAL;
121
122 if (!gpio_data->pinctrl_alt_active) {
123 pr_err("%s: pinctrl alt_active state is null\n", __func__);
124 return -EINVAL;
125 }
126 gpio_data->state = true;
127
128 return pinctrl_select_state(gpio_data->pinctrl,
129 gpio_data->pinctrl_alt_active);
130}
131EXPORT_SYMBOL(msm_cdc_pinctrl_select_alt_active_state);
132
133/*
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530134 * msm_cdc_pinctrl_select_active_state: select pinctrl active state
135 * @np: pointer to struct device_node
136 *
137 * Returns error code for failure
138 */
139int msm_cdc_pinctrl_select_active_state(struct device_node *np)
140{
141 struct msm_cdc_pinctrl_info *gpio_data;
142
143 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
144 if (!gpio_data)
145 return -EINVAL;
146
147 if (!gpio_data->pinctrl_active) {
148 pr_err("%s: pinctrl active state is null\n", __func__);
149 return -EINVAL;
150 }
151 gpio_data->state = true;
152
153 return pinctrl_select_state(gpio_data->pinctrl,
154 gpio_data->pinctrl_active);
155}
156EXPORT_SYMBOL(msm_cdc_pinctrl_select_active_state);
157
158/*
159 * msm_cdc_pinctrl_get_state: get curren pinctrl state
160 * @np: pointer to struct device_node
161 *
Karthikeyan Mani326536d2019-06-03 13:29:43 -0700162 * Returns 0 for sleep state, 1 for active state,
163 * error code for failure
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530164 */
Karthikeyan Mani326536d2019-06-03 13:29:43 -0700165int msm_cdc_pinctrl_get_state(struct device_node *np)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530166{
167 struct msm_cdc_pinctrl_info *gpio_data;
168
169 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
170 if (!gpio_data)
171 return -EINVAL;
172
173 return gpio_data->state;
174}
175EXPORT_SYMBOL(msm_cdc_pinctrl_get_state);
176
Sudheer Papothi124ec092019-08-01 10:21:08 +0530177/*
178 * msm_cdc_pinctrl_set_wakeup_capable: Set a pinctrl to wakeup capable
179 * @np: pointer to struct device_node
180 * @enable: wakeup capable when set to true
181 *
182 * Returns 0 for success and error code for failure
183 */
184int msm_cdc_pinctrl_set_wakeup_capable(struct device_node *np, bool enable)
185{
186 struct msm_cdc_pinctrl_info *gpio_data;
187 int ret = 0;
Laxminath Kasam3d89d532019-10-09 23:18:03 +0530188 u32 i = 0, temp = 0;
Sudheer Papothi124ec092019-08-01 10:21:08 +0530189
190 gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
191 if (!gpio_data)
192 return -EINVAL;
193
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530194 if (gpio_data->wakeup_capable) {
195 for (i = 0; i < gpio_data->count; i++) {
196 ret = msm_gpio_mpm_wake_set(gpio_data->tlmm_gpio[i],
197 enable);
198 if (ret < 0)
199 goto exit;
200 }
201 }
Laxminath Kasam3d89d532019-10-09 23:18:03 +0530202 if (gpio_data->chip_wakeup_reg) {
203 for (i = 0; i < gpio_data->wakeup_reg_count; i++) {
204 temp = ioread32(gpio_data->chip_wakeup_register[i]);
205 if (enable)
206 temp |= (1 <<
207 gpio_data->chip_wakeup_maskbit[i]);
208 else
209 temp &= ~(1 <<
210 gpio_data->chip_wakeup_maskbit[i]);
211 iowrite32(temp, gpio_data->chip_wakeup_register[i]);
212 }
213 }
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530214exit:
Sudheer Papothi124ec092019-08-01 10:21:08 +0530215 return ret;
216}
217EXPORT_SYMBOL(msm_cdc_pinctrl_set_wakeup_capable);
218
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530219static int msm_cdc_pinctrl_probe(struct platform_device *pdev)
220{
221 int ret = 0;
222 struct msm_cdc_pinctrl_info *gpio_data;
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530223 u32 tlmm_gpio[MAX_GPIOS] = {0};
Laxminath Kasam3d89d532019-10-09 23:18:03 +0530224 u32 chip_wakeup_reg[MAX_GPIOS] = {0};
Laxminath Kasam0f738192019-11-06 13:00:46 +0530225 u32 chip_wakeup_default_val[MAX_GPIOS] = {0};
226 u32 i = 0, temp = 0;
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530227 int count = 0;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530228
229 gpio_data = devm_kzalloc(&pdev->dev,
230 sizeof(struct msm_cdc_pinctrl_info),
231 GFP_KERNEL);
232 if (!gpio_data)
233 return -ENOMEM;
234
235 gpio_data->pinctrl = devm_pinctrl_get(&pdev->dev);
236 if (IS_ERR_OR_NULL(gpio_data->pinctrl)) {
237 dev_err(&pdev->dev, "%s: Cannot get cdc gpio pinctrl:%ld\n",
238 __func__, PTR_ERR(gpio_data->pinctrl));
239 ret = PTR_ERR(gpio_data->pinctrl);
240 goto err_pctrl_get;
241 }
242
243 gpio_data->pinctrl_active = pinctrl_lookup_state(
244 gpio_data->pinctrl, "aud_active");
245 if (IS_ERR_OR_NULL(gpio_data->pinctrl_active)) {
246 dev_err(&pdev->dev, "%s: Cannot get aud_active pinctrl state:%ld\n",
247 __func__, PTR_ERR(gpio_data->pinctrl_active));
248 ret = PTR_ERR(gpio_data->pinctrl_active);
249 goto err_lookup_state;
250 }
251
252 gpio_data->pinctrl_sleep = pinctrl_lookup_state(
253 gpio_data->pinctrl, "aud_sleep");
254 if (IS_ERR_OR_NULL(gpio_data->pinctrl_sleep)) {
255 dev_err(&pdev->dev, "%s: Cannot get aud_sleep pinctrl state:%ld\n",
256 __func__, PTR_ERR(gpio_data->pinctrl_sleep));
257 ret = PTR_ERR(gpio_data->pinctrl_sleep);
258 goto err_lookup_state;
259 }
Sanjana B51671612019-11-28 14:45:10 +0530260
261 gpio_data->pinctrl_alt_active = pinctrl_lookup_state(
262 gpio_data->pinctrl, "aud_alt_active");
263 if (IS_ERR_OR_NULL(gpio_data->pinctrl_alt_active)) {
264 dev_dbg(&pdev->dev, "%s: Cannot get aud_alt_active pinctrl state:%ld\n",
265 __func__, PTR_ERR(gpio_data->pinctrl_alt_active));
266 }
267
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530268 /* skip setting to sleep state for LPI_TLMM GPIOs */
269 if (!of_property_read_bool(pdev->dev.of_node, "qcom,lpi-gpios")) {
270 /* Set pinctrl state to aud_sleep by default */
271 ret = pinctrl_select_state(gpio_data->pinctrl,
272 gpio_data->pinctrl_sleep);
273 if (ret)
274 dev_err(&pdev->dev, "%s: set cdc gpio sleep state fail: %d\n",
275 __func__, ret);
276 }
277
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530278
Laxminath Kasam3d89d532019-10-09 23:18:03 +0530279 count = of_property_count_u32_elems(pdev->dev.of_node, "qcom,chip-wakeup-reg");
280 if (count <= 0)
281 goto cdc_tlmm_gpio;
282 if (!of_property_read_u32_array(pdev->dev.of_node, "qcom,chip-wakeup-reg",
283 chip_wakeup_reg, count)) {
284 if (of_property_read_u32_array(pdev->dev.of_node,
285 "qcom,chip-wakeup-maskbit",
286 gpio_data->chip_wakeup_maskbit, count)) {
287 dev_err(&pdev->dev,
288 "chip-wakeup-maskbit needed if chip-wakeup-reg is defined!\n");
289 goto cdc_tlmm_gpio;
290 }
291 gpio_data->chip_wakeup_reg = true;
292 for (i = 0; i < count; i++) {
293 gpio_data->chip_wakeup_register[i] =
294 devm_ioremap(&pdev->dev, chip_wakeup_reg[i], 0x4);
295 }
Laxminath Kasamaffb8792019-11-26 16:04:17 +0530296 if (!of_property_read_u32_array(pdev->dev.of_node,
Laxminath Kasam0f738192019-11-06 13:00:46 +0530297 "qcom,chip-wakeup-default-val",
298 chip_wakeup_default_val, count)) {
299 for (i = 0; i < count; i++) {
300 temp = ioread32(gpio_data->chip_wakeup_register[i]);
301 if (chip_wakeup_default_val[i])
302 temp |= (1 <<
303 gpio_data->chip_wakeup_maskbit[i]);
304 else
305 temp &= ~(1 <<
306 gpio_data->chip_wakeup_maskbit[i]);
307 iowrite32(temp, gpio_data->chip_wakeup_register[i]);
308 }
309 }
Laxminath Kasam3d89d532019-10-09 23:18:03 +0530310 gpio_data->wakeup_reg_count = count;
311 }
312
313cdc_tlmm_gpio:
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530314 count = of_property_count_u32_elems(pdev->dev.of_node, "qcom,tlmm-gpio");
315 if (count <= 0)
316 goto cdc_rst;
317 if (!of_property_read_u32_array(pdev->dev.of_node, "qcom,tlmm-gpio",
318 tlmm_gpio, count)) {
Sudheer Papothi124ec092019-08-01 10:21:08 +0530319 gpio_data->wakeup_capable = true;
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530320 for (i = 0; i < count; i++)
321 gpio_data->tlmm_gpio[i] = tlmm_gpio[i];
322 gpio_data->count = count;
Sudheer Papothi124ec092019-08-01 10:21:08 +0530323 }
324
Laxminath Kasamc39ed802019-09-16 13:05:53 +0530325cdc_rst:
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530326 gpio_data->gpio = of_get_named_gpio(pdev->dev.of_node,
327 "qcom,cdc-rst-n-gpio", 0);
328 if (gpio_is_valid(gpio_data->gpio)) {
329 ret = gpio_request(gpio_data->gpio, "MSM_CDC_RESET");
330 if (ret) {
331 dev_err(&pdev->dev, "%s: Failed to request gpio %d\n",
332 __func__, gpio_data->gpio);
333 goto err_lookup_state;
334 }
335 }
336
337 dev_set_drvdata(&pdev->dev, gpio_data);
338 return 0;
339
340err_lookup_state:
341 devm_pinctrl_put(gpio_data->pinctrl);
342err_pctrl_get:
343 devm_kfree(&pdev->dev, gpio_data);
344 return ret;
345}
346
347static int msm_cdc_pinctrl_remove(struct platform_device *pdev)
348{
349 struct msm_cdc_pinctrl_info *gpio_data;
350
351 gpio_data = dev_get_drvdata(&pdev->dev);
352
Laxminath Kasam8f7ccc22017-08-28 17:35:04 +0530353 /* to free the requested gpio before exiting */
354 if (gpio_data) {
355 if (gpio_is_valid(gpio_data->gpio))
356 gpio_free(gpio_data->gpio);
357
358 if (gpio_data->pinctrl)
359 devm_pinctrl_put(gpio_data->pinctrl);
360 }
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530361
362 devm_kfree(&pdev->dev, gpio_data);
363
364 return 0;
365}
366
367static const struct of_device_id msm_cdc_pinctrl_match[] = {
368 {.compatible = "qcom,msm-cdc-pinctrl"},
369 {}
370};
371
372static struct platform_driver msm_cdc_pinctrl_driver = {
373 .driver = {
374 .name = "msm-cdc-pinctrl",
375 .owner = THIS_MODULE,
376 .of_match_table = msm_cdc_pinctrl_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800377 .suppress_bind_attrs = true,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530378 },
379 .probe = msm_cdc_pinctrl_probe,
380 .remove = msm_cdc_pinctrl_remove,
381};
382
383int msm_cdc_pinctrl_drv_init(void)
384{
385 return platform_driver_register(&msm_cdc_pinctrl_driver);
386}
387
388void msm_cdc_pinctrl_drv_exit(void)
389{
390 platform_driver_unregister(&msm_cdc_pinctrl_driver);
391}
392MODULE_DESCRIPTION("MSM CODEC pin control platform driver");
393MODULE_LICENSE("GPL v2");