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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 4d6a6dc9e3aeaa351ba6e8f88863e058fc61c5a6 / . / asoc / codecs / msm_sdw / msm-sdw-tables.c
blob: a332c5b0a23252bc1346e064479e33a7fc4930d2 [file] [log] [blame]
Soumya Managolid11d6f02020-05-27 17:25:12 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2016-2017, 2020, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/types.h>
7#include "msm_sdw.h"
8
9const u8 msm_sdw_page_map[MSM_SDW_MAX_REGISTER] = {
10 [MSM_SDW_TX9_SPKR_PROT_PATH_CTL] = 0xa,
11 [MSM_SDW_TX9_SPKR_PROT_PATH_CFG0] = 0xa,
12 [MSM_SDW_TX10_SPKR_PROT_PATH_CTL] = 0xa,
13 [MSM_SDW_TX10_SPKR_PROT_PATH_CFG0] = 0xa,
14 [MSM_SDW_TX11_SPKR_PROT_PATH_CTL] = 0xa,
15 [MSM_SDW_TX11_SPKR_PROT_PATH_CFG0] = 0xa,
16 [MSM_SDW_TX12_SPKR_PROT_PATH_CTL] = 0xa,
17 [MSM_SDW_TX12_SPKR_PROT_PATH_CFG0] = 0xa,
18 [MSM_SDW_COMPANDER7_CTL0] = 0xb,
19 [MSM_SDW_COMPANDER7_CTL1] = 0xb,
20 [MSM_SDW_COMPANDER7_CTL2] = 0xb,
21 [MSM_SDW_COMPANDER7_CTL3] = 0xb,
22 [MSM_SDW_COMPANDER7_CTL4] = 0xb,
23 [MSM_SDW_COMPANDER7_CTL5] = 0xb,
24 [MSM_SDW_COMPANDER7_CTL6] = 0xb,
25 [MSM_SDW_COMPANDER7_CTL7] = 0xb,
26 [MSM_SDW_COMPANDER8_CTL0] = 0xb,
27 [MSM_SDW_COMPANDER8_CTL1] = 0xb,
28 [MSM_SDW_COMPANDER8_CTL2] = 0xb,
29 [MSM_SDW_COMPANDER8_CTL3] = 0xb,
30 [MSM_SDW_COMPANDER8_CTL4] = 0xb,
31 [MSM_SDW_COMPANDER8_CTL5] = 0xb,
32 [MSM_SDW_COMPANDER8_CTL6] = 0xb,
33 [MSM_SDW_COMPANDER8_CTL7] = 0xb,
34 [MSM_SDW_RX7_RX_PATH_CTL] = 0xb,
35 [MSM_SDW_RX7_RX_PATH_CFG0] = 0xb,
36 [MSM_SDW_RX7_RX_PATH_CFG1] = 0xb,
37 [MSM_SDW_RX7_RX_PATH_CFG2] = 0xb,
38 [MSM_SDW_RX7_RX_VOL_CTL] = 0xb,
39 [MSM_SDW_RX7_RX_PATH_MIX_CTL] = 0xb,
40 [MSM_SDW_RX7_RX_PATH_MIX_CFG] = 0xb,
41 [MSM_SDW_RX7_RX_VOL_MIX_CTL] = 0xb,
42 [MSM_SDW_RX7_RX_PATH_SEC0] = 0xb,
43 [MSM_SDW_RX7_RX_PATH_SEC1] = 0xb,
44 [MSM_SDW_RX7_RX_PATH_SEC2] = 0xb,
45 [MSM_SDW_RX7_RX_PATH_SEC3] = 0xb,
46 [MSM_SDW_RX7_RX_PATH_SEC5] = 0xb,
47 [MSM_SDW_RX7_RX_PATH_SEC6] = 0xb,
48 [MSM_SDW_RX7_RX_PATH_SEC7] = 0xb,
49 [MSM_SDW_RX7_RX_PATH_MIX_SEC0] = 0xb,
50 [MSM_SDW_RX7_RX_PATH_MIX_SEC1] = 0xb,
51 [MSM_SDW_RX8_RX_PATH_CTL] = 0xb,
52 [MSM_SDW_RX8_RX_PATH_CFG0] = 0xb,
53 [MSM_SDW_RX8_RX_PATH_CFG1] = 0xb,
54 [MSM_SDW_RX8_RX_PATH_CFG2] = 0xb,
55 [MSM_SDW_RX8_RX_VOL_CTL] = 0xb,
56 [MSM_SDW_RX8_RX_PATH_MIX_CTL] = 0xb,
57 [MSM_SDW_RX8_RX_PATH_MIX_CFG] = 0xb,
58 [MSM_SDW_RX8_RX_VOL_MIX_CTL] = 0xb,
59 [MSM_SDW_RX8_RX_PATH_SEC0] = 0xb,
60 [MSM_SDW_RX8_RX_PATH_SEC1] = 0xb,
61 [MSM_SDW_RX8_RX_PATH_SEC2] = 0xb,
62 [MSM_SDW_RX8_RX_PATH_SEC3] = 0xb,
63 [MSM_SDW_RX8_RX_PATH_SEC5] = 0xb,
64 [MSM_SDW_RX8_RX_PATH_SEC6] = 0xb,
65 [MSM_SDW_RX8_RX_PATH_SEC7] = 0xb,
66 [MSM_SDW_RX8_RX_PATH_MIX_SEC0] = 0xb,
67 [MSM_SDW_RX8_RX_PATH_MIX_SEC1] = 0xb,
68 [MSM_SDW_BOOST0_BOOST_PATH_CTL] = 0xc,
69 [MSM_SDW_BOOST0_BOOST_CTL] = 0xc,
70 [MSM_SDW_BOOST0_BOOST_CFG1] = 0xc,
71 [MSM_SDW_BOOST0_BOOST_CFG2] = 0xc,
72 [MSM_SDW_BOOST1_BOOST_PATH_CTL] = 0xc,
73 [MSM_SDW_BOOST1_BOOST_CTL] = 0xc,
74 [MSM_SDW_BOOST1_BOOST_CFG1] = 0xc,
75 [MSM_SDW_BOOST1_BOOST_CFG2] = 0xc,
76 [MSM_SDW_AHB_BRIDGE_WR_DATA_0] = 0xc,
77 [MSM_SDW_AHB_BRIDGE_WR_DATA_1] = 0xc,
78 [MSM_SDW_AHB_BRIDGE_WR_DATA_2] = 0xc,
79 [MSM_SDW_AHB_BRIDGE_WR_DATA_3] = 0xc,
80 [MSM_SDW_AHB_BRIDGE_WR_ADDR_0] = 0xc,
81 [MSM_SDW_AHB_BRIDGE_WR_ADDR_1] = 0xc,
82 [MSM_SDW_AHB_BRIDGE_WR_ADDR_2] = 0xc,
83 [MSM_SDW_AHB_BRIDGE_WR_ADDR_3] = 0xc,
84 [MSM_SDW_AHB_BRIDGE_RD_ADDR_0] = 0xc,
85 [MSM_SDW_AHB_BRIDGE_RD_ADDR_1] = 0xc,
86 [MSM_SDW_AHB_BRIDGE_RD_ADDR_2] = 0xc,
87 [MSM_SDW_AHB_BRIDGE_RD_ADDR_3] = 0xc,
88 [MSM_SDW_AHB_BRIDGE_RD_DATA_0] = 0xc,
89 [MSM_SDW_AHB_BRIDGE_RD_DATA_1] = 0xc,
90 [MSM_SDW_AHB_BRIDGE_RD_DATA_2] = 0xc,
91 [MSM_SDW_AHB_BRIDGE_RD_DATA_3] = 0xc,
92 [MSM_SDW_AHB_BRIDGE_ACCESS_CFG] = 0xc,
93 [MSM_SDW_AHB_BRIDGE_ACCESS_STATUS] = 0xc,
94 [MSM_SDW_CLK_RST_CTRL_MCLK_CONTROL] = 0xd,
95 [MSM_SDW_CLK_RST_CTRL_FS_CNT_CONTROL] = 0xd,
96 [MSM_SDW_CLK_RST_CTRL_SWR_CONTROL] = 0xd,
97 [MSM_SDW_TOP_TOP_CFG0] = 0xd,
98 [MSM_SDW_TOP_TOP_CFG1] = 0xd,
99 [MSM_SDW_TOP_RX_I2S_CTL] = 0xd,
100 [MSM_SDW_TOP_TX_I2S_CTL] = 0xd,
101 [MSM_SDW_TOP_I2S_CLK] = 0xd,
102 [MSM_SDW_TOP_RX7_PATH_INPUT0_MUX] = 0xd,
103 [MSM_SDW_TOP_RX7_PATH_INPUT1_MUX] = 0xd,
104 [MSM_SDW_TOP_RX8_PATH_INPUT0_MUX] = 0xd,
105 [MSM_SDW_TOP_RX8_PATH_INPUT1_MUX] = 0xd,
106 [MSM_SDW_TOP_FREQ_MCLK] = 0xd,
107 [MSM_SDW_TOP_DEBUG_BUS_SEL] = 0xd,
108 [MSM_SDW_TOP_DEBUG_EN] = 0xd,
109 [MSM_SDW_TOP_I2S_RESET] = 0xd,
110 [MSM_SDW_TOP_BLOCKS_RESET] = 0xd,
111};
112
113const u8 msm_sdw_reg_readable[MSM_SDW_MAX_REGISTER] = {
114 [MSM_SDW_PAGE_REGISTER] = 1,
115 [MSM_SDW_TX9_SPKR_PROT_PATH_CTL] = 1,
116 [MSM_SDW_TX9_SPKR_PROT_PATH_CFG0] = 1,
117 [MSM_SDW_TX10_SPKR_PROT_PATH_CTL] = 1,
118 [MSM_SDW_TX10_SPKR_PROT_PATH_CFG0] = 1,
119 [MSM_SDW_TX11_SPKR_PROT_PATH_CTL] = 1,
120 [MSM_SDW_TX11_SPKR_PROT_PATH_CFG0] = 1,
121 [MSM_SDW_TX12_SPKR_PROT_PATH_CTL] = 1,
122 [MSM_SDW_TX12_SPKR_PROT_PATH_CFG0] = 1,
123 [MSM_SDW_COMPANDER7_CTL0] = 1,
124 [MSM_SDW_COMPANDER7_CTL1] = 1,
125 [MSM_SDW_COMPANDER7_CTL2] = 1,
126 [MSM_SDW_COMPANDER7_CTL3] = 1,
127 [MSM_SDW_COMPANDER7_CTL4] = 1,
128 [MSM_SDW_COMPANDER7_CTL5] = 1,
129 [MSM_SDW_COMPANDER7_CTL6] = 1,
130 [MSM_SDW_COMPANDER7_CTL7] = 1,
131 [MSM_SDW_COMPANDER8_CTL0] = 1,
132 [MSM_SDW_COMPANDER8_CTL1] = 1,
133 [MSM_SDW_COMPANDER8_CTL2] = 1,
134 [MSM_SDW_COMPANDER8_CTL3] = 1,
135 [MSM_SDW_COMPANDER8_CTL4] = 1,
136 [MSM_SDW_COMPANDER8_CTL5] = 1,
137 [MSM_SDW_COMPANDER8_CTL6] = 1,
138 [MSM_SDW_COMPANDER8_CTL7] = 1,
139 [MSM_SDW_RX7_RX_PATH_CTL] = 1,
140 [MSM_SDW_RX7_RX_PATH_CFG0] = 1,
141 [MSM_SDW_RX7_RX_PATH_CFG1] = 1,
142 [MSM_SDW_RX7_RX_PATH_CFG2] = 1,
143 [MSM_SDW_RX7_RX_VOL_CTL] = 1,
144 [MSM_SDW_RX7_RX_PATH_MIX_CTL] = 1,
145 [MSM_SDW_RX7_RX_PATH_MIX_CFG] = 1,
146 [MSM_SDW_RX7_RX_VOL_MIX_CTL] = 1,
147 [MSM_SDW_RX7_RX_PATH_SEC0] = 1,
148 [MSM_SDW_RX7_RX_PATH_SEC1] = 1,
149 [MSM_SDW_RX7_RX_PATH_SEC2] = 1,
150 [MSM_SDW_RX7_RX_PATH_SEC3] = 1,
151 [MSM_SDW_RX7_RX_PATH_SEC5] = 1,
152 [MSM_SDW_RX7_RX_PATH_SEC6] = 1,
153 [MSM_SDW_RX7_RX_PATH_SEC7] = 1,
154 [MSM_SDW_RX7_RX_PATH_MIX_SEC0] = 1,
155 [MSM_SDW_RX7_RX_PATH_MIX_SEC1] = 1,
156 [MSM_SDW_RX8_RX_PATH_CTL] = 1,
157 [MSM_SDW_RX8_RX_PATH_CFG0] = 1,
158 [MSM_SDW_RX8_RX_PATH_CFG1] = 1,
159 [MSM_SDW_RX8_RX_PATH_CFG2] = 1,
160 [MSM_SDW_RX8_RX_VOL_CTL] = 1,
161 [MSM_SDW_RX8_RX_PATH_MIX_CTL] = 1,
162 [MSM_SDW_RX8_RX_PATH_MIX_CFG] = 1,
163 [MSM_SDW_RX8_RX_VOL_MIX_CTL] = 1,
164 [MSM_SDW_RX8_RX_PATH_SEC0] = 1,
165 [MSM_SDW_RX8_RX_PATH_SEC1] = 1,
166 [MSM_SDW_RX8_RX_PATH_SEC2] = 1,
167 [MSM_SDW_RX8_RX_PATH_SEC3] = 1,
168 [MSM_SDW_RX8_RX_PATH_SEC5] = 1,
169 [MSM_SDW_RX8_RX_PATH_SEC6] = 1,
170 [MSM_SDW_RX8_RX_PATH_SEC7] = 1,
171 [MSM_SDW_RX8_RX_PATH_MIX_SEC0] = 1,
172 [MSM_SDW_RX8_RX_PATH_MIX_SEC1] = 1,
173 [MSM_SDW_BOOST0_BOOST_PATH_CTL] = 1,
174 [MSM_SDW_BOOST0_BOOST_CTL] = 1,
175 [MSM_SDW_BOOST0_BOOST_CFG1] = 1,
176 [MSM_SDW_BOOST0_BOOST_CFG2] = 1,
177 [MSM_SDW_BOOST1_BOOST_PATH_CTL] = 1,
178 [MSM_SDW_BOOST1_BOOST_CTL] = 1,
179 [MSM_SDW_BOOST1_BOOST_CFG1] = 1,
180 [MSM_SDW_BOOST1_BOOST_CFG2] = 1,
181 [MSM_SDW_AHB_BRIDGE_WR_DATA_0] = 1,
182 [MSM_SDW_AHB_BRIDGE_WR_DATA_1] = 1,
183 [MSM_SDW_AHB_BRIDGE_WR_DATA_2] = 1,
184 [MSM_SDW_AHB_BRIDGE_WR_DATA_3] = 1,
185 [MSM_SDW_AHB_BRIDGE_WR_ADDR_0] = 1,
186 [MSM_SDW_AHB_BRIDGE_WR_ADDR_1] = 1,
187 [MSM_SDW_AHB_BRIDGE_WR_ADDR_2] = 1,
188 [MSM_SDW_AHB_BRIDGE_WR_ADDR_3] = 1,
189 [MSM_SDW_AHB_BRIDGE_RD_ADDR_0] = 1,
190 [MSM_SDW_AHB_BRIDGE_RD_ADDR_1] = 1,
191 [MSM_SDW_AHB_BRIDGE_RD_ADDR_2] = 1,
192 [MSM_SDW_AHB_BRIDGE_RD_ADDR_3] = 1,
193 [MSM_SDW_AHB_BRIDGE_RD_DATA_0] = 1,
194 [MSM_SDW_AHB_BRIDGE_RD_DATA_1] = 1,
195 [MSM_SDW_AHB_BRIDGE_RD_DATA_2] = 1,
196 [MSM_SDW_AHB_BRIDGE_RD_DATA_3] = 1,
197 [MSM_SDW_AHB_BRIDGE_ACCESS_CFG] = 1,
198 [MSM_SDW_AHB_BRIDGE_ACCESS_STATUS] = 1,
199 [MSM_SDW_CLK_RST_CTRL_MCLK_CONTROL] = 1,
200 [MSM_SDW_CLK_RST_CTRL_FS_CNT_CONTROL] = 1,
201 [MSM_SDW_CLK_RST_CTRL_SWR_CONTROL] = 1,
202 [MSM_SDW_TOP_TOP_CFG0] = 1,
203 [MSM_SDW_TOP_TOP_CFG1] = 1,
204 [MSM_SDW_TOP_RX_I2S_CTL] = 1,
205 [MSM_SDW_TOP_TX_I2S_CTL] = 1,
206 [MSM_SDW_TOP_RX7_PATH_INPUT0_MUX] = 1,
207 [MSM_SDW_TOP_RX7_PATH_INPUT1_MUX] = 1,
208 [MSM_SDW_TOP_RX8_PATH_INPUT0_MUX] = 1,
209 [MSM_SDW_TOP_RX8_PATH_INPUT1_MUX] = 1,
210 [MSM_SDW_TOP_FREQ_MCLK] = 1,
211 [MSM_SDW_TOP_DEBUG_BUS_SEL] = 1,
212 [MSM_SDW_TOP_DEBUG_EN] = 1,
213 [MSM_SDW_TOP_I2S_RESET] = 1,
214 [MSM_SDW_TOP_BLOCKS_RESET] = 1,
215};
216
217const u8 msm_sdw_reg_writeable[MSM_SDW_MAX_REGISTER] = {
218 [MSM_SDW_PAGE_REGISTER] = 1,
219 [MSM_SDW_TX9_SPKR_PROT_PATH_CTL] = 1,
220 [MSM_SDW_TX9_SPKR_PROT_PATH_CFG0] = 1,
221 [MSM_SDW_TX10_SPKR_PROT_PATH_CTL] = 1,
222 [MSM_SDW_TX10_SPKR_PROT_PATH_CFG0] = 1,
223 [MSM_SDW_TX11_SPKR_PROT_PATH_CTL] = 1,
224 [MSM_SDW_TX11_SPKR_PROT_PATH_CFG0] = 1,
225 [MSM_SDW_TX12_SPKR_PROT_PATH_CTL] = 1,
226 [MSM_SDW_TX12_SPKR_PROT_PATH_CFG0] = 1,
227 [MSM_SDW_COMPANDER7_CTL0] = 1,
228 [MSM_SDW_COMPANDER7_CTL1] = 1,
229 [MSM_SDW_COMPANDER7_CTL2] = 1,
230 [MSM_SDW_COMPANDER7_CTL3] = 1,
231 [MSM_SDW_COMPANDER7_CTL4] = 1,
232 [MSM_SDW_COMPANDER7_CTL5] = 1,
233 [MSM_SDW_COMPANDER7_CTL7] = 1,
234 [MSM_SDW_COMPANDER8_CTL0] = 1,
235 [MSM_SDW_COMPANDER8_CTL1] = 1,
236 [MSM_SDW_COMPANDER8_CTL2] = 1,
237 [MSM_SDW_COMPANDER8_CTL3] = 1,
238 [MSM_SDW_COMPANDER8_CTL4] = 1,
239 [MSM_SDW_COMPANDER8_CTL5] = 1,
240 [MSM_SDW_COMPANDER8_CTL7] = 1,
241 [MSM_SDW_RX7_RX_PATH_CTL] = 1,
242 [MSM_SDW_RX7_RX_PATH_CFG0] = 1,
243 [MSM_SDW_RX7_RX_PATH_CFG1] = 1,
244 [MSM_SDW_RX7_RX_PATH_CFG2] = 1,
245 [MSM_SDW_RX7_RX_VOL_CTL] = 1,
246 [MSM_SDW_RX7_RX_PATH_MIX_CTL] = 1,
247 [MSM_SDW_RX7_RX_PATH_MIX_CFG] = 1,
248 [MSM_SDW_RX7_RX_VOL_MIX_CTL] = 1,
249 [MSM_SDW_RX7_RX_PATH_SEC0] = 1,
250 [MSM_SDW_RX7_RX_PATH_SEC1] = 1,
251 [MSM_SDW_RX7_RX_PATH_SEC2] = 1,
252 [MSM_SDW_RX7_RX_PATH_SEC3] = 1,
253 [MSM_SDW_RX7_RX_PATH_SEC5] = 1,
254 [MSM_SDW_RX7_RX_PATH_SEC6] = 1,
255 [MSM_SDW_RX7_RX_PATH_SEC7] = 1,
256 [MSM_SDW_RX7_RX_PATH_MIX_SEC0] = 1,
257 [MSM_SDW_RX7_RX_PATH_MIX_SEC1] = 1,
258 [MSM_SDW_RX8_RX_PATH_CTL] = 1,
259 [MSM_SDW_RX8_RX_PATH_CFG0] = 1,
260 [MSM_SDW_RX8_RX_PATH_CFG1] = 1,
261 [MSM_SDW_RX8_RX_PATH_CFG2] = 1,
262 [MSM_SDW_RX8_RX_VOL_CTL] = 1,
263 [MSM_SDW_RX8_RX_PATH_MIX_CTL] = 1,
264 [MSM_SDW_RX8_RX_PATH_MIX_CFG] = 1,
265 [MSM_SDW_RX8_RX_VOL_MIX_CTL] = 1,
266 [MSM_SDW_RX8_RX_PATH_SEC0] = 1,
267 [MSM_SDW_RX8_RX_PATH_SEC1] = 1,
268 [MSM_SDW_RX8_RX_PATH_SEC2] = 1,
269 [MSM_SDW_RX8_RX_PATH_SEC3] = 1,
270 [MSM_SDW_RX8_RX_PATH_SEC5] = 1,
271 [MSM_SDW_RX8_RX_PATH_SEC6] = 1,
272 [MSM_SDW_RX8_RX_PATH_SEC7] = 1,
273 [MSM_SDW_RX8_RX_PATH_MIX_SEC0] = 1,
274 [MSM_SDW_RX8_RX_PATH_MIX_SEC1] = 1,
275 [MSM_SDW_BOOST0_BOOST_PATH_CTL] = 1,
276 [MSM_SDW_BOOST0_BOOST_CTL] = 1,
277 [MSM_SDW_BOOST0_BOOST_CFG1] = 1,
278 [MSM_SDW_BOOST0_BOOST_CFG2] = 1,
279 [MSM_SDW_BOOST1_BOOST_PATH_CTL] = 1,
280 [MSM_SDW_BOOST1_BOOST_CTL] = 1,
281 [MSM_SDW_BOOST1_BOOST_CFG1] = 1,
282 [MSM_SDW_BOOST1_BOOST_CFG2] = 1,
283 [MSM_SDW_AHB_BRIDGE_WR_DATA_0] = 1,
284 [MSM_SDW_AHB_BRIDGE_WR_DATA_1] = 1,
285 [MSM_SDW_AHB_BRIDGE_WR_DATA_2] = 1,
286 [MSM_SDW_AHB_BRIDGE_WR_DATA_3] = 1,
287 [MSM_SDW_AHB_BRIDGE_WR_ADDR_0] = 1,
288 [MSM_SDW_AHB_BRIDGE_WR_ADDR_1] = 1,
289 [MSM_SDW_AHB_BRIDGE_WR_ADDR_2] = 1,
290 [MSM_SDW_AHB_BRIDGE_WR_ADDR_3] = 1,
291 [MSM_SDW_AHB_BRIDGE_RD_ADDR_0] = 1,
292 [MSM_SDW_AHB_BRIDGE_RD_ADDR_1] = 1,
293 [MSM_SDW_AHB_BRIDGE_RD_ADDR_2] = 1,
294 [MSM_SDW_AHB_BRIDGE_RD_ADDR_3] = 1,
295 [MSM_SDW_AHB_BRIDGE_ACCESS_CFG] = 1,
296 [MSM_SDW_CLK_RST_CTRL_MCLK_CONTROL] = 1,
297 [MSM_SDW_CLK_RST_CTRL_FS_CNT_CONTROL] = 1,
298 [MSM_SDW_CLK_RST_CTRL_SWR_CONTROL] = 1,
299 [MSM_SDW_TOP_TOP_CFG0] = 1,
300 [MSM_SDW_TOP_TOP_CFG1] = 1,
301 [MSM_SDW_TOP_RX_I2S_CTL] = 1,
302 [MSM_SDW_TOP_TX_I2S_CTL] = 1,
303 [MSM_SDW_TOP_RX7_PATH_INPUT0_MUX] = 1,
304 [MSM_SDW_TOP_RX7_PATH_INPUT1_MUX] = 1,
305 [MSM_SDW_TOP_RX8_PATH_INPUT0_MUX] = 1,
306 [MSM_SDW_TOP_RX8_PATH_INPUT1_MUX] = 1,
307 [MSM_SDW_TOP_FREQ_MCLK] = 1,
308 [MSM_SDW_TOP_DEBUG_BUS_SEL] = 1,
309 [MSM_SDW_TOP_DEBUG_EN] = 1,
310 [MSM_SDW_TOP_I2S_RESET] = 1,
311 [MSM_SDW_TOP_BLOCKS_RESET] = 1,
312};