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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 53cd13a1ab325e0f4efb766d6e51a6c36dfef157 / . / asoc / kona.c
blob: 84d79fe5928909223ff2db5d79c99161c27baec2 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]76#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]77
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]78enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
94 TDM_INTERFACE_MAX,
95};
96
97enum {
98 PRIM_AUX_PCM = 0,
99 SEC_AUX_PCM,
100 TERT_AUX_PCM,
101 AUX_PCM_MAX,
102};
103
104enum {
105 PRIM_MI2S = 0,
106 SEC_MI2S,
107 TERT_MI2S,
108 MI2S_MAX,
109};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]110
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]111enum {
112 WSA_CDC_DMA_RX_0 = 0,
113 WSA_CDC_DMA_RX_1,
114 RX_CDC_DMA_RX_0,
115 RX_CDC_DMA_RX_1,
116 RX_CDC_DMA_RX_2,
117 RX_CDC_DMA_RX_3,
118 RX_CDC_DMA_RX_5,
119 CDC_DMA_RX_MAX,
120};
121
122enum {
123 WSA_CDC_DMA_TX_0 = 0,
124 WSA_CDC_DMA_TX_1,
125 WSA_CDC_DMA_TX_2,
126 TX_CDC_DMA_TX_0,
127 TX_CDC_DMA_TX_3,
128 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]129 VA_CDC_DMA_TX_0,
130 VA_CDC_DMA_TX_1,
131 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]132 CDC_DMA_TX_MAX,
133};
134
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]135enum {
136 SLIM_RX_7 = 0,
137 SLIM_RX_MAX,
138};
139enum {
140 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]141 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]142 SLIM_TX_MAX,
143};
144
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]145enum {
146 AFE_LOOPBACK_TX_IDX = 0,
147 AFE_LOOPBACK_TX_IDX_MAX,
148};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]149struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]150 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]151 int usbc_en2_gpio; /* used by gpio driver API */
152 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
153 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
154 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
155 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
156 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
157 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
158 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
159 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]160 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]161};
162
163struct tdm_port {
164 u32 mode;
165 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]166};
167
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]168enum {
169 EXT_DISP_RX_IDX_DP = 0,
170 EXT_DISP_RX_IDX_MAX,
171};
172
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]173struct msm_wsa881x_dev_info {
174 struct device_node *of_node;
175 u32 index;
176};
177
178struct aux_codec_dev_info {
179 struct device_node *of_node;
180 u32 index;
181};
182
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]183struct dev_config {
184 u32 sample_rate;
185 u32 bit_format;
186 u32 channels;
187};
188
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]189/* Default configuration of slimbus channels */
190static struct dev_config slim_rx_cfg[] = {
191 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
192};
193
194static struct dev_config slim_tx_cfg[] = {
195 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]196 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]197};
198
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]199/* Default configuration of external display BE */
200static struct dev_config ext_disp_rx_cfg[] = {
201 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
202};
203
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]204static struct dev_config usb_rx_cfg = {
205 .sample_rate = SAMPLING_RATE_48KHZ,
206 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
207 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]208};
209
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]210static struct dev_config usb_tx_cfg = {
211 .sample_rate = SAMPLING_RATE_48KHZ,
212 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
213 .channels = 1,
214};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]215
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]216static struct dev_config proxy_rx_cfg = {
217 .sample_rate = SAMPLING_RATE_48KHZ,
218 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
219 .channels = 2,
220};
221
222static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
223 {
224 AFE_API_VERSION_I2S_CONFIG,
225 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
226 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
227 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
228 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
229 0,
230 },
231 {
232 AFE_API_VERSION_I2S_CONFIG,
233 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
234 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
235 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
236 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
237 0,
238 },
239 {
240 AFE_API_VERSION_I2S_CONFIG,
241 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
242 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
243 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
244 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
245 0,
246 },
247};
248
249struct mi2s_conf {
250 struct mutex lock;
251 u32 ref_cnt;
252 u32 msm_is_mi2s_master;
253};
254
255static u32 mi2s_ebit_clk[MI2S_MAX] = {
256 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
257 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
258 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
259};
260
261static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
262
263/* Default configuration of TDM channels */
264static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
265 { /* PRI TDM */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
274 },
275 { /* SEC TDM */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
284 },
285 { /* TERT TDM */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
294 },
295};
296
297static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
298 { /* PRI TDM */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
307 },
308 { /* SEC TDM */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
317 },
318 { /* TERT TDM */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
327 },
328};
329
330/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]331static struct dev_config aux_pcm_rx_cfg[] = {
332 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]333 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
334 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]335};
336
337static struct dev_config aux_pcm_tx_cfg[] = {
338 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]339 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
340 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]341};
342
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]343/* Default configuration of MI2S channels */
344static struct dev_config mi2s_rx_cfg[] = {
345 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
346 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
347 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
348};
349
350static struct dev_config mi2s_tx_cfg[] = {
351 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
352 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354};
355
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]356/* Default configuration of Codec DMA Interface RX */
357static struct dev_config cdc_dma_rx_cfg[] = {
358 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
359 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
360 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
361 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
362 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
363 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
364 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
365};
366
367/* Default configuration of Codec DMA Interface TX */
368static struct dev_config cdc_dma_tx_cfg[] = {
369 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
370 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
371 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]375 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
376 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
377 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]378};
379
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]380static struct dev_config afe_loopback_tx_cfg[] = {
381 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
382};
383
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]384static int msm_vi_feed_tx_ch = 2;
385static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]386static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
387 "S32_LE"};
388static char const *ch_text[] = {"Two", "Three", "Four", "Five",
389 "Six", "Seven", "Eight"};
390static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
391 "KHZ_16", "KHZ_22P05",
392 "KHZ_32", "KHZ_44P1", "KHZ_48",
393 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
394 "KHZ_192", "KHZ_352P8", "KHZ_384"};
395static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
396 "Five", "Six", "Seven",
397 "Eight"};
398static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
399 "KHZ_48", "KHZ_176P4",
400 "KHZ_352P8"};
401static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
402static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
403 "Five", "Six", "Seven", "Eight"};
404static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
405static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
406 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
407 "KHZ_48", "KHZ_96", "KHZ_192"};
408static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
409 "Five", "Six", "Seven",
410 "Eight"};
411
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]412static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
413static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
414 "Five", "Six", "Seven",
415 "Eight"};
416static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
417 "KHZ_16", "KHZ_22P05",
418 "KHZ_32", "KHZ_44P1", "KHZ_48",
419 "KHZ_88P2", "KHZ_96",
420 "KHZ_176P4", "KHZ_192",
421 "KHZ_352P8", "KHZ_384"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]422static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
423 "S24_3LE"};
424static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
425 "KHZ_192", "KHZ_32", "KHZ_44P1",
426 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]427static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
428 "KHZ_44P1", "KHZ_48",
429 "KHZ_88P2", "KHZ_96"};
430static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
431 "KHZ_44P1", "KHZ_48",
432 "KHZ_88P2", "KHZ_96"};
433static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
434 "KHZ_44P1", "KHZ_48",
435 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]436static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]437
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]438static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
439static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
440static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
441static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
442static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
443static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]444static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]445static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
446static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
447static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
448static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
449static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
450static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
451static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]452static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]453static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
454static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]455static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]456static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
457static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]458static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
459static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]460static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
461static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
462static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
463static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
464static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
465static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
466static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
467static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
468static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
469static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
470static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
471static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
472static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
473static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]474static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
475static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
476static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
477static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
478static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
479static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
480static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
481static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
482static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
483static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
484static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
485static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
486static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]487static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
488static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
489static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]490static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
491static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
492static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
493static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
494static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
495static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
496static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
497static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
498static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
499static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
500static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
501static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]502static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
503static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
504static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]505static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
506 cdc_dma_sample_rate_text);
507static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
508 cdc_dma_sample_rate_text);
509static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
510 cdc_dma_sample_rate_text);
511static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
512 cdc_dma_sample_rate_text);
513static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
514 cdc_dma_sample_rate_text);
515static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
516 cdc_dma_sample_rate_text);
517static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
518 cdc_dma_sample_rate_text);
519static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
520 cdc_dma_sample_rate_text);
521static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
522 cdc_dma_sample_rate_text);
523static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
524 cdc_dma_sample_rate_text);
525static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
526 cdc_dma_sample_rate_text);
527static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
528 cdc_dma_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
530 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]531static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
532 cdc_dma_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
534 cdc_dma_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
536 cdc_dma_sample_rate_text);
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]537static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
538static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
539static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
540 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]541static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
543static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]544static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]545
546static bool is_initial_boot;
547static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]548static struct snd_soc_aux_dev *msm_aux_dev;
549static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]550static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]551static int dmic_0_1_gpio_cnt;
552static int dmic_2_3_gpio_cnt;
553static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]554
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]555static void *def_wcd_mbhc_cal(void);
556
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]557/*
558 * Need to report LINEIN
559 * if R/L channel impedance is larger than 5K ohm
560 */
561static struct wcd_mbhc_config wcd_mbhc_cfg = {
562 .read_fw_bin = false,
563 .calibration = NULL,
564 .detect_extn_cable = true,
565 .mono_stero_detection = false,
566 .swap_gnd_mic = NULL,
567 .hs_ext_micbias = true,
568 .key_code[0] = KEY_MEDIA,
569 .key_code[1] = KEY_VOICECOMMAND,
570 .key_code[2] = KEY_VOLUMEUP,
571 .key_code[3] = KEY_VOLUMEDOWN,
572 .key_code[4] = 0,
573 .key_code[5] = 0,
574 .key_code[6] = 0,
575 .key_code[7] = 0,
576 .linein_th = 5000,
577 .moisture_en = true,
578 .mbhc_micbias = MIC_BIAS_2,
579 .anc_micbias = MIC_BIAS_2,
580 .enable_anc_mic_detect = false,
581};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]582
583static inline int param_is_mask(int p)
584{
585 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
586 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
587}
588
589static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
590 int n)
591{
592 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
593}
594
595static void param_set_mask(struct snd_pcm_hw_params *p, int n,
596 unsigned int bit)
597{
598 if (bit >= SNDRV_MASK_MAX)
599 return;
600 if (param_is_mask(n)) {
601 struct snd_mask *m = param_to_mask(p, n);
602
603 m->bits[0] = 0;
604 m->bits[1] = 0;
605 m->bits[bit >> 5] |= (1 << (bit & 31));
606 }
607}
608
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]609static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]611{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]612 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]613
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]614 switch (usb_rx_cfg.sample_rate) {
615 case SAMPLING_RATE_384KHZ:
616 sample_rate_val = 12;
617 break;
618 case SAMPLING_RATE_352P8KHZ:
619 sample_rate_val = 11;
620 break;
621 case SAMPLING_RATE_192KHZ:
622 sample_rate_val = 10;
623 break;
624 case SAMPLING_RATE_176P4KHZ:
625 sample_rate_val = 9;
626 break;
627 case SAMPLING_RATE_96KHZ:
628 sample_rate_val = 8;
629 break;
630 case SAMPLING_RATE_88P2KHZ:
631 sample_rate_val = 7;
632 break;
633 case SAMPLING_RATE_48KHZ:
634 sample_rate_val = 6;
635 break;
636 case SAMPLING_RATE_44P1KHZ:
637 sample_rate_val = 5;
638 break;
639 case SAMPLING_RATE_32KHZ:
640 sample_rate_val = 4;
641 break;
642 case SAMPLING_RATE_22P05KHZ:
643 sample_rate_val = 3;
644 break;
645 case SAMPLING_RATE_16KHZ:
646 sample_rate_val = 2;
647 break;
648 case SAMPLING_RATE_11P025KHZ:
649 sample_rate_val = 1;
650 break;
651 case SAMPLING_RATE_8KHZ:
652 default:
653 sample_rate_val = 0;
654 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]655 }
656
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]657 ucontrol->value.integer.value[0] = sample_rate_val;
658 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
659 usb_rx_cfg.sample_rate);
660 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]661}
662
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]663static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_value *ucontrol)
665{
666 switch (ucontrol->value.integer.value[0]) {
667 case 12:
668 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
669 break;
670 case 11:
671 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
672 break;
673 case 10:
674 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
675 break;
676 case 9:
677 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
678 break;
679 case 8:
680 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
681 break;
682 case 7:
683 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
684 break;
685 case 6:
686 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
687 break;
688 case 5:
689 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
690 break;
691 case 4:
692 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
693 break;
694 case 3:
695 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
696 break;
697 case 2:
698 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
699 break;
700 case 1:
701 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
702 break;
703 case 0:
704 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
705 break;
706 default:
707 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
708 break;
709 }
710
711 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
712 __func__, ucontrol->value.integer.value[0],
713 usb_rx_cfg.sample_rate);
714 return 0;
715}
716
717static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
718 struct snd_ctl_elem_value *ucontrol)
719{
720 int sample_rate_val = 0;
721
722 switch (usb_tx_cfg.sample_rate) {
723 case SAMPLING_RATE_384KHZ:
724 sample_rate_val = 12;
725 break;
726 case SAMPLING_RATE_352P8KHZ:
727 sample_rate_val = 11;
728 break;
729 case SAMPLING_RATE_192KHZ:
730 sample_rate_val = 10;
731 break;
732 case SAMPLING_RATE_176P4KHZ:
733 sample_rate_val = 9;
734 break;
735 case SAMPLING_RATE_96KHZ:
736 sample_rate_val = 8;
737 break;
738 case SAMPLING_RATE_88P2KHZ:
739 sample_rate_val = 7;
740 break;
741 case SAMPLING_RATE_48KHZ:
742 sample_rate_val = 6;
743 break;
744 case SAMPLING_RATE_44P1KHZ:
745 sample_rate_val = 5;
746 break;
747 case SAMPLING_RATE_32KHZ:
748 sample_rate_val = 4;
749 break;
750 case SAMPLING_RATE_22P05KHZ:
751 sample_rate_val = 3;
752 break;
753 case SAMPLING_RATE_16KHZ:
754 sample_rate_val = 2;
755 break;
756 case SAMPLING_RATE_11P025KHZ:
757 sample_rate_val = 1;
758 break;
759 case SAMPLING_RATE_8KHZ:
760 sample_rate_val = 0;
761 break;
762 default:
763 sample_rate_val = 6;
764 break;
765 }
766
767 ucontrol->value.integer.value[0] = sample_rate_val;
768 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
769 usb_tx_cfg.sample_rate);
770 return 0;
771}
772
773static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
774 struct snd_ctl_elem_value *ucontrol)
775{
776 switch (ucontrol->value.integer.value[0]) {
777 case 12:
778 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
779 break;
780 case 11:
781 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
782 break;
783 case 10:
784 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
785 break;
786 case 9:
787 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
788 break;
789 case 8:
790 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
791 break;
792 case 7:
793 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
794 break;
795 case 6:
796 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
797 break;
798 case 5:
799 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
800 break;
801 case 4:
802 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
803 break;
804 case 3:
805 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
806 break;
807 case 2:
808 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
809 break;
810 case 1:
811 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
812 break;
813 case 0:
814 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
815 break;
816 default:
817 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
818 break;
819 }
820
821 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
822 __func__, ucontrol->value.integer.value[0],
823 usb_tx_cfg.sample_rate);
824 return 0;
825}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]826static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
827 struct snd_ctl_elem_value *ucontrol)
828{
829 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
830 afe_loopback_tx_cfg[0].channels);
831 ucontrol->value.enumerated.item[0] =
832 afe_loopback_tx_cfg[0].channels - 1;
833
834 return 0;
835}
836
837static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
838 struct snd_ctl_elem_value *ucontrol)
839{
840 afe_loopback_tx_cfg[0].channels =
841 ucontrol->value.enumerated.item[0] + 1;
842 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
843 afe_loopback_tx_cfg[0].channels);
844
845 return 1;
846}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]847
848static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
849 struct snd_ctl_elem_value *ucontrol)
850{
851 switch (usb_rx_cfg.bit_format) {
852 case SNDRV_PCM_FORMAT_S32_LE:
853 ucontrol->value.integer.value[0] = 3;
854 break;
855 case SNDRV_PCM_FORMAT_S24_3LE:
856 ucontrol->value.integer.value[0] = 2;
857 break;
858 case SNDRV_PCM_FORMAT_S24_LE:
859 ucontrol->value.integer.value[0] = 1;
860 break;
861 case SNDRV_PCM_FORMAT_S16_LE:
862 default:
863 ucontrol->value.integer.value[0] = 0;
864 break;
865 }
866
867 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
868 __func__, usb_rx_cfg.bit_format,
869 ucontrol->value.integer.value[0]);
870 return 0;
871}
872
873static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
874 struct snd_ctl_elem_value *ucontrol)
875{
876 int rc = 0;
877
878 switch (ucontrol->value.integer.value[0]) {
879 case 3:
880 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
881 break;
882 case 2:
883 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
884 break;
885 case 1:
886 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
887 break;
888 case 0:
889 default:
890 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
891 break;
892 }
893 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
894 __func__, usb_rx_cfg.bit_format,
895 ucontrol->value.integer.value[0]);
896
897 return rc;
898}
899
900static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
901 struct snd_ctl_elem_value *ucontrol)
902{
903 switch (usb_tx_cfg.bit_format) {
904 case SNDRV_PCM_FORMAT_S32_LE:
905 ucontrol->value.integer.value[0] = 3;
906 break;
907 case SNDRV_PCM_FORMAT_S24_3LE:
908 ucontrol->value.integer.value[0] = 2;
909 break;
910 case SNDRV_PCM_FORMAT_S24_LE:
911 ucontrol->value.integer.value[0] = 1;
912 break;
913 case SNDRV_PCM_FORMAT_S16_LE:
914 default:
915 ucontrol->value.integer.value[0] = 0;
916 break;
917 }
918
919 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
920 __func__, usb_tx_cfg.bit_format,
921 ucontrol->value.integer.value[0]);
922 return 0;
923}
924
925static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
926 struct snd_ctl_elem_value *ucontrol)
927{
928 int rc = 0;
929
930 switch (ucontrol->value.integer.value[0]) {
931 case 3:
932 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
933 break;
934 case 2:
935 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
936 break;
937 case 1:
938 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
939 break;
940 case 0:
941 default:
942 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
943 break;
944 }
945 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
946 __func__, usb_tx_cfg.bit_format,
947 ucontrol->value.integer.value[0]);
948
949 return rc;
950}
951
952static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_value *ucontrol)
954{
955 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
956 usb_rx_cfg.channels);
957 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
958 return 0;
959}
960
961static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
962 struct snd_ctl_elem_value *ucontrol)
963{
964 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
965
966 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
967 return 1;
968}
969
970static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
972{
973 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
974 usb_tx_cfg.channels);
975 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
976 return 0;
977}
978
979static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
980 struct snd_ctl_elem_value *ucontrol)
981{
982 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
983
984 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
985 return 1;
986}
987
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]988static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
989 struct snd_ctl_elem_value *ucontrol)
990{
991 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
992 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
993 ucontrol->value.integer.value[0]);
994 return 0;
995}
996
997static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
998 struct snd_ctl_elem_value *ucontrol)
999{
1000 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1001 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1002 return 1;
1003}
1004
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1005static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1006{
1007 int idx = 0;
1008
1009 if (strnstr(kcontrol->id.name, "Display Port RX",
1010 sizeof("Display Port RX"))) {
1011 idx = EXT_DISP_RX_IDX_DP;
1012 } else {
1013 pr_err("%s: unsupported BE: %s\n",
1014 __func__, kcontrol->id.name);
1015 idx = -EINVAL;
1016 }
1017
1018 return idx;
1019}
1020
1021static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_value *ucontrol)
1023{
1024 int idx = ext_disp_get_port_idx(kcontrol);
1025
1026 if (idx < 0)
1027 return idx;
1028
1029 switch (ext_disp_rx_cfg[idx].bit_format) {
1030 case SNDRV_PCM_FORMAT_S24_3LE:
1031 ucontrol->value.integer.value[0] = 2;
1032 break;
1033 case SNDRV_PCM_FORMAT_S24_LE:
1034 ucontrol->value.integer.value[0] = 1;
1035 break;
1036 case SNDRV_PCM_FORMAT_S16_LE:
1037 default:
1038 ucontrol->value.integer.value[0] = 0;
1039 break;
1040 }
1041
1042 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1043 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1044 ucontrol->value.integer.value[0]);
1045 return 0;
1046}
1047
1048static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1049 struct snd_ctl_elem_value *ucontrol)
1050{
1051 int idx = ext_disp_get_port_idx(kcontrol);
1052
1053 if (idx < 0)
1054 return idx;
1055
1056 switch (ucontrol->value.integer.value[0]) {
1057 case 2:
1058 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1059 break;
1060 case 1:
1061 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1062 break;
1063 case 0:
1064 default:
1065 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1066 break;
1067 }
1068 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1069 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1070 ucontrol->value.integer.value[0]);
1071
1072 return 0;
1073}
1074
1075static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1076 struct snd_ctl_elem_value *ucontrol)
1077{
1078 int idx = ext_disp_get_port_idx(kcontrol);
1079
1080 if (idx < 0)
1081 return idx;
1082
1083 ucontrol->value.integer.value[0] =
1084 ext_disp_rx_cfg[idx].channels - 2;
1085
1086 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1087 idx, ext_disp_rx_cfg[idx].channels);
1088
1089 return 0;
1090}
1091
1092static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1093 struct snd_ctl_elem_value *ucontrol)
1094{
1095 int idx = ext_disp_get_port_idx(kcontrol);
1096
1097 if (idx < 0)
1098 return idx;
1099
1100 ext_disp_rx_cfg[idx].channels =
1101 ucontrol->value.integer.value[0] + 2;
1102
1103 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1104 idx, ext_disp_rx_cfg[idx].channels);
1105 return 1;
1106}
1107
1108static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1109 struct snd_ctl_elem_value *ucontrol)
1110{
1111 int sample_rate_val;
1112 int idx = ext_disp_get_port_idx(kcontrol);
1113
1114 if (idx < 0)
1115 return idx;
1116
1117 switch (ext_disp_rx_cfg[idx].sample_rate) {
1118 case SAMPLING_RATE_176P4KHZ:
1119 sample_rate_val = 6;
1120 break;
1121
1122 case SAMPLING_RATE_88P2KHZ:
1123 sample_rate_val = 5;
1124 break;
1125
1126 case SAMPLING_RATE_44P1KHZ:
1127 sample_rate_val = 4;
1128 break;
1129
1130 case SAMPLING_RATE_32KHZ:
1131 sample_rate_val = 3;
1132 break;
1133
1134 case SAMPLING_RATE_192KHZ:
1135 sample_rate_val = 2;
1136 break;
1137
1138 case SAMPLING_RATE_96KHZ:
1139 sample_rate_val = 1;
1140 break;
1141
1142 case SAMPLING_RATE_48KHZ:
1143 default:
1144 sample_rate_val = 0;
1145 break;
1146 }
1147
1148 ucontrol->value.integer.value[0] = sample_rate_val;
1149 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1150 idx, ext_disp_rx_cfg[idx].sample_rate);
1151
1152 return 0;
1153}
1154
1155static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 int idx = ext_disp_get_port_idx(kcontrol);
1159
1160 if (idx < 0)
1161 return idx;
1162
1163 switch (ucontrol->value.integer.value[0]) {
1164 case 6:
1165 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1166 break;
1167 case 5:
1168 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1169 break;
1170 case 4:
1171 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1172 break;
1173 case 3:
1174 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1175 break;
1176 case 2:
1177 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1178 break;
1179 case 1:
1180 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1181 break;
1182 case 0:
1183 default:
1184 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1185 break;
1186 }
1187
1188 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1189 __func__, ucontrol->value.integer.value[0], idx,
1190 ext_disp_rx_cfg[idx].sample_rate);
1191 return 0;
1192}
1193
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1194static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1195 struct snd_ctl_elem_value *ucontrol)
1196{
1197 pr_debug("%s: proxy_rx channels = %d\n",
1198 __func__, proxy_rx_cfg.channels);
1199 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1200
1201 return 0;
1202}
1203
1204static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1205 struct snd_ctl_elem_value *ucontrol)
1206{
1207 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1208 pr_debug("%s: proxy_rx channels = %d\n",
1209 __func__, proxy_rx_cfg.channels);
1210
1211 return 1;
1212}
1213
1214static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1215 struct tdm_port *port)
1216{
1217 if (port) {
1218 if (strnstr(kcontrol->id.name, "PRI",
1219 sizeof(kcontrol->id.name))) {
1220 port->mode = TDM_PRI;
1221 } else if (strnstr(kcontrol->id.name, "SEC",
1222 sizeof(kcontrol->id.name))) {
1223 port->mode = TDM_SEC;
1224 } else if (strnstr(kcontrol->id.name, "TERT",
1225 sizeof(kcontrol->id.name))) {
1226 port->mode = TDM_TERT;
1227 } else {
1228 pr_err("%s: unsupported mode in: %s\n",
1229 __func__, kcontrol->id.name);
1230 return -EINVAL;
1231 }
1232
1233 if (strnstr(kcontrol->id.name, "RX_0",
1234 sizeof(kcontrol->id.name)) ||
1235 strnstr(kcontrol->id.name, "TX_0",
1236 sizeof(kcontrol->id.name))) {
1237 port->channel = TDM_0;
1238 } else if (strnstr(kcontrol->id.name, "RX_1",
1239 sizeof(kcontrol->id.name)) ||
1240 strnstr(kcontrol->id.name, "TX_1",
1241 sizeof(kcontrol->id.name))) {
1242 port->channel = TDM_1;
1243 } else if (strnstr(kcontrol->id.name, "RX_2",
1244 sizeof(kcontrol->id.name)) ||
1245 strnstr(kcontrol->id.name, "TX_2",
1246 sizeof(kcontrol->id.name))) {
1247 port->channel = TDM_2;
1248 } else if (strnstr(kcontrol->id.name, "RX_3",
1249 sizeof(kcontrol->id.name)) ||
1250 strnstr(kcontrol->id.name, "TX_3",
1251 sizeof(kcontrol->id.name))) {
1252 port->channel = TDM_3;
1253 } else if (strnstr(kcontrol->id.name, "RX_4",
1254 sizeof(kcontrol->id.name)) ||
1255 strnstr(kcontrol->id.name, "TX_4",
1256 sizeof(kcontrol->id.name))) {
1257 port->channel = TDM_4;
1258 } else if (strnstr(kcontrol->id.name, "RX_5",
1259 sizeof(kcontrol->id.name)) ||
1260 strnstr(kcontrol->id.name, "TX_5",
1261 sizeof(kcontrol->id.name))) {
1262 port->channel = TDM_5;
1263 } else if (strnstr(kcontrol->id.name, "RX_6",
1264 sizeof(kcontrol->id.name)) ||
1265 strnstr(kcontrol->id.name, "TX_6",
1266 sizeof(kcontrol->id.name))) {
1267 port->channel = TDM_6;
1268 } else if (strnstr(kcontrol->id.name, "RX_7",
1269 sizeof(kcontrol->id.name)) ||
1270 strnstr(kcontrol->id.name, "TX_7",
1271 sizeof(kcontrol->id.name))) {
1272 port->channel = TDM_7;
1273 } else {
1274 pr_err("%s: unsupported channel in: %s\n",
1275 __func__, kcontrol->id.name);
1276 return -EINVAL;
1277 }
1278 } else {
1279 return -EINVAL;
1280 }
1281 return 0;
1282}
1283
1284static int tdm_get_sample_rate(int value)
1285{
1286 int sample_rate = 0;
1287
1288 switch (value) {
1289 case 0:
1290 sample_rate = SAMPLING_RATE_8KHZ;
1291 break;
1292 case 1:
1293 sample_rate = SAMPLING_RATE_16KHZ;
1294 break;
1295 case 2:
1296 sample_rate = SAMPLING_RATE_32KHZ;
1297 break;
1298 case 3:
1299 sample_rate = SAMPLING_RATE_48KHZ;
1300 break;
1301 case 4:
1302 sample_rate = SAMPLING_RATE_176P4KHZ;
1303 break;
1304 case 5:
1305 sample_rate = SAMPLING_RATE_352P8KHZ;
1306 break;
1307 default:
1308 sample_rate = SAMPLING_RATE_48KHZ;
1309 break;
1310 }
1311 return sample_rate;
1312}
1313
1314static int tdm_get_sample_rate_val(int sample_rate)
1315{
1316 int sample_rate_val = 0;
1317
1318 switch (sample_rate) {
1319 case SAMPLING_RATE_8KHZ:
1320 sample_rate_val = 0;
1321 break;
1322 case SAMPLING_RATE_16KHZ:
1323 sample_rate_val = 1;
1324 break;
1325 case SAMPLING_RATE_32KHZ:
1326 sample_rate_val = 2;
1327 break;
1328 case SAMPLING_RATE_48KHZ:
1329 sample_rate_val = 3;
1330 break;
1331 case SAMPLING_RATE_176P4KHZ:
1332 sample_rate_val = 4;
1333 break;
1334 case SAMPLING_RATE_352P8KHZ:
1335 sample_rate_val = 5;
1336 break;
1337 default:
1338 sample_rate_val = 3;
1339 break;
1340 }
1341 return sample_rate_val;
1342}
1343
1344static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1345 struct snd_ctl_elem_value *ucontrol)
1346{
1347 struct tdm_port port;
1348 int ret = tdm_get_port_idx(kcontrol, &port);
1349
1350 if (ret) {
1351 pr_err("%s: unsupported control: %s\n",
1352 __func__, kcontrol->id.name);
1353 } else {
1354 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1355 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1356
1357 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1358 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1359 ucontrol->value.enumerated.item[0]);
1360 }
1361 return ret;
1362}
1363
1364static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1365 struct snd_ctl_elem_value *ucontrol)
1366{
1367 struct tdm_port port;
1368 int ret = tdm_get_port_idx(kcontrol, &port);
1369
1370 if (ret) {
1371 pr_err("%s: unsupported control: %s\n",
1372 __func__, kcontrol->id.name);
1373 } else {
1374 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1375 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1376
1377 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1378 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1379 ucontrol->value.enumerated.item[0]);
1380 }
1381 return ret;
1382}
1383
1384static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1385 struct snd_ctl_elem_value *ucontrol)
1386{
1387 struct tdm_port port;
1388 int ret = tdm_get_port_idx(kcontrol, &port);
1389
1390 if (ret) {
1391 pr_err("%s: unsupported control: %s\n",
1392 __func__, kcontrol->id.name);
1393 } else {
1394 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1395 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1396
1397 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1398 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1399 ucontrol->value.enumerated.item[0]);
1400 }
1401 return ret;
1402}
1403
1404static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 struct tdm_port port;
1408 int ret = tdm_get_port_idx(kcontrol, &port);
1409
1410 if (ret) {
1411 pr_err("%s: unsupported control: %s\n",
1412 __func__, kcontrol->id.name);
1413 } else {
1414 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1415 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1416
1417 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1418 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1419 ucontrol->value.enumerated.item[0]);
1420 }
1421 return ret;
1422}
1423
1424static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1425{
1426 int format = 0;
1427
1428 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1429 case 0:
1430 format = SNDRV_PCM_FORMAT_S16_LE;
1431 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1432 case 1:
1433 format = SNDRV_PCM_FORMAT_S24_LE;
1434 break;
1435 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1436 format = SNDRV_PCM_FORMAT_S32_LE;
1437 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1438 default:
1439 format = SNDRV_PCM_FORMAT_S16_LE;
1440 break;
1441 }
1442 return format;
1443}
1444
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1445static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1446{
1447 int value = 0;
1448
1449 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1450 case SNDRV_PCM_FORMAT_S16_LE:
1451 value = 0;
1452 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1453 case SNDRV_PCM_FORMAT_S24_LE:
1454 value = 1;
1455 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1456 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1457 value = 2;
1458 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1459 default:
1460 value = 0;
1461 break;
1462 }
1463 return value;
1464}
1465
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1466static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1467 struct snd_ctl_elem_value *ucontrol)
1468{
1469 struct tdm_port port;
1470 int ret = tdm_get_port_idx(kcontrol, &port);
1471
1472 if (ret) {
1473 pr_err("%s: unsupported control: %s\n",
1474 __func__, kcontrol->id.name);
1475 } else {
1476 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1477 tdm_rx_cfg[port.mode][port.channel].bit_format);
1478
1479 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1480 tdm_rx_cfg[port.mode][port.channel].bit_format,
1481 ucontrol->value.enumerated.item[0]);
1482 }
1483 return ret;
1484}
1485
1486static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1487 struct snd_ctl_elem_value *ucontrol)
1488{
1489 struct tdm_port port;
1490 int ret = tdm_get_port_idx(kcontrol, &port);
1491
1492 if (ret) {
1493 pr_err("%s: unsupported control: %s\n",
1494 __func__, kcontrol->id.name);
1495 } else {
1496 tdm_rx_cfg[port.mode][port.channel].bit_format =
1497 tdm_get_format(ucontrol->value.enumerated.item[0]);
1498
1499 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1500 tdm_rx_cfg[port.mode][port.channel].bit_format,
1501 ucontrol->value.enumerated.item[0]);
1502 }
1503 return ret;
1504}
1505
1506static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1507 struct snd_ctl_elem_value *ucontrol)
1508{
1509 struct tdm_port port;
1510 int ret = tdm_get_port_idx(kcontrol, &port);
1511
1512 if (ret) {
1513 pr_err("%s: unsupported control: %s\n",
1514 __func__, kcontrol->id.name);
1515 } else {
1516 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1517 tdm_tx_cfg[port.mode][port.channel].bit_format);
1518
1519 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1520 tdm_tx_cfg[port.mode][port.channel].bit_format,
1521 ucontrol->value.enumerated.item[0]);
1522 }
1523 return ret;
1524}
1525
1526static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1527 struct snd_ctl_elem_value *ucontrol)
1528{
1529 struct tdm_port port;
1530 int ret = tdm_get_port_idx(kcontrol, &port);
1531
1532 if (ret) {
1533 pr_err("%s: unsupported control: %s\n",
1534 __func__, kcontrol->id.name);
1535 } else {
1536 tdm_tx_cfg[port.mode][port.channel].bit_format =
1537 tdm_get_format(ucontrol->value.enumerated.item[0]);
1538
1539 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1540 tdm_tx_cfg[port.mode][port.channel].bit_format,
1541 ucontrol->value.enumerated.item[0]);
1542 }
1543 return ret;
1544}
1545
1546static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1547 struct snd_ctl_elem_value *ucontrol)
1548{
1549 struct tdm_port port;
1550 int ret = tdm_get_port_idx(kcontrol, &port);
1551
1552 if (ret) {
1553 pr_err("%s: unsupported control: %s\n",
1554 __func__, kcontrol->id.name);
1555 } else {
1556
1557 ucontrol->value.enumerated.item[0] =
1558 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1559
1560 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1561 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1562 ucontrol->value.enumerated.item[0]);
1563 }
1564 return ret;
1565}
1566
1567static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1568 struct snd_ctl_elem_value *ucontrol)
1569{
1570 struct tdm_port port;
1571 int ret = tdm_get_port_idx(kcontrol, &port);
1572
1573 if (ret) {
1574 pr_err("%s: unsupported control: %s\n",
1575 __func__, kcontrol->id.name);
1576 } else {
1577 tdm_rx_cfg[port.mode][port.channel].channels =
1578 ucontrol->value.enumerated.item[0] + 1;
1579
1580 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1581 tdm_rx_cfg[port.mode][port.channel].channels,
1582 ucontrol->value.enumerated.item[0] + 1);
1583 }
1584 return ret;
1585}
1586
1587static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1588 struct snd_ctl_elem_value *ucontrol)
1589{
1590 struct tdm_port port;
1591 int ret = tdm_get_port_idx(kcontrol, &port);
1592
1593 if (ret) {
1594 pr_err("%s: unsupported control: %s\n",
1595 __func__, kcontrol->id.name);
1596 } else {
1597 ucontrol->value.enumerated.item[0] =
1598 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1599
1600 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1601 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1602 ucontrol->value.enumerated.item[0]);
1603 }
1604 return ret;
1605}
1606
1607static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1608 struct snd_ctl_elem_value *ucontrol)
1609{
1610 struct tdm_port port;
1611 int ret = tdm_get_port_idx(kcontrol, &port);
1612
1613 if (ret) {
1614 pr_err("%s: unsupported control: %s\n",
1615 __func__, kcontrol->id.name);
1616 } else {
1617 tdm_tx_cfg[port.mode][port.channel].channels =
1618 ucontrol->value.enumerated.item[0] + 1;
1619
1620 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1621 tdm_tx_cfg[port.mode][port.channel].channels,
1622 ucontrol->value.enumerated.item[0] + 1);
1623 }
1624 return ret;
1625}
1626
1627static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1628{
1629 int idx = 0;
1630
1631 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1632 sizeof("PRIM_AUX_PCM"))) {
1633 idx = PRIM_AUX_PCM;
1634 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1635 sizeof("SEC_AUX_PCM"))) {
1636 idx = SEC_AUX_PCM;
1637 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1638 sizeof("TERT_AUX_PCM"))) {
1639 idx = TERT_AUX_PCM;
1640 } else {
1641 pr_err("%s: unsupported port: %s\n",
1642 __func__, kcontrol->id.name);
1643 idx = -EINVAL;
1644 }
1645
1646 return idx;
1647}
1648
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1649static int aux_pcm_get_sample_rate(int value)
1650{
1651 int sample_rate = 0;
1652
1653 switch (value) {
1654 case 1:
1655 sample_rate = SAMPLING_RATE_16KHZ;
1656 break;
1657 case 0:
1658 default:
1659 sample_rate = SAMPLING_RATE_8KHZ;
1660 break;
1661 }
1662 return sample_rate;
1663}
1664
1665static int aux_pcm_get_sample_rate_val(int sample_rate)
1666{
1667 int sample_rate_val = 0;
1668
1669 switch (sample_rate) {
1670 case SAMPLING_RATE_16KHZ:
1671 sample_rate_val = 1;
1672 break;
1673 case SAMPLING_RATE_8KHZ:
1674 default:
1675 sample_rate_val = 0;
1676 break;
1677 }
1678 return sample_rate_val;
1679}
1680
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1681static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1682{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1683 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1684
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1685 switch (value) {
1686 case 0:
1687 format = SNDRV_PCM_FORMAT_S16_LE;
1688 break;
1689 case 1:
1690 format = SNDRV_PCM_FORMAT_S24_LE;
1691 break;
1692 case 2:
1693 format = SNDRV_PCM_FORMAT_S24_3LE;
1694 break;
1695 case 3:
1696 format = SNDRV_PCM_FORMAT_S32_LE;
1697 break;
1698 default:
1699 format = SNDRV_PCM_FORMAT_S16_LE;
1700 break;
1701 }
1702 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1703}
1704
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1705static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1706{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1707 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1708
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1709 switch (format) {
1710 case SNDRV_PCM_FORMAT_S16_LE:
1711 value = 0;
1712 break;
1713 case SNDRV_PCM_FORMAT_S24_LE:
1714 value = 1;
1715 break;
1716 case SNDRV_PCM_FORMAT_S24_3LE:
1717 value = 2;
1718 break;
1719 case SNDRV_PCM_FORMAT_S32_LE:
1720 value = 3;
1721 break;
1722 default:
1723 value = 0;
1724 break;
1725 }
1726 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1727}
1728
1729static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1730 struct snd_ctl_elem_value *ucontrol)
1731{
1732 int idx = aux_pcm_get_port_idx(kcontrol);
1733
1734 if (idx < 0)
1735 return idx;
1736
1737 ucontrol->value.enumerated.item[0] =
1738 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1739
1740 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1741 idx, aux_pcm_rx_cfg[idx].sample_rate,
1742 ucontrol->value.enumerated.item[0]);
1743
1744 return 0;
1745}
1746
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1747static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1748 struct snd_ctl_elem_value *ucontrol)
1749{
1750 int idx = aux_pcm_get_port_idx(kcontrol);
1751
1752 if (idx < 0)
1753 return idx;
1754
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1755 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1756 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1757
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1758 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1759 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1760 ucontrol->value.enumerated.item[0]);
1761
1762 return 0;
1763}
1764
1765static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1766 struct snd_ctl_elem_value *ucontrol)
1767{
1768 int idx = aux_pcm_get_port_idx(kcontrol);
1769
1770 if (idx < 0)
1771 return idx;
1772
1773 ucontrol->value.enumerated.item[0] =
1774 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1775
1776 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1777 idx, aux_pcm_tx_cfg[idx].sample_rate,
1778 ucontrol->value.enumerated.item[0]);
1779
1780 return 0;
1781}
1782
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1783static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1784 struct snd_ctl_elem_value *ucontrol)
1785{
1786 int idx = aux_pcm_get_port_idx(kcontrol);
1787
1788 if (idx < 0)
1789 return idx;
1790
1791 aux_pcm_tx_cfg[idx].sample_rate =
1792 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1793
1794 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1795 idx, aux_pcm_tx_cfg[idx].sample_rate,
1796 ucontrol->value.enumerated.item[0]);
1797
1798 return 0;
1799}
1800
1801static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1802 struct snd_ctl_elem_value *ucontrol)
1803{
1804 int idx = aux_pcm_get_port_idx(kcontrol);
1805
1806 if (idx < 0)
1807 return idx;
1808
1809 ucontrol->value.enumerated.item[0] =
1810 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1811
1812 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1813 idx, aux_pcm_rx_cfg[idx].bit_format,
1814 ucontrol->value.enumerated.item[0]);
1815
1816 return 0;
1817}
1818
1819static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1820 struct snd_ctl_elem_value *ucontrol)
1821{
1822 int idx = aux_pcm_get_port_idx(kcontrol);
1823
1824 if (idx < 0)
1825 return idx;
1826
1827 aux_pcm_rx_cfg[idx].bit_format =
1828 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1829
1830 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1831 idx, aux_pcm_rx_cfg[idx].bit_format,
1832 ucontrol->value.enumerated.item[0]);
1833
1834 return 0;
1835}
1836
1837static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1838 struct snd_ctl_elem_value *ucontrol)
1839{
1840 int idx = aux_pcm_get_port_idx(kcontrol);
1841
1842 if (idx < 0)
1843 return idx;
1844
1845 ucontrol->value.enumerated.item[0] =
1846 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1847
1848 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1849 idx, aux_pcm_tx_cfg[idx].bit_format,
1850 ucontrol->value.enumerated.item[0]);
1851
1852 return 0;
1853}
1854
1855static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1856 struct snd_ctl_elem_value *ucontrol)
1857{
1858 int idx = aux_pcm_get_port_idx(kcontrol);
1859
1860 if (idx < 0)
1861 return idx;
1862
1863 aux_pcm_tx_cfg[idx].bit_format =
1864 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1865
1866 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1867 idx, aux_pcm_tx_cfg[idx].bit_format,
1868 ucontrol->value.enumerated.item[0]);
1869
1870 return 0;
1871}
1872
1873static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1874{
1875 int idx = 0;
1876
1877 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1878 sizeof("PRIM_MI2S_RX"))) {
1879 idx = PRIM_MI2S;
1880 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1881 sizeof("SEC_MI2S_RX"))) {
1882 idx = SEC_MI2S;
1883 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1884 sizeof("TERT_MI2S_RX"))) {
1885 idx = TERT_MI2S;
1886 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1887 sizeof("PRIM_MI2S_TX"))) {
1888 idx = PRIM_MI2S;
1889 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1890 sizeof("SEC_MI2S_TX"))) {
1891 idx = SEC_MI2S;
1892 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1893 sizeof("TERT_MI2S_TX"))) {
1894 idx = TERT_MI2S;
1895 } else {
1896 pr_err("%s: unsupported channel: %s\n",
1897 __func__, kcontrol->id.name);
1898 idx = -EINVAL;
1899 }
1900
1901 return idx;
1902}
1903
1904static int mi2s_get_sample_rate(int value)
1905{
1906 int sample_rate = 0;
1907
1908 switch (value) {
1909 case 0:
1910 sample_rate = SAMPLING_RATE_8KHZ;
1911 break;
1912 case 1:
1913 sample_rate = SAMPLING_RATE_11P025KHZ;
1914 break;
1915 case 2:
1916 sample_rate = SAMPLING_RATE_16KHZ;
1917 break;
1918 case 3:
1919 sample_rate = SAMPLING_RATE_22P05KHZ;
1920 break;
1921 case 4:
1922 sample_rate = SAMPLING_RATE_32KHZ;
1923 break;
1924 case 5:
1925 sample_rate = SAMPLING_RATE_44P1KHZ;
1926 break;
1927 case 6:
1928 sample_rate = SAMPLING_RATE_48KHZ;
1929 break;
1930 case 7:
1931 sample_rate = SAMPLING_RATE_96KHZ;
1932 break;
1933 case 8:
1934 sample_rate = SAMPLING_RATE_192KHZ;
1935 break;
1936 default:
1937 sample_rate = SAMPLING_RATE_48KHZ;
1938 break;
1939 }
1940 return sample_rate;
1941}
1942
1943static int mi2s_get_sample_rate_val(int sample_rate)
1944{
1945 int sample_rate_val = 0;
1946
1947 switch (sample_rate) {
1948 case SAMPLING_RATE_8KHZ:
1949 sample_rate_val = 0;
1950 break;
1951 case SAMPLING_RATE_11P025KHZ:
1952 sample_rate_val = 1;
1953 break;
1954 case SAMPLING_RATE_16KHZ:
1955 sample_rate_val = 2;
1956 break;
1957 case SAMPLING_RATE_22P05KHZ:
1958 sample_rate_val = 3;
1959 break;
1960 case SAMPLING_RATE_32KHZ:
1961 sample_rate_val = 4;
1962 break;
1963 case SAMPLING_RATE_44P1KHZ:
1964 sample_rate_val = 5;
1965 break;
1966 case SAMPLING_RATE_48KHZ:
1967 sample_rate_val = 6;
1968 break;
1969 case SAMPLING_RATE_96KHZ:
1970 sample_rate_val = 7;
1971 break;
1972 case SAMPLING_RATE_192KHZ:
1973 sample_rate_val = 8;
1974 break;
1975 default:
1976 sample_rate_val = 6;
1977 break;
1978 }
1979 return sample_rate_val;
1980}
1981
1982static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1983 struct snd_ctl_elem_value *ucontrol)
1984{
1985 int idx = mi2s_get_port_idx(kcontrol);
1986
1987 if (idx < 0)
1988 return idx;
1989
1990 ucontrol->value.enumerated.item[0] =
1991 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1992
1993 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1994 idx, mi2s_rx_cfg[idx].sample_rate,
1995 ucontrol->value.enumerated.item[0]);
1996
1997 return 0;
1998}
1999
2000static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2001 struct snd_ctl_elem_value *ucontrol)
2002{
2003 int idx = mi2s_get_port_idx(kcontrol);
2004
2005 if (idx < 0)
2006 return idx;
2007
2008 mi2s_rx_cfg[idx].sample_rate =
2009 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2010
2011 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2012 idx, mi2s_rx_cfg[idx].sample_rate,
2013 ucontrol->value.enumerated.item[0]);
2014
2015 return 0;
2016}
2017
2018static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2019 struct snd_ctl_elem_value *ucontrol)
2020{
2021 int idx = mi2s_get_port_idx(kcontrol);
2022
2023 if (idx < 0)
2024 return idx;
2025
2026 ucontrol->value.enumerated.item[0] =
2027 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2028
2029 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2030 idx, mi2s_tx_cfg[idx].sample_rate,
2031 ucontrol->value.enumerated.item[0]);
2032
2033 return 0;
2034}
2035
2036static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2037 struct snd_ctl_elem_value *ucontrol)
2038{
2039 int idx = mi2s_get_port_idx(kcontrol);
2040
2041 if (idx < 0)
2042 return idx;
2043
2044 mi2s_tx_cfg[idx].sample_rate =
2045 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2046
2047 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2048 idx, mi2s_tx_cfg[idx].sample_rate,
2049 ucontrol->value.enumerated.item[0]);
2050
2051 return 0;
2052}
2053
2054static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2055 struct snd_ctl_elem_value *ucontrol)
2056{
2057 int idx = mi2s_get_port_idx(kcontrol);
2058
2059 if (idx < 0)
2060 return idx;
2061
2062 ucontrol->value.enumerated.item[0] =
2063 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2064
2065 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2066 idx, mi2s_rx_cfg[idx].bit_format,
2067 ucontrol->value.enumerated.item[0]);
2068
2069 return 0;
2070}
2071
2072static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2073 struct snd_ctl_elem_value *ucontrol)
2074{
2075 int idx = mi2s_get_port_idx(kcontrol);
2076
2077 if (idx < 0)
2078 return idx;
2079
2080 mi2s_rx_cfg[idx].bit_format =
2081 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2082
2083 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2084 idx, mi2s_rx_cfg[idx].bit_format,
2085 ucontrol->value.enumerated.item[0]);
2086
2087 return 0;
2088}
2089
2090static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2091 struct snd_ctl_elem_value *ucontrol)
2092{
2093 int idx = mi2s_get_port_idx(kcontrol);
2094
2095 if (idx < 0)
2096 return idx;
2097
2098 ucontrol->value.enumerated.item[0] =
2099 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2100
2101 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2102 idx, mi2s_tx_cfg[idx].bit_format,
2103 ucontrol->value.enumerated.item[0]);
2104
2105 return 0;
2106}
2107
2108static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2109 struct snd_ctl_elem_value *ucontrol)
2110{
2111 int idx = mi2s_get_port_idx(kcontrol);
2112
2113 if (idx < 0)
2114 return idx;
2115
2116 mi2s_tx_cfg[idx].bit_format =
2117 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2118
2119 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2120 idx, mi2s_tx_cfg[idx].bit_format,
2121 ucontrol->value.enumerated.item[0]);
2122
2123 return 0;
2124}
2125static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2126 struct snd_ctl_elem_value *ucontrol)
2127{
2128 int idx = mi2s_get_port_idx(kcontrol);
2129
2130 if (idx < 0)
2131 return idx;
2132
2133 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2134 idx, mi2s_rx_cfg[idx].channels);
2135 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2136
2137 return 0;
2138}
2139
2140static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2141 struct snd_ctl_elem_value *ucontrol)
2142{
2143 int idx = mi2s_get_port_idx(kcontrol);
2144
2145 if (idx < 0)
2146 return idx;
2147
2148 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2149 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2150 idx, mi2s_rx_cfg[idx].channels);
2151
2152 return 1;
2153}
2154
2155static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2156 struct snd_ctl_elem_value *ucontrol)
2157{
2158 int idx = mi2s_get_port_idx(kcontrol);
2159
2160 if (idx < 0)
2161 return idx;
2162
2163 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2164 idx, mi2s_tx_cfg[idx].channels);
2165 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2166
2167 return 0;
2168}
2169
2170static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2171 struct snd_ctl_elem_value *ucontrol)
2172{
2173 int idx = mi2s_get_port_idx(kcontrol);
2174
2175 if (idx < 0)
2176 return idx;
2177
2178 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2179 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2180 idx, mi2s_tx_cfg[idx].channels);
2181
2182 return 1;
2183}
2184
2185static int msm_get_port_id(int be_id)
2186{
2187 int afe_port_id = 0;
2188
2189 switch (be_id) {
2190 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2191 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2192 break;
2193 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2194 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2195 break;
2196 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2197 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2198 break;
2199 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2200 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2201 break;
2202 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2203 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2204 break;
2205 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2206 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2207 break;
2208 default:
2209 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2210 afe_port_id = -EINVAL;
2211 }
2212
2213 return afe_port_id;
2214}
2215
2216static u32 get_mi2s_bits_per_sample(u32 bit_format)
2217{
2218 u32 bit_per_sample = 0;
2219
2220 switch (bit_format) {
2221 case SNDRV_PCM_FORMAT_S32_LE:
2222 case SNDRV_PCM_FORMAT_S24_3LE:
2223 case SNDRV_PCM_FORMAT_S24_LE:
2224 bit_per_sample = 32;
2225 break;
2226 case SNDRV_PCM_FORMAT_S16_LE:
2227 default:
2228 bit_per_sample = 16;
2229 break;
2230 }
2231
2232 return bit_per_sample;
2233}
2234
2235static void update_mi2s_clk_val(int dai_id, int stream)
2236{
2237 u32 bit_per_sample = 0;
2238
2239 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2240 bit_per_sample =
2241 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2242 mi2s_clk[dai_id].clk_freq_in_hz =
2243 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2244 } else {
2245 bit_per_sample =
2246 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2247 mi2s_clk[dai_id].clk_freq_in_hz =
2248 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2249 }
2250}
2251
2252static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2253{
2254 int ret = 0;
2255 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2256 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2257 int port_id = 0;
2258 int index = cpu_dai->id;
2259
2260 port_id = msm_get_port_id(rtd->dai_link->id);
2261 if (port_id < 0) {
2262 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2263 ret = port_id;
2264 goto err;
2265 }
2266
2267 if (enable) {
2268 update_mi2s_clk_val(index, substream->stream);
2269 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2270 mi2s_clk[index].clk_freq_in_hz);
2271 }
2272
2273 mi2s_clk[index].enable = enable;
2274 ret = afe_set_lpass_clock_v2(port_id,
2275 &mi2s_clk[index]);
2276 if (ret < 0) {
2277 dev_err(rtd->card->dev,
2278 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2279 __func__, port_id, ret);
2280 goto err;
2281 }
2282
2283err:
2284 return ret;
2285}
2286
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2287static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2288{
2289 int idx = 0;
2290
2291 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2292 sizeof("WSA_CDC_DMA_RX_0")))
2293 idx = WSA_CDC_DMA_RX_0;
2294 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2295 sizeof("WSA_CDC_DMA_RX_0")))
2296 idx = WSA_CDC_DMA_RX_1;
2297 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2298 sizeof("RX_CDC_DMA_RX_0")))
2299 idx = RX_CDC_DMA_RX_0;
2300 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2301 sizeof("RX_CDC_DMA_RX_1")))
2302 idx = RX_CDC_DMA_RX_1;
2303 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2304 sizeof("RX_CDC_DMA_RX_2")))
2305 idx = RX_CDC_DMA_RX_2;
2306 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2307 sizeof("RX_CDC_DMA_RX_3")))
2308 idx = RX_CDC_DMA_RX_3;
2309 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2310 sizeof("RX_CDC_DMA_RX_5")))
2311 idx = RX_CDC_DMA_RX_5;
2312 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2313 sizeof("WSA_CDC_DMA_TX_0")))
2314 idx = WSA_CDC_DMA_TX_0;
2315 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2316 sizeof("WSA_CDC_DMA_TX_1")))
2317 idx = WSA_CDC_DMA_TX_1;
2318 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2319 sizeof("WSA_CDC_DMA_TX_2")))
2320 idx = WSA_CDC_DMA_TX_2;
2321 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2322 sizeof("TX_CDC_DMA_TX_0")))
2323 idx = TX_CDC_DMA_TX_0;
2324 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2325 sizeof("TX_CDC_DMA_TX_3")))
2326 idx = TX_CDC_DMA_TX_3;
2327 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2328 sizeof("TX_CDC_DMA_TX_4")))
2329 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2330 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2331 sizeof("VA_CDC_DMA_TX_0")))
2332 idx = VA_CDC_DMA_TX_0;
2333 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2334 sizeof("VA_CDC_DMA_TX_1")))
2335 idx = VA_CDC_DMA_TX_1;
2336 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2337 sizeof("VA_CDC_DMA_TX_2")))
2338 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2339 else {
2340 pr_err("%s: unsupported channel: %s\n",
2341 __func__, kcontrol->id.name);
2342 return -EINVAL;
2343 }
2344
2345 return idx;
2346}
2347
2348static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2349 struct snd_ctl_elem_value *ucontrol)
2350{
2351 int ch_num = cdc_dma_get_port_idx(kcontrol);
2352
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2353 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2354 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2355 return ch_num;
2356 }
2357
2358 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2359 cdc_dma_rx_cfg[ch_num].channels - 1);
2360 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2361 return 0;
2362}
2363
2364static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2365 struct snd_ctl_elem_value *ucontrol)
2366{
2367 int ch_num = cdc_dma_get_port_idx(kcontrol);
2368
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2369 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2370 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2371 return ch_num;
2372 }
2373
2374 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2375
2376 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2377 cdc_dma_rx_cfg[ch_num].channels);
2378 return 1;
2379}
2380
2381static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2382 struct snd_ctl_elem_value *ucontrol)
2383{
2384 int ch_num = cdc_dma_get_port_idx(kcontrol);
2385
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2386 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2387 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2388 return ch_num;
2389 }
2390
2391 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2392 case SNDRV_PCM_FORMAT_S32_LE:
2393 ucontrol->value.integer.value[0] = 3;
2394 break;
2395 case SNDRV_PCM_FORMAT_S24_3LE:
2396 ucontrol->value.integer.value[0] = 2;
2397 break;
2398 case SNDRV_PCM_FORMAT_S24_LE:
2399 ucontrol->value.integer.value[0] = 1;
2400 break;
2401 case SNDRV_PCM_FORMAT_S16_LE:
2402 default:
2403 ucontrol->value.integer.value[0] = 0;
2404 break;
2405 }
2406
2407 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2408 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2409 ucontrol->value.integer.value[0]);
2410 return 0;
2411}
2412
2413static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_value *ucontrol)
2415{
2416 int rc = 0;
2417 int ch_num = cdc_dma_get_port_idx(kcontrol);
2418
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2419 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2420 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2421 return ch_num;
2422 }
2423
2424 switch (ucontrol->value.integer.value[0]) {
2425 case 3:
2426 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2427 break;
2428 case 2:
2429 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2430 break;
2431 case 1:
2432 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2433 break;
2434 case 0:
2435 default:
2436 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2437 break;
2438 }
2439 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2440 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2441 ucontrol->value.integer.value[0]);
2442
2443 return rc;
2444}
2445
2446
2447static int cdc_dma_get_sample_rate_val(int sample_rate)
2448{
2449 int sample_rate_val = 0;
2450
2451 switch (sample_rate) {
2452 case SAMPLING_RATE_8KHZ:
2453 sample_rate_val = 0;
2454 break;
2455 case SAMPLING_RATE_11P025KHZ:
2456 sample_rate_val = 1;
2457 break;
2458 case SAMPLING_RATE_16KHZ:
2459 sample_rate_val = 2;
2460 break;
2461 case SAMPLING_RATE_22P05KHZ:
2462 sample_rate_val = 3;
2463 break;
2464 case SAMPLING_RATE_32KHZ:
2465 sample_rate_val = 4;
2466 break;
2467 case SAMPLING_RATE_44P1KHZ:
2468 sample_rate_val = 5;
2469 break;
2470 case SAMPLING_RATE_48KHZ:
2471 sample_rate_val = 6;
2472 break;
2473 case SAMPLING_RATE_88P2KHZ:
2474 sample_rate_val = 7;
2475 break;
2476 case SAMPLING_RATE_96KHZ:
2477 sample_rate_val = 8;
2478 break;
2479 case SAMPLING_RATE_176P4KHZ:
2480 sample_rate_val = 9;
2481 break;
2482 case SAMPLING_RATE_192KHZ:
2483 sample_rate_val = 10;
2484 break;
2485 case SAMPLING_RATE_352P8KHZ:
2486 sample_rate_val = 11;
2487 break;
2488 case SAMPLING_RATE_384KHZ:
2489 sample_rate_val = 12;
2490 break;
2491 default:
2492 sample_rate_val = 6;
2493 break;
2494 }
2495 return sample_rate_val;
2496}
2497
2498static int cdc_dma_get_sample_rate(int value)
2499{
2500 int sample_rate = 0;
2501
2502 switch (value) {
2503 case 0:
2504 sample_rate = SAMPLING_RATE_8KHZ;
2505 break;
2506 case 1:
2507 sample_rate = SAMPLING_RATE_11P025KHZ;
2508 break;
2509 case 2:
2510 sample_rate = SAMPLING_RATE_16KHZ;
2511 break;
2512 case 3:
2513 sample_rate = SAMPLING_RATE_22P05KHZ;
2514 break;
2515 case 4:
2516 sample_rate = SAMPLING_RATE_32KHZ;
2517 break;
2518 case 5:
2519 sample_rate = SAMPLING_RATE_44P1KHZ;
2520 break;
2521 case 6:
2522 sample_rate = SAMPLING_RATE_48KHZ;
2523 break;
2524 case 7:
2525 sample_rate = SAMPLING_RATE_88P2KHZ;
2526 break;
2527 case 8:
2528 sample_rate = SAMPLING_RATE_96KHZ;
2529 break;
2530 case 9:
2531 sample_rate = SAMPLING_RATE_176P4KHZ;
2532 break;
2533 case 10:
2534 sample_rate = SAMPLING_RATE_192KHZ;
2535 break;
2536 case 11:
2537 sample_rate = SAMPLING_RATE_352P8KHZ;
2538 break;
2539 case 12:
2540 sample_rate = SAMPLING_RATE_384KHZ;
2541 break;
2542 default:
2543 sample_rate = SAMPLING_RATE_48KHZ;
2544 break;
2545 }
2546 return sample_rate;
2547}
2548
2549static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2550 struct snd_ctl_elem_value *ucontrol)
2551{
2552 int ch_num = cdc_dma_get_port_idx(kcontrol);
2553
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2554 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2555 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2556 return ch_num;
2557 }
2558
2559 ucontrol->value.enumerated.item[0] =
2560 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2561
2562 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2563 cdc_dma_rx_cfg[ch_num].sample_rate);
2564 return 0;
2565}
2566
2567static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2568 struct snd_ctl_elem_value *ucontrol)
2569{
2570 int ch_num = cdc_dma_get_port_idx(kcontrol);
2571
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2572 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2573 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2574 return ch_num;
2575 }
2576
2577 cdc_dma_rx_cfg[ch_num].sample_rate =
2578 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2579
2580
2581 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2582 __func__, ucontrol->value.enumerated.item[0],
2583 cdc_dma_rx_cfg[ch_num].sample_rate);
2584 return 0;
2585}
2586
2587static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2588 struct snd_ctl_elem_value *ucontrol)
2589{
2590 int ch_num = cdc_dma_get_port_idx(kcontrol);
2591
2592 if (ch_num < 0) {
2593 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2594 return ch_num;
2595 }
2596
2597 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2598 cdc_dma_tx_cfg[ch_num].channels);
2599 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2600 return 0;
2601}
2602
2603static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2604 struct snd_ctl_elem_value *ucontrol)
2605{
2606 int ch_num = cdc_dma_get_port_idx(kcontrol);
2607
2608 if (ch_num < 0) {
2609 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2610 return ch_num;
2611 }
2612
2613 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2614
2615 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2616 cdc_dma_tx_cfg[ch_num].channels);
2617 return 1;
2618}
2619
2620static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2621 struct snd_ctl_elem_value *ucontrol)
2622{
2623 int sample_rate_val;
2624 int ch_num = cdc_dma_get_port_idx(kcontrol);
2625
2626 if (ch_num < 0) {
2627 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2628 return ch_num;
2629 }
2630
2631 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2632 case SAMPLING_RATE_384KHZ:
2633 sample_rate_val = 12;
2634 break;
2635 case SAMPLING_RATE_352P8KHZ:
2636 sample_rate_val = 11;
2637 break;
2638 case SAMPLING_RATE_192KHZ:
2639 sample_rate_val = 10;
2640 break;
2641 case SAMPLING_RATE_176P4KHZ:
2642 sample_rate_val = 9;
2643 break;
2644 case SAMPLING_RATE_96KHZ:
2645 sample_rate_val = 8;
2646 break;
2647 case SAMPLING_RATE_88P2KHZ:
2648 sample_rate_val = 7;
2649 break;
2650 case SAMPLING_RATE_48KHZ:
2651 sample_rate_val = 6;
2652 break;
2653 case SAMPLING_RATE_44P1KHZ:
2654 sample_rate_val = 5;
2655 break;
2656 case SAMPLING_RATE_32KHZ:
2657 sample_rate_val = 4;
2658 break;
2659 case SAMPLING_RATE_22P05KHZ:
2660 sample_rate_val = 3;
2661 break;
2662 case SAMPLING_RATE_16KHZ:
2663 sample_rate_val = 2;
2664 break;
2665 case SAMPLING_RATE_11P025KHZ:
2666 sample_rate_val = 1;
2667 break;
2668 case SAMPLING_RATE_8KHZ:
2669 sample_rate_val = 0;
2670 break;
2671 default:
2672 sample_rate_val = 6;
2673 break;
2674 }
2675
2676 ucontrol->value.integer.value[0] = sample_rate_val;
2677 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2678 cdc_dma_tx_cfg[ch_num].sample_rate);
2679 return 0;
2680}
2681
2682static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2683 struct snd_ctl_elem_value *ucontrol)
2684{
2685 int ch_num = cdc_dma_get_port_idx(kcontrol);
2686
2687 if (ch_num < 0) {
2688 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2689 return ch_num;
2690 }
2691
2692 switch (ucontrol->value.integer.value[0]) {
2693 case 12:
2694 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2695 break;
2696 case 11:
2697 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2698 break;
2699 case 10:
2700 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2701 break;
2702 case 9:
2703 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2704 break;
2705 case 8:
2706 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2707 break;
2708 case 7:
2709 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2710 break;
2711 case 6:
2712 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2713 break;
2714 case 5:
2715 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2716 break;
2717 case 4:
2718 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2719 break;
2720 case 3:
2721 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2722 break;
2723 case 2:
2724 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2725 break;
2726 case 1:
2727 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2728 break;
2729 case 0:
2730 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2731 break;
2732 default:
2733 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2734 break;
2735 }
2736
2737 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2738 __func__, ucontrol->value.integer.value[0],
2739 cdc_dma_tx_cfg[ch_num].sample_rate);
2740 return 0;
2741}
2742
2743static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2744 struct snd_ctl_elem_value *ucontrol)
2745{
2746 int ch_num = cdc_dma_get_port_idx(kcontrol);
2747
2748 if (ch_num < 0) {
2749 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2750 return ch_num;
2751 }
2752
2753 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2754 case SNDRV_PCM_FORMAT_S32_LE:
2755 ucontrol->value.integer.value[0] = 3;
2756 break;
2757 case SNDRV_PCM_FORMAT_S24_3LE:
2758 ucontrol->value.integer.value[0] = 2;
2759 break;
2760 case SNDRV_PCM_FORMAT_S24_LE:
2761 ucontrol->value.integer.value[0] = 1;
2762 break;
2763 case SNDRV_PCM_FORMAT_S16_LE:
2764 default:
2765 ucontrol->value.integer.value[0] = 0;
2766 break;
2767 }
2768
2769 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2770 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2771 ucontrol->value.integer.value[0]);
2772 return 0;
2773}
2774
2775static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2776 struct snd_ctl_elem_value *ucontrol)
2777{
2778 int rc = 0;
2779 int ch_num = cdc_dma_get_port_idx(kcontrol);
2780
2781 if (ch_num < 0) {
2782 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2783 return ch_num;
2784 }
2785
2786 switch (ucontrol->value.integer.value[0]) {
2787 case 3:
2788 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2789 break;
2790 case 2:
2791 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2792 break;
2793 case 1:
2794 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2795 break;
2796 case 0:
2797 default:
2798 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2799 break;
2800 }
2801 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2802 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2803 ucontrol->value.integer.value[0]);
2804
2805 return rc;
2806}
2807
2808static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2809{
2810 int idx = 0;
2811
2812 switch (be_id) {
2813 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
2814 idx = WSA_CDC_DMA_RX_0;
2815 break;
2816 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
2817 idx = WSA_CDC_DMA_TX_0;
2818 break;
2819 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
2820 idx = WSA_CDC_DMA_RX_1;
2821 break;
2822 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
2823 idx = WSA_CDC_DMA_TX_1;
2824 break;
2825 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
2826 idx = WSA_CDC_DMA_TX_2;
2827 break;
2828 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2829 idx = RX_CDC_DMA_RX_0;
2830 break;
2831 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2832 idx = RX_CDC_DMA_RX_1;
2833 break;
2834 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2835 idx = RX_CDC_DMA_RX_2;
2836 break;
2837 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2838 idx = RX_CDC_DMA_RX_3;
2839 break;
2840 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2841 idx = RX_CDC_DMA_RX_5;
2842 break;
2843 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2844 idx = TX_CDC_DMA_TX_0;
2845 break;
2846 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2847 idx = TX_CDC_DMA_TX_3;
2848 break;
2849 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2850 idx = TX_CDC_DMA_TX_4;
2851 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2852 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2853 idx = VA_CDC_DMA_TX_0;
2854 break;
2855 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2856 idx = VA_CDC_DMA_TX_1;
2857 break;
2858 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2859 idx = VA_CDC_DMA_TX_2;
2860 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2861 default:
2862 idx = RX_CDC_DMA_RX_0;
2863 break;
2864 }
2865
2866 return idx;
2867}
2868
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]2869static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2870 struct snd_ctl_elem_value *ucontrol)
2871{
2872 /*
2873 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2874 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2875 * value.
2876 */
2877 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2878 case SAMPLING_RATE_96KHZ:
2879 ucontrol->value.integer.value[0] = 5;
2880 break;
2881 case SAMPLING_RATE_88P2KHZ:
2882 ucontrol->value.integer.value[0] = 4;
2883 break;
2884 case SAMPLING_RATE_48KHZ:
2885 ucontrol->value.integer.value[0] = 3;
2886 break;
2887 case SAMPLING_RATE_44P1KHZ:
2888 ucontrol->value.integer.value[0] = 2;
2889 break;
2890 case SAMPLING_RATE_16KHZ:
2891 ucontrol->value.integer.value[0] = 1;
2892 break;
2893 case SAMPLING_RATE_8KHZ:
2894 default:
2895 ucontrol->value.integer.value[0] = 0;
2896 break;
2897 }
2898 pr_debug("%s: sample rate = %d\n", __func__,
2899 slim_rx_cfg[SLIM_RX_7].sample_rate);
2900
2901 return 0;
2902}
2903
2904static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2905 struct snd_ctl_elem_value *ucontrol)
2906{
2907 switch (ucontrol->value.integer.value[0]) {
2908 case 1:
2909 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2910 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2911 break;
2912 case 2:
2913 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2914 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2915 break;
2916 case 3:
2917 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2918 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2919 break;
2920 case 4:
2921 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2922 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2923 break;
2924 case 5:
2925 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2926 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2927 break;
2928 case 0:
2929 default:
2930 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2931 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2932 break;
2933 }
2934 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2935 __func__,
2936 slim_rx_cfg[SLIM_RX_7].sample_rate,
2937 slim_tx_cfg[SLIM_TX_7].sample_rate,
2938 ucontrol->value.enumerated.item[0]);
2939
2940 return 0;
2941}
2942
2943static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2944 struct snd_ctl_elem_value *ucontrol)
2945{
2946 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2947 case SAMPLING_RATE_96KHZ:
2948 ucontrol->value.integer.value[0] = 5;
2949 break;
2950 case SAMPLING_RATE_88P2KHZ:
2951 ucontrol->value.integer.value[0] = 4;
2952 break;
2953 case SAMPLING_RATE_48KHZ:
2954 ucontrol->value.integer.value[0] = 3;
2955 break;
2956 case SAMPLING_RATE_44P1KHZ:
2957 ucontrol->value.integer.value[0] = 2;
2958 break;
2959 case SAMPLING_RATE_16KHZ:
2960 ucontrol->value.integer.value[0] = 1;
2961 break;
2962 case SAMPLING_RATE_8KHZ:
2963 default:
2964 ucontrol->value.integer.value[0] = 0;
2965 break;
2966 }
2967 pr_debug("%s: sample rate rx = %d\n", __func__,
2968 slim_rx_cfg[SLIM_RX_7].sample_rate);
2969
2970 return 0;
2971}
2972
2973static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2974 struct snd_ctl_elem_value *ucontrol)
2975{
2976 switch (ucontrol->value.integer.value[0]) {
2977 case 1:
2978 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2979 break;
2980 case 2:
2981 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2982 break;
2983 case 3:
2984 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2985 break;
2986 case 4:
2987 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2988 break;
2989 case 5:
2990 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2991 break;
2992 case 0:
2993 default:
2994 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2995 break;
2996 }
2997 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2998 __func__,
2999 slim_rx_cfg[SLIM_RX_7].sample_rate,
3000 ucontrol->value.enumerated.item[0]);
3001
3002 return 0;
3003}
3004
3005static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3006 struct snd_ctl_elem_value *ucontrol)
3007{
3008 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3009 case SAMPLING_RATE_96KHZ:
3010 ucontrol->value.integer.value[0] = 5;
3011 break;
3012 case SAMPLING_RATE_88P2KHZ:
3013 ucontrol->value.integer.value[0] = 4;
3014 break;
3015 case SAMPLING_RATE_48KHZ:
3016 ucontrol->value.integer.value[0] = 3;
3017 break;
3018 case SAMPLING_RATE_44P1KHZ:
3019 ucontrol->value.integer.value[0] = 2;
3020 break;
3021 case SAMPLING_RATE_16KHZ:
3022 ucontrol->value.integer.value[0] = 1;
3023 break;
3024 case SAMPLING_RATE_8KHZ:
3025 default:
3026 ucontrol->value.integer.value[0] = 0;
3027 break;
3028 }
3029 pr_debug("%s: sample rate tx = %d\n", __func__,
3030 slim_tx_cfg[SLIM_TX_7].sample_rate);
3031
3032 return 0;
3033}
3034
3035static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3036 struct snd_ctl_elem_value *ucontrol)
3037{
3038 switch (ucontrol->value.integer.value[0]) {
3039 case 1:
3040 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3041 break;
3042 case 2:
3043 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3044 break;
3045 case 3:
3046 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3047 break;
3048 case 4:
3049 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3050 break;
3051 case 5:
3052 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3053 break;
3054 case 0:
3055 default:
3056 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3057 break;
3058 }
3059 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3060 __func__,
3061 slim_tx_cfg[SLIM_TX_7].sample_rate,
3062 ucontrol->value.enumerated.item[0]);
3063
3064 return 0;
3065}
3066
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3067static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3068 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3069 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3070 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3071 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3072 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3073 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3074 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3075 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3076 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3077 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3078 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3079 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3080 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3081 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3082 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3083 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3084 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3085 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3086 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3087 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3088 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3089 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3090 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3091 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3092 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3093 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3094 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3095 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3096 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3097 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3098 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3099 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3100 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3101 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3102 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3103 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3104 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3105 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3106 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3107 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3108 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3109 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3110 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3111 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3112 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3113 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3114 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3115 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3116 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3117 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3118 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3119 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3120 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3121 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3122 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3123 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3124 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3125 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3126 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3127 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3128 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3129 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3130 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3131 wsa_cdc_dma_rx_0_sample_rate,
3132 cdc_dma_rx_sample_rate_get,
3133 cdc_dma_rx_sample_rate_put),
3134 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3135 wsa_cdc_dma_rx_1_sample_rate,
3136 cdc_dma_rx_sample_rate_get,
3137 cdc_dma_rx_sample_rate_put),
3138 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3139 rx_cdc_dma_rx_0_sample_rate,
3140 cdc_dma_rx_sample_rate_get,
3141 cdc_dma_rx_sample_rate_put),
3142 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3143 rx_cdc_dma_rx_1_sample_rate,
3144 cdc_dma_rx_sample_rate_get,
3145 cdc_dma_rx_sample_rate_put),
3146 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3147 rx_cdc_dma_rx_2_sample_rate,
3148 cdc_dma_rx_sample_rate_get,
3149 cdc_dma_rx_sample_rate_put),
3150 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3151 rx_cdc_dma_rx_3_sample_rate,
3152 cdc_dma_rx_sample_rate_get,
3153 cdc_dma_rx_sample_rate_put),
3154 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3155 rx_cdc_dma_rx_5_sample_rate,
3156 cdc_dma_rx_sample_rate_get,
3157 cdc_dma_rx_sample_rate_put),
3158 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3159 wsa_cdc_dma_tx_0_sample_rate,
3160 cdc_dma_tx_sample_rate_get,
3161 cdc_dma_tx_sample_rate_put),
3162 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3163 wsa_cdc_dma_tx_1_sample_rate,
3164 cdc_dma_tx_sample_rate_get,
3165 cdc_dma_tx_sample_rate_put),
3166 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3167 wsa_cdc_dma_tx_2_sample_rate,
3168 cdc_dma_tx_sample_rate_get,
3169 cdc_dma_tx_sample_rate_put),
3170 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3171 tx_cdc_dma_tx_0_sample_rate,
3172 cdc_dma_tx_sample_rate_get,
3173 cdc_dma_tx_sample_rate_put),
3174 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3175 tx_cdc_dma_tx_3_sample_rate,
3176 cdc_dma_tx_sample_rate_get,
3177 cdc_dma_tx_sample_rate_put),
3178 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3179 tx_cdc_dma_tx_4_sample_rate,
3180 cdc_dma_tx_sample_rate_get,
3181 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3182 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3183 va_cdc_dma_tx_0_sample_rate,
3184 cdc_dma_tx_sample_rate_get,
3185 cdc_dma_tx_sample_rate_put),
3186 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3187 va_cdc_dma_tx_1_sample_rate,
3188 cdc_dma_tx_sample_rate_get,
3189 cdc_dma_tx_sample_rate_put),
3190 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3191 va_cdc_dma_tx_2_sample_rate,
3192 cdc_dma_tx_sample_rate_get,
3193 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3194};
3195
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3196static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3197 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3198 usb_audio_rx_sample_rate_get,
3199 usb_audio_rx_sample_rate_put),
3200 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3201 usb_audio_tx_sample_rate_get,
3202 usb_audio_tx_sample_rate_put),
3203 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3204 tdm_rx_sample_rate_get,
3205 tdm_rx_sample_rate_put),
3206 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3207 tdm_rx_sample_rate_get,
3208 tdm_rx_sample_rate_put),
3209 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3210 tdm_rx_sample_rate_get,
3211 tdm_rx_sample_rate_put),
3212 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3213 tdm_tx_sample_rate_get,
3214 tdm_tx_sample_rate_put),
3215 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3216 tdm_tx_sample_rate_get,
3217 tdm_tx_sample_rate_put),
3218 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3219 tdm_tx_sample_rate_get,
3220 tdm_tx_sample_rate_put),
3221 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3222 aux_pcm_rx_sample_rate_get,
3223 aux_pcm_rx_sample_rate_put),
3224 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3225 aux_pcm_rx_sample_rate_get,
3226 aux_pcm_rx_sample_rate_put),
3227 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3228 aux_pcm_rx_sample_rate_get,
3229 aux_pcm_rx_sample_rate_put),
3230 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3231 aux_pcm_tx_sample_rate_get,
3232 aux_pcm_tx_sample_rate_put),
3233 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3234 aux_pcm_tx_sample_rate_get,
3235 aux_pcm_tx_sample_rate_put),
3236 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3237 aux_pcm_tx_sample_rate_get,
3238 aux_pcm_tx_sample_rate_put),
3239 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3240 mi2s_rx_sample_rate_get,
3241 mi2s_rx_sample_rate_put),
3242 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3243 mi2s_rx_sample_rate_get,
3244 mi2s_rx_sample_rate_put),
3245 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3246 mi2s_rx_sample_rate_get,
3247 mi2s_rx_sample_rate_put),
3248 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3249 mi2s_tx_sample_rate_get,
3250 mi2s_tx_sample_rate_put),
3251 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3252 mi2s_tx_sample_rate_get,
3253 mi2s_tx_sample_rate_put),
3254 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3255 mi2s_tx_sample_rate_get,
3256 mi2s_tx_sample_rate_put),
3257 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3258 usb_audio_rx_format_get, usb_audio_rx_format_put),
3259 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3260 usb_audio_tx_format_get, usb_audio_tx_format_put),
3261 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3262 tdm_rx_format_get,
3263 tdm_rx_format_put),
3264 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3265 tdm_rx_format_get,
3266 tdm_rx_format_put),
3267 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3268 tdm_rx_format_get,
3269 tdm_rx_format_put),
3270 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3271 tdm_tx_format_get,
3272 tdm_tx_format_put),
3273 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3274 tdm_tx_format_get,
3275 tdm_tx_format_put),
3276 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3277 tdm_tx_format_get,
3278 tdm_tx_format_put),
3279 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3280 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3281 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3282 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3283 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3284 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3285 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3286 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3287 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3288 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3289 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3290 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3291 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3292 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3293 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3294 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3295 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3296 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3297 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3298 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3299 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3300 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3301 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3302 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3303 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3304 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3305 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3306 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3307 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3308 proxy_rx_ch_get, proxy_rx_ch_put),
3309 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3310 tdm_rx_ch_get,
3311 tdm_rx_ch_put),
3312 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3313 tdm_rx_ch_get,
3314 tdm_rx_ch_put),
3315 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3316 tdm_rx_ch_get,
3317 tdm_rx_ch_put),
3318 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3319 tdm_tx_ch_get,
3320 tdm_tx_ch_put),
3321 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3322 tdm_tx_ch_get,
3323 tdm_tx_ch_put),
3324 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3325 tdm_tx_ch_get,
3326 tdm_tx_ch_put),
3327 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3328 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3329 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3330 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3331 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3332 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3333 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3334 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3335 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3336 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3337 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3338 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3339 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3340 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3341 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3342 ext_disp_rx_format_get, ext_disp_rx_format_put),
3343 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3344 ext_disp_rx_sample_rate_get,
3345 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3346 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3347 msm_bt_sample_rate_get,
3348 msm_bt_sample_rate_put),
3349 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3350 msm_bt_sample_rate_rx_get,
3351 msm_bt_sample_rate_rx_put),
3352 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3353 msm_bt_sample_rate_tx_get,
3354 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3355 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3356 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3357 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3358 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3359};
3360
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3361static const struct snd_kcontrol_new msm_snd_controls[] = {
3362 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3363 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3364 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3365 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3366 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3367 aux_pcm_rx_sample_rate_get,
3368 aux_pcm_rx_sample_rate_put),
3369 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3370 aux_pcm_tx_sample_rate_get,
3371 aux_pcm_tx_sample_rate_put),
3372};
3373
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3374static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3375{
3376 int idx;
3377
3378 switch (be_id) {
3379 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3380 idx = EXT_DISP_RX_IDX_DP;
3381 break;
3382 default:
3383 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3384 idx = -EINVAL;
3385 break;
3386 }
3387
3388 return idx;
3389}
3390
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3391static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3392 struct snd_pcm_hw_params *params)
3393{
3394 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3395 struct snd_interval *rate = hw_param_interval(params,
3396 SNDRV_PCM_HW_PARAM_RATE);
3397 struct snd_interval *channels = hw_param_interval(params,
3398 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3399 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3400
3401 pr_debug("%s: format = %d, rate = %d\n",
3402 __func__, params_format(params), params_rate(params));
3403
3404 switch (dai_link->id) {
3405 case MSM_BACKEND_DAI_USB_RX:
3406 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3407 usb_rx_cfg.bit_format);
3408 rate->min = rate->max = usb_rx_cfg.sample_rate;
3409 channels->min = channels->max = usb_rx_cfg.channels;
3410 break;
3411
3412 case MSM_BACKEND_DAI_USB_TX:
3413 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3414 usb_tx_cfg.bit_format);
3415 rate->min = rate->max = usb_tx_cfg.sample_rate;
3416 channels->min = channels->max = usb_tx_cfg.channels;
3417 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3418
3419 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3420 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
3421 if (idx < 0) {
3422 pr_err("%s: Incorrect ext disp idx %d\n",
3423 __func__, idx);
3424 rc = idx;
3425 goto done;
3426 }
3427
3428 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3429 ext_disp_rx_cfg[idx].bit_format);
3430 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
3431 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
3432 break;
3433
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3434 case MSM_BACKEND_DAI_AFE_PCM_RX:
3435 channels->min = channels->max = proxy_rx_cfg.channels;
3436 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3437 break;
3438
3439 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3440 channels->min = channels->max =
3441 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3442 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3443 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3444 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3445 break;
3446
3447 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3448 channels->min = channels->max =
3449 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3450 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3451 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3452 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3453 break;
3454
3455 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3456 channels->min = channels->max =
3457 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3458 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3459 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3460 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3461 break;
3462
3463 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3464 channels->min = channels->max =
3465 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3466 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3467 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3468 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3469 break;
3470
3471 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3472 channels->min = channels->max =
3473 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3474 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3475 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3476 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3477 break;
3478
3479 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3480 channels->min = channels->max =
3481 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3482 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3483 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3484 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3485 break;
3486
3487 case MSM_BACKEND_DAI_AUXPCM_RX:
3488 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3489 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3490 rate->min = rate->max =
3491 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3492 channels->min = channels->max =
3493 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3494 break;
3495
3496 case MSM_BACKEND_DAI_AUXPCM_TX:
3497 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3498 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3499 rate->min = rate->max =
3500 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3501 channels->min = channels->max =
3502 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3503 break;
3504
3505 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3506 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3507 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3508 rate->min = rate->max =
3509 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3510 channels->min = channels->max =
3511 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3512 break;
3513
3514 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3515 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3516 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3517 rate->min = rate->max =
3518 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3519 channels->min = channels->max =
3520 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3521 break;
3522
3523 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3524 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3525 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3526 rate->min = rate->max =
3527 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3528 channels->min = channels->max =
3529 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3530 break;
3531
3532 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3533 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3534 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3535 rate->min = rate->max =
3536 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3537 channels->min = channels->max =
3538 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3539 break;
3540
3541 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3542 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3543 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3544 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3545 channels->min = channels->max =
3546 mi2s_rx_cfg[PRIM_MI2S].channels;
3547 break;
3548
3549 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3550 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3551 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3552 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3553 channels->min = channels->max =
3554 mi2s_tx_cfg[PRIM_MI2S].channels;
3555 break;
3556
3557 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3558 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3559 mi2s_rx_cfg[SEC_MI2S].bit_format);
3560 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3561 channels->min = channels->max =
3562 mi2s_rx_cfg[SEC_MI2S].channels;
3563 break;
3564
3565 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3566 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3567 mi2s_tx_cfg[SEC_MI2S].bit_format);
3568 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3569 channels->min = channels->max =
3570 mi2s_tx_cfg[SEC_MI2S].channels;
3571 break;
3572
3573 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3574 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3575 mi2s_rx_cfg[TERT_MI2S].bit_format);
3576 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3577 channels->min = channels->max =
3578 mi2s_rx_cfg[TERT_MI2S].channels;
3579 break;
3580
3581 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3582 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3583 mi2s_tx_cfg[TERT_MI2S].bit_format);
3584 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3585 channels->min = channels->max =
3586 mi2s_tx_cfg[TERT_MI2S].channels;
3587 break;
3588
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]3589 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3590 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3591 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3592 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3593 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3594 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3595 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3596 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3597 cdc_dma_rx_cfg[idx].bit_format);
3598 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3599 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3600 break;
3601
3602 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3603 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3604 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3605 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3606 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3607 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3608 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3609 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3610 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3611 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]3612 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3613 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3614 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3615 break;
3616
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]3617 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3618 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3619 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3620 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]3621 channels->min = channels->max = msm_vi_feed_tx_ch;
3622 break;
3623
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3624 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3625 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3626 slim_rx_cfg[SLIM_RX_7].bit_format);
3627 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3628 channels->min = channels->max =
3629 slim_rx_cfg[SLIM_RX_7].channels;
3630 break;
3631
3632 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
3633 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3634 channels->min = channels->max =
3635 slim_tx_cfg[SLIM_TX_7].channels;
3636 break;
3637
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]3638 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3639 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3640 channels->min = channels->max =
3641 slim_tx_cfg[SLIM_TX_8].channels;
3642 break;
3643
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3644 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3645 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3646 afe_loopback_tx_cfg[idx].bit_format);
3647 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3648 channels->min = channels->max =
3649 afe_loopback_tx_cfg[idx].channels;
3650 break;
3651
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]3652 default:
3653 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3654 break;
3655 }
3656
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3657done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3658 return rc;
3659}
3660
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]3661static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
3662{
3663 struct snd_soc_card *card = component->card;
3664 struct msm_asoc_mach_data *pdata =
3665 snd_soc_card_get_drvdata(card);
3666
3667 if (!pdata->fsa_handle)
3668 return false;
3669
3670 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3671}
3672
3673static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3674{
3675 int value = 0;
3676 bool ret = false;
3677 struct snd_soc_card *card;
3678 struct msm_asoc_mach_data *pdata;
3679
3680 if (!component) {
3681 pr_err("%s component is NULL\n", __func__);
3682 return false;
3683 }
3684 card = component->card;
3685 pdata = snd_soc_card_get_drvdata(card);
3686
3687 if (!pdata)
3688 return false;
3689
3690 if (wcd_mbhc_cfg.enable_usbc_analog)
3691 return msm_usbc_swap_gnd_mic(component, active);
3692
3693 /* if usbc is not defined, swap using us_euro_gpio_p */
3694 if (pdata->us_euro_gpio_p) {
3695 value = msm_cdc_pinctrl_get_state(
3696 pdata->us_euro_gpio_p);
3697 if (value)
3698 msm_cdc_pinctrl_select_sleep_state(
3699 pdata->us_euro_gpio_p);
3700 else
3701 msm_cdc_pinctrl_select_active_state(
3702 pdata->us_euro_gpio_p);
3703 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3704 __func__, value, !value);
3705 ret = true;
3706 }
3707
3708 return ret;
3709}
3710
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3711static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3712 struct snd_pcm_hw_params *params)
3713{
3714 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3715 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3716 int ret = 0;
3717 int slot_width = 32;
3718 int channels, slots;
3719 unsigned int slot_mask, rate, clk_freq;
3720 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3721
3722 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3723
3724 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3725 switch (cpu_dai->id) {
3726 case AFE_PORT_ID_PRIMARY_TDM_RX:
3727 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3728 break;
3729 case AFE_PORT_ID_SECONDARY_TDM_RX:
3730 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3731 break;
3732 case AFE_PORT_ID_TERTIARY_TDM_RX:
3733 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3734 break;
3735 case AFE_PORT_ID_PRIMARY_TDM_TX:
3736 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3737 break;
3738 case AFE_PORT_ID_SECONDARY_TDM_TX:
3739 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3740 break;
3741 case AFE_PORT_ID_TERTIARY_TDM_TX:
3742 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3743 break;
3744
3745 default:
3746 pr_err("%s: dai id 0x%x not supported\n",
3747 __func__, cpu_dai->id);
3748 return -EINVAL;
3749 }
3750
3751 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3752 /*2 slot config - bits 0 and 1 set for the first two slots */
3753 slot_mask = 0x0000FFFF >> (16 - slots);
3754 channels = slots;
3755
3756 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3757 __func__, slot_width, slots);
3758
3759 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3760 slots, slot_width);
3761 if (ret < 0) {
3762 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3763 __func__, ret);
3764 goto end;
3765 }
3766
3767 ret = snd_soc_dai_set_channel_map(cpu_dai,
3768 0, NULL, channels, slot_offset);
3769 if (ret < 0) {
3770 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3771 __func__, ret);
3772 goto end;
3773 }
3774 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3775 /*2 slot config - bits 0 and 1 set for the first two slots */
3776 slot_mask = 0x0000FFFF >> (16 - slots);
3777 channels = slots;
3778
3779 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3780 __func__, slot_width, slots);
3781
3782 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3783 slots, slot_width);
3784 if (ret < 0) {
3785 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3786 __func__, ret);
3787 goto end;
3788 }
3789
3790 ret = snd_soc_dai_set_channel_map(cpu_dai,
3791 channels, slot_offset, 0, NULL);
3792 if (ret < 0) {
3793 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3794 __func__, ret);
3795 goto end;
3796 }
3797 } else {
3798 ret = -EINVAL;
3799 pr_err("%s: invalid use case, err:%d\n",
3800 __func__, ret);
3801 goto end;
3802 }
3803
3804 rate = params_rate(params);
3805 clk_freq = rate * slot_width * slots;
3806 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3807 if (ret < 0)
3808 pr_err("%s: failed to set tdm clk, err:%d\n",
3809 __func__, ret);
3810
3811end:
3812 return ret;
3813}
3814
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3815static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3816 struct snd_pcm_hw_params *params)
3817{
3818 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3819 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3820 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3821 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3822
3823 int ret = 0;
3824 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3825 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3826 u32 user_set_tx_ch = 0;
3827 u32 user_set_rx_ch = 0;
3828 u32 ch_id;
3829
3830 ret = snd_soc_dai_get_channel_map(codec_dai,
3831 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3832 &rx_ch_cdc_dma);
3833 if (ret < 0) {
3834 pr_err("%s: failed to get codec chan map, err:%d\n",
3835 __func__, ret);
3836 goto err;
3837 }
3838
3839 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3840 switch (dai_link->id) {
3841 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3842 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3843 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3844 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3845 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3846 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3847 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3848 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3849 {
3850 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3851 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3852 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3853 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3854 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3855 user_set_rx_ch, &rx_ch_cdc_dma);
3856 if (ret < 0) {
3857 pr_err("%s: failed to set cpu chan map, err:%d\n",
3858 __func__, ret);
3859 goto err;
3860 }
3861
3862 }
3863 break;
3864 }
3865 } else {
3866 switch (dai_link->id) {
3867 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3868 {
3869 user_set_tx_ch = msm_vi_feed_tx_ch;
3870 }
3871 break;
3872 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3873 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3874 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3875 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3876 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3877 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3878 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3879 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3880 {
3881 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3882 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3883 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3884 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3885 }
3886 break;
3887 }
3888
3889 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3890 &tx_ch_cdc_dma, 0, 0);
3891 if (ret < 0) {
3892 pr_err("%s: failed to set cpu chan map, err:%d\n",
3893 __func__, ret);
3894 goto err;
3895 }
3896 }
3897
3898err:
3899 return ret;
3900}
3901
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3902static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3903{
3904 cpumask_t mask;
3905
3906 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3907 pm_qos_remove_request(&substream->latency_pm_qos_req);
3908
3909 cpumask_clear(&mask);
3910 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3911 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3912 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3913
3914 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3915
3916 pm_qos_add_request(&substream->latency_pm_qos_req,
3917 PM_QOS_CPU_DMA_LATENCY,
3918 MSM_LL_QOS_VALUE);
3919 return 0;
3920}
3921
3922static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3923{
3924 int ret = 0;
3925 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3926 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3927 int index = cpu_dai->id;
3928 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3929
3930 dev_dbg(rtd->card->dev,
3931 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3932 __func__, substream->name, substream->stream,
3933 cpu_dai->name, cpu_dai->id);
3934
3935 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3936 ret = -EINVAL;
3937 dev_err(rtd->card->dev,
3938 "%s: CPU DAI id (%d) out of range\n",
3939 __func__, cpu_dai->id);
3940 goto err;
3941 }
3942 /*
3943 * Mutex protection in case the same MI2S
3944 * interface using for both TX and RX so
3945 * that the same clock won't be enable twice.
3946 */
3947 mutex_lock(&mi2s_intf_conf[index].lock);
3948 if (++mi2s_intf_conf[index].ref_cnt == 1) {
3949 /* Check if msm needs to provide the clock to the interface */
3950 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
3951 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
3952 fmt = SND_SOC_DAIFMT_CBM_CFM;
3953 }
3954 ret = msm_mi2s_set_sclk(substream, true);
3955 if (ret < 0) {
3956 dev_err(rtd->card->dev,
3957 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
3958 __func__, ret);
3959 goto clean_up;
3960 }
3961
3962 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
3963 if (ret < 0) {
3964 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
3965 __func__, index, ret);
3966 goto clk_off;
3967 }
3968 }
3969clk_off:
3970 if (ret < 0)
3971 msm_mi2s_set_sclk(substream, false);
3972clean_up:
3973 if (ret < 0)
3974 mi2s_intf_conf[index].ref_cnt--;
3975 mutex_unlock(&mi2s_intf_conf[index].lock);
3976err:
3977 return ret;
3978}
3979
3980static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
3981{
3982 int ret = 0;
3983 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3984 int index = rtd->cpu_dai->id;
3985
3986 pr_debug("%s(): substream = %s stream = %d\n", __func__,
3987 substream->name, substream->stream);
3988 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3989 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
3990 return;
3991 }
3992
3993 mutex_lock(&mi2s_intf_conf[index].lock);
3994 if (--mi2s_intf_conf[index].ref_cnt == 0) {
3995 ret = msm_mi2s_set_sclk(substream, false);
3996 if (ret < 0)
3997 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
3998 __func__, index, ret);
3999 }
4000 mutex_unlock(&mi2s_intf_conf[index].lock);
4001}
4002
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4003static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4004 struct snd_pcm_hw_params *params)
4005{
4006 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4007 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4008 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4009 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4010 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4011 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4012 int ret = 0;
4013
4014 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4015 codec_dai->name, codec_dai->id);
4016 ret = snd_soc_dai_get_channel_map(codec_dai,
4017 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4018 if (ret) {
4019 dev_err(rtd->dev,
4020 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4021 __func__, ret);
4022 goto err;
4023 }
4024
4025 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4026 __func__, tx_ch_cnt, dai_link->id);
4027
4028 ret = snd_soc_dai_set_channel_map(cpu_dai,
4029 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4030 if (ret)
4031 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4032 __func__, ret);
4033
4034err:
4035 return ret;
4036}
4037
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4038static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4039 struct snd_pcm_hw_params *params)
4040{
4041 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4042 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4043 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4044 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4045 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4046 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4047 int ret = 0;
4048
4049 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4050 codec_dai->name, codec_dai->id);
4051 ret = snd_soc_dai_get_channel_map(codec_dai,
4052 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4053 if (ret) {
4054 dev_err(rtd->dev,
4055 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4056 __func__, ret);
4057 goto err;
4058 }
4059
4060 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4061 __func__, tx_ch_cnt, dai_link->id);
4062
4063 ret = snd_soc_dai_set_channel_map(cpu_dai,
4064 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4065 if (ret)
4066 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4067 __func__, ret);
4068
4069err:
4070 return ret;
4071}
4072
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4073static struct snd_soc_ops kona_tdm_be_ops = {
4074 .hw_params = kona_tdm_snd_hw_params,
4075};
4076
4077static struct snd_soc_ops msm_mi2s_be_ops = {
4078 .startup = msm_mi2s_snd_startup,
4079 .shutdown = msm_mi2s_snd_shutdown,
4080};
4081
4082static struct snd_soc_ops msm_fe_qos_ops = {
4083 .prepare = msm_fe_qos_prepare,
4084};
4085
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4086static struct snd_soc_ops msm_cdc_dma_be_ops = {
4087 .hw_params = msm_snd_cdc_dma_hw_params,
4088};
4089
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4090static struct snd_soc_ops msm_wcn_ops = {
4091 .hw_params = msm_wcn_hw_params,
4092};
4093
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4094static struct snd_soc_ops msm_wcn_ops_lito = {
4095 .hw_params = msm_wcn_hw_params_lito,
4096};
4097
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4098static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4099 struct snd_kcontrol *kcontrol, int event)
4100{
4101 struct msm_asoc_mach_data *pdata = NULL;
4102 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
4103 int ret = 0;
4104 u32 dmic_idx;
4105 int *dmic_gpio_cnt;
4106 struct device_node *dmic_gpio;
4107 char *wname;
4108
4109 wname = strpbrk(w->name, "012345");
4110 if (!wname) {
4111 dev_err(component->dev, "%s: widget not found\n", __func__);
4112 return -EINVAL;
4113 }
4114
4115 ret = kstrtouint(wname, 10, &dmic_idx);
4116 if (ret < 0) {
4117 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4118 __func__);
4119 return -EINVAL;
4120 }
4121
4122 pdata = snd_soc_card_get_drvdata(component->card);
4123
4124 switch (dmic_idx) {
4125 case 0:
4126 case 1:
4127 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4128 dmic_gpio = pdata->dmic01_gpio_p;
4129 break;
4130 case 2:
4131 case 3:
4132 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4133 dmic_gpio = pdata->dmic23_gpio_p;
4134 break;
4135 case 4:
4136 case 5:
4137 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
4138 dmic_gpio = pdata->dmic45_gpio_p;
4139 break;
4140 default:
4141 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4142 __func__);
4143 return -EINVAL;
4144 }
4145
4146 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4147 __func__, event, dmic_idx, *dmic_gpio_cnt);
4148
4149 switch (event) {
4150 case SND_SOC_DAPM_PRE_PMU:
4151 (*dmic_gpio_cnt)++;
4152 if (*dmic_gpio_cnt == 1) {
4153 ret = msm_cdc_pinctrl_select_active_state(
4154 dmic_gpio);
4155 if (ret < 0) {
4156 pr_err("%s: gpio set cannot be activated %sd",
4157 __func__, "dmic_gpio");
4158 return ret;
4159 }
4160 }
4161
4162 break;
4163 case SND_SOC_DAPM_POST_PMD:
4164 (*dmic_gpio_cnt)--;
4165 if (*dmic_gpio_cnt == 0) {
4166 ret = msm_cdc_pinctrl_select_sleep_state(
4167 dmic_gpio);
4168 if (ret < 0) {
4169 pr_err("%s: gpio set cannot be de-activated %sd",
4170 __func__, "dmic_gpio");
4171 return ret;
4172 }
4173 }
4174 break;
4175 default:
4176 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4177 return -EINVAL;
4178 }
4179 return 0;
4180}
4181
4182static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4183 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4184 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4185 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4186 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4187 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4188 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4189 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4190 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4191 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4192 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
4193 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
4194};
4195
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4196static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4197{
4198 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4199 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
4200 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4201
4202 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4203 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4204}
4205
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4206static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
4207{
4208 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4209 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
4210 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4211
4212 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4213 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4214}
4215
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4216static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4217{
4218 int ret = -EINVAL;
4219 struct snd_soc_component *component;
4220 struct snd_soc_dapm_context *dapm;
4221 struct snd_card *card;
4222 struct snd_info_entry *entry;
4223 struct snd_soc_component *aux_comp;
4224 struct msm_asoc_mach_data *pdata =
4225 snd_soc_card_get_drvdata(rtd->card);
4226
4227 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4228 if (!component) {
4229 pr_err("%s: could not find component for bolero_codec\n",
4230 __func__);
4231 return ret;
4232 }
4233
4234 dapm = snd_soc_component_get_dapm(component);
4235
4236 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4237 ARRAY_SIZE(msm_int_snd_controls));
4238 if (ret < 0) {
4239 pr_err("%s: add_component_controls failed: %d\n",
4240 __func__, ret);
4241 return ret;
4242 }
4243 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4244 ARRAY_SIZE(msm_common_snd_controls));
4245 if (ret < 0) {
4246 pr_err("%s: add common snd controls failed: %d\n",
4247 __func__, ret);
4248 return ret;
4249 }
4250
4251 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4252 ARRAY_SIZE(msm_int_dapm_widgets));
4253
4254 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4255 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4256 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4257 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4258
4259 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4260 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4261 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4262 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4263 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4264
4265 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4266 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4267 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4268 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
4269
4270 snd_soc_dapm_sync(dapm);
4271
4272 /*
4273 * Send speaker configuration only for WSA8810.
4274 * Default configuration is for WSA8815.
4275 */
4276 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
4277 __func__, rtd->card->num_aux_devs);
4278 if (rtd->card->num_aux_devs &&
4279 !list_empty(&rtd->card->component_dev_list)) {
4280 aux_comp = list_first_entry(
4281 &rtd->card->component_dev_list,
4282 struct snd_soc_component,
4283 card_aux_list);
4284 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4285 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4286 wsa_macro_set_spkr_mode(component,
4287 WSA_MACRO_SPKR_MODE_1);
4288 wsa_macro_set_spkr_gain_offset(component,
4289 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4290 }
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]4291 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
4292 sm_port_map);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4293 }
4294 card = rtd->card->snd_card;
4295 if (!pdata->codec_root) {
4296 entry = snd_info_create_subdir(card->module, "codecs",
4297 card->proc_root);
4298 if (!entry) {
4299 pr_debug("%s: Cannot create codecs module entry\n",
4300 __func__);
4301 ret = 0;
4302 goto err;
4303 }
4304 pdata->codec_root = entry;
4305 }
4306 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]4307 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4308 codec_reg_done = true;
4309 return 0;
4310err:
4311 return ret;
4312}
4313
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4314static void *def_wcd_mbhc_cal(void)
4315{
4316 void *wcd_mbhc_cal;
4317 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4318 u16 *btn_high;
4319
4320 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4321 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4322 if (!wcd_mbhc_cal)
4323 return NULL;
4324
4325 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4326 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4327 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4328 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4329 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4330
4331 btn_high[0] = 75;
4332 btn_high[1] = 150;
4333 btn_high[2] = 237;
4334 btn_high[3] = 500;
4335 btn_high[4] = 500;
4336 btn_high[5] = 500;
4337 btn_high[6] = 500;
4338 btn_high[7] = 500;
4339
4340 return wcd_mbhc_cal;
4341}
4342
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4343/* Digital audio interface glue - connects codec <---> CPU */
4344static struct snd_soc_dai_link msm_common_dai_links[] = {
4345 /* FrontEnd DAI Links */
4346 {/* hw:x,0 */
4347 .name = MSM_DAILINK_NAME(Media1),
4348 .stream_name = "MultiMedia1",
4349 .cpu_dai_name = "MultiMedia1",
4350 .platform_name = "msm-pcm-dsp.0",
4351 .dynamic = 1,
4352 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4353 .dpcm_playback = 1,
4354 .dpcm_capture = 1,
4355 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4356 SND_SOC_DPCM_TRIGGER_POST},
4357 .codec_dai_name = "snd-soc-dummy-dai",
4358 .codec_name = "snd-soc-dummy",
4359 .ignore_suspend = 1,
4360 /* this dainlink has playback support */
4361 .ignore_pmdown_time = 1,
4362 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4363 },
4364 {/* hw:x,1 */
4365 .name = MSM_DAILINK_NAME(Media2),
4366 .stream_name = "MultiMedia2",
4367 .cpu_dai_name = "MultiMedia2",
4368 .platform_name = "msm-pcm-dsp.0",
4369 .dynamic = 1,
4370 .dpcm_playback = 1,
4371 .dpcm_capture = 1,
4372 .codec_dai_name = "snd-soc-dummy-dai",
4373 .codec_name = "snd-soc-dummy",
4374 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4375 SND_SOC_DPCM_TRIGGER_POST},
4376 .ignore_suspend = 1,
4377 /* this dainlink has playback support */
4378 .ignore_pmdown_time = 1,
4379 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4380 },
4381 {/* hw:x,2 */
4382 .name = "VoiceMMode1",
4383 .stream_name = "VoiceMMode1",
4384 .cpu_dai_name = "VoiceMMode1",
4385 .platform_name = "msm-pcm-voice",
4386 .dynamic = 1,
4387 .dpcm_playback = 1,
4388 .dpcm_capture = 1,
4389 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4390 SND_SOC_DPCM_TRIGGER_POST},
4391 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4392 .ignore_suspend = 1,
4393 .ignore_pmdown_time = 1,
4394 .codec_dai_name = "snd-soc-dummy-dai",
4395 .codec_name = "snd-soc-dummy",
4396 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4397 },
4398 {/* hw:x,3 */
4399 .name = "MSM VoIP",
4400 .stream_name = "VoIP",
4401 .cpu_dai_name = "VoIP",
4402 .platform_name = "msm-voip-dsp",
4403 .dynamic = 1,
4404 .dpcm_playback = 1,
4405 .dpcm_capture = 1,
4406 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4407 SND_SOC_DPCM_TRIGGER_POST},
4408 .codec_dai_name = "snd-soc-dummy-dai",
4409 .codec_name = "snd-soc-dummy",
4410 .ignore_suspend = 1,
4411 /* this dainlink has playback support */
4412 .ignore_pmdown_time = 1,
4413 .id = MSM_FRONTEND_DAI_VOIP,
4414 },
4415 {/* hw:x,4 */
4416 .name = MSM_DAILINK_NAME(ULL),
4417 .stream_name = "MultiMedia3",
4418 .cpu_dai_name = "MultiMedia3",
4419 .platform_name = "msm-pcm-dsp.2",
4420 .dynamic = 1,
4421 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4422 .dpcm_playback = 1,
4423 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4424 SND_SOC_DPCM_TRIGGER_POST},
4425 .codec_dai_name = "snd-soc-dummy-dai",
4426 .codec_name = "snd-soc-dummy",
4427 .ignore_suspend = 1,
4428 /* this dainlink has playback support */
4429 .ignore_pmdown_time = 1,
4430 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4431 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4432 {/* hw:x,5 */
4433 .name = "MSM AFE-PCM RX",
4434 .stream_name = "AFE-PROXY RX",
4435 .cpu_dai_name = "msm-dai-q6-dev.241",
4436 .codec_name = "msm-stub-codec.1",
4437 .codec_dai_name = "msm-stub-rx",
4438 .platform_name = "msm-pcm-afe",
4439 .dpcm_playback = 1,
4440 .ignore_suspend = 1,
4441 /* this dainlink has playback support */
4442 .ignore_pmdown_time = 1,
4443 },
4444 {/* hw:x,6 */
4445 .name = "MSM AFE-PCM TX",
4446 .stream_name = "AFE-PROXY TX",
4447 .cpu_dai_name = "msm-dai-q6-dev.240",
4448 .codec_name = "msm-stub-codec.1",
4449 .codec_dai_name = "msm-stub-tx",
4450 .platform_name = "msm-pcm-afe",
4451 .dpcm_capture = 1,
4452 .ignore_suspend = 1,
4453 },
4454 {/* hw:x,7 */
4455 .name = MSM_DAILINK_NAME(Compress1),
4456 .stream_name = "Compress1",
4457 .cpu_dai_name = "MultiMedia4",
4458 .platform_name = "msm-compress-dsp",
4459 .dynamic = 1,
4460 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4461 .dpcm_playback = 1,
4462 .dpcm_capture = 1,
4463 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4464 SND_SOC_DPCM_TRIGGER_POST},
4465 .codec_dai_name = "snd-soc-dummy-dai",
4466 .codec_name = "snd-soc-dummy",
4467 .ignore_suspend = 1,
4468 .ignore_pmdown_time = 1,
4469 /* this dainlink has playback support */
4470 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4471 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]4472 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4473 {/* hw:x,8 */
4474 .name = "AUXPCM Hostless",
4475 .stream_name = "AUXPCM Hostless",
4476 .cpu_dai_name = "AUXPCM_HOSTLESS",
4477 .platform_name = "msm-pcm-hostless",
4478 .dynamic = 1,
4479 .dpcm_playback = 1,
4480 .dpcm_capture = 1,
4481 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4482 SND_SOC_DPCM_TRIGGER_POST},
4483 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4484 .ignore_suspend = 1,
4485 /* this dainlink has playback support */
4486 .ignore_pmdown_time = 1,
4487 .codec_dai_name = "snd-soc-dummy-dai",
4488 .codec_name = "snd-soc-dummy",
4489 },
4490 {/* hw:x,9 */
4491 .name = MSM_DAILINK_NAME(LowLatency),
4492 .stream_name = "MultiMedia5",
4493 .cpu_dai_name = "MultiMedia5",
4494 .platform_name = "msm-pcm-dsp.1",
4495 .dynamic = 1,
4496 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4497 .dpcm_playback = 1,
4498 .dpcm_capture = 1,
4499 .codec_dai_name = "snd-soc-dummy-dai",
4500 .codec_name = "snd-soc-dummy",
4501 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4502 SND_SOC_DPCM_TRIGGER_POST},
4503 .ignore_suspend = 1,
4504 /* this dainlink has playback support */
4505 .ignore_pmdown_time = 1,
4506 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4507 .ops = &msm_fe_qos_ops,
4508 },
4509 {/* hw:x,10 */
4510 .name = "Listen 1 Audio Service",
4511 .stream_name = "Listen 1 Audio Service",
4512 .cpu_dai_name = "LSM1",
4513 .platform_name = "msm-lsm-client",
4514 .dynamic = 1,
4515 .dpcm_capture = 1,
4516 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4517 SND_SOC_DPCM_TRIGGER_POST },
4518 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4519 .ignore_suspend = 1,
4520 .codec_dai_name = "snd-soc-dummy-dai",
4521 .codec_name = "snd-soc-dummy",
4522 .id = MSM_FRONTEND_DAI_LSM1,
4523 },
4524 /* Multiple Tunnel instances */
4525 {/* hw:x,11 */
4526 .name = MSM_DAILINK_NAME(Compress2),
4527 .stream_name = "Compress2",
4528 .cpu_dai_name = "MultiMedia7",
4529 .platform_name = "msm-compress-dsp",
4530 .dynamic = 1,
4531 .dpcm_playback = 1,
4532 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4533 SND_SOC_DPCM_TRIGGER_POST},
4534 .codec_dai_name = "snd-soc-dummy-dai",
4535 .codec_name = "snd-soc-dummy",
4536 .ignore_suspend = 1,
4537 .ignore_pmdown_time = 1,
4538 /* this dainlink has playback support */
4539 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4540 },
4541 {/* hw:x,12 */
4542 .name = MSM_DAILINK_NAME(MultiMedia10),
4543 .stream_name = "MultiMedia10",
4544 .cpu_dai_name = "MultiMedia10",
4545 .platform_name = "msm-pcm-dsp.1",
4546 .dynamic = 1,
4547 .dpcm_playback = 1,
4548 .dpcm_capture = 1,
4549 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4550 SND_SOC_DPCM_TRIGGER_POST},
4551 .codec_dai_name = "snd-soc-dummy-dai",
4552 .codec_name = "snd-soc-dummy",
4553 .ignore_suspend = 1,
4554 .ignore_pmdown_time = 1,
4555 /* this dainlink has playback support */
4556 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4557 },
4558 {/* hw:x,13 */
4559 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4560 .stream_name = "MM_NOIRQ",
4561 .cpu_dai_name = "MultiMedia8",
4562 .platform_name = "msm-pcm-dsp-noirq",
4563 .dynamic = 1,
4564 .dpcm_playback = 1,
4565 .dpcm_capture = 1,
4566 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4567 SND_SOC_DPCM_TRIGGER_POST},
4568 .codec_dai_name = "snd-soc-dummy-dai",
4569 .codec_name = "snd-soc-dummy",
4570 .ignore_suspend = 1,
4571 .ignore_pmdown_time = 1,
4572 /* this dainlink has playback support */
4573 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4574 .ops = &msm_fe_qos_ops,
4575 },
4576 /* HDMI Hostless */
4577 {/* hw:x,14 */
4578 .name = "HDMI_RX_HOSTLESS",
4579 .stream_name = "HDMI_RX_HOSTLESS",
4580 .cpu_dai_name = "HDMI_HOSTLESS",
4581 .platform_name = "msm-pcm-hostless",
4582 .dynamic = 1,
4583 .dpcm_playback = 1,
4584 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4585 SND_SOC_DPCM_TRIGGER_POST},
4586 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4587 .ignore_suspend = 1,
4588 .ignore_pmdown_time = 1,
4589 .codec_dai_name = "snd-soc-dummy-dai",
4590 .codec_name = "snd-soc-dummy",
4591 },
4592 {/* hw:x,15 */
4593 .name = "VoiceMMode2",
4594 .stream_name = "VoiceMMode2",
4595 .cpu_dai_name = "VoiceMMode2",
4596 .platform_name = "msm-pcm-voice",
4597 .dynamic = 1,
4598 .dpcm_playback = 1,
4599 .dpcm_capture = 1,
4600 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4601 SND_SOC_DPCM_TRIGGER_POST},
4602 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4603 .ignore_suspend = 1,
4604 .ignore_pmdown_time = 1,
4605 .codec_dai_name = "snd-soc-dummy-dai",
4606 .codec_name = "snd-soc-dummy",
4607 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4608 },
4609 /* LSM FE */
4610 {/* hw:x,16 */
4611 .name = "Listen 2 Audio Service",
4612 .stream_name = "Listen 2 Audio Service",
4613 .cpu_dai_name = "LSM2",
4614 .platform_name = "msm-lsm-client",
4615 .dynamic = 1,
4616 .dpcm_capture = 1,
4617 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4618 SND_SOC_DPCM_TRIGGER_POST },
4619 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4620 .ignore_suspend = 1,
4621 .codec_dai_name = "snd-soc-dummy-dai",
4622 .codec_name = "snd-soc-dummy",
4623 .id = MSM_FRONTEND_DAI_LSM2,
4624 },
4625 {/* hw:x,17 */
4626 .name = "Listen 3 Audio Service",
4627 .stream_name = "Listen 3 Audio Service",
4628 .cpu_dai_name = "LSM3",
4629 .platform_name = "msm-lsm-client",
4630 .dynamic = 1,
4631 .dpcm_capture = 1,
4632 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4633 SND_SOC_DPCM_TRIGGER_POST },
4634 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4635 .ignore_suspend = 1,
4636 .codec_dai_name = "snd-soc-dummy-dai",
4637 .codec_name = "snd-soc-dummy",
4638 .id = MSM_FRONTEND_DAI_LSM3,
4639 },
4640 {/* hw:x,18 */
4641 .name = "Listen 4 Audio Service",
4642 .stream_name = "Listen 4 Audio Service",
4643 .cpu_dai_name = "LSM4",
4644 .platform_name = "msm-lsm-client",
4645 .dynamic = 1,
4646 .dpcm_capture = 1,
4647 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4648 SND_SOC_DPCM_TRIGGER_POST },
4649 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4650 .ignore_suspend = 1,
4651 .codec_dai_name = "snd-soc-dummy-dai",
4652 .codec_name = "snd-soc-dummy",
4653 .id = MSM_FRONTEND_DAI_LSM4,
4654 },
4655 {/* hw:x,19 */
4656 .name = "Listen 5 Audio Service",
4657 .stream_name = "Listen 5 Audio Service",
4658 .cpu_dai_name = "LSM5",
4659 .platform_name = "msm-lsm-client",
4660 .dynamic = 1,
4661 .dpcm_capture = 1,
4662 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4663 SND_SOC_DPCM_TRIGGER_POST },
4664 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4665 .ignore_suspend = 1,
4666 .codec_dai_name = "snd-soc-dummy-dai",
4667 .codec_name = "snd-soc-dummy",
4668 .id = MSM_FRONTEND_DAI_LSM5,
4669 },
4670 {/* hw:x,20 */
4671 .name = "Listen 6 Audio Service",
4672 .stream_name = "Listen 6 Audio Service",
4673 .cpu_dai_name = "LSM6",
4674 .platform_name = "msm-lsm-client",
4675 .dynamic = 1,
4676 .dpcm_capture = 1,
4677 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4678 SND_SOC_DPCM_TRIGGER_POST },
4679 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4680 .ignore_suspend = 1,
4681 .codec_dai_name = "snd-soc-dummy-dai",
4682 .codec_name = "snd-soc-dummy",
4683 .id = MSM_FRONTEND_DAI_LSM6,
4684 },
4685 {/* hw:x,21 */
4686 .name = "Listen 7 Audio Service",
4687 .stream_name = "Listen 7 Audio Service",
4688 .cpu_dai_name = "LSM7",
4689 .platform_name = "msm-lsm-client",
4690 .dynamic = 1,
4691 .dpcm_capture = 1,
4692 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4693 SND_SOC_DPCM_TRIGGER_POST },
4694 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4695 .ignore_suspend = 1,
4696 .codec_dai_name = "snd-soc-dummy-dai",
4697 .codec_name = "snd-soc-dummy",
4698 .id = MSM_FRONTEND_DAI_LSM7,
4699 },
4700 {/* hw:x,22 */
4701 .name = "Listen 8 Audio Service",
4702 .stream_name = "Listen 8 Audio Service",
4703 .cpu_dai_name = "LSM8",
4704 .platform_name = "msm-lsm-client",
4705 .dynamic = 1,
4706 .dpcm_capture = 1,
4707 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4708 SND_SOC_DPCM_TRIGGER_POST },
4709 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4710 .ignore_suspend = 1,
4711 .codec_dai_name = "snd-soc-dummy-dai",
4712 .codec_name = "snd-soc-dummy",
4713 .id = MSM_FRONTEND_DAI_LSM8,
4714 },
4715 {/* hw:x,23 */
4716 .name = MSM_DAILINK_NAME(Media9),
4717 .stream_name = "MultiMedia9",
4718 .cpu_dai_name = "MultiMedia9",
4719 .platform_name = "msm-pcm-dsp.0",
4720 .dynamic = 1,
4721 .dpcm_playback = 1,
4722 .dpcm_capture = 1,
4723 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4724 SND_SOC_DPCM_TRIGGER_POST},
4725 .codec_dai_name = "snd-soc-dummy-dai",
4726 .codec_name = "snd-soc-dummy",
4727 .ignore_suspend = 1,
4728 /* this dainlink has playback support */
4729 .ignore_pmdown_time = 1,
4730 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4731 },
4732 {/* hw:x,24 */
4733 .name = MSM_DAILINK_NAME(Compress4),
4734 .stream_name = "Compress4",
4735 .cpu_dai_name = "MultiMedia11",
4736 .platform_name = "msm-compress-dsp",
4737 .dynamic = 1,
4738 .dpcm_playback = 1,
4739 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4740 SND_SOC_DPCM_TRIGGER_POST},
4741 .codec_dai_name = "snd-soc-dummy-dai",
4742 .codec_name = "snd-soc-dummy",
4743 .ignore_suspend = 1,
4744 .ignore_pmdown_time = 1,
4745 /* this dainlink has playback support */
4746 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4747 },
4748 {/* hw:x,25 */
4749 .name = MSM_DAILINK_NAME(Compress5),
4750 .stream_name = "Compress5",
4751 .cpu_dai_name = "MultiMedia12",
4752 .platform_name = "msm-compress-dsp",
4753 .dynamic = 1,
4754 .dpcm_playback = 1,
4755 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4756 SND_SOC_DPCM_TRIGGER_POST},
4757 .codec_dai_name = "snd-soc-dummy-dai",
4758 .codec_name = "snd-soc-dummy",
4759 .ignore_suspend = 1,
4760 .ignore_pmdown_time = 1,
4761 /* this dainlink has playback support */
4762 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4763 },
4764 {/* hw:x,26 */
4765 .name = MSM_DAILINK_NAME(Compress6),
4766 .stream_name = "Compress6",
4767 .cpu_dai_name = "MultiMedia13",
4768 .platform_name = "msm-compress-dsp",
4769 .dynamic = 1,
4770 .dpcm_playback = 1,
4771 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4772 SND_SOC_DPCM_TRIGGER_POST},
4773 .codec_dai_name = "snd-soc-dummy-dai",
4774 .codec_name = "snd-soc-dummy",
4775 .ignore_suspend = 1,
4776 .ignore_pmdown_time = 1,
4777 /* this dainlink has playback support */
4778 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4779 },
4780 {/* hw:x,27 */
4781 .name = MSM_DAILINK_NAME(Compress7),
4782 .stream_name = "Compress7",
4783 .cpu_dai_name = "MultiMedia14",
4784 .platform_name = "msm-compress-dsp",
4785 .dynamic = 1,
4786 .dpcm_playback = 1,
4787 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4788 SND_SOC_DPCM_TRIGGER_POST},
4789 .codec_dai_name = "snd-soc-dummy-dai",
4790 .codec_name = "snd-soc-dummy",
4791 .ignore_suspend = 1,
4792 .ignore_pmdown_time = 1,
4793 /* this dainlink has playback support */
4794 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4795 },
4796 {/* hw:x,28 */
4797 .name = MSM_DAILINK_NAME(Compress8),
4798 .stream_name = "Compress8",
4799 .cpu_dai_name = "MultiMedia15",
4800 .platform_name = "msm-compress-dsp",
4801 .dynamic = 1,
4802 .dpcm_playback = 1,
4803 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4804 SND_SOC_DPCM_TRIGGER_POST},
4805 .codec_dai_name = "snd-soc-dummy-dai",
4806 .codec_name = "snd-soc-dummy",
4807 .ignore_suspend = 1,
4808 .ignore_pmdown_time = 1,
4809 /* this dainlink has playback support */
4810 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4811 },
4812 {/* hw:x,29 */
4813 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4814 .stream_name = "MM_NOIRQ_2",
4815 .cpu_dai_name = "MultiMedia16",
4816 .platform_name = "msm-pcm-dsp-noirq",
4817 .dynamic = 1,
4818 .dpcm_playback = 1,
4819 .dpcm_capture = 1,
4820 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4821 SND_SOC_DPCM_TRIGGER_POST},
4822 .codec_dai_name = "snd-soc-dummy-dai",
4823 .codec_name = "snd-soc-dummy",
4824 .ignore_suspend = 1,
4825 .ignore_pmdown_time = 1,
4826 /* this dainlink has playback support */
4827 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
4828 },
4829 {/* hw:x,30 */
4830 .name = "CDC_DMA Hostless",
4831 .stream_name = "CDC_DMA Hostless",
4832 .cpu_dai_name = "CDC_DMA_HOSTLESS",
4833 .platform_name = "msm-pcm-hostless",
4834 .dynamic = 1,
4835 .dpcm_playback = 1,
4836 .dpcm_capture = 1,
4837 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4838 SND_SOC_DPCM_TRIGGER_POST},
4839 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4840 .ignore_suspend = 1,
4841 /* this dailink has playback support */
4842 .ignore_pmdown_time = 1,
4843 .codec_dai_name = "snd-soc-dummy-dai",
4844 .codec_name = "snd-soc-dummy",
4845 },
4846 {/* hw:x,31 */
4847 .name = "TX3_CDC_DMA Hostless",
4848 .stream_name = "TX3_CDC_DMA Hostless",
4849 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
4850 .platform_name = "msm-pcm-hostless",
4851 .dynamic = 1,
4852 .dpcm_capture = 1,
4853 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4854 SND_SOC_DPCM_TRIGGER_POST},
4855 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4856 .ignore_suspend = 1,
4857 .codec_dai_name = "snd-soc-dummy-dai",
4858 .codec_name = "snd-soc-dummy",
4859 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4860 {/* hw:x,32 */
4861 .name = "Tertiary MI2S TX_Hostless",
4862 .stream_name = "Tertiary MI2S_TX Hostless Capture",
4863 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
4864 .platform_name = "msm-pcm-hostless",
4865 .dynamic = 1,
4866 .dpcm_capture = 1,
4867 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4868 SND_SOC_DPCM_TRIGGER_POST},
4869 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4870 .ignore_suspend = 1,
4871 .ignore_pmdown_time = 1,
4872 .codec_dai_name = "snd-soc-dummy-dai",
4873 .codec_name = "snd-soc-dummy",
4874 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4875};
4876
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4877static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4878 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4879 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
4880 .stream_name = "WSA CDC DMA0 Capture",
4881 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
4882 .platform_name = "msm-pcm-hostless",
4883 .codec_name = "bolero_codec",
4884 .codec_dai_name = "wsa_macro_vifeedback",
4885 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
4886 .be_hw_params_fixup = msm_be_hw_params_fixup,
4887 .ignore_suspend = 1,
4888 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4889 .ops = &msm_cdc_dma_be_ops,
4890 },
4891};
4892
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4893static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4894 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4895 .name = MSM_DAILINK_NAME(ASM Loopback),
4896 .stream_name = "MultiMedia6",
4897 .cpu_dai_name = "MultiMedia6",
4898 .platform_name = "msm-pcm-loopback",
4899 .dynamic = 1,
4900 .dpcm_playback = 1,
4901 .dpcm_capture = 1,
4902 .codec_dai_name = "snd-soc-dummy-dai",
4903 .codec_name = "snd-soc-dummy",
4904 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4905 SND_SOC_DPCM_TRIGGER_POST},
4906 .ignore_suspend = 1,
4907 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4908 .ignore_pmdown_time = 1,
4909 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
4910 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4911 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4912 .name = "USB Audio Hostless",
4913 .stream_name = "USB Audio Hostless",
4914 .cpu_dai_name = "USBAUDIO_HOSTLESS",
4915 .platform_name = "msm-pcm-hostless",
4916 .dynamic = 1,
4917 .dpcm_playback = 1,
4918 .dpcm_capture = 1,
4919 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4920 SND_SOC_DPCM_TRIGGER_POST},
4921 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4922 .ignore_suspend = 1,
4923 .ignore_pmdown_time = 1,
4924 .codec_dai_name = "snd-soc-dummy-dai",
4925 .codec_name = "snd-soc-dummy",
4926 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4927 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4928 .name = "SLIMBUS_7 Hostless",
4929 .stream_name = "SLIMBUS_7 Hostless",
4930 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
4931 .platform_name = "msm-pcm-hostless",
4932 .dynamic = 1,
4933 .dpcm_capture = 1,
4934 .dpcm_playback = 1,
4935 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4936 SND_SOC_DPCM_TRIGGER_POST},
4937 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4938 .ignore_suspend = 1,
4939 .ignore_pmdown_time = 1,
4940 .codec_dai_name = "snd-soc-dummy-dai",
4941 .codec_name = "snd-soc-dummy",
4942 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]4943 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4944 .name = "Compress Capture",
4945 .stream_name = "Compress9",
4946 .cpu_dai_name = "MultiMedia17",
4947 .platform_name = "msm-compress-dsp",
4948 .dynamic = 1,
4949 .dpcm_capture = 1,
4950 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4951 SND_SOC_DPCM_TRIGGER_POST},
4952 .codec_dai_name = "snd-soc-dummy-dai",
4953 .codec_name = "snd-soc-dummy",
4954 .ignore_suspend = 1,
4955 .ignore_pmdown_time = 1,
4956 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
4957 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4958 {/* hw:x,38 */
4959 .name = "SLIMBUS_8 Hostless",
4960 .stream_name = "SLIMBUS_8 Hostless",
4961 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
4962 .platform_name = "msm-pcm-hostless",
4963 .dynamic = 1,
4964 .dpcm_capture = 1,
4965 .dpcm_playback = 1,
4966 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4967 SND_SOC_DPCM_TRIGGER_POST},
4968 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4969 .ignore_suspend = 1,
4970 .ignore_pmdown_time = 1,
4971 .codec_dai_name = "snd-soc-dummy-dai",
4972 .codec_name = "snd-soc-dummy",
4973 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4974};
4975
4976static struct snd_soc_dai_link msm_common_be_dai_links[] = {
4977 /* Backend AFE DAI Links */
4978 {
4979 .name = LPASS_BE_AFE_PCM_RX,
4980 .stream_name = "AFE Playback",
4981 .cpu_dai_name = "msm-dai-q6-dev.224",
4982 .platform_name = "msm-pcm-routing",
4983 .codec_name = "msm-stub-codec.1",
4984 .codec_dai_name = "msm-stub-rx",
4985 .no_pcm = 1,
4986 .dpcm_playback = 1,
4987 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
4988 .be_hw_params_fixup = msm_be_hw_params_fixup,
4989 /* this dainlink has playback support */
4990 .ignore_pmdown_time = 1,
4991 .ignore_suspend = 1,
4992 },
4993 {
4994 .name = LPASS_BE_AFE_PCM_TX,
4995 .stream_name = "AFE Capture",
4996 .cpu_dai_name = "msm-dai-q6-dev.225",
4997 .platform_name = "msm-pcm-routing",
4998 .codec_name = "msm-stub-codec.1",
4999 .codec_dai_name = "msm-stub-tx",
5000 .no_pcm = 1,
5001 .dpcm_capture = 1,
5002 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5003 .be_hw_params_fixup = msm_be_hw_params_fixup,
5004 .ignore_suspend = 1,
5005 },
5006 /* Incall Record Uplink BACK END DAI Link */
5007 {
5008 .name = LPASS_BE_INCALL_RECORD_TX,
5009 .stream_name = "Voice Uplink Capture",
5010 .cpu_dai_name = "msm-dai-q6-dev.32772",
5011 .platform_name = "msm-pcm-routing",
5012 .codec_name = "msm-stub-codec.1",
5013 .codec_dai_name = "msm-stub-tx",
5014 .no_pcm = 1,
5015 .dpcm_capture = 1,
5016 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5017 .be_hw_params_fixup = msm_be_hw_params_fixup,
5018 .ignore_suspend = 1,
5019 },
5020 /* Incall Record Downlink BACK END DAI Link */
5021 {
5022 .name = LPASS_BE_INCALL_RECORD_RX,
5023 .stream_name = "Voice Downlink Capture",
5024 .cpu_dai_name = "msm-dai-q6-dev.32771",
5025 .platform_name = "msm-pcm-routing",
5026 .codec_name = "msm-stub-codec.1",
5027 .codec_dai_name = "msm-stub-tx",
5028 .no_pcm = 1,
5029 .dpcm_capture = 1,
5030 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5031 .be_hw_params_fixup = msm_be_hw_params_fixup,
5032 .ignore_suspend = 1,
5033 },
5034 /* Incall Music BACK END DAI Link */
5035 {
5036 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5037 .stream_name = "Voice Farend Playback",
5038 .cpu_dai_name = "msm-dai-q6-dev.32773",
5039 .platform_name = "msm-pcm-routing",
5040 .codec_name = "msm-stub-codec.1",
5041 .codec_dai_name = "msm-stub-rx",
5042 .no_pcm = 1,
5043 .dpcm_playback = 1,
5044 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5045 .be_hw_params_fixup = msm_be_hw_params_fixup,
5046 .ignore_suspend = 1,
5047 .ignore_pmdown_time = 1,
5048 },
5049 /* Incall Music 2 BACK END DAI Link */
5050 {
5051 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5052 .stream_name = "Voice2 Farend Playback",
5053 .cpu_dai_name = "msm-dai-q6-dev.32770",
5054 .platform_name = "msm-pcm-routing",
5055 .codec_name = "msm-stub-codec.1",
5056 .codec_dai_name = "msm-stub-rx",
5057 .no_pcm = 1,
5058 .dpcm_playback = 1,
5059 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5060 .be_hw_params_fixup = msm_be_hw_params_fixup,
5061 .ignore_suspend = 1,
5062 .ignore_pmdown_time = 1,
5063 },
5064 {
5065 .name = LPASS_BE_USB_AUDIO_RX,
5066 .stream_name = "USB Audio Playback",
5067 .cpu_dai_name = "msm-dai-q6-dev.28672",
5068 .platform_name = "msm-pcm-routing",
5069 .codec_name = "msm-stub-codec.1",
5070 .codec_dai_name = "msm-stub-rx",
5071 .no_pcm = 1,
5072 .dpcm_playback = 1,
5073 .id = MSM_BACKEND_DAI_USB_RX,
5074 .be_hw_params_fixup = msm_be_hw_params_fixup,
5075 .ignore_pmdown_time = 1,
5076 .ignore_suspend = 1,
5077 },
5078 {
5079 .name = LPASS_BE_USB_AUDIO_TX,
5080 .stream_name = "USB Audio Capture",
5081 .cpu_dai_name = "msm-dai-q6-dev.28673",
5082 .platform_name = "msm-pcm-routing",
5083 .codec_name = "msm-stub-codec.1",
5084 .codec_dai_name = "msm-stub-tx",
5085 .no_pcm = 1,
5086 .dpcm_capture = 1,
5087 .id = MSM_BACKEND_DAI_USB_TX,
5088 .be_hw_params_fixup = msm_be_hw_params_fixup,
5089 .ignore_suspend = 1,
5090 },
5091 {
5092 .name = LPASS_BE_PRI_TDM_RX_0,
5093 .stream_name = "Primary TDM0 Playback",
5094 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5095 .platform_name = "msm-pcm-routing",
5096 .codec_name = "msm-stub-codec.1",
5097 .codec_dai_name = "msm-stub-rx",
5098 .no_pcm = 1,
5099 .dpcm_playback = 1,
5100 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5101 .be_hw_params_fixup = msm_be_hw_params_fixup,
5102 .ops = &kona_tdm_be_ops,
5103 .ignore_suspend = 1,
5104 .ignore_pmdown_time = 1,
5105 },
5106 {
5107 .name = LPASS_BE_PRI_TDM_TX_0,
5108 .stream_name = "Primary TDM0 Capture",
5109 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5110 .platform_name = "msm-pcm-routing",
5111 .codec_name = "msm-stub-codec.1",
5112 .codec_dai_name = "msm-stub-tx",
5113 .no_pcm = 1,
5114 .dpcm_capture = 1,
5115 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5116 .be_hw_params_fixup = msm_be_hw_params_fixup,
5117 .ops = &kona_tdm_be_ops,
5118 .ignore_suspend = 1,
5119 },
5120 {
5121 .name = LPASS_BE_SEC_TDM_RX_0,
5122 .stream_name = "Secondary TDM0 Playback",
5123 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5124 .platform_name = "msm-pcm-routing",
5125 .codec_name = "msm-stub-codec.1",
5126 .codec_dai_name = "msm-stub-rx",
5127 .no_pcm = 1,
5128 .dpcm_playback = 1,
5129 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5130 .be_hw_params_fixup = msm_be_hw_params_fixup,
5131 .ops = &kona_tdm_be_ops,
5132 .ignore_suspend = 1,
5133 .ignore_pmdown_time = 1,
5134 },
5135 {
5136 .name = LPASS_BE_SEC_TDM_TX_0,
5137 .stream_name = "Secondary TDM0 Capture",
5138 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5139 .platform_name = "msm-pcm-routing",
5140 .codec_name = "msm-stub-codec.1",
5141 .codec_dai_name = "msm-stub-tx",
5142 .no_pcm = 1,
5143 .dpcm_capture = 1,
5144 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5145 .be_hw_params_fixup = msm_be_hw_params_fixup,
5146 .ops = &kona_tdm_be_ops,
5147 .ignore_suspend = 1,
5148 },
5149 {
5150 .name = LPASS_BE_TERT_TDM_RX_0,
5151 .stream_name = "Tertiary TDM0 Playback",
5152 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5153 .platform_name = "msm-pcm-routing",
5154 .codec_name = "msm-stub-codec.1",
5155 .codec_dai_name = "msm-stub-rx",
5156 .no_pcm = 1,
5157 .dpcm_playback = 1,
5158 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5159 .be_hw_params_fixup = msm_be_hw_params_fixup,
5160 .ops = &kona_tdm_be_ops,
5161 .ignore_suspend = 1,
5162 .ignore_pmdown_time = 1,
5163 },
5164 {
5165 .name = LPASS_BE_TERT_TDM_TX_0,
5166 .stream_name = "Tertiary TDM0 Capture",
5167 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5168 .platform_name = "msm-pcm-routing",
5169 .codec_name = "msm-stub-codec.1",
5170 .codec_dai_name = "msm-stub-tx",
5171 .no_pcm = 1,
5172 .dpcm_capture = 1,
5173 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5174 .be_hw_params_fixup = msm_be_hw_params_fixup,
5175 .ops = &kona_tdm_be_ops,
5176 .ignore_suspend = 1,
5177 },
5178};
5179
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5180static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
5181 {
5182 .name = LPASS_BE_SLIMBUS_7_RX,
5183 .stream_name = "Slimbus7 Playback",
5184 .cpu_dai_name = "msm-dai-q6-dev.16398",
5185 .platform_name = "msm-pcm-routing",
5186 .codec_name = "btfmslim_slave",
5187 /* BT codec driver determines capabilities based on
5188 * dai name, bt codecdai name should always contains
5189 * supported usecase information
5190 */
5191 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5192 .no_pcm = 1,
5193 .dpcm_playback = 1,
5194 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5195 .be_hw_params_fixup = msm_be_hw_params_fixup,
5196 .init = &msm_wcn_init,
5197 .ops = &msm_wcn_ops,
5198 /* dai link has playback support */
5199 .ignore_pmdown_time = 1,
5200 .ignore_suspend = 1,
5201 },
5202 {
5203 .name = LPASS_BE_SLIMBUS_7_TX,
5204 .stream_name = "Slimbus7 Capture",
5205 .cpu_dai_name = "msm-dai-q6-dev.16399",
5206 .platform_name = "msm-pcm-routing",
5207 .codec_name = "btfmslim_slave",
5208 .codec_dai_name = "btfm_bt_sco_slim_tx",
5209 .no_pcm = 1,
5210 .dpcm_capture = 1,
5211 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5212 .be_hw_params_fixup = msm_be_hw_params_fixup,
5213 .ops = &msm_wcn_ops,
5214 .ignore_suspend = 1,
5215 },
5216};
5217
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5218static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5219 {
5220 .name = LPASS_BE_SLIMBUS_7_RX,
5221 .stream_name = "Slimbus7 Playback",
5222 .cpu_dai_name = "msm-dai-q6-dev.16398",
5223 .platform_name = "msm-pcm-routing",
5224 .codec_name = "btfmslim_slave",
5225 /* BT codec driver determines capabilities based on
5226 * dai name, bt codecdai name should always contains
5227 * supported usecase information
5228 */
5229 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5230 .no_pcm = 1,
5231 .dpcm_playback = 1,
5232 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5233 .be_hw_params_fixup = msm_be_hw_params_fixup,
5234 .init = &msm_wcn_init_lito,
5235 .ops = &msm_wcn_ops_lito,
5236 /* dai link has playback support */
5237 .ignore_pmdown_time = 1,
5238 .ignore_suspend = 1,
5239 },
5240 {
5241 .name = LPASS_BE_SLIMBUS_7_TX,
5242 .stream_name = "Slimbus7 Capture",
5243 .cpu_dai_name = "msm-dai-q6-dev.16399",
5244 .platform_name = "msm-pcm-routing",
5245 .codec_name = "btfmslim_slave",
5246 .codec_dai_name = "btfm_bt_sco_slim_tx",
5247 .no_pcm = 1,
5248 .dpcm_capture = 1,
5249 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5250 .be_hw_params_fixup = msm_be_hw_params_fixup,
5251 .ops = &msm_wcn_ops_lito,
5252 .ignore_suspend = 1,
5253 },
5254 {
5255 .name = LPASS_BE_SLIMBUS_8_TX,
5256 .stream_name = "Slimbus8 Capture",
5257 .cpu_dai_name = "msm-dai-q6-dev.16401",
5258 .platform_name = "msm-pcm-routing",
5259 .codec_name = "btfmslim_slave",
5260 .codec_dai_name = "btfm_fm_slim_tx",
5261 .no_pcm = 1,
5262 .dpcm_capture = 1,
5263 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5264 .be_hw_params_fixup = msm_be_hw_params_fixup,
5265 .ops = &msm_wcn_ops_lito,
5266 .ignore_suspend = 1,
5267 },
5268};
5269
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5270static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
5271 /* DISP PORT BACK END DAI Link */
5272 {
5273 .name = LPASS_BE_DISPLAY_PORT,
5274 .stream_name = "Display Port Playback",
5275 .cpu_dai_name = "msm-dai-q6-dp.24608",
5276 .platform_name = "msm-pcm-routing",
5277 .codec_name = "msm-ext-disp-audio-codec-rx",
5278 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
5279 .no_pcm = 1,
5280 .dpcm_playback = 1,
5281 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
5282 .be_hw_params_fixup = msm_be_hw_params_fixup,
5283 .ignore_pmdown_time = 1,
5284 .ignore_suspend = 1,
5285 },
5286 /* DISP PORT 1 BACK END DAI Link */
5287 {
5288 .name = LPASS_BE_DISPLAY_PORT1,
5289 .stream_name = "Display Port1 Playback",
5290 .cpu_dai_name = "msm-dai-q6-dp.24608",
5291 .platform_name = "msm-pcm-routing",
5292 .codec_name = "msm-ext-disp-audio-codec-rx",
5293 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
5294 .no_pcm = 1,
5295 .dpcm_playback = 1,
5296 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
5297 .be_hw_params_fixup = msm_be_hw_params_fixup,
5298 .ignore_pmdown_time = 1,
5299 .ignore_suspend = 1,
5300 },
5301};
5302
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5303static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5304 {
5305 .name = LPASS_BE_PRI_MI2S_RX,
5306 .stream_name = "Primary MI2S Playback",
5307 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5308 .platform_name = "msm-pcm-routing",
5309 .codec_name = "msm-stub-codec.1",
5310 .codec_dai_name = "msm-stub-rx",
5311 .no_pcm = 1,
5312 .dpcm_playback = 1,
5313 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5314 .be_hw_params_fixup = msm_be_hw_params_fixup,
5315 .ops = &msm_mi2s_be_ops,
5316 .ignore_suspend = 1,
5317 .ignore_pmdown_time = 1,
5318 },
5319 {
5320 .name = LPASS_BE_PRI_MI2S_TX,
5321 .stream_name = "Primary MI2S Capture",
5322 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5323 .platform_name = "msm-pcm-routing",
5324 .codec_name = "msm-stub-codec.1",
5325 .codec_dai_name = "msm-stub-tx",
5326 .no_pcm = 1,
5327 .dpcm_capture = 1,
5328 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5329 .be_hw_params_fixup = msm_be_hw_params_fixup,
5330 .ops = &msm_mi2s_be_ops,
5331 .ignore_suspend = 1,
5332 },
5333 {
5334 .name = LPASS_BE_SEC_MI2S_RX,
5335 .stream_name = "Secondary MI2S Playback",
5336 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5337 .platform_name = "msm-pcm-routing",
5338 .codec_name = "msm-stub-codec.1",
5339 .codec_dai_name = "msm-stub-rx",
5340 .no_pcm = 1,
5341 .dpcm_playback = 1,
5342 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5343 .be_hw_params_fixup = msm_be_hw_params_fixup,
5344 .ops = &msm_mi2s_be_ops,
5345 .ignore_suspend = 1,
5346 .ignore_pmdown_time = 1,
5347 },
5348 {
5349 .name = LPASS_BE_SEC_MI2S_TX,
5350 .stream_name = "Secondary MI2S Capture",
5351 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5352 .platform_name = "msm-pcm-routing",
5353 .codec_name = "msm-stub-codec.1",
5354 .codec_dai_name = "msm-stub-tx",
5355 .no_pcm = 1,
5356 .dpcm_capture = 1,
5357 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5358 .be_hw_params_fixup = msm_be_hw_params_fixup,
5359 .ops = &msm_mi2s_be_ops,
5360 .ignore_suspend = 1,
5361 },
5362 {
5363 .name = LPASS_BE_TERT_MI2S_RX,
5364 .stream_name = "Tertiary MI2S Playback",
5365 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5366 .platform_name = "msm-pcm-routing",
5367 .codec_name = "msm-stub-codec.1",
5368 .codec_dai_name = "msm-stub-rx",
5369 .no_pcm = 1,
5370 .dpcm_playback = 1,
5371 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5372 .be_hw_params_fixup = msm_be_hw_params_fixup,
5373 .ops = &msm_mi2s_be_ops,
5374 .ignore_suspend = 1,
5375 .ignore_pmdown_time = 1,
5376 },
5377 {
5378 .name = LPASS_BE_TERT_MI2S_TX,
5379 .stream_name = "Tertiary MI2S Capture",
5380 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5381 .platform_name = "msm-pcm-routing",
5382 .codec_name = "msm-stub-codec.1",
5383 .codec_dai_name = "msm-stub-tx",
5384 .no_pcm = 1,
5385 .dpcm_capture = 1,
5386 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5387 .be_hw_params_fixup = msm_be_hw_params_fixup,
5388 .ops = &msm_mi2s_be_ops,
5389 .ignore_suspend = 1,
5390 },
5391};
5392
5393static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5394 /* Primary AUX PCM Backend DAI Links */
5395 {
5396 .name = LPASS_BE_AUXPCM_RX,
5397 .stream_name = "AUX PCM Playback",
5398 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5399 .platform_name = "msm-pcm-routing",
5400 .codec_name = "msm-stub-codec.1",
5401 .codec_dai_name = "msm-stub-rx",
5402 .no_pcm = 1,
5403 .dpcm_playback = 1,
5404 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5405 .be_hw_params_fixup = msm_be_hw_params_fixup,
5406 .ignore_pmdown_time = 1,
5407 .ignore_suspend = 1,
5408 },
5409 {
5410 .name = LPASS_BE_AUXPCM_TX,
5411 .stream_name = "AUX PCM Capture",
5412 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5413 .platform_name = "msm-pcm-routing",
5414 .codec_name = "msm-stub-codec.1",
5415 .codec_dai_name = "msm-stub-tx",
5416 .no_pcm = 1,
5417 .dpcm_capture = 1,
5418 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5419 .be_hw_params_fixup = msm_be_hw_params_fixup,
5420 .ignore_suspend = 1,
5421 },
5422 /* Secondary AUX PCM Backend DAI Links */
5423 {
5424 .name = LPASS_BE_SEC_AUXPCM_RX,
5425 .stream_name = "Sec AUX PCM Playback",
5426 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5427 .platform_name = "msm-pcm-routing",
5428 .codec_name = "msm-stub-codec.1",
5429 .codec_dai_name = "msm-stub-rx",
5430 .no_pcm = 1,
5431 .dpcm_playback = 1,
5432 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5433 .be_hw_params_fixup = msm_be_hw_params_fixup,
5434 .ignore_pmdown_time = 1,
5435 .ignore_suspend = 1,
5436 },
5437 {
5438 .name = LPASS_BE_SEC_AUXPCM_TX,
5439 .stream_name = "Sec AUX PCM Capture",
5440 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5441 .platform_name = "msm-pcm-routing",
5442 .codec_name = "msm-stub-codec.1",
5443 .codec_dai_name = "msm-stub-tx",
5444 .no_pcm = 1,
5445 .dpcm_capture = 1,
5446 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5447 .be_hw_params_fixup = msm_be_hw_params_fixup,
5448 .ignore_suspend = 1,
5449 },
5450 /* Tertiary AUX PCM Backend DAI Links */
5451 {
5452 .name = LPASS_BE_TERT_AUXPCM_RX,
5453 .stream_name = "Tert AUX PCM Playback",
5454 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5455 .platform_name = "msm-pcm-routing",
5456 .codec_name = "msm-stub-codec.1",
5457 .codec_dai_name = "msm-stub-rx",
5458 .no_pcm = 1,
5459 .dpcm_playback = 1,
5460 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5461 .be_hw_params_fixup = msm_be_hw_params_fixup,
5462 .ignore_suspend = 1,
5463 },
5464 {
5465 .name = LPASS_BE_TERT_AUXPCM_TX,
5466 .stream_name = "Tert AUX PCM Capture",
5467 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5468 .platform_name = "msm-pcm-routing",
5469 .codec_name = "msm-stub-codec.1",
5470 .codec_dai_name = "msm-stub-tx",
5471 .no_pcm = 1,
5472 .dpcm_capture = 1,
5473 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5474 .be_hw_params_fixup = msm_be_hw_params_fixup,
5475 .ignore_suspend = 1,
5476 },
5477};
5478
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5479static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
5480 /* WSA CDC DMA Backend DAI Links */
5481 {
5482 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
5483 .stream_name = "WSA CDC DMA0 Playback",
5484 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
5485 .platform_name = "msm-pcm-routing",
5486 .codec_name = "bolero_codec",
5487 .codec_dai_name = "wsa_macro_rx1",
5488 .no_pcm = 1,
5489 .dpcm_playback = 1,
5490 .init = &msm_int_audrx_init,
5491 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
5492 .be_hw_params_fixup = msm_be_hw_params_fixup,
5493 .ignore_pmdown_time = 1,
5494 .ignore_suspend = 1,
5495 .ops = &msm_cdc_dma_be_ops,
5496 },
5497 {
5498 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
5499 .stream_name = "WSA CDC DMA1 Playback",
5500 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
5501 .platform_name = "msm-pcm-routing",
5502 .codec_name = "bolero_codec",
5503 .codec_dai_name = "wsa_macro_rx_mix",
5504 .no_pcm = 1,
5505 .dpcm_playback = 1,
5506 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
5507 .be_hw_params_fixup = msm_be_hw_params_fixup,
5508 .ignore_pmdown_time = 1,
5509 .ignore_suspend = 1,
5510 .ops = &msm_cdc_dma_be_ops,
5511 },
5512 {
5513 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
5514 .stream_name = "WSA CDC DMA1 Capture",
5515 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
5516 .platform_name = "msm-pcm-routing",
5517 .codec_name = "bolero_codec",
5518 .codec_dai_name = "wsa_macro_echo",
5519 .no_pcm = 1,
5520 .dpcm_capture = 1,
5521 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
5522 .be_hw_params_fixup = msm_be_hw_params_fixup,
5523 .ignore_suspend = 1,
5524 .ops = &msm_cdc_dma_be_ops,
5525 },
5526};
5527
5528static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5529 /* RX CDC DMA Backend DAI Links */
5530 {
5531 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5532 .stream_name = "RX CDC DMA0 Playback",
5533 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5534 .platform_name = "msm-pcm-routing",
5535 .codec_name = "bolero_codec",
5536 .codec_dai_name = "rx_macro_rx1",
5537 .no_pcm = 1,
5538 .dpcm_playback = 1,
5539 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5540 .be_hw_params_fixup = msm_be_hw_params_fixup,
5541 .ignore_pmdown_time = 1,
5542 .ignore_suspend = 1,
5543 .ops = &msm_cdc_dma_be_ops,
5544 },
5545 {
5546 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5547 .stream_name = "RX CDC DMA1 Playback",
5548 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5549 .platform_name = "msm-pcm-routing",
5550 .codec_name = "bolero_codec",
5551 .codec_dai_name = "rx_macro_rx2",
5552 .no_pcm = 1,
5553 .dpcm_playback = 1,
5554 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5555 .be_hw_params_fixup = msm_be_hw_params_fixup,
5556 .ignore_pmdown_time = 1,
5557 .ignore_suspend = 1,
5558 .ops = &msm_cdc_dma_be_ops,
5559 },
5560 {
5561 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5562 .stream_name = "RX CDC DMA2 Playback",
5563 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5564 .platform_name = "msm-pcm-routing",
5565 .codec_name = "bolero_codec",
5566 .codec_dai_name = "rx_macro_rx3",
5567 .no_pcm = 1,
5568 .dpcm_playback = 1,
5569 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5570 .be_hw_params_fixup = msm_be_hw_params_fixup,
5571 .ignore_pmdown_time = 1,
5572 .ignore_suspend = 1,
5573 .ops = &msm_cdc_dma_be_ops,
5574 },
5575 {
5576 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5577 .stream_name = "RX CDC DMA3 Playback",
5578 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5579 .platform_name = "msm-pcm-routing",
5580 .codec_name = "bolero_codec",
5581 .codec_dai_name = "rx_macro_rx4",
5582 .no_pcm = 1,
5583 .dpcm_playback = 1,
5584 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5585 .be_hw_params_fixup = msm_be_hw_params_fixup,
5586 .ignore_pmdown_time = 1,
5587 .ignore_suspend = 1,
5588 .ops = &msm_cdc_dma_be_ops,
5589 },
5590 /* TX CDC DMA Backend DAI Links */
5591 {
5592 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5593 .stream_name = "TX CDC DMA3 Capture",
5594 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5595 .platform_name = "msm-pcm-routing",
5596 .codec_name = "bolero_codec",
5597 .codec_dai_name = "tx_macro_tx1",
5598 .no_pcm = 1,
5599 .dpcm_capture = 1,
5600 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5601 .be_hw_params_fixup = msm_be_hw_params_fixup,
5602 .ignore_suspend = 1,
5603 .ops = &msm_cdc_dma_be_ops,
5604 },
5605 {
5606 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5607 .stream_name = "TX CDC DMA4 Capture",
5608 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5609 .platform_name = "msm-pcm-routing",
5610 .codec_name = "bolero_codec",
5611 .codec_dai_name = "tx_macro_tx2",
5612 .no_pcm = 1,
5613 .dpcm_capture = 1,
5614 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5615 .be_hw_params_fixup = msm_be_hw_params_fixup,
5616 .ignore_suspend = 1,
5617 .ops = &msm_cdc_dma_be_ops,
5618 },
5619};
5620
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]5621static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5622 {
5623 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5624 .stream_name = "VA CDC DMA0 Capture",
5625 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5626 .platform_name = "msm-pcm-routing",
5627 .codec_name = "bolero_codec",
5628 .codec_dai_name = "va_macro_tx1",
5629 .no_pcm = 1,
5630 .dpcm_capture = 1,
5631 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5632 .be_hw_params_fixup = msm_be_hw_params_fixup,
5633 .ignore_suspend = 1,
5634 .ops = &msm_cdc_dma_be_ops,
5635 },
5636 {
5637 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5638 .stream_name = "VA CDC DMA1 Capture",
5639 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5640 .platform_name = "msm-pcm-routing",
5641 .codec_name = "bolero_codec",
5642 .codec_dai_name = "va_macro_tx2",
5643 .no_pcm = 1,
5644 .dpcm_capture = 1,
5645 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5646 .be_hw_params_fixup = msm_be_hw_params_fixup,
5647 .ignore_suspend = 1,
5648 .ops = &msm_cdc_dma_be_ops,
5649 },
5650 {
5651 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5652 .stream_name = "VA CDC DMA2 Capture",
5653 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5654 .platform_name = "msm-pcm-routing",
5655 .codec_name = "bolero_codec",
5656 .codec_dai_name = "va_macro_tx3",
5657 .no_pcm = 1,
5658 .dpcm_capture = 1,
5659 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5660 .be_hw_params_fixup = msm_be_hw_params_fixup,
5661 .ignore_suspend = 1,
5662 .ops = &msm_cdc_dma_be_ops,
5663 },
5664};
5665
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]5666static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5667 {
5668 .name = LPASS_BE_AFE_LOOPBACK_TX,
5669 .stream_name = "AFE Loopback Capture",
5670 .cpu_dai_name = "msm-dai-q6-dev.24577",
5671 .platform_name = "msm-pcm-routing",
5672 .codec_name = "msm-stub-codec.1",
5673 .codec_dai_name = "msm-stub-tx",
5674 .no_pcm = 1,
5675 .dpcm_capture = 1,
5676 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5677 .be_hw_params_fixup = msm_be_hw_params_fixup,
5678 .ignore_pmdown_time = 1,
5679 .ignore_suspend = 1,
5680 },
5681};
5682
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5683static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5684 ARRAY_SIZE(msm_common_dai_links) +
5685 ARRAY_SIZE(msm_bolero_fe_dai_links) +
5686 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5687 ARRAY_SIZE(msm_common_be_dai_links) +
5688 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5689 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5690 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]5691 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5692 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5693 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]5694 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5695 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
5696 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5697
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]5698static int msm_populate_dai_link_component_of_node(
5699 struct snd_soc_card *card)
5700{
5701 int i, index, ret = 0;
5702 struct device *cdev = card->dev;
5703 struct snd_soc_dai_link *dai_link = card->dai_link;
5704 struct device_node *np;
5705
5706 if (!cdev) {
5707 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5708 return -ENODEV;
5709 }
5710
5711 for (i = 0; i < card->num_links; i++) {
5712 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5713 continue;
5714
5715 /* populate platform_of_node for snd card dai links */
5716 if (dai_link[i].platform_name &&
5717 !dai_link[i].platform_of_node) {
5718 index = of_property_match_string(cdev->of_node,
5719 "asoc-platform-names",
5720 dai_link[i].platform_name);
5721 if (index < 0) {
5722 dev_err(cdev, "%s: No match found for platform name: %s\n",
5723 __func__, dai_link[i].platform_name);
5724 ret = index;
5725 goto err;
5726 }
5727 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5728 index);
5729 if (!np) {
5730 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
5731 __func__, dai_link[i].platform_name,
5732 index);
5733 ret = -ENODEV;
5734 goto err;
5735 }
5736 dai_link[i].platform_of_node = np;
5737 dai_link[i].platform_name = NULL;
5738 }
5739
5740 /* populate cpu_of_node for snd card dai links */
5741 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5742 index = of_property_match_string(cdev->of_node,
5743 "asoc-cpu-names",
5744 dai_link[i].cpu_dai_name);
5745 if (index >= 0) {
5746 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5747 index);
5748 if (!np) {
5749 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
5750 __func__,
5751 dai_link[i].cpu_dai_name);
5752 ret = -ENODEV;
5753 goto err;
5754 }
5755 dai_link[i].cpu_of_node = np;
5756 dai_link[i].cpu_dai_name = NULL;
5757 }
5758 }
5759
5760 /* populate codec_of_node for snd card dai links */
5761 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5762 index = of_property_match_string(cdev->of_node,
5763 "asoc-codec-names",
5764 dai_link[i].codec_name);
5765 if (index < 0)
5766 continue;
5767 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5768 index);
5769 if (!np) {
5770 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
5771 __func__, dai_link[i].codec_name);
5772 ret = -ENODEV;
5773 goto err;
5774 }
5775 dai_link[i].codec_of_node = np;
5776 dai_link[i].codec_name = NULL;
5777 }
5778 }
5779
5780err:
5781 return ret;
5782}
5783
5784static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
5785{
5786 int ret = -EINVAL;
5787 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
5788
5789 if (!component) {
5790 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
5791 return ret;
5792 }
5793
5794 ret = snd_soc_add_component_controls(component, msm_snd_controls,
5795 ARRAY_SIZE(msm_snd_controls));
5796 if (ret < 0) {
5797 dev_err(component->dev,
5798 "%s: add_codec_controls failed, err = %d\n",
5799 __func__, ret);
5800 return ret;
5801 }
5802
5803 return ret;
5804}
5805
5806static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
5807 struct snd_pcm_hw_params *params)
5808{
5809 return 0;
5810}
5811
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]5812static struct snd_soc_ops msm_stub_be_ops = {
5813 .hw_params = msm_snd_stub_hw_params,
5814};
5815
5816struct snd_soc_card snd_soc_card_stub_msm = {
5817 .name = "kona-stub-snd-card",
5818};
5819
5820static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
5821 /* FrontEnd DAI Links */
5822 {
5823 .name = "MSMSTUB Media1",
5824 .stream_name = "MultiMedia1",
5825 .cpu_dai_name = "MultiMedia1",
5826 .platform_name = "msm-pcm-dsp.0",
5827 .dynamic = 1,
5828 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5829 .dpcm_playback = 1,
5830 .dpcm_capture = 1,
5831 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5832 SND_SOC_DPCM_TRIGGER_POST},
5833 .codec_dai_name = "snd-soc-dummy-dai",
5834 .codec_name = "snd-soc-dummy",
5835 .ignore_suspend = 1,
5836 /* this dainlink has playback support */
5837 .ignore_pmdown_time = 1,
5838 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5839 },
5840};
5841
5842static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
5843 /* Backend DAI Links */
5844 {
5845 .name = LPASS_BE_AUXPCM_RX,
5846 .stream_name = "AUX PCM Playback",
5847 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5848 .platform_name = "msm-pcm-routing",
5849 .codec_name = "msm-stub-codec.1",
5850 .codec_dai_name = "msm-stub-rx",
5851 .no_pcm = 1,
5852 .dpcm_playback = 1,
5853 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5854 .init = &msm_audrx_stub_init,
5855 .be_hw_params_fixup = msm_be_hw_params_fixup,
5856 .ignore_pmdown_time = 1,
5857 .ignore_suspend = 1,
5858 .ops = &msm_stub_be_ops,
5859 },
5860 {
5861 .name = LPASS_BE_AUXPCM_TX,
5862 .stream_name = "AUX PCM Capture",
5863 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5864 .platform_name = "msm-pcm-routing",
5865 .codec_name = "msm-stub-codec.1",
5866 .codec_dai_name = "msm-stub-tx",
5867 .no_pcm = 1,
5868 .dpcm_capture = 1,
5869 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5870 .be_hw_params_fixup = msm_be_hw_params_fixup,
5871 .ignore_suspend = 1,
5872 .ops = &msm_stub_be_ops,
5873 },
5874};
5875
5876static struct snd_soc_dai_link msm_stub_dai_links[
5877 ARRAY_SIZE(msm_stub_fe_dai_links) +
5878 ARRAY_SIZE(msm_stub_be_dai_links)];
5879
5880static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5881 { .compatible = "qcom,kona-asoc-snd",
5882 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]5883 { .compatible = "qcom,kona-asoc-snd-stub",
5884 .data = "stub_codec"},
5885 {},
5886};
5887
5888static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
5889{
5890 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5891 struct snd_soc_dai_link *dailink = NULL;
5892 int len_1 = 0;
5893 int len_2 = 0;
5894 int total_links = 0;
5895 int rc = 0;
5896 u32 mi2s_audio_intf = 0;
5897 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5898 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5899 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]5900 const struct of_device_id *match;
5901
5902 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
5903 if (!match) {
5904 dev_err(dev, "%s: No DT match found for sound card\n",
5905 __func__);
5906 return NULL;
5907 }
5908
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5909 if (!strcmp(match->data, "codec")) {
5910 card = &snd_soc_card_kona_msm;
5911
5912 memcpy(msm_kona_dai_links + total_links,
5913 msm_common_dai_links,
5914 sizeof(msm_common_dai_links));
5915 total_links += ARRAY_SIZE(msm_common_dai_links);
5916
5917 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5918 msm_bolero_fe_dai_links,
5919 sizeof(msm_bolero_fe_dai_links));
5920 total_links +=
5921 ARRAY_SIZE(msm_bolero_fe_dai_links);
5922
5923 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5924 msm_common_misc_fe_dai_links,
5925 sizeof(msm_common_misc_fe_dai_links));
5926 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
5927
5928 memcpy(msm_kona_dai_links + total_links,
5929 msm_common_be_dai_links,
5930 sizeof(msm_common_be_dai_links));
5931 total_links += ARRAY_SIZE(msm_common_be_dai_links);
5932
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5933 memcpy(msm_kona_dai_links + total_links,
5934 msm_wsa_cdc_dma_be_dai_links,
5935 sizeof(msm_wsa_cdc_dma_be_dai_links));
5936 total_links +=
5937 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
5938
5939 memcpy(msm_kona_dai_links + total_links,
5940 msm_rx_tx_cdc_dma_be_dai_links,
5941 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
5942 total_links +=
5943 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
5944
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]5945 memcpy(msm_kona_dai_links + total_links,
5946 msm_va_cdc_dma_be_dai_links,
5947 sizeof(msm_va_cdc_dma_be_dai_links));
5948 total_links +=
5949 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
5950
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5951 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
5952 &mi2s_audio_intf);
5953 if (rc) {
5954 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
5955 __func__);
5956 } else {
5957 if (mi2s_audio_intf) {
5958 memcpy(msm_kona_dai_links + total_links,
5959 msm_mi2s_be_dai_links,
5960 sizeof(msm_mi2s_be_dai_links));
5961 total_links +=
5962 ARRAY_SIZE(msm_mi2s_be_dai_links);
5963 }
5964 }
5965
5966 rc = of_property_read_u32(dev->of_node,
5967 "qcom,auxpcm-audio-intf",
5968 &auxpcm_audio_intf);
5969 if (rc) {
5970 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
5971 __func__);
5972 } else {
5973 if (auxpcm_audio_intf) {
5974 memcpy(msm_kona_dai_links + total_links,
5975 msm_auxpcm_be_dai_links,
5976 sizeof(msm_auxpcm_be_dai_links));
5977 total_links +=
5978 ARRAY_SIZE(msm_auxpcm_be_dai_links);
5979 }
5980 }
5981
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5982 rc = of_property_read_u32(dev->of_node,
5983 "qcom,ext-disp-audio-rx", &val);
5984 if (!rc && val) {
5985 dev_dbg(dev, "%s(): ext disp audio support present\n",
5986 __func__);
5987 memcpy(msm_kona_dai_links + total_links,
5988 ext_disp_be_dai_link,
5989 sizeof(ext_disp_be_dai_link));
5990 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
5991 }
5992
5993 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
5994 if (!rc && val) {
5995 dev_dbg(dev, "%s(): WCN BT support present\n",
5996 __func__);
5997 memcpy(msm_kona_dai_links + total_links,
5998 msm_wcn_be_dai_links,
5999 sizeof(msm_wcn_be_dai_links));
6000 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
6001 }
6002
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6003 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
6004 &val);
6005 if (!rc && val) {
6006 memcpy(msm_kona_dai_links + total_links,
6007 msm_afe_rxtx_lb_be_dai_link,
6008 sizeof(msm_afe_rxtx_lb_be_dai_link));
6009 total_links +=
6010 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
6011 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6012
6013 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
6014 &wcn_btfm_intf);
6015 if (rc) {
6016 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
6017 __func__);
6018 } else {
6019 if (wcn_btfm_intf) {
6020 memcpy(msm_kona_dai_links + total_links,
6021 msm_wcn_btfm_be_dai_links,
6022 sizeof(msm_wcn_btfm_be_dai_links));
6023 total_links +=
6024 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
6025 }
6026 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6027 dailink = msm_kona_dai_links;
6028 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6029 card = &snd_soc_card_stub_msm;
6030 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
6031 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
6032
6033 memcpy(msm_stub_dai_links,
6034 msm_stub_fe_dai_links,
6035 sizeof(msm_stub_fe_dai_links));
6036 memcpy(msm_stub_dai_links + len_1,
6037 msm_stub_be_dai_links,
6038 sizeof(msm_stub_be_dai_links));
6039
6040 dailink = msm_stub_dai_links;
6041 total_links = len_2;
6042 }
6043
6044 if (card) {
6045 card->dai_link = dailink;
6046 card->num_links = total_links;
6047 }
6048
6049 return card;
6050}
6051
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6052static int msm_wsa881x_init(struct snd_soc_component *component)
6053{
6054 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
6055 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
6056 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
6057 SPKR_L_BOOST, SPKR_L_VI};
6058 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
6059 SPKR_R_BOOST, SPKR_R_VI};
6060 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
6061 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
6062 struct msm_asoc_mach_data *pdata;
6063 struct snd_soc_dapm_context *dapm;
6064 struct snd_card *card;
6065 struct snd_info_entry *entry;
6066 int ret = 0;
6067
6068 if (!component) {
6069 pr_err("%s component is NULL\n", __func__);
6070 return -EINVAL;
6071 }
6072
6073 card = component->card->snd_card;
6074 dapm = snd_soc_component_get_dapm(component);
6075
6076 if (!strcmp(component->name_prefix, "SpkrLeft")) {
6077 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
6078 __func__, component->name);
6079 wsa881x_set_channel_map(component, &spkleft_ports[0],
6080 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
6081 &ch_rate[0], &spkleft_port_types[0]);
6082 if (dapm->component) {
6083 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
6084 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
6085 }
6086 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
6087 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
6088 __func__, component->name);
6089 wsa881x_set_channel_map(component, &spkright_ports[0],
6090 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
6091 &ch_rate[0], &spkright_port_types[0]);
6092 if (dapm->component) {
6093 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
6094 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
6095 }
6096 } else {
6097 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
6098 component->name);
6099 ret = -EINVAL;
6100 goto err;
6101 }
6102 pdata = snd_soc_card_get_drvdata(component->card);
6103 if (!pdata->codec_root) {
6104 entry = snd_info_create_subdir(card->module, "codecs",
6105 card->proc_root);
6106 if (!entry) {
6107 pr_err("%s: Cannot create codecs module entry\n",
6108 __func__);
6109 ret = 0;
6110 goto err;
6111 }
6112 pdata->codec_root = entry;
6113 }
6114 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
6115 component);
6116err:
6117 return ret;
6118}
6119
6120static int msm_aux_codec_init(struct snd_soc_component *component)
6121{
6122 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
6123 int ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]6124 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6125 struct snd_info_entry *entry;
6126 struct snd_card *card = component->card->snd_card;
6127 struct msm_asoc_mach_data *pdata;
6128
6129 snd_soc_dapm_ignore_suspend(dapm, "EAR");
6130 snd_soc_dapm_ignore_suspend(dapm, "AUX");
6131 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
6132 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
6133 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
6134 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
6135 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
6136 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
6137 snd_soc_dapm_sync(dapm);
6138
6139 pdata = snd_soc_card_get_drvdata(component->card);
6140 if (!pdata->codec_root) {
6141 entry = snd_info_create_subdir(card->module, "codecs",
6142 card->proc_root);
6143 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]6144 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6145 __func__);
6146 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]6147 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6148 }
6149 pdata->codec_root = entry;
6150 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]6151 wcd938x_info_create_codec_entry(pdata->codec_root, component);
6152
6153mbhc_cfg_cal:
6154 mbhc_calibration = def_wcd_mbhc_cal();
6155 if (!mbhc_calibration)
6156 return -ENOMEM;
6157 wcd_mbhc_cfg.calibration = mbhc_calibration;
6158 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6159 if (ret) {
6160 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6161 __func__, ret);
6162 goto err_hs_detect;
6163 }
6164 return 0;
6165
6166err_hs_detect:
6167 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6168 return ret;
6169}
6170
6171static int msm_init_aux_dev(struct platform_device *pdev,
6172 struct snd_soc_card *card)
6173{
6174 struct device_node *wsa_of_node;
6175 struct device_node *aux_codec_of_node;
6176 u32 wsa_max_devs;
6177 u32 wsa_dev_cnt;
6178 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6179 int i;
6180 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6181 struct aux_codec_dev_info *aux_cdc_dev_info;
6182 const char *auxdev_name_prefix[1];
6183 char *dev_name_str = NULL;
6184 int found = 0;
6185 int codecs_found = 0;
6186 int ret = 0;
6187
6188 /* Get maximum WSA device count for this platform */
6189 ret = of_property_read_u32(pdev->dev.of_node,
6190 "qcom,wsa-max-devs", &wsa_max_devs);
6191 if (ret) {
6192 dev_info(&pdev->dev,
6193 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6194 __func__, pdev->dev.of_node->full_name, ret);
6195 wsa_max_devs = 0;
6196 goto codec_aux_dev;
6197 }
6198 if (wsa_max_devs == 0) {
6199 dev_warn(&pdev->dev,
6200 "%s: Max WSA devices is 0 for this target?\n",
6201 __func__);
6202 goto codec_aux_dev;
6203 }
6204
6205 /* Get count of WSA device phandles for this platform */
6206 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6207 "qcom,wsa-devs", NULL);
6208 if (wsa_dev_cnt == -ENOENT) {
6209 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6210 __func__);
6211 goto err;
6212 } else if (wsa_dev_cnt <= 0) {
6213 dev_err(&pdev->dev,
6214 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6215 __func__, wsa_dev_cnt);
6216 ret = -EINVAL;
6217 goto err;
6218 }
6219
6220 /*
6221 * Expect total phandles count to be NOT less than maximum possible
6222 * WSA count. However, if it is less, then assign same value to
6223 * max count as well.
6224 */
6225 if (wsa_dev_cnt < wsa_max_devs) {
6226 dev_dbg(&pdev->dev,
6227 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6228 __func__, wsa_max_devs, wsa_dev_cnt);
6229 wsa_max_devs = wsa_dev_cnt;
6230 }
6231
6232 /* Make sure prefix string passed for each WSA device */
6233 ret = of_property_count_strings(pdev->dev.of_node,
6234 "qcom,wsa-aux-dev-prefix");
6235 if (ret != wsa_dev_cnt) {
6236 dev_err(&pdev->dev,
6237 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6238 __func__, wsa_dev_cnt, ret);
6239 ret = -EINVAL;
6240 goto err;
6241 }
6242
6243 /*
6244 * Alloc mem to store phandle and index info of WSA device, if already
6245 * registered with ALSA core
6246 */
6247 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6248 sizeof(struct msm_wsa881x_dev_info),
6249 GFP_KERNEL);
6250 if (!wsa881x_dev_info) {
6251 ret = -ENOMEM;
6252 goto err;
6253 }
6254
6255 /*
6256 * search and check whether all WSA devices are already
6257 * registered with ALSA core or not. If found a node, store
6258 * the node and the index in a local array of struct for later
6259 * use.
6260 */
6261 for (i = 0; i < wsa_dev_cnt; i++) {
6262 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6263 "qcom,wsa-devs", i);
6264 if (unlikely(!wsa_of_node)) {
6265 /* we should not be here */
6266 dev_err(&pdev->dev,
6267 "%s: wsa dev node is not present\n",
6268 __func__);
6269 ret = -EINVAL;
6270 goto err;
6271 }
6272 if (soc_find_component(wsa_of_node, NULL)) {
6273 /* WSA device registered with ALSA core */
6274 wsa881x_dev_info[found].of_node = wsa_of_node;
6275 wsa881x_dev_info[found].index = i;
6276 found++;
6277 if (found == wsa_max_devs)
6278 break;
6279 }
6280 }
6281
6282 if (found < wsa_max_devs) {
6283 dev_dbg(&pdev->dev,
6284 "%s: failed to find %d components. Found only %d\n",
6285 __func__, wsa_max_devs, found);
6286 return -EPROBE_DEFER;
6287 }
6288 dev_info(&pdev->dev,
6289 "%s: found %d wsa881x devices registered with ALSA core\n",
6290 __func__, found);
6291
6292codec_aux_dev:
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6293 /* Get count of aux codec device phandles for this platform */
6294 codec_aux_dev_cnt = of_count_phandle_with_args(
6295 pdev->dev.of_node,
6296 "qcom,codec-aux-devs", NULL);
6297 if (codec_aux_dev_cnt == -ENOENT) {
6298 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6299 __func__);
6300 goto err;
6301 } else if (codec_aux_dev_cnt <= 0) {
6302 dev_err(&pdev->dev,
6303 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6304 __func__, codec_aux_dev_cnt);
6305 ret = -EINVAL;
6306 goto err;
6307 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6308
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6309 /*
6310 * Alloc mem to store phandle and index info of aux codec
6311 * if already registered with ALSA core
6312 */
6313 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6314 sizeof(struct aux_codec_dev_info),
6315 GFP_KERNEL);
6316 if (!aux_cdc_dev_info) {
6317 ret = -ENOMEM;
6318 goto err;
6319 }
6320
6321 /*
6322 * search and check whether all aux codecs are already
6323 * registered with ALSA core or not. If found a node, store
6324 * the node and the index in a local array of struct for later
6325 * use.
6326 */
6327 for (i = 0; i < codec_aux_dev_cnt; i++) {
6328 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6329 "qcom,codec-aux-devs", i);
6330 if (unlikely(!aux_codec_of_node)) {
6331 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6332 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6333 "%s: aux codec dev node is not present\n",
6334 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6335 ret = -EINVAL;
6336 goto err;
6337 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6338 if (soc_find_component(aux_codec_of_node, NULL)) {
6339 /* AUX codec registered with ALSA core */
6340 aux_cdc_dev_info[codecs_found].of_node =
6341 aux_codec_of_node;
6342 aux_cdc_dev_info[codecs_found].index = i;
6343 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6344 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6345 }
6346
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6347 if (codecs_found < codec_aux_dev_cnt) {
6348 dev_dbg(&pdev->dev,
6349 "%s: failed to find %d components. Found only %d\n",
6350 __func__, codec_aux_dev_cnt, codecs_found);
6351 return -EPROBE_DEFER;
6352 }
6353 dev_info(&pdev->dev,
6354 "%s: found %d AUX codecs registered with ALSA core\n",
6355 __func__, codecs_found);
6356
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6357 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6358 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6359
6360 /* Alloc array of AUX devs struct */
6361 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6362 sizeof(struct snd_soc_aux_dev),
6363 GFP_KERNEL);
6364 if (!msm_aux_dev) {
6365 ret = -ENOMEM;
6366 goto err;
6367 }
6368
6369 /* Alloc array of codec conf struct */
6370 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6371 sizeof(struct snd_soc_codec_conf),
6372 GFP_KERNEL);
6373 if (!msm_codec_conf) {
6374 ret = -ENOMEM;
6375 goto err;
6376 }
6377
6378 for (i = 0; i < wsa_max_devs; i++) {
6379 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6380 GFP_KERNEL);
6381 if (!dev_name_str) {
6382 ret = -ENOMEM;
6383 goto err;
6384 }
6385
6386 ret = of_property_read_string_index(pdev->dev.of_node,
6387 "qcom,wsa-aux-dev-prefix",
6388 wsa881x_dev_info[i].index,
6389 auxdev_name_prefix);
6390 if (ret) {
6391 dev_err(&pdev->dev,
6392 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6393 __func__, ret);
6394 ret = -EINVAL;
6395 goto err;
6396 }
6397
6398 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6399 msm_aux_dev[i].name = dev_name_str;
6400 msm_aux_dev[i].codec_name = NULL;
6401 msm_aux_dev[i].codec_of_node =
6402 wsa881x_dev_info[i].of_node;
6403 msm_aux_dev[i].init = msm_wsa881x_init;
6404 msm_codec_conf[i].dev_name = NULL;
6405 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6406 msm_codec_conf[i].of_node =
6407 wsa881x_dev_info[i].of_node;
6408 }
6409
6410 for (i = 0; i < codec_aux_dev_cnt; i++) {
6411 msm_aux_dev[wsa_max_devs + i].name = NULL;
6412 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6413 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6414 aux_cdc_dev_info[i].of_node;
6415 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6416 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6417 msm_codec_conf[wsa_max_devs + i].name_prefix =
6418 NULL;
6419 msm_codec_conf[wsa_max_devs + i].of_node =
6420 aux_cdc_dev_info[i].of_node;
6421 }
6422
6423 card->codec_conf = msm_codec_conf;
6424 card->aux_dev = msm_aux_dev;
6425err:
6426 return ret;
6427}
6428
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6429static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6430{
6431 int count = 0;
6432 u32 mi2s_master_slave[MI2S_MAX];
6433 int ret = 0;
6434
6435 for (count = 0; count < MI2S_MAX; count++) {
6436 mutex_init(&mi2s_intf_conf[count].lock);
6437 mi2s_intf_conf[count].ref_cnt = 0;
6438 }
6439
6440 ret = of_property_read_u32_array(pdev->dev.of_node,
6441 "qcom,msm-mi2s-master",
6442 mi2s_master_slave, MI2S_MAX);
6443 if (ret) {
6444 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6445 __func__);
6446 } else {
6447 for (count = 0; count < MI2S_MAX; count++) {
6448 mi2s_intf_conf[count].msm_is_mi2s_master =
6449 mi2s_master_slave[count];
6450 }
6451 }
6452}
6453
6454static void msm_i2s_auxpcm_deinit(void)
6455{
6456 int count = 0;
6457
6458 for (count = 0; count < MI2S_MAX; count++) {
6459 mutex_destroy(&mi2s_intf_conf[count].lock);
6460 mi2s_intf_conf[count].ref_cnt = 0;
6461 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6462 }
6463}
6464
6465static int kona_ssr_enable(struct device *dev, void *data)
6466{
6467 struct platform_device *pdev = to_platform_device(dev);
6468 struct snd_soc_card *card = platform_get_drvdata(pdev);
6469 int ret = 0;
6470
6471 if (!card) {
6472 dev_err(dev, "%s: card is NULL\n", __func__);
6473 ret = -EINVAL;
6474 goto err;
6475 }
6476
6477 if (!strcmp(card->name, "kona-stub-snd-card")) {
6478 /* TODO */
6479 dev_dbg(dev, "%s: TODO \n", __func__);
6480 }
6481
6482 snd_soc_card_change_online_state(card, 1);
6483 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6484
6485err:
6486 return ret;
6487}
6488
6489static void kona_ssr_disable(struct device *dev, void *data)
6490{
6491 struct platform_device *pdev = to_platform_device(dev);
6492 struct snd_soc_card *card = platform_get_drvdata(pdev);
6493
6494 if (!card) {
6495 dev_err(dev, "%s: card is NULL\n", __func__);
6496 return;
6497 }
6498
6499 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6500 snd_soc_card_change_online_state(card, 0);
6501
6502 if (!strcmp(card->name, "kona-stub-snd-card")) {
6503 /* TODO */
6504 dev_dbg(dev, "%s: TODO \n", __func__);
6505 }
6506}
6507
6508static const struct snd_event_ops kona_ssr_ops = {
6509 .enable = kona_ssr_enable,
6510 .disable = kona_ssr_disable,
6511};
6512
6513static int msm_audio_ssr_compare(struct device *dev, void *data)
6514{
6515 struct device_node *node = data;
6516
6517 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6518 __func__, dev->of_node, node);
6519 return (dev->of_node && dev->of_node == node);
6520}
6521
6522static int msm_audio_ssr_register(struct device *dev)
6523{
6524 struct device_node *np = dev->of_node;
6525 struct snd_event_clients *ssr_clients = NULL;
6526 struct device_node *node = NULL;
6527 int ret = 0;
6528 int i = 0;
6529
6530 for (i = 0; ; i++) {
6531 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6532 if (!node)
6533 break;
6534 snd_event_mstr_add_client(&ssr_clients,
6535 msm_audio_ssr_compare, node);
6536 }
6537
6538 ret = snd_event_master_register(dev, &kona_ssr_ops,
6539 ssr_clients, NULL);
6540 if (!ret)
6541 snd_event_notify(dev, SND_EVENT_UP);
6542
6543 return ret;
6544}
6545
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6546static int msm_asoc_machine_probe(struct platform_device *pdev)
6547{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6548 struct snd_soc_card *card = NULL;
6549 struct msm_asoc_mach_data *pdata = NULL;
6550 const char *mbhc_audio_jack_type = NULL;
6551 int ret = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6552
6553 if (!pdev->dev.of_node) {
6554 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
6555 return -EINVAL;
6556 }
6557
6558 pdata = devm_kzalloc(&pdev->dev,
6559 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6560 if (!pdata)
6561 return -ENOMEM;
6562
6563 card = populate_snd_card_dailinks(&pdev->dev);
6564 if (!card) {
6565 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6566 ret = -EINVAL;
6567 goto err;
6568 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6569
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6570 card->dev = &pdev->dev;
6571 platform_set_drvdata(pdev, card);
6572 snd_soc_card_set_drvdata(card, pdata);
6573
6574 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6575 if (ret) {
6576 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6577 __func__, ret);
6578 goto err;
6579 }
6580
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6581 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6582 if (ret) {
6583 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6584 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6585 goto err;
6586 }
6587
6588 ret = msm_populate_dai_link_component_of_node(card);
6589 if (ret) {
6590 ret = -EPROBE_DEFER;
6591 goto err;
6592 }
6593
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6594 ret = msm_init_aux_dev(pdev, card);
6595 if (ret)
6596 goto err;
6597
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6598 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6599 if (ret == -EPROBE_DEFER) {
6600 if (codec_reg_done)
6601 ret = -EINVAL;
6602 goto err;
6603 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6604 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6605 __func__, ret);
6606 goto err;
6607 }
6608 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6609 __func__, card->name);
6610
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6611 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6612 "qcom,hph-en1-gpio", 0);
6613 if (!pdata->hph_en1_gpio_p) {
6614 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6615 __func__, "qcom,hph-en1-gpio",
6616 pdev->dev.of_node->full_name);
6617 }
6618
6619 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6620 "qcom,hph-en0-gpio", 0);
6621 if (!pdata->hph_en0_gpio_p) {
6622 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6623 __func__, "qcom,hph-en0-gpio",
6624 pdev->dev.of_node->full_name);
6625 }
6626
6627 ret = of_property_read_string(pdev->dev.of_node,
6628 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6629 if (ret) {
6630 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6631 __func__, "qcom,mbhc-audio-jack-type",
6632 pdev->dev.of_node->full_name);
6633 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6634 } else {
6635 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6636 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6637 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6638 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6639 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6640 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6641 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6642 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6643 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6644 } else {
6645 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6646 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6647 }
6648 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]6649 /*
6650 * Parse US-Euro gpio info from DT. Report no error if us-euro
6651 * entry is not found in DT file as some targets do not support
6652 * US-Euro detection
6653 */
6654 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6655 "qcom,us-euro-gpios", 0);
6656 if (!pdata->us_euro_gpio_p) {
6657 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6658 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6659 } else {
6660 dev_dbg(&pdev->dev, "%s detected\n",
6661 "qcom,us-euro-gpios");
6662 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6663 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6664
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]6665 if (wcd_mbhc_cfg.enable_usbc_analog)
6666 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6667
6668 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6669 "fsa4480-i2c-handle", 0);
6670 if (!pdata->fsa_handle)
6671 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6672 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6673
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6674 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]6675 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6676 "qcom,cdc-dmic01-gpios",
6677 0);
6678 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6679 "qcom,cdc-dmic23-gpios",
6680 0);
6681 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
6682 "qcom,cdc-dmic45-gpios",
6683 0);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6684
6685 ret = msm_audio_ssr_register(&pdev->dev);
6686 if (ret)
6687 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
6688 __func__, ret);
6689
6690 is_initial_boot = true;
6691
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6692 return 0;
6693err:
6694 devm_kfree(&pdev->dev, pdata);
6695 return ret;
6696}
6697
6698static int msm_asoc_machine_remove(struct platform_device *pdev)
6699{
6700 struct snd_soc_card *card = platform_get_drvdata(pdev);
6701
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6702 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6703 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6704 msm_i2s_auxpcm_deinit();
6705
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6706 return 0;
6707}
6708
6709static struct platform_driver kona_asoc_machine_driver = {
6710 .driver = {
6711 .name = DRV_NAME,
6712 .owner = THIS_MODULE,
6713 .pm = &snd_soc_pm_ops,
6714 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame^]6715 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6716 },
6717 .probe = msm_asoc_machine_probe,
6718 .remove = msm_asoc_machine_remove,
6719};
6720module_platform_driver(kona_asoc_machine_driver);
6721
6722MODULE_DESCRIPTION("ALSA SoC msm");
6723MODULE_LICENSE("GPL v2");
6724MODULE_ALIAS("platform:" DRV_NAME);
6725MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);