blob: 16ecfaf9e8c7f285d494dd8cecd5697fbeaa22e1 [file] [log] [blame]
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/input.h>
14#include <linux/of_gpio.h>
Asish Bhattacharya84f7f732017-07-25 16:29:27 +053015#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/of_device.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053018#include <sound/pcm_params.h>
Laxminath Kasam605b42f2017-08-01 22:02:15 +053019#include <dsp/q6afe-v2.h>
20#include "msm-pcm-routing-v2.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053021#include "sdm660-common.h"
22#include "sdm660-internal.h"
23#include "sdm660-external.h"
Laxminath Kasam605b42f2017-08-01 22:02:15 +053024#include "codecs/msm-cdc-pinctrl.h"
25#include "codecs/sdm660_cdc/msm-analog-cdc.h"
26#include "codecs/wsa881x.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053027
28#define DRV_NAME "sdm660-asoc-snd"
29
30#define MSM_INT_DIGITAL_CODEC "msm-dig-codec"
31#define PMIC_INT_ANALOG_CODEC "analog-codec"
32
33#define DEV_NAME_STR_LEN 32
34#define DEFAULT_MCLK_RATE 9600000
35
36struct dev_config {
37 u32 sample_rate;
38 u32 bit_format;
39 u32 channels;
40};
41
42enum {
43 DP_RX_IDX,
44 EXT_DISP_RX_IDX_MAX,
45};
46
47/* TDM default config */
48static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
49 { /* PRI TDM */
50 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
51 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
52 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
53 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
54 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
55 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
56 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
57 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
58 },
59 { /* SEC TDM */
60 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
61 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
62 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
63 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
64 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
65 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
66 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
67 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
68 },
69 { /* TERT TDM */
70 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
71 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
72 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
73 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
74 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
75 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
76 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
77 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
78 },
79 { /* QUAT TDM */
80 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
81 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
82 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
83 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
84 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
85 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
86 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
87 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
88 }
89};
90
91/* TDM default config */
92static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
93 { /* PRI TDM */
94 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
95 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
96 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
97 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
98 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
99 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
100 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
101 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
102 },
103 { /* SEC TDM */
104 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
105 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
106 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
107 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
108 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
109 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
110 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
111 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
112 },
113 { /* TERT TDM */
114 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
115 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
116 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
117 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
118 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
119 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
120 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
121 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
122 },
123 { /* QUAT TDM */
124 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
125 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
126 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
127 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
128 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
129 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
130 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
131 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
132 }
133};
134
135/* Default configuration of external display BE */
136static struct dev_config ext_disp_rx_cfg[] = {
137 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
138};
139static struct dev_config usb_rx_cfg = {
140 .sample_rate = SAMPLING_RATE_48KHZ,
141 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
142 .channels = 2,
143};
144
145static struct dev_config usb_tx_cfg = {
146 .sample_rate = SAMPLING_RATE_48KHZ,
147 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
148 .channels = 1,
149};
150
151enum {
152 PRIM_MI2S = 0,
153 SEC_MI2S,
154 TERT_MI2S,
155 QUAT_MI2S,
156 MI2S_MAX,
157};
158
159enum {
160 PRIM_AUX_PCM = 0,
161 SEC_AUX_PCM,
162 TERT_AUX_PCM,
163 QUAT_AUX_PCM,
164 AUX_PCM_MAX,
165};
166
167enum {
168 PCM_I2S_SEL_PRIM = 0,
169 PCM_I2S_SEL_SEC,
170 PCM_I2S_SEL_TERT,
171 PCM_I2S_SEL_QUAT,
172 PCM_I2S_SEL_MAX,
173};
174
175struct mi2s_conf {
176 struct mutex lock;
177 u32 ref_cnt;
178 u32 msm_is_mi2s_master;
179 u32 msm_is_ext_mclk;
180};
181
182static u32 mi2s_ebit_clk[MI2S_MAX] = {
183 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
184 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
185 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
186 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
187};
188
189struct msm_wsa881x_dev_info {
190 struct device_node *of_node;
191 u32 index;
192};
193static struct snd_soc_aux_dev *msm_aux_dev;
194static struct snd_soc_codec_conf *msm_codec_conf;
195
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530196static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530197
198static struct wcd_mbhc_config mbhc_cfg = {
199 .read_fw_bin = false,
200 .calibration = NULL,
201 .detect_extn_cable = true,
202 .mono_stero_detection = false,
203 .swap_gnd_mic = NULL,
204 .hs_ext_micbias = true,
205 .key_code[0] = KEY_MEDIA,
206 .key_code[1] = KEY_VOICECOMMAND,
207 .key_code[2] = KEY_VOLUMEUP,
208 .key_code[3] = KEY_VOLUMEDOWN,
209 .key_code[4] = 0,
210 .key_code[5] = 0,
211 .key_code[6] = 0,
212 .key_code[7] = 0,
213 .linein_th = 5000,
214 .moisture_en = false,
215 .mbhc_micbias = 0,
216 .anc_micbias = 0,
217 .enable_anc_mic_detect = false,
218};
219
220static struct dev_config proxy_rx_cfg = {
221 .sample_rate = SAMPLING_RATE_48KHZ,
222 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
223 .channels = 2,
224};
225
226/* Default configuration of MI2S channels */
227static struct dev_config mi2s_rx_cfg[] = {
228 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
229 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
230 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
231 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
232};
233
234static struct dev_config mi2s_tx_cfg[] = {
235 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
236 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
237 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
238 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
239};
240
241static struct dev_config aux_pcm_rx_cfg[] = {
242 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
243 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
244 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
245 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
246};
247
248static struct dev_config aux_pcm_tx_cfg[] = {
249 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
250 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
251 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
252 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
253};
254
255static char const *ch_text[] = {"Two", "Three", "Four", "Five",
256 "Six", "Seven", "Eight"};
257static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
258static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
259 "KHZ_32", "KHZ_44P1", "KHZ_48",
260 "KHZ_96", "KHZ_192"};
261static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
262 "Five", "Six", "Seven",
263 "Eight"};
264static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
265 "S32_LE"};
266static char const *mi2s_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
267 "S32_LE"};
268static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
269 "Five", "Six", "Seven", "Eight"};
270static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
271static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
272 "KHZ_44P1", "KHZ_48", "KHZ_96",
273 "KHZ_192", "KHZ_352P8", "KHZ_384"};
274static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
275 "Five", "Six", "Seven",
276 "Eight"};
277static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
278 "KHZ_16", "KHZ_22P05",
279 "KHZ_32", "KHZ_44P1", "KHZ_48",
280 "KHZ_96", "KHZ_192", "KHZ_384"};
281static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE"};
282static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
283 "KHZ_192"};
284
285static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
286static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
287static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
288static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
289static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
290static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
291static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
292static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
293static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
294static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
295static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
296static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
297static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
298static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
299static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
300static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
301static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
302static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
303static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_format, mi2s_format_text);
304static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_format, mi2s_format_text);
305static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_format, mi2s_format_text);
306static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_format, mi2s_format_text);
307static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_format, mi2s_format_text);
308static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_format, mi2s_format_text);
309static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_format, mi2s_format_text);
310static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_format, mi2s_format_text);
311static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
312static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
313static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
314static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
315static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
316static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
317static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
318static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
319static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
320static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
321static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
322static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
323static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
324static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
325static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
326static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
327 ext_disp_sample_rate_text);
328static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
329static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
330static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
331static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
332static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
333static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
334
335static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
336 {
337 AFE_API_VERSION_I2S_CONFIG,
338 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
339 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
340 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
341 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
342 0,
343 },
344 {
345 AFE_API_VERSION_I2S_CONFIG,
346 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
347 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
348 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
349 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
350 0,
351 },
352 {
353 AFE_API_VERSION_I2S_CONFIG,
354 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
355 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
356 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
357 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
358 0,
359 },
360 {
361 AFE_API_VERSION_I2S_CONFIG,
362 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
363 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
364 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
365 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
366 0,
367 }
368};
369
370static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
371 {
372 AFE_API_VERSION_I2S_CONFIG,
373 Q6AFE_LPASS_CLK_ID_MCLK_3,
374 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
375 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
376 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
377 0,
378 },
379 {
380 AFE_API_VERSION_I2S_CONFIG,
381 Q6AFE_LPASS_CLK_ID_MCLK_4,
382 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
383 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
384 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
385 0,
386 },
387 {
388 AFE_API_VERSION_I2S_CONFIG,
389 Q6AFE_LPASS_CLK_ID_MCLK_1,
390 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
391 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
392 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
393 0,
394 },
395 {
396 AFE_API_VERSION_I2S_CONFIG,
397 Q6AFE_LPASS_CLK_ID_MCLK_2,
398 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
399 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
400 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
401 0,
402 }
403};
404
405static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
406
407static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
408 struct snd_ctl_elem_value *ucontrol)
409{
410 pr_debug("%s: proxy_rx channels = %d\n",
411 __func__, proxy_rx_cfg.channels);
412 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
413
414 return 0;
415}
416
417static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
418 struct snd_ctl_elem_value *ucontrol)
419{
420 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
421 pr_debug("%s: proxy_rx channels = %d\n",
422 __func__, proxy_rx_cfg.channels);
423
424 return 1;
425}
426
427static int tdm_get_sample_rate(int value)
428{
429 int sample_rate = 0;
430
431 switch (value) {
432 case 0:
433 sample_rate = SAMPLING_RATE_8KHZ;
434 break;
435 case 1:
436 sample_rate = SAMPLING_RATE_16KHZ;
437 break;
438 case 2:
439 sample_rate = SAMPLING_RATE_32KHZ;
440 break;
441 case 3:
442 sample_rate = SAMPLING_RATE_44P1KHZ;
443 break;
444 case 4:
445 sample_rate = SAMPLING_RATE_48KHZ;
446 break;
447 case 5:
448 sample_rate = SAMPLING_RATE_96KHZ;
449 break;
450 case 6:
451 sample_rate = SAMPLING_RATE_192KHZ;
452 break;
453 case 7:
454 sample_rate = SAMPLING_RATE_352P8KHZ;
455 break;
456 case 8:
457 sample_rate = SAMPLING_RATE_384KHZ;
458 break;
459 default:
460 sample_rate = SAMPLING_RATE_48KHZ;
461 break;
462 }
463 return sample_rate;
464}
465
466static int tdm_get_sample_rate_val(int sample_rate)
467{
468 int sample_rate_val = 0;
469
470 switch (sample_rate) {
471 case SAMPLING_RATE_8KHZ:
472 sample_rate_val = 0;
473 break;
474 case SAMPLING_RATE_16KHZ:
475 sample_rate_val = 1;
476 break;
477 case SAMPLING_RATE_32KHZ:
478 sample_rate_val = 2;
479 break;
480 case SAMPLING_RATE_44P1KHZ:
481 sample_rate_val = 3;
482 break;
483 case SAMPLING_RATE_48KHZ:
484 sample_rate_val = 4;
485 break;
486 case SAMPLING_RATE_96KHZ:
487 sample_rate_val = 5;
488 break;
489 case SAMPLING_RATE_192KHZ:
490 sample_rate_val = 6;
491 break;
492 case SAMPLING_RATE_352P8KHZ:
493 sample_rate_val = 7;
494 break;
495 case SAMPLING_RATE_384KHZ:
496 sample_rate_val = 8;
497 break;
498 default:
499 sample_rate_val = 4;
500 break;
501 }
502 return sample_rate_val;
503}
504
505static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
506 struct tdm_port *port)
507{
508 if (port) {
509 if (strnstr(kcontrol->id.name, "PRI",
510 sizeof(kcontrol->id.name))) {
511 port->mode = TDM_PRI;
512 } else if (strnstr(kcontrol->id.name, "SEC",
513 sizeof(kcontrol->id.name))) {
514 port->mode = TDM_SEC;
515 } else if (strnstr(kcontrol->id.name, "TERT",
516 sizeof(kcontrol->id.name))) {
517 port->mode = TDM_TERT;
518 } else if (strnstr(kcontrol->id.name, "QUAT",
519 sizeof(kcontrol->id.name))) {
520 port->mode = TDM_QUAT;
521 } else {
522 pr_err("%s: unsupported mode in: %s",
523 __func__, kcontrol->id.name);
524 return -EINVAL;
525 }
526
527 if (strnstr(kcontrol->id.name, "RX_0",
528 sizeof(kcontrol->id.name)) ||
529 strnstr(kcontrol->id.name, "TX_0",
530 sizeof(kcontrol->id.name))) {
531 port->channel = TDM_0;
532 } else if (strnstr(kcontrol->id.name, "RX_1",
533 sizeof(kcontrol->id.name)) ||
534 strnstr(kcontrol->id.name, "TX_1",
535 sizeof(kcontrol->id.name))) {
536 port->channel = TDM_1;
537 } else if (strnstr(kcontrol->id.name, "RX_2",
538 sizeof(kcontrol->id.name)) ||
539 strnstr(kcontrol->id.name, "TX_2",
540 sizeof(kcontrol->id.name))) {
541 port->channel = TDM_2;
542 } else if (strnstr(kcontrol->id.name, "RX_3",
543 sizeof(kcontrol->id.name)) ||
544 strnstr(kcontrol->id.name, "TX_3",
545 sizeof(kcontrol->id.name))) {
546 port->channel = TDM_3;
547 } else if (strnstr(kcontrol->id.name, "RX_4",
548 sizeof(kcontrol->id.name)) ||
549 strnstr(kcontrol->id.name, "TX_4",
550 sizeof(kcontrol->id.name))) {
551 port->channel = TDM_4;
552 } else if (strnstr(kcontrol->id.name, "RX_5",
553 sizeof(kcontrol->id.name)) ||
554 strnstr(kcontrol->id.name, "TX_5",
555 sizeof(kcontrol->id.name))) {
556 port->channel = TDM_5;
557 } else if (strnstr(kcontrol->id.name, "RX_6",
558 sizeof(kcontrol->id.name)) ||
559 strnstr(kcontrol->id.name, "TX_6",
560 sizeof(kcontrol->id.name))) {
561 port->channel = TDM_6;
562 } else if (strnstr(kcontrol->id.name, "RX_7",
563 sizeof(kcontrol->id.name)) ||
564 strnstr(kcontrol->id.name, "TX_7",
565 sizeof(kcontrol->id.name))) {
566 port->channel = TDM_7;
567 } else {
568 pr_err("%s: unsupported channel in: %s",
569 __func__, kcontrol->id.name);
570 return -EINVAL;
571 }
572 } else
573 return -EINVAL;
574 return 0;
575}
576
577static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 struct tdm_port port;
581 int ret = tdm_get_port_idx(kcontrol, &port);
582
583 if (ret) {
584 pr_err("%s: unsupported control: %s",
585 __func__, kcontrol->id.name);
586 } else {
587 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
588 tdm_rx_cfg[port.mode][port.channel].sample_rate);
589
590 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
591 tdm_rx_cfg[port.mode][port.channel].sample_rate,
592 ucontrol->value.enumerated.item[0]);
593 }
594 return ret;
595}
596
597static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
598 struct snd_ctl_elem_value *ucontrol)
599{
600 struct tdm_port port;
601 int ret = tdm_get_port_idx(kcontrol, &port);
602
603 if (ret) {
604 pr_err("%s: unsupported control: %s",
605 __func__, kcontrol->id.name);
606 } else {
607 tdm_rx_cfg[port.mode][port.channel].sample_rate =
608 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
609
610 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
611 tdm_rx_cfg[port.mode][port.channel].sample_rate,
612 ucontrol->value.enumerated.item[0]);
613 }
614 return ret;
615}
616
617static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
618 struct snd_ctl_elem_value *ucontrol)
619{
620 struct tdm_port port;
621 int ret = tdm_get_port_idx(kcontrol, &port);
622
623 if (ret) {
624 pr_err("%s: unsupported control: %s",
625 __func__, kcontrol->id.name);
626 } else {
627 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
628 tdm_tx_cfg[port.mode][port.channel].sample_rate);
629
630 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
631 tdm_tx_cfg[port.mode][port.channel].sample_rate,
632 ucontrol->value.enumerated.item[0]);
633 }
634 return ret;
635}
636
637static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_value *ucontrol)
639{
640 struct tdm_port port;
641 int ret = tdm_get_port_idx(kcontrol, &port);
642
643 if (ret) {
644 pr_err("%s: unsupported control: %s",
645 __func__, kcontrol->id.name);
646 } else {
647 tdm_tx_cfg[port.mode][port.channel].sample_rate =
648 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
649
650 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
651 tdm_tx_cfg[port.mode][port.channel].sample_rate,
652 ucontrol->value.enumerated.item[0]);
653 }
654 return ret;
655}
656
657static int tdm_get_format(int value)
658{
659 int format = 0;
660
661 switch (value) {
662 case 0:
663 format = SNDRV_PCM_FORMAT_S16_LE;
664 break;
665 case 1:
666 format = SNDRV_PCM_FORMAT_S24_LE;
667 break;
668 case 2:
669 format = SNDRV_PCM_FORMAT_S32_LE;
670 break;
671 default:
672 format = SNDRV_PCM_FORMAT_S16_LE;
673 break;
674 }
675 return format;
676}
677
678static int tdm_get_format_val(int format)
679{
680 int value = 0;
681
682 switch (format) {
683 case SNDRV_PCM_FORMAT_S16_LE:
684 value = 0;
685 break;
686 case SNDRV_PCM_FORMAT_S24_LE:
687 value = 1;
688 break;
689 case SNDRV_PCM_FORMAT_S32_LE:
690 value = 2;
691 break;
692 default:
693 value = 0;
694 break;
695 }
696 return value;
697}
698
699static int mi2s_get_format(int value)
700{
701 int format = 0;
702
703 switch (value) {
704 case 0:
705 format = SNDRV_PCM_FORMAT_S16_LE;
706 break;
707 case 1:
708 format = SNDRV_PCM_FORMAT_S24_LE;
709 break;
710 case 2:
711 format = SNDRV_PCM_FORMAT_S24_3LE;
712 break;
713 case 3:
714 format = SNDRV_PCM_FORMAT_S32_LE;
715 break;
716 default:
717 format = SNDRV_PCM_FORMAT_S16_LE;
718 break;
719 }
720 return format;
721}
722
723static int mi2s_get_format_value(int format)
724{
725 int value = 0;
726
727 switch (format) {
728 case SNDRV_PCM_FORMAT_S16_LE:
729 value = 0;
730 break;
731 case SNDRV_PCM_FORMAT_S24_LE:
732 value = 1;
733 break;
734 case SNDRV_PCM_FORMAT_S24_3LE:
735 value = 2;
736 break;
737 case SNDRV_PCM_FORMAT_S32_LE:
738 value = 3;
739 break;
740 default:
741 value = 0;
742 break;
743 }
744 return value;
745}
746
747static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
748 struct snd_ctl_elem_value *ucontrol)
749{
750 struct tdm_port port;
751 int ret = tdm_get_port_idx(kcontrol, &port);
752
753 if (ret) {
754 pr_err("%s: unsupported control: %s",
755 __func__, kcontrol->id.name);
756 } else {
757 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
758 tdm_rx_cfg[port.mode][port.channel].bit_format);
759
760 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
761 tdm_rx_cfg[port.mode][port.channel].bit_format,
762 ucontrol->value.enumerated.item[0]);
763 }
764 return ret;
765}
766
767static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
768 struct snd_ctl_elem_value *ucontrol)
769{
770 struct tdm_port port;
771 int ret = tdm_get_port_idx(kcontrol, &port);
772
773 if (ret) {
774 pr_err("%s: unsupported control: %s",
775 __func__, kcontrol->id.name);
776 } else {
777 tdm_rx_cfg[port.mode][port.channel].bit_format =
778 tdm_get_format(ucontrol->value.enumerated.item[0]);
779
780 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
781 tdm_rx_cfg[port.mode][port.channel].bit_format,
782 ucontrol->value.enumerated.item[0]);
783 }
784 return ret;
785}
786
787static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
788 struct snd_ctl_elem_value *ucontrol)
789{
790 struct tdm_port port;
791 int ret = tdm_get_port_idx(kcontrol, &port);
792
793 if (ret) {
794 pr_err("%s: unsupported control: %s",
795 __func__, kcontrol->id.name);
796 } else {
797 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
798 tdm_tx_cfg[port.mode][port.channel].bit_format);
799
800 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
801 tdm_tx_cfg[port.mode][port.channel].bit_format,
802 ucontrol->value.enumerated.item[0]);
803 }
804 return ret;
805}
806
807static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
808 struct snd_ctl_elem_value *ucontrol)
809{
810 struct tdm_port port;
811 int ret = tdm_get_port_idx(kcontrol, &port);
812
813 if (ret) {
814 pr_err("%s: unsupported control: %s",
815 __func__, kcontrol->id.name);
816 } else {
817 tdm_tx_cfg[port.mode][port.channel].bit_format =
818 tdm_get_format(ucontrol->value.enumerated.item[0]);
819
820 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
821 tdm_tx_cfg[port.mode][port.channel].bit_format,
822 ucontrol->value.enumerated.item[0]);
823 }
824 return ret;
825}
826
827static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
828 struct snd_ctl_elem_value *ucontrol)
829{
830 struct tdm_port port;
831 int ret = tdm_get_port_idx(kcontrol, &port);
832
833 if (ret) {
834 pr_err("%s: unsupported control: %s",
835 __func__, kcontrol->id.name);
836 } else {
837
838 ucontrol->value.enumerated.item[0] =
839 tdm_rx_cfg[port.mode][port.channel].channels - 1;
840
841 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
842 tdm_rx_cfg[port.mode][port.channel].channels - 1,
843 ucontrol->value.enumerated.item[0]);
844 }
845 return ret;
846}
847
848static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
849 struct snd_ctl_elem_value *ucontrol)
850{
851 struct tdm_port port;
852 int ret = tdm_get_port_idx(kcontrol, &port);
853
854 if (ret) {
855 pr_err("%s: unsupported control: %s",
856 __func__, kcontrol->id.name);
857 } else {
858 tdm_rx_cfg[port.mode][port.channel].channels =
859 ucontrol->value.enumerated.item[0] + 1;
860
861 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
862 tdm_rx_cfg[port.mode][port.channel].channels,
863 ucontrol->value.enumerated.item[0] + 1);
864 }
865 return ret;
866}
867
868static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
869 struct snd_ctl_elem_value *ucontrol)
870{
871 struct tdm_port port;
872 int ret = tdm_get_port_idx(kcontrol, &port);
873
874 if (ret) {
875 pr_err("%s: unsupported control: %s",
876 __func__, kcontrol->id.name);
877 } else {
878 ucontrol->value.enumerated.item[0] =
879 tdm_tx_cfg[port.mode][port.channel].channels - 1;
880
881 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
882 tdm_tx_cfg[port.mode][port.channel].channels - 1,
883 ucontrol->value.enumerated.item[0]);
884 }
885 return ret;
886}
887
888static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
889 struct snd_ctl_elem_value *ucontrol)
890{
891 struct tdm_port port;
892 int ret = tdm_get_port_idx(kcontrol, &port);
893
894 if (ret) {
895 pr_err("%s: unsupported control: %s",
896 __func__, kcontrol->id.name);
897 } else {
898 tdm_tx_cfg[port.mode][port.channel].channels =
899 ucontrol->value.enumerated.item[0] + 1;
900
901 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
902 tdm_tx_cfg[port.mode][port.channel].channels,
903 ucontrol->value.enumerated.item[0] + 1);
904 }
905 return ret;
906}
907
908static int aux_pcm_get_sample_rate(int value)
909{
910 int sample_rate;
911
912 switch (value) {
913 case 1:
914 sample_rate = SAMPLING_RATE_16KHZ;
915 break;
916 case 0:
917 default:
918 sample_rate = SAMPLING_RATE_8KHZ;
919 break;
920 }
921 return sample_rate;
922}
923
924static int aux_pcm_get_sample_rate_val(int sample_rate)
925{
926 int sample_rate_val;
927
928 switch (sample_rate) {
929 case SAMPLING_RATE_16KHZ:
930 sample_rate_val = 1;
931 break;
932 case SAMPLING_RATE_8KHZ:
933 default:
934 sample_rate_val = 0;
935 break;
936 }
937 return sample_rate_val;
938}
939
940static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
941{
942 int idx;
943
944 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
945 sizeof("PRIM_AUX_PCM")))
946 idx = PRIM_AUX_PCM;
947 else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
948 sizeof("SEC_AUX_PCM")))
949 idx = SEC_AUX_PCM;
950 else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
951 sizeof("TERT_AUX_PCM")))
952 idx = TERT_AUX_PCM;
953 else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
954 sizeof("QUAT_AUX_PCM")))
955 idx = QUAT_AUX_PCM;
956 else {
957 pr_err("%s: unsupported port: %s",
958 __func__, kcontrol->id.name);
959 idx = -EINVAL;
960 }
961
962 return idx;
963}
964
965static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
966 struct snd_ctl_elem_value *ucontrol)
967{
968 int idx = aux_pcm_get_port_idx(kcontrol);
969
970 if (idx < 0)
971 return idx;
972
973 aux_pcm_rx_cfg[idx].sample_rate =
974 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
975
976 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
977 idx, aux_pcm_rx_cfg[idx].sample_rate,
978 ucontrol->value.enumerated.item[0]);
979
980 return 0;
981}
982
983static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
984 struct snd_ctl_elem_value *ucontrol)
985{
986 int idx = aux_pcm_get_port_idx(kcontrol);
987
988 if (idx < 0)
989 return idx;
990
991 ucontrol->value.enumerated.item[0] =
992 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
993
994 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
995 idx, aux_pcm_rx_cfg[idx].sample_rate,
996 ucontrol->value.enumerated.item[0]);
997
998 return 0;
999}
1000
1001static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1002 struct snd_ctl_elem_value *ucontrol)
1003{
1004 int idx = aux_pcm_get_port_idx(kcontrol);
1005
1006 if (idx < 0)
1007 return idx;
1008
1009 aux_pcm_tx_cfg[idx].sample_rate =
1010 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1011
1012 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1013 idx, aux_pcm_tx_cfg[idx].sample_rate,
1014 ucontrol->value.enumerated.item[0]);
1015
1016 return 0;
1017}
1018
1019static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1020 struct snd_ctl_elem_value *ucontrol)
1021{
1022 int idx = aux_pcm_get_port_idx(kcontrol);
1023
1024 if (idx < 0)
1025 return idx;
1026
1027 ucontrol->value.enumerated.item[0] =
1028 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1029
1030 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1031 idx, aux_pcm_tx_cfg[idx].sample_rate,
1032 ucontrol->value.enumerated.item[0]);
1033
1034 return 0;
1035}
1036
1037static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1038{
1039 int idx;
1040
1041 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1042 sizeof("PRIM_MI2S_RX")))
1043 idx = PRIM_MI2S;
1044 else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1045 sizeof("SEC_MI2S_RX")))
1046 idx = SEC_MI2S;
1047 else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1048 sizeof("TERT_MI2S_RX")))
1049 idx = TERT_MI2S;
1050 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1051 sizeof("QUAT_MI2S_RX")))
1052 idx = QUAT_MI2S;
1053 else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1054 sizeof("PRIM_MI2S_TX")))
1055 idx = PRIM_MI2S;
1056 else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1057 sizeof("SEC_MI2S_TX")))
1058 idx = SEC_MI2S;
1059 else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1060 sizeof("TERT_MI2S_TX")))
1061 idx = TERT_MI2S;
1062 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1063 sizeof("QUAT_MI2S_TX")))
1064 idx = QUAT_MI2S;
1065 else {
1066 pr_err("%s: unsupported channel: %s",
1067 __func__, kcontrol->id.name);
1068 idx = -EINVAL;
1069 }
1070
1071 return idx;
1072}
1073
1074static int mi2s_get_sample_rate_val(int sample_rate)
1075{
1076 int sample_rate_val;
1077
1078 switch (sample_rate) {
1079 case SAMPLING_RATE_8KHZ:
1080 sample_rate_val = 0;
1081 break;
1082 case SAMPLING_RATE_16KHZ:
1083 sample_rate_val = 1;
1084 break;
1085 case SAMPLING_RATE_32KHZ:
1086 sample_rate_val = 2;
1087 break;
1088 case SAMPLING_RATE_44P1KHZ:
1089 sample_rate_val = 3;
1090 break;
1091 case SAMPLING_RATE_48KHZ:
1092 sample_rate_val = 4;
1093 break;
1094 case SAMPLING_RATE_96KHZ:
1095 sample_rate_val = 5;
1096 break;
1097 case SAMPLING_RATE_192KHZ:
1098 sample_rate_val = 6;
1099 break;
1100 default:
1101 sample_rate_val = 4;
1102 break;
1103 }
1104 return sample_rate_val;
1105}
1106
1107static int mi2s_get_sample_rate(int value)
1108{
1109 int sample_rate;
1110
1111 switch (value) {
1112 case 0:
1113 sample_rate = SAMPLING_RATE_8KHZ;
1114 break;
1115 case 1:
1116 sample_rate = SAMPLING_RATE_16KHZ;
1117 break;
1118 case 2:
1119 sample_rate = SAMPLING_RATE_32KHZ;
1120 break;
1121 case 3:
1122 sample_rate = SAMPLING_RATE_44P1KHZ;
1123 break;
1124 case 4:
1125 sample_rate = SAMPLING_RATE_48KHZ;
1126 break;
1127 case 5:
1128 sample_rate = SAMPLING_RATE_96KHZ;
1129 break;
1130 case 6:
1131 sample_rate = SAMPLING_RATE_192KHZ;
1132 break;
1133 default:
1134 sample_rate = SAMPLING_RATE_48KHZ;
1135 break;
1136 }
1137 return sample_rate;
1138}
1139
1140static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1141 struct snd_ctl_elem_value *ucontrol)
1142{
1143 int idx = mi2s_get_port_idx(kcontrol);
1144
1145 if (idx < 0)
1146 return idx;
1147
1148 mi2s_rx_cfg[idx].sample_rate =
1149 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1150
1151 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1152 idx, mi2s_rx_cfg[idx].sample_rate,
1153 ucontrol->value.enumerated.item[0]);
1154
1155 return 0;
1156}
1157
1158static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1159 struct snd_ctl_elem_value *ucontrol)
1160{
1161 int idx = mi2s_get_port_idx(kcontrol);
1162
1163 if (idx < 0)
1164 return idx;
1165
1166 ucontrol->value.enumerated.item[0] =
1167 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1168
1169 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1170 idx, mi2s_rx_cfg[idx].sample_rate,
1171 ucontrol->value.enumerated.item[0]);
1172
1173 return 0;
1174}
1175
1176static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1177 struct snd_ctl_elem_value *ucontrol)
1178{
1179 int idx = mi2s_get_port_idx(kcontrol);
1180
1181 if (idx < 0)
1182 return idx;
1183
1184 mi2s_tx_cfg[idx].sample_rate =
1185 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1186
1187 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1188 idx, mi2s_tx_cfg[idx].sample_rate,
1189 ucontrol->value.enumerated.item[0]);
1190
1191 return 0;
1192}
1193
1194static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1195 struct snd_ctl_elem_value *ucontrol)
1196{
1197 int idx = mi2s_get_port_idx(kcontrol);
1198
1199 if (idx < 0)
1200 return idx;
1201
1202 ucontrol->value.enumerated.item[0] =
1203 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1204
1205 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1206 idx, mi2s_tx_cfg[idx].sample_rate,
1207 ucontrol->value.enumerated.item[0]);
1208
1209 return 0;
1210}
1211
1212static int mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1213 struct snd_ctl_elem_value *ucontrol)
1214{
1215 int idx = mi2s_get_port_idx(kcontrol);
1216
1217 if (idx < 0)
1218 return idx;
1219
1220 mi2s_tx_cfg[idx].bit_format =
1221 mi2s_get_format(ucontrol->value.enumerated.item[0]);
1222
1223 pr_debug("%s: idx[%d] _tx_format = %d, item = %d\n", __func__,
1224 idx, mi2s_tx_cfg[idx].bit_format,
1225 ucontrol->value.enumerated.item[0]);
1226
1227 return 0;
1228}
1229
1230static int mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1231 struct snd_ctl_elem_value *ucontrol)
1232{
1233 int idx = mi2s_get_port_idx(kcontrol);
1234
1235 if (idx < 0)
1236 return idx;
1237
1238 ucontrol->value.enumerated.item[0] =
1239 mi2s_get_format_value(mi2s_tx_cfg[idx].bit_format);
1240
1241 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1242 idx, mi2s_tx_cfg[idx].bit_format,
1243 ucontrol->value.enumerated.item[0]);
1244
1245 return 0;
1246}
1247
1248static int mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1249 struct snd_ctl_elem_value *ucontrol)
1250{
1251 int idx = mi2s_get_port_idx(kcontrol);
1252
1253 if (idx < 0)
1254 return idx;
1255
1256 mi2s_rx_cfg[idx].bit_format =
1257 mi2s_get_format(ucontrol->value.enumerated.item[0]);
1258
1259 pr_debug("%s: idx[%d] _rx_format = %d, item = %d\n", __func__,
1260 idx, mi2s_rx_cfg[idx].bit_format,
1261 ucontrol->value.enumerated.item[0]);
1262
1263 return 0;
1264}
1265
1266static int mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1267 struct snd_ctl_elem_value *ucontrol)
1268{
1269 int idx = mi2s_get_port_idx(kcontrol);
1270
1271 if (idx < 0)
1272 return idx;
1273
1274 ucontrol->value.enumerated.item[0] =
1275 mi2s_get_format_value(mi2s_rx_cfg[idx].bit_format);
1276
1277 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1278 idx, mi2s_rx_cfg[idx].bit_format,
1279 ucontrol->value.enumerated.item[0]);
1280
1281 return 0;
1282}
1283
1284static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1285 struct snd_ctl_elem_value *ucontrol)
1286{
1287 int idx = mi2s_get_port_idx(kcontrol);
1288
1289 if (idx < 0)
1290 return idx;
1291
1292 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1293 idx, mi2s_rx_cfg[idx].channels);
1294 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1295
1296 return 0;
1297}
1298
1299static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1300 struct snd_ctl_elem_value *ucontrol)
1301{
1302 int idx = mi2s_get_port_idx(kcontrol);
1303
1304 if (idx < 0)
1305 return idx;
1306
1307 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1308 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1309 idx, mi2s_rx_cfg[idx].channels);
1310
1311 return 1;
1312}
1313
1314static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1316{
1317 int idx = mi2s_get_port_idx(kcontrol);
1318
1319 if (idx < 0)
1320 return idx;
1321
1322 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1323 idx, mi2s_tx_cfg[idx].channels);
1324 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1325
1326 return 0;
1327}
1328
1329static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1330 struct snd_ctl_elem_value *ucontrol)
1331{
1332 int idx = mi2s_get_port_idx(kcontrol);
1333
1334 if (idx < 0)
1335 return idx;
1336
1337 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1338 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1339 idx, mi2s_tx_cfg[idx].channels);
1340
1341 return 1;
1342}
1343
1344static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1345 struct snd_ctl_elem_value *ucontrol)
1346{
1347 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1348 usb_rx_cfg.channels);
1349 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1350 return 0;
1351}
1352
1353static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1354 struct snd_ctl_elem_value *ucontrol)
1355{
1356 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1357
1358 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1359 return 1;
1360}
1361
1362static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1363 struct snd_ctl_elem_value *ucontrol)
1364{
1365 int sample_rate_val;
1366
1367 switch (usb_rx_cfg.sample_rate) {
1368 case SAMPLING_RATE_384KHZ:
1369 sample_rate_val = 9;
1370 break;
1371 case SAMPLING_RATE_192KHZ:
1372 sample_rate_val = 8;
1373 break;
1374 case SAMPLING_RATE_96KHZ:
1375 sample_rate_val = 7;
1376 break;
1377 case SAMPLING_RATE_48KHZ:
1378 sample_rate_val = 6;
1379 break;
1380 case SAMPLING_RATE_44P1KHZ:
1381 sample_rate_val = 5;
1382 break;
1383 case SAMPLING_RATE_32KHZ:
1384 sample_rate_val = 4;
1385 break;
1386 case SAMPLING_RATE_22P05KHZ:
1387 sample_rate_val = 3;
1388 break;
1389 case SAMPLING_RATE_16KHZ:
1390 sample_rate_val = 2;
1391 break;
1392 case SAMPLING_RATE_11P025KHZ:
1393 sample_rate_val = 1;
1394 break;
1395 case SAMPLING_RATE_8KHZ:
1396 default:
1397 sample_rate_val = 0;
1398 break;
1399 }
1400
1401 ucontrol->value.integer.value[0] = sample_rate_val;
1402 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1403 usb_rx_cfg.sample_rate);
1404 return 0;
1405}
1406
1407static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_value *ucontrol)
1409{
1410 switch (ucontrol->value.integer.value[0]) {
1411 case 9:
1412 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1413 break;
1414 case 8:
1415 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1416 break;
1417 case 7:
1418 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1419 break;
1420 case 6:
1421 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1422 break;
1423 case 5:
1424 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1425 break;
1426 case 4:
1427 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1428 break;
1429 case 3:
1430 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1431 break;
1432 case 2:
1433 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1434 break;
1435 case 1:
1436 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1437 break;
1438 case 0:
1439 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1440 break;
1441 default:
1442 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1443 break;
1444 }
1445
1446 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1447 __func__, ucontrol->value.integer.value[0],
1448 usb_rx_cfg.sample_rate);
1449 return 0;
1450}
1451
1452static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1453 struct snd_ctl_elem_value *ucontrol)
1454{
1455 switch (usb_rx_cfg.bit_format) {
1456 case SNDRV_PCM_FORMAT_S32_LE:
1457 ucontrol->value.integer.value[0] = 3;
1458 break;
1459 case SNDRV_PCM_FORMAT_S24_3LE:
1460 ucontrol->value.integer.value[0] = 2;
1461 break;
1462 case SNDRV_PCM_FORMAT_S24_LE:
1463 ucontrol->value.integer.value[0] = 1;
1464 break;
1465 case SNDRV_PCM_FORMAT_S16_LE:
1466 default:
1467 ucontrol->value.integer.value[0] = 0;
1468 break;
1469 }
1470
1471 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1472 __func__, usb_rx_cfg.bit_format,
1473 ucontrol->value.integer.value[0]);
1474 return 0;
1475}
1476
1477static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1478 struct snd_ctl_elem_value *ucontrol)
1479{
1480 int rc = 0;
1481
1482 switch (ucontrol->value.integer.value[0]) {
1483 case 3:
1484 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1485 break;
1486 case 2:
1487 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1488 break;
1489 case 1:
1490 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1491 break;
1492 case 0:
1493 default:
1494 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1495 break;
1496 }
1497 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1498 __func__, usb_rx_cfg.bit_format,
1499 ucontrol->value.integer.value[0]);
1500
1501 return rc;
1502}
1503
1504static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1505 struct snd_ctl_elem_value *ucontrol)
1506{
1507 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1508 usb_tx_cfg.channels);
1509 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1510 return 0;
1511}
1512
1513static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1514 struct snd_ctl_elem_value *ucontrol)
1515{
1516 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1517
1518 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1519 return 1;
1520}
1521
1522static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1523 struct snd_ctl_elem_value *ucontrol)
1524{
1525 int sample_rate_val;
1526
1527 switch (usb_tx_cfg.sample_rate) {
1528 case SAMPLING_RATE_384KHZ:
1529 sample_rate_val = 9;
1530 break;
1531 case SAMPLING_RATE_192KHZ:
1532 sample_rate_val = 8;
1533 break;
1534 case SAMPLING_RATE_96KHZ:
1535 sample_rate_val = 7;
1536 break;
1537 case SAMPLING_RATE_48KHZ:
1538 sample_rate_val = 6;
1539 break;
1540 case SAMPLING_RATE_44P1KHZ:
1541 sample_rate_val = 5;
1542 break;
1543 case SAMPLING_RATE_32KHZ:
1544 sample_rate_val = 4;
1545 break;
1546 case SAMPLING_RATE_22P05KHZ:
1547 sample_rate_val = 3;
1548 break;
1549 case SAMPLING_RATE_16KHZ:
1550 sample_rate_val = 2;
1551 break;
1552 case SAMPLING_RATE_11P025KHZ:
1553 sample_rate_val = 1;
1554 break;
1555 case SAMPLING_RATE_8KHZ:
1556 sample_rate_val = 0;
1557 break;
1558 default:
1559 sample_rate_val = 6;
1560 break;
1561 }
1562
1563 ucontrol->value.integer.value[0] = sample_rate_val;
1564 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1565 usb_tx_cfg.sample_rate);
1566 return 0;
1567}
1568
1569static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1570 struct snd_ctl_elem_value *ucontrol)
1571{
1572 switch (ucontrol->value.integer.value[0]) {
1573 case 9:
1574 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1575 break;
1576 case 8:
1577 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1578 break;
1579 case 7:
1580 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1581 break;
1582 case 6:
1583 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1584 break;
1585 case 5:
1586 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1587 break;
1588 case 4:
1589 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1590 break;
1591 case 3:
1592 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1593 break;
1594 case 2:
1595 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1596 break;
1597 case 1:
1598 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1599 break;
1600 case 0:
1601 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1602 break;
1603 default:
1604 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1605 break;
1606 }
1607
1608 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1609 __func__, ucontrol->value.integer.value[0],
1610 usb_tx_cfg.sample_rate);
1611 return 0;
1612}
1613
1614static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1615 struct snd_ctl_elem_value *ucontrol)
1616{
1617 switch (usb_tx_cfg.bit_format) {
1618 case SNDRV_PCM_FORMAT_S32_LE:
1619 ucontrol->value.integer.value[0] = 3;
1620 break;
1621 case SNDRV_PCM_FORMAT_S24_3LE:
1622 ucontrol->value.integer.value[0] = 2;
1623 break;
1624 case SNDRV_PCM_FORMAT_S24_LE:
1625 ucontrol->value.integer.value[0] = 1;
1626 break;
1627 case SNDRV_PCM_FORMAT_S16_LE:
1628 default:
1629 ucontrol->value.integer.value[0] = 0;
1630 break;
1631 }
1632
1633 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1634 __func__, usb_tx_cfg.bit_format,
1635 ucontrol->value.integer.value[0]);
1636 return 0;
1637}
1638
1639static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1640 struct snd_ctl_elem_value *ucontrol)
1641{
1642 int rc = 0;
1643
1644 switch (ucontrol->value.integer.value[0]) {
1645 case 3:
1646 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1647 break;
1648 case 2:
1649 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1650 break;
1651 case 1:
1652 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1653 break;
1654 case 0:
1655 default:
1656 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1657 break;
1658 }
1659 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1660 __func__, usb_tx_cfg.bit_format,
1661 ucontrol->value.integer.value[0]);
1662
1663 return rc;
1664}
1665
1666static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1667{
1668 int idx;
1669
1670 if (strnstr(kcontrol->id.name, "Display Port RX",
1671 sizeof("Display Port RX")))
1672 idx = DP_RX_IDX;
1673 else {
1674 pr_err("%s: unsupported BE: %s",
1675 __func__, kcontrol->id.name);
1676 idx = -EINVAL;
1677 }
1678
1679 return idx;
1680}
1681
1682static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol)
1684{
1685 int idx = ext_disp_get_port_idx(kcontrol);
1686
1687 if (idx < 0)
1688 return idx;
1689
1690 switch (ext_disp_rx_cfg[idx].bit_format) {
1691 case SNDRV_PCM_FORMAT_S24_LE:
1692 ucontrol->value.integer.value[0] = 1;
1693 break;
1694
1695 case SNDRV_PCM_FORMAT_S16_LE:
1696 default:
1697 ucontrol->value.integer.value[0] = 0;
1698 break;
1699 }
1700
1701 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1702 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1703 ucontrol->value.integer.value[0]);
1704 return 0;
1705}
1706
1707static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1708 struct snd_ctl_elem_value *ucontrol)
1709{
1710 int idx = ext_disp_get_port_idx(kcontrol);
1711
1712 if (idx < 0)
1713 return idx;
1714
1715 switch (ucontrol->value.integer.value[0]) {
1716 case 1:
1717 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1718 break;
1719 case 0:
1720 default:
1721 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1722 break;
1723 }
1724 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1725 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1726 ucontrol->value.integer.value[0]);
1727
1728 return 0;
1729}
1730
1731static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1732 struct snd_ctl_elem_value *ucontrol)
1733{
1734 int idx = ext_disp_get_port_idx(kcontrol);
1735
1736 if (idx < 0)
1737 return idx;
1738
1739 ucontrol->value.integer.value[0] =
1740 ext_disp_rx_cfg[idx].channels - 2;
1741
1742 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1743 idx, ext_disp_rx_cfg[idx].channels);
1744
1745 return 0;
1746}
1747
1748static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1749 struct snd_ctl_elem_value *ucontrol)
1750{
1751 int idx = ext_disp_get_port_idx(kcontrol);
1752
1753 if (idx < 0)
1754 return idx;
1755
1756 ext_disp_rx_cfg[idx].channels =
1757 ucontrol->value.integer.value[0] + 2;
1758
1759 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1760 idx, ext_disp_rx_cfg[idx].channels);
1761 return 1;
1762}
1763
1764static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1765 struct snd_ctl_elem_value *ucontrol)
1766{
1767 int sample_rate_val;
1768 int idx = ext_disp_get_port_idx(kcontrol);
1769
1770 if (idx < 0)
1771 return idx;
1772
1773 switch (ext_disp_rx_cfg[idx].sample_rate) {
1774 case SAMPLING_RATE_192KHZ:
1775 sample_rate_val = 2;
1776 break;
1777
1778 case SAMPLING_RATE_96KHZ:
1779 sample_rate_val = 1;
1780 break;
1781
1782 case SAMPLING_RATE_48KHZ:
1783 default:
1784 sample_rate_val = 0;
1785 break;
1786 }
1787
1788 ucontrol->value.integer.value[0] = sample_rate_val;
1789 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1790 idx, ext_disp_rx_cfg[idx].sample_rate);
1791
1792 return 0;
1793}
1794
1795static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1797{
1798 int idx = ext_disp_get_port_idx(kcontrol);
1799
1800 if (idx < 0)
1801 return idx;
1802
1803 switch (ucontrol->value.integer.value[0]) {
1804 case 2:
1805 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1806 break;
1807 case 1:
1808 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1809 break;
1810 case 0:
1811 default:
1812 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1813 break;
1814 }
1815
1816 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1817 __func__, ucontrol->value.integer.value[0], idx,
1818 ext_disp_rx_cfg[idx].sample_rate);
1819 return 0;
1820}
1821
1822const struct snd_kcontrol_new msm_common_snd_controls[] = {
1823 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
1824 proxy_rx_ch_get, proxy_rx_ch_put),
1825 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
1826 aux_pcm_rx_sample_rate_get,
1827 aux_pcm_rx_sample_rate_put),
1828 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
1829 aux_pcm_rx_sample_rate_get,
1830 aux_pcm_rx_sample_rate_put),
1831 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
1832 aux_pcm_rx_sample_rate_get,
1833 aux_pcm_rx_sample_rate_put),
1834 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
1835 aux_pcm_rx_sample_rate_get,
1836 aux_pcm_rx_sample_rate_put),
1837 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
1838 aux_pcm_tx_sample_rate_get,
1839 aux_pcm_tx_sample_rate_put),
1840 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
1841 aux_pcm_tx_sample_rate_get,
1842 aux_pcm_tx_sample_rate_put),
1843 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
1844 aux_pcm_tx_sample_rate_get,
1845 aux_pcm_tx_sample_rate_put),
1846 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
1847 aux_pcm_tx_sample_rate_get,
1848 aux_pcm_tx_sample_rate_put),
1849 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
1850 mi2s_rx_sample_rate_get,
1851 mi2s_rx_sample_rate_put),
1852 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
1853 mi2s_rx_sample_rate_get,
1854 mi2s_rx_sample_rate_put),
1855 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
1856 mi2s_rx_sample_rate_get,
1857 mi2s_rx_sample_rate_put),
1858 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
1859 mi2s_rx_sample_rate_get,
1860 mi2s_rx_sample_rate_put),
1861 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
1862 mi2s_tx_sample_rate_get,
1863 mi2s_tx_sample_rate_put),
1864 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
1865 mi2s_tx_sample_rate_get,
1866 mi2s_tx_sample_rate_put),
1867 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
1868 mi2s_tx_sample_rate_get,
1869 mi2s_tx_sample_rate_put),
1870 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
1871 mi2s_tx_sample_rate_get,
1872 mi2s_tx_sample_rate_put),
1873 SOC_ENUM_EXT("PRIM_MI2S_RX Format", prim_mi2s_rx_format,
1874 mi2s_rx_format_get,
1875 mi2s_rx_format_put),
1876 SOC_ENUM_EXT("SEC_MI2S_RX Format", sec_mi2s_rx_format,
1877 mi2s_rx_format_get,
1878 mi2s_rx_format_put),
1879 SOC_ENUM_EXT("TERT_MI2S_RX Format", tert_mi2s_rx_format,
1880 mi2s_rx_format_get,
1881 mi2s_rx_format_put),
1882 SOC_ENUM_EXT("QUAT_MI2S_RX Format", quat_mi2s_rx_format,
1883 mi2s_rx_format_get,
1884 mi2s_rx_format_put),
1885 SOC_ENUM_EXT("PRIM_MI2S_TX Format", prim_mi2s_tx_format,
1886 mi2s_tx_format_get,
1887 mi2s_tx_format_put),
1888 SOC_ENUM_EXT("SEC_MI2S_TX Format", sec_mi2s_tx_format,
1889 mi2s_tx_format_get,
1890 mi2s_tx_format_put),
1891 SOC_ENUM_EXT("TERT_MI2S_TX Format", tert_mi2s_tx_format,
1892 mi2s_tx_format_get,
1893 mi2s_tx_format_put),
1894 SOC_ENUM_EXT("QUAT_MI2S_TX Format", quat_mi2s_tx_format,
1895 mi2s_tx_format_get,
1896 mi2s_tx_format_put),
1897 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
1898 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1899 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
1900 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1901 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
1902 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1903 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
1904 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1905 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
1906 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1907 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
1908 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1909 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
1910 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1911 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
1912 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1913 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
1914 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
1915 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
1916 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
1917 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
1918 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
1919 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
1920 usb_audio_rx_format_get, usb_audio_rx_format_put),
1921 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
1922 usb_audio_tx_format_get, usb_audio_tx_format_put),
1923 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
1924 ext_disp_rx_format_get, ext_disp_rx_format_put),
1925 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
1926 usb_audio_rx_sample_rate_get,
1927 usb_audio_rx_sample_rate_put),
1928 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
1929 usb_audio_tx_sample_rate_get,
1930 usb_audio_tx_sample_rate_put),
1931 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
1932 ext_disp_rx_sample_rate_get,
1933 ext_disp_rx_sample_rate_put),
1934 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1935 tdm_rx_sample_rate_get,
1936 tdm_rx_sample_rate_put),
1937 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1938 tdm_tx_sample_rate_get,
1939 tdm_tx_sample_rate_put),
1940 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
1941 tdm_rx_format_get,
1942 tdm_rx_format_put),
1943 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
1944 tdm_tx_format_get,
1945 tdm_tx_format_put),
1946 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
1947 tdm_rx_ch_get,
1948 tdm_rx_ch_put),
1949 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
1950 tdm_tx_ch_get,
1951 tdm_tx_ch_put),
1952 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1953 tdm_rx_sample_rate_get,
1954 tdm_rx_sample_rate_put),
1955 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1956 tdm_tx_sample_rate_get,
1957 tdm_tx_sample_rate_put),
1958 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
1959 tdm_rx_format_get,
1960 tdm_rx_format_put),
1961 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
1962 tdm_tx_format_get,
1963 tdm_tx_format_put),
1964 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
1965 tdm_rx_ch_get,
1966 tdm_rx_ch_put),
1967 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
1968 tdm_tx_ch_get,
1969 tdm_tx_ch_put),
1970 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1971 tdm_rx_sample_rate_get,
1972 tdm_rx_sample_rate_put),
1973 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1974 tdm_tx_sample_rate_get,
1975 tdm_tx_sample_rate_put),
1976 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
1977 tdm_rx_format_get,
1978 tdm_rx_format_put),
1979 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
1980 tdm_tx_format_get,
1981 tdm_tx_format_put),
1982 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
1983 tdm_rx_ch_get,
1984 tdm_rx_ch_put),
1985 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
1986 tdm_tx_ch_get,
1987 tdm_tx_ch_put),
1988 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1989 tdm_rx_sample_rate_get,
1990 tdm_rx_sample_rate_put),
1991 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1992 tdm_tx_sample_rate_get,
1993 tdm_tx_sample_rate_put),
1994 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
1995 tdm_rx_format_get,
1996 tdm_rx_format_put),
1997 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
1998 tdm_tx_format_get,
1999 tdm_tx_format_put),
2000 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
2001 tdm_rx_ch_get,
2002 tdm_rx_ch_put),
2003 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
2004 tdm_tx_ch_get,
2005 tdm_tx_ch_put),
2006};
2007
2008/**
2009 * msm_common_snd_controls_size - to return controls size
2010 *
2011 * Return: returns size of common controls array
2012 */
2013int msm_common_snd_controls_size(void)
2014{
2015 return ARRAY_SIZE(msm_common_snd_controls);
2016}
2017EXPORT_SYMBOL(msm_common_snd_controls_size);
2018
2019static inline int param_is_mask(int p)
2020{
2021 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
2022 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
2023}
2024
2025static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
2026 int n)
2027{
2028 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
2029}
2030
2031static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
2032{
2033 if (bit >= SNDRV_MASK_MAX)
2034 return;
2035 if (param_is_mask(n)) {
2036 struct snd_mask *m = param_to_mask(p, n);
2037
2038 m->bits[0] = 0;
2039 m->bits[1] = 0;
2040 m->bits[bit >> 5] |= (1 << (bit & 31));
2041 }
2042}
2043
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302044static int msm_ext_disp_get_idx_from_beid(int32_t id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302045{
2046 int idx;
2047
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302048 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302049 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
2050 idx = DP_RX_IDX;
2051 break;
2052 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302053 pr_err("%s: Incorrect ext_disp id %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302054 idx = -EINVAL;
2055 break;
2056 }
2057
2058 return idx;
2059}
2060
2061/**
2062 * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
2063 *
2064 * @rtd: runtime dailink instance
2065 * @params: HW params of associated backend dailink.
2066 *
2067 * Returns 0.
2068 */
2069int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
2070 struct snd_pcm_hw_params *params)
2071{
2072 struct snd_soc_dai_link *dai_link = rtd->dai_link;
2073 struct snd_interval *rate = hw_param_interval(params,
2074 SNDRV_PCM_HW_PARAM_RATE);
2075 struct snd_interval *channels = hw_param_interval(params,
2076 SNDRV_PCM_HW_PARAM_CHANNELS);
2077 int rc = 0;
2078 int idx;
2079
2080 pr_debug("%s: format = %d, rate = %d\n",
2081 __func__, params_format(params), params_rate(params));
2082
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302083 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302084 case MSM_BACKEND_DAI_USB_RX:
2085 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2086 usb_rx_cfg.bit_format);
2087 rate->min = rate->max = usb_rx_cfg.sample_rate;
2088 channels->min = channels->max = usb_rx_cfg.channels;
2089 break;
2090
2091 case MSM_BACKEND_DAI_USB_TX:
2092 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2093 usb_tx_cfg.bit_format);
2094 rate->min = rate->max = usb_tx_cfg.sample_rate;
2095 channels->min = channels->max = usb_tx_cfg.channels;
2096 break;
2097
2098 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302099 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
2100 if (idx < 0) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302101 pr_err("%s: Incorrect ext disp idx %d\n",
2102 __func__, idx);
2103 rc = idx;
2104 break;
2105 }
2106
2107 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2108 ext_disp_rx_cfg[idx].bit_format);
2109 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
2110 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
2111 break;
2112
2113 case MSM_BACKEND_DAI_AFE_PCM_RX:
2114 channels->min = channels->max = proxy_rx_cfg.channels;
2115 rate->min = rate->max = SAMPLING_RATE_48KHZ;
2116 break;
2117
2118 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
2119 channels->min = channels->max =
2120 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
2121 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2122 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
2123 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
2124 break;
2125
2126 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
2127 channels->min = channels->max =
2128 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
2129 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2130 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
2131 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
2132 break;
2133
2134 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
2135 channels->min = channels->max =
2136 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
2137 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2138 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
2139 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
2140 break;
2141
2142 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
2143 channels->min = channels->max =
2144 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
2145 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2146 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
2147 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
2148 break;
2149
2150 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
2151 channels->min = channels->max =
2152 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
2153 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2154 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
2155 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
2156 break;
2157
2158 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
2159 channels->min = channels->max =
2160 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
2161 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2162 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
2163 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
2164 break;
2165
2166 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
2167 channels->min = channels->max =
2168 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
2169 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2170 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
2171 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
2172 break;
2173
2174 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
2175 channels->min = channels->max =
2176 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
2177 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2178 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
2179 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
2180 break;
2181
2182 case MSM_BACKEND_DAI_AUXPCM_RX:
2183 rate->min = rate->max =
2184 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
2185 channels->min = channels->max =
2186 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
2187 break;
2188
2189 case MSM_BACKEND_DAI_AUXPCM_TX:
2190 rate->min = rate->max =
2191 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
2192 channels->min = channels->max =
2193 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
2194 break;
2195
2196 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
2197 rate->min = rate->max =
2198 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
2199 channels->min = channels->max =
2200 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
2201 break;
2202
2203 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
2204 rate->min = rate->max =
2205 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
2206 channels->min = channels->max =
2207 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
2208 break;
2209
2210 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
2211 rate->min = rate->max =
2212 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
2213 channels->min = channels->max =
2214 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
2215 break;
2216
2217 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
2218 rate->min = rate->max =
2219 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
2220 channels->min = channels->max =
2221 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
2222 break;
2223
2224 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
2225 rate->min = rate->max =
2226 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
2227 channels->min = channels->max =
2228 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
2229 break;
2230
2231 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
2232 rate->min = rate->max =
2233 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
2234 channels->min = channels->max =
2235 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
2236 break;
2237
2238 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2239 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
2240 channels->min = channels->max =
2241 mi2s_rx_cfg[PRIM_MI2S].channels;
2242 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2243 mi2s_rx_cfg[PRIM_MI2S].bit_format);
2244 break;
2245
2246 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2247 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
2248 channels->min = channels->max =
2249 mi2s_tx_cfg[PRIM_MI2S].channels;
2250 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2251 mi2s_tx_cfg[PRIM_MI2S].bit_format);
2252 break;
2253
2254 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2255 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
2256 channels->min = channels->max =
2257 mi2s_rx_cfg[SEC_MI2S].channels;
2258 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2259 mi2s_rx_cfg[SEC_MI2S].bit_format);
2260 break;
2261
2262 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2263 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
2264 channels->min = channels->max =
2265 mi2s_tx_cfg[SEC_MI2S].channels;
2266 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2267 mi2s_tx_cfg[SEC_MI2S].bit_format);
2268 break;
2269
2270 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2271 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
2272 channels->min = channels->max =
2273 mi2s_rx_cfg[TERT_MI2S].channels;
2274 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2275 mi2s_rx_cfg[TERT_MI2S].bit_format);
2276 break;
2277
2278 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2279 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
2280 channels->min = channels->max =
2281 mi2s_tx_cfg[TERT_MI2S].channels;
2282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2283 mi2s_tx_cfg[TERT_MI2S].bit_format);
2284 break;
2285
2286 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2287 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
2288 channels->min = channels->max =
2289 mi2s_rx_cfg[QUAT_MI2S].channels;
2290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2291 mi2s_rx_cfg[QUAT_MI2S].bit_format);
2292 break;
2293
2294 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2295 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
2296 channels->min = channels->max =
2297 mi2s_tx_cfg[QUAT_MI2S].channels;
2298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2299 mi2s_tx_cfg[QUAT_MI2S].bit_format);
2300 break;
2301
2302 default:
2303 rate->min = rate->max = SAMPLING_RATE_48KHZ;
2304 break;
2305 }
2306 return rc;
2307}
2308EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
2309
2310/**
2311 * msm_aux_pcm_snd_startup - startup ops of auxpcm.
2312 *
2313 * @substream: PCM stream pointer of associated backend dailink
2314 *
2315 * Returns 0 on success or -EINVAL on error.
2316 */
2317int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
2318{
2319 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2320
2321 dev_dbg(rtd->card->dev,
2322 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2323 __func__, substream->name, substream->stream,
2324 rtd->cpu_dai->name, rtd->cpu_dai->id);
2325
2326 return 0;
2327}
2328EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
2329
2330/**
2331 * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
2332 *
2333 * @substream: PCM stream pointer of associated backend dailink
2334 */
2335void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
2336{
2337 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2338
2339 dev_dbg(rtd->card->dev,
2340 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2341 __func__,
2342 substream->name, substream->stream,
2343 rtd->cpu_dai->name, rtd->cpu_dai->id);
2344}
2345EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
2346
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302347static int msm_get_port_id(int id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302348{
2349 int afe_port_id;
2350
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302351 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302352 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2353 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2354 break;
2355 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2356 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2357 break;
2358 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2359 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2360 break;
2361 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2362 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2363 break;
2364 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2365 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2366 break;
2367 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2368 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2369 break;
2370 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2371 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2372 break;
2373 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2374 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2375 break;
2376 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302377 pr_err("%s: Invalid id: %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302378 afe_port_id = -EINVAL;
2379 }
2380
2381 return afe_port_id;
2382}
2383
2384static u32 get_mi2s_bits_per_sample(u32 bit_format)
2385{
2386 u32 bit_per_sample;
2387
2388 switch (bit_format) {
2389 case SNDRV_PCM_FORMAT_S32_LE:
2390 case SNDRV_PCM_FORMAT_S24_3LE:
2391 case SNDRV_PCM_FORMAT_S24_LE:
2392 bit_per_sample = 32;
2393 break;
2394 case SNDRV_PCM_FORMAT_S16_LE:
2395 default:
2396 bit_per_sample = 16;
2397 break;
2398 }
2399
2400 return bit_per_sample;
2401}
2402
2403static void update_mi2s_clk_val(int dai_id, int stream)
2404{
2405 u32 bit_per_sample;
2406
2407 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2408 bit_per_sample =
2409 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2410 mi2s_clk[dai_id].clk_freq_in_hz =
2411 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2412 } else {
2413 bit_per_sample =
2414 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2415 mi2s_clk[dai_id].clk_freq_in_hz =
2416 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2417 }
2418}
2419
2420static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2421{
2422 int ret = 0;
2423 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2424 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2425 int port_id = 0;
2426 int index = cpu_dai->id;
2427
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302428 port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302429 if (port_id < 0) {
2430 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2431 ret = port_id;
2432 goto done;
2433 }
2434
2435 if (enable) {
2436 update_mi2s_clk_val(index, substream->stream);
2437 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2438 mi2s_clk[index].clk_freq_in_hz);
2439 }
2440
2441 mi2s_clk[index].enable = enable;
2442 ret = afe_set_lpass_clock_v2(port_id,
2443 &mi2s_clk[index]);
2444 if (ret < 0) {
2445 dev_err(rtd->card->dev,
2446 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2447 __func__, port_id, ret);
2448 goto done;
2449 }
2450
2451done:
2452 return ret;
2453}
2454
2455/**
2456 * msm_mi2s_snd_startup - startup ops of mi2s.
2457 *
2458 * @substream: PCM stream pointer of associated backend dailink
2459 *
2460 * Returns 0 on success or -EINVAL on error.
2461 */
2462int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
2463{
2464 int ret = 0;
2465 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2466 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302467 int port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302468 int index = cpu_dai->id;
2469 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
2470
2471 dev_dbg(rtd->card->dev,
2472 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2473 __func__, substream->name, substream->stream,
2474 cpu_dai->name, cpu_dai->id);
2475
2476 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2477 ret = -EINVAL;
2478 dev_err(rtd->card->dev,
2479 "%s: CPU DAI id (%d) out of range\n",
2480 __func__, cpu_dai->id);
2481 goto done;
2482 }
2483 /*
2484 * Muxtex protection in case the same MI2S
2485 * interface using for both TX and RX so
2486 * that the same clock won't be enable twice.
2487 */
2488 mutex_lock(&mi2s_intf_conf[index].lock);
2489 if (++mi2s_intf_conf[index].ref_cnt == 1) {
2490 /* Check if msm needs to provide the clock to the interface */
2491 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
2492 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
2493 fmt = SND_SOC_DAIFMT_CBM_CFM;
2494 }
2495 ret = msm_mi2s_set_sclk(substream, true);
2496 if (ret < 0) {
2497 dev_err(rtd->card->dev,
2498 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
2499 __func__, ret);
2500 goto clean_up;
2501 }
2502 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
2503 if (ret < 0) {
2504 dev_err(rtd->card->dev,
2505 "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
2506 __func__, index, ret);
2507 goto clk_off;
2508 }
2509 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2510 mi2s_mclk[index].enable = 1;
2511 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
2512 __func__, mi2s_mclk[index].clk_freq_in_hz);
2513 ret = afe_set_lpass_clock_v2(port_id,
2514 &mi2s_mclk[index]);
2515 if (ret < 0) {
2516 pr_err("%s: afe lpass mclk failed, err:%d\n",
2517 __func__, ret);
2518 goto clk_off;
2519 }
2520 }
2521 }
2522 mutex_unlock(&mi2s_intf_conf[index].lock);
2523 return 0;
2524clk_off:
2525 if (ret < 0)
2526 msm_mi2s_set_sclk(substream, false);
2527clean_up:
2528 if (ret < 0)
2529 mi2s_intf_conf[index].ref_cnt--;
2530 mutex_unlock(&mi2s_intf_conf[index].lock);
2531done:
2532 return ret;
2533}
2534EXPORT_SYMBOL(msm_mi2s_snd_startup);
2535
2536/**
2537 * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
2538 *
2539 * @substream: PCM stream pointer of associated backend dailink
2540 */
2541void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
2542{
2543 int ret;
2544 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302545 int port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302546 int index = rtd->cpu_dai->id;
2547
2548 pr_debug("%s(): substream = %s stream = %d\n", __func__,
2549 substream->name, substream->stream);
2550 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2551 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
2552 return;
2553 }
2554
2555 mutex_lock(&mi2s_intf_conf[index].lock);
2556 if (--mi2s_intf_conf[index].ref_cnt == 0) {
2557 ret = msm_mi2s_set_sclk(substream, false);
2558 if (ret < 0) {
2559 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
2560 __func__, index, ret);
2561 mi2s_intf_conf[index].ref_cnt++;
2562 }
2563 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2564 mi2s_mclk[index].enable = 0;
2565 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
2566 __func__, mi2s_mclk[index].clk_freq_in_hz);
2567 ret = afe_set_lpass_clock_v2(port_id,
2568 &mi2s_mclk[index]);
2569 if (ret < 0) {
2570 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
2571 __func__, index, ret);
2572 }
2573 }
2574 }
2575 mutex_unlock(&mi2s_intf_conf[index].lock);
2576}
2577EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
2578
2579/* Validate whether US EU switch is present or not */
2580static int msm_prepare_us_euro(struct snd_soc_card *card)
2581{
2582 struct msm_asoc_mach_data *pdata =
2583 snd_soc_card_get_drvdata(card);
2584 int ret = 0;
2585
2586 if (pdata->us_euro_gpio >= 0) {
2587 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
2588 pdata->us_euro_gpio);
2589 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
2590 if (ret) {
2591 dev_err(card->dev,
2592 "%s: Failed to request codec US/EURO gpio %d error %d\n",
2593 __func__, pdata->us_euro_gpio, ret);
2594 }
2595 }
2596
2597 return ret;
2598}
2599
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302600static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302601{
2602 struct snd_soc_card *card = codec->component.card;
2603 struct msm_asoc_mach_data *pdata =
2604 snd_soc_card_get_drvdata(card);
2605 int value = 0;
2606
2607 if (pdata->us_euro_gpio_p) {
2608 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
2609 if (value)
2610 msm_cdc_pinctrl_select_sleep_state(
2611 pdata->us_euro_gpio_p);
2612 else
2613 msm_cdc_pinctrl_select_active_state(
2614 pdata->us_euro_gpio_p);
2615 } else if (pdata->us_euro_gpio >= 0) {
2616 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
2617 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
2618 }
2619 pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
2620 return true;
2621}
2622
2623static int msm_populate_dai_link_component_of_node(
2624 struct msm_asoc_mach_data *pdata,
2625 struct snd_soc_card *card)
2626{
2627 int i, index, ret = 0;
2628 struct device *cdev = card->dev;
2629 struct snd_soc_dai_link *dai_link = card->dai_link;
2630 struct device_node *phandle;
2631
2632 if (!cdev) {
2633 pr_err("%s: Sound card device memory NULL\n", __func__);
2634 return -ENODEV;
2635 }
2636
2637 for (i = 0; i < card->num_links; i++) {
2638 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
2639 continue;
2640
2641 /* populate platform_of_node for snd card dai links */
2642 if (dai_link[i].platform_name &&
2643 !dai_link[i].platform_of_node) {
2644 index = of_property_match_string(cdev->of_node,
2645 "asoc-platform-names",
2646 dai_link[i].platform_name);
2647 if (index < 0) {
2648 pr_err("%s: No match found for platform name: %s\n",
2649 __func__, dai_link[i].platform_name);
2650 ret = index;
2651 goto cpu_dai;
2652 }
2653 phandle = of_parse_phandle(cdev->of_node,
2654 "asoc-platform",
2655 index);
2656 if (!phandle) {
2657 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
2658 __func__, dai_link[i].platform_name,
2659 index);
2660 ret = -ENODEV;
2661 goto err;
2662 }
2663 dai_link[i].platform_of_node = phandle;
2664 dai_link[i].platform_name = NULL;
2665 }
2666cpu_dai:
2667 /* populate cpu_of_node for snd card dai links */
2668 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
2669 index = of_property_match_string(cdev->of_node,
2670 "asoc-cpu-names",
2671 dai_link[i].cpu_dai_name);
2672 if (index < 0)
2673 goto codec_dai;
2674 phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
2675 index);
2676 if (!phandle) {
2677 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
2678 __func__, dai_link[i].cpu_dai_name);
2679 ret = -ENODEV;
2680 goto err;
2681 }
2682 dai_link[i].cpu_of_node = phandle;
2683 dai_link[i].cpu_dai_name = NULL;
2684 }
2685codec_dai:
2686 /* populate codec_of_node for snd card dai links */
2687 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
2688 index = of_property_match_string(cdev->of_node,
2689 "asoc-codec-names",
2690 dai_link[i].codec_name);
2691 if (index < 0)
2692 continue;
2693 phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
2694 index);
2695 if (!phandle) {
2696 pr_err("%s: retrieving phandle for codec dai %s failed\n",
2697 __func__, dai_link[i].codec_name);
2698 ret = -ENODEV;
2699 goto err;
2700 }
2701 dai_link[i].codec_of_node = phandle;
2702 dai_link[i].codec_name = NULL;
2703 }
2704 if (pdata->snd_card_val == INT_SND_CARD) {
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302705 if ((dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302706 MSM_BACKEND_DAI_INT0_MI2S_RX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302707 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302708 MSM_BACKEND_DAI_INT1_MI2S_RX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302709 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302710 MSM_BACKEND_DAI_INT2_MI2S_TX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302711 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302712 MSM_BACKEND_DAI_INT3_MI2S_TX)) {
2713 index = of_property_match_string(cdev->of_node,
2714 "asoc-codec-names",
2715 MSM_INT_DIGITAL_CODEC);
2716 phandle = of_parse_phandle(cdev->of_node,
2717 "asoc-codec",
2718 index);
2719 dai_link[i].codecs[DIG_CDC].of_node = phandle;
2720 index = of_property_match_string(cdev->of_node,
2721 "asoc-codec-names",
2722 PMIC_INT_ANALOG_CODEC);
2723 phandle = of_parse_phandle(cdev->of_node,
2724 "asoc-codec",
2725 index);
2726 dai_link[i].codecs[ANA_CDC].of_node = phandle;
2727 }
2728 }
2729 }
2730err:
2731 return ret;
2732}
2733
2734static int msm_wsa881x_init(struct snd_soc_component *component)
2735{
2736 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
2737 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
2738 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
2739 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
2740 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
2741 struct msm_asoc_mach_data *pdata;
2742 struct snd_soc_dapm_context *dapm =
2743 snd_soc_codec_get_dapm(codec);
2744
2745 if (!codec) {
2746 pr_err("%s codec is NULL\n", __func__);
2747 return -EINVAL;
2748 }
2749
2750 if (!strcmp(component->name_prefix, "SpkrLeft")) {
2751 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
2752 __func__, codec->component.name);
2753 wsa881x_set_channel_map(codec, &spkleft_ports[0],
2754 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2755 &ch_rate[0]);
2756 if (dapm->component) {
2757 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
2758 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
2759 }
2760 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
2761 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
2762 __func__, codec->component.name);
2763 wsa881x_set_channel_map(codec, &spkright_ports[0],
2764 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2765 &ch_rate[0]);
2766 if (dapm->component) {
2767 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
2768 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
2769 }
2770 } else {
2771 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
2772 codec->component.name);
2773 return -EINVAL;
2774 }
2775
2776
2777 pdata = snd_soc_card_get_drvdata(component->card);
2778 if (pdata && pdata->codec_root)
2779 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
2780 codec);
2781 return 0;
2782}
2783
2784
2785static int msm_init_wsa_dev(struct platform_device *pdev,
2786 struct snd_soc_card *card)
2787{
2788 struct device_node *wsa_of_node;
2789 u32 wsa_max_devs;
2790 u32 wsa_dev_cnt;
2791 char *dev_name_str = NULL;
2792 struct msm_wsa881x_dev_info *wsa881x_dev_info;
2793 const char *wsa_auxdev_name_prefix[1];
2794 int found = 0;
2795 int i;
2796 int ret;
2797
2798 /* Get maximum WSA device count for this platform */
2799 ret = of_property_read_u32(pdev->dev.of_node,
2800 "qcom,wsa-max-devs", &wsa_max_devs);
2801 if (ret) {
2802 dev_dbg(&pdev->dev,
2803 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
2804 __func__, pdev->dev.of_node->full_name, ret);
2805 goto err_dt;
2806 }
2807 if (wsa_max_devs == 0) {
2808 dev_warn(&pdev->dev,
2809 "%s: Max WSA devices is 0 for this target?\n",
2810 __func__);
2811 goto err_dt;
2812 }
2813
2814 /* Get count of WSA device phandles for this platform */
2815 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
2816 "qcom,wsa-devs", NULL);
2817 if (wsa_dev_cnt == -ENOENT) {
2818 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
2819 __func__);
2820 goto err_dt;
2821 } else if (wsa_dev_cnt <= 0) {
2822 dev_err(&pdev->dev,
2823 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
2824 __func__, wsa_dev_cnt);
2825 ret = -EINVAL;
2826 goto err_dt;
2827 }
2828
2829 /*
2830 * Expect total phandles count to be NOT less than maximum possible
2831 * WSA count. However, if it is less, then assign same value to
2832 * max count as well.
2833 */
2834 if (wsa_dev_cnt < wsa_max_devs) {
2835 dev_dbg(&pdev->dev,
2836 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
2837 __func__, wsa_max_devs, wsa_dev_cnt);
2838 wsa_max_devs = wsa_dev_cnt;
2839 }
2840
2841 /* Make sure prefix string passed for each WSA device */
2842 ret = of_property_count_strings(pdev->dev.of_node,
2843 "qcom,wsa-aux-dev-prefix");
2844 if (ret != wsa_dev_cnt) {
2845 dev_err(&pdev->dev,
2846 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
2847 __func__, wsa_dev_cnt, ret);
2848 ret = -EINVAL;
2849 goto err_dt;
2850 }
2851
2852 /*
2853 * Alloc mem to store phandle and index info of WSA device, if already
2854 * registered with ALSA core
2855 */
2856 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
2857 sizeof(struct msm_wsa881x_dev_info),
2858 GFP_KERNEL);
2859 if (!wsa881x_dev_info) {
2860 ret = -ENOMEM;
2861 goto err_mem;
2862 }
2863
2864 /*
2865 * search and check whether all WSA devices are already
2866 * registered with ALSA core or not. If found a node, store
2867 * the node and the index in a local array of struct for later
2868 * use.
2869 */
2870 for (i = 0; i < wsa_dev_cnt; i++) {
2871 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
2872 "qcom,wsa-devs", i);
2873 if (unlikely(!wsa_of_node)) {
2874 /* we should not be here */
2875 dev_err(&pdev->dev,
2876 "%s: wsa dev node is not present\n",
2877 __func__);
2878 ret = -EINVAL;
2879 goto err_dev_node;
2880 }
2881 if (soc_find_component(wsa_of_node, NULL)) {
2882 /* WSA device registered with ALSA core */
2883 wsa881x_dev_info[found].of_node = wsa_of_node;
2884 wsa881x_dev_info[found].index = i;
2885 found++;
2886 if (found == wsa_max_devs)
2887 break;
2888 }
2889 }
2890
2891 if (found < wsa_max_devs) {
2892 dev_dbg(&pdev->dev,
2893 "%s: failed to find %d components. Found only %d\n",
2894 __func__, wsa_max_devs, found);
2895 return -EPROBE_DEFER;
2896 }
2897 dev_info(&pdev->dev,
2898 "%s: found %d wsa881x devices registered with ALSA core\n",
2899 __func__, found);
2900
2901 card->num_aux_devs = wsa_max_devs;
2902 card->num_configs = wsa_max_devs;
2903
2904 /* Alloc array of AUX devs struct */
2905 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2906 sizeof(struct snd_soc_aux_dev),
2907 GFP_KERNEL);
2908 if (!msm_aux_dev) {
2909 ret = -ENOMEM;
2910 goto err_auxdev_mem;
2911 }
2912
2913 /* Alloc array of codec conf struct */
2914 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2915 sizeof(struct snd_soc_codec_conf),
2916 GFP_KERNEL);
2917 if (!msm_codec_conf) {
2918 ret = -ENOMEM;
2919 goto err_codec_conf;
2920 }
2921
2922 for (i = 0; i < card->num_aux_devs; i++) {
2923 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
2924 GFP_KERNEL);
2925 if (!dev_name_str) {
2926 ret = -ENOMEM;
2927 goto err_dev_str;
2928 }
2929
2930 ret = of_property_read_string_index(pdev->dev.of_node,
2931 "qcom,wsa-aux-dev-prefix",
2932 wsa881x_dev_info[i].index,
2933 wsa_auxdev_name_prefix);
2934 if (ret) {
2935 dev_err(&pdev->dev,
2936 "%s: failed to read wsa aux dev prefix, ret = %d\n",
2937 __func__, ret);
2938 ret = -EINVAL;
2939 goto err_dt_prop;
2940 }
2941
2942 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
2943 msm_aux_dev[i].name = dev_name_str;
2944 msm_aux_dev[i].codec_name = NULL;
2945 msm_aux_dev[i].codec_of_node =
2946 wsa881x_dev_info[i].of_node;
2947 msm_aux_dev[i].init = msm_wsa881x_init;
2948 msm_codec_conf[i].dev_name = NULL;
2949 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
2950 msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
2951 }
2952 card->codec_conf = msm_codec_conf;
2953 card->aux_dev = msm_aux_dev;
2954
2955 return 0;
2956
2957err_dt_prop:
2958 devm_kfree(&pdev->dev, dev_name_str);
2959err_dev_str:
2960 devm_kfree(&pdev->dev, msm_codec_conf);
2961err_codec_conf:
2962 devm_kfree(&pdev->dev, msm_aux_dev);
2963err_auxdev_mem:
2964err_dev_node:
2965 devm_kfree(&pdev->dev, wsa881x_dev_info);
2966err_mem:
2967err_dt:
2968 return ret;
2969}
2970
2971static void msm_free_auxdev_mem(struct platform_device *pdev)
2972{
2973 struct snd_soc_card *card = platform_get_drvdata(pdev);
2974 int i;
2975
2976 if (card->num_aux_devs > 0) {
2977 for (i = 0; i < card->num_aux_devs; i++) {
2978 kfree(msm_aux_dev[i].codec_name);
2979 kfree(msm_codec_conf[i].dev_name);
2980 kfree(msm_codec_conf[i].name_prefix);
2981 }
2982 }
2983}
2984
2985static void i2s_auxpcm_init(struct platform_device *pdev)
2986{
2987 int count;
2988 u32 mi2s_master_slave[MI2S_MAX];
2989 u32 mi2s_ext_mclk[MI2S_MAX];
2990 int ret;
2991
2992 for (count = 0; count < MI2S_MAX; count++) {
2993 mutex_init(&mi2s_intf_conf[count].lock);
2994 mi2s_intf_conf[count].ref_cnt = 0;
2995 }
2996
2997 ret = of_property_read_u32_array(pdev->dev.of_node,
2998 "qcom,msm-mi2s-master",
2999 mi2s_master_slave, MI2S_MAX);
3000 if (ret) {
3001 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
3002 __func__);
3003 } else {
3004 for (count = 0; count < MI2S_MAX; count++) {
3005 mi2s_intf_conf[count].msm_is_mi2s_master =
3006 mi2s_master_slave[count];
3007 }
3008 }
3009
3010 ret = of_property_read_u32_array(pdev->dev.of_node,
3011 "qcom,msm-mi2s-ext-mclk",
3012 mi2s_ext_mclk, MI2S_MAX);
3013 if (ret) {
3014 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
3015 __func__);
3016 } else {
3017 for (count = 0; count < MI2S_MAX; count++)
3018 mi2s_intf_conf[count].msm_is_ext_mclk =
3019 mi2s_ext_mclk[count];
3020 }
3021}
3022
3023static const struct of_device_id sdm660_asoc_machine_of_match[] = {
3024 { .compatible = "qcom,sdm660-asoc-snd",
3025 .data = "internal_codec"},
3026 { .compatible = "qcom,sdm660-asoc-snd-tasha",
3027 .data = "tasha_codec"},
3028 { .compatible = "qcom,sdm660-asoc-snd-tavil",
3029 .data = "tavil_codec"},
3030 {},
3031};
3032
3033static int msm_asoc_machine_probe(struct platform_device *pdev)
3034{
3035 struct snd_soc_card *card = NULL;
3036 struct msm_asoc_mach_data *pdata = NULL;
3037 const char *mclk = "qcom,msm-mclk-freq";
3038 int ret = -EINVAL, id;
3039 const struct of_device_id *match;
3040
3041 pdata = devm_kzalloc(&pdev->dev,
3042 sizeof(struct msm_asoc_mach_data),
3043 GFP_KERNEL);
3044 if (!pdata)
3045 return -ENOMEM;
3046
3047 match = of_match_node(sdm660_asoc_machine_of_match,
3048 pdev->dev.of_node);
3049 if (!match)
3050 goto err;
3051
3052 ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
3053 if (ret) {
3054 dev_err(&pdev->dev,
3055 "%s: missing %s in dt node\n", __func__, mclk);
3056 id = DEFAULT_MCLK_RATE;
3057 }
3058 pdata->mclk_freq = id;
3059
3060 if (!strcmp(match->data, "tasha_codec") ||
3061 !strcmp(match->data, "tavil_codec")) {
3062 if (!strcmp(match->data, "tasha_codec"))
3063 pdata->snd_card_val = EXT_SND_CARD_TASHA;
3064 else
3065 pdata->snd_card_val = EXT_SND_CARD_TAVIL;
3066 ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
3067 if (ret)
3068 goto err;
3069 } else if (!strcmp(match->data, "internal_codec")) {
3070 pdata->snd_card_val = INT_SND_CARD;
3071 ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
3072 if (ret)
3073 goto err;
3074 } else {
3075 dev_err(&pdev->dev,
3076 "%s: Not a matching DT sound node\n", __func__);
3077 goto err;
3078 }
3079 if (!card)
3080 goto err;
3081
3082 if (pdata->snd_card_val == INT_SND_CARD) {
3083 /*reading the gpio configurations from dtsi file*/
3084 pdata->pdm_gpio_p = of_parse_phandle(pdev->dev.of_node,
3085 "qcom,cdc-pdm-gpios", 0);
3086 pdata->comp_gpio_p = of_parse_phandle(pdev->dev.of_node,
3087 "qcom,cdc-comp-gpios", 0);
3088 pdata->dmic_gpio_p = of_parse_phandle(pdev->dev.of_node,
3089 "qcom,cdc-dmic-gpios", 0);
3090 pdata->ext_spk_gpio_p = of_parse_phandle(pdev->dev.of_node,
3091 "qcom,cdc-ext-spk-gpios", 0);
3092 }
3093
3094 /*
3095 * Parse US-Euro gpio info from DT. Report no error if us-euro
3096 * entry is not found in DT file as some targets do not support
3097 * US-Euro detection
3098 */
3099 pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
3100 "qcom,us-euro-gpios", 0);
3101 if (!gpio_is_valid(pdata->us_euro_gpio))
3102 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
3103 "qcom,us-euro-gpios", 0);
3104 if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
3105 dev_dbg(&pdev->dev, "property %s not detected in node %s",
3106 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
3107 } else {
3108 dev_dbg(&pdev->dev, "%s detected",
3109 "qcom,us-euro-gpios");
3110 mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
3111 }
3112
3113 ret = msm_prepare_us_euro(card);
3114 if (ret)
3115 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
3116 ret);
3117
3118 i2s_auxpcm_init(pdev);
3119
3120 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
3121 if (ret)
3122 goto err;
3123
3124 ret = msm_populate_dai_link_component_of_node(pdata, card);
3125 if (ret) {
3126 ret = -EPROBE_DEFER;
3127 goto err;
3128 }
3129
3130 if (!of_property_read_bool(pdev->dev.of_node, "qcom,wsa-disable")) {
3131 ret = msm_init_wsa_dev(pdev, card);
3132 if (ret)
3133 goto err;
3134 }
3135
3136 ret = devm_snd_soc_register_card(&pdev->dev, card);
3137 if (ret == -EPROBE_DEFER) {
3138 if (codec_reg_done) {
3139 /*
3140 * return failure as EINVAL since other codec
3141 * registered sound card successfully.
3142 * This avoids any further probe calls.
3143 */
3144 ret = -EINVAL;
3145 }
3146 goto err;
3147 } else if (ret) {
3148 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
3149 ret);
3150 goto err;
3151 }
3152 if (pdata->snd_card_val != INT_SND_CARD)
3153 msm_ext_register_audio_notifier(pdev);
3154
3155 return 0;
3156err:
3157 if (pdata->us_euro_gpio > 0) {
3158 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
3159 __func__, pdata->us_euro_gpio);
3160 pdata->us_euro_gpio = 0;
3161 }
3162 if (pdata->hph_en1_gpio > 0) {
3163 dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
3164 __func__, pdata->hph_en1_gpio);
3165 gpio_free(pdata->hph_en1_gpio);
3166 pdata->hph_en1_gpio = 0;
3167 }
3168 if (pdata->hph_en0_gpio > 0) {
3169 dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
3170 __func__, pdata->hph_en0_gpio);
3171 gpio_free(pdata->hph_en0_gpio);
3172 pdata->hph_en0_gpio = 0;
3173 }
3174 if (pdata->snd_card_val != INT_SND_CARD)
3175 msm_ext_cdc_deinit(pdata);
3176 devm_kfree(&pdev->dev, pdata);
3177 return ret;
3178}
3179
3180static int msm_asoc_machine_remove(struct platform_device *pdev)
3181{
3182 struct snd_soc_card *card = platform_get_drvdata(pdev);
3183 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3184
3185 if (pdata->snd_card_val == INT_SND_CARD)
3186 mutex_destroy(&pdata->cdc_int_mclk0_mutex);
3187 else
3188 msm_ext_cdc_deinit(pdata);
3189 msm_free_auxdev_mem(pdev);
3190
3191 gpio_free(pdata->us_euro_gpio);
3192 gpio_free(pdata->hph_en1_gpio);
3193 gpio_free(pdata->hph_en0_gpio);
3194 snd_soc_unregister_card(card);
3195 return 0;
3196}
3197
3198static struct platform_driver sdm660_asoc_machine_driver = {
3199 .driver = {
3200 .name = DRV_NAME,
3201 .owner = THIS_MODULE,
3202 .pm = &snd_soc_pm_ops,
3203 .of_match_table = sdm660_asoc_machine_of_match,
3204 },
3205 .probe = msm_asoc_machine_probe,
3206 .remove = msm_asoc_machine_remove,
3207};
3208module_platform_driver(sdm660_asoc_machine_driver);
3209
3210MODULE_DESCRIPTION("ALSA SoC msm");
3211MODULE_LICENSE("GPL v2");
3212MODULE_ALIAS("platform:" DRV_NAME);
3213MODULE_DEVICE_TABLE(of, sdm660_asoc_machine_of_match);