blob: 0c02e14d7dce2e8ad22a854805cd5ba2cf83a7ac [file] [log] [blame]
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -08001/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/err.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/clk.h>
19#include <linux/clk-provider.h>
20#include "../../../drivers/clk/qcom/common.h"
21#include <linux/platform_device.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053022#include <dt-bindings/clock/qcom,audio-ext-clk.h>
Laxminath Kasam605b42f2017-08-01 22:02:15 +053023#include <dsp/q6afe-v2.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053024#include "audio-ext-clk-up.h"
25
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080026enum {
27 AUDIO_EXT_CLK_PMI,
28 AUDIO_EXT_CLK_LNBB2,
29 AUDIO_EXT_CLK_LPASS,
Laxminath Kasamd712cc72018-07-17 23:43:21 +053030 AUDIO_EXT_CLK_LPASS2,
31 AUDIO_EXT_CLK_LPASS3,
Aditya Bavanari7259ca62018-07-30 12:03:03 +053032 AUDIO_EXT_CLK_LPASS4,
33 AUDIO_EXT_CLK_LPASS5,
34 AUDIO_EXT_CLK_LPASS6,
35 AUDIO_EXT_CLK_LPASS7,
Laxminath Kasamd712cc72018-07-17 23:43:21 +053036 AUDIO_EXT_CLK_LPASS_MAX,
37 AUDIO_EXT_CLK_MAX = AUDIO_EXT_CLK_LPASS_MAX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053038};
39
40struct pinctrl_info {
41 struct pinctrl *pinctrl;
42 struct pinctrl_state *sleep;
43 struct pinctrl_state *active;
44 char __iomem *base;
45};
46
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080047struct audio_ext_clk {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053048 struct pinctrl_info pnctrl_info;
49 struct clk_fixed_factor fact;
50};
51
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080052struct audio_ext_clk_priv {
53 struct device *dev;
54 int clk_src;
55 struct afe_clk_set clk_cfg;
56 struct audio_ext_clk audio_clk;
Surendar Karka0a915f82018-07-09 20:30:03 +053057 const char *clk_name;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053058};
59
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080060static inline struct audio_ext_clk_priv *to_audio_clk(struct clk_hw *hw)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053061{
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080062 return container_of(hw, struct audio_ext_clk_priv, audio_clk.fact.hw);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053063}
64
65static int audio_ext_clk_prepare(struct clk_hw *hw)
66{
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080067 struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
68 struct pinctrl_info *pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053069 int ret;
70
Laxminath Kasamd712cc72018-07-17 23:43:21 +053071 if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
72 (clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080073 clk_priv->clk_cfg.enable = 1;
74 ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
75 if (ret < 0) {
76 pr_err("%s afe_set_digital_codec_core_clock failed\n",
77 __func__);
78 return ret;
79 }
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053080 }
81
82 if (pnctrl_info->pinctrl) {
83 ret = pinctrl_select_state(pnctrl_info->pinctrl,
84 pnctrl_info->active);
85 if (ret) {
86 pr_err("%s: active state select failed with %d\n",
87 __func__, ret);
88 return -EIO;
89 }
90 }
91
92 if (pnctrl_info->base)
93 iowrite32(1, pnctrl_info->base);
94 return 0;
95}
96
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080097static void audio_ext_clk_unprepare(struct clk_hw *hw)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053098{
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -080099 struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
100 struct pinctrl_info *pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530101 int ret;
102
103 if (pnctrl_info->pinctrl) {
104 ret = pinctrl_select_state(pnctrl_info->pinctrl,
105 pnctrl_info->sleep);
106 if (ret) {
107 pr_err("%s: active state select failed with %d\n",
108 __func__, ret);
109 return;
110 }
111 }
112
Laxminath Kasamd712cc72018-07-17 23:43:21 +0530113 if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
114 (clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800115 clk_priv->clk_cfg.enable = 0;
116 ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
117 if (ret < 0)
118 pr_err("%s: afe_set_lpass_clk_cfg failed, ret = %d\n",
119 __func__, ret);
120 }
121
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530122 if (pnctrl_info->base)
123 iowrite32(0, pnctrl_info->base);
124}
125
Surendar Karka0a915f82018-07-09 20:30:03 +0530126static u8 audio_ext_clk_get_parent(struct clk_hw *hw)
127{
128 struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
129 int num_parents = clk_hw_get_num_parents(hw);
130 const char * const *parent_names = hw->init->parent_names;
131 u8 i = 0, ret = hw->init->num_parents + 1;
132
133 if ((clk_priv->clk_src == AUDIO_EXT_CLK_PMI) && clk_priv->clk_name) {
134 for (i = 0; i < num_parents; i++) {
135 if (!strcmp(parent_names[i], clk_priv->clk_name))
136 ret = i;
137 }
138 pr_debug("%s: parent index = %u\n", __func__, ret);
139 return ret;
140 } else
141 return 0;
142}
143
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800144static const struct clk_ops audio_ext_clk_ops = {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530145 .prepare = audio_ext_clk_prepare,
146 .unprepare = audio_ext_clk_unprepare,
Surendar Karka0a915f82018-07-09 20:30:03 +0530147 .get_parent = audio_ext_clk_get_parent,
148};
149
150static const char * const audio_ext_pmi_div_clk[] = {
151 "qpnp_clkdiv_1",
152 "pms405_div_clk1",
153 "pm6150_div_clk1",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530154};
155
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800156static struct audio_ext_clk audio_clk_array[] = {
157 {
158 .pnctrl_info = {NULL},
159 .fact = {
160 .mult = 1,
161 .div = 1,
162 .hw.init = &(struct clk_init_data){
163 .name = "audio_ext_pmi_clk",
Surendar Karka0a915f82018-07-09 20:30:03 +0530164 .parent_names = audio_ext_pmi_div_clk,
165 .num_parents =
166 ARRAY_SIZE(audio_ext_pmi_div_clk),
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800167 .ops = &audio_ext_clk_ops,
168 },
169 },
170 },
171 {
172 .pnctrl_info = {NULL},
173 .fact = {
174 .mult = 1,
175 .div = 1,
176 .hw.init = &(struct clk_init_data){
177 .name = "audio_ext_pmi_lnbb_clk",
178 .parent_names = (const char *[])
179 { "ln_bb_clk2" },
180 .num_parents = 1,
181 .ops = &clk_dummy_ops,
182 },
183 },
184 },
185 {
186 .pnctrl_info = {NULL},
187 .fact = {
188 .mult = 1,
189 .div = 1,
190 .hw.init = &(struct clk_init_data){
191 .name = "audio_lpass_mclk",
192 .ops = &audio_ext_clk_ops,
193 },
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530194 },
195 },
Laxminath Kasamd712cc72018-07-17 23:43:21 +0530196 {
197 .pnctrl_info = {NULL},
198 .fact = {
199 .mult = 1,
200 .div = 1,
201 .hw.init = &(struct clk_init_data){
202 .name = "audio_lpass_mclk2",
203 .ops = &audio_ext_clk_ops,
204 },
205 },
206 },
207 {
208 .pnctrl_info = {NULL},
209 .fact = {
210 .mult = 1,
211 .div = 1,
212 .hw.init = &(struct clk_init_data){
213 .name = "audio_lpass_mclk3",
214 .ops = &audio_ext_clk_ops,
215 },
216 },
217 },
Aditya Bavanari7259ca62018-07-30 12:03:03 +0530218 {
219 .pnctrl_info = {NULL},
220 .fact = {
221 .mult = 1,
222 .div = 1,
223 .hw.init = &(struct clk_init_data){
224 .name = "audio_lpass_mclk4",
225 .ops = &audio_ext_clk_ops,
226 },
227 },
228 },
229 {
230 .pnctrl_info = {NULL},
231 .fact = {
232 .mult = 1,
233 .div = 1,
234 .hw.init = &(struct clk_init_data){
235 .name = "audio_lpass_mclk5",
236 .ops = &audio_ext_clk_ops,
237 },
238 },
239 },
240 {
241 .pnctrl_info = {NULL},
242 .fact = {
243 .mult = 1,
244 .div = 1,
245 .hw.init = &(struct clk_init_data){
246 .name = "audio_lpass_mclk6",
247 .ops = &audio_ext_clk_ops,
248 },
249 },
250 },
251 {
252 .pnctrl_info = {NULL},
253 .fact = {
254 .mult = 1,
255 .div = 1,
256 .hw.init = &(struct clk_init_data){
257 .name = "audio_lpass_mclk7",
258 .ops = &audio_ext_clk_ops,
259 },
260 },
261 },
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530262};
263
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800264static int audio_get_pinctrl(struct platform_device *pdev)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530265{
266 struct device *dev = &pdev->dev;
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800267 struct audio_ext_clk_priv *clk_priv = platform_get_drvdata(pdev);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530268 struct pinctrl_info *pnctrl_info;
269 struct pinctrl *pinctrl;
270 int ret;
271 u32 reg;
272
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800273 pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530274 if (pnctrl_info->pinctrl) {
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800275 dev_err(dev, "%s: already requested before\n",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530276 __func__);
277 return -EINVAL;
278 }
279
280 pinctrl = devm_pinctrl_get(dev);
281 if (IS_ERR_OR_NULL(pinctrl)) {
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800282 dev_err(dev, "%s: Unable to get pinctrl handle\n",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530283 __func__);
284 return -EINVAL;
285 }
286 pnctrl_info->pinctrl = pinctrl;
287 /* get all state handles from Device Tree */
288 pnctrl_info->sleep = pinctrl_lookup_state(pinctrl, "sleep");
289 if (IS_ERR(pnctrl_info->sleep)) {
290 dev_err(dev, "%s: could not get sleep pinstate\n",
291 __func__);
292 goto err;
293 }
294 pnctrl_info->active = pinctrl_lookup_state(pinctrl, "active");
295 if (IS_ERR(pnctrl_info->active)) {
296 dev_err(dev, "%s: could not get active pinstate\n",
297 __func__);
298 goto err;
299 }
300 /* Reset the TLMM pins to a default state */
301 ret = pinctrl_select_state(pnctrl_info->pinctrl,
302 pnctrl_info->sleep);
303 if (ret) {
304 dev_err(dev, "%s: Disable TLMM pins failed with %d\n",
305 __func__, ret);
306 goto err;
307 }
308
309 ret = of_property_read_u32(dev->of_node, "qcom,mclk-clk-reg", &reg);
310 if (ret < 0) {
311 dev_dbg(dev, "%s: miss mclk reg\n", __func__);
312 } else {
313 pnctrl_info->base = ioremap(reg, sizeof(u32));
314 if (pnctrl_info->base == NULL) {
315 dev_err(dev, "%s ioremap failed\n", __func__);
316 goto err;
317 }
318 }
319
320 return 0;
321
322err:
323 devm_pinctrl_put(pnctrl_info->pinctrl);
324 return -EINVAL;
325}
326
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800327static int audio_put_pinctrl(struct platform_device *pdev)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530328{
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800329 struct audio_ext_clk_priv *clk_priv = platform_get_drvdata(pdev);
330 struct pinctrl_info *pnctrl_info = NULL;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530331
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800332 pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
333 if (pnctrl_info && pnctrl_info->pinctrl) {
334 devm_pinctrl_put(pnctrl_info->pinctrl);
335 pnctrl_info->pinctrl = NULL;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530336 }
337
338 return 0;
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800339}
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530340
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800341static int audio_get_clk_data(struct platform_device *pdev)
342{
343 int ret;
344 struct clk *audio_clk;
345 struct clk_hw *clkhw;
346 struct clk_onecell_data *clk_data;
347 struct audio_ext_clk_priv *clk_priv = platform_get_drvdata(pdev);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530348
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800349 clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
350 if (!clk_data)
351 return -ENOMEM;
352
353 clk_data->clk_num = 1;
354 clk_data->clks = devm_kzalloc(&pdev->dev,
355 sizeof(struct clk *),
356 GFP_KERNEL);
357 if (!clk_data->clks)
358 return -ENOMEM;
359
360 clkhw = &clk_priv->audio_clk.fact.hw;
361 audio_clk = devm_clk_register(&pdev->dev, clkhw);
362 if (IS_ERR(audio_clk)) {
363 dev_err(&pdev->dev,
364 "%s: clock register failed for clk_src = %d\\n",
365 __func__, clk_priv->clk_src);
366 ret = PTR_ERR(audio_clk);
367 return ret;
368 }
369 clk_data->clks[0] = audio_clk;
370
371 ret = of_clk_add_provider(pdev->dev.of_node,
372 of_clk_src_onecell_get, clk_data);
373 if (ret)
374 dev_err(&pdev->dev, "%s: clock add failed for clk_src = %d\n",
375 __func__, clk_priv->clk_src);
376
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530377 return ret;
378}
379
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800380static int audio_ref_clk_probe(struct platform_device *pdev)
381{
382 int ret;
383 struct audio_ext_clk_priv *clk_priv;
Laxminath Kasam43c1a132018-06-15 13:18:07 +0530384 u32 clk_freq = 0, clk_id = 0, clk_src = 0, use_pinctrl = 0;
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800385
386 clk_priv = devm_kzalloc(&pdev->dev, sizeof(*clk_priv), GFP_KERNEL);
387 if (!clk_priv)
388 return -ENOMEM;
389
390 ret = of_property_read_u32(pdev->dev.of_node,
391 "qcom,codec-ext-clk-src",
392 &clk_src);
393 if (ret) {
394 dev_err(&pdev->dev, "%s: could not get clk source, ret = %d\n",
395 __func__, ret);
396 return ret;
397 }
398
399 if (clk_src >= AUDIO_EXT_CLK_MAX) {
400 dev_err(&pdev->dev, "%s: Invalid clk source = %d\n",
401 __func__, clk_src);
402 return -EINVAL;
403 }
Surendar Karka0a915f82018-07-09 20:30:03 +0530404 clk_priv->clk_name = NULL;
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800405 clk_priv->clk_src = clk_src;
406 memcpy(&clk_priv->audio_clk, &audio_clk_array[clk_src],
407 sizeof(struct audio_ext_clk));
408
409 /* Init lpass clk default values */
410 clk_priv->clk_cfg.clk_set_minor_version =
411 Q6AFE_LPASS_CLK_CONFIG_API_VERSION;
412 clk_priv->clk_cfg.clk_id = Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR;
413 clk_priv->clk_cfg.clk_freq_in_hz = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;
414 clk_priv->clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
415
416 ret = of_property_read_u32(pdev->dev.of_node,
417 "qcom,codec-lpass-ext-clk-freq",
418 &clk_freq);
419 if (!ret)
420 clk_priv->clk_cfg.clk_freq_in_hz = clk_freq;
421
422 ret = of_property_read_u32(pdev->dev.of_node,
423 "qcom,codec-lpass-clk-id",
424 &clk_id);
425 if (!ret)
426 clk_priv->clk_cfg.clk_id = clk_id;
427
428 dev_dbg(&pdev->dev, "%s: ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
429 __func__, clk_priv->clk_cfg.clk_freq_in_hz,
430 clk_priv->clk_cfg.clk_id, clk_priv->clk_src);
431 platform_set_drvdata(pdev, clk_priv);
432
Surendar Karka0a915f82018-07-09 20:30:03 +0530433 ret = of_property_read_string(pdev->dev.of_node, "pmic-clock-names",
434 &clk_priv->clk_name);
435 if (ret)
436 dev_dbg(&pdev->dev, "%s: could not find pmic clock names\n",
437 __func__);
Laxminath Kasam43c1a132018-06-15 13:18:07 +0530438 /*
439 * property qcom,use-pinctrl to be defined in DTSI to val 1
440 * for clock nodes using pinctrl
441 */
442 of_property_read_u32(pdev->dev.of_node, "qcom,use-pinctrl",
443 &use_pinctrl);
444 dev_dbg(&pdev->dev, "%s: use-pinctrl : %d\n",
445 __func__, use_pinctrl);
446
447 if (use_pinctrl) {
448 ret = audio_get_pinctrl(pdev);
449 if (ret) {
450 dev_err(&pdev->dev, "%s: Parsing PMI pinctrl failed\n",
451 __func__);
452 return ret;
453 }
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800454 }
455
456 ret = audio_get_clk_data(pdev);
457 if (ret) {
458 dev_err(&pdev->dev, "%s: clk_init is failed\n",
459 __func__);
460 audio_put_pinctrl(pdev);
461 return ret;
462 }
463
464 return 0;
465}
466
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530467static int audio_ref_clk_remove(struct platform_device *pdev)
468{
Vidyakumar Athotaecc4eda2017-12-13 16:24:10 -0800469 audio_put_pinctrl(pdev);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530470
471 return 0;
472}
473
474static const struct of_device_id audio_ref_clk_match[] = {
475 {.compatible = "qcom,audio-ref-clk"},
476 {}
477};
478MODULE_DEVICE_TABLE(of, audio_ref_clk_match);
479
480static struct platform_driver audio_ref_clk_driver = {
481 .driver = {
482 .name = "audio-ref-clk",
483 .owner = THIS_MODULE,
484 .of_match_table = audio_ref_clk_match,
485 },
486 .probe = audio_ref_clk_probe,
487 .remove = audio_ref_clk_remove,
488};
489
490int audio_ref_clk_platform_init(void)
491{
492 return platform_driver_register(&audio_ref_clk_driver);
493}
494
495void audio_ref_clk_platform_exit(void)
496{
497 platform_driver_unregister(&audio_ref_clk_driver);
498}
499
500MODULE_DESCRIPTION("Audio Ref Up Clock module platform driver");
501MODULE_LICENSE("GPL v2");