blob: a57d6f611942311bc347ae64f2717c4645bb9146 [file] [log] [blame]
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/of_gpio.h>
14#include <linux/platform_device.h>
15#include <linux/module.h>
16#include <linux/mfd/msm-cdc-pinctrl.h>
17#include <sound/pcm_params.h>
18#include "qdsp6v2/msm-pcm-routing-v2.h"
19#include "sdm660-common.h"
20#include "../codecs/sdm660_cdc/msm-digital-cdc.h"
21#include "../codecs/sdm660_cdc/msm-analog-cdc.h"
22#include "../codecs/msm_sdw/msm_sdw.h"
23
24#define __CHIPSET__ "SDM660 "
25#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
26
27#define DEFAULT_MCLK_RATE 9600000
28#define NATIVE_MCLK_RATE 11289600
29
30#define WCD_MBHC_DEF_RLOADS 5
31
32#define WCN_CDC_SLIM_RX_CH_MAX 2
33#define WCN_CDC_SLIM_TX_CH_MAX 3
34
35#define WSA8810_NAME_1 "wsa881x.20170211"
36#define WSA8810_NAME_2 "wsa881x.20170212"
37
38enum {
39 INT0_MI2S = 0,
40 INT1_MI2S,
41 INT2_MI2S,
42 INT3_MI2S,
43 INT4_MI2S,
44 INT5_MI2S,
45 INT6_MI2S,
46 INT_MI2S_MAX,
47};
48
49enum {
50 BT_SLIM7,
51 FM_SLIM8,
52 SLIM_MAX,
53};
54
55/*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */
56static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
57 {0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */
58 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */
59 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */
60 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */
61 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */
62 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */
63 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */
64 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */
65};
66
67static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = {
68 {
69 AFE_API_VERSION_I2S_CONFIG,
70 Q6AFE_LPASS_CLK_ID_INT0_MI2S_IBIT,
71 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
72 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
73 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
74 0,
75 },
76 {
77 AFE_API_VERSION_I2S_CONFIG,
78 Q6AFE_LPASS_CLK_ID_INT1_MI2S_IBIT,
79 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
80 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
81 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
82 0,
83 },
84 {
85 AFE_API_VERSION_I2S_CONFIG,
86 Q6AFE_LPASS_CLK_ID_INT2_MI2S_IBIT,
87 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
88 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
89 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
90 0,
91 },
92 {
93 AFE_API_VERSION_I2S_CONFIG,
94 Q6AFE_LPASS_CLK_ID_INT3_MI2S_IBIT,
95 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
96 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
97 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
98 0,
99 },
100 {
101 AFE_API_VERSION_I2S_CONFIG,
102 Q6AFE_LPASS_CLK_ID_INT4_MI2S_IBIT,
103 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
104 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
105 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
106 0,
107 },
108 {
109 AFE_API_VERSION_I2S_CONFIG,
110 Q6AFE_LPASS_CLK_ID_INT5_MI2S_IBIT,
111 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
112 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
113 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
114 0,
115 },
116 {
117 AFE_API_VERSION_I2S_CONFIG,
118 Q6AFE_LPASS_CLK_ID_INT6_MI2S_IBIT,
119 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
120 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
121 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
122 0,
123 },
124};
125
126struct dev_config {
127 u32 sample_rate;
128 u32 bit_format;
129 u32 channels;
130};
131
132/* Default configuration of MI2S channels */
133static struct dev_config int_mi2s_cfg[] = {
134 [INT0_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
135 [INT1_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
136 [INT2_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
137 [INT3_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
138 [INT4_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
139 [INT5_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
140 [INT6_MI2S] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
141};
142
143static struct dev_config bt_fm_cfg[] = {
144 [BT_SLIM7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
145 [FM_SLIM8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
146};
147
148static char const *int_mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
149 "KHZ_32", "KHZ_44P1", "KHZ_48",
150 "KHZ_96", "KHZ_192"};
151static const char *const int_mi2s_ch_text[] = {"One", "Two"};
152static const char *const int_mi2s_tx_ch_text[] = {"One", "Two",
153 "Three", "Four"};
154static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
155static const char *const loopback_mclk_text[] = {"DISABLE", "ENABLE"};
156static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
157
158static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_sample_rate, int_mi2s_rate_text);
159static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_chs, int_mi2s_ch_text);
160static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_format, bit_format_text);
161static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_sample_rate, int_mi2s_rate_text);
162static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_chs, int_mi2s_tx_ch_text);
163static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_format, bit_format_text);
164static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_sample_rate, int_mi2s_rate_text);
165static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_chs, int_mi2s_tx_ch_text);
166static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_format, bit_format_text);
167static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_sample_rate, int_mi2s_rate_text);
168static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_chs, int_mi2s_ch_text);
169static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_format, bit_format_text);
170static SOC_ENUM_SINGLE_EXT_DECL(int5_mi2s_tx_chs, int_mi2s_ch_text);
171static SOC_ENUM_SINGLE_EXT_DECL(loopback_mclk_en, loopback_mclk_text);
172static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
173
174static int msm_dmic_event(struct snd_soc_dapm_widget *w,
175 struct snd_kcontrol *kcontrol, int event);
176static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec, int enable,
177 bool dapm);
178static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
179 struct snd_kcontrol *kcontrol, int event);
180static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream);
181static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream);
182
183static struct wcd_mbhc_config *mbhc_cfg_ptr;
184static struct snd_info_entry *codec_root;
185
186static int int_mi2s_get_bit_format_val(int bit_format)
187{
188 int val = 0;
189
190 switch (bit_format) {
191 case SNDRV_PCM_FORMAT_S24_3LE:
192 val = 2;
193 break;
194 case SNDRV_PCM_FORMAT_S24_LE:
195 val = 1;
196 break;
197 case SNDRV_PCM_FORMAT_S16_LE:
198 default:
199 val = 0;
200 break;
201 }
202 return val;
203}
204
205static int int_mi2s_get_bit_format(int val)
206{
207 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
208
209 switch (val) {
210 case 0:
211 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
212 break;
213 case 1:
214 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
215 break;
216 case 2:
217 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
218 break;
219 default:
220 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
221 break;
222 }
223 return bit_fmt;
224}
225
226static int int_mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
227{
228 int port_id = 0;
229
230 if (strnstr(kcontrol->id.name, "INT0_MI2S", sizeof("INT0_MI2S")))
231 port_id = INT0_MI2S;
232 else if (strnstr(kcontrol->id.name, "INT2_MI2S", sizeof("INT2_MI2S")))
233 port_id = INT2_MI2S;
234 else if (strnstr(kcontrol->id.name, "INT3_MI2S", sizeof("INT3_MI2S")))
235 port_id = INT3_MI2S;
236 else if (strnstr(kcontrol->id.name, "INT4_MI2S", sizeof("INT4_MI2S")))
237 port_id = INT4_MI2S;
238 else {
239 pr_err("%s: unsupported channel: %s",
240 __func__, kcontrol->id.name);
241 return -EINVAL;
242 }
243
244 return port_id;
245}
246
247static int int_mi2s_bit_format_get(struct snd_kcontrol *kcontrol,
248 struct snd_ctl_elem_value *ucontrol)
249{
250 int ch_num = int_mi2s_get_port_idx(kcontrol);
251
252 if (ch_num < 0)
253 return ch_num;
254
255 ucontrol->value.enumerated.item[0] =
256 int_mi2s_get_bit_format_val(int_mi2s_cfg[ch_num].bit_format);
257
258 pr_debug("%s: int_mi2s[%d]_bit_format = %d, ucontrol value = %d\n",
259 __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
260 ucontrol->value.enumerated.item[0]);
261
262 return 0;
263}
264
265static int int_mi2s_bit_format_put(struct snd_kcontrol *kcontrol,
266 struct snd_ctl_elem_value *ucontrol)
267{
268 int ch_num = int_mi2s_get_port_idx(kcontrol);
269
270 if (ch_num < 0)
271 return ch_num;
272
273 int_mi2s_cfg[ch_num].bit_format =
274 int_mi2s_get_bit_format(ucontrol->value.enumerated.item[0]);
275
276 pr_debug("%s: int_mi2s[%d]_rx_bit_format = %d, ucontrol value = %d\n",
277 __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
278 ucontrol->value.enumerated.item[0]);
279
280 return 0;
281}
282
283static inline int param_is_mask(int p)
284{
285 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
286 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
287}
288
289static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
290 int n)
291{
292 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
293}
294
295static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
296{
297 if (bit >= SNDRV_MASK_MAX)
298 return;
299 if (param_is_mask(n)) {
300 struct snd_mask *m = param_to_mask(p, n);
301
302 m->bits[0] = 0;
303 m->bits[1] = 0;
304 m->bits[bit >> 5] |= (1 << (bit & 31));
305 }
306}
307
308static int int_mi2s_get_sample_rate_val(int sample_rate)
309{
310 int sample_rate_val;
311
312 switch (sample_rate) {
313 case SAMPLING_RATE_8KHZ:
314 sample_rate_val = 0;
315 break;
316 case SAMPLING_RATE_16KHZ:
317 sample_rate_val = 1;
318 break;
319 case SAMPLING_RATE_32KHZ:
320 sample_rate_val = 2;
321 break;
322 case SAMPLING_RATE_44P1KHZ:
323 sample_rate_val = 3;
324 break;
325 case SAMPLING_RATE_48KHZ:
326 sample_rate_val = 4;
327 break;
328 case SAMPLING_RATE_96KHZ:
329 sample_rate_val = 5;
330 break;
331 case SAMPLING_RATE_192KHZ:
332 sample_rate_val = 6;
333 break;
334 default:
335 sample_rate_val = 4;
336 break;
337 }
338 return sample_rate_val;
339}
340
341static int int_mi2s_get_sample_rate(int value)
342{
343 int sample_rate;
344
345 switch (value) {
346 case 0:
347 sample_rate = SAMPLING_RATE_8KHZ;
348 break;
349 case 1:
350 sample_rate = SAMPLING_RATE_16KHZ;
351 break;
352 case 2:
353 sample_rate = SAMPLING_RATE_32KHZ;
354 break;
355 case 3:
356 sample_rate = SAMPLING_RATE_44P1KHZ;
357 break;
358 case 4:
359 sample_rate = SAMPLING_RATE_48KHZ;
360 break;
361 case 5:
362 sample_rate = SAMPLING_RATE_96KHZ;
363 break;
364 case 6:
365 sample_rate = SAMPLING_RATE_192KHZ;
366 break;
367 default:
368 sample_rate = SAMPLING_RATE_48KHZ;
369 break;
370 }
371 return sample_rate;
372}
373
374static int int_mi2s_sample_rate_put(struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol)
376{
377 int idx = int_mi2s_get_port_idx(kcontrol);
378
379 if (idx < 0)
380 return idx;
381
382 int_mi2s_cfg[idx].sample_rate =
383 int_mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
384
385 pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
386 idx, int_mi2s_cfg[idx].sample_rate,
387 ucontrol->value.enumerated.item[0]);
388
389 return 0;
390}
391
392static int int_mi2s_sample_rate_get(struct snd_kcontrol *kcontrol,
393 struct snd_ctl_elem_value *ucontrol)
394{
395 int idx = int_mi2s_get_port_idx(kcontrol);
396
397 if (idx < 0)
398 return idx;
399
400 ucontrol->value.enumerated.item[0] =
401 int_mi2s_get_sample_rate_val(int_mi2s_cfg[idx].sample_rate);
402
403 pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
404 idx, int_mi2s_cfg[idx].sample_rate,
405 ucontrol->value.enumerated.item[0]);
406
407 return 0;
408}
409
410static int int_mi2s_ch_get(struct snd_kcontrol *kcontrol,
411 struct snd_ctl_elem_value *ucontrol)
412{
413 int idx = int_mi2s_get_port_idx(kcontrol);
414
415 if (idx < 0)
416 return idx;
417
418 pr_debug("%s: int_mi2s_[%d]_rx_ch = %d\n", __func__,
419 idx, int_mi2s_cfg[idx].channels);
420 ucontrol->value.enumerated.item[0] = int_mi2s_cfg[idx].channels - 1;
421
422 return 0;
423}
424
425static int int_mi2s_ch_put(struct snd_kcontrol *kcontrol,
426 struct snd_ctl_elem_value *ucontrol)
427{
428 int idx = int_mi2s_get_port_idx(kcontrol);
429
430 if (idx < 0)
431 return idx;
432
433 int_mi2s_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
434 pr_debug("%s: int_mi2s_[%d]_ch = %d\n", __func__,
435 idx, int_mi2s_cfg[idx].channels);
436
437 return 1;
438}
439
440static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
441 SND_SOC_DAPM_SUPPLY_S("INT_MCLK0", -1, SND_SOC_NOPM, 0, 0,
442 msm_int_mclk0_event, SND_SOC_DAPM_POST_PMD),
443 SND_SOC_DAPM_MIC("Handset Mic", NULL),
444 SND_SOC_DAPM_MIC("Headset Mic", NULL),
445 SND_SOC_DAPM_MIC("Secondary Mic", NULL),
446 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
447 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
448 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
449 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
450};
451
452static int msm_config_hph_compander_gpio(bool enable,
453 struct snd_soc_codec *codec)
454{
455 struct snd_soc_card *card = codec->component.card;
456 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
457 int ret = 0;
458
459 pr_debug("%s: %s HPH Compander\n", __func__,
460 enable ? "Enable" : "Disable");
461
462 if (enable) {
463 ret = msm_cdc_pinctrl_select_active_state(pdata->comp_gpio_p);
464 if (ret) {
465 pr_err("%s: gpio set cannot be activated %s\n",
466 __func__, "comp_gpio");
467 goto done;
468 }
469 } else {
470 ret = msm_cdc_pinctrl_select_sleep_state(pdata->comp_gpio_p);
471 if (ret) {
472 pr_err("%s: gpio set cannot be de-activated %s\n",
473 __func__, "comp_gpio");
474 goto done;
475 }
476 }
477
478done:
479 return ret;
480}
481
482static int is_ext_spk_gpio_support(struct platform_device *pdev,
483 struct msm_asoc_mach_data *pdata)
484{
485 const char *spk_ext_pa = "qcom,msm-spk-ext-pa";
486
487 pr_debug("%s:Enter\n", __func__);
488
489 pdata->spk_ext_pa_gpio = of_get_named_gpio(pdev->dev.of_node,
490 spk_ext_pa, 0);
491
492 if (pdata->spk_ext_pa_gpio < 0) {
493 dev_dbg(&pdev->dev,
494 "%s: missing %s in dt node\n", __func__, spk_ext_pa);
495 } else {
496 if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
497 pr_err("%s: Invalid external speaker gpio: %d",
498 __func__, pdata->spk_ext_pa_gpio);
499 return -EINVAL;
500 }
501 }
502 return 0;
503}
504
505static int enable_spk_ext_pa(struct snd_soc_codec *codec, int enable)
506{
507 struct snd_soc_card *card = codec->component.card;
508 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
509 int ret;
510
511 if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
512 pr_err("%s: Invalid gpio: %d\n", __func__,
513 pdata->spk_ext_pa_gpio);
514 return false;
515 }
516
517 pr_debug("%s: %s external speaker PA\n", __func__,
518 enable ? "Enable" : "Disable");
519
520 if (enable) {
521 ret = msm_cdc_pinctrl_select_active_state(
522 pdata->ext_spk_gpio_p);
523 if (ret) {
524 pr_err("%s: gpio set cannot be de-activated %s\n",
525 __func__, "ext_spk_gpio");
526 return ret;
527 }
528 gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
529 } else {
530 gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
531 ret = msm_cdc_pinctrl_select_sleep_state(
532 pdata->ext_spk_gpio_p);
533 if (ret) {
534 pr_err("%s: gpio set cannot be de-activated %s\n",
535 __func__, "ext_spk_gpio");
536 return ret;
537 }
538 }
539 return 0;
540}
541
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530542static int int_mi2s_get_idx_from_beid(int32_t id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530543{
544 int idx = 0;
545
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530546 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530547 case MSM_BACKEND_DAI_INT0_MI2S_RX:
548 idx = INT0_MI2S;
549 break;
550 case MSM_BACKEND_DAI_INT2_MI2S_TX:
551 idx = INT2_MI2S;
552 break;
553 case MSM_BACKEND_DAI_INT3_MI2S_TX:
554 idx = INT3_MI2S;
555 break;
556 case MSM_BACKEND_DAI_INT4_MI2S_RX:
557 idx = INT4_MI2S;
558 break;
559 case MSM_BACKEND_DAI_INT5_MI2S_TX:
560 idx = INT5_MI2S;
561 break;
562 default:
563 idx = INT0_MI2S;
564 break;
565 }
566
567 return idx;
568}
569
570static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
571 struct snd_pcm_hw_params *params)
572{
573 struct snd_interval *rate = hw_param_interval(params,
574 SNDRV_PCM_HW_PARAM_RATE);
575
576 struct snd_interval *channels = hw_param_interval(params,
577 SNDRV_PCM_HW_PARAM_CHANNELS);
578
579 pr_debug("%s()\n", __func__);
580 rate->min = rate->max = 48000;
581 channels->min = channels->max = 2;
582
583 return 0;
584}
585
586static int int_mi2s_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
587 struct snd_pcm_hw_params *params)
588{
589 struct snd_soc_dai_link *dai_link = rtd->dai_link;
590 struct snd_interval *rate = hw_param_interval(params,
591 SNDRV_PCM_HW_PARAM_RATE);
592 struct snd_interval *channels = hw_param_interval(params,
593 SNDRV_PCM_HW_PARAM_CHANNELS);
594 int idx;
595
596 pr_debug("%s: format = %d, rate = %d\n",
597 __func__, params_format(params), params_rate(params));
598
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530599 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530600 case MSM_BACKEND_DAI_INT0_MI2S_RX:
601 case MSM_BACKEND_DAI_INT2_MI2S_TX:
602 case MSM_BACKEND_DAI_INT3_MI2S_TX:
603 case MSM_BACKEND_DAI_INT4_MI2S_RX:
604 case MSM_BACKEND_DAI_INT5_MI2S_TX:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530605 idx = int_mi2s_get_idx_from_beid(dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530606 rate->min = rate->max = int_mi2s_cfg[idx].sample_rate;
607 channels->min = channels->max =
608 int_mi2s_cfg[idx].channels;
609 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
610 int_mi2s_cfg[idx].bit_format);
611 break;
612 default:
613 rate->min = rate->max = SAMPLING_RATE_48KHZ;
614 break;
615 }
616 return 0;
617}
618
619static int msm_btfm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
620 struct snd_pcm_hw_params *params)
621{
622 struct snd_soc_dai_link *dai_link = rtd->dai_link;
623 struct snd_interval *rate = hw_param_interval(params,
624 SNDRV_PCM_HW_PARAM_RATE);
625 struct snd_interval *channels = hw_param_interval(params,
626 SNDRV_PCM_HW_PARAM_CHANNELS);
627
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530628 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530629 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
630 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
631 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
632 bt_fm_cfg[BT_SLIM7].bit_format);
633 rate->min = rate->max = bt_fm_cfg[BT_SLIM7].sample_rate;
634 channels->min = channels->max =
635 bt_fm_cfg[BT_SLIM7].channels;
636 break;
637
638 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
639 rate->min = rate->max = bt_fm_cfg[FM_SLIM8].sample_rate;
640 channels->min = channels->max =
641 bt_fm_cfg[FM_SLIM8].channels;
642 break;
643
644 default:
645 rate->min = rate->max = SAMPLING_RATE_48KHZ;
646 break;
647 }
648 return 0;
649}
650
651static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 ucontrol->value.integer.value[0] =
655 (int_mi2s_cfg[INT5_MI2S].channels/2 - 1);
656 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
657 ucontrol->value.integer.value[0]);
658 return 0;
659}
660
661static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
662 struct snd_ctl_elem_value *ucontrol)
663{
664 int_mi2s_cfg[INT5_MI2S].channels =
665 roundup_pow_of_two(ucontrol->value.integer.value[0] + 2);
666
667 pr_debug("%s: msm_vi_feed_tx_ch = %d\n",
668 __func__, int_mi2s_cfg[INT5_MI2S].channels);
669 return 1;
670}
671
672static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec,
673 int enable, bool dapm)
674{
675 int ret = 0;
676 struct msm_asoc_mach_data *pdata = NULL;
677 int clk_freq_in_hz;
678 bool int_mclk0_freq_chg = false;
679
680 pdata = snd_soc_card_get_drvdata(codec->component.card);
681 pr_debug("%s: enable %d mclk ref counter %d\n",
682 __func__, enable,
683 atomic_read(&pdata->int_mclk0_rsc_ref));
684 if (enable) {
685 if (int_mi2s_cfg[INT0_MI2S].sample_rate ==
686 SAMPLING_RATE_44P1KHZ) {
687 clk_freq_in_hz = NATIVE_MCLK_RATE;
688 pdata->native_clk_set = true;
689 } else {
690 clk_freq_in_hz = pdata->mclk_freq;
691 pdata->native_clk_set = false;
692 }
693
694 if (pdata->digital_cdc_core_clk.clk_freq_in_hz
695 != clk_freq_in_hz)
696 int_mclk0_freq_chg = true;
697 if (!atomic_read(&pdata->int_mclk0_rsc_ref) ||
698 int_mclk0_freq_chg) {
699 cancel_delayed_work_sync(
700 &pdata->disable_int_mclk0_work);
701 mutex_lock(&pdata->cdc_int_mclk0_mutex);
702 if (atomic_read(&pdata->int_mclk0_enabled) == false ||
703 int_mclk0_freq_chg) {
704 if (atomic_read(&pdata->int_mclk0_enabled)) {
705 pdata->digital_cdc_core_clk.enable = 0;
706 afe_set_lpass_clock_v2(
707 AFE_PORT_ID_INT0_MI2S_RX,
708 &pdata->digital_cdc_core_clk);
709 }
710 pdata->digital_cdc_core_clk.clk_freq_in_hz =
711 clk_freq_in_hz;
712 pdata->digital_cdc_core_clk.enable = 1;
713 ret = afe_set_lpass_clock_v2(
714 AFE_PORT_ID_INT0_MI2S_RX,
715 &pdata->digital_cdc_core_clk);
716 if (ret < 0) {
717 pr_err("%s: failed to enable CCLK\n",
718 __func__);
719 mutex_unlock(
720 &pdata->cdc_int_mclk0_mutex);
721 return ret;
722 }
723 pr_debug("enabled digital codec core clk\n");
724 atomic_set(&pdata->int_mclk0_enabled, true);
725 }
726 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
727 }
728 atomic_inc(&pdata->int_mclk0_rsc_ref);
729 } else {
730 cancel_delayed_work_sync(&pdata->disable_int_mclk0_work);
731 mutex_lock(&pdata->cdc_int_mclk0_mutex);
732 if (atomic_read(&pdata->int_mclk0_enabled) == true) {
733 pdata->digital_cdc_core_clk.enable = 0;
734 ret = afe_set_lpass_clock_v2(
735 AFE_PORT_ID_INT0_MI2S_RX,
736 &pdata->digital_cdc_core_clk);
737 if (ret < 0)
738 pr_err("%s: failed to disable CCLK\n",
739 __func__);
740 atomic_set(&pdata->int_mclk0_enabled, false);
741 }
742 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
743 }
744 return ret;
745}
746
747static int loopback_mclk_get(struct snd_kcontrol *kcontrol,
748 struct snd_ctl_elem_value *ucontrol)
749{
750 pr_debug("%s\n", __func__);
751 return 0;
752}
753
754static int loopback_mclk_put(struct snd_kcontrol *kcontrol,
755 struct snd_ctl_elem_value *ucontrol)
756{
757 int ret = -EINVAL;
758 struct msm_asoc_mach_data *pdata = NULL;
759 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
760
761 pdata = snd_soc_card_get_drvdata(codec->component.card);
762 pr_debug("%s: mclk_rsc_ref %d enable %ld\n",
763 __func__, atomic_read(&pdata->int_mclk0_rsc_ref),
764 ucontrol->value.integer.value[0]);
765 switch (ucontrol->value.integer.value[0]) {
766 case 1:
767 ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
768 if (ret) {
769 pr_err("%s: failed to enable the pri gpios: %d\n",
770 __func__, ret);
771 break;
772 }
773 mutex_lock(&pdata->cdc_int_mclk0_mutex);
774 if ((!atomic_read(&pdata->int_mclk0_rsc_ref)) &&
775 (!atomic_read(&pdata->int_mclk0_enabled))) {
776 pdata->digital_cdc_core_clk.enable = 1;
777 ret = afe_set_lpass_clock_v2(
778 AFE_PORT_ID_INT0_MI2S_RX,
779 &pdata->digital_cdc_core_clk);
780 if (ret < 0) {
781 pr_err("%s: failed to enable the MCLK: %d\n",
782 __func__, ret);
783 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
784 ret = msm_cdc_pinctrl_select_sleep_state(
785 pdata->pdm_gpio_p);
786 if (ret)
787 pr_err("%s: failed to disable the pri gpios: %d\n",
788 __func__, ret);
789 break;
790 }
791 atomic_set(&pdata->int_mclk0_enabled, true);
792 }
793 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
794 atomic_inc(&pdata->int_mclk0_rsc_ref);
795 msm_anlg_cdc_mclk_enable(codec, 1, true);
796 break;
797 case 0:
798 if (atomic_read(&pdata->int_mclk0_rsc_ref) <= 0)
799 break;
800 msm_anlg_cdc_mclk_enable(codec, 0, true);
801 mutex_lock(&pdata->cdc_int_mclk0_mutex);
802 if ((!atomic_dec_return(&pdata->int_mclk0_rsc_ref)) &&
803 (atomic_read(&pdata->int_mclk0_enabled))) {
804 pdata->digital_cdc_core_clk.enable = 0;
805 ret = afe_set_lpass_clock_v2(
806 AFE_PORT_ID_INT0_MI2S_RX,
807 &pdata->digital_cdc_core_clk);
808 if (ret < 0) {
809 pr_err("%s: failed to disable the CCLK: %d\n",
810 __func__, ret);
811 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
812 break;
813 }
814 atomic_set(&pdata->int_mclk0_enabled, false);
815 }
816 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
817 ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
818 if (ret)
819 pr_err("%s: failed to disable the pri gpios: %d\n",
820 __func__, ret);
821 break;
822 default:
823 pr_err("%s: Unexpected input value\n", __func__);
824 break;
825 }
826 return ret;
827}
828
829static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
830 struct snd_ctl_elem_value *ucontrol)
831{
832 /*
833 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
834 * when used for BT_SCO use case. Return either Rx or Tx sample rate
835 * value.
836 */
837 switch (bt_fm_cfg[BT_SLIM7].sample_rate) {
838 case SAMPLING_RATE_48KHZ:
839 ucontrol->value.integer.value[0] = 2;
840 break;
841 case SAMPLING_RATE_16KHZ:
842 ucontrol->value.integer.value[0] = 1;
843 break;
844 case SAMPLING_RATE_8KHZ:
845 default:
846 ucontrol->value.integer.value[0] = 0;
847 break;
848 }
849 pr_debug("%s: sample rate = %d", __func__,
850 bt_fm_cfg[BT_SLIM7].sample_rate);
851
852 return 0;
853}
854
855static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857{
858 switch (ucontrol->value.integer.value[0]) {
859 case 1:
860 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_16KHZ;
861 break;
862 case 2:
863 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_48KHZ;
864 break;
865 case 0:
866 default:
867 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_8KHZ;
868 break;
869 }
870 pr_debug("%s: sample rates: slim7_rx = %d, value = %d\n",
871 __func__,
872 bt_fm_cfg[BT_SLIM7].sample_rate,
873 ucontrol->value.enumerated.item[0]);
874
875 return 0;
876}
877
878static const struct snd_kcontrol_new msm_snd_controls[] = {
879 SOC_ENUM_EXT("INT0_MI2S_RX Format", int0_mi2s_rx_format,
880 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
881 SOC_ENUM_EXT("INT2_MI2S_TX Format", int2_mi2s_tx_format,
882 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
883 SOC_ENUM_EXT("INT3_MI2S_TX Format", int3_mi2s_tx_format,
884 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
885 SOC_ENUM_EXT("INT0_MI2S_RX SampleRate", int0_mi2s_rx_sample_rate,
886 int_mi2s_sample_rate_get,
887 int_mi2s_sample_rate_put),
888 SOC_ENUM_EXT("INT2_MI2S_TX SampleRate", int2_mi2s_tx_sample_rate,
889 int_mi2s_sample_rate_get,
890 int_mi2s_sample_rate_put),
891 SOC_ENUM_EXT("INT3_MI2S_TX SampleRate", int3_mi2s_tx_sample_rate,
892 int_mi2s_sample_rate_get,
893 int_mi2s_sample_rate_put),
894 SOC_ENUM_EXT("INT0_MI2S_RX Channels", int0_mi2s_rx_chs,
895 int_mi2s_ch_get, int_mi2s_ch_put),
896 SOC_ENUM_EXT("INT2_MI2S_TX Channels", int2_mi2s_tx_chs,
897 int_mi2s_ch_get, int_mi2s_ch_put),
898 SOC_ENUM_EXT("INT3_MI2S_TX Channels", int3_mi2s_tx_chs,
899 int_mi2s_ch_get, int_mi2s_ch_put),
900 SOC_ENUM_EXT("Loopback MCLK", loopback_mclk_en,
901 loopback_mclk_get, loopback_mclk_put),
902 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
903 msm_bt_sample_rate_get,
904 msm_bt_sample_rate_put),
905};
906
907static const struct snd_kcontrol_new msm_sdw_controls[] = {
908 SOC_ENUM_EXT("INT4_MI2S_RX Format", int4_mi2s_rx_format,
909 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
910 SOC_ENUM_EXT("INT4_MI2S_RX SampleRate", int4_mi2s_rx_sample_rate,
911 int_mi2s_sample_rate_get,
912 int_mi2s_sample_rate_put),
913 SOC_ENUM_EXT("INT4_MI2S_RX Channels", int4_mi2s_rx_chs,
914 int_mi2s_ch_get, int_mi2s_ch_put),
915 SOC_ENUM_EXT("VI_FEED_TX Channels", int5_mi2s_tx_chs,
916 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
917};
918
919static int msm_dmic_event(struct snd_soc_dapm_widget *w,
920 struct snd_kcontrol *kcontrol, int event)
921{
922 struct msm_asoc_mach_data *pdata = NULL;
923 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
924 int ret = 0;
925
926 pdata = snd_soc_card_get_drvdata(codec->component.card);
927 pr_debug("%s: event = %d\n", __func__, event);
928 switch (event) {
929 case SND_SOC_DAPM_PRE_PMU:
930 ret = msm_cdc_pinctrl_select_active_state(pdata->dmic_gpio_p);
931 if (ret < 0) {
932 pr_err("%s: gpio set cannot be activated %sd",
933 __func__, "dmic_gpio");
934 return ret;
935 }
936 break;
937 case SND_SOC_DAPM_POST_PMD:
938 ret = msm_cdc_pinctrl_select_sleep_state(pdata->dmic_gpio_p);
939 if (ret < 0) {
940 pr_err("%s: gpio set cannot be de-activated %sd",
941 __func__, "dmic_gpio");
942 return ret;
943 }
944 break;
945 default:
946 pr_err("%s: invalid DAPM event %d\n", __func__, event);
947 return -EINVAL;
948 }
949 return 0;
950}
951
952static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
953 struct snd_kcontrol *kcontrol, int event)
954{
955 struct msm_asoc_mach_data *pdata = NULL;
956 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
957 int ret = 0;
958
959 pdata = snd_soc_card_get_drvdata(codec->component.card);
960 pr_debug("%s: event = %d\n", __func__, event);
961 switch (event) {
962 case SND_SOC_DAPM_POST_PMD:
963 pr_debug("%s: mclk_res_ref = %d\n",
964 __func__, atomic_read(&pdata->int_mclk0_rsc_ref));
965 ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
966 if (ret < 0) {
967 pr_err("%s: gpio set cannot be de-activated %sd",
968 __func__, "int_pdm");
969 return ret;
970 }
971 if (atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
972 pr_debug("%s: disabling MCLK\n", __func__);
973 /* disable the codec mclk config*/
974 msm_anlg_cdc_mclk_enable(codec, 0, true);
975 msm_int_enable_dig_cdc_clk(codec, 0, true);
976 }
977 break;
978 default:
979 pr_err("%s: invalid DAPM event %d\n", __func__, event);
980 return -EINVAL;
981 }
982 return 0;
983}
984
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530985static int int_mi2s_get_port_id(int id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530986{
987 int afe_port_id;
988
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530989 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530990 case MSM_BACKEND_DAI_INT0_MI2S_RX:
991 afe_port_id = AFE_PORT_ID_INT0_MI2S_RX;
992 break;
993 case MSM_BACKEND_DAI_INT2_MI2S_TX:
994 afe_port_id = AFE_PORT_ID_INT2_MI2S_TX;
995 break;
996 case MSM_BACKEND_DAI_INT3_MI2S_TX:
997 afe_port_id = AFE_PORT_ID_INT3_MI2S_TX;
998 break;
999 case MSM_BACKEND_DAI_INT4_MI2S_RX:
1000 afe_port_id = AFE_PORT_ID_INT4_MI2S_RX;
1001 break;
1002 case MSM_BACKEND_DAI_INT5_MI2S_TX:
1003 afe_port_id = AFE_PORT_ID_INT5_MI2S_TX;
1004 break;
1005 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301006 pr_err("%s: Invalid id: %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301007 afe_port_id = -EINVAL;
1008 }
1009
1010 return afe_port_id;
1011}
1012
1013static int int_mi2s_get_index(int port_id)
1014{
1015 int index;
1016
1017 switch (port_id) {
1018 case AFE_PORT_ID_INT0_MI2S_RX:
1019 index = INT0_MI2S;
1020 break;
1021 case AFE_PORT_ID_INT2_MI2S_TX:
1022 index = INT2_MI2S;
1023 break;
1024 case AFE_PORT_ID_INT3_MI2S_TX:
1025 index = INT3_MI2S;
1026 break;
1027 case AFE_PORT_ID_INT4_MI2S_RX:
1028 index = INT4_MI2S;
1029 break;
1030 case AFE_PORT_ID_INT5_MI2S_TX:
1031 index = INT5_MI2S;
1032 break;
1033 default:
1034 pr_err("%s: Invalid port_id: %d\n", __func__, port_id);
1035 index = -EINVAL;
1036 }
1037
1038 return index;
1039}
1040
1041static u32 get_int_mi2s_bits_per_sample(u32 bit_format)
1042{
1043 u32 bit_per_sample;
1044
1045 switch (bit_format) {
1046 case SNDRV_PCM_FORMAT_S24_3LE:
1047 case SNDRV_PCM_FORMAT_S24_LE:
1048 bit_per_sample = 32;
1049 break;
1050 case SNDRV_PCM_FORMAT_S16_LE:
1051 default:
1052 bit_per_sample = 16;
1053 break;
1054 }
1055
1056 return bit_per_sample;
1057}
1058
1059static void update_int_mi2s_clk_val(int idx, int stream)
1060{
1061 u32 bit_per_sample;
1062
1063 bit_per_sample =
1064 get_int_mi2s_bits_per_sample(int_mi2s_cfg[idx].bit_format);
1065 int_mi2s_clk[idx].clk_freq_in_hz =
1066 (int_mi2s_cfg[idx].sample_rate * 2 * bit_per_sample);
1067}
1068
1069static int int_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
1070{
1071 int ret = 0;
1072 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1073 int port_id = 0;
1074 int index;
1075
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301076 port_id = int_mi2s_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301077 if (port_id < 0) {
1078 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
1079 ret = port_id;
1080 goto done;
1081 }
1082 index = int_mi2s_get_index(port_id);
1083 if (index < 0) {
1084 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
1085 ret = port_id;
1086 goto done;
1087 }
1088 if (enable) {
1089 update_int_mi2s_clk_val(index, substream->stream);
1090 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
1091 int_mi2s_clk[index].clk_freq_in_hz);
1092 }
1093
1094 int_mi2s_clk[index].enable = enable;
1095 ret = afe_set_lpass_clock_v2(port_id,
1096 &int_mi2s_clk[index]);
1097 if (ret < 0) {
1098 dev_err(rtd->card->dev,
1099 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
1100 __func__, port_id, ret);
1101 goto done;
1102 }
1103
1104done:
1105 return ret;
1106}
1107
1108static int msm_sdw_mi2s_snd_startup(struct snd_pcm_substream *substream)
1109{
1110 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1111 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1112 int ret = 0;
1113
1114 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1115 substream->name, substream->stream);
1116
1117 ret = int_mi2s_set_sclk(substream, true);
1118 if (ret < 0) {
1119 pr_err("%s: failed to enable sclk %d\n",
1120 __func__, ret);
1121 return ret;
1122 }
1123 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
1124 if (ret < 0)
1125 pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
1126
1127 return ret;
1128}
1129
1130static void msm_sdw_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
1131{
1132 int ret;
1133
1134 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1135 substream->name, substream->stream);
1136
1137 ret = int_mi2s_set_sclk(substream, false);
1138 if (ret < 0)
1139 pr_err("%s:clock disable failed; ret=%d\n", __func__,
1140 ret);
1141}
1142
1143static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream)
1144{
1145 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1146 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1147 struct snd_soc_codec *codec = rtd->codec_dais[ANA_CDC]->codec;
1148 int ret = 0;
1149 struct msm_asoc_mach_data *pdata = NULL;
1150
1151 pdata = snd_soc_card_get_drvdata(codec->component.card);
1152 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1153 substream->name, substream->stream);
1154
1155 ret = int_mi2s_set_sclk(substream, true);
1156 if (ret < 0) {
1157 pr_err("%s: failed to enable sclk %d\n",
1158 __func__, ret);
1159 return ret;
1160 }
1161 ret = msm_int_enable_dig_cdc_clk(codec, 1, true);
1162 if (ret < 0) {
1163 pr_err("failed to enable mclk\n");
1164 return ret;
1165 }
1166 /* Enable the codec mclk config */
1167 ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
1168 if (ret < 0) {
1169 pr_err("%s: gpio set cannot be activated %s\n",
1170 __func__, "int_pdm");
1171 return ret;
1172 }
1173 msm_anlg_cdc_mclk_enable(codec, 1, true);
1174 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
1175 if (ret < 0)
1176 pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
1177
1178 return ret;
1179}
1180
1181static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
1182{
1183 int ret;
1184 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1185 struct snd_soc_card *card = rtd->card;
1186 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
1187
1188 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1189 substream->name, substream->stream);
1190
1191 ret = int_mi2s_set_sclk(substream, false);
1192 if (ret < 0)
1193 pr_err("%s:clock disable failed; ret=%d\n", __func__,
1194 ret);
1195 if (atomic_read(&pdata->int_mclk0_rsc_ref) > 0) {
1196 atomic_dec(&pdata->int_mclk0_rsc_ref);
1197 pr_debug("%s: decrementing mclk_res_ref %d\n",
1198 __func__,
1199 atomic_read(&pdata->int_mclk0_rsc_ref));
1200 }
1201}
1202
1203static void *def_msm_int_wcd_mbhc_cal(void)
1204{
1205 void *msm_int_wcd_cal;
1206 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
1207 u16 *btn_low, *btn_high;
1208
1209 msm_int_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
1210 WCD_MBHC_DEF_RLOADS), GFP_KERNEL);
1211 if (!msm_int_wcd_cal)
1212 return NULL;
1213
1214#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(msm_int_wcd_cal)->X) = (Y))
1215 S(v_hs_max, 1500);
1216#undef S
1217#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal)->X) = (Y))
1218 S(num_btn, WCD_MBHC_DEF_BUTTONS);
1219#undef S
1220
1221
1222 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal);
1223 btn_low = btn_cfg->_v_btn_low;
1224 btn_high = ((void *)&btn_cfg->_v_btn_low) +
1225 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
1226
1227 /*
1228 * In SW we are maintaining two sets of threshold register
1229 * one for current source and another for Micbias.
1230 * all btn_low corresponds to threshold for current source
1231 * all bt_high corresponds to threshold for Micbias
1232 * Below thresholds are based on following resistances
1233 * 0-70 == Button 0
1234 * 110-180 == Button 1
1235 * 210-290 == Button 2
1236 * 360-680 == Button 3
1237 */
1238 btn_low[0] = 75;
1239 btn_high[0] = 75;
1240 btn_low[1] = 150;
1241 btn_high[1] = 150;
1242 btn_low[2] = 225;
1243 btn_high[2] = 225;
1244 btn_low[3] = 450;
1245 btn_high[3] = 450;
1246 btn_low[4] = 500;
1247 btn_high[4] = 500;
1248
1249 return msm_int_wcd_cal;
1250}
1251
1252static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
1253{
1254 struct snd_soc_codec *dig_cdc = rtd->codec_dais[DIG_CDC]->codec;
1255 struct snd_soc_codec *ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
1256 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(ana_cdc);
1257 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1258 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
1259 struct snd_card *card;
1260 int ret = -ENOMEM;
1261
1262 pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
1263
1264 ret = snd_soc_add_codec_controls(ana_cdc, msm_snd_controls,
1265 ARRAY_SIZE(msm_snd_controls));
1266 if (ret < 0) {
1267 pr_err("%s: add_codec_controls failed: %d\n",
1268 __func__, ret);
1269 return ret;
1270 }
1271 ret = snd_soc_add_codec_controls(ana_cdc, msm_common_snd_controls,
1272 msm_common_snd_controls_size());
1273 if (ret < 0) {
1274 pr_err("%s: add common snd controls failed: %d\n",
1275 __func__, ret);
1276 return ret;
1277 }
1278
1279 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
1280 ARRAY_SIZE(msm_int_dapm_widgets));
1281
1282 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
1283 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
1284 snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
1285 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
1286 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
1287
1288 snd_soc_dapm_ignore_suspend(dapm, "EAR");
1289 snd_soc_dapm_ignore_suspend(dapm, "HEADPHONE");
1290 snd_soc_dapm_ignore_suspend(dapm, "SPK_OUT");
1291 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
1292 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
1293 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
1294 snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
1295 snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
1296 snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
1297 snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
1298
1299 snd_soc_dapm_sync(dapm);
1300
1301 msm_anlg_cdc_spk_ext_pa_cb(enable_spk_ext_pa, ana_cdc);
1302 msm_dig_cdc_hph_comp_cb(msm_config_hph_compander_gpio, dig_cdc);
1303
1304 card = rtd->card->snd_card;
1305 if (!codec_root)
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301306 codec_root = snd_info_create_subdir(card->module, "codecs",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301307 card->proc_root);
1308 if (!codec_root) {
1309 pr_debug("%s: Cannot create codecs module entry\n",
1310 __func__);
1311 goto done;
1312 }
1313 pdata->codec_root = codec_root;
1314 msm_dig_codec_info_create_codec_entry(codec_root, dig_cdc);
1315 msm_anlg_codec_info_create_codec_entry(codec_root, ana_cdc);
1316done:
1317 return 0;
1318}
1319
1320static int msm_sdw_audrx_init(struct snd_soc_pcm_runtime *rtd)
1321{
1322 struct snd_soc_codec *codec = rtd->codec;
1323 struct snd_soc_dapm_context *dapm =
1324 snd_soc_codec_get_dapm(codec);
1325 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301326 struct snd_soc_component *aux_comp;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301327 struct snd_card *card;
1328
1329 snd_soc_add_codec_controls(codec, msm_sdw_controls,
1330 ARRAY_SIZE(msm_sdw_controls));
1331
1332 snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW Playback");
1333 snd_soc_dapm_ignore_suspend(dapm, "VIfeed_SDW");
1334 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
1335 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
1336 snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW VI");
1337 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_SDW");
1338
1339 snd_soc_dapm_sync(dapm);
1340
1341 /*
1342 * Send speaker configuration only for WSA8810.
1343 * Default configuration is for WSA8815.
1344 */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301345 pr_debug("%s: Number of aux devices: %d\n",
1346 __func__, rtd->card->num_aux_devs);
1347 if (rtd->card->num_aux_devs &&
1348 !list_empty(&rtd->card->aux_comp_list)) {
1349 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
1350 struct snd_soc_component, list_aux);
1351 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
1352 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301353 msm_sdw_set_spkr_mode(rtd->codec, SPKR_MODE_1);
1354 msm_sdw_set_spkr_gain_offset(rtd->codec,
1355 RX_GAIN_OFFSET_M1P5_DB);
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301356 }
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301357 }
1358 card = rtd->card->snd_card;
1359 if (!codec_root)
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301360 codec_root = snd_info_create_subdir(card->module, "codecs",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301361 card->proc_root);
1362 if (!codec_root) {
1363 pr_debug("%s: Cannot create codecs module entry\n",
1364 __func__);
1365 goto done;
1366 }
1367 pdata->codec_root = codec_root;
1368 msm_sdw_codec_info_create_codec_entry(codec_root, codec);
1369done:
1370 return 0;
1371}
1372
1373static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
1374{
1375 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
1376 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
1377 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1378
1379 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
1380 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
1381}
1382
1383static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
1384 struct snd_pcm_hw_params *params)
1385{
1386 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1387 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1388 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1389 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1390 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
1391 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
1392 int ret;
1393
1394 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
1395 codec_dai->name, codec_dai->id);
1396 ret = snd_soc_dai_get_channel_map(codec_dai,
1397 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
1398 if (ret) {
1399 dev_err(rtd->dev,
1400 "%s: failed to get BTFM codec chan map\n, err:%d\n",
1401 __func__, ret);
1402 goto exit;
1403 }
1404
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301405 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) id %d\n",
1406 __func__, tx_ch_cnt, dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301407
1408 ret = snd_soc_dai_set_channel_map(cpu_dai,
1409 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
1410 if (ret)
1411 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
1412 __func__, ret);
1413
1414exit:
1415 return ret;
1416}
1417
1418static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,
1419 int slots)
1420{
1421 unsigned int slot_mask = 0;
1422 int i, j;
1423 unsigned int *slot_offset;
1424
1425 for (i = TDM_0; i < TDM_PORT_MAX; i++) {
1426 slot_offset = tdm_slot_offset[i];
1427
1428 for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {
1429 if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)
1430 slot_mask |=
1431 (1 << ((slot_offset[j] * 8) / slot_width));
1432 else
1433 break;
1434 }
1435 }
1436
1437 return slot_mask;
1438}
1439
1440static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,
1441 struct snd_pcm_hw_params *params)
1442{
1443 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1444 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1445 int ret = 0;
1446 int channels, slot_width, slots;
1447 unsigned int slot_mask;
1448 unsigned int *slot_offset;
1449 int offset_channels = 0;
1450 int i;
1451
1452 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
1453
1454 channels = params_channels(params);
1455 switch (channels) {
1456 case 1:
1457 case 2:
1458 case 3:
1459 case 4:
1460 case 5:
1461 case 6:
1462 case 7:
1463 case 8:
1464 switch (params_format(params)) {
1465 case SNDRV_PCM_FORMAT_S32_LE:
1466 case SNDRV_PCM_FORMAT_S24_LE:
1467 case SNDRV_PCM_FORMAT_S16_LE:
1468 /*
1469 * up to 8 channels HW config should
1470 * use 32 bit slot width for max support of
1471 * stream bit width. (slot_width > bit_width)
1472 */
1473 slot_width = 32;
1474 break;
1475 default:
1476 pr_err("%s: invalid param format 0x%x\n",
1477 __func__, params_format(params));
1478 return -EINVAL;
1479 }
1480 slots = 8;
1481 slot_mask = tdm_param_set_slot_mask(cpu_dai->id,
1482 slot_width,
1483 slots);
1484 if (!slot_mask) {
1485 pr_err("%s: invalid slot_mask 0x%x\n",
1486 __func__, slot_mask);
1487 return -EINVAL;
1488 }
1489 break;
1490 default:
1491 pr_err("%s: invalid param channels %d\n",
1492 __func__, channels);
1493 return -EINVAL;
1494 }
1495 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
1496 switch (cpu_dai->id) {
1497 case AFE_PORT_ID_PRIMARY_TDM_RX:
1498 case AFE_PORT_ID_SECONDARY_TDM_RX:
1499 case AFE_PORT_ID_TERTIARY_TDM_RX:
1500 case AFE_PORT_ID_QUATERNARY_TDM_RX:
1501 case AFE_PORT_ID_PRIMARY_TDM_TX:
1502 case AFE_PORT_ID_SECONDARY_TDM_TX:
1503 case AFE_PORT_ID_TERTIARY_TDM_TX:
1504 case AFE_PORT_ID_QUATERNARY_TDM_TX:
1505 slot_offset = tdm_slot_offset[TDM_0];
1506 break;
1507 default:
1508 pr_err("%s: dai id 0x%x not supported\n",
1509 __func__, cpu_dai->id);
1510 return -EINVAL;
1511 }
1512
1513 for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
1514 if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
1515 offset_channels++;
1516 else
1517 break;
1518 }
1519
1520 if (offset_channels == 0) {
1521 pr_err("%s: slot offset not supported, offset_channels %d\n",
1522 __func__, offset_channels);
1523 return -EINVAL;
1524 }
1525
1526 if (channels > offset_channels) {
1527 pr_err("%s: channels %d exceed offset_channels %d\n",
1528 __func__, channels, offset_channels);
1529 return -EINVAL;
1530 }
1531
1532 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1533 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
1534 slots, slot_width);
1535 if (ret < 0) {
1536 pr_err("%s: failed to set tdm slot, err:%d\n",
1537 __func__, ret);
1538 goto end;
1539 }
1540
1541 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
1542 channels, slot_offset);
1543 if (ret < 0) {
1544 pr_err("%s: failed to set channel map, err:%d\n",
1545 __func__, ret);
1546 goto end;
1547 }
1548 } else {
1549 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
1550 slots, slot_width);
1551 if (ret < 0) {
1552 pr_err("%s: failed to set tdm slot, err:%d\n",
1553 __func__, ret);
1554 goto end;
1555 }
1556
1557 ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
1558 slot_offset, 0, NULL);
1559 if (ret < 0) {
1560 pr_err("%s: failed to set channel map, err:%d\n",
1561 __func__, ret);
1562 goto end;
1563 }
1564 }
1565end:
1566 return ret;
1567}
1568
1569static int msm_snd_card_late_probe(struct snd_soc_card *card)
1570{
1571 const char *be_dl_name = LPASS_BE_INT0_MI2S_RX;
1572 struct snd_soc_codec *ana_cdc;
1573 struct snd_soc_pcm_runtime *rtd;
1574 int ret = 0;
1575
1576 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
1577 if (!rtd) {
1578 dev_err(card->dev,
1579 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
1580 __func__, be_dl_name);
1581 return -EINVAL;
1582 }
1583
1584 ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
1585 mbhc_cfg_ptr->calibration = def_msm_int_wcd_mbhc_cal();
1586 if (!mbhc_cfg_ptr->calibration)
1587 return -ENOMEM;
1588
1589 ret = msm_anlg_cdc_hs_detect(ana_cdc, mbhc_cfg_ptr);
1590 if (ret) {
1591 dev_err(card->dev,
1592 "%s: msm_anlg_cdc_hs_detect failed\n", __func__);
1593 kfree(mbhc_cfg_ptr->calibration);
1594 }
1595
1596 return ret;
1597}
1598
1599static struct snd_soc_ops msm_tdm_be_ops = {
1600 .hw_params = msm_tdm_snd_hw_params
1601};
1602
1603static struct snd_soc_ops msm_wcn_ops = {
1604 .hw_params = msm_wcn_hw_params,
1605};
1606
1607static struct snd_soc_ops msm_mi2s_be_ops = {
1608 .startup = msm_mi2s_snd_startup,
1609 .shutdown = msm_mi2s_snd_shutdown,
1610};
1611
1612static struct snd_soc_ops msm_aux_pcm_be_ops = {
1613 .startup = msm_aux_pcm_snd_startup,
1614 .shutdown = msm_aux_pcm_snd_shutdown,
1615};
1616
1617static struct snd_soc_ops msm_int_mi2s_be_ops = {
1618 .startup = msm_int_mi2s_snd_startup,
1619 .shutdown = msm_int_mi2s_snd_shutdown,
1620};
1621
1622static struct snd_soc_ops msm_sdw_mi2s_be_ops = {
1623 .startup = msm_sdw_mi2s_snd_startup,
1624 .shutdown = msm_sdw_mi2s_snd_shutdown,
1625};
1626
1627struct snd_soc_dai_link_component dlc_rx1[] = {
1628 {
1629 .of_node = NULL,
1630 .dai_name = "msm_dig_cdc_dai_rx1",
1631 },
1632 {
1633 .of_node = NULL,
1634 .dai_name = "msm_anlg_cdc_i2s_rx1",
1635 },
1636};
1637
1638struct snd_soc_dai_link_component dlc_tx1[] = {
1639 {
1640 .of_node = NULL,
1641 .dai_name = "msm_dig_cdc_dai_tx1",
1642 },
1643 {
1644 .of_node = NULL,
1645 .dai_name = "msm_anlg_cdc_i2s_tx1",
1646 },
1647};
1648
1649struct snd_soc_dai_link_component dlc_tx2[] = {
1650 {
1651 .of_node = NULL,
1652 .dai_name = "msm_dig_cdc_dai_tx2",
1653 },
1654 {
1655 .of_node = NULL,
1656 .dai_name = "msm_anlg_cdc_i2s_tx2",
1657 },
1658};
1659
1660/* Digital audio interface glue - connects codec <---> CPU */
1661static struct snd_soc_dai_link msm_int_dai[] = {
1662 /* FrontEnd DAI Links */
1663 {/* hw:x,0 */
1664 .name = MSM_DAILINK_NAME(Media1),
1665 .stream_name = "MultiMedia1",
1666 .cpu_dai_name = "MultiMedia1",
1667 .platform_name = "msm-pcm-dsp.0",
1668 .dynamic = 1,
1669 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1670 SND_SOC_DPCM_TRIGGER_POST},
1671 .codec_dai_name = "snd-soc-dummy-dai",
1672 .codec_name = "snd-soc-dummy",
1673 .ignore_suspend = 1,
1674 .dpcm_playback = 1,
1675 .dpcm_capture = 1,
1676 /* this dai link has playback support */
1677 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301678 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301679 },
1680 {/* hw:x,1 */
1681 .name = MSM_DAILINK_NAME(Media2),
1682 .stream_name = "MultiMedia2",
1683 .cpu_dai_name = "MultiMedia2",
1684 .platform_name = "msm-pcm-dsp.0",
1685 .dynamic = 1,
1686 .dpcm_playback = 1,
1687 .dpcm_capture = 1,
1688 .codec_dai_name = "snd-soc-dummy-dai",
1689 .codec_name = "snd-soc-dummy",
1690 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1691 SND_SOC_DPCM_TRIGGER_POST},
1692 .ignore_suspend = 1,
1693 /* this dai link has playback support */
1694 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301695 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301696 },
1697 {/* hw:x,2 */
1698 .name = "VoiceMMode1",
1699 .stream_name = "VoiceMMode1",
1700 .cpu_dai_name = "VoiceMMode1",
1701 .platform_name = "msm-pcm-voice",
1702 .dynamic = 1,
1703 .dpcm_capture = 1,
1704 .dpcm_playback = 1,
1705 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1706 SND_SOC_DPCM_TRIGGER_POST},
1707 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1708 .ignore_suspend = 1,
1709 .ignore_pmdown_time = 1,
1710 .codec_dai_name = "snd-soc-dummy-dai",
1711 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301712 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301713 },
1714 {/* hw:x,3 */
1715 .name = "MSM VoIP",
1716 .stream_name = "VoIP",
1717 .cpu_dai_name = "VoIP",
1718 .platform_name = "msm-voip-dsp",
1719 .dynamic = 1,
1720 .dpcm_playback = 1,
1721 .dpcm_capture = 1,
1722 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1723 SND_SOC_DPCM_TRIGGER_POST},
1724 .codec_dai_name = "snd-soc-dummy-dai",
1725 .codec_name = "snd-soc-dummy",
1726 .ignore_suspend = 1,
1727 /* this dai link has playback support */
1728 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301729 .id = MSM_FRONTEND_DAI_VOIP,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301730 },
1731 {/* hw:x,4 */
1732 .name = MSM_DAILINK_NAME(ULL),
1733 .stream_name = "ULL",
1734 .cpu_dai_name = "MultiMedia3",
1735 .platform_name = "msm-pcm-dsp.2",
1736 .dynamic = 1,
1737 .dpcm_playback = 1,
1738 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1739 SND_SOC_DPCM_TRIGGER_POST},
1740 .codec_dai_name = "snd-soc-dummy-dai",
1741 .codec_name = "snd-soc-dummy",
1742 .ignore_suspend = 1,
1743 /* this dai link has playback support */
1744 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301745 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301746 },
1747 /* Hostless PCM purpose */
1748 {/* hw:x,5 */
1749 .name = "INT4 MI2S_RX Hostless",
1750 .stream_name = "INT4 MI2S_RX Hostless",
1751 .cpu_dai_name = "INT4_MI2S_RX_HOSTLESS",
1752 .platform_name = "msm-pcm-hostless",
1753 .dynamic = 1,
1754 .dpcm_playback = 1,
1755 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1756 SND_SOC_DPCM_TRIGGER_POST},
1757 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1758 .ignore_suspend = 1,
1759 /* this dailink has playback support */
1760 .ignore_pmdown_time = 1,
1761 /* This dainlink has MI2S support */
1762 .codec_dai_name = "snd-soc-dummy-dai",
1763 .codec_name = "snd-soc-dummy",
1764 },
1765 {/* hw:x,6 */
1766 .name = "MSM AFE-PCM RX",
1767 .stream_name = "AFE-PROXY RX",
1768 .cpu_dai_name = "msm-dai-q6-dev.241",
1769 .codec_name = "msm-stub-codec.1",
1770 .codec_dai_name = "msm-stub-rx",
1771 .platform_name = "msm-pcm-afe",
1772 .ignore_suspend = 1,
1773 /* this dai link has playback support */
1774 .ignore_pmdown_time = 1,
1775 },
1776 {/* hw:x,7 */
1777 .name = "MSM AFE-PCM TX",
1778 .stream_name = "AFE-PROXY TX",
1779 .cpu_dai_name = "msm-dai-q6-dev.240",
1780 .codec_name = "msm-stub-codec.1",
1781 .codec_dai_name = "msm-stub-tx",
1782 .platform_name = "msm-pcm-afe",
1783 .ignore_suspend = 1,
1784 },
1785 {/* hw:x,8 */
1786 .name = MSM_DAILINK_NAME(Compress1),
1787 .stream_name = "Compress1",
1788 .cpu_dai_name = "MultiMedia4",
1789 .platform_name = "msm-compress-dsp",
1790 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
1791 .dynamic = 1,
1792 .dpcm_capture = 1,
1793 .dpcm_playback = 1,
1794 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1795 SND_SOC_DPCM_TRIGGER_POST},
1796 .codec_dai_name = "snd-soc-dummy-dai",
1797 .codec_name = "snd-soc-dummy",
1798 .ignore_suspend = 1,
1799 .ignore_pmdown_time = 1,
1800 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301801 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301802 },
1803 {/* hw:x,9*/
1804 .name = "AUXPCM Hostless",
1805 .stream_name = "AUXPCM Hostless",
1806 .cpu_dai_name = "AUXPCM_HOSTLESS",
1807 .platform_name = "msm-pcm-hostless",
1808 .dynamic = 1,
1809 .dpcm_capture = 1,
1810 .dpcm_playback = 1,
1811 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1812 SND_SOC_DPCM_TRIGGER_POST},
1813 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1814 .ignore_suspend = 1,
1815 /* this dai link has playback support */
1816 .ignore_pmdown_time = 1,
1817 .codec_dai_name = "snd-soc-dummy-dai",
1818 .codec_name = "snd-soc-dummy",
1819 },
1820 {/* hw:x,10 */
1821 .name = "SLIMBUS_1 Hostless",
1822 .stream_name = "SLIMBUS_1 Hostless",
1823 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
1824 .platform_name = "msm-pcm-hostless",
1825 .dynamic = 1,
1826 .dpcm_capture = 1,
1827 .dpcm_playback = 1,
1828 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1829 SND_SOC_DPCM_TRIGGER_POST},
1830 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1831 .ignore_suspend = 1,
1832 .ignore_pmdown_time = 1, /* dai link has playback support */
1833 .codec_dai_name = "snd-soc-dummy-dai",
1834 .codec_name = "snd-soc-dummy",
1835 },
1836 {/* hw:x,11 */
1837 .name = "INT3 MI2S_TX Hostless",
1838 .stream_name = "INT3 MI2S_TX Hostless",
1839 .cpu_dai_name = "INT3_MI2S_TX_HOSTLESS",
1840 .platform_name = "msm-pcm-hostless",
1841 .dynamic = 1,
1842 .dpcm_capture = 1,
1843 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1844 SND_SOC_DPCM_TRIGGER_POST},
1845 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1846 .ignore_suspend = 1,
1847 .ignore_pmdown_time = 1,
1848 .codec_dai_name = "snd-soc-dummy-dai",
1849 .codec_name = "snd-soc-dummy",
1850 },
1851 {/* hw:x,12 */
1852 .name = "SLIMBUS_7 Hostless",
1853 .stream_name = "SLIMBUS_7 Hostless",
1854 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
1855 .platform_name = "msm-pcm-hostless",
1856 .dynamic = 1,
1857 .dpcm_capture = 1,
1858 .dpcm_playback = 1,
1859 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1860 SND_SOC_DPCM_TRIGGER_POST},
1861 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1862 .ignore_suspend = 1,
1863 .ignore_pmdown_time = 1, /* dai link has playback support */
1864 .codec_dai_name = "snd-soc-dummy-dai",
1865 .codec_name = "snd-soc-dummy",
1866 },
1867 {/* hw:x,13 */
1868 .name = MSM_DAILINK_NAME(LowLatency),
1869 .stream_name = "MultiMedia5",
1870 .cpu_dai_name = "MultiMedia5",
1871 .platform_name = "msm-pcm-dsp.1",
1872 .dynamic = 1,
1873 .dpcm_capture = 1,
1874 .dpcm_playback = 1,
1875 .codec_dai_name = "snd-soc-dummy-dai",
1876 .codec_name = "snd-soc-dummy",
1877 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1878 SND_SOC_DPCM_TRIGGER_POST},
1879 .ignore_suspend = 1,
1880 /* this dai link has playback support */
1881 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301882 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301883 },
1884 /* LSM FE */
1885 {/* hw:x,14 */
1886 .name = "Listen 1 Audio Service",
1887 .stream_name = "Listen 1 Audio Service",
1888 .cpu_dai_name = "LSM1",
1889 .platform_name = "msm-lsm-client",
1890 .dynamic = 1,
1891 .dpcm_capture = 1,
1892 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1893 SND_SOC_DPCM_TRIGGER_POST },
1894 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1895 .ignore_suspend = 1,
1896 .ignore_pmdown_time = 1,
1897 .codec_dai_name = "snd-soc-dummy-dai",
1898 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301899 .id = MSM_FRONTEND_DAI_LSM1,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301900 },
1901 {/* hw:x,15 */
1902 .name = MSM_DAILINK_NAME(Compress2),
1903 .stream_name = "Compress2",
1904 .cpu_dai_name = "MultiMedia7",
1905 .platform_name = "msm-compress-dsp",
1906 .dynamic = 1,
1907 .dpcm_capture = 1,
1908 .dpcm_playback = 1,
1909 .codec_dai_name = "snd-soc-dummy-dai",
1910 .codec_name = "snd-soc-dummy",
1911 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1912 SND_SOC_DPCM_TRIGGER_POST},
1913 .ignore_suspend = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301914 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301915 },
1916 {/* hw:x,16 */
1917 .name = MSM_DAILINK_NAME(Compress3),
1918 .stream_name = "Compress3",
1919 .cpu_dai_name = "MultiMedia10",
1920 .platform_name = "msm-compress-dsp",
1921 .dynamic = 1,
1922 .dpcm_capture = 1,
1923 .dpcm_playback = 1,
1924 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1925 SND_SOC_DPCM_TRIGGER_POST},
1926 .codec_dai_name = "snd-soc-dummy-dai",
1927 .codec_name = "snd-soc-dummy",
1928 .ignore_suspend = 1,
1929 .ignore_pmdown_time = 1,
1930 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301931 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301932 },
1933 {/* hw:x,17 */
1934 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
1935 .stream_name = "MM_NOIRQ",
1936 .cpu_dai_name = "MultiMedia8",
1937 .platform_name = "msm-pcm-dsp-noirq",
1938 .dynamic = 1,
1939 .dpcm_capture = 1,
1940 .dpcm_playback = 1,
1941 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1942 SND_SOC_DPCM_TRIGGER_POST},
1943 .codec_dai_name = "snd-soc-dummy-dai",
1944 .codec_name = "snd-soc-dummy",
1945 .ignore_suspend = 1,
1946 .ignore_pmdown_time = 1,
1947 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301948 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301949 },
1950 {/* hw:x,18 */
1951 .name = "HDMI_RX_HOSTLESS",
1952 .stream_name = "HDMI_RX_HOSTLESS",
1953 .cpu_dai_name = "HDMI_HOSTLESS",
1954 .platform_name = "msm-pcm-hostless",
1955 .dynamic = 1,
1956 .dpcm_playback = 1,
1957 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1958 SND_SOC_DPCM_TRIGGER_POST},
1959 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1960 .ignore_suspend = 1,
1961 .ignore_pmdown_time = 1,
1962 .codec_dai_name = "snd-soc-dummy-dai",
1963 .codec_name = "snd-soc-dummy",
1964 },
1965 {/* hw:x,19 */
1966 .name = "VoiceMMode2",
1967 .stream_name = "VoiceMMode2",
1968 .cpu_dai_name = "VoiceMMode2",
1969 .platform_name = "msm-pcm-voice",
1970 .dynamic = 1,
1971 .dpcm_capture = 1,
1972 .dpcm_playback = 1,
1973 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1974 SND_SOC_DPCM_TRIGGER_POST},
1975 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1976 .ignore_suspend = 1,
1977 .ignore_pmdown_time = 1,
1978 .codec_dai_name = "snd-soc-dummy-dai",
1979 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301980 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301981 },
1982 {/* hw:x,20 */
1983 .name = "Listen 2 Audio Service",
1984 .stream_name = "Listen 2 Audio Service",
1985 .cpu_dai_name = "LSM2",
1986 .platform_name = "msm-lsm-client",
1987 .dynamic = 1,
1988 .dpcm_capture = 1,
1989 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1990 SND_SOC_DPCM_TRIGGER_POST },
1991 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1992 .ignore_suspend = 1,
1993 .ignore_pmdown_time = 1,
1994 .codec_dai_name = "snd-soc-dummy-dai",
1995 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301996 .id = MSM_FRONTEND_DAI_LSM2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301997 },
1998 {/* hw:x,21 */
1999 .name = "Listen 3 Audio Service",
2000 .stream_name = "Listen 3 Audio Service",
2001 .cpu_dai_name = "LSM3",
2002 .platform_name = "msm-lsm-client",
2003 .dynamic = 1,
2004 .dpcm_capture = 1,
2005 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2006 SND_SOC_DPCM_TRIGGER_POST },
2007 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2008 .ignore_suspend = 1,
2009 .ignore_pmdown_time = 1,
2010 .codec_dai_name = "snd-soc-dummy-dai",
2011 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302012 .id = MSM_FRONTEND_DAI_LSM3,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302013 },
2014 {/* hw:x,22 */
2015 .name = "Listen 4 Audio Service",
2016 .stream_name = "Listen 4 Audio Service",
2017 .cpu_dai_name = "LSM4",
2018 .platform_name = "msm-lsm-client",
2019 .dynamic = 1,
2020 .dpcm_capture = 1,
2021 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2022 SND_SOC_DPCM_TRIGGER_POST },
2023 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2024 .ignore_suspend = 1,
2025 .ignore_pmdown_time = 1,
2026 .codec_dai_name = "snd-soc-dummy-dai",
2027 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302028 .id = MSM_FRONTEND_DAI_LSM4,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302029 },
2030 {/* hw:x,23 */
2031 .name = "Listen 5 Audio Service",
2032 .stream_name = "Listen 5 Audio Service",
2033 .cpu_dai_name = "LSM5",
2034 .platform_name = "msm-lsm-client",
2035 .dynamic = 1,
2036 .dpcm_capture = 1,
2037 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2038 SND_SOC_DPCM_TRIGGER_POST },
2039 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2040 .ignore_suspend = 1,
2041 .ignore_pmdown_time = 1,
2042 .codec_dai_name = "snd-soc-dummy-dai",
2043 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302044 .id = MSM_FRONTEND_DAI_LSM5,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302045 },
2046 {/* hw:x,24 */
2047 .name = "Listen 6 Audio Service",
2048 .stream_name = "Listen 6 Audio Service",
2049 .cpu_dai_name = "LSM6",
2050 .platform_name = "msm-lsm-client",
2051 .dynamic = 1,
2052 .dpcm_capture = 1,
2053 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2054 SND_SOC_DPCM_TRIGGER_POST },
2055 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2056 .ignore_suspend = 1,
2057 .ignore_pmdown_time = 1,
2058 .codec_dai_name = "snd-soc-dummy-dai",
2059 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302060 .id = MSM_FRONTEND_DAI_LSM6
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302061 },
2062 {/* hw:x,25 */
2063 .name = "Listen 7 Audio Service",
2064 .stream_name = "Listen 7 Audio Service",
2065 .cpu_dai_name = "LSM7",
2066 .platform_name = "msm-lsm-client",
2067 .dynamic = 1,
2068 .dpcm_capture = 1,
2069 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2070 SND_SOC_DPCM_TRIGGER_POST },
2071 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2072 .ignore_suspend = 1,
2073 .ignore_pmdown_time = 1,
2074 .codec_dai_name = "snd-soc-dummy-dai",
2075 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302076 .id = MSM_FRONTEND_DAI_LSM7,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302077 },
2078 {/* hw:x,26 */
2079 .name = "Listen 8 Audio Service",
2080 .stream_name = "Listen 8 Audio Service",
2081 .cpu_dai_name = "LSM8",
2082 .platform_name = "msm-lsm-client",
2083 .dynamic = 1,
2084 .dpcm_capture = 1,
2085 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2086 SND_SOC_DPCM_TRIGGER_POST },
2087 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2088 .ignore_suspend = 1,
2089 .ignore_pmdown_time = 1,
2090 .codec_dai_name = "snd-soc-dummy-dai",
2091 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302092 .id = MSM_FRONTEND_DAI_LSM8,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302093 },
2094 {/* hw:x,27 */
2095 .name = MSM_DAILINK_NAME(Media9),
2096 .stream_name = "MultiMedia9",
2097 .cpu_dai_name = "MultiMedia9",
2098 .platform_name = "msm-pcm-dsp.0",
2099 .dynamic = 1,
2100 .dpcm_capture = 1,
2101 .dpcm_playback = 1,
2102 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2103 SND_SOC_DPCM_TRIGGER_POST},
2104 .codec_dai_name = "snd-soc-dummy-dai",
2105 .codec_name = "snd-soc-dummy",
2106 .ignore_suspend = 1,
2107 .ignore_pmdown_time = 1,
2108 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302109 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302110 },
2111 {/* hw:x,28 */
2112 .name = MSM_DAILINK_NAME(Compress4),
2113 .stream_name = "Compress4",
2114 .cpu_dai_name = "MultiMedia11",
2115 .platform_name = "msm-compress-dsp",
2116 .dynamic = 1,
2117 .dpcm_capture = 1,
2118 .dpcm_playback = 1,
2119 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2120 SND_SOC_DPCM_TRIGGER_POST},
2121 .codec_dai_name = "snd-soc-dummy-dai",
2122 .codec_name = "snd-soc-dummy",
2123 .ignore_suspend = 1,
2124 .ignore_pmdown_time = 1,
2125 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302126 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302127 },
2128 {/* hw:x,29 */
2129 .name = MSM_DAILINK_NAME(Compress5),
2130 .stream_name = "Compress5",
2131 .cpu_dai_name = "MultiMedia12",
2132 .platform_name = "msm-compress-dsp",
2133 .dynamic = 1,
2134 .dpcm_capture = 1,
2135 .dpcm_playback = 1,
2136 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2137 SND_SOC_DPCM_TRIGGER_POST},
2138 .codec_dai_name = "snd-soc-dummy-dai",
2139 .codec_name = "snd-soc-dummy",
2140 .ignore_suspend = 1,
2141 .ignore_pmdown_time = 1,
2142 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302143 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302144 },
2145 {/* hw:x,30 */
2146 .name = MSM_DAILINK_NAME(Compress6),
2147 .stream_name = "Compress6",
2148 .cpu_dai_name = "MultiMedia13",
2149 .platform_name = "msm-compress-dsp",
2150 .dynamic = 1,
2151 .dpcm_capture = 1,
2152 .dpcm_playback = 1,
2153 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2154 SND_SOC_DPCM_TRIGGER_POST},
2155 .codec_dai_name = "snd-soc-dummy-dai",
2156 .codec_name = "snd-soc-dummy",
2157 .ignore_suspend = 1,
2158 .ignore_pmdown_time = 1,
2159 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302160 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302161 },
2162 {/* hw:x,31 */
2163 .name = MSM_DAILINK_NAME(Compress7),
2164 .stream_name = "Compress7",
2165 .cpu_dai_name = "MultiMedia14",
2166 .platform_name = "msm-compress-dsp",
2167 .dynamic = 1,
2168 .dpcm_capture = 1,
2169 .dpcm_playback = 1,
2170 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2171 SND_SOC_DPCM_TRIGGER_POST},
2172 .codec_dai_name = "snd-soc-dummy-dai",
2173 .codec_name = "snd-soc-dummy",
2174 .ignore_suspend = 1,
2175 .ignore_pmdown_time = 1,
2176 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302177 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302178 },
2179 {/* hw:x,32 */
2180 .name = MSM_DAILINK_NAME(Compress8),
2181 .stream_name = "Compress8",
2182 .cpu_dai_name = "MultiMedia15",
2183 .platform_name = "msm-compress-dsp",
2184 .dynamic = 1,
2185 .dpcm_capture = 1,
2186 .dpcm_playback = 1,
2187 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2188 SND_SOC_DPCM_TRIGGER_POST},
2189 .codec_dai_name = "snd-soc-dummy-dai",
2190 .codec_name = "snd-soc-dummy",
2191 .ignore_suspend = 1,
2192 .ignore_pmdown_time = 1,
2193 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302194 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302195 },
2196 {/* hw:x,33 */
2197 .name = MSM_DAILINK_NAME(Compress9),
2198 .stream_name = "Compress9",
2199 .cpu_dai_name = "MultiMedia16",
2200 .platform_name = "msm-compress-dsp",
2201 .dynamic = 1,
2202 .dpcm_capture = 1,
2203 .dpcm_playback = 1,
2204 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2205 SND_SOC_DPCM_TRIGGER_POST},
2206 .codec_dai_name = "snd-soc-dummy-dai",
2207 .codec_name = "snd-soc-dummy",
2208 .ignore_suspend = 1,
2209 .ignore_pmdown_time = 1,
2210 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302211 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302212 },
2213 {/* hw:x,34 */
2214 .name = "SLIMBUS_8 Hostless",
2215 .stream_name = "SLIMBUS8_HOSTLESS Capture",
2216 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
2217 .platform_name = "msm-pcm-hostless",
2218 .dynamic = 1,
2219 .dpcm_capture = 1,
2220 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2221 SND_SOC_DPCM_TRIGGER_POST},
2222 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2223 .ignore_suspend = 1,
2224 .ignore_pmdown_time = 1,
2225 .codec_dai_name = "snd-soc-dummy-dai",
2226 .codec_name = "snd-soc-dummy",
2227 },
2228 {/* hw:x,35 */
2229 .name = "Primary MI2S_RX Hostless",
2230 .stream_name = "Primary MI2S_RX Hostless",
2231 .cpu_dai_name = "PRI_MI2S_RX_HOSTLESS",
2232 .platform_name = "msm-pcm-hostless",
2233 .dynamic = 1,
2234 .dpcm_playback = 1,
2235 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2236 SND_SOC_DPCM_TRIGGER_POST},
2237 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2238 .ignore_suspend = 1,
2239 /* this dailink has playback support */
2240 .ignore_pmdown_time = 1,
2241 /* This dainlink has MI2S support */
2242 .codec_dai_name = "snd-soc-dummy-dai",
2243 .codec_name = "snd-soc-dummy",
2244 },
2245 {/* hw:x,36 */
2246 .name = "Secondary MI2S_RX Hostless",
2247 .stream_name = "Secondary MI2S_RX Hostless",
2248 .cpu_dai_name = "SEC_MI2S_RX_HOSTLESS",
2249 .platform_name = "msm-pcm-hostless",
2250 .dynamic = 1,
2251 .dpcm_playback = 1,
2252 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2253 SND_SOC_DPCM_TRIGGER_POST},
2254 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2255 .ignore_suspend = 1,
2256 /* this dailink has playback support */
2257 .ignore_pmdown_time = 1,
2258 /* This dainlink has MI2S support */
2259 .codec_dai_name = "snd-soc-dummy-dai",
2260 .codec_name = "snd-soc-dummy",
2261 },
2262 {/* hw:x,37 */
2263 .name = "Tertiary MI2S_RX Hostless",
2264 .stream_name = "Tertiary MI2S_RX Hostless",
2265 .cpu_dai_name = "TERT_MI2S_RX_HOSTLESS",
2266 .platform_name = "msm-pcm-hostless",
2267 .dynamic = 1,
2268 .dpcm_playback = 1,
2269 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2270 SND_SOC_DPCM_TRIGGER_POST},
2271 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2272 .ignore_suspend = 1,
2273 /* this dailink has playback support */
2274 .ignore_pmdown_time = 1,
2275 /* This dainlink has MI2S support */
2276 .codec_dai_name = "snd-soc-dummy-dai",
2277 .codec_name = "snd-soc-dummy",
2278 },
2279 {/* hw:x,38 */
2280 .name = "INT0 MI2S_RX Hostless",
2281 .stream_name = "INT0 MI2S_RX Hostless",
2282 .cpu_dai_name = "INT0_MI2S_RX_HOSTLESS",
2283 .platform_name = "msm-pcm-hostless",
2284 .dynamic = 1,
2285 .dpcm_playback = 1,
2286 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2287 SND_SOC_DPCM_TRIGGER_POST},
2288 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2289 .ignore_suspend = 1,
2290 /* this dailink has playback support */
2291 .ignore_pmdown_time = 1,
2292 /* This dainlink has MI2S support */
2293 .codec_dai_name = "snd-soc-dummy-dai",
2294 .codec_name = "snd-soc-dummy",
2295 },
2296 {/* hw:x,39 */
2297 .name = "SDM660 HFP TX",
2298 .stream_name = "MultiMedia6",
2299 .cpu_dai_name = "MultiMedia6",
2300 .platform_name = "msm-pcm-loopback",
2301 .dynamic = 1,
2302 .dpcm_playback = 1,
2303 .dpcm_capture = 1,
2304 .codec_dai_name = "snd-soc-dummy-dai",
2305 .codec_name = "snd-soc-dummy",
2306 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2307 SND_SOC_DPCM_TRIGGER_POST},
2308 .ignore_suspend = 1,
2309 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2310 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302311 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302312 },
2313};
2314
2315
2316static struct snd_soc_dai_link msm_int_wsa_dai[] = {
2317 {/* hw:x,40 */
2318 .name = LPASS_BE_INT5_MI2S_TX,
2319 .stream_name = "INT5_mi2s Capture",
2320 .cpu_dai_name = "msm-dai-q6-mi2s.12",
2321 .platform_name = "msm-pcm-hostless",
2322 .codec_name = "msm_sdw_codec",
2323 .codec_dai_name = "msm_sdw_vifeedback",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302324 .id = MSM_BACKEND_DAI_INT5_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302325 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2326 .ops = &msm_sdw_mi2s_be_ops,
2327 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2328 .ignore_suspend = 1,
2329 .dpcm_capture = 1,
2330 .ignore_pmdown_time = 1,
2331 },
2332};
2333
2334static struct snd_soc_dai_link msm_int_be_dai[] = {
2335 /* Backend I2S DAI Links */
2336 {
2337 .name = LPASS_BE_INT0_MI2S_RX,
2338 .stream_name = "INT0 MI2S Playback",
2339 .cpu_dai_name = "msm-dai-q6-mi2s.7",
2340 .platform_name = "msm-pcm-routing",
2341 .codecs = dlc_rx1,
2342 .num_codecs = CODECS_MAX,
2343 .no_pcm = 1,
2344 .dpcm_playback = 1,
2345 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2346 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302347 .id = MSM_BACKEND_DAI_INT0_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302348 .init = &msm_audrx_init,
2349 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2350 .ops = &msm_int_mi2s_be_ops,
2351 .ignore_suspend = 1,
2352 },
2353 {
2354 .name = LPASS_BE_INT3_MI2S_TX,
2355 .stream_name = "INT3 MI2S Capture",
2356 .cpu_dai_name = "msm-dai-q6-mi2s.10",
2357 .platform_name = "msm-pcm-routing",
2358 .codecs = dlc_tx1,
2359 .num_codecs = CODECS_MAX,
2360 .no_pcm = 1,
2361 .dpcm_capture = 1,
2362 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2363 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302364 .id = MSM_BACKEND_DAI_INT3_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302365 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2366 .ops = &msm_int_mi2s_be_ops,
2367 .ignore_suspend = 1,
2368 },
2369 {
2370 .name = LPASS_BE_INT2_MI2S_TX,
2371 .stream_name = "INT2 MI2S Capture",
2372 .cpu_dai_name = "msm-dai-q6-mi2s.9",
2373 .platform_name = "msm-pcm-routing",
2374 .codecs = dlc_tx2,
2375 .num_codecs = CODECS_MAX,
2376 .no_pcm = 1,
2377 .dpcm_capture = 1,
2378 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2379 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302380 .id = MSM_BACKEND_DAI_INT2_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302381 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2382 .ops = &msm_int_mi2s_be_ops,
2383 .ignore_suspend = 1,
2384 },
2385 {
2386 .name = LPASS_BE_AFE_PCM_RX,
2387 .stream_name = "AFE Playback",
2388 .cpu_dai_name = "msm-dai-q6-dev.224",
2389 .platform_name = "msm-pcm-routing",
2390 .codec_name = "msm-stub-codec.1",
2391 .codec_dai_name = "msm-stub-rx",
2392 .no_pcm = 1,
2393 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302394 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302395 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2396 /* this dainlink has playback support */
2397 .ignore_pmdown_time = 1,
2398 .ignore_suspend = 1,
2399 },
2400 {
2401 .name = LPASS_BE_AFE_PCM_TX,
2402 .stream_name = "AFE Capture",
2403 .cpu_dai_name = "msm-dai-q6-dev.225",
2404 .platform_name = "msm-pcm-routing",
2405 .codec_name = "msm-stub-codec.1",
2406 .codec_dai_name = "msm-stub-tx",
2407 .no_pcm = 1,
2408 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302409 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302410 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2411 .ignore_suspend = 1,
2412 },
2413 /* Incall Record Uplink BACK END DAI Link */
2414 {
2415 .name = LPASS_BE_INCALL_RECORD_TX,
2416 .stream_name = "Voice Uplink Capture",
2417 .cpu_dai_name = "msm-dai-q6-dev.32772",
2418 .platform_name = "msm-pcm-routing",
2419 .codec_name = "msm-stub-codec.1",
2420 .codec_dai_name = "msm-stub-tx",
2421 .no_pcm = 1,
2422 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302423 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302424 .be_hw_params_fixup = msm_be_hw_params_fixup,
2425 .ignore_suspend = 1,
2426 },
2427 /* Incall Record Downlink BACK END DAI Link */
2428 {
2429 .name = LPASS_BE_INCALL_RECORD_RX,
2430 .stream_name = "Voice Downlink Capture",
2431 .cpu_dai_name = "msm-dai-q6-dev.32771",
2432 .platform_name = "msm-pcm-routing",
2433 .codec_name = "msm-stub-codec.1",
2434 .codec_dai_name = "msm-stub-tx",
2435 .no_pcm = 1,
2436 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302437 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302438 .be_hw_params_fixup = msm_be_hw_params_fixup,
2439 .ignore_suspend = 1,
2440 },
2441 /* Incall Music BACK END DAI Link */
2442 {
2443 .name = LPASS_BE_VOICE_PLAYBACK_TX,
2444 .stream_name = "Voice Farend Playback",
2445 .cpu_dai_name = "msm-dai-q6-dev.32773",
2446 .platform_name = "msm-pcm-routing",
2447 .codec_name = "msm-stub-codec.1",
2448 .codec_dai_name = "msm-stub-rx",
2449 .no_pcm = 1,
2450 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302451 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302452 .be_hw_params_fixup = msm_be_hw_params_fixup,
2453 .ignore_suspend = 1,
2454 },
2455 /* Incall Music 2 BACK END DAI Link */
2456 {
2457 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
2458 .stream_name = "Voice2 Farend Playback",
2459 .cpu_dai_name = "msm-dai-q6-dev.32770",
2460 .platform_name = "msm-pcm-routing",
2461 .codec_name = "msm-stub-codec.1",
2462 .codec_dai_name = "msm-stub-rx",
2463 .no_pcm = 1,
2464 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302465 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302466 .be_hw_params_fixup = msm_be_hw_params_fixup,
2467 .ignore_suspend = 1,
2468 },
2469 {
2470 .name = LPASS_BE_USB_AUDIO_RX,
2471 .stream_name = "USB Audio Playback",
2472 .cpu_dai_name = "msm-dai-q6-dev.28672",
2473 .platform_name = "msm-pcm-routing",
2474 .codec_name = "msm-stub-codec.1",
2475 .codec_dai_name = "msm-stub-rx",
2476 .no_pcm = 1,
2477 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302478 .id = MSM_BACKEND_DAI_USB_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302479 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2480 .ignore_pmdown_time = 1,
2481 .ignore_suspend = 1,
2482 },
2483 {
2484 .name = LPASS_BE_USB_AUDIO_TX,
2485 .stream_name = "USB Audio Capture",
2486 .cpu_dai_name = "msm-dai-q6-dev.28673",
2487 .platform_name = "msm-pcm-routing",
2488 .codec_name = "msm-stub-codec.1",
2489 .codec_dai_name = "msm-stub-tx",
2490 .no_pcm = 1,
2491 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302492 .id = MSM_BACKEND_DAI_USB_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302493 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2494 .ignore_suspend = 1,
2495 },
2496 {
2497 .name = LPASS_BE_PRI_TDM_RX_0,
2498 .stream_name = "Primary TDM0 Playback",
2499 .cpu_dai_name = "msm-dai-q6-tdm.36864",
2500 .platform_name = "msm-pcm-routing",
2501 .codec_name = "msm-stub-codec.1",
2502 .codec_dai_name = "msm-stub-rx",
2503 .no_pcm = 1,
2504 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302505 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302506 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2507 .ops = &msm_tdm_be_ops,
2508 .ignore_suspend = 1,
2509 },
2510 {
2511 .name = LPASS_BE_PRI_TDM_TX_0,
2512 .stream_name = "Primary TDM0 Capture",
2513 .cpu_dai_name = "msm-dai-q6-tdm.36865",
2514 .platform_name = "msm-pcm-routing",
2515 .codec_name = "msm-stub-codec.1",
2516 .codec_dai_name = "msm-stub-tx",
2517 .no_pcm = 1,
2518 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302519 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302520 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2521 .ops = &msm_tdm_be_ops,
2522 .ignore_suspend = 1,
2523 },
2524 {
2525 .name = LPASS_BE_SEC_TDM_RX_0,
2526 .stream_name = "Secondary TDM0 Playback",
2527 .cpu_dai_name = "msm-dai-q6-tdm.36880",
2528 .platform_name = "msm-pcm-routing",
2529 .codec_name = "msm-stub-codec.1",
2530 .codec_dai_name = "msm-stub-rx",
2531 .no_pcm = 1,
2532 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302533 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302534 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2535 .ops = &msm_tdm_be_ops,
2536 .ignore_suspend = 1,
2537 },
2538 {
2539 .name = LPASS_BE_SEC_TDM_TX_0,
2540 .stream_name = "Secondary TDM0 Capture",
2541 .cpu_dai_name = "msm-dai-q6-tdm.36881",
2542 .platform_name = "msm-pcm-routing",
2543 .codec_name = "msm-stub-codec.1",
2544 .codec_dai_name = "msm-stub-tx",
2545 .no_pcm = 1,
2546 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302547 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302548 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2549 .ops = &msm_tdm_be_ops,
2550 .ignore_suspend = 1,
2551 },
2552 {
2553 .name = LPASS_BE_TERT_TDM_RX_0,
2554 .stream_name = "Tertiary TDM0 Playback",
2555 .cpu_dai_name = "msm-dai-q6-tdm.36896",
2556 .platform_name = "msm-pcm-routing",
2557 .codec_name = "msm-stub-codec.1",
2558 .codec_dai_name = "msm-stub-rx",
2559 .no_pcm = 1,
2560 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302561 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302562 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2563 .ops = &msm_tdm_be_ops,
2564 .ignore_suspend = 1,
2565 },
2566 {
2567 .name = LPASS_BE_TERT_TDM_TX_0,
2568 .stream_name = "Tertiary TDM0 Capture",
2569 .cpu_dai_name = "msm-dai-q6-tdm.36897",
2570 .platform_name = "msm-pcm-routing",
2571 .codec_name = "msm-stub-codec.1",
2572 .codec_dai_name = "msm-stub-tx",
2573 .no_pcm = 1,
2574 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302575 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302576 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2577 .ops = &msm_tdm_be_ops,
2578 .ignore_suspend = 1,
2579 },
2580 {
2581 .name = LPASS_BE_QUAT_TDM_RX_0,
2582 .stream_name = "Quaternary TDM0 Playback",
2583 .cpu_dai_name = "msm-dai-q6-tdm.36912",
2584 .platform_name = "msm-pcm-routing",
2585 .codec_name = "msm-stub-codec.1",
2586 .codec_dai_name = "msm-stub-rx",
2587 .no_pcm = 1,
2588 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302589 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302590 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2591 .ops = &msm_tdm_be_ops,
2592 .ignore_suspend = 1,
2593 },
2594 {
2595 .name = LPASS_BE_QUAT_TDM_TX_0,
2596 .stream_name = "Quaternary TDM0 Capture",
2597 .cpu_dai_name = "msm-dai-q6-tdm.36913",
2598 .platform_name = "msm-pcm-routing",
2599 .codec_name = "msm-stub-codec.1",
2600 .codec_dai_name = "msm-stub-tx",
2601 .no_pcm = 1,
2602 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302603 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302604 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2605 .ops = &msm_tdm_be_ops,
2606 .ignore_suspend = 1,
2607 },
2608};
2609
2610static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
2611 {
2612 .name = LPASS_BE_PRI_MI2S_RX,
2613 .stream_name = "Primary MI2S Playback",
2614 .cpu_dai_name = "msm-dai-q6-mi2s.0",
2615 .platform_name = "msm-pcm-routing",
2616 .codec_name = "msm-stub-codec.1",
2617 .codec_dai_name = "msm-stub-rx",
2618 .no_pcm = 1,
2619 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302620 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302621 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2622 .ops = &msm_mi2s_be_ops,
2623 .ignore_suspend = 1,
2624 .ignore_pmdown_time = 1,
2625 },
2626 {
2627 .name = LPASS_BE_PRI_MI2S_TX,
2628 .stream_name = "Primary MI2S Capture",
2629 .cpu_dai_name = "msm-dai-q6-mi2s.0",
2630 .platform_name = "msm-pcm-routing",
2631 .codec_name = "msm-stub-codec.1",
2632 .codec_dai_name = "msm-stub-tx",
2633 .no_pcm = 1,
2634 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302635 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302636 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2637 .ops = &msm_mi2s_be_ops,
2638 .ignore_suspend = 1,
2639 },
2640 {
2641 .name = LPASS_BE_SEC_MI2S_RX,
2642 .stream_name = "Secondary MI2S Playback",
2643 .cpu_dai_name = "msm-dai-q6-mi2s.1",
2644 .platform_name = "msm-pcm-routing",
2645 .codec_name = "msm-stub-codec.1",
2646 .codec_dai_name = "msm-stub-rx",
2647 .no_pcm = 1,
2648 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302649 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302650 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2651 .ops = &msm_mi2s_be_ops,
2652 .ignore_suspend = 1,
2653 .ignore_pmdown_time = 1,
2654 },
2655 {
2656 .name = LPASS_BE_SEC_MI2S_TX,
2657 .stream_name = "Secondary MI2S Capture",
2658 .cpu_dai_name = "msm-dai-q6-mi2s.1",
2659 .platform_name = "msm-pcm-routing",
2660 .codec_name = "msm-stub-codec.1",
2661 .codec_dai_name = "msm-stub-tx",
2662 .no_pcm = 1,
2663 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302664 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302665 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2666 .ops = &msm_mi2s_be_ops,
2667 .ignore_suspend = 1,
2668 },
2669 {
2670 .name = LPASS_BE_TERT_MI2S_RX,
2671 .stream_name = "Tertiary MI2S Playback",
2672 .cpu_dai_name = "msm-dai-q6-mi2s.2",
2673 .platform_name = "msm-pcm-routing",
2674 .codec_name = "msm-stub-codec.1",
2675 .codec_dai_name = "msm-stub-rx",
2676 .no_pcm = 1,
2677 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302678 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302679 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2680 .ops = &msm_mi2s_be_ops,
2681 .ignore_suspend = 1,
2682 .ignore_pmdown_time = 1,
2683 },
2684 {
2685 .name = LPASS_BE_TERT_MI2S_TX,
2686 .stream_name = "Tertiary MI2S Capture",
2687 .cpu_dai_name = "msm-dai-q6-mi2s.2",
2688 .platform_name = "msm-pcm-routing",
2689 .codec_name = "msm-stub-codec.1",
2690 .codec_dai_name = "msm-stub-tx",
2691 .no_pcm = 1,
2692 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302693 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302694 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2695 .ops = &msm_mi2s_be_ops,
2696 .ignore_suspend = 1,
2697 },
2698 {
2699 .name = LPASS_BE_QUAT_MI2S_RX,
2700 .stream_name = "Quaternary MI2S Playback",
2701 .cpu_dai_name = "msm-dai-q6-mi2s.3",
2702 .platform_name = "msm-pcm-routing",
2703 .codec_name = "msm-stub-codec.1",
2704 .codec_dai_name = "msm-stub-rx",
2705 .no_pcm = 1,
2706 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302707 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302708 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2709 .ops = &msm_mi2s_be_ops,
2710 .ignore_suspend = 1,
2711 .ignore_pmdown_time = 1,
2712 },
2713 {
2714 .name = LPASS_BE_QUAT_MI2S_TX,
2715 .stream_name = "Quaternary MI2S Capture",
2716 .cpu_dai_name = "msm-dai-q6-mi2s.3",
2717 .platform_name = "msm-pcm-routing",
2718 .codec_name = "msm-stub-codec.1",
2719 .codec_dai_name = "msm-stub-tx",
2720 .no_pcm = 1,
2721 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302722 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302723 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2724 .ops = &msm_mi2s_be_ops,
2725 .ignore_suspend = 1,
2726 },
2727};
2728
2729static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
2730 /* Primary AUX PCM Backend DAI Links */
2731 {
2732 .name = LPASS_BE_AUXPCM_RX,
2733 .stream_name = "AUX PCM Playback",
2734 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
2735 .platform_name = "msm-pcm-routing",
2736 .codec_name = "msm-stub-codec.1",
2737 .codec_dai_name = "msm-stub-rx",
2738 .no_pcm = 1,
2739 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302740 .id = MSM_BACKEND_DAI_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302741 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2742 .ignore_pmdown_time = 1,
2743 .ignore_suspend = 1,
2744 .ops = &msm_aux_pcm_be_ops,
2745 },
2746 {
2747 .name = LPASS_BE_AUXPCM_TX,
2748 .stream_name = "AUX PCM Capture",
2749 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
2750 .platform_name = "msm-pcm-routing",
2751 .codec_name = "msm-stub-codec.1",
2752 .codec_dai_name = "msm-stub-tx",
2753 .no_pcm = 1,
2754 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302755 .id = MSM_BACKEND_DAI_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302756 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2757 .ignore_pmdown_time = 1,
2758 .ignore_suspend = 1,
2759 .ops = &msm_aux_pcm_be_ops,
2760 },
2761 /* Secondary AUX PCM Backend DAI Links */
2762 {
2763 .name = LPASS_BE_SEC_AUXPCM_RX,
2764 .stream_name = "Sec AUX PCM Playback",
2765 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
2766 .platform_name = "msm-pcm-routing",
2767 .codec_name = "msm-stub-codec.1",
2768 .codec_dai_name = "msm-stub-rx",
2769 .no_pcm = 1,
2770 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302771 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302772 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2773 .ignore_pmdown_time = 1,
2774 .ignore_suspend = 1,
2775 .ops = &msm_aux_pcm_be_ops,
2776 },
2777 {
2778 .name = LPASS_BE_SEC_AUXPCM_TX,
2779 .stream_name = "Sec AUX PCM Capture",
2780 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
2781 .platform_name = "msm-pcm-routing",
2782 .codec_name = "msm-stub-codec.1",
2783 .codec_dai_name = "msm-stub-tx",
2784 .no_pcm = 1,
2785 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302786 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302787 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2788 .ignore_suspend = 1,
2789 .ignore_pmdown_time = 1,
2790 .ops = &msm_aux_pcm_be_ops,
2791 },
2792 /* Tertiary AUX PCM Backend DAI Links */
2793 {
2794 .name = LPASS_BE_TERT_AUXPCM_RX,
2795 .stream_name = "Tert AUX PCM Playback",
2796 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
2797 .platform_name = "msm-pcm-routing",
2798 .codec_name = "msm-stub-codec.1",
2799 .codec_dai_name = "msm-stub-rx",
2800 .no_pcm = 1,
2801 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302802 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302803 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2804 .ignore_pmdown_time = 1,
2805 .ignore_suspend = 1,
2806 .ops = &msm_aux_pcm_be_ops,
2807 },
2808 {
2809 .name = LPASS_BE_TERT_AUXPCM_TX,
2810 .stream_name = "Tert AUX PCM Capture",
2811 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
2812 .platform_name = "msm-pcm-routing",
2813 .codec_name = "msm-stub-codec.1",
2814 .codec_dai_name = "msm-stub-tx",
2815 .no_pcm = 1,
2816 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302817 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302818 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2819 .ignore_suspend = 1,
2820 .ignore_pmdown_time = 1,
2821 .ops = &msm_aux_pcm_be_ops,
2822 },
2823 /* Quaternary AUX PCM Backend DAI Links */
2824 {
2825 .name = LPASS_BE_QUAT_AUXPCM_RX,
2826 .stream_name = "Quat AUX PCM Playback",
2827 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
2828 .platform_name = "msm-pcm-routing",
2829 .codec_name = "msm-stub-codec.1",
2830 .codec_dai_name = "msm-stub-rx",
2831 .no_pcm = 1,
2832 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302833 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302834 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2835 .ignore_pmdown_time = 1,
2836 .ignore_suspend = 1,
2837 .ops = &msm_aux_pcm_be_ops,
2838 },
2839 {
2840 .name = LPASS_BE_QUAT_AUXPCM_TX,
2841 .stream_name = "Quat AUX PCM Capture",
2842 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
2843 .platform_name = "msm-pcm-routing",
2844 .codec_name = "msm-stub-codec.1",
2845 .codec_dai_name = "msm-stub-tx",
2846 .no_pcm = 1,
2847 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302848 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302849 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2850 .ignore_suspend = 1,
2851 .ignore_pmdown_time = 1,
2852 .ops = &msm_aux_pcm_be_ops,
2853 },
2854};
2855
2856
2857static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
2858 {
2859 .name = LPASS_BE_SLIMBUS_7_RX,
2860 .stream_name = "Slimbus7 Playback",
2861 .cpu_dai_name = "msm-dai-q6-dev.16398",
2862 .platform_name = "msm-pcm-routing",
2863 .codec_name = "btfmslim_slave",
2864 /* BT codec driver determines capabilities based on
2865 * dai name, bt codecdai name should always contains
2866 * supported usecase information
2867 */
2868 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
2869 .no_pcm = 1,
2870 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302871 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302872 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2873 .ops = &msm_wcn_ops,
2874 /* dai link has playback support */
2875 .ignore_pmdown_time = 1,
2876 .ignore_suspend = 1,
2877 },
2878 {
2879 .name = LPASS_BE_SLIMBUS_7_TX,
2880 .stream_name = "Slimbus7 Capture",
2881 .cpu_dai_name = "msm-dai-q6-dev.16399",
2882 .platform_name = "msm-pcm-routing",
2883 .codec_name = "btfmslim_slave",
2884 .codec_dai_name = "btfm_bt_sco_slim_tx",
2885 .no_pcm = 1,
2886 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302887 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302888 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2889 .ops = &msm_wcn_ops,
2890 .ignore_suspend = 1,
2891 },
2892 {
2893 .name = LPASS_BE_SLIMBUS_8_TX,
2894 .stream_name = "Slimbus8 Capture",
2895 .cpu_dai_name = "msm-dai-q6-dev.16401",
2896 .platform_name = "msm-pcm-routing",
2897 .codec_name = "btfmslim_slave",
2898 .codec_dai_name = "btfm_fm_slim_tx",
2899 .no_pcm = 1,
2900 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302901 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302902 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2903 .init = &msm_wcn_init,
2904 .ops = &msm_wcn_ops,
2905 .ignore_suspend = 1,
2906 },
2907};
2908
2909static struct snd_soc_dai_link msm_wsa_be_dai_links[] = {
2910 {
2911 .name = LPASS_BE_INT4_MI2S_RX,
2912 .stream_name = "INT4 MI2S Playback",
2913 .cpu_dai_name = "msm-dai-q6-mi2s.11",
2914 .platform_name = "msm-pcm-routing",
2915 .codec_name = "msm_sdw_codec",
2916 .codec_dai_name = "msm_sdw_i2s_rx1",
2917 .no_pcm = 1,
2918 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302919 .id = MSM_BACKEND_DAI_INT4_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302920 .init = &msm_sdw_audrx_init,
2921 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2922 .ops = &msm_sdw_mi2s_be_ops,
2923 .ignore_suspend = 1,
2924 },
2925};
2926
2927static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
2928 /* DISP PORT BACK END DAI Link */
2929 {
2930 .name = LPASS_BE_DISPLAY_PORT,
2931 .stream_name = "Display Port Playback",
2932 .cpu_dai_name = "msm-dai-q6-dp.24608",
2933 .platform_name = "msm-pcm-routing",
2934 .codec_name = "msm-ext-disp-audio-codec-rx",
2935 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
2936 .no_pcm = 1,
2937 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302938 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302939 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2940 .ignore_pmdown_time = 1,
2941 .ignore_suspend = 1,
2942 },
2943};
2944
2945static struct snd_soc_dai_link msm_int_dai_links[
2946ARRAY_SIZE(msm_int_dai) +
2947ARRAY_SIZE(msm_int_wsa_dai) +
2948ARRAY_SIZE(msm_int_be_dai) +
2949ARRAY_SIZE(msm_mi2s_be_dai_links) +
2950ARRAY_SIZE(msm_auxpcm_be_dai_links)+
2951ARRAY_SIZE(msm_wcn_be_dai_links) +
2952ARRAY_SIZE(msm_wsa_be_dai_links) +
2953ARRAY_SIZE(ext_disp_be_dai_link)];
2954
2955static struct snd_soc_card sdm660_card = {
2956 /* snd_soc_card_sdm660 */
2957 .name = "sdm660-snd-card",
2958 .dai_link = msm_int_dai,
2959 .num_links = ARRAY_SIZE(msm_int_dai),
2960 .late_probe = msm_snd_card_late_probe,
2961};
2962
2963static void msm_disable_int_mclk0(struct work_struct *work)
2964{
2965 struct msm_asoc_mach_data *pdata = NULL;
2966 struct delayed_work *dwork;
2967 int ret = 0;
2968
2969 dwork = to_delayed_work(work);
2970 pdata = container_of(dwork, struct msm_asoc_mach_data,
2971 disable_int_mclk0_work);
2972 mutex_lock(&pdata->cdc_int_mclk0_mutex);
2973 pr_debug("%s: mclk_enabled %d mclk_rsc_ref %d\n", __func__,
2974 atomic_read(&pdata->int_mclk0_enabled),
2975 atomic_read(&pdata->int_mclk0_rsc_ref));
2976
2977 if (atomic_read(&pdata->int_mclk0_enabled) == true
2978 && atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
2979 pr_debug("Disable the mclk\n");
2980 pdata->digital_cdc_core_clk.enable = 0;
2981 ret = afe_set_lpass_clock_v2(
2982 AFE_PORT_ID_INT0_MI2S_RX,
2983 &pdata->digital_cdc_core_clk);
2984 if (ret < 0)
2985 pr_err("%s failed to disable the CCLK\n", __func__);
2986 atomic_set(&pdata->int_mclk0_enabled, false);
2987 }
2988 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
2989}
2990
2991static void msm_int_dt_parse_cap_info(struct platform_device *pdev,
2992 struct msm_asoc_mach_data *pdata)
2993{
2994 const char *ext1_cap = "qcom,msm-micbias1-ext-cap";
2995 const char *ext2_cap = "qcom,msm-micbias2-ext-cap";
2996
2997 pdata->micbias1_cap_mode =
2998 (of_property_read_bool(pdev->dev.of_node, ext1_cap) ?
2999 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
3000
3001 pdata->micbias2_cap_mode =
3002 (of_property_read_bool(pdev->dev.of_node, ext2_cap) ?
3003 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
3004}
3005
3006static struct snd_soc_card *msm_int_populate_sndcard_dailinks(
3007 struct device *dev)
3008{
3009 struct snd_soc_card *card = &sdm660_card;
3010 struct snd_soc_dai_link *dailink;
3011 int len1;
3012
3013 card->name = dev_name(dev);
3014 len1 = ARRAY_SIZE(msm_int_dai);
3015 memcpy(msm_int_dai_links, msm_int_dai, sizeof(msm_int_dai));
3016 dailink = msm_int_dai_links;
3017 if (!of_property_read_bool(dev->of_node,
3018 "qcom,wsa-disable")) {
3019 memcpy(dailink + len1,
3020 msm_int_wsa_dai,
3021 sizeof(msm_int_wsa_dai));
3022 len1 += ARRAY_SIZE(msm_int_wsa_dai);
3023 }
3024 memcpy(dailink + len1, msm_int_be_dai, sizeof(msm_int_be_dai));
3025 len1 += ARRAY_SIZE(msm_int_be_dai);
3026
3027 if (of_property_read_bool(dev->of_node,
3028 "qcom,mi2s-audio-intf")) {
3029 memcpy(dailink + len1,
3030 msm_mi2s_be_dai_links,
3031 sizeof(msm_mi2s_be_dai_links));
3032 len1 += ARRAY_SIZE(msm_mi2s_be_dai_links);
3033 }
3034 if (of_property_read_bool(dev->of_node,
3035 "qcom,auxpcm-audio-intf")) {
3036 memcpy(dailink + len1,
3037 msm_auxpcm_be_dai_links,
3038 sizeof(msm_auxpcm_be_dai_links));
3039 len1 += ARRAY_SIZE(msm_auxpcm_be_dai_links);
3040 }
3041 if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
3042 dev_dbg(dev, "%s(): WCN BTFM support present\n",
3043 __func__);
3044 memcpy(dailink + len1,
3045 msm_wcn_be_dai_links,
3046 sizeof(msm_wcn_be_dai_links));
3047 len1 += ARRAY_SIZE(msm_wcn_be_dai_links);
3048 }
3049 if (!of_property_read_bool(dev->of_node, "qcom,wsa-disable")) {
3050 memcpy(dailink + len1,
3051 msm_wsa_be_dai_links,
3052 sizeof(msm_wsa_be_dai_links));
3053 len1 += ARRAY_SIZE(msm_wsa_be_dai_links);
3054 }
3055 if (of_property_read_bool(dev->of_node, "qcom,ext-disp-audio-rx")) {
3056 dev_dbg(dev, "%s(): ext disp audio support present\n",
3057 __func__);
3058 memcpy(dailink + len1,
3059 ext_disp_be_dai_link,
3060 sizeof(ext_disp_be_dai_link));
3061 len1 += ARRAY_SIZE(ext_disp_be_dai_link);
3062 }
3063 card->dai_link = dailink;
3064 card->num_links = len1;
3065 return card;
3066}
3067
3068static int msm_internal_init(struct platform_device *pdev,
3069 struct msm_asoc_mach_data *pdata,
3070 struct snd_soc_card *card)
3071{
3072 const char *type = NULL;
3073 const char *hs_micbias_type = "qcom,msm-hs-micbias-type";
3074 int ret;
3075
3076 ret = is_ext_spk_gpio_support(pdev, pdata);
3077 if (ret < 0)
3078 dev_dbg(&pdev->dev,
3079 "%s: doesn't support external speaker pa\n",
3080 __func__);
3081
3082 ret = of_property_read_string(pdev->dev.of_node,
3083 hs_micbias_type, &type);
3084 if (ret) {
3085 dev_err(&pdev->dev, "%s: missing %s in dt node\n",
3086 __func__, hs_micbias_type);
3087 goto err;
3088 }
3089 if (!strcmp(type, "external")) {
3090 dev_dbg(&pdev->dev, "Headset is using external micbias\n");
3091 mbhc_cfg_ptr->hs_ext_micbias = true;
3092 } else {
3093 dev_dbg(&pdev->dev, "Headset is using internal micbias\n");
3094 mbhc_cfg_ptr->hs_ext_micbias = false;
3095 }
3096
3097 /* initialize the int_mclk0 */
3098 pdata->digital_cdc_core_clk.clk_set_minor_version =
3099 AFE_API_VERSION_I2S_CONFIG;
3100 pdata->digital_cdc_core_clk.clk_id =
3101 Q6AFE_LPASS_CLK_ID_INT_MCLK_0;
3102 pdata->digital_cdc_core_clk.clk_freq_in_hz = pdata->mclk_freq;
3103 pdata->digital_cdc_core_clk.clk_attri =
3104 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
3105 pdata->digital_cdc_core_clk.clk_root =
3106 Q6AFE_LPASS_CLK_ROOT_DEFAULT;
3107 pdata->digital_cdc_core_clk.enable = 1;
3108
3109 /* Initialize loopback mode to false */
3110 pdata->lb_mode = false;
3111
3112 msm_int_dt_parse_cap_info(pdev, pdata);
3113
3114 card->dev = &pdev->dev;
3115 platform_set_drvdata(pdev, card);
3116 snd_soc_card_set_drvdata(card, pdata);
3117 ret = snd_soc_of_parse_card_name(card, "qcom,model");
3118 if (ret)
3119 goto err;
3120 /* initialize timer */
3121 INIT_DELAYED_WORK(&pdata->disable_int_mclk0_work,
3122 msm_disable_int_mclk0);
3123 mutex_init(&pdata->cdc_int_mclk0_mutex);
3124 atomic_set(&pdata->int_mclk0_rsc_ref, 0);
3125 atomic_set(&pdata->int_mclk0_enabled, false);
3126
3127 dev_info(&pdev->dev, "%s: default codec configured\n", __func__);
3128
3129 return 0;
3130err:
3131 return ret;
3132}
3133
3134/**
3135 * msm_int_cdc_init - internal codec machine specific init.
3136 *
3137 * @pdev: platform device handle
3138 * @pdata: private data of machine driver
3139 * @card: sound card pointer reference
3140 * @mbhc_cfg: MBHC config reference
3141 *
3142 * Returns 0.
3143 */
3144int msm_int_cdc_init(struct platform_device *pdev,
3145 struct msm_asoc_mach_data *pdata,
3146 struct snd_soc_card **card,
3147 struct wcd_mbhc_config *mbhc_cfg)
3148{
3149 mbhc_cfg_ptr = mbhc_cfg;
3150
3151 *card = msm_int_populate_sndcard_dailinks(&pdev->dev);
3152 msm_internal_init(pdev, pdata, *card);
3153 return 0;
3154}
3155EXPORT_SYMBOL(msm_int_cdc_init);