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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / e1dc0d79011e467762d4e3f4da06c573388efbba / . / asoc / bengal.c
blob: c500a178f350a53dc6002d41504faad9559e9681 [file] [log] [blame]
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/soc/qcom/fsa4480-i2c.h>
17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
23#include <soc/snd_event.h>
24#include <dsp/audio_notifier.h>
25#include <soc/swr-common.h>
26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
32#include "codecs/wcd937x/wcd937x-mbhc.h"
33#include "codecs/wsa881x-analog.h"
34#include "codecs/wcd937x/wcd937x.h"
35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "bengal-port-config.h"
38
39#define DRV_NAME "bengal-asoc-snd"
40#define __CHIPSET__ "BENGAL "
41#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
42
43#define SAMPLING_RATE_8KHZ 8000
44#define SAMPLING_RATE_11P025KHZ 11025
45#define SAMPLING_RATE_16KHZ 16000
46#define SAMPLING_RATE_22P05KHZ 22050
47#define SAMPLING_RATE_32KHZ 32000
48#define SAMPLING_RATE_44P1KHZ 44100
49#define SAMPLING_RATE_48KHZ 48000
50#define SAMPLING_RATE_88P2KHZ 88200
51#define SAMPLING_RATE_96KHZ 96000
52#define SAMPLING_RATE_176P4KHZ 176400
53#define SAMPLING_RATE_192KHZ 192000
54#define SAMPLING_RATE_352P8KHZ 352800
55#define SAMPLING_RATE_384KHZ 384000
56
57#define WCD9XXX_MBHC_DEF_RLOADS 5
58#define WCD9XXX_MBHC_DEF_BUTTONS 8
59#define CODEC_EXT_CLK_RATE 9600000
60#define ADSP_STATE_READY_TIMEOUT_MS 3000
61#define DEV_NAME_STR_LEN 32
62#define WCD_MBHC_HS_V_MAX 1600
63
64#define TDM_CHANNEL_MAX 8
65#define DEV_NAME_STR_LEN 32
66
67/* time in us to ensure LPM doesn't go in C3/C4 */
68#define MSM_LL_QOS_VALUE 300
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
72#define WCN_CDC_SLIM_RX_CH_MAX 2
73#define WCN_CDC_SLIM_TX_CH_MAX 3
74
75enum {
76 TDM_0 = 0,
77 TDM_1,
78 TDM_2,
79 TDM_3,
80 TDM_4,
81 TDM_5,
82 TDM_6,
83 TDM_7,
84 TDM_PORT_MAX,
85};
86
87enum {
88 TDM_PRI = 0,
89 TDM_SEC,
90 TDM_TERT,
91 TDM_QUAT,
92 TDM_INTERFACE_MAX,
93};
94
95enum {
96 PRIM_AUX_PCM = 0,
97 SEC_AUX_PCM,
98 TERT_AUX_PCM,
99 QUAT_AUX_PCM,
100 AUX_PCM_MAX,
101};
102
103enum {
104 PRIM_MI2S = 0,
105 SEC_MI2S,
106 TERT_MI2S,
107 QUAT_MI2S,
108 MI2S_MAX,
109};
110
111enum {
112 RX_CDC_DMA_RX_0 = 0,
113 RX_CDC_DMA_RX_1,
114 RX_CDC_DMA_RX_2,
115 RX_CDC_DMA_RX_3,
116 RX_CDC_DMA_RX_5,
117 CDC_DMA_RX_MAX,
118};
119
120enum {
121 TX_CDC_DMA_TX_0 = 0,
122 TX_CDC_DMA_TX_3,
123 TX_CDC_DMA_TX_4,
124 VA_CDC_DMA_TX_0,
125 VA_CDC_DMA_TX_1,
126 VA_CDC_DMA_TX_2,
127 CDC_DMA_TX_MAX,
128};
129
130enum {
131 SLIM_RX_7 = 0,
132 SLIM_RX_MAX,
133};
134
135enum {
136 SLIM_TX_7 = 0,
137 SLIM_TX_8,
138 SLIM_TX_MAX,
139};
140
141enum {
142 AFE_LOOPBACK_TX_IDX = 0,
143 AFE_LOOPBACK_TX_IDX_MAX,
144};
145struct msm_asoc_mach_data {
146 struct snd_info_entry *codec_root;
147 int usbc_en2_gpio; /* used by gpio driver API */
148 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
149 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
150 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
151 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
152 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
153 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
154 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
155 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
156 bool is_afe_config_done;
157 struct device_node *fsa_handle;
158};
159
160struct tdm_port {
161 u32 mode;
162 u32 channel;
163};
164
165enum {
166 EXT_DISP_RX_IDX_DP = 0,
167 EXT_DISP_RX_IDX_DP1,
168 EXT_DISP_RX_IDX_MAX,
169};
170
171struct msm_wsa881x_dev_info {
172 struct device_node *of_node;
173 u32 index;
174};
175
176struct aux_codec_dev_info {
177 struct device_node *of_node;
178 u32 index;
179};
180
181struct dev_config {
182 u32 sample_rate;
183 u32 bit_format;
184 u32 channels;
185};
186
187/* Default configuration of slimbus channels */
188static struct dev_config slim_rx_cfg[] = {
189 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
190};
191
192static struct dev_config slim_tx_cfg[] = {
193 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
194 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
195};
196
197static struct dev_config usb_rx_cfg = {
198 .sample_rate = SAMPLING_RATE_48KHZ,
199 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
200 .channels = 2,
201};
202
203static struct dev_config usb_tx_cfg = {
204 .sample_rate = SAMPLING_RATE_48KHZ,
205 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
206 .channels = 1,
207};
208
209static struct dev_config proxy_rx_cfg = {
210 .sample_rate = SAMPLING_RATE_48KHZ,
211 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
212 .channels = 2,
213};
214
215static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
216 {
217 AFE_API_VERSION_I2S_CONFIG,
218 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
219 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
220 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
221 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
222 0,
223 },
224 {
225 AFE_API_VERSION_I2S_CONFIG,
226 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
227 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
228 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
229 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
230 0,
231 },
232 {
233 AFE_API_VERSION_I2S_CONFIG,
234 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
235 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
236 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
237 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
238 0,
239 },
240 {
241 AFE_API_VERSION_I2S_CONFIG,
242 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
243 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
244 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
245 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
246 0,
247 },
248};
249
250struct mi2s_conf {
251 struct mutex lock;
252 u32 ref_cnt;
253 u32 msm_is_mi2s_master;
254};
255
256static u32 mi2s_ebit_clk[MI2S_MAX] = {
257 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
258 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
259 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
260};
261
262static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
263
264/* Default configuration of TDM channels */
265static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
266 { /* PRI TDM */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
275 },
276 { /* SEC TDM */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
285 },
286 { /* TERT TDM */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
295 },
296 { /* QUAT TDM */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
305 },
306};
307
308static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
309 { /* PRI TDM */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
318 },
319 { /* SEC TDM */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
328 },
329 { /* TERT TDM */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
338 },
339 { /* QUAT TDM */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
348 },
349};
350
351/* Default configuration of AUX PCM channels */
352static struct dev_config aux_pcm_rx_cfg[] = {
353 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357};
358
359static struct dev_config aux_pcm_tx_cfg[] = {
360 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364};
365
366/* Default configuration of MI2S channels */
367static struct dev_config mi2s_rx_cfg[] = {
368 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
369 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
370 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
371 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372};
373
374static struct dev_config mi2s_tx_cfg[] = {
375 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
376 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
377 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
378 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
379};
380
381/* Default configuration of Codec DMA Interface RX */
382static struct dev_config cdc_dma_rx_cfg[] = {
383 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
387 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388};
389
390/* Default configuration of Codec DMA Interface TX */
391static struct dev_config cdc_dma_tx_cfg[] = {
392 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
396 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
397 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
398};
399
400static struct dev_config afe_loopback_tx_cfg[] = {
401 [AFE_LOOPBACK_TX_IDX] = {
402 SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
403};
404
405static int msm_vi_feed_tx_ch = 2;
406static const char *const vi_feed_ch_text[] = {"One", "Two"};
407static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
408 "S32_LE"};
409static char const *ch_text[] = {"Two", "Three", "Four", "Five",
410 "Six", "Seven", "Eight"};
411static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
412 "KHZ_16", "KHZ_22P05",
413 "KHZ_32", "KHZ_44P1", "KHZ_48",
414 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
415 "KHZ_192", "KHZ_352P8", "KHZ_384"};
416static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
417 "Five", "Six", "Seven",
418 "Eight"};
419static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
420 "KHZ_48", "KHZ_176P4",
421 "KHZ_352P8"};
422static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
423static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
424 "Five", "Six", "Seven", "Eight"};
425static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
426static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
427 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
428 "KHZ_48", "KHZ_96", "KHZ_192"};
429static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
430 "Five", "Six", "Seven",
431 "Eight"};
432
433static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
434static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
435 "Five", "Six", "Seven",
436 "Eight"};
437static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
438 "KHZ_16", "KHZ_22P05",
439 "KHZ_32", "KHZ_44P1", "KHZ_48",
440 "KHZ_88P2", "KHZ_96",
441 "KHZ_176P4", "KHZ_192",
442 "KHZ_352P8", "KHZ_384"};
443static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
444 "KHZ_44P1", "KHZ_48",
445 "KHZ_88P2", "KHZ_96"};
446static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
447 "KHZ_44P1", "KHZ_48",
448 "KHZ_88P2", "KHZ_96"};
449static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
450 "KHZ_44P1", "KHZ_48",
451 "KHZ_88P2", "KHZ_96"};
452static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
453
454static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
455static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
456static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
457static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
458static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
459static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
460static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
461static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
462static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
463static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
464static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
465static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
466static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
467static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
468static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
469static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
470static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
471static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
472static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
473static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
474static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
475static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
476static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
477static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
478static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
479static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
480static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
481static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
482static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
483static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
484static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
485static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
486static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
487static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
488static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
489static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
490static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
491static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
492static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
493static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
494static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
495static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
496static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
497static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
498static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
508static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
509static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
510static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
511static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
512static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
519 cdc_dma_sample_rate_text);
520static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
521 cdc_dma_sample_rate_text);
522static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
523 cdc_dma_sample_rate_text);
524static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
525 cdc_dma_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
527 cdc_dma_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
529 cdc_dma_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
531 cdc_dma_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
533 cdc_dma_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
535 cdc_dma_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
537 cdc_dma_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
539 cdc_dma_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
542static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
543static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
544
545static bool is_initial_boot;
546static bool codec_reg_done;
547static struct snd_soc_aux_dev *msm_aux_dev;
548static struct snd_soc_codec_conf *msm_codec_conf;
549static struct snd_soc_card snd_soc_card_bengal_msm;
550static int dmic_0_1_gpio_cnt;
551static int dmic_2_3_gpio_cnt;
552
553static void *def_wcd_mbhc_cal(void);
554
555/*
556 * Need to report LINEIN
557 * if R/L channel impedance is larger than 5K ohm
558 */
559static struct wcd_mbhc_config wcd_mbhc_cfg = {
560 .read_fw_bin = false,
561 .calibration = NULL,
562 .detect_extn_cable = true,
563 .mono_stero_detection = false,
564 .swap_gnd_mic = NULL,
565 .hs_ext_micbias = true,
566 .key_code[0] = KEY_MEDIA,
567 .key_code[1] = KEY_VOICECOMMAND,
568 .key_code[2] = KEY_VOLUMEUP,
569 .key_code[3] = KEY_VOLUMEDOWN,
570 .key_code[4] = 0,
571 .key_code[5] = 0,
572 .key_code[6] = 0,
573 .key_code[7] = 0,
574 .linein_th = 5000,
575 .moisture_en = false,
576 .mbhc_micbias = MIC_BIAS_2,
577 .anc_micbias = MIC_BIAS_2,
578 .enable_anc_mic_detect = false,
579 .moisture_duty_cycle_en = true,
580};
581
582static inline int param_is_mask(int p)
583{
584 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
585 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
586}
587
588static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
589 int n)
590{
591 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
592}
593
594static void param_set_mask(struct snd_pcm_hw_params *p, int n,
595 unsigned int bit)
596{
597 if (bit >= SNDRV_MASK_MAX)
598 return;
599 if (param_is_mask(n)) {
600 struct snd_mask *m = param_to_mask(p, n);
601
602 m->bits[0] = 0;
603 m->bits[1] = 0;
604 m->bits[bit >> 5] |= (1 << (bit & 31));
605 }
606}
607
608static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
609 struct snd_ctl_elem_value *ucontrol)
610{
611 int sample_rate_val = 0;
612
613 switch (usb_rx_cfg.sample_rate) {
614 case SAMPLING_RATE_384KHZ:
615 sample_rate_val = 12;
616 break;
617 case SAMPLING_RATE_352P8KHZ:
618 sample_rate_val = 11;
619 break;
620 case SAMPLING_RATE_192KHZ:
621 sample_rate_val = 10;
622 break;
623 case SAMPLING_RATE_176P4KHZ:
624 sample_rate_val = 9;
625 break;
626 case SAMPLING_RATE_96KHZ:
627 sample_rate_val = 8;
628 break;
629 case SAMPLING_RATE_88P2KHZ:
630 sample_rate_val = 7;
631 break;
632 case SAMPLING_RATE_48KHZ:
633 sample_rate_val = 6;
634 break;
635 case SAMPLING_RATE_44P1KHZ:
636 sample_rate_val = 5;
637 break;
638 case SAMPLING_RATE_32KHZ:
639 sample_rate_val = 4;
640 break;
641 case SAMPLING_RATE_22P05KHZ:
642 sample_rate_val = 3;
643 break;
644 case SAMPLING_RATE_16KHZ:
645 sample_rate_val = 2;
646 break;
647 case SAMPLING_RATE_11P025KHZ:
648 sample_rate_val = 1;
649 break;
650 case SAMPLING_RATE_8KHZ:
651 default:
652 sample_rate_val = 0;
653 break;
654 }
655
656 ucontrol->value.integer.value[0] = sample_rate_val;
657 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
658 usb_rx_cfg.sample_rate);
659 return 0;
660}
661
662static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
663 struct snd_ctl_elem_value *ucontrol)
664{
665 switch (ucontrol->value.integer.value[0]) {
666 case 12:
667 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
668 break;
669 case 11:
670 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
671 break;
672 case 10:
673 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
674 break;
675 case 9:
676 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
677 break;
678 case 8:
679 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
680 break;
681 case 7:
682 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
683 break;
684 case 6:
685 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
686 break;
687 case 5:
688 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
689 break;
690 case 4:
691 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
692 break;
693 case 3:
694 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
695 break;
696 case 2:
697 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
698 break;
699 case 1:
700 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
701 break;
702 case 0:
703 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
704 break;
705 default:
706 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
707 break;
708 }
709
710 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
711 __func__, ucontrol->value.integer.value[0],
712 usb_rx_cfg.sample_rate);
713 return 0;
714}
715
716static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
717 struct snd_ctl_elem_value *ucontrol)
718{
719 int sample_rate_val = 0;
720
721 switch (usb_tx_cfg.sample_rate) {
722 case SAMPLING_RATE_384KHZ:
723 sample_rate_val = 12;
724 break;
725 case SAMPLING_RATE_352P8KHZ:
726 sample_rate_val = 11;
727 break;
728 case SAMPLING_RATE_192KHZ:
729 sample_rate_val = 10;
730 break;
731 case SAMPLING_RATE_176P4KHZ:
732 sample_rate_val = 9;
733 break;
734 case SAMPLING_RATE_96KHZ:
735 sample_rate_val = 8;
736 break;
737 case SAMPLING_RATE_88P2KHZ:
738 sample_rate_val = 7;
739 break;
740 case SAMPLING_RATE_48KHZ:
741 sample_rate_val = 6;
742 break;
743 case SAMPLING_RATE_44P1KHZ:
744 sample_rate_val = 5;
745 break;
746 case SAMPLING_RATE_32KHZ:
747 sample_rate_val = 4;
748 break;
749 case SAMPLING_RATE_22P05KHZ:
750 sample_rate_val = 3;
751 break;
752 case SAMPLING_RATE_16KHZ:
753 sample_rate_val = 2;
754 break;
755 case SAMPLING_RATE_11P025KHZ:
756 sample_rate_val = 1;
757 break;
758 case SAMPLING_RATE_8KHZ:
759 sample_rate_val = 0;
760 break;
761 default:
762 sample_rate_val = 6;
763 break;
764 }
765
766 ucontrol->value.integer.value[0] = sample_rate_val;
767 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
768 usb_tx_cfg.sample_rate);
769 return 0;
770}
771
772static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
773 struct snd_ctl_elem_value *ucontrol)
774{
775 switch (ucontrol->value.integer.value[0]) {
776 case 12:
777 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
778 break;
779 case 11:
780 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
781 break;
782 case 10:
783 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
784 break;
785 case 9:
786 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
787 break;
788 case 8:
789 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
790 break;
791 case 7:
792 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
793 break;
794 case 6:
795 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
796 break;
797 case 5:
798 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
799 break;
800 case 4:
801 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
802 break;
803 case 3:
804 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
805 break;
806 case 2:
807 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
808 break;
809 case 1:
810 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
811 break;
812 case 0:
813 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
814 break;
815 default:
816 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
817 break;
818 }
819
820 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
821 __func__, ucontrol->value.integer.value[0],
822 usb_tx_cfg.sample_rate);
823 return 0;
824}
825static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
829 afe_loopback_tx_cfg[0].channels);
830 ucontrol->value.enumerated.item[0] =
831 afe_loopback_tx_cfg[0].channels - 1;
832
833 return 0;
834}
835
836static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
837 struct snd_ctl_elem_value *ucontrol)
838{
839 afe_loopback_tx_cfg[0].channels =
840 ucontrol->value.enumerated.item[0] + 1;
841 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
842 afe_loopback_tx_cfg[0].channels);
843
844 return 1;
845}
846
847static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
848 struct snd_ctl_elem_value *ucontrol)
849{
850 switch (usb_rx_cfg.bit_format) {
851 case SNDRV_PCM_FORMAT_S32_LE:
852 ucontrol->value.integer.value[0] = 3;
853 break;
854 case SNDRV_PCM_FORMAT_S24_3LE:
855 ucontrol->value.integer.value[0] = 2;
856 break;
857 case SNDRV_PCM_FORMAT_S24_LE:
858 ucontrol->value.integer.value[0] = 1;
859 break;
860 case SNDRV_PCM_FORMAT_S16_LE:
861 default:
862 ucontrol->value.integer.value[0] = 0;
863 break;
864 }
865
866 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
867 __func__, usb_rx_cfg.bit_format,
868 ucontrol->value.integer.value[0]);
869 return 0;
870}
871
872static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
873 struct snd_ctl_elem_value *ucontrol)
874{
875 int rc = 0;
876
877 switch (ucontrol->value.integer.value[0]) {
878 case 3:
879 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
880 break;
881 case 2:
882 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
883 break;
884 case 1:
885 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
886 break;
887 case 0:
888 default:
889 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
890 break;
891 }
892 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
893 __func__, usb_rx_cfg.bit_format,
894 ucontrol->value.integer.value[0]);
895
896 return rc;
897}
898
899static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
900 struct snd_ctl_elem_value *ucontrol)
901{
902 switch (usb_tx_cfg.bit_format) {
903 case SNDRV_PCM_FORMAT_S32_LE:
904 ucontrol->value.integer.value[0] = 3;
905 break;
906 case SNDRV_PCM_FORMAT_S24_3LE:
907 ucontrol->value.integer.value[0] = 2;
908 break;
909 case SNDRV_PCM_FORMAT_S24_LE:
910 ucontrol->value.integer.value[0] = 1;
911 break;
912 case SNDRV_PCM_FORMAT_S16_LE:
913 default:
914 ucontrol->value.integer.value[0] = 0;
915 break;
916 }
917
918 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
919 __func__, usb_tx_cfg.bit_format,
920 ucontrol->value.integer.value[0]);
921 return 0;
922}
923
924static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
926{
927 int rc = 0;
928
929 switch (ucontrol->value.integer.value[0]) {
930 case 3:
931 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
932 break;
933 case 2:
934 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
935 break;
936 case 1:
937 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
938 break;
939 case 0:
940 default:
941 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
942 break;
943 }
944 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
945 __func__, usb_tx_cfg.bit_format,
946 ucontrol->value.integer.value[0]);
947
948 return rc;
949}
950
951static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
952 struct snd_ctl_elem_value *ucontrol)
953{
954 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
955 usb_rx_cfg.channels);
956 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
957 return 0;
958}
959
960static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_value *ucontrol)
962{
963 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
964
965 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
966 return 1;
967}
968
969static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
970 struct snd_ctl_elem_value *ucontrol)
971{
972 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
973 usb_tx_cfg.channels);
974 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
975 return 0;
976}
977
978static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
979 struct snd_ctl_elem_value *ucontrol)
980{
981 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
982
983 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
984 return 1;
985}
986
987static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
988 struct snd_ctl_elem_value *ucontrol)
989{
990 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
991 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
992 ucontrol->value.integer.value[0]);
993 return 0;
994}
995
996static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
997 struct snd_ctl_elem_value *ucontrol)
998{
999 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1000 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1001 return 1;
1002}
1003
1004static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1005 struct snd_ctl_elem_value *ucontrol)
1006{
1007 pr_debug("%s: proxy_rx channels = %d\n",
1008 __func__, proxy_rx_cfg.channels);
1009 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1010
1011 return 0;
1012}
1013
1014static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1015 struct snd_ctl_elem_value *ucontrol)
1016{
1017 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1018 pr_debug("%s: proxy_rx channels = %d\n",
1019 __func__, proxy_rx_cfg.channels);
1020
1021 return 1;
1022}
1023
1024static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1025 struct tdm_port *port)
1026{
1027 if (port) {
1028 if (strnstr(kcontrol->id.name, "PRI",
1029 sizeof(kcontrol->id.name))) {
1030 port->mode = TDM_PRI;
1031 } else if (strnstr(kcontrol->id.name, "SEC",
1032 sizeof(kcontrol->id.name))) {
1033 port->mode = TDM_SEC;
1034 } else if (strnstr(kcontrol->id.name, "TERT",
1035 sizeof(kcontrol->id.name))) {
1036 port->mode = TDM_TERT;
1037 } else if (strnstr(kcontrol->id.name, "QUAT",
1038 sizeof(kcontrol->id.name))) {
1039 port->mode = TDM_QUAT;
1040 } else {
1041 pr_err("%s: unsupported mode in: %s\n",
1042 __func__, kcontrol->id.name);
1043 return -EINVAL;
1044 }
1045
1046 if (strnstr(kcontrol->id.name, "RX_0",
1047 sizeof(kcontrol->id.name)) ||
1048 strnstr(kcontrol->id.name, "TX_0",
1049 sizeof(kcontrol->id.name))) {
1050 port->channel = TDM_0;
1051 } else if (strnstr(kcontrol->id.name, "RX_1",
1052 sizeof(kcontrol->id.name)) ||
1053 strnstr(kcontrol->id.name, "TX_1",
1054 sizeof(kcontrol->id.name))) {
1055 port->channel = TDM_1;
1056 } else if (strnstr(kcontrol->id.name, "RX_2",
1057 sizeof(kcontrol->id.name)) ||
1058 strnstr(kcontrol->id.name, "TX_2",
1059 sizeof(kcontrol->id.name))) {
1060 port->channel = TDM_2;
1061 } else if (strnstr(kcontrol->id.name, "RX_3",
1062 sizeof(kcontrol->id.name)) ||
1063 strnstr(kcontrol->id.name, "TX_3",
1064 sizeof(kcontrol->id.name))) {
1065 port->channel = TDM_3;
1066 } else if (strnstr(kcontrol->id.name, "RX_4",
1067 sizeof(kcontrol->id.name)) ||
1068 strnstr(kcontrol->id.name, "TX_4",
1069 sizeof(kcontrol->id.name))) {
1070 port->channel = TDM_4;
1071 } else if (strnstr(kcontrol->id.name, "RX_5",
1072 sizeof(kcontrol->id.name)) ||
1073 strnstr(kcontrol->id.name, "TX_5",
1074 sizeof(kcontrol->id.name))) {
1075 port->channel = TDM_5;
1076 } else if (strnstr(kcontrol->id.name, "RX_6",
1077 sizeof(kcontrol->id.name)) ||
1078 strnstr(kcontrol->id.name, "TX_6",
1079 sizeof(kcontrol->id.name))) {
1080 port->channel = TDM_6;
1081 } else if (strnstr(kcontrol->id.name, "RX_7",
1082 sizeof(kcontrol->id.name)) ||
1083 strnstr(kcontrol->id.name, "TX_7",
1084 sizeof(kcontrol->id.name))) {
1085 port->channel = TDM_7;
1086 } else {
1087 pr_err("%s: unsupported channel in: %s\n",
1088 __func__, kcontrol->id.name);
1089 return -EINVAL;
1090 }
1091 } else {
1092 return -EINVAL;
1093 }
1094 return 0;
1095}
1096
1097static int tdm_get_sample_rate(int value)
1098{
1099 int sample_rate = 0;
1100
1101 switch (value) {
1102 case 0:
1103 sample_rate = SAMPLING_RATE_8KHZ;
1104 break;
1105 case 1:
1106 sample_rate = SAMPLING_RATE_16KHZ;
1107 break;
1108 case 2:
1109 sample_rate = SAMPLING_RATE_32KHZ;
1110 break;
1111 case 3:
1112 sample_rate = SAMPLING_RATE_48KHZ;
1113 break;
1114 case 4:
1115 sample_rate = SAMPLING_RATE_176P4KHZ;
1116 break;
1117 case 5:
1118 sample_rate = SAMPLING_RATE_352P8KHZ;
1119 break;
1120 default:
1121 sample_rate = SAMPLING_RATE_48KHZ;
1122 break;
1123 }
1124 return sample_rate;
1125}
1126
1127static int tdm_get_sample_rate_val(int sample_rate)
1128{
1129 int sample_rate_val = 0;
1130
1131 switch (sample_rate) {
1132 case SAMPLING_RATE_8KHZ:
1133 sample_rate_val = 0;
1134 break;
1135 case SAMPLING_RATE_16KHZ:
1136 sample_rate_val = 1;
1137 break;
1138 case SAMPLING_RATE_32KHZ:
1139 sample_rate_val = 2;
1140 break;
1141 case SAMPLING_RATE_48KHZ:
1142 sample_rate_val = 3;
1143 break;
1144 case SAMPLING_RATE_176P4KHZ:
1145 sample_rate_val = 4;
1146 break;
1147 case SAMPLING_RATE_352P8KHZ:
1148 sample_rate_val = 5;
1149 break;
1150 default:
1151 sample_rate_val = 3;
1152 break;
1153 }
1154 return sample_rate_val;
1155}
1156
1157static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1158 struct snd_ctl_elem_value *ucontrol)
1159{
1160 struct tdm_port port;
1161 int ret = tdm_get_port_idx(kcontrol, &port);
1162
1163 if (ret) {
1164 pr_err("%s: unsupported control: %s\n",
1165 __func__, kcontrol->id.name);
1166 } else {
1167 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1168 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1169
1170 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1171 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1172 ucontrol->value.enumerated.item[0]);
1173 }
1174 return ret;
1175}
1176
1177static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1178 struct snd_ctl_elem_value *ucontrol)
1179{
1180 struct tdm_port port;
1181 int ret = tdm_get_port_idx(kcontrol, &port);
1182
1183 if (ret) {
1184 pr_err("%s: unsupported control: %s\n",
1185 __func__, kcontrol->id.name);
1186 } else {
1187 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1188 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1189
1190 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1191 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1192 ucontrol->value.enumerated.item[0]);
1193 }
1194 return ret;
1195}
1196
1197static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1198 struct snd_ctl_elem_value *ucontrol)
1199{
1200 struct tdm_port port;
1201 int ret = tdm_get_port_idx(kcontrol, &port);
1202
1203 if (ret) {
1204 pr_err("%s: unsupported control: %s\n",
1205 __func__, kcontrol->id.name);
1206 } else {
1207 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1208 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1209
1210 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1211 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1212 ucontrol->value.enumerated.item[0]);
1213 }
1214 return ret;
1215}
1216
1217static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1218 struct snd_ctl_elem_value *ucontrol)
1219{
1220 struct tdm_port port;
1221 int ret = tdm_get_port_idx(kcontrol, &port);
1222
1223 if (ret) {
1224 pr_err("%s: unsupported control: %s\n",
1225 __func__, kcontrol->id.name);
1226 } else {
1227 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1228 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1229
1230 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1231 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1232 ucontrol->value.enumerated.item[0]);
1233 }
1234 return ret;
1235}
1236
1237static int tdm_get_format(int value)
1238{
1239 int format = 0;
1240
1241 switch (value) {
1242 case 0:
1243 format = SNDRV_PCM_FORMAT_S16_LE;
1244 break;
1245 case 1:
1246 format = SNDRV_PCM_FORMAT_S24_LE;
1247 break;
1248 case 2:
1249 format = SNDRV_PCM_FORMAT_S32_LE;
1250 break;
1251 default:
1252 format = SNDRV_PCM_FORMAT_S16_LE;
1253 break;
1254 }
1255 return format;
1256}
1257
1258static int tdm_get_format_val(int format)
1259{
1260 int value = 0;
1261
1262 switch (format) {
1263 case SNDRV_PCM_FORMAT_S16_LE:
1264 value = 0;
1265 break;
1266 case SNDRV_PCM_FORMAT_S24_LE:
1267 value = 1;
1268 break;
1269 case SNDRV_PCM_FORMAT_S32_LE:
1270 value = 2;
1271 break;
1272 default:
1273 value = 0;
1274 break;
1275 }
1276 return value;
1277}
1278
1279static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_value *ucontrol)
1281{
1282 struct tdm_port port;
1283 int ret = tdm_get_port_idx(kcontrol, &port);
1284
1285 if (ret) {
1286 pr_err("%s: unsupported control: %s\n",
1287 __func__, kcontrol->id.name);
1288 } else {
1289 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1290 tdm_rx_cfg[port.mode][port.channel].bit_format);
1291
1292 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1293 tdm_rx_cfg[port.mode][port.channel].bit_format,
1294 ucontrol->value.enumerated.item[0]);
1295 }
1296 return ret;
1297}
1298
1299static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1300 struct snd_ctl_elem_value *ucontrol)
1301{
1302 struct tdm_port port;
1303 int ret = tdm_get_port_idx(kcontrol, &port);
1304
1305 if (ret) {
1306 pr_err("%s: unsupported control: %s\n",
1307 __func__, kcontrol->id.name);
1308 } else {
1309 tdm_rx_cfg[port.mode][port.channel].bit_format =
1310 tdm_get_format(ucontrol->value.enumerated.item[0]);
1311
1312 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1313 tdm_rx_cfg[port.mode][port.channel].bit_format,
1314 ucontrol->value.enumerated.item[0]);
1315 }
1316 return ret;
1317}
1318
1319static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1320 struct snd_ctl_elem_value *ucontrol)
1321{
1322 struct tdm_port port;
1323 int ret = tdm_get_port_idx(kcontrol, &port);
1324
1325 if (ret) {
1326 pr_err("%s: unsupported control: %s\n",
1327 __func__, kcontrol->id.name);
1328 } else {
1329 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1330 tdm_tx_cfg[port.mode][port.channel].bit_format);
1331
1332 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1333 tdm_tx_cfg[port.mode][port.channel].bit_format,
1334 ucontrol->value.enumerated.item[0]);
1335 }
1336 return ret;
1337}
1338
1339static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1340 struct snd_ctl_elem_value *ucontrol)
1341{
1342 struct tdm_port port;
1343 int ret = tdm_get_port_idx(kcontrol, &port);
1344
1345 if (ret) {
1346 pr_err("%s: unsupported control: %s\n",
1347 __func__, kcontrol->id.name);
1348 } else {
1349 tdm_tx_cfg[port.mode][port.channel].bit_format =
1350 tdm_get_format(ucontrol->value.enumerated.item[0]);
1351
1352 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1353 tdm_tx_cfg[port.mode][port.channel].bit_format,
1354 ucontrol->value.enumerated.item[0]);
1355 }
1356 return ret;
1357}
1358
1359static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1360 struct snd_ctl_elem_value *ucontrol)
1361{
1362 struct tdm_port port;
1363 int ret = tdm_get_port_idx(kcontrol, &port);
1364
1365 if (ret) {
1366 pr_err("%s: unsupported control: %s\n",
1367 __func__, kcontrol->id.name);
1368 } else {
1369
1370 ucontrol->value.enumerated.item[0] =
1371 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1372
1373 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1374 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1375 ucontrol->value.enumerated.item[0]);
1376 }
1377 return ret;
1378}
1379
1380static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1381 struct snd_ctl_elem_value *ucontrol)
1382{
1383 struct tdm_port port;
1384 int ret = tdm_get_port_idx(kcontrol, &port);
1385
1386 if (ret) {
1387 pr_err("%s: unsupported control: %s\n",
1388 __func__, kcontrol->id.name);
1389 } else {
1390 tdm_rx_cfg[port.mode][port.channel].channels =
1391 ucontrol->value.enumerated.item[0] + 1;
1392
1393 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1394 tdm_rx_cfg[port.mode][port.channel].channels,
1395 ucontrol->value.enumerated.item[0] + 1);
1396 }
1397 return ret;
1398}
1399
1400static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1401 struct snd_ctl_elem_value *ucontrol)
1402{
1403 struct tdm_port port;
1404 int ret = tdm_get_port_idx(kcontrol, &port);
1405
1406 if (ret) {
1407 pr_err("%s: unsupported control: %s\n",
1408 __func__, kcontrol->id.name);
1409 } else {
1410 ucontrol->value.enumerated.item[0] =
1411 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1412
1413 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1414 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1415 ucontrol->value.enumerated.item[0]);
1416 }
1417 return ret;
1418}
1419
1420static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_value *ucontrol)
1422{
1423 struct tdm_port port;
1424 int ret = tdm_get_port_idx(kcontrol, &port);
1425
1426 if (ret) {
1427 pr_err("%s: unsupported control: %s\n",
1428 __func__, kcontrol->id.name);
1429 } else {
1430 tdm_tx_cfg[port.mode][port.channel].channels =
1431 ucontrol->value.enumerated.item[0] + 1;
1432
1433 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1434 tdm_tx_cfg[port.mode][port.channel].channels,
1435 ucontrol->value.enumerated.item[0] + 1);
1436 }
1437 return ret;
1438}
1439
1440static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1441{
1442 int idx = 0;
1443
1444 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1445 sizeof("PRIM_AUX_PCM"))) {
1446 idx = PRIM_AUX_PCM;
1447 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1448 sizeof("SEC_AUX_PCM"))) {
1449 idx = SEC_AUX_PCM;
1450 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1451 sizeof("TERT_AUX_PCM"))) {
1452 idx = TERT_AUX_PCM;
1453 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1454 sizeof("QUAT_AUX_PCM"))) {
1455 idx = QUAT_AUX_PCM;
1456 } else {
1457 pr_err("%s: unsupported port: %s\n",
1458 __func__, kcontrol->id.name);
1459 idx = -EINVAL;
1460 }
1461
1462 return idx;
1463}
1464
1465static int aux_pcm_get_sample_rate(int value)
1466{
1467 int sample_rate = 0;
1468
1469 switch (value) {
1470 case 1:
1471 sample_rate = SAMPLING_RATE_16KHZ;
1472 break;
1473 case 0:
1474 default:
1475 sample_rate = SAMPLING_RATE_8KHZ;
1476 break;
1477 }
1478 return sample_rate;
1479}
1480
1481static int aux_pcm_get_sample_rate_val(int sample_rate)
1482{
1483 int sample_rate_val = 0;
1484
1485 switch (sample_rate) {
1486 case SAMPLING_RATE_16KHZ:
1487 sample_rate_val = 1;
1488 break;
1489 case SAMPLING_RATE_8KHZ:
1490 default:
1491 sample_rate_val = 0;
1492 break;
1493 }
1494 return sample_rate_val;
1495}
1496
1497static int mi2s_auxpcm_get_format(int value)
1498{
1499 int format = 0;
1500
1501 switch (value) {
1502 case 0:
1503 format = SNDRV_PCM_FORMAT_S16_LE;
1504 break;
1505 case 1:
1506 format = SNDRV_PCM_FORMAT_S24_LE;
1507 break;
1508 case 2:
1509 format = SNDRV_PCM_FORMAT_S24_3LE;
1510 break;
1511 case 3:
1512 format = SNDRV_PCM_FORMAT_S32_LE;
1513 break;
1514 default:
1515 format = SNDRV_PCM_FORMAT_S16_LE;
1516 break;
1517 }
1518 return format;
1519}
1520
1521static int mi2s_auxpcm_get_format_value(int format)
1522{
1523 int value = 0;
1524
1525 switch (format) {
1526 case SNDRV_PCM_FORMAT_S16_LE:
1527 value = 0;
1528 break;
1529 case SNDRV_PCM_FORMAT_S24_LE:
1530 value = 1;
1531 break;
1532 case SNDRV_PCM_FORMAT_S24_3LE:
1533 value = 2;
1534 break;
1535 case SNDRV_PCM_FORMAT_S32_LE:
1536 value = 3;
1537 break;
1538 default:
1539 value = 0;
1540 break;
1541 }
1542 return value;
1543}
1544
1545static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1546 struct snd_ctl_elem_value *ucontrol)
1547{
1548 int idx = aux_pcm_get_port_idx(kcontrol);
1549
1550 if (idx < 0)
1551 return idx;
1552
1553 ucontrol->value.enumerated.item[0] =
1554 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1555
1556 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1557 idx, aux_pcm_rx_cfg[idx].sample_rate,
1558 ucontrol->value.enumerated.item[0]);
1559
1560 return 0;
1561}
1562
1563static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1564 struct snd_ctl_elem_value *ucontrol)
1565{
1566 int idx = aux_pcm_get_port_idx(kcontrol);
1567
1568 if (idx < 0)
1569 return idx;
1570
1571 aux_pcm_rx_cfg[idx].sample_rate =
1572 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1573
1574 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1575 idx, aux_pcm_rx_cfg[idx].sample_rate,
1576 ucontrol->value.enumerated.item[0]);
1577
1578 return 0;
1579}
1580
1581static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1582 struct snd_ctl_elem_value *ucontrol)
1583{
1584 int idx = aux_pcm_get_port_idx(kcontrol);
1585
1586 if (idx < 0)
1587 return idx;
1588
1589 ucontrol->value.enumerated.item[0] =
1590 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1591
1592 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1593 idx, aux_pcm_tx_cfg[idx].sample_rate,
1594 ucontrol->value.enumerated.item[0]);
1595
1596 return 0;
1597}
1598
1599static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1600 struct snd_ctl_elem_value *ucontrol)
1601{
1602 int idx = aux_pcm_get_port_idx(kcontrol);
1603
1604 if (idx < 0)
1605 return idx;
1606
1607 aux_pcm_tx_cfg[idx].sample_rate =
1608 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1609
1610 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1611 idx, aux_pcm_tx_cfg[idx].sample_rate,
1612 ucontrol->value.enumerated.item[0]);
1613
1614 return 0;
1615}
1616
1617static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1618 struct snd_ctl_elem_value *ucontrol)
1619{
1620 int idx = aux_pcm_get_port_idx(kcontrol);
1621
1622 if (idx < 0)
1623 return idx;
1624
1625 ucontrol->value.enumerated.item[0] =
1626 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1627
1628 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1629 idx, aux_pcm_rx_cfg[idx].bit_format,
1630 ucontrol->value.enumerated.item[0]);
1631
1632 return 0;
1633}
1634
1635static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1636 struct snd_ctl_elem_value *ucontrol)
1637{
1638 int idx = aux_pcm_get_port_idx(kcontrol);
1639
1640 if (idx < 0)
1641 return idx;
1642
1643 aux_pcm_rx_cfg[idx].bit_format =
1644 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1645
1646 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1647 idx, aux_pcm_rx_cfg[idx].bit_format,
1648 ucontrol->value.enumerated.item[0]);
1649
1650 return 0;
1651}
1652
1653static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1654 struct snd_ctl_elem_value *ucontrol)
1655{
1656 int idx = aux_pcm_get_port_idx(kcontrol);
1657
1658 if (idx < 0)
1659 return idx;
1660
1661 ucontrol->value.enumerated.item[0] =
1662 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1663
1664 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1665 idx, aux_pcm_tx_cfg[idx].bit_format,
1666 ucontrol->value.enumerated.item[0]);
1667
1668 return 0;
1669}
1670
1671static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1672 struct snd_ctl_elem_value *ucontrol)
1673{
1674 int idx = aux_pcm_get_port_idx(kcontrol);
1675
1676 if (idx < 0)
1677 return idx;
1678
1679 aux_pcm_tx_cfg[idx].bit_format =
1680 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1681
1682 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1683 idx, aux_pcm_tx_cfg[idx].bit_format,
1684 ucontrol->value.enumerated.item[0]);
1685
1686 return 0;
1687}
1688
1689static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1690{
1691 int idx = 0;
1692
1693 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1694 sizeof("PRIM_MI2S_RX"))) {
1695 idx = PRIM_MI2S;
1696 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1697 sizeof("SEC_MI2S_RX"))) {
1698 idx = SEC_MI2S;
1699 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1700 sizeof("TERT_MI2S_RX"))) {
1701 idx = TERT_MI2S;
1702 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1703 sizeof("QUAT_MI2S_RX"))) {
1704 idx = QUAT_MI2S;
1705 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1706 sizeof("PRIM_MI2S_TX"))) {
1707 idx = PRIM_MI2S;
1708 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1709 sizeof("SEC_MI2S_TX"))) {
1710 idx = SEC_MI2S;
1711 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1712 sizeof("TERT_MI2S_TX"))) {
1713 idx = TERT_MI2S;
1714 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1715 sizeof("QUAT_MI2S_TX"))) {
1716 idx = QUAT_MI2S;
1717 } else {
1718 pr_err("%s: unsupported channel: %s\n",
1719 __func__, kcontrol->id.name);
1720 idx = -EINVAL;
1721 }
1722
1723 return idx;
1724}
1725
1726static int mi2s_get_sample_rate(int value)
1727{
1728 int sample_rate = 0;
1729
1730 switch (value) {
1731 case 0:
1732 sample_rate = SAMPLING_RATE_8KHZ;
1733 break;
1734 case 1:
1735 sample_rate = SAMPLING_RATE_11P025KHZ;
1736 break;
1737 case 2:
1738 sample_rate = SAMPLING_RATE_16KHZ;
1739 break;
1740 case 3:
1741 sample_rate = SAMPLING_RATE_22P05KHZ;
1742 break;
1743 case 4:
1744 sample_rate = SAMPLING_RATE_32KHZ;
1745 break;
1746 case 5:
1747 sample_rate = SAMPLING_RATE_44P1KHZ;
1748 break;
1749 case 6:
1750 sample_rate = SAMPLING_RATE_48KHZ;
1751 break;
1752 case 7:
1753 sample_rate = SAMPLING_RATE_96KHZ;
1754 break;
1755 case 8:
1756 sample_rate = SAMPLING_RATE_192KHZ;
1757 break;
1758 default:
1759 sample_rate = SAMPLING_RATE_48KHZ;
1760 break;
1761 }
1762 return sample_rate;
1763}
1764
1765static int mi2s_get_sample_rate_val(int sample_rate)
1766{
1767 int sample_rate_val = 0;
1768
1769 switch (sample_rate) {
1770 case SAMPLING_RATE_8KHZ:
1771 sample_rate_val = 0;
1772 break;
1773 case SAMPLING_RATE_11P025KHZ:
1774 sample_rate_val = 1;
1775 break;
1776 case SAMPLING_RATE_16KHZ:
1777 sample_rate_val = 2;
1778 break;
1779 case SAMPLING_RATE_22P05KHZ:
1780 sample_rate_val = 3;
1781 break;
1782 case SAMPLING_RATE_32KHZ:
1783 sample_rate_val = 4;
1784 break;
1785 case SAMPLING_RATE_44P1KHZ:
1786 sample_rate_val = 5;
1787 break;
1788 case SAMPLING_RATE_48KHZ:
1789 sample_rate_val = 6;
1790 break;
1791 case SAMPLING_RATE_96KHZ:
1792 sample_rate_val = 7;
1793 break;
1794 case SAMPLING_RATE_192KHZ:
1795 sample_rate_val = 8;
1796 break;
1797 default:
1798 sample_rate_val = 6;
1799 break;
1800 }
1801 return sample_rate_val;
1802}
1803
1804static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_value *ucontrol)
1806{
1807 int idx = mi2s_get_port_idx(kcontrol);
1808
1809 if (idx < 0)
1810 return idx;
1811
1812 ucontrol->value.enumerated.item[0] =
1813 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1814
1815 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1816 idx, mi2s_rx_cfg[idx].sample_rate,
1817 ucontrol->value.enumerated.item[0]);
1818
1819 return 0;
1820}
1821
1822static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1823 struct snd_ctl_elem_value *ucontrol)
1824{
1825 int idx = mi2s_get_port_idx(kcontrol);
1826
1827 if (idx < 0)
1828 return idx;
1829
1830 mi2s_rx_cfg[idx].sample_rate =
1831 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1832
1833 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1834 idx, mi2s_rx_cfg[idx].sample_rate,
1835 ucontrol->value.enumerated.item[0]);
1836
1837 return 0;
1838}
1839
1840static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1841 struct snd_ctl_elem_value *ucontrol)
1842{
1843 int idx = mi2s_get_port_idx(kcontrol);
1844
1845 if (idx < 0)
1846 return idx;
1847
1848 ucontrol->value.enumerated.item[0] =
1849 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1850
1851 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1852 idx, mi2s_tx_cfg[idx].sample_rate,
1853 ucontrol->value.enumerated.item[0]);
1854
1855 return 0;
1856}
1857
1858static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1859 struct snd_ctl_elem_value *ucontrol)
1860{
1861 int idx = mi2s_get_port_idx(kcontrol);
1862
1863 if (idx < 0)
1864 return idx;
1865
1866 mi2s_tx_cfg[idx].sample_rate =
1867 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1868
1869 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1870 idx, mi2s_tx_cfg[idx].sample_rate,
1871 ucontrol->value.enumerated.item[0]);
1872
1873 return 0;
1874}
1875
1876static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1877 struct snd_ctl_elem_value *ucontrol)
1878{
1879 int idx = mi2s_get_port_idx(kcontrol);
1880
1881 if (idx < 0)
1882 return idx;
1883
1884 ucontrol->value.enumerated.item[0] =
1885 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
1886
1887 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1888 idx, mi2s_rx_cfg[idx].bit_format,
1889 ucontrol->value.enumerated.item[0]);
1890
1891 return 0;
1892}
1893
1894static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1895 struct snd_ctl_elem_value *ucontrol)
1896{
1897 int idx = mi2s_get_port_idx(kcontrol);
1898
1899 if (idx < 0)
1900 return idx;
1901
1902 mi2s_rx_cfg[idx].bit_format =
1903 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1904
1905 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1906 idx, mi2s_rx_cfg[idx].bit_format,
1907 ucontrol->value.enumerated.item[0]);
1908
1909 return 0;
1910}
1911
1912static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1913 struct snd_ctl_elem_value *ucontrol)
1914{
1915 int idx = mi2s_get_port_idx(kcontrol);
1916
1917 if (idx < 0)
1918 return idx;
1919
1920 ucontrol->value.enumerated.item[0] =
1921 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
1922
1923 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1924 idx, mi2s_tx_cfg[idx].bit_format,
1925 ucontrol->value.enumerated.item[0]);
1926
1927 return 0;
1928}
1929
1930static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1931 struct snd_ctl_elem_value *ucontrol)
1932{
1933 int idx = mi2s_get_port_idx(kcontrol);
1934
1935 if (idx < 0)
1936 return idx;
1937
1938 mi2s_tx_cfg[idx].bit_format =
1939 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1940
1941 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1942 idx, mi2s_tx_cfg[idx].bit_format,
1943 ucontrol->value.enumerated.item[0]);
1944
1945 return 0;
1946}
1947static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1948 struct snd_ctl_elem_value *ucontrol)
1949{
1950 int idx = mi2s_get_port_idx(kcontrol);
1951
1952 if (idx < 0)
1953 return idx;
1954
1955 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1956 idx, mi2s_rx_cfg[idx].channels);
1957 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1958
1959 return 0;
1960}
1961
1962static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1963 struct snd_ctl_elem_value *ucontrol)
1964{
1965 int idx = mi2s_get_port_idx(kcontrol);
1966
1967 if (idx < 0)
1968 return idx;
1969
1970 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1971 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1972 idx, mi2s_rx_cfg[idx].channels);
1973
1974 return 1;
1975}
1976
1977static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1978 struct snd_ctl_elem_value *ucontrol)
1979{
1980 int idx = mi2s_get_port_idx(kcontrol);
1981
1982 if (idx < 0)
1983 return idx;
1984
1985 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1986 idx, mi2s_tx_cfg[idx].channels);
1987 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1988
1989 return 0;
1990}
1991
1992static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1993 struct snd_ctl_elem_value *ucontrol)
1994{
1995 int idx = mi2s_get_port_idx(kcontrol);
1996
1997 if (idx < 0)
1998 return idx;
1999
2000 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2001 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2002 idx, mi2s_tx_cfg[idx].channels);
2003
2004 return 1;
2005}
2006
2007static int msm_get_port_id(int be_id)
2008{
2009 int afe_port_id = 0;
2010
2011 switch (be_id) {
2012 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2013 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2014 break;
2015 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2016 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2017 break;
2018 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2019 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2020 break;
2021 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2022 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2023 break;
2024 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2025 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2026 break;
2027 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2028 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2029 break;
2030 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2031 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2032 break;
2033 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2034 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2035 break;
2036 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2037 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2038 break;
2039 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2040 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2041 break;
2042 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2043 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2044 break;
2045 default:
2046 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2047 afe_port_id = -EINVAL;
2048 }
2049
2050 return afe_port_id;
2051}
2052
2053static u32 get_mi2s_bits_per_sample(u32 bit_format)
2054{
2055 u32 bit_per_sample = 0;
2056
2057 switch (bit_format) {
2058 case SNDRV_PCM_FORMAT_S32_LE:
2059 case SNDRV_PCM_FORMAT_S24_3LE:
2060 case SNDRV_PCM_FORMAT_S24_LE:
2061 bit_per_sample = 32;
2062 break;
2063 case SNDRV_PCM_FORMAT_S16_LE:
2064 default:
2065 bit_per_sample = 16;
2066 break;
2067 }
2068
2069 return bit_per_sample;
2070}
2071
2072static void update_mi2s_clk_val(int dai_id, int stream)
2073{
2074 u32 bit_per_sample = 0;
2075
2076 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2077 bit_per_sample =
2078 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2079 mi2s_clk[dai_id].clk_freq_in_hz =
2080 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2081 } else {
2082 bit_per_sample =
2083 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2084 mi2s_clk[dai_id].clk_freq_in_hz =
2085 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2086 }
2087}
2088
2089static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2090{
2091 int ret = 0;
2092 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2093 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2094 int port_id = 0;
2095 int index = cpu_dai->id;
2096
2097 port_id = msm_get_port_id(rtd->dai_link->id);
2098 if (port_id < 0) {
2099 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2100 ret = port_id;
2101 goto err;
2102 }
2103
2104 if (enable) {
2105 update_mi2s_clk_val(index, substream->stream);
2106 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2107 mi2s_clk[index].clk_freq_in_hz);
2108 }
2109
2110 mi2s_clk[index].enable = enable;
2111 ret = afe_set_lpass_clock_v2(port_id,
2112 &mi2s_clk[index]);
2113 if (ret < 0) {
2114 dev_err(rtd->card->dev,
2115 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2116 __func__, port_id, ret);
2117 goto err;
2118 }
2119
2120err:
2121 return ret;
2122}
2123
2124static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2125{
2126 int idx = 0;
2127
2128 if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2129 sizeof("RX_CDC_DMA_RX_0")))
2130 idx = RX_CDC_DMA_RX_0;
2131 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2132 sizeof("RX_CDC_DMA_RX_1")))
2133 idx = RX_CDC_DMA_RX_1;
2134 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2135 sizeof("RX_CDC_DMA_RX_2")))
2136 idx = RX_CDC_DMA_RX_2;
2137 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2138 sizeof("RX_CDC_DMA_RX_3")))
2139 idx = RX_CDC_DMA_RX_3;
2140 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2141 sizeof("RX_CDC_DMA_RX_5")))
2142 idx = RX_CDC_DMA_RX_5;
2143 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2144 sizeof("TX_CDC_DMA_TX_0")))
2145 idx = TX_CDC_DMA_TX_0;
2146 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2147 sizeof("TX_CDC_DMA_TX_3")))
2148 idx = TX_CDC_DMA_TX_3;
2149 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2150 sizeof("TX_CDC_DMA_TX_4")))
2151 idx = TX_CDC_DMA_TX_4;
2152 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2153 sizeof("VA_CDC_DMA_TX_0")))
2154 idx = VA_CDC_DMA_TX_0;
2155 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2156 sizeof("VA_CDC_DMA_TX_1")))
2157 idx = VA_CDC_DMA_TX_1;
2158 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2159 sizeof("VA_CDC_DMA_TX_2")))
2160 idx = VA_CDC_DMA_TX_2;
2161 else {
2162 pr_err("%s: unsupported channel: %s\n",
2163 __func__, kcontrol->id.name);
2164 return -EINVAL;
2165 }
2166
2167 return idx;
2168}
2169
2170static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2171 struct snd_ctl_elem_value *ucontrol)
2172{
2173 int ch_num = cdc_dma_get_port_idx(kcontrol);
2174
2175 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2176 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2177 return ch_num;
2178 }
2179
2180 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2181 cdc_dma_rx_cfg[ch_num].channels - 1);
2182 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2183 return 0;
2184}
2185
2186static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2187 struct snd_ctl_elem_value *ucontrol)
2188{
2189 int ch_num = cdc_dma_get_port_idx(kcontrol);
2190
2191 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2192 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2193 return ch_num;
2194 }
2195
2196 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2197
2198 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2199 cdc_dma_rx_cfg[ch_num].channels);
2200 return 1;
2201}
2202
2203static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2204 struct snd_ctl_elem_value *ucontrol)
2205{
2206 int ch_num = cdc_dma_get_port_idx(kcontrol);
2207
2208 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2209 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2210 return ch_num;
2211 }
2212
2213 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2214 case SNDRV_PCM_FORMAT_S32_LE:
2215 ucontrol->value.integer.value[0] = 3;
2216 break;
2217 case SNDRV_PCM_FORMAT_S24_3LE:
2218 ucontrol->value.integer.value[0] = 2;
2219 break;
2220 case SNDRV_PCM_FORMAT_S24_LE:
2221 ucontrol->value.integer.value[0] = 1;
2222 break;
2223 case SNDRV_PCM_FORMAT_S16_LE:
2224 default:
2225 ucontrol->value.integer.value[0] = 0;
2226 break;
2227 }
2228
2229 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2230 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2231 ucontrol->value.integer.value[0]);
2232 return 0;
2233}
2234
2235static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2236 struct snd_ctl_elem_value *ucontrol)
2237{
2238 int rc = 0;
2239 int ch_num = cdc_dma_get_port_idx(kcontrol);
2240
2241 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2242 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2243 return ch_num;
2244 }
2245
2246 switch (ucontrol->value.integer.value[0]) {
2247 case 3:
2248 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2249 break;
2250 case 2:
2251 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2252 break;
2253 case 1:
2254 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2255 break;
2256 case 0:
2257 default:
2258 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2259 break;
2260 }
2261 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2262 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2263 ucontrol->value.integer.value[0]);
2264
2265 return rc;
2266}
2267
2268
2269static int cdc_dma_get_sample_rate_val(int sample_rate)
2270{
2271 int sample_rate_val = 0;
2272
2273 switch (sample_rate) {
2274 case SAMPLING_RATE_8KHZ:
2275 sample_rate_val = 0;
2276 break;
2277 case SAMPLING_RATE_11P025KHZ:
2278 sample_rate_val = 1;
2279 break;
2280 case SAMPLING_RATE_16KHZ:
2281 sample_rate_val = 2;
2282 break;
2283 case SAMPLING_RATE_22P05KHZ:
2284 sample_rate_val = 3;
2285 break;
2286 case SAMPLING_RATE_32KHZ:
2287 sample_rate_val = 4;
2288 break;
2289 case SAMPLING_RATE_44P1KHZ:
2290 sample_rate_val = 5;
2291 break;
2292 case SAMPLING_RATE_48KHZ:
2293 sample_rate_val = 6;
2294 break;
2295 case SAMPLING_RATE_88P2KHZ:
2296 sample_rate_val = 7;
2297 break;
2298 case SAMPLING_RATE_96KHZ:
2299 sample_rate_val = 8;
2300 break;
2301 case SAMPLING_RATE_176P4KHZ:
2302 sample_rate_val = 9;
2303 break;
2304 case SAMPLING_RATE_192KHZ:
2305 sample_rate_val = 10;
2306 break;
2307 case SAMPLING_RATE_352P8KHZ:
2308 sample_rate_val = 11;
2309 break;
2310 case SAMPLING_RATE_384KHZ:
2311 sample_rate_val = 12;
2312 break;
2313 default:
2314 sample_rate_val = 6;
2315 break;
2316 }
2317 return sample_rate_val;
2318}
2319
2320static int cdc_dma_get_sample_rate(int value)
2321{
2322 int sample_rate = 0;
2323
2324 switch (value) {
2325 case 0:
2326 sample_rate = SAMPLING_RATE_8KHZ;
2327 break;
2328 case 1:
2329 sample_rate = SAMPLING_RATE_11P025KHZ;
2330 break;
2331 case 2:
2332 sample_rate = SAMPLING_RATE_16KHZ;
2333 break;
2334 case 3:
2335 sample_rate = SAMPLING_RATE_22P05KHZ;
2336 break;
2337 case 4:
2338 sample_rate = SAMPLING_RATE_32KHZ;
2339 break;
2340 case 5:
2341 sample_rate = SAMPLING_RATE_44P1KHZ;
2342 break;
2343 case 6:
2344 sample_rate = SAMPLING_RATE_48KHZ;
2345 break;
2346 case 7:
2347 sample_rate = SAMPLING_RATE_88P2KHZ;
2348 break;
2349 case 8:
2350 sample_rate = SAMPLING_RATE_96KHZ;
2351 break;
2352 case 9:
2353 sample_rate = SAMPLING_RATE_176P4KHZ;
2354 break;
2355 case 10:
2356 sample_rate = SAMPLING_RATE_192KHZ;
2357 break;
2358 case 11:
2359 sample_rate = SAMPLING_RATE_352P8KHZ;
2360 break;
2361 case 12:
2362 sample_rate = SAMPLING_RATE_384KHZ;
2363 break;
2364 default:
2365 sample_rate = SAMPLING_RATE_48KHZ;
2366 break;
2367 }
2368 return sample_rate;
2369}
2370
2371static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2372 struct snd_ctl_elem_value *ucontrol)
2373{
2374 int ch_num = cdc_dma_get_port_idx(kcontrol);
2375
2376 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2377 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2378 return ch_num;
2379 }
2380
2381 ucontrol->value.enumerated.item[0] =
2382 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2383
2384 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2385 cdc_dma_rx_cfg[ch_num].sample_rate);
2386 return 0;
2387}
2388
2389static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2390 struct snd_ctl_elem_value *ucontrol)
2391{
2392 int ch_num = cdc_dma_get_port_idx(kcontrol);
2393
2394 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2395 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2396 return ch_num;
2397 }
2398
2399 cdc_dma_rx_cfg[ch_num].sample_rate =
2400 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2401
2402
2403 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2404 __func__, ucontrol->value.enumerated.item[0],
2405 cdc_dma_rx_cfg[ch_num].sample_rate);
2406 return 0;
2407}
2408
2409static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2410 struct snd_ctl_elem_value *ucontrol)
2411{
2412 int ch_num = cdc_dma_get_port_idx(kcontrol);
2413
2414 if (ch_num < 0) {
2415 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2416 return ch_num;
2417 }
2418
2419 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2420 cdc_dma_tx_cfg[ch_num].channels);
2421 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2422 return 0;
2423}
2424
2425static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2426 struct snd_ctl_elem_value *ucontrol)
2427{
2428 int ch_num = cdc_dma_get_port_idx(kcontrol);
2429
2430 if (ch_num < 0) {
2431 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2432 return ch_num;
2433 }
2434
2435 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2436
2437 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2438 cdc_dma_tx_cfg[ch_num].channels);
2439 return 1;
2440}
2441
2442static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2443 struct snd_ctl_elem_value *ucontrol)
2444{
2445 int sample_rate_val;
2446 int ch_num = cdc_dma_get_port_idx(kcontrol);
2447
2448 if (ch_num < 0) {
2449 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2450 return ch_num;
2451 }
2452
2453 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2454 case SAMPLING_RATE_384KHZ:
2455 sample_rate_val = 12;
2456 break;
2457 case SAMPLING_RATE_352P8KHZ:
2458 sample_rate_val = 11;
2459 break;
2460 case SAMPLING_RATE_192KHZ:
2461 sample_rate_val = 10;
2462 break;
2463 case SAMPLING_RATE_176P4KHZ:
2464 sample_rate_val = 9;
2465 break;
2466 case SAMPLING_RATE_96KHZ:
2467 sample_rate_val = 8;
2468 break;
2469 case SAMPLING_RATE_88P2KHZ:
2470 sample_rate_val = 7;
2471 break;
2472 case SAMPLING_RATE_48KHZ:
2473 sample_rate_val = 6;
2474 break;
2475 case SAMPLING_RATE_44P1KHZ:
2476 sample_rate_val = 5;
2477 break;
2478 case SAMPLING_RATE_32KHZ:
2479 sample_rate_val = 4;
2480 break;
2481 case SAMPLING_RATE_22P05KHZ:
2482 sample_rate_val = 3;
2483 break;
2484 case SAMPLING_RATE_16KHZ:
2485 sample_rate_val = 2;
2486 break;
2487 case SAMPLING_RATE_11P025KHZ:
2488 sample_rate_val = 1;
2489 break;
2490 case SAMPLING_RATE_8KHZ:
2491 sample_rate_val = 0;
2492 break;
2493 default:
2494 sample_rate_val = 6;
2495 break;
2496 }
2497
2498 ucontrol->value.integer.value[0] = sample_rate_val;
2499 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2500 cdc_dma_tx_cfg[ch_num].sample_rate);
2501 return 0;
2502}
2503
2504static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2505 struct snd_ctl_elem_value *ucontrol)
2506{
2507 int ch_num = cdc_dma_get_port_idx(kcontrol);
2508
2509 if (ch_num < 0) {
2510 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2511 return ch_num;
2512 }
2513
2514 switch (ucontrol->value.integer.value[0]) {
2515 case 12:
2516 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2517 break;
2518 case 11:
2519 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2520 break;
2521 case 10:
2522 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2523 break;
2524 case 9:
2525 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2526 break;
2527 case 8:
2528 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2529 break;
2530 case 7:
2531 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2532 break;
2533 case 6:
2534 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2535 break;
2536 case 5:
2537 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2538 break;
2539 case 4:
2540 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2541 break;
2542 case 3:
2543 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2544 break;
2545 case 2:
2546 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2547 break;
2548 case 1:
2549 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2550 break;
2551 case 0:
2552 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2553 break;
2554 default:
2555 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2556 break;
2557 }
2558
2559 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2560 __func__, ucontrol->value.integer.value[0],
2561 cdc_dma_tx_cfg[ch_num].sample_rate);
2562 return 0;
2563}
2564
2565static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2566 struct snd_ctl_elem_value *ucontrol)
2567{
2568 int ch_num = cdc_dma_get_port_idx(kcontrol);
2569
2570 if (ch_num < 0) {
2571 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2572 return ch_num;
2573 }
2574
2575 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2576 case SNDRV_PCM_FORMAT_S32_LE:
2577 ucontrol->value.integer.value[0] = 3;
2578 break;
2579 case SNDRV_PCM_FORMAT_S24_3LE:
2580 ucontrol->value.integer.value[0] = 2;
2581 break;
2582 case SNDRV_PCM_FORMAT_S24_LE:
2583 ucontrol->value.integer.value[0] = 1;
2584 break;
2585 case SNDRV_PCM_FORMAT_S16_LE:
2586 default:
2587 ucontrol->value.integer.value[0] = 0;
2588 break;
2589 }
2590
2591 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2592 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2593 ucontrol->value.integer.value[0]);
2594 return 0;
2595}
2596
2597static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2598 struct snd_ctl_elem_value *ucontrol)
2599{
2600 int rc = 0;
2601 int ch_num = cdc_dma_get_port_idx(kcontrol);
2602
2603 if (ch_num < 0) {
2604 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2605 return ch_num;
2606 }
2607
2608 switch (ucontrol->value.integer.value[0]) {
2609 case 3:
2610 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2611 break;
2612 case 2:
2613 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2614 break;
2615 case 1:
2616 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2617 break;
2618 case 0:
2619 default:
2620 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2621 break;
2622 }
2623 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2624 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2625 ucontrol->value.integer.value[0]);
2626
2627 return rc;
2628}
2629
2630static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2631{
2632 int idx = 0;
2633
2634 switch (be_id) {
2635 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2636 idx = RX_CDC_DMA_RX_0;
2637 break;
2638 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2639 idx = RX_CDC_DMA_RX_1;
2640 break;
2641 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2642 idx = RX_CDC_DMA_RX_2;
2643 break;
2644 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2645 idx = RX_CDC_DMA_RX_3;
2646 break;
2647 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2648 idx = RX_CDC_DMA_RX_5;
2649 break;
2650 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2651 idx = TX_CDC_DMA_TX_0;
2652 break;
2653 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2654 idx = TX_CDC_DMA_TX_3;
2655 break;
2656 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2657 idx = TX_CDC_DMA_TX_4;
2658 break;
2659 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2660 idx = VA_CDC_DMA_TX_0;
2661 break;
2662 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2663 idx = VA_CDC_DMA_TX_1;
2664 break;
2665 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2666 idx = VA_CDC_DMA_TX_2;
2667 break;
2668 default:
2669 idx = RX_CDC_DMA_RX_0;
2670 break;
2671 }
2672
2673 return idx;
2674}
2675
2676static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2677 struct snd_ctl_elem_value *ucontrol)
2678{
2679 /*
2680 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2681 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2682 * value.
2683 */
2684 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2685 case SAMPLING_RATE_96KHZ:
2686 ucontrol->value.integer.value[0] = 5;
2687 break;
2688 case SAMPLING_RATE_88P2KHZ:
2689 ucontrol->value.integer.value[0] = 4;
2690 break;
2691 case SAMPLING_RATE_48KHZ:
2692 ucontrol->value.integer.value[0] = 3;
2693 break;
2694 case SAMPLING_RATE_44P1KHZ:
2695 ucontrol->value.integer.value[0] = 2;
2696 break;
2697 case SAMPLING_RATE_16KHZ:
2698 ucontrol->value.integer.value[0] = 1;
2699 break;
2700 case SAMPLING_RATE_8KHZ:
2701 default:
2702 ucontrol->value.integer.value[0] = 0;
2703 break;
2704 }
2705 pr_debug("%s: sample rate = %d\n", __func__,
2706 slim_rx_cfg[SLIM_RX_7].sample_rate);
2707
2708 return 0;
2709}
2710
2711static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2712 struct snd_ctl_elem_value *ucontrol)
2713{
2714 switch (ucontrol->value.integer.value[0]) {
2715 case 1:
2716 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2717 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2718 break;
2719 case 2:
2720 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2721 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2722 break;
2723 case 3:
2724 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2725 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2726 break;
2727 case 4:
2728 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2729 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2730 break;
2731 case 5:
2732 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2733 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2734 break;
2735 case 0:
2736 default:
2737 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2738 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2739 break;
2740 }
2741 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2742 __func__,
2743 slim_rx_cfg[SLIM_RX_7].sample_rate,
2744 slim_tx_cfg[SLIM_TX_7].sample_rate,
2745 ucontrol->value.enumerated.item[0]);
2746
2747 return 0;
2748}
2749
2750static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2751 struct snd_ctl_elem_value *ucontrol)
2752{
2753 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2754 case SAMPLING_RATE_96KHZ:
2755 ucontrol->value.integer.value[0] = 5;
2756 break;
2757 case SAMPLING_RATE_88P2KHZ:
2758 ucontrol->value.integer.value[0] = 4;
2759 break;
2760 case SAMPLING_RATE_48KHZ:
2761 ucontrol->value.integer.value[0] = 3;
2762 break;
2763 case SAMPLING_RATE_44P1KHZ:
2764 ucontrol->value.integer.value[0] = 2;
2765 break;
2766 case SAMPLING_RATE_16KHZ:
2767 ucontrol->value.integer.value[0] = 1;
2768 break;
2769 case SAMPLING_RATE_8KHZ:
2770 default:
2771 ucontrol->value.integer.value[0] = 0;
2772 break;
2773 }
2774 pr_debug("%s: sample rate rx = %d\n", __func__,
2775 slim_rx_cfg[SLIM_RX_7].sample_rate);
2776
2777 return 0;
2778}
2779
2780static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2781 struct snd_ctl_elem_value *ucontrol)
2782{
2783 switch (ucontrol->value.integer.value[0]) {
2784 case 1:
2785 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2786 break;
2787 case 2:
2788 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2789 break;
2790 case 3:
2791 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2792 break;
2793 case 4:
2794 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2795 break;
2796 case 5:
2797 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2798 break;
2799 case 0:
2800 default:
2801 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2802 break;
2803 }
2804 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2805 __func__,
2806 slim_rx_cfg[SLIM_RX_7].sample_rate,
2807 ucontrol->value.enumerated.item[0]);
2808
2809 return 0;
2810}
2811
2812static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
2813 struct snd_ctl_elem_value *ucontrol)
2814{
2815 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
2816 case SAMPLING_RATE_96KHZ:
2817 ucontrol->value.integer.value[0] = 5;
2818 break;
2819 case SAMPLING_RATE_88P2KHZ:
2820 ucontrol->value.integer.value[0] = 4;
2821 break;
2822 case SAMPLING_RATE_48KHZ:
2823 ucontrol->value.integer.value[0] = 3;
2824 break;
2825 case SAMPLING_RATE_44P1KHZ:
2826 ucontrol->value.integer.value[0] = 2;
2827 break;
2828 case SAMPLING_RATE_16KHZ:
2829 ucontrol->value.integer.value[0] = 1;
2830 break;
2831 case SAMPLING_RATE_8KHZ:
2832 default:
2833 ucontrol->value.integer.value[0] = 0;
2834 break;
2835 }
2836 pr_debug("%s: sample rate tx = %d\n", __func__,
2837 slim_tx_cfg[SLIM_TX_7].sample_rate);
2838
2839 return 0;
2840}
2841
2842static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
2843 struct snd_ctl_elem_value *ucontrol)
2844{
2845 switch (ucontrol->value.integer.value[0]) {
2846 case 1:
2847 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2848 break;
2849 case 2:
2850 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2851 break;
2852 case 3:
2853 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2854 break;
2855 case 4:
2856 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2857 break;
2858 case 5:
2859 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2860 break;
2861 case 0:
2862 default:
2863 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2864 break;
2865 }
2866 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
2867 __func__,
2868 slim_tx_cfg[SLIM_TX_7].sample_rate,
2869 ucontrol->value.enumerated.item[0]);
2870
2871 return 0;
2872}
2873
2874static const struct snd_kcontrol_new msm_int_snd_controls[] = {
2875 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
2876 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2877 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
2878 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2879 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
2880 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2881 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
2882 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2883 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
2884 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2885 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
2886 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2887 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
2888 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2889 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
2890 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2891 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
2892 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2893 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
2894 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2895 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
2896 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2897 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
2898 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2899 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
2900 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2901 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
2902 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2903 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
2904 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2905 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
2906 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2907 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
2908 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2909 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
2910 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2911 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
2912 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2913 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
2914 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2915 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
2916 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2917 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
2918 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2919 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
2920 rx_cdc_dma_rx_0_sample_rate,
2921 cdc_dma_rx_sample_rate_get,
2922 cdc_dma_rx_sample_rate_put),
2923 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
2924 rx_cdc_dma_rx_1_sample_rate,
2925 cdc_dma_rx_sample_rate_get,
2926 cdc_dma_rx_sample_rate_put),
2927 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
2928 rx_cdc_dma_rx_2_sample_rate,
2929 cdc_dma_rx_sample_rate_get,
2930 cdc_dma_rx_sample_rate_put),
2931 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
2932 rx_cdc_dma_rx_3_sample_rate,
2933 cdc_dma_rx_sample_rate_get,
2934 cdc_dma_rx_sample_rate_put),
2935 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
2936 rx_cdc_dma_rx_5_sample_rate,
2937 cdc_dma_rx_sample_rate_get,
2938 cdc_dma_rx_sample_rate_put),
2939 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
2940 tx_cdc_dma_tx_0_sample_rate,
2941 cdc_dma_tx_sample_rate_get,
2942 cdc_dma_tx_sample_rate_put),
2943 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
2944 tx_cdc_dma_tx_3_sample_rate,
2945 cdc_dma_tx_sample_rate_get,
2946 cdc_dma_tx_sample_rate_put),
2947 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
2948 tx_cdc_dma_tx_4_sample_rate,
2949 cdc_dma_tx_sample_rate_get,
2950 cdc_dma_tx_sample_rate_put),
2951 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
2952 va_cdc_dma_tx_0_sample_rate,
2953 cdc_dma_tx_sample_rate_get,
2954 cdc_dma_tx_sample_rate_put),
2955 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
2956 va_cdc_dma_tx_1_sample_rate,
2957 cdc_dma_tx_sample_rate_get,
2958 cdc_dma_tx_sample_rate_put),
2959 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
2960 va_cdc_dma_tx_2_sample_rate,
2961 cdc_dma_tx_sample_rate_get,
2962 cdc_dma_tx_sample_rate_put),
2963};
2964
2965static const struct snd_kcontrol_new msm_common_snd_controls[] = {
2966 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
2967 usb_audio_rx_sample_rate_get,
2968 usb_audio_rx_sample_rate_put),
2969 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
2970 usb_audio_tx_sample_rate_get,
2971 usb_audio_tx_sample_rate_put),
2972 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2973 tdm_rx_sample_rate_get,
2974 tdm_rx_sample_rate_put),
2975 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2976 tdm_rx_sample_rate_get,
2977 tdm_rx_sample_rate_put),
2978 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2979 tdm_rx_sample_rate_get,
2980 tdm_rx_sample_rate_put),
2981 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2982 tdm_rx_sample_rate_get,
2983 tdm_rx_sample_rate_put),
2984 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2985 tdm_tx_sample_rate_get,
2986 tdm_tx_sample_rate_put),
2987 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2988 tdm_tx_sample_rate_get,
2989 tdm_tx_sample_rate_put),
2990 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2991 tdm_tx_sample_rate_get,
2992 tdm_tx_sample_rate_put),
2993 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2994 tdm_tx_sample_rate_get,
2995 tdm_tx_sample_rate_put),
2996 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
2997 aux_pcm_rx_sample_rate_get,
2998 aux_pcm_rx_sample_rate_put),
2999 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3000 aux_pcm_rx_sample_rate_get,
3001 aux_pcm_rx_sample_rate_put),
3002 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3003 aux_pcm_rx_sample_rate_get,
3004 aux_pcm_rx_sample_rate_put),
3005 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3006 aux_pcm_rx_sample_rate_get,
3007 aux_pcm_rx_sample_rate_put),
3008 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3009 aux_pcm_tx_sample_rate_get,
3010 aux_pcm_tx_sample_rate_put),
3011 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3012 aux_pcm_tx_sample_rate_get,
3013 aux_pcm_tx_sample_rate_put),
3014 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3015 aux_pcm_tx_sample_rate_get,
3016 aux_pcm_tx_sample_rate_put),
3017 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3018 aux_pcm_tx_sample_rate_get,
3019 aux_pcm_tx_sample_rate_put),
3020 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3021 mi2s_rx_sample_rate_get,
3022 mi2s_rx_sample_rate_put),
3023 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3024 mi2s_rx_sample_rate_get,
3025 mi2s_rx_sample_rate_put),
3026 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3027 mi2s_rx_sample_rate_get,
3028 mi2s_rx_sample_rate_put),
3029 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3030 mi2s_rx_sample_rate_get,
3031 mi2s_rx_sample_rate_put),
3032 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3033 mi2s_tx_sample_rate_get,
3034 mi2s_tx_sample_rate_put),
3035 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3036 mi2s_tx_sample_rate_get,
3037 mi2s_tx_sample_rate_put),
3038 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3039 mi2s_tx_sample_rate_get,
3040 mi2s_tx_sample_rate_put),
3041 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3042 mi2s_tx_sample_rate_get,
3043 mi2s_tx_sample_rate_put),
3044 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3045 usb_audio_rx_format_get, usb_audio_rx_format_put),
3046 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3047 usb_audio_tx_format_get, usb_audio_tx_format_put),
3048 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3049 tdm_rx_format_get,
3050 tdm_rx_format_put),
3051 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3052 tdm_rx_format_get,
3053 tdm_rx_format_put),
3054 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3055 tdm_rx_format_get,
3056 tdm_rx_format_put),
3057 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3058 tdm_rx_format_get,
3059 tdm_rx_format_put),
3060 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3061 tdm_tx_format_get,
3062 tdm_tx_format_put),
3063 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3064 tdm_tx_format_get,
3065 tdm_tx_format_put),
3066 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3067 tdm_tx_format_get,
3068 tdm_tx_format_put),
3069 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3070 tdm_tx_format_get,
3071 tdm_tx_format_put),
3072 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3073 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3074 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3075 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3076 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3077 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3078 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3079 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3080 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3081 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3082 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3083 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3084 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3085 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3086 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3087 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3088 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3089 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3090 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3091 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3092 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3093 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3094 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3095 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3096 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3097 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3098 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3099 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3100 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3101 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3102 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3103 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3104 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3105 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3106 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3107 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3108 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3109 proxy_rx_ch_get, proxy_rx_ch_put),
3110 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3111 tdm_rx_ch_get,
3112 tdm_rx_ch_put),
3113 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3114 tdm_rx_ch_get,
3115 tdm_rx_ch_put),
3116 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3117 tdm_rx_ch_get,
3118 tdm_rx_ch_put),
3119 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3120 tdm_rx_ch_get,
3121 tdm_rx_ch_put),
3122 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3123 tdm_tx_ch_get,
3124 tdm_tx_ch_put),
3125 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3126 tdm_tx_ch_get,
3127 tdm_tx_ch_put),
3128 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3129 tdm_tx_ch_get,
3130 tdm_tx_ch_put),
3131 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3132 tdm_tx_ch_get,
3133 tdm_tx_ch_put),
3134 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3135 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3136 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3137 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3138 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3139 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3140 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3141 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3142 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3143 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3144 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3145 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3146 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3147 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3148 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3149 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3150 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3151 msm_bt_sample_rate_get,
3152 msm_bt_sample_rate_put),
3153 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3154 msm_bt_sample_rate_rx_get,
3155 msm_bt_sample_rate_rx_put),
3156 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3157 msm_bt_sample_rate_tx_get,
3158 msm_bt_sample_rate_tx_put),
3159 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3160 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3161 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3162 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3163};
3164
3165static const struct snd_kcontrol_new msm_snd_controls[] = {
3166 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3167 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3168 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3169 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3170 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3171 aux_pcm_rx_sample_rate_get,
3172 aux_pcm_rx_sample_rate_put),
3173 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3174 aux_pcm_tx_sample_rate_get,
3175 aux_pcm_tx_sample_rate_put),
3176};
3177
3178static int bengal_send_island_va_config(int32_t be_id)
3179{
3180 int rc = 0;
3181 int port_id = 0xFFFF;
3182
3183 port_id = msm_get_port_id(be_id);
3184 if (port_id < 0) {
3185 pr_err("%s: Invalid island interface, be_id: %d\n",
3186 __func__, be_id);
3187 rc = -EINVAL;
3188 } else {
3189 /*
3190 * send island mode config
3191 * This should be the first configuration
3192 */
3193 rc = afe_send_port_island_mode(port_id);
3194 if (rc)
3195 pr_err("%s: afe send island mode failed %d\n",
3196 __func__, rc);
3197 }
3198
3199 return rc;
3200}
3201
3202static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3203 struct snd_pcm_hw_params *params)
3204{
3205 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3206 struct snd_interval *rate = hw_param_interval(params,
3207 SNDRV_PCM_HW_PARAM_RATE);
3208 struct snd_interval *channels = hw_param_interval(params,
3209 SNDRV_PCM_HW_PARAM_CHANNELS);
3210 int idx = 0;
3211
3212 pr_debug("%s: format = %d, rate = %d\n",
3213 __func__, params_format(params), params_rate(params));
3214
3215 switch (dai_link->id) {
3216 case MSM_BACKEND_DAI_USB_RX:
3217 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3218 usb_rx_cfg.bit_format);
3219 rate->min = rate->max = usb_rx_cfg.sample_rate;
3220 channels->min = channels->max = usb_rx_cfg.channels;
3221 break;
3222
3223 case MSM_BACKEND_DAI_USB_TX:
3224 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3225 usb_tx_cfg.bit_format);
3226 rate->min = rate->max = usb_tx_cfg.sample_rate;
3227 channels->min = channels->max = usb_tx_cfg.channels;
3228 break;
3229
3230 case MSM_BACKEND_DAI_AFE_PCM_RX:
3231 channels->min = channels->max = proxy_rx_cfg.channels;
3232 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3233 break;
3234
3235 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3236 channels->min = channels->max =
3237 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3238 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3239 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3240 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3241 break;
3242
3243 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3244 channels->min = channels->max =
3245 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3247 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3248 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3249 break;
3250
3251 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3252 channels->min = channels->max =
3253 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3255 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3256 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3257 break;
3258
3259 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3260 channels->min = channels->max =
3261 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3263 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3264 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3265 break;
3266
3267 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3268 channels->min = channels->max =
3269 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3270 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3271 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3272 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3273 break;
3274
3275 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3276 channels->min = channels->max =
3277 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3278 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3279 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3280 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3281 break;
3282
3283 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3284 channels->min = channels->max =
3285 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3286 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3287 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3288 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3289 break;
3290
3291 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3292 channels->min = channels->max =
3293 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3294 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3295 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3296 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3297 break;
3298
3299 case MSM_BACKEND_DAI_AUXPCM_RX:
3300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3301 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3302 rate->min = rate->max =
3303 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3304 channels->min = channels->max =
3305 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3306 break;
3307
3308 case MSM_BACKEND_DAI_AUXPCM_TX:
3309 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3310 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3311 rate->min = rate->max =
3312 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3313 channels->min = channels->max =
3314 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3315 break;
3316
3317 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3318 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3319 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3320 rate->min = rate->max =
3321 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3322 channels->min = channels->max =
3323 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3324 break;
3325
3326 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3327 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3328 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3329 rate->min = rate->max =
3330 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3331 channels->min = channels->max =
3332 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3333 break;
3334
3335 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3336 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3337 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3338 rate->min = rate->max =
3339 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3340 channels->min = channels->max =
3341 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3342 break;
3343
3344 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3345 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3346 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3347 rate->min = rate->max =
3348 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3349 channels->min = channels->max =
3350 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3351 break;
3352
3353 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3354 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3355 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3356 rate->min = rate->max =
3357 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3358 channels->min = channels->max =
3359 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3360 break;
3361
3362 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3364 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3365 rate->min = rate->max =
3366 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3367 channels->min = channels->max =
3368 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3369 break;
3370
3371 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3373 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3374 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3375 channels->min = channels->max =
3376 mi2s_rx_cfg[PRIM_MI2S].channels;
3377 break;
3378
3379 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3380 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3381 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3382 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3383 channels->min = channels->max =
3384 mi2s_tx_cfg[PRIM_MI2S].channels;
3385 break;
3386
3387 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3388 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3389 mi2s_rx_cfg[SEC_MI2S].bit_format);
3390 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3391 channels->min = channels->max =
3392 mi2s_rx_cfg[SEC_MI2S].channels;
3393 break;
3394
3395 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3397 mi2s_tx_cfg[SEC_MI2S].bit_format);
3398 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3399 channels->min = channels->max =
3400 mi2s_tx_cfg[SEC_MI2S].channels;
3401 break;
3402
3403 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3404 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3405 mi2s_rx_cfg[TERT_MI2S].bit_format);
3406 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3407 channels->min = channels->max =
3408 mi2s_rx_cfg[TERT_MI2S].channels;
3409 break;
3410
3411 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3412 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3413 mi2s_tx_cfg[TERT_MI2S].bit_format);
3414 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3415 channels->min = channels->max =
3416 mi2s_tx_cfg[TERT_MI2S].channels;
3417 break;
3418
3419 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
3420 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3421 mi2s_rx_cfg[QUAT_MI2S].bit_format);
3422 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
3423 channels->min = channels->max =
3424 mi2s_rx_cfg[QUAT_MI2S].channels;
3425 break;
3426
3427 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
3428 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3429 mi2s_tx_cfg[QUAT_MI2S].bit_format);
3430 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
3431 channels->min = channels->max =
3432 mi2s_tx_cfg[QUAT_MI2S].channels;
3433 break;
3434
3435 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3436 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3437 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3438 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3439 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3440 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3441 cdc_dma_rx_cfg[idx].bit_format);
3442 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3443 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3444 break;
3445
3446 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3447 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3448 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3449 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3450 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3451 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3452 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3454 cdc_dma_tx_cfg[idx].bit_format);
3455 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3456 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3457 break;
3458
3459 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3460 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3461 slim_rx_cfg[SLIM_RX_7].bit_format);
3462 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3463 channels->min = channels->max =
3464 slim_rx_cfg[SLIM_RX_7].channels;
3465 break;
3466
3467 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
3468 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3469 channels->min = channels->max =
3470 slim_tx_cfg[SLIM_TX_7].channels;
3471 break;
3472
3473 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3474 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3475 channels->min = channels->max =
3476 slim_tx_cfg[SLIM_TX_8].channels;
3477 break;
3478
3479 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3480 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3481 afe_loopback_tx_cfg[idx].bit_format);
3482 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3483 channels->min = channels->max =
3484 afe_loopback_tx_cfg[idx].channels;
3485 break;
3486
3487 default:
3488 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3489 break;
3490 }
3491
3492 return 0;
3493}
3494
3495static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
3496 bool active)
3497{
3498 struct snd_soc_card *card = component->card;
3499 struct msm_asoc_mach_data *pdata =
3500 snd_soc_card_get_drvdata(card);
3501
3502 if (!pdata->fsa_handle)
3503 return false;
3504
3505 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3506}
3507
3508static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3509{
3510 int value = 0;
3511 bool ret = false;
3512 struct snd_soc_card *card;
3513 struct msm_asoc_mach_data *pdata;
3514
3515 if (!component) {
3516 pr_err("%s component is NULL\n", __func__);
3517 return false;
3518 }
3519 card = component->card;
3520 pdata = snd_soc_card_get_drvdata(card);
3521
3522 if (!pdata)
3523 return false;
3524
3525 if (wcd_mbhc_cfg.enable_usbc_analog)
3526 return msm_usbc_swap_gnd_mic(component, active);
3527
3528 /* if usbc is not defined, swap using us_euro_gpio_p */
3529 if (pdata->us_euro_gpio_p) {
3530 value = msm_cdc_pinctrl_get_state(
3531 pdata->us_euro_gpio_p);
3532 if (value)
3533 msm_cdc_pinctrl_select_sleep_state(
3534 pdata->us_euro_gpio_p);
3535 else
3536 msm_cdc_pinctrl_select_active_state(
3537 pdata->us_euro_gpio_p);
3538 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3539 __func__, value, !value);
3540 ret = true;
3541 }
3542
3543 return ret;
3544}
3545
3546static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3547 struct snd_pcm_hw_params *params)
3548{
3549 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3550 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3551 int ret = 0;
3552 int slot_width = 32;
3553 int channels, slots;
3554 unsigned int slot_mask, rate, clk_freq;
3555 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3556
3557 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3558
3559 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3560 switch (cpu_dai->id) {
3561 case AFE_PORT_ID_PRIMARY_TDM_RX:
3562 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3563 break;
3564 case AFE_PORT_ID_SECONDARY_TDM_RX:
3565 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3566 break;
3567 case AFE_PORT_ID_TERTIARY_TDM_RX:
3568 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3569 break;
3570 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3571 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3572 break;
3573 case AFE_PORT_ID_PRIMARY_TDM_TX:
3574 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3575 break;
3576 case AFE_PORT_ID_SECONDARY_TDM_TX:
3577 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3578 break;
3579 case AFE_PORT_ID_TERTIARY_TDM_TX:
3580 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3581 break;
3582 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3583 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3584 break;
3585
3586 default:
3587 pr_err("%s: dai id 0x%x not supported\n",
3588 __func__, cpu_dai->id);
3589 return -EINVAL;
3590 }
3591
3592 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3593 /*2 slot config - bits 0 and 1 set for the first two slots */
3594 slot_mask = 0x0000FFFF >> (16 - slots);
3595 channels = slots;
3596
3597 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3598 __func__, slot_width, slots);
3599
3600 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3601 slots, slot_width);
3602 if (ret < 0) {
3603 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3604 __func__, ret);
3605 goto end;
3606 }
3607
3608 ret = snd_soc_dai_set_channel_map(cpu_dai,
3609 0, NULL, channels, slot_offset);
3610 if (ret < 0) {
3611 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3612 __func__, ret);
3613 goto end;
3614 }
3615 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3616 /*2 slot config - bits 0 and 1 set for the first two slots */
3617 slot_mask = 0x0000FFFF >> (16 - slots);
3618 channels = slots;
3619
3620 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3621 __func__, slot_width, slots);
3622
3623 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3624 slots, slot_width);
3625 if (ret < 0) {
3626 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3627 __func__, ret);
3628 goto end;
3629 }
3630
3631 ret = snd_soc_dai_set_channel_map(cpu_dai,
3632 channels, slot_offset, 0, NULL);
3633 if (ret < 0) {
3634 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3635 __func__, ret);
3636 goto end;
3637 }
3638 } else {
3639 ret = -EINVAL;
3640 pr_err("%s: invalid use case, err:%d\n",
3641 __func__, ret);
3642 goto end;
3643 }
3644
3645 rate = params_rate(params);
3646 clk_freq = rate * slot_width * slots;
3647 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3648 if (ret < 0)
3649 pr_err("%s: failed to set tdm clk, err:%d\n",
3650 __func__, ret);
3651
3652end:
3653 return ret;
3654}
3655
3656static int msm_get_tdm_mode(u32 port_id)
3657{
3658 int tdm_mode;
3659
3660 switch (port_id) {
3661 case AFE_PORT_ID_PRIMARY_TDM_RX:
3662 case AFE_PORT_ID_PRIMARY_TDM_TX:
3663 tdm_mode = TDM_PRI;
3664 break;
3665 case AFE_PORT_ID_SECONDARY_TDM_RX:
3666 case AFE_PORT_ID_SECONDARY_TDM_TX:
3667 tdm_mode = TDM_SEC;
3668 break;
3669 case AFE_PORT_ID_TERTIARY_TDM_RX:
3670 case AFE_PORT_ID_TERTIARY_TDM_TX:
3671 tdm_mode = TDM_TERT;
3672 break;
3673 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3674 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3675 tdm_mode = TDM_QUAT;
3676 break;
3677 default:
3678 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
3679 tdm_mode = -EINVAL;
3680 }
3681 return tdm_mode;
3682}
3683
3684static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
3685{
3686 int ret = 0;
3687 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3688 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3689 struct snd_soc_card *card = rtd->card;
3690 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3691 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3692
3693 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3694 ret = -EINVAL;
3695 pr_err("%s: Invalid TDM interface %d\n",
3696 __func__, ret);
3697 return ret;
3698 }
3699
3700 if (pdata->mi2s_gpio_p[tdm_mode]) {
3701 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3702 == 0) {
3703 ret = msm_cdc_pinctrl_select_active_state(
3704 pdata->mi2s_gpio_p[tdm_mode]);
3705 if (ret) {
3706 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
3707 __func__, ret);
3708 goto done;
3709 }
3710 }
3711 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3712 }
3713
3714done:
3715 return ret;
3716}
3717
3718static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
3719{
3720 int ret = 0;
3721 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3722 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3723 struct snd_soc_card *card = rtd->card;
3724 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3725 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3726
3727 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3728 ret = -EINVAL;
3729 pr_err("%s: Invalid TDM interface %d\n",
3730 __func__, ret);
3731 return;
3732 }
3733
3734 if (pdata->mi2s_gpio_p[tdm_mode]) {
3735 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3736 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3737 == 0) {
3738 ret = msm_cdc_pinctrl_select_sleep_state(
3739 pdata->mi2s_gpio_p[tdm_mode]);
3740 if (ret)
3741 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
3742 __func__, ret);
3743 }
3744 }
3745}
3746
3747static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
3748{
3749 int ret = 0;
3750 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3751 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3752 struct snd_soc_card *card = rtd->card;
3753 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3754 u32 aux_mode = cpu_dai->id - 1;
3755
3756 if (aux_mode >= AUX_PCM_MAX) {
3757 ret = -EINVAL;
3758 pr_err("%s: Invalid AUX interface %d\n",
3759 __func__, ret);
3760 return ret;
3761 }
3762
3763 if (pdata->mi2s_gpio_p[aux_mode]) {
3764 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3765 == 0) {
3766 ret = msm_cdc_pinctrl_select_active_state(
3767 pdata->mi2s_gpio_p[aux_mode]);
3768 if (ret) {
3769 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
3770 __func__, ret);
3771 goto done;
3772 }
3773 }
3774 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3775 }
3776
3777done:
3778 return ret;
3779}
3780
3781static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
3782{
3783 int ret = 0;
3784 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3785 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3786 struct snd_soc_card *card = rtd->card;
3787 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3788 u32 aux_mode = cpu_dai->id - 1;
3789
3790 if (aux_mode >= AUX_PCM_MAX) {
3791 pr_err("%s: Invalid AUX interface %d\n",
3792 __func__, ret);
3793 return;
3794 }
3795
3796 if (pdata->mi2s_gpio_p[aux_mode]) {
3797 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3798 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3799 == 0) {
3800 ret = msm_cdc_pinctrl_select_sleep_state(
3801 pdata->mi2s_gpio_p[aux_mode]);
3802 if (ret)
3803 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
3804 __func__, ret);
3805 }
3806 }
3807}
3808
3809static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
3810{
3811 int ret = 0;
3812 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3813 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3814
3815 switch (dai_link->id) {
3816 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3817 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3818 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3819 ret = bengal_send_island_va_config(dai_link->id);
3820 if (ret)
3821 pr_err("%s: send island va cfg failed, err: %d\n",
3822 __func__, ret);
3823 break;
3824 }
3825
3826 return ret;
3827}
3828
3829static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3830 struct snd_pcm_hw_params *params)
3831{
3832 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3833 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3834 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3835 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3836
3837 int ret = 0;
3838 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3839 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3840 u32 user_set_tx_ch = 0;
3841 u32 user_set_rx_ch = 0;
3842 u32 ch_id;
3843
3844 ret = snd_soc_dai_get_channel_map(codec_dai,
3845 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3846 &rx_ch_cdc_dma);
3847 if (ret < 0) {
3848 pr_err("%s: failed to get codec chan map, err:%d\n",
3849 __func__, ret);
3850 goto err;
3851 }
3852
3853 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3854 switch (dai_link->id) {
3855 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3856 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3857 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3858 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3859 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3860 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3861 {
3862 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3863 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3864 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3865 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3866 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3867 user_set_rx_ch, &rx_ch_cdc_dma);
3868 if (ret < 0) {
3869 pr_err("%s: failed to set cpu chan map, err:%d\n",
3870 __func__, ret);
3871 goto err;
3872 }
3873
3874 }
3875 break;
3876 }
3877 } else {
3878 switch (dai_link->id) {
3879 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3880 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3881 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3882 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3883 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3884 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3885 {
3886 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3887 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3888 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3889 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3890 }
3891 break;
3892 }
3893
3894 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3895 &tx_ch_cdc_dma, 0, 0);
3896 if (ret < 0) {
3897 pr_err("%s: failed to set cpu chan map, err:%d\n",
3898 __func__, ret);
3899 goto err;
3900 }
3901 }
3902
3903err:
3904 return ret;
3905}
3906
3907static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3908{
3909 cpumask_t mask;
3910
3911 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3912 pm_qos_remove_request(&substream->latency_pm_qos_req);
3913
3914 cpumask_clear(&mask);
3915 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3916 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3917 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3918
3919 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3920
3921 pm_qos_add_request(&substream->latency_pm_qos_req,
3922 PM_QOS_CPU_DMA_LATENCY,
3923 MSM_LL_QOS_VALUE);
3924 return 0;
3925}
3926
3927static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3928{
3929 int ret = 0;
3930 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3931 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3932 int index = cpu_dai->id;
3933 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3934 struct snd_soc_card *card = rtd->card;
3935 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3936
3937 dev_dbg(rtd->card->dev,
3938 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3939 __func__, substream->name, substream->stream,
3940 cpu_dai->name, cpu_dai->id);
3941
3942 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3943 ret = -EINVAL;
3944 dev_err(rtd->card->dev,
3945 "%s: CPU DAI id (%d) out of range\n",
3946 __func__, cpu_dai->id);
3947 goto err;
3948 }
3949 /*
3950 * Mutex protection in case the same MI2S
3951 * interface using for both TX and RX so
3952 * that the same clock won't be enable twice.
3953 */
3954 mutex_lock(&mi2s_intf_conf[index].lock);
3955 if (++mi2s_intf_conf[index].ref_cnt == 1) {
3956 /* Check if msm needs to provide the clock to the interface */
3957 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
3958 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
3959 fmt = SND_SOC_DAIFMT_CBM_CFM;
3960 }
3961 ret = msm_mi2s_set_sclk(substream, true);
3962 if (ret < 0) {
3963 dev_err(rtd->card->dev,
3964 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
3965 __func__, ret);
3966 goto clean_up;
3967 }
3968
3969 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
3970 if (ret < 0) {
3971 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
3972 __func__, index, ret);
3973 goto clk_off;
3974 }
3975 if (pdata->mi2s_gpio_p[index]) {
3976 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
3977 == 0) {
3978 ret = msm_cdc_pinctrl_select_active_state(
3979 pdata->mi2s_gpio_p[index]);
3980 if (ret) {
3981 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
3982 __func__, ret);
3983 goto clk_off;
3984 }
3985 }
3986 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
3987 }
3988 }
3989clk_off:
3990 if (ret < 0)
3991 msm_mi2s_set_sclk(substream, false);
3992clean_up:
3993 if (ret < 0)
3994 mi2s_intf_conf[index].ref_cnt--;
3995 mutex_unlock(&mi2s_intf_conf[index].lock);
3996err:
3997 return ret;
3998}
3999
4000static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4001{
4002 int ret = 0;
4003 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4004 int index = rtd->cpu_dai->id;
4005 struct snd_soc_card *card = rtd->card;
4006 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4007
4008 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4009 substream->name, substream->stream);
4010 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4011 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4012 return;
4013 }
4014
4015 mutex_lock(&mi2s_intf_conf[index].lock);
4016 if (--mi2s_intf_conf[index].ref_cnt == 0) {
4017 if (pdata->mi2s_gpio_p[index]) {
4018 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4019 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4020 == 0) {
4021 ret = msm_cdc_pinctrl_select_sleep_state(
4022 pdata->mi2s_gpio_p[index]);
4023 if (ret)
4024 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4025 __func__, ret);
4026 }
4027 }
4028
4029 ret = msm_mi2s_set_sclk(substream, false);
4030 if (ret < 0)
4031 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4032 __func__, index, ret);
4033 }
4034 mutex_unlock(&mi2s_intf_conf[index].lock);
4035}
4036
4037static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4038 struct snd_pcm_hw_params *params)
4039{
4040 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4041 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4042 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4043 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4044 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4045 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4046 int ret = 0;
4047
4048 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4049 codec_dai->name, codec_dai->id);
4050 ret = snd_soc_dai_get_channel_map(codec_dai,
4051 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4052 if (ret) {
4053 dev_err(rtd->dev,
4054 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4055 __func__, ret);
4056 goto err;
4057 }
4058
4059 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4060 __func__, tx_ch_cnt, dai_link->id);
4061
4062 ret = snd_soc_dai_set_channel_map(cpu_dai,
4063 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4064 if (ret)
4065 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4066 __func__, ret);
4067
4068err:
4069 return ret;
4070}
4071
4072static struct snd_soc_ops bengal_aux_be_ops = {
4073 .startup = bengal_aux_snd_startup,
4074 .shutdown = bengal_aux_snd_shutdown
4075};
4076
4077static struct snd_soc_ops bengal_tdm_be_ops = {
4078 .hw_params = bengal_tdm_snd_hw_params,
4079 .startup = bengal_tdm_snd_startup,
4080 .shutdown = bengal_tdm_snd_shutdown
4081};
4082
4083static struct snd_soc_ops msm_mi2s_be_ops = {
4084 .startup = msm_mi2s_snd_startup,
4085 .shutdown = msm_mi2s_snd_shutdown,
4086};
4087
4088static struct snd_soc_ops msm_fe_qos_ops = {
4089 .prepare = msm_fe_qos_prepare,
4090};
4091
4092static struct snd_soc_ops msm_cdc_dma_be_ops = {
4093 .startup = msm_snd_cdc_dma_startup,
4094 .hw_params = msm_snd_cdc_dma_hw_params,
4095};
4096
4097static struct snd_soc_ops msm_wcn_ops = {
4098 .hw_params = msm_wcn_hw_params,
4099};
4100
4101static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4102 struct snd_kcontrol *kcontrol, int event)
4103{
4104 struct msm_asoc_mach_data *pdata = NULL;
4105 struct snd_soc_component *component =
4106 snd_soc_dapm_to_component(w->dapm);
4107 int ret = 0;
4108 u32 dmic_idx;
4109 int *dmic_gpio_cnt;
4110 struct device_node *dmic_gpio;
4111 char *wname;
4112
4113 wname = strpbrk(w->name, "0123");
4114 if (!wname) {
4115 dev_err(component->dev, "%s: widget not found\n", __func__);
4116 return -EINVAL;
4117 }
4118
4119 ret = kstrtouint(wname, 10, &dmic_idx);
4120 if (ret < 0) {
4121 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4122 __func__);
4123 return -EINVAL;
4124 }
4125
4126 pdata = snd_soc_card_get_drvdata(component->card);
4127
4128 switch (dmic_idx) {
4129 case 0:
4130 case 1:
4131 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4132 dmic_gpio = pdata->dmic01_gpio_p;
4133 break;
4134 case 2:
4135 case 3:
4136 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4137 dmic_gpio = pdata->dmic23_gpio_p;
4138 break;
4139 default:
4140 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4141 __func__);
4142 return -EINVAL;
4143 }
4144
4145 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4146 __func__, event, dmic_idx, *dmic_gpio_cnt);
4147
4148 switch (event) {
4149 case SND_SOC_DAPM_PRE_PMU:
4150 (*dmic_gpio_cnt)++;
4151 if (*dmic_gpio_cnt == 1) {
4152 ret = msm_cdc_pinctrl_select_active_state(
4153 dmic_gpio);
4154 if (ret < 0) {
4155 pr_err("%s: gpio set cannot be activated %sd",
4156 __func__, "dmic_gpio");
4157 return ret;
4158 }
4159 }
4160
4161 break;
4162 case SND_SOC_DAPM_POST_PMD:
4163 (*dmic_gpio_cnt)--;
4164 if (*dmic_gpio_cnt == 0) {
4165 ret = msm_cdc_pinctrl_select_sleep_state(
4166 dmic_gpio);
4167 if (ret < 0) {
4168 pr_err("%s: gpio set cannot be de-activated %sd",
4169 __func__, "dmic_gpio");
4170 return ret;
4171 }
4172 }
4173 break;
4174 default:
4175 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4176 return -EINVAL;
4177 }
4178 return 0;
4179}
4180
4181static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4182 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4183 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4184 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4185 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4186 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4187 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4188 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4189 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4190};
4191
4192static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4193{
4194 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4195 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4196 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4197
4198 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4199 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4200}
4201
4202static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4203{
4204 int ret = -EINVAL;
4205 struct snd_soc_component *component;
4206 struct snd_soc_dapm_context *dapm;
4207 struct snd_card *card;
4208 struct snd_info_entry *entry;
4209 struct msm_asoc_mach_data *pdata =
4210 snd_soc_card_get_drvdata(rtd->card);
4211
4212 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4213 if (!component) {
4214 pr_err("%s: could not find component for bolero_codec\n",
4215 __func__);
4216 return ret;
4217 }
4218
4219 dapm = snd_soc_component_get_dapm(component);
4220
4221 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4222 ARRAY_SIZE(msm_int_snd_controls));
4223 if (ret < 0) {
4224 pr_err("%s: add_component_controls failed: %d\n",
4225 __func__, ret);
4226 return ret;
4227 }
4228 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4229 ARRAY_SIZE(msm_common_snd_controls));
4230 if (ret < 0) {
4231 pr_err("%s: add common snd controls failed: %d\n",
4232 __func__, ret);
4233 return ret;
4234 }
4235
4236 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4237 ARRAY_SIZE(msm_int_dapm_widgets));
4238
4239 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4240 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4241 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4242 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4243
4244 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4245 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4246 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4247 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4248
4249 snd_soc_dapm_sync(dapm);
4250
4251 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
4252 sm_port_map);
4253 card = rtd->card->snd_card;
4254 if (!pdata->codec_root) {
4255 entry = snd_info_create_subdir(card->module, "codecs",
4256 card->proc_root);
4257 if (!entry) {
4258 pr_debug("%s: Cannot create codecs module entry\n",
4259 __func__);
4260 ret = 0;
4261 goto err;
4262 }
4263 pdata->codec_root = entry;
4264 }
4265 bolero_info_create_codec_entry(pdata->codec_root, component);
4266 bolero_register_wake_irq(component, false);
4267 codec_reg_done = true;
4268 return 0;
4269err:
4270 return ret;
4271}
4272
4273static void *def_wcd_mbhc_cal(void)
4274{
4275 void *wcd_mbhc_cal;
4276 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4277 u16 *btn_high;
4278
4279 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4280 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4281 if (!wcd_mbhc_cal)
4282 return NULL;
4283
4284 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4285 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4286 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4287 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4288 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4289
4290 btn_high[0] = 75;
4291 btn_high[1] = 150;
4292 btn_high[2] = 237;
4293 btn_high[3] = 500;
4294 btn_high[4] = 500;
4295 btn_high[5] = 500;
4296 btn_high[6] = 500;
4297 btn_high[7] = 500;
4298
4299 return wcd_mbhc_cal;
4300}
4301
4302/* Digital audio interface glue - connects codec <---> CPU */
4303static struct snd_soc_dai_link msm_common_dai_links[] = {
4304 /* FrontEnd DAI Links */
4305 {/* hw:x,0 */
4306 .name = MSM_DAILINK_NAME(Media1),
4307 .stream_name = "MultiMedia1",
4308 .cpu_dai_name = "MultiMedia1",
4309 .platform_name = "msm-pcm-dsp.0",
4310 .dynamic = 1,
4311 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4312 .dpcm_playback = 1,
4313 .dpcm_capture = 1,
4314 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4315 SND_SOC_DPCM_TRIGGER_POST},
4316 .codec_dai_name = "snd-soc-dummy-dai",
4317 .codec_name = "snd-soc-dummy",
4318 .ignore_suspend = 1,
4319 /* this dainlink has playback support */
4320 .ignore_pmdown_time = 1,
4321 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4322 },
4323 {/* hw:x,1 */
4324 .name = MSM_DAILINK_NAME(Media2),
4325 .stream_name = "MultiMedia2",
4326 .cpu_dai_name = "MultiMedia2",
4327 .platform_name = "msm-pcm-dsp.0",
4328 .dynamic = 1,
4329 .dpcm_playback = 1,
4330 .dpcm_capture = 1,
4331 .codec_dai_name = "snd-soc-dummy-dai",
4332 .codec_name = "snd-soc-dummy",
4333 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4334 SND_SOC_DPCM_TRIGGER_POST},
4335 .ignore_suspend = 1,
4336 /* this dainlink has playback support */
4337 .ignore_pmdown_time = 1,
4338 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4339 },
4340 {/* hw:x,2 */
4341 .name = "VoiceMMode1",
4342 .stream_name = "VoiceMMode1",
4343 .cpu_dai_name = "VoiceMMode1",
4344 .platform_name = "msm-pcm-voice",
4345 .dynamic = 1,
4346 .dpcm_playback = 1,
4347 .dpcm_capture = 1,
4348 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4349 SND_SOC_DPCM_TRIGGER_POST},
4350 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4351 .ignore_suspend = 1,
4352 .ignore_pmdown_time = 1,
4353 .codec_dai_name = "snd-soc-dummy-dai",
4354 .codec_name = "snd-soc-dummy",
4355 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4356 },
4357 {/* hw:x,3 */
4358 .name = "MSM VoIP",
4359 .stream_name = "VoIP",
4360 .cpu_dai_name = "VoIP",
4361 .platform_name = "msm-voip-dsp",
4362 .dynamic = 1,
4363 .dpcm_playback = 1,
4364 .dpcm_capture = 1,
4365 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4366 SND_SOC_DPCM_TRIGGER_POST},
4367 .codec_dai_name = "snd-soc-dummy-dai",
4368 .codec_name = "snd-soc-dummy",
4369 .ignore_suspend = 1,
4370 /* this dainlink has playback support */
4371 .ignore_pmdown_time = 1,
4372 .id = MSM_FRONTEND_DAI_VOIP,
4373 },
4374 {/* hw:x,4 */
4375 .name = MSM_DAILINK_NAME(ULL),
4376 .stream_name = "MultiMedia3",
4377 .cpu_dai_name = "MultiMedia3",
4378 .platform_name = "msm-pcm-dsp.2",
4379 .dynamic = 1,
4380 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4381 .dpcm_playback = 1,
4382 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4383 SND_SOC_DPCM_TRIGGER_POST},
4384 .codec_dai_name = "snd-soc-dummy-dai",
4385 .codec_name = "snd-soc-dummy",
4386 .ignore_suspend = 1,
4387 /* this dainlink has playback support */
4388 .ignore_pmdown_time = 1,
4389 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4390 },
4391 {/* hw:x,5 */
4392 .name = "MSM AFE-PCM RX",
4393 .stream_name = "AFE-PROXY RX",
4394 .cpu_dai_name = "msm-dai-q6-dev.241",
4395 .codec_name = "msm-stub-codec.1",
4396 .codec_dai_name = "msm-stub-rx",
4397 .platform_name = "msm-pcm-afe",
4398 .dpcm_playback = 1,
4399 .ignore_suspend = 1,
4400 /* this dainlink has playback support */
4401 .ignore_pmdown_time = 1,
4402 },
4403 {/* hw:x,6 */
4404 .name = "MSM AFE-PCM TX",
4405 .stream_name = "AFE-PROXY TX",
4406 .cpu_dai_name = "msm-dai-q6-dev.240",
4407 .codec_name = "msm-stub-codec.1",
4408 .codec_dai_name = "msm-stub-tx",
4409 .platform_name = "msm-pcm-afe",
4410 .dpcm_capture = 1,
4411 .ignore_suspend = 1,
4412 },
4413 {/* hw:x,7 */
4414 .name = MSM_DAILINK_NAME(Compress1),
4415 .stream_name = "Compress1",
4416 .cpu_dai_name = "MultiMedia4",
4417 .platform_name = "msm-compress-dsp",
4418 .dynamic = 1,
4419 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4420 .dpcm_playback = 1,
4421 .dpcm_capture = 1,
4422 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4423 SND_SOC_DPCM_TRIGGER_POST},
4424 .codec_dai_name = "snd-soc-dummy-dai",
4425 .codec_name = "snd-soc-dummy",
4426 .ignore_suspend = 1,
4427 .ignore_pmdown_time = 1,
4428 /* this dainlink has playback support */
4429 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4430 },
4431 /* Hostless PCM purpose */
4432 {/* hw:x,8 */
4433 .name = "AUXPCM Hostless",
4434 .stream_name = "AUXPCM Hostless",
4435 .cpu_dai_name = "AUXPCM_HOSTLESS",
4436 .platform_name = "msm-pcm-hostless",
4437 .dynamic = 1,
4438 .dpcm_playback = 1,
4439 .dpcm_capture = 1,
4440 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4441 SND_SOC_DPCM_TRIGGER_POST},
4442 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4443 .ignore_suspend = 1,
4444 /* this dainlink has playback support */
4445 .ignore_pmdown_time = 1,
4446 .codec_dai_name = "snd-soc-dummy-dai",
4447 .codec_name = "snd-soc-dummy",
4448 },
4449 {/* hw:x,9 */
4450 .name = MSM_DAILINK_NAME(LowLatency),
4451 .stream_name = "MultiMedia5",
4452 .cpu_dai_name = "MultiMedia5",
4453 .platform_name = "msm-pcm-dsp.1",
4454 .dynamic = 1,
4455 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4456 .dpcm_playback = 1,
4457 .dpcm_capture = 1,
4458 .codec_dai_name = "snd-soc-dummy-dai",
4459 .codec_name = "snd-soc-dummy",
4460 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4461 SND_SOC_DPCM_TRIGGER_POST},
4462 .ignore_suspend = 1,
4463 /* this dainlink has playback support */
4464 .ignore_pmdown_time = 1,
4465 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4466 .ops = &msm_fe_qos_ops,
4467 },
4468 {/* hw:x,10 */
4469 .name = "Listen 1 Audio Service",
4470 .stream_name = "Listen 1 Audio Service",
4471 .cpu_dai_name = "LSM1",
4472 .platform_name = "msm-lsm-client",
4473 .dynamic = 1,
4474 .dpcm_capture = 1,
4475 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4476 SND_SOC_DPCM_TRIGGER_POST },
4477 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4478 .ignore_suspend = 1,
4479 .codec_dai_name = "snd-soc-dummy-dai",
4480 .codec_name = "snd-soc-dummy",
4481 .id = MSM_FRONTEND_DAI_LSM1,
4482 },
4483 /* Multiple Tunnel instances */
4484 {/* hw:x,11 */
4485 .name = MSM_DAILINK_NAME(Compress2),
4486 .stream_name = "Compress2",
4487 .cpu_dai_name = "MultiMedia7",
4488 .platform_name = "msm-compress-dsp",
4489 .dynamic = 1,
4490 .dpcm_playback = 1,
4491 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4492 SND_SOC_DPCM_TRIGGER_POST},
4493 .codec_dai_name = "snd-soc-dummy-dai",
4494 .codec_name = "snd-soc-dummy",
4495 .ignore_suspend = 1,
4496 .ignore_pmdown_time = 1,
4497 /* this dainlink has playback support */
4498 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4499 },
4500 {/* hw:x,12 */
4501 .name = MSM_DAILINK_NAME(MultiMedia10),
4502 .stream_name = "MultiMedia10",
4503 .cpu_dai_name = "MultiMedia10",
4504 .platform_name = "msm-pcm-dsp.1",
4505 .dynamic = 1,
4506 .dpcm_playback = 1,
4507 .dpcm_capture = 1,
4508 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4509 SND_SOC_DPCM_TRIGGER_POST},
4510 .codec_dai_name = "snd-soc-dummy-dai",
4511 .codec_name = "snd-soc-dummy",
4512 .ignore_suspend = 1,
4513 .ignore_pmdown_time = 1,
4514 /* this dainlink has playback support */
4515 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4516 },
4517 {/* hw:x,13 */
4518 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4519 .stream_name = "MM_NOIRQ",
4520 .cpu_dai_name = "MultiMedia8",
4521 .platform_name = "msm-pcm-dsp-noirq",
4522 .dynamic = 1,
4523 .dpcm_playback = 1,
4524 .dpcm_capture = 1,
4525 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4526 SND_SOC_DPCM_TRIGGER_POST},
4527 .codec_dai_name = "snd-soc-dummy-dai",
4528 .codec_name = "snd-soc-dummy",
4529 .ignore_suspend = 1,
4530 .ignore_pmdown_time = 1,
4531 /* this dainlink has playback support */
4532 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4533 .ops = &msm_fe_qos_ops,
4534 },
4535 /* HDMI Hostless */
4536 {/* hw:x,14 */
4537 .name = "HDMI_RX_HOSTLESS",
4538 .stream_name = "HDMI_RX_HOSTLESS",
4539 .cpu_dai_name = "HDMI_HOSTLESS",
4540 .platform_name = "msm-pcm-hostless",
4541 .dynamic = 1,
4542 .dpcm_playback = 1,
4543 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4544 SND_SOC_DPCM_TRIGGER_POST},
4545 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4546 .ignore_suspend = 1,
4547 .ignore_pmdown_time = 1,
4548 .codec_dai_name = "snd-soc-dummy-dai",
4549 .codec_name = "snd-soc-dummy",
4550 },
4551 {/* hw:x,15 */
4552 .name = "VoiceMMode2",
4553 .stream_name = "VoiceMMode2",
4554 .cpu_dai_name = "VoiceMMode2",
4555 .platform_name = "msm-pcm-voice",
4556 .dynamic = 1,
4557 .dpcm_playback = 1,
4558 .dpcm_capture = 1,
4559 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4560 SND_SOC_DPCM_TRIGGER_POST},
4561 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4562 .ignore_suspend = 1,
4563 .ignore_pmdown_time = 1,
4564 .codec_dai_name = "snd-soc-dummy-dai",
4565 .codec_name = "snd-soc-dummy",
4566 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4567 },
4568 /* LSM FE */
4569 {/* hw:x,16 */
4570 .name = "Listen 2 Audio Service",
4571 .stream_name = "Listen 2 Audio Service",
4572 .cpu_dai_name = "LSM2",
4573 .platform_name = "msm-lsm-client",
4574 .dynamic = 1,
4575 .dpcm_capture = 1,
4576 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4577 SND_SOC_DPCM_TRIGGER_POST },
4578 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4579 .ignore_suspend = 1,
4580 .codec_dai_name = "snd-soc-dummy-dai",
4581 .codec_name = "snd-soc-dummy",
4582 .id = MSM_FRONTEND_DAI_LSM2,
4583 },
4584 {/* hw:x,17 */
4585 .name = "Listen 3 Audio Service",
4586 .stream_name = "Listen 3 Audio Service",
4587 .cpu_dai_name = "LSM3",
4588 .platform_name = "msm-lsm-client",
4589 .dynamic = 1,
4590 .dpcm_capture = 1,
4591 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4592 SND_SOC_DPCM_TRIGGER_POST },
4593 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4594 .ignore_suspend = 1,
4595 .codec_dai_name = "snd-soc-dummy-dai",
4596 .codec_name = "snd-soc-dummy",
4597 .id = MSM_FRONTEND_DAI_LSM3,
4598 },
4599 {/* hw:x,18 */
4600 .name = "Listen 4 Audio Service",
4601 .stream_name = "Listen 4 Audio Service",
4602 .cpu_dai_name = "LSM4",
4603 .platform_name = "msm-lsm-client",
4604 .dynamic = 1,
4605 .dpcm_capture = 1,
4606 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4607 SND_SOC_DPCM_TRIGGER_POST },
4608 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4609 .ignore_suspend = 1,
4610 .codec_dai_name = "snd-soc-dummy-dai",
4611 .codec_name = "snd-soc-dummy",
4612 .id = MSM_FRONTEND_DAI_LSM4,
4613 },
4614 {/* hw:x,19 */
4615 .name = "Listen 5 Audio Service",
4616 .stream_name = "Listen 5 Audio Service",
4617 .cpu_dai_name = "LSM5",
4618 .platform_name = "msm-lsm-client",
4619 .dynamic = 1,
4620 .dpcm_capture = 1,
4621 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4622 SND_SOC_DPCM_TRIGGER_POST },
4623 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4624 .ignore_suspend = 1,
4625 .codec_dai_name = "snd-soc-dummy-dai",
4626 .codec_name = "snd-soc-dummy",
4627 .id = MSM_FRONTEND_DAI_LSM5,
4628 },
4629 {/* hw:x,20 */
4630 .name = "Listen 6 Audio Service",
4631 .stream_name = "Listen 6 Audio Service",
4632 .cpu_dai_name = "LSM6",
4633 .platform_name = "msm-lsm-client",
4634 .dynamic = 1,
4635 .dpcm_capture = 1,
4636 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4637 SND_SOC_DPCM_TRIGGER_POST },
4638 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4639 .ignore_suspend = 1,
4640 .codec_dai_name = "snd-soc-dummy-dai",
4641 .codec_name = "snd-soc-dummy",
4642 .id = MSM_FRONTEND_DAI_LSM6,
4643 },
4644 {/* hw:x,21 */
4645 .name = "Listen 7 Audio Service",
4646 .stream_name = "Listen 7 Audio Service",
4647 .cpu_dai_name = "LSM7",
4648 .platform_name = "msm-lsm-client",
4649 .dynamic = 1,
4650 .dpcm_capture = 1,
4651 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4652 SND_SOC_DPCM_TRIGGER_POST },
4653 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4654 .ignore_suspend = 1,
4655 .codec_dai_name = "snd-soc-dummy-dai",
4656 .codec_name = "snd-soc-dummy",
4657 .id = MSM_FRONTEND_DAI_LSM7,
4658 },
4659 {/* hw:x,22 */
4660 .name = "Listen 8 Audio Service",
4661 .stream_name = "Listen 8 Audio Service",
4662 .cpu_dai_name = "LSM8",
4663 .platform_name = "msm-lsm-client",
4664 .dynamic = 1,
4665 .dpcm_capture = 1,
4666 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4667 SND_SOC_DPCM_TRIGGER_POST },
4668 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4669 .ignore_suspend = 1,
4670 .codec_dai_name = "snd-soc-dummy-dai",
4671 .codec_name = "snd-soc-dummy",
4672 .id = MSM_FRONTEND_DAI_LSM8,
4673 },
4674 {/* hw:x,23 */
4675 .name = MSM_DAILINK_NAME(Media9),
4676 .stream_name = "MultiMedia9",
4677 .cpu_dai_name = "MultiMedia9",
4678 .platform_name = "msm-pcm-dsp.0",
4679 .dynamic = 1,
4680 .dpcm_playback = 1,
4681 .dpcm_capture = 1,
4682 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4683 SND_SOC_DPCM_TRIGGER_POST},
4684 .codec_dai_name = "snd-soc-dummy-dai",
4685 .codec_name = "snd-soc-dummy",
4686 .ignore_suspend = 1,
4687 /* this dainlink has playback support */
4688 .ignore_pmdown_time = 1,
4689 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4690 },
4691 {/* hw:x,24 */
4692 .name = MSM_DAILINK_NAME(Compress4),
4693 .stream_name = "Compress4",
4694 .cpu_dai_name = "MultiMedia11",
4695 .platform_name = "msm-compress-dsp",
4696 .dynamic = 1,
4697 .dpcm_playback = 1,
4698 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4699 SND_SOC_DPCM_TRIGGER_POST},
4700 .codec_dai_name = "snd-soc-dummy-dai",
4701 .codec_name = "snd-soc-dummy",
4702 .ignore_suspend = 1,
4703 .ignore_pmdown_time = 1,
4704 /* this dainlink has playback support */
4705 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4706 },
4707 {/* hw:x,25 */
4708 .name = MSM_DAILINK_NAME(Compress5),
4709 .stream_name = "Compress5",
4710 .cpu_dai_name = "MultiMedia12",
4711 .platform_name = "msm-compress-dsp",
4712 .dynamic = 1,
4713 .dpcm_playback = 1,
4714 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4715 SND_SOC_DPCM_TRIGGER_POST},
4716 .codec_dai_name = "snd-soc-dummy-dai",
4717 .codec_name = "snd-soc-dummy",
4718 .ignore_suspend = 1,
4719 .ignore_pmdown_time = 1,
4720 /* this dainlink has playback support */
4721 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4722 },
4723 {/* hw:x,26 */
4724 .name = MSM_DAILINK_NAME(Compress6),
4725 .stream_name = "Compress6",
4726 .cpu_dai_name = "MultiMedia13",
4727 .platform_name = "msm-compress-dsp",
4728 .dynamic = 1,
4729 .dpcm_playback = 1,
4730 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4731 SND_SOC_DPCM_TRIGGER_POST},
4732 .codec_dai_name = "snd-soc-dummy-dai",
4733 .codec_name = "snd-soc-dummy",
4734 .ignore_suspend = 1,
4735 .ignore_pmdown_time = 1,
4736 /* this dainlink has playback support */
4737 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4738 },
4739 {/* hw:x,27 */
4740 .name = MSM_DAILINK_NAME(Compress7),
4741 .stream_name = "Compress7",
4742 .cpu_dai_name = "MultiMedia14",
4743 .platform_name = "msm-compress-dsp",
4744 .dynamic = 1,
4745 .dpcm_playback = 1,
4746 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4747 SND_SOC_DPCM_TRIGGER_POST},
4748 .codec_dai_name = "snd-soc-dummy-dai",
4749 .codec_name = "snd-soc-dummy",
4750 .ignore_suspend = 1,
4751 .ignore_pmdown_time = 1,
4752 /* this dainlink has playback support */
4753 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4754 },
4755 {/* hw:x,28 */
4756 .name = MSM_DAILINK_NAME(Compress8),
4757 .stream_name = "Compress8",
4758 .cpu_dai_name = "MultiMedia15",
4759 .platform_name = "msm-compress-dsp",
4760 .dynamic = 1,
4761 .dpcm_playback = 1,
4762 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4763 SND_SOC_DPCM_TRIGGER_POST},
4764 .codec_dai_name = "snd-soc-dummy-dai",
4765 .codec_name = "snd-soc-dummy",
4766 .ignore_suspend = 1,
4767 .ignore_pmdown_time = 1,
4768 /* this dainlink has playback support */
4769 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4770 },
4771 {/* hw:x,29 */
4772 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4773 .stream_name = "MM_NOIRQ_2",
4774 .cpu_dai_name = "MultiMedia16",
4775 .platform_name = "msm-pcm-dsp-noirq",
4776 .dynamic = 1,
4777 .dpcm_playback = 1,
4778 .dpcm_capture = 1,
4779 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4780 SND_SOC_DPCM_TRIGGER_POST},
4781 .codec_dai_name = "snd-soc-dummy-dai",
4782 .codec_name = "snd-soc-dummy",
4783 .ignore_suspend = 1,
4784 .ignore_pmdown_time = 1,
4785 /* this dainlink has playback support */
4786 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
4787 .ops = &msm_fe_qos_ops,
4788 },
4789 {/* hw:x,30 */
4790 .name = "CDC_DMA Hostless",
4791 .stream_name = "CDC_DMA Hostless",
4792 .cpu_dai_name = "CDC_DMA_HOSTLESS",
4793 .platform_name = "msm-pcm-hostless",
4794 .dynamic = 1,
4795 .dpcm_playback = 1,
4796 .dpcm_capture = 1,
4797 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4798 SND_SOC_DPCM_TRIGGER_POST},
4799 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4800 .ignore_suspend = 1,
4801 /* this dailink has playback support */
4802 .ignore_pmdown_time = 1,
4803 .codec_dai_name = "snd-soc-dummy-dai",
4804 .codec_name = "snd-soc-dummy",
4805 },
4806 {/* hw:x,31 */
4807 .name = "TX3_CDC_DMA Hostless",
4808 .stream_name = "TX3_CDC_DMA Hostless",
4809 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
4810 .platform_name = "msm-pcm-hostless",
4811 .dynamic = 1,
4812 .dpcm_capture = 1,
4813 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4814 SND_SOC_DPCM_TRIGGER_POST},
4815 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4816 .ignore_suspend = 1,
4817 .codec_dai_name = "snd-soc-dummy-dai",
4818 .codec_name = "snd-soc-dummy",
4819 },
4820 {/* hw:x,32 */
4821 .name = "Tertiary MI2S TX_Hostless",
4822 .stream_name = "Tertiary MI2S_TX Hostless Capture",
4823 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
4824 .platform_name = "msm-pcm-hostless",
4825 .dynamic = 1,
4826 .dpcm_capture = 1,
4827 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4828 SND_SOC_DPCM_TRIGGER_POST},
4829 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4830 .ignore_suspend = 1,
4831 .ignore_pmdown_time = 1,
4832 .codec_dai_name = "snd-soc-dummy-dai",
4833 .codec_name = "snd-soc-dummy",
4834 },
4835};
4836
4837static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
4838 {/* hw:x,34 */
4839 .name = MSM_DAILINK_NAME(ASM Loopback),
4840 .stream_name = "MultiMedia6",
4841 .cpu_dai_name = "MultiMedia6",
4842 .platform_name = "msm-pcm-loopback",
4843 .dynamic = 1,
4844 .dpcm_playback = 1,
4845 .dpcm_capture = 1,
4846 .codec_dai_name = "snd-soc-dummy-dai",
4847 .codec_name = "snd-soc-dummy",
4848 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4849 SND_SOC_DPCM_TRIGGER_POST},
4850 .ignore_suspend = 1,
4851 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4852 .ignore_pmdown_time = 1,
4853 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
4854 },
4855 {/* hw:x,35 */
4856 .name = "USB Audio Hostless",
4857 .stream_name = "USB Audio Hostless",
4858 .cpu_dai_name = "USBAUDIO_HOSTLESS",
4859 .platform_name = "msm-pcm-hostless",
4860 .dynamic = 1,
4861 .dpcm_playback = 1,
4862 .dpcm_capture = 1,
4863 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4864 SND_SOC_DPCM_TRIGGER_POST},
4865 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4866 .ignore_suspend = 1,
4867 .ignore_pmdown_time = 1,
4868 .codec_dai_name = "snd-soc-dummy-dai",
4869 .codec_name = "snd-soc-dummy",
4870 },
4871 {/* hw:x,36 */
4872 .name = "SLIMBUS_7 Hostless",
4873 .stream_name = "SLIMBUS_7 Hostless",
4874 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
4875 .platform_name = "msm-pcm-hostless",
4876 .dynamic = 1,
4877 .dpcm_capture = 1,
4878 .dpcm_playback = 1,
4879 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4880 SND_SOC_DPCM_TRIGGER_POST},
4881 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4882 .ignore_suspend = 1,
4883 .ignore_pmdown_time = 1,
4884 .codec_dai_name = "snd-soc-dummy-dai",
4885 .codec_name = "snd-soc-dummy",
4886 },
4887 {/* hw:x,37 */
4888 .name = "Compress Capture",
4889 .stream_name = "Compress9",
4890 .cpu_dai_name = "MultiMedia17",
4891 .platform_name = "msm-compress-dsp",
4892 .dynamic = 1,
4893 .dpcm_capture = 1,
4894 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4895 SND_SOC_DPCM_TRIGGER_POST},
4896 .codec_dai_name = "snd-soc-dummy-dai",
4897 .codec_name = "snd-soc-dummy",
4898 .ignore_suspend = 1,
4899 .ignore_pmdown_time = 1,
4900 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
4901 },
4902 {/* hw:x,38 */
4903 .name = "SLIMBUS_8 Hostless",
4904 .stream_name = "SLIMBUS_8 Hostless",
4905 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
4906 .platform_name = "msm-pcm-hostless",
4907 .dynamic = 1,
4908 .dpcm_capture = 1,
4909 .dpcm_playback = 1,
4910 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4911 SND_SOC_DPCM_TRIGGER_POST},
4912 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4913 .ignore_suspend = 1,
4914 .ignore_pmdown_time = 1,
4915 .codec_dai_name = "snd-soc-dummy-dai",
4916 .codec_name = "snd-soc-dummy",
4917 },
4918 {/* hw:x,39 */
4919 .name = LPASS_BE_TX_CDC_DMA_TX_5,
4920 .stream_name = "TX CDC DMA5 Capture",
4921 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
4922 .platform_name = "msm-pcm-hostless",
4923 .codec_name = "bolero_codec",
4924 .codec_dai_name = "tx_macro_tx3",
4925 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
4926 .be_hw_params_fixup = msm_be_hw_params_fixup,
4927 .ignore_suspend = 1,
4928 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4929 .ops = &msm_cdc_dma_be_ops,
4930 },
4931};
4932
4933static struct snd_soc_dai_link msm_common_be_dai_links[] = {
4934 /* Backend AFE DAI Links */
4935 {
4936 .name = LPASS_BE_AFE_PCM_RX,
4937 .stream_name = "AFE Playback",
4938 .cpu_dai_name = "msm-dai-q6-dev.224",
4939 .platform_name = "msm-pcm-routing",
4940 .codec_name = "msm-stub-codec.1",
4941 .codec_dai_name = "msm-stub-rx",
4942 .no_pcm = 1,
4943 .dpcm_playback = 1,
4944 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
4945 .be_hw_params_fixup = msm_be_hw_params_fixup,
4946 /* this dainlink has playback support */
4947 .ignore_pmdown_time = 1,
4948 .ignore_suspend = 1,
4949 },
4950 {
4951 .name = LPASS_BE_AFE_PCM_TX,
4952 .stream_name = "AFE Capture",
4953 .cpu_dai_name = "msm-dai-q6-dev.225",
4954 .platform_name = "msm-pcm-routing",
4955 .codec_name = "msm-stub-codec.1",
4956 .codec_dai_name = "msm-stub-tx",
4957 .no_pcm = 1,
4958 .dpcm_capture = 1,
4959 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
4960 .be_hw_params_fixup = msm_be_hw_params_fixup,
4961 .ignore_suspend = 1,
4962 },
4963 /* Incall Record Uplink BACK END DAI Link */
4964 {
4965 .name = LPASS_BE_INCALL_RECORD_TX,
4966 .stream_name = "Voice Uplink Capture",
4967 .cpu_dai_name = "msm-dai-q6-dev.32772",
4968 .platform_name = "msm-pcm-routing",
4969 .codec_name = "msm-stub-codec.1",
4970 .codec_dai_name = "msm-stub-tx",
4971 .no_pcm = 1,
4972 .dpcm_capture = 1,
4973 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
4974 .be_hw_params_fixup = msm_be_hw_params_fixup,
4975 .ignore_suspend = 1,
4976 },
4977 /* Incall Record Downlink BACK END DAI Link */
4978 {
4979 .name = LPASS_BE_INCALL_RECORD_RX,
4980 .stream_name = "Voice Downlink Capture",
4981 .cpu_dai_name = "msm-dai-q6-dev.32771",
4982 .platform_name = "msm-pcm-routing",
4983 .codec_name = "msm-stub-codec.1",
4984 .codec_dai_name = "msm-stub-tx",
4985 .no_pcm = 1,
4986 .dpcm_capture = 1,
4987 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
4988 .be_hw_params_fixup = msm_be_hw_params_fixup,
4989 .ignore_suspend = 1,
4990 },
4991 /* Incall Music BACK END DAI Link */
4992 {
4993 .name = LPASS_BE_VOICE_PLAYBACK_TX,
4994 .stream_name = "Voice Farend Playback",
4995 .cpu_dai_name = "msm-dai-q6-dev.32773",
4996 .platform_name = "msm-pcm-routing",
4997 .codec_name = "msm-stub-codec.1",
4998 .codec_dai_name = "msm-stub-rx",
4999 .no_pcm = 1,
5000 .dpcm_playback = 1,
5001 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5002 .be_hw_params_fixup = msm_be_hw_params_fixup,
5003 .ignore_suspend = 1,
5004 .ignore_pmdown_time = 1,
5005 },
5006 /* Incall Music 2 BACK END DAI Link */
5007 {
5008 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5009 .stream_name = "Voice2 Farend Playback",
5010 .cpu_dai_name = "msm-dai-q6-dev.32770",
5011 .platform_name = "msm-pcm-routing",
5012 .codec_name = "msm-stub-codec.1",
5013 .codec_dai_name = "msm-stub-rx",
5014 .no_pcm = 1,
5015 .dpcm_playback = 1,
5016 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5017 .be_hw_params_fixup = msm_be_hw_params_fixup,
5018 .ignore_suspend = 1,
5019 .ignore_pmdown_time = 1,
5020 },
5021 {
5022 .name = LPASS_BE_USB_AUDIO_RX,
5023 .stream_name = "USB Audio Playback",
5024 .cpu_dai_name = "msm-dai-q6-dev.28672",
5025 .platform_name = "msm-pcm-routing",
5026 .codec_name = "msm-stub-codec.1",
5027 .codec_dai_name = "msm-stub-rx",
5028 .dynamic_be = 1,
5029 .no_pcm = 1,
5030 .dpcm_playback = 1,
5031 .id = MSM_BACKEND_DAI_USB_RX,
5032 .be_hw_params_fixup = msm_be_hw_params_fixup,
5033 .ignore_pmdown_time = 1,
5034 .ignore_suspend = 1,
5035 },
5036 {
5037 .name = LPASS_BE_USB_AUDIO_TX,
5038 .stream_name = "USB Audio Capture",
5039 .cpu_dai_name = "msm-dai-q6-dev.28673",
5040 .platform_name = "msm-pcm-routing",
5041 .codec_name = "msm-stub-codec.1",
5042 .codec_dai_name = "msm-stub-tx",
5043 .no_pcm = 1,
5044 .dpcm_capture = 1,
5045 .id = MSM_BACKEND_DAI_USB_TX,
5046 .be_hw_params_fixup = msm_be_hw_params_fixup,
5047 .ignore_suspend = 1,
5048 },
5049 {
5050 .name = LPASS_BE_PRI_TDM_RX_0,
5051 .stream_name = "Primary TDM0 Playback",
5052 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5053 .platform_name = "msm-pcm-routing",
5054 .codec_name = "msm-stub-codec.1",
5055 .codec_dai_name = "msm-stub-rx",
5056 .no_pcm = 1,
5057 .dpcm_playback = 1,
5058 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5059 .be_hw_params_fixup = msm_be_hw_params_fixup,
5060 .ops = &bengal_tdm_be_ops,
5061 .ignore_suspend = 1,
5062 .ignore_pmdown_time = 1,
5063 },
5064 {
5065 .name = LPASS_BE_PRI_TDM_TX_0,
5066 .stream_name = "Primary TDM0 Capture",
5067 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5068 .platform_name = "msm-pcm-routing",
5069 .codec_name = "msm-stub-codec.1",
5070 .codec_dai_name = "msm-stub-tx",
5071 .no_pcm = 1,
5072 .dpcm_capture = 1,
5073 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5074 .be_hw_params_fixup = msm_be_hw_params_fixup,
5075 .ops = &bengal_tdm_be_ops,
5076 .ignore_suspend = 1,
5077 },
5078 {
5079 .name = LPASS_BE_SEC_TDM_RX_0,
5080 .stream_name = "Secondary TDM0 Playback",
5081 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5082 .platform_name = "msm-pcm-routing",
5083 .codec_name = "msm-stub-codec.1",
5084 .codec_dai_name = "msm-stub-rx",
5085 .no_pcm = 1,
5086 .dpcm_playback = 1,
5087 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5088 .be_hw_params_fixup = msm_be_hw_params_fixup,
5089 .ops = &bengal_tdm_be_ops,
5090 .ignore_suspend = 1,
5091 .ignore_pmdown_time = 1,
5092 },
5093 {
5094 .name = LPASS_BE_SEC_TDM_TX_0,
5095 .stream_name = "Secondary TDM0 Capture",
5096 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5097 .platform_name = "msm-pcm-routing",
5098 .codec_name = "msm-stub-codec.1",
5099 .codec_dai_name = "msm-stub-tx",
5100 .no_pcm = 1,
5101 .dpcm_capture = 1,
5102 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5103 .be_hw_params_fixup = msm_be_hw_params_fixup,
5104 .ops = &bengal_tdm_be_ops,
5105 .ignore_suspend = 1,
5106 },
5107 {
5108 .name = LPASS_BE_TERT_TDM_RX_0,
5109 .stream_name = "Tertiary TDM0 Playback",
5110 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5111 .platform_name = "msm-pcm-routing",
5112 .codec_name = "msm-stub-codec.1",
5113 .codec_dai_name = "msm-stub-rx",
5114 .no_pcm = 1,
5115 .dpcm_playback = 1,
5116 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5117 .be_hw_params_fixup = msm_be_hw_params_fixup,
5118 .ops = &bengal_tdm_be_ops,
5119 .ignore_suspend = 1,
5120 .ignore_pmdown_time = 1,
5121 },
5122 {
5123 .name = LPASS_BE_TERT_TDM_TX_0,
5124 .stream_name = "Tertiary TDM0 Capture",
5125 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5126 .platform_name = "msm-pcm-routing",
5127 .codec_name = "msm-stub-codec.1",
5128 .codec_dai_name = "msm-stub-tx",
5129 .no_pcm = 1,
5130 .dpcm_capture = 1,
5131 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5132 .be_hw_params_fixup = msm_be_hw_params_fixup,
5133 .ops = &bengal_tdm_be_ops,
5134 .ignore_suspend = 1,
5135 },
5136 {
5137 .name = LPASS_BE_QUAT_TDM_RX_0,
5138 .stream_name = "Quaternary TDM0 Playback",
5139 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5140 .platform_name = "msm-pcm-routing",
5141 .codec_name = "msm-stub-codec.1",
5142 .codec_dai_name = "msm-stub-rx",
5143 .no_pcm = 1,
5144 .dpcm_playback = 1,
5145 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5146 .be_hw_params_fixup = msm_be_hw_params_fixup,
5147 .ops = &bengal_tdm_be_ops,
5148 .ignore_suspend = 1,
5149 .ignore_pmdown_time = 1,
5150 },
5151 {
5152 .name = LPASS_BE_QUAT_TDM_TX_0,
5153 .stream_name = "Quaternary TDM0 Capture",
5154 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5155 .platform_name = "msm-pcm-routing",
5156 .codec_name = "msm-stub-codec.1",
5157 .codec_dai_name = "msm-stub-tx",
5158 .no_pcm = 1,
5159 .dpcm_capture = 1,
5160 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5161 .be_hw_params_fixup = msm_be_hw_params_fixup,
5162 .ops = &bengal_tdm_be_ops,
5163 .ignore_suspend = 1,
5164 },
5165};
5166
5167static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5168 {
5169 .name = LPASS_BE_SLIMBUS_7_RX,
5170 .stream_name = "Slimbus7 Playback",
5171 .cpu_dai_name = "msm-dai-q6-dev.16398",
5172 .platform_name = "msm-pcm-routing",
5173 .codec_name = "btfmslim_slave",
5174 /* BT codec driver determines capabilities based on
5175 * dai name, bt codecdai name should always contains
5176 * supported usecase information
5177 */
5178 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5179 .no_pcm = 1,
5180 .dpcm_playback = 1,
5181 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5182 .be_hw_params_fixup = msm_be_hw_params_fixup,
5183 .init = &msm_wcn_init,
5184 .ops = &msm_wcn_ops,
5185 /* dai link has playback support */
5186 .ignore_pmdown_time = 1,
5187 .ignore_suspend = 1,
5188 },
5189 {
5190 .name = LPASS_BE_SLIMBUS_7_TX,
5191 .stream_name = "Slimbus7 Capture",
5192 .cpu_dai_name = "msm-dai-q6-dev.16399",
5193 .platform_name = "msm-pcm-routing",
5194 .codec_name = "btfmslim_slave",
5195 .codec_dai_name = "btfm_bt_sco_slim_tx",
5196 .no_pcm = 1,
5197 .dpcm_capture = 1,
5198 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5199 .be_hw_params_fixup = msm_be_hw_params_fixup,
5200 .ops = &msm_wcn_ops,
5201 .ignore_suspend = 1,
5202 },
5203 {
5204 .name = LPASS_BE_SLIMBUS_8_TX,
5205 .stream_name = "Slimbus8 Capture",
5206 .cpu_dai_name = "msm-dai-q6-dev.16401",
5207 .platform_name = "msm-pcm-routing",
5208 .codec_name = "btfmslim_slave",
5209 .codec_dai_name = "btfm_fm_slim_tx",
5210 .no_pcm = 1,
5211 .dpcm_capture = 1,
5212 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5213 .be_hw_params_fixup = msm_be_hw_params_fixup,
5214 .ops = &msm_wcn_ops,
5215 .ignore_suspend = 1,
5216 },
5217};
5218
5219static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5220 {
5221 .name = LPASS_BE_PRI_MI2S_RX,
5222 .stream_name = "Primary MI2S Playback",
5223 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5224 .platform_name = "msm-pcm-routing",
5225 .codec_name = "msm-stub-codec.1",
5226 .codec_dai_name = "msm-stub-rx",
5227 .no_pcm = 1,
5228 .dpcm_playback = 1,
5229 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5230 .be_hw_params_fixup = msm_be_hw_params_fixup,
5231 .ops = &msm_mi2s_be_ops,
5232 .ignore_suspend = 1,
5233 .ignore_pmdown_time = 1,
5234 },
5235 {
5236 .name = LPASS_BE_PRI_MI2S_TX,
5237 .stream_name = "Primary MI2S Capture",
5238 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5239 .platform_name = "msm-pcm-routing",
5240 .codec_name = "msm-stub-codec.1",
5241 .codec_dai_name = "msm-stub-tx",
5242 .no_pcm = 1,
5243 .dpcm_capture = 1,
5244 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5245 .be_hw_params_fixup = msm_be_hw_params_fixup,
5246 .ops = &msm_mi2s_be_ops,
5247 .ignore_suspend = 1,
5248 },
5249 {
5250 .name = LPASS_BE_SEC_MI2S_RX,
5251 .stream_name = "Secondary MI2S Playback",
5252 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5253 .platform_name = "msm-pcm-routing",
5254 .codec_name = "msm-stub-codec.1",
5255 .codec_dai_name = "msm-stub-rx",
5256 .no_pcm = 1,
5257 .dpcm_playback = 1,
5258 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5259 .be_hw_params_fixup = msm_be_hw_params_fixup,
5260 .ops = &msm_mi2s_be_ops,
5261 .ignore_suspend = 1,
5262 .ignore_pmdown_time = 1,
5263 },
5264 {
5265 .name = LPASS_BE_SEC_MI2S_TX,
5266 .stream_name = "Secondary MI2S Capture",
5267 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5268 .platform_name = "msm-pcm-routing",
5269 .codec_name = "msm-stub-codec.1",
5270 .codec_dai_name = "msm-stub-tx",
5271 .no_pcm = 1,
5272 .dpcm_capture = 1,
5273 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5274 .be_hw_params_fixup = msm_be_hw_params_fixup,
5275 .ops = &msm_mi2s_be_ops,
5276 .ignore_suspend = 1,
5277 },
5278 {
5279 .name = LPASS_BE_TERT_MI2S_RX,
5280 .stream_name = "Tertiary MI2S Playback",
5281 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5282 .platform_name = "msm-pcm-routing",
5283 .codec_name = "msm-stub-codec.1",
5284 .codec_dai_name = "msm-stub-rx",
5285 .no_pcm = 1,
5286 .dpcm_playback = 1,
5287 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5288 .be_hw_params_fixup = msm_be_hw_params_fixup,
5289 .ops = &msm_mi2s_be_ops,
5290 .ignore_suspend = 1,
5291 .ignore_pmdown_time = 1,
5292 },
5293 {
5294 .name = LPASS_BE_TERT_MI2S_TX,
5295 .stream_name = "Tertiary MI2S Capture",
5296 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5297 .platform_name = "msm-pcm-routing",
5298 .codec_name = "msm-stub-codec.1",
5299 .codec_dai_name = "msm-stub-tx",
5300 .no_pcm = 1,
5301 .dpcm_capture = 1,
5302 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5303 .be_hw_params_fixup = msm_be_hw_params_fixup,
5304 .ops = &msm_mi2s_be_ops,
5305 .ignore_suspend = 1,
5306 },
5307 {
5308 .name = LPASS_BE_QUAT_MI2S_RX,
5309 .stream_name = "Quaternary MI2S Playback",
5310 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5311 .platform_name = "msm-pcm-routing",
5312 .codec_name = "msm-stub-codec.1",
5313 .codec_dai_name = "msm-stub-rx",
5314 .no_pcm = 1,
5315 .dpcm_playback = 1,
5316 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
5317 .be_hw_params_fixup = msm_be_hw_params_fixup,
5318 .ops = &msm_mi2s_be_ops,
5319 .ignore_suspend = 1,
5320 .ignore_pmdown_time = 1,
5321 },
5322 {
5323 .name = LPASS_BE_QUAT_MI2S_TX,
5324 .stream_name = "Quaternary MI2S Capture",
5325 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5326 .platform_name = "msm-pcm-routing",
5327 .codec_name = "msm-stub-codec.1",
5328 .codec_dai_name = "msm-stub-tx",
5329 .no_pcm = 1,
5330 .dpcm_capture = 1,
5331 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
5332 .be_hw_params_fixup = msm_be_hw_params_fixup,
5333 .ops = &msm_mi2s_be_ops,
5334 .ignore_suspend = 1,
5335 },
5336};
5337
5338static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5339 /* Primary AUX PCM Backend DAI Links */
5340 {
5341 .name = LPASS_BE_AUXPCM_RX,
5342 .stream_name = "AUX PCM Playback",
5343 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5344 .platform_name = "msm-pcm-routing",
5345 .codec_name = "msm-stub-codec.1",
5346 .codec_dai_name = "msm-stub-rx",
5347 .no_pcm = 1,
5348 .dpcm_playback = 1,
5349 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5350 .be_hw_params_fixup = msm_be_hw_params_fixup,
5351 .ops = &bengal_aux_be_ops,
5352 .ignore_pmdown_time = 1,
5353 .ignore_suspend = 1,
5354 },
5355 {
5356 .name = LPASS_BE_AUXPCM_TX,
5357 .stream_name = "AUX PCM Capture",
5358 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5359 .platform_name = "msm-pcm-routing",
5360 .codec_name = "msm-stub-codec.1",
5361 .codec_dai_name = "msm-stub-tx",
5362 .no_pcm = 1,
5363 .dpcm_capture = 1,
5364 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5365 .be_hw_params_fixup = msm_be_hw_params_fixup,
5366 .ops = &bengal_aux_be_ops,
5367 .ignore_suspend = 1,
5368 },
5369 /* Secondary AUX PCM Backend DAI Links */
5370 {
5371 .name = LPASS_BE_SEC_AUXPCM_RX,
5372 .stream_name = "Sec AUX PCM Playback",
5373 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5374 .platform_name = "msm-pcm-routing",
5375 .codec_name = "msm-stub-codec.1",
5376 .codec_dai_name = "msm-stub-rx",
5377 .no_pcm = 1,
5378 .dpcm_playback = 1,
5379 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5380 .be_hw_params_fixup = msm_be_hw_params_fixup,
5381 .ops = &bengal_aux_be_ops,
5382 .ignore_pmdown_time = 1,
5383 .ignore_suspend = 1,
5384 },
5385 {
5386 .name = LPASS_BE_SEC_AUXPCM_TX,
5387 .stream_name = "Sec AUX PCM Capture",
5388 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5389 .platform_name = "msm-pcm-routing",
5390 .codec_name = "msm-stub-codec.1",
5391 .codec_dai_name = "msm-stub-tx",
5392 .no_pcm = 1,
5393 .dpcm_capture = 1,
5394 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5395 .be_hw_params_fixup = msm_be_hw_params_fixup,
5396 .ops = &bengal_aux_be_ops,
5397 .ignore_suspend = 1,
5398 },
5399 /* Tertiary AUX PCM Backend DAI Links */
5400 {
5401 .name = LPASS_BE_TERT_AUXPCM_RX,
5402 .stream_name = "Tert AUX PCM Playback",
5403 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5404 .platform_name = "msm-pcm-routing",
5405 .codec_name = "msm-stub-codec.1",
5406 .codec_dai_name = "msm-stub-rx",
5407 .no_pcm = 1,
5408 .dpcm_playback = 1,
5409 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5410 .be_hw_params_fixup = msm_be_hw_params_fixup,
5411 .ops = &bengal_aux_be_ops,
5412 .ignore_suspend = 1,
5413 },
5414 {
5415 .name = LPASS_BE_TERT_AUXPCM_TX,
5416 .stream_name = "Tert AUX PCM Capture",
5417 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5418 .platform_name = "msm-pcm-routing",
5419 .codec_name = "msm-stub-codec.1",
5420 .codec_dai_name = "msm-stub-tx",
5421 .no_pcm = 1,
5422 .dpcm_capture = 1,
5423 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5424 .be_hw_params_fixup = msm_be_hw_params_fixup,
5425 .ops = &bengal_aux_be_ops,
5426 .ignore_suspend = 1,
5427 },
5428 /* Quaternary AUX PCM Backend DAI Links */
5429 {
5430 .name = LPASS_BE_QUAT_AUXPCM_RX,
5431 .stream_name = "Quat AUX PCM Playback",
5432 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5433 .platform_name = "msm-pcm-routing",
5434 .codec_name = "msm-stub-codec.1",
5435 .codec_dai_name = "msm-stub-rx",
5436 .no_pcm = 1,
5437 .dpcm_playback = 1,
5438 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
5439 .be_hw_params_fixup = msm_be_hw_params_fixup,
5440 .ops = &bengal_aux_be_ops,
5441 .ignore_suspend = 1,
5442 },
5443 {
5444 .name = LPASS_BE_QUAT_AUXPCM_TX,
5445 .stream_name = "Quat AUX PCM Capture",
5446 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5447 .platform_name = "msm-pcm-routing",
5448 .codec_name = "msm-stub-codec.1",
5449 .codec_dai_name = "msm-stub-tx",
5450 .no_pcm = 1,
5451 .dpcm_capture = 1,
5452 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
5453 .be_hw_params_fixup = msm_be_hw_params_fixup,
5454 .ops = &bengal_aux_be_ops,
5455 .ignore_suspend = 1,
5456 },
5457};
5458
5459static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5460 /* RX CDC DMA Backend DAI Links */
5461 {
5462 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5463 .stream_name = "RX CDC DMA0 Playback",
5464 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5465 .platform_name = "msm-pcm-routing",
5466 .codec_name = "bolero_codec",
5467 .codec_dai_name = "rx_macro_rx1",
5468 .dynamic_be = 1,
5469 .no_pcm = 1,
5470 .dpcm_playback = 1,
5471 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5472 .be_hw_params_fixup = msm_be_hw_params_fixup,
5473 .ignore_pmdown_time = 1,
5474 .ignore_suspend = 1,
5475 .ops = &msm_cdc_dma_be_ops,
5476 },
5477 {
5478 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5479 .stream_name = "RX CDC DMA1 Playback",
5480 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5481 .platform_name = "msm-pcm-routing",
5482 .codec_name = "bolero_codec",
5483 .codec_dai_name = "rx_macro_rx2",
5484 .dynamic_be = 1,
5485 .no_pcm = 1,
5486 .dpcm_playback = 1,
5487 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5488 .be_hw_params_fixup = msm_be_hw_params_fixup,
5489 .ignore_pmdown_time = 1,
5490 .ignore_suspend = 1,
5491 .ops = &msm_cdc_dma_be_ops,
5492 },
5493 {
5494 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5495 .stream_name = "RX CDC DMA2 Playback",
5496 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5497 .platform_name = "msm-pcm-routing",
5498 .codec_name = "bolero_codec",
5499 .codec_dai_name = "rx_macro_rx3",
5500 .dynamic_be = 1,
5501 .no_pcm = 1,
5502 .dpcm_playback = 1,
5503 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5504 .be_hw_params_fixup = msm_be_hw_params_fixup,
5505 .ignore_pmdown_time = 1,
5506 .ignore_suspend = 1,
5507 .ops = &msm_cdc_dma_be_ops,
5508 },
5509 {
5510 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5511 .stream_name = "RX CDC DMA3 Playback",
5512 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5513 .platform_name = "msm-pcm-routing",
5514 .codec_name = "bolero_codec",
5515 .codec_dai_name = "rx_macro_rx4",
5516 .dynamic_be = 1,
5517 .no_pcm = 1,
5518 .dpcm_playback = 1,
5519 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5520 .be_hw_params_fixup = msm_be_hw_params_fixup,
5521 .ignore_pmdown_time = 1,
5522 .ignore_suspend = 1,
5523 .ops = &msm_cdc_dma_be_ops,
5524 },
5525 /* TX CDC DMA Backend DAI Links */
5526 {
5527 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5528 .stream_name = "TX CDC DMA3 Capture",
5529 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5530 .platform_name = "msm-pcm-routing",
5531 .codec_name = "bolero_codec",
5532 .codec_dai_name = "tx_macro_tx1",
5533 .no_pcm = 1,
5534 .dpcm_capture = 1,
5535 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5536 .be_hw_params_fixup = msm_be_hw_params_fixup,
5537 .ignore_suspend = 1,
5538 .ops = &msm_cdc_dma_be_ops,
5539 },
5540 {
5541 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5542 .stream_name = "TX CDC DMA4 Capture",
5543 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5544 .platform_name = "msm-pcm-routing",
5545 .codec_name = "bolero_codec",
5546 .codec_dai_name = "tx_macro_tx2",
5547 .no_pcm = 1,
5548 .dpcm_capture = 1,
5549 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5550 .be_hw_params_fixup = msm_be_hw_params_fixup,
5551 .ignore_suspend = 1,
5552 .ops = &msm_cdc_dma_be_ops,
5553 },
5554};
5555
5556static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5557 {
5558 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5559 .stream_name = "VA CDC DMA0 Capture",
5560 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5561 .platform_name = "msm-pcm-routing",
5562 .codec_name = "bolero_codec",
5563 .codec_dai_name = "va_macro_tx1",
5564 .no_pcm = 1,
5565 .dpcm_capture = 1,
5566 .init = &msm_int_audrx_init,
5567 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5568 .be_hw_params_fixup = msm_be_hw_params_fixup,
5569 .ignore_suspend = 1,
5570 .ops = &msm_cdc_dma_be_ops,
5571 },
5572 {
5573 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5574 .stream_name = "VA CDC DMA1 Capture",
5575 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5576 .platform_name = "msm-pcm-routing",
5577 .codec_name = "bolero_codec",
5578 .codec_dai_name = "va_macro_tx2",
5579 .no_pcm = 1,
5580 .dpcm_capture = 1,
5581 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5582 .be_hw_params_fixup = msm_be_hw_params_fixup,
5583 .ignore_suspend = 1,
5584 .ops = &msm_cdc_dma_be_ops,
5585 },
5586 {
5587 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5588 .stream_name = "VA CDC DMA2 Capture",
5589 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5590 .platform_name = "msm-pcm-routing",
5591 .codec_name = "bolero_codec",
5592 .codec_dai_name = "va_macro_tx3",
5593 .no_pcm = 1,
5594 .dpcm_capture = 1,
5595 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5596 .be_hw_params_fixup = msm_be_hw_params_fixup,
5597 .ignore_suspend = 1,
5598 .ops = &msm_cdc_dma_be_ops,
5599 },
5600};
5601
5602static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5603 {
5604 .name = LPASS_BE_AFE_LOOPBACK_TX,
5605 .stream_name = "AFE Loopback Capture",
5606 .cpu_dai_name = "msm-dai-q6-dev.24577",
5607 .platform_name = "msm-pcm-routing",
5608 .codec_name = "msm-stub-codec.1",
5609 .codec_dai_name = "msm-stub-tx",
5610 .no_pcm = 1,
5611 .dpcm_capture = 1,
5612 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5613 .be_hw_params_fixup = msm_be_hw_params_fixup,
5614 .ignore_pmdown_time = 1,
5615 .ignore_suspend = 1,
5616 },
5617};
5618
5619static struct snd_soc_dai_link msm_bengal_dai_links[
5620 ARRAY_SIZE(msm_common_dai_links) +
5621 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5622 ARRAY_SIZE(msm_common_be_dai_links) +
5623 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5624 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5625 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
5626 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5627 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
5628 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
5629
5630static int msm_populate_dai_link_component_of_node(
5631 struct snd_soc_card *card)
5632{
5633 int i, index, ret = 0;
5634 struct device *cdev = card->dev;
5635 struct snd_soc_dai_link *dai_link = card->dai_link;
5636 struct device_node *np;
5637
5638 if (!cdev) {
5639 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5640 return -ENODEV;
5641 }
5642
5643 for (i = 0; i < card->num_links; i++) {
5644 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5645 continue;
5646
5647 /* populate platform_of_node for snd card dai links */
5648 if (dai_link[i].platform_name &&
5649 !dai_link[i].platform_of_node) {
5650 index = of_property_match_string(cdev->of_node,
5651 "asoc-platform-names",
5652 dai_link[i].platform_name);
5653 if (index < 0) {
5654 dev_err(cdev,
5655 "%s: No match found for platform name: %s\n",
5656 __func__, dai_link[i].platform_name);
5657 ret = index;
5658 goto err;
5659 }
5660 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5661 index);
5662 if (!np) {
5663 dev_err(cdev,
5664 "%s: retrieving phandle for platform %s, index %d failed\n",
5665 __func__, dai_link[i].platform_name,
5666 index);
5667 ret = -ENODEV;
5668 goto err;
5669 }
5670 dai_link[i].platform_of_node = np;
5671 dai_link[i].platform_name = NULL;
5672 }
5673
5674 /* populate cpu_of_node for snd card dai links */
5675 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5676 index = of_property_match_string(cdev->of_node,
5677 "asoc-cpu-names",
5678 dai_link[i].cpu_dai_name);
5679 if (index >= 0) {
5680 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5681 index);
5682 if (!np) {
5683 dev_err(cdev,
5684 "%s: retrieving phandle for cpu dai %s failed\n",
5685 __func__,
5686 dai_link[i].cpu_dai_name);
5687 ret = -ENODEV;
5688 goto err;
5689 }
5690 dai_link[i].cpu_of_node = np;
5691 dai_link[i].cpu_dai_name = NULL;
5692 }
5693 }
5694
5695 /* populate codec_of_node for snd card dai links */
5696 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5697 index = of_property_match_string(cdev->of_node,
5698 "asoc-codec-names",
5699 dai_link[i].codec_name);
5700 if (index < 0)
5701 continue;
5702 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5703 index);
5704 if (!np) {
5705 dev_err(cdev,
5706 "%s: retrieving phandle for codec %s failed\n",
5707 __func__, dai_link[i].codec_name);
5708 ret = -ENODEV;
5709 goto err;
5710 }
5711 dai_link[i].codec_of_node = np;
5712 dai_link[i].codec_name = NULL;
5713 }
5714 }
5715
5716err:
5717 return ret;
5718}
5719
5720static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
5721{
5722 int ret = -EINVAL;
5723 struct snd_soc_component *component =
5724 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
5725
5726 if (!component) {
5727 pr_err("* %s: No match for msm-stub-codec component\n",
5728 __func__);
5729 return ret;
5730 }
5731
5732 ret = snd_soc_add_component_controls(component, msm_snd_controls,
5733 ARRAY_SIZE(msm_snd_controls));
5734 if (ret < 0) {
5735 dev_err(component->dev,
5736 "%s: add_codec_controls failed, err = %d\n",
5737 __func__, ret);
5738 return ret;
5739 }
5740
5741 return ret;
5742}
5743
5744static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
5745 struct snd_pcm_hw_params *params)
5746{
5747 return 0;
5748}
5749
5750static struct snd_soc_ops msm_stub_be_ops = {
5751 .hw_params = msm_snd_stub_hw_params,
5752};
5753
5754struct snd_soc_card snd_soc_card_stub_msm = {
5755 .name = "bengal-stub-snd-card",
5756};
5757
5758static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
5759 /* FrontEnd DAI Links */
5760 {
5761 .name = "MSMSTUB Media1",
5762 .stream_name = "MultiMedia1",
5763 .cpu_dai_name = "MultiMedia1",
5764 .platform_name = "msm-pcm-dsp.0",
5765 .dynamic = 1,
5766 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5767 .dpcm_playback = 1,
5768 .dpcm_capture = 1,
5769 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5770 SND_SOC_DPCM_TRIGGER_POST},
5771 .codec_dai_name = "snd-soc-dummy-dai",
5772 .codec_name = "snd-soc-dummy",
5773 .ignore_suspend = 1,
5774 /* this dainlink has playback support */
5775 .ignore_pmdown_time = 1,
5776 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5777 },
5778};
5779
5780static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
5781 /* Backend DAI Links */
5782 {
5783 .name = LPASS_BE_AUXPCM_RX,
5784 .stream_name = "AUX PCM Playback",
5785 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5786 .platform_name = "msm-pcm-routing",
5787 .codec_name = "msm-stub-codec.1",
5788 .codec_dai_name = "msm-stub-rx",
5789 .no_pcm = 1,
5790 .dpcm_playback = 1,
5791 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5792 .init = &msm_audrx_stub_init,
5793 .be_hw_params_fixup = msm_be_hw_params_fixup,
5794 .ignore_pmdown_time = 1,
5795 .ignore_suspend = 1,
5796 .ops = &msm_stub_be_ops,
5797 },
5798 {
5799 .name = LPASS_BE_AUXPCM_TX,
5800 .stream_name = "AUX PCM Capture",
5801 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5802 .platform_name = "msm-pcm-routing",
5803 .codec_name = "msm-stub-codec.1",
5804 .codec_dai_name = "msm-stub-tx",
5805 .no_pcm = 1,
5806 .dpcm_capture = 1,
5807 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5808 .be_hw_params_fixup = msm_be_hw_params_fixup,
5809 .ignore_suspend = 1,
5810 .ops = &msm_stub_be_ops,
5811 },
5812};
5813
5814static struct snd_soc_dai_link msm_stub_dai_links[
5815 ARRAY_SIZE(msm_stub_fe_dai_links) +
5816 ARRAY_SIZE(msm_stub_be_dai_links)];
5817
5818static const struct of_device_id bengal_asoc_machine_of_match[] = {
5819 { .compatible = "qcom,bengal-asoc-snd",
5820 .data = "codec"},
5821 { .compatible = "qcom,bengal-asoc-snd-stub",
5822 .data = "stub_codec"},
5823 {},
5824};
5825
5826static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
5827{
5828 struct snd_soc_card *card = NULL;
5829 struct snd_soc_dai_link *dailink = NULL;
5830 int len_1 = 0;
5831 int len_2 = 0;
5832 int total_links = 0;
5833 int rc = 0;
5834 u32 mi2s_audio_intf = 0;
5835 u32 auxpcm_audio_intf = 0;
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame^]5836 u32 rxtx_bolero_codec = 0;
5837 u32 va_bolero_codec = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5838 u32 val = 0;
5839 u32 wcn_btfm_intf = 0;
5840 const struct of_device_id *match;
5841
5842 match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
5843 if (!match) {
5844 dev_err(dev, "%s: No DT match found for sound card\n",
5845 __func__);
5846 return NULL;
5847 }
5848
5849 if (!strcmp(match->data, "codec")) {
5850 card = &snd_soc_card_bengal_msm;
5851
5852 memcpy(msm_bengal_dai_links + total_links,
5853 msm_common_dai_links,
5854 sizeof(msm_common_dai_links));
5855 total_links += ARRAY_SIZE(msm_common_dai_links);
5856
5857 memcpy(msm_bengal_dai_links + total_links,
5858 msm_common_misc_fe_dai_links,
5859 sizeof(msm_common_misc_fe_dai_links));
5860 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
5861
5862 memcpy(msm_bengal_dai_links + total_links,
5863 msm_common_be_dai_links,
5864 sizeof(msm_common_be_dai_links));
5865 total_links += ARRAY_SIZE(msm_common_be_dai_links);
5866
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame^]5867 rc = of_property_read_u32(dev->of_node,
5868 "qcom,rxtx-bolero-codec",
5869 &rxtx_bolero_codec);
5870 if (rc) {
5871 dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
5872 __func__);
5873 } else {
5874 if (rxtx_bolero_codec) {
5875 memcpy(msm_bengal_dai_links + total_links,
5876 msm_rx_tx_cdc_dma_be_dai_links,
5877 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
5878 total_links +=
5879 ARRAY_SIZE(
5880 msm_rx_tx_cdc_dma_be_dai_links);
5881 }
5882 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5883
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame^]5884 rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
5885 &va_bolero_codec);
5886 if (rc) {
5887 dev_dbg(dev, "%s: No DT match VA Macro codec\n",
5888 __func__);
5889 } else {
5890 if (va_bolero_codec) {
5891 memcpy(msm_bengal_dai_links + total_links,
5892 msm_va_cdc_dma_be_dai_links,
5893 sizeof(msm_va_cdc_dma_be_dai_links));
5894 total_links +=
5895 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
5896 }
5897 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5898
5899 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
5900 &mi2s_audio_intf);
5901 if (rc) {
5902 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
5903 __func__);
5904 } else {
5905 if (mi2s_audio_intf) {
5906 memcpy(msm_bengal_dai_links + total_links,
5907 msm_mi2s_be_dai_links,
5908 sizeof(msm_mi2s_be_dai_links));
5909 total_links +=
5910 ARRAY_SIZE(msm_mi2s_be_dai_links);
5911 }
5912 }
5913
5914 rc = of_property_read_u32(dev->of_node,
5915 "qcom,auxpcm-audio-intf",
5916 &auxpcm_audio_intf);
5917 if (rc) {
5918 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
5919 __func__);
5920 } else {
5921 if (auxpcm_audio_intf) {
5922 memcpy(msm_bengal_dai_links + total_links,
5923 msm_auxpcm_be_dai_links,
5924 sizeof(msm_auxpcm_be_dai_links));
5925 total_links +=
5926 ARRAY_SIZE(msm_auxpcm_be_dai_links);
5927 }
5928 }
5929
5930 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
5931 &val);
5932 if (!rc && val) {
5933 memcpy(msm_bengal_dai_links + total_links,
5934 msm_afe_rxtx_lb_be_dai_link,
5935 sizeof(msm_afe_rxtx_lb_be_dai_link));
5936 total_links +=
5937 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
5938 }
5939
5940 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
5941 &wcn_btfm_intf);
5942 if (rc) {
5943 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
5944 __func__);
5945 } else {
5946 if (wcn_btfm_intf) {
5947 memcpy(msm_bengal_dai_links + total_links,
5948 msm_wcn_btfm_be_dai_links,
5949 sizeof(msm_wcn_btfm_be_dai_links));
5950 total_links +=
5951 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
5952 }
5953 }
5954 dailink = msm_bengal_dai_links;
5955 } else if (!strcmp(match->data, "stub_codec")) {
5956 card = &snd_soc_card_stub_msm;
5957 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
5958 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
5959
5960 memcpy(msm_stub_dai_links,
5961 msm_stub_fe_dai_links,
5962 sizeof(msm_stub_fe_dai_links));
5963 memcpy(msm_stub_dai_links + len_1,
5964 msm_stub_be_dai_links,
5965 sizeof(msm_stub_be_dai_links));
5966
5967 dailink = msm_stub_dai_links;
5968 total_links = len_2;
5969 }
5970
5971 if (card) {
5972 card->dai_link = dailink;
5973 card->num_links = total_links;
5974 }
5975
5976 return card;
5977}
5978
5979static int msm_aux_codec_init(struct snd_soc_component *component)
5980{
5981 struct snd_soc_dapm_context *dapm =
5982 snd_soc_component_get_dapm(component);
5983 int ret = 0;
5984 void *mbhc_calibration;
5985 struct snd_info_entry *entry;
5986 struct snd_card *card = component->card->snd_card;
5987 struct msm_asoc_mach_data *pdata;
5988
5989 snd_soc_dapm_ignore_suspend(dapm, "EAR");
5990 snd_soc_dapm_ignore_suspend(dapm, "AUX");
5991 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
5992 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
5993 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
5994 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
5995 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
5996 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
5997 snd_soc_dapm_sync(dapm);
5998
5999 pdata = snd_soc_card_get_drvdata(component->card);
6000 if (!pdata->codec_root) {
6001 entry = snd_info_create_subdir(card->module, "codecs",
6002 card->proc_root);
6003 if (!entry) {
6004 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
6005 __func__);
6006 ret = 0;
6007 goto mbhc_cfg_cal;
6008 }
6009 pdata->codec_root = entry;
6010 }
6011 wcd937x_info_create_codec_entry(pdata->codec_root, component);
6012
6013mbhc_cfg_cal:
6014 mbhc_calibration = def_wcd_mbhc_cal();
6015 if (!mbhc_calibration)
6016 return -ENOMEM;
6017 wcd_mbhc_cfg.calibration = mbhc_calibration;
6018 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6019 if (ret) {
6020 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6021 __func__, ret);
6022 goto err_hs_detect;
6023 }
6024 return 0;
6025
6026err_hs_detect:
6027 kfree(mbhc_calibration);
6028 return ret;
6029}
6030
6031static int msm_init_aux_dev(struct platform_device *pdev,
6032 struct snd_soc_card *card)
6033{
6034 struct device_node *wsa_of_node;
6035 struct device_node *aux_codec_of_node;
6036 u32 wsa_max_devs;
6037 u32 wsa_dev_cnt;
6038 u32 codec_max_aux_devs = 0;
6039 u32 codec_aux_dev_cnt = 0;
6040 int i;
6041 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6042 struct aux_codec_dev_info *aux_cdc_dev_info;
6043 const char *auxdev_name_prefix[1];
6044 char *dev_name_str = NULL;
6045 int found = 0;
6046 int codecs_found = 0;
6047 int ret = 0;
6048
6049 /* Get maximum WSA device count for this platform */
6050 ret = of_property_read_u32(pdev->dev.of_node,
6051 "qcom,wsa-max-devs", &wsa_max_devs);
6052 if (ret) {
6053 dev_info(&pdev->dev,
6054 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6055 __func__, pdev->dev.of_node->full_name, ret);
6056 wsa_max_devs = 0;
6057 goto codec_aux_dev;
6058 }
6059 if (wsa_max_devs == 0) {
6060 dev_warn(&pdev->dev,
6061 "%s: Max WSA devices is 0 for this target?\n",
6062 __func__);
6063 goto codec_aux_dev;
6064 }
6065
6066 /* Get count of WSA device phandles for this platform */
6067 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6068 "qcom,wsa-devs", NULL);
6069 if (wsa_dev_cnt == -ENOENT) {
6070 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6071 __func__);
6072 goto err;
6073 } else if (wsa_dev_cnt <= 0) {
6074 dev_err(&pdev->dev,
6075 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6076 __func__, wsa_dev_cnt);
6077 ret = -EINVAL;
6078 goto err;
6079 }
6080
6081 /*
6082 * Expect total phandles count to be NOT less than maximum possible
6083 * WSA count. However, if it is less, then assign same value to
6084 * max count as well.
6085 */
6086 if (wsa_dev_cnt < wsa_max_devs) {
6087 dev_dbg(&pdev->dev,
6088 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6089 __func__, wsa_max_devs, wsa_dev_cnt);
6090 wsa_max_devs = wsa_dev_cnt;
6091 }
6092
6093 /* Make sure prefix string passed for each WSA device */
6094 ret = of_property_count_strings(pdev->dev.of_node,
6095 "qcom,wsa-aux-dev-prefix");
6096 if (ret != wsa_dev_cnt) {
6097 dev_err(&pdev->dev,
6098 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6099 __func__, wsa_dev_cnt, ret);
6100 ret = -EINVAL;
6101 goto err;
6102 }
6103
6104 /*
6105 * Alloc mem to store phandle and index info of WSA device, if already
6106 * registered with ALSA core
6107 */
6108 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6109 sizeof(struct msm_wsa881x_dev_info),
6110 GFP_KERNEL);
6111 if (!wsa881x_dev_info) {
6112 ret = -ENOMEM;
6113 goto err;
6114 }
6115
6116 /*
6117 * search and check whether all WSA devices are already
6118 * registered with ALSA core or not. If found a node, store
6119 * the node and the index in a local array of struct for later
6120 * use.
6121 */
6122 for (i = 0; i < wsa_dev_cnt; i++) {
6123 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6124 "qcom,wsa-devs", i);
6125 if (unlikely(!wsa_of_node)) {
6126 /* we should not be here */
6127 dev_err(&pdev->dev,
6128 "%s: wsa dev node is not present\n",
6129 __func__);
6130 ret = -EINVAL;
6131 goto err;
6132 }
6133 if (soc_find_component(wsa_of_node, NULL)) {
6134 /* WSA device registered with ALSA core */
6135 wsa881x_dev_info[found].of_node = wsa_of_node;
6136 wsa881x_dev_info[found].index = i;
6137 found++;
6138 if (found == wsa_max_devs)
6139 break;
6140 }
6141 }
6142
6143 if (found < wsa_max_devs) {
6144 dev_dbg(&pdev->dev,
6145 "%s: failed to find %d components. Found only %d\n",
6146 __func__, wsa_max_devs, found);
6147 return -EPROBE_DEFER;
6148 }
6149 dev_info(&pdev->dev,
6150 "%s: found %d wsa881x devices registered with ALSA core\n",
6151 __func__, found);
6152
6153codec_aux_dev:
6154 /* Get maximum aux codec device count for this platform */
6155 ret = of_property_read_u32(pdev->dev.of_node,
6156 "qcom,codec-max-aux-devs",
6157 &codec_max_aux_devs);
6158 if (ret) {
6159 dev_err(&pdev->dev,
6160 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
6161 __func__, pdev->dev.of_node->full_name, ret);
6162 codec_max_aux_devs = 0;
6163 goto aux_dev_register;
6164 }
6165 if (codec_max_aux_devs == 0) {
6166 dev_dbg(&pdev->dev,
6167 "%s: Max aux codec devices is 0 for this target?\n",
6168 __func__);
6169 goto aux_dev_register;
6170 }
6171
6172 /* Get count of aux codec device phandles for this platform */
6173 codec_aux_dev_cnt = of_count_phandle_with_args(
6174 pdev->dev.of_node,
6175 "qcom,codec-aux-devs", NULL);
6176 if (codec_aux_dev_cnt == -ENOENT) {
6177 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6178 __func__);
6179 goto err;
6180 } else if (codec_aux_dev_cnt <= 0) {
6181 dev_err(&pdev->dev,
6182 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6183 __func__, codec_aux_dev_cnt);
6184 ret = -EINVAL;
6185 goto err;
6186 }
6187
6188 /*
6189 * Expect total phandles count to be NOT less than maximum possible
6190 * AUX device count. However, if it is less, then assign same value to
6191 * max count as well.
6192 */
6193 if (codec_aux_dev_cnt < codec_max_aux_devs) {
6194 dev_dbg(&pdev->dev,
6195 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
6196 __func__, codec_max_aux_devs,
6197 codec_aux_dev_cnt);
6198 codec_max_aux_devs = codec_aux_dev_cnt;
6199 }
6200
6201 /*
6202 * Alloc mem to store phandle and index info of aux codec
6203 * if already registered with ALSA core
6204 */
6205 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6206 sizeof(struct aux_codec_dev_info),
6207 GFP_KERNEL);
6208 if (!aux_cdc_dev_info) {
6209 ret = -ENOMEM;
6210 goto err;
6211 }
6212
6213 /*
6214 * search and check whether all aux codecs are already
6215 * registered with ALSA core or not. If found a node, store
6216 * the node and the index in a local array of struct for later
6217 * use.
6218 */
6219 for (i = 0; i < codec_aux_dev_cnt; i++) {
6220 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6221 "qcom,codec-aux-devs", i);
6222 if (unlikely(!aux_codec_of_node)) {
6223 /* we should not be here */
6224 dev_err(&pdev->dev,
6225 "%s: aux codec dev node is not present\n",
6226 __func__);
6227 ret = -EINVAL;
6228 goto err;
6229 }
6230 if (soc_find_component(aux_codec_of_node, NULL)) {
6231 /* AUX codec registered with ALSA core */
6232 aux_cdc_dev_info[codecs_found].of_node =
6233 aux_codec_of_node;
6234 aux_cdc_dev_info[codecs_found].index = i;
6235 codecs_found++;
6236 }
6237 }
6238
6239 if (codecs_found < codec_aux_dev_cnt) {
6240 dev_dbg(&pdev->dev,
6241 "%s: failed to find %d components. Found only %d\n",
6242 __func__, codec_aux_dev_cnt, codecs_found);
6243 return -EPROBE_DEFER;
6244 }
6245 dev_info(&pdev->dev,
6246 "%s: found %d AUX codecs registered with ALSA core\n",
6247 __func__, codecs_found);
6248
6249aux_dev_register:
6250 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6251 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6252
6253 /* Alloc array of AUX devs struct */
6254 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6255 sizeof(struct snd_soc_aux_dev),
6256 GFP_KERNEL);
6257 if (!msm_aux_dev) {
6258 ret = -ENOMEM;
6259 goto err;
6260 }
6261
6262 /* Alloc array of codec conf struct */
6263 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6264 sizeof(struct snd_soc_codec_conf),
6265 GFP_KERNEL);
6266 if (!msm_codec_conf) {
6267 ret = -ENOMEM;
6268 goto err;
6269 }
6270
6271 for (i = 0; i < wsa_max_devs; i++) {
6272 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6273 GFP_KERNEL);
6274 if (!dev_name_str) {
6275 ret = -ENOMEM;
6276 goto err;
6277 }
6278
6279 ret = of_property_read_string_index(pdev->dev.of_node,
6280 "qcom,wsa-aux-dev-prefix",
6281 wsa881x_dev_info[i].index,
6282 auxdev_name_prefix);
6283 if (ret) {
6284 dev_err(&pdev->dev,
6285 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6286 __func__, ret);
6287 ret = -EINVAL;
6288 goto err;
6289 }
6290
6291 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6292 msm_aux_dev[i].name = dev_name_str;
6293 msm_aux_dev[i].codec_name = NULL;
6294 msm_aux_dev[i].codec_of_node =
6295 wsa881x_dev_info[i].of_node;
6296 msm_aux_dev[i].init = NULL;
6297 msm_codec_conf[i].dev_name = NULL;
6298 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6299 msm_codec_conf[i].of_node =
6300 wsa881x_dev_info[i].of_node;
6301 }
6302
6303 for (i = 0; i < codec_aux_dev_cnt; i++) {
6304 msm_aux_dev[wsa_max_devs + i].name = NULL;
6305 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6306 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6307 aux_cdc_dev_info[i].of_node;
6308 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6309 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6310 msm_codec_conf[wsa_max_devs + i].name_prefix =
6311 NULL;
6312 msm_codec_conf[wsa_max_devs + i].of_node =
6313 aux_cdc_dev_info[i].of_node;
6314 }
6315
6316 card->codec_conf = msm_codec_conf;
6317 card->aux_dev = msm_aux_dev;
6318err:
6319 return ret;
6320}
6321
6322static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6323{
6324 int count = 0;
6325 u32 mi2s_master_slave[MI2S_MAX];
6326 int ret = 0;
6327
6328 for (count = 0; count < MI2S_MAX; count++) {
6329 mutex_init(&mi2s_intf_conf[count].lock);
6330 mi2s_intf_conf[count].ref_cnt = 0;
6331 }
6332
6333 ret = of_property_read_u32_array(pdev->dev.of_node,
6334 "qcom,msm-mi2s-master",
6335 mi2s_master_slave, MI2S_MAX);
6336 if (ret) {
6337 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6338 __func__);
6339 } else {
6340 for (count = 0; count < MI2S_MAX; count++) {
6341 mi2s_intf_conf[count].msm_is_mi2s_master =
6342 mi2s_master_slave[count];
6343 }
6344 }
6345}
6346
6347static void msm_i2s_auxpcm_deinit(void)
6348{
6349 int count = 0;
6350
6351 for (count = 0; count < MI2S_MAX; count++) {
6352 mutex_destroy(&mi2s_intf_conf[count].lock);
6353 mi2s_intf_conf[count].ref_cnt = 0;
6354 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6355 }
6356}
6357
6358static int bengal_ssr_enable(struct device *dev, void *data)
6359{
6360 struct platform_device *pdev = to_platform_device(dev);
6361 struct snd_soc_card *card = platform_get_drvdata(pdev);
6362 int ret = 0;
6363
6364 if (!card) {
6365 dev_err(dev, "%s: card is NULL\n", __func__);
6366 ret = -EINVAL;
6367 goto err;
6368 }
6369
6370 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6371 /* TODO */
6372 dev_dbg(dev, "%s: TODO\n", __func__);
6373 }
6374
6375 snd_soc_card_change_online_state(card, 1);
6376 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6377
6378err:
6379 return ret;
6380}
6381
6382static void bengal_ssr_disable(struct device *dev, void *data)
6383{
6384 struct platform_device *pdev = to_platform_device(dev);
6385 struct snd_soc_card *card = platform_get_drvdata(pdev);
6386
6387 if (!card) {
6388 dev_err(dev, "%s: card is NULL\n", __func__);
6389 return;
6390 }
6391
6392 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6393 snd_soc_card_change_online_state(card, 0);
6394
6395 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6396 /* TODO */
6397 dev_dbg(dev, "%s: TODO\n", __func__);
6398 }
6399}
6400
6401static const struct snd_event_ops bengal_ssr_ops = {
6402 .enable = bengal_ssr_enable,
6403 .disable = bengal_ssr_disable,
6404};
6405
6406static int msm_audio_ssr_compare(struct device *dev, void *data)
6407{
6408 struct device_node *node = data;
6409
6410 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6411 __func__, dev->of_node, node);
6412 return (dev->of_node && dev->of_node == node);
6413}
6414
6415static int msm_audio_ssr_register(struct device *dev)
6416{
6417 struct device_node *np = dev->of_node;
6418 struct snd_event_clients *ssr_clients = NULL;
6419 struct device_node *node = NULL;
6420 int ret = 0;
6421 int i = 0;
6422
6423 for (i = 0; ; i++) {
6424 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6425 if (!node)
6426 break;
6427 snd_event_mstr_add_client(&ssr_clients,
6428 msm_audio_ssr_compare, node);
6429 }
6430
6431 ret = snd_event_master_register(dev, &bengal_ssr_ops,
6432 ssr_clients, NULL);
6433 if (!ret)
6434 snd_event_notify(dev, SND_EVENT_UP);
6435
6436 return ret;
6437}
6438
6439static int msm_asoc_machine_probe(struct platform_device *pdev)
6440{
6441 struct snd_soc_card *card = NULL;
6442 struct msm_asoc_mach_data *pdata = NULL;
6443 const char *mbhc_audio_jack_type = NULL;
6444 int ret = 0;
6445 uint index = 0;
6446
6447 if (!pdev->dev.of_node) {
6448 dev_err(&pdev->dev,
6449 "%s: No platform supplied from device tree\n",
6450 __func__);
6451 return -EINVAL;
6452 }
6453
6454 pdata = devm_kzalloc(&pdev->dev,
6455 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6456 if (!pdata)
6457 return -ENOMEM;
6458
6459 card = populate_snd_card_dailinks(&pdev->dev);
6460 if (!card) {
6461 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6462 ret = -EINVAL;
6463 goto err;
6464 }
6465
6466 card->dev = &pdev->dev;
6467 platform_set_drvdata(pdev, card);
6468 snd_soc_card_set_drvdata(card, pdata);
6469
6470 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6471 if (ret) {
6472 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6473 __func__, ret);
6474 goto err;
6475 }
6476
6477 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6478 if (ret) {
6479 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6480 __func__, ret);
6481 goto err;
6482 }
6483
6484 ret = msm_populate_dai_link_component_of_node(card);
6485 if (ret) {
6486 ret = -EPROBE_DEFER;
6487 goto err;
6488 }
6489
6490 ret = msm_init_aux_dev(pdev, card);
6491 if (ret)
6492 goto err;
6493
6494 ret = devm_snd_soc_register_card(&pdev->dev, card);
6495 if (ret == -EPROBE_DEFER) {
6496 if (codec_reg_done)
6497 ret = -EINVAL;
6498 goto err;
6499 } else if (ret) {
6500 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6501 __func__, ret);
6502 goto err;
6503 }
6504 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6505 __func__, card->name);
6506
6507 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6508 "qcom,hph-en1-gpio", 0);
6509 if (!pdata->hph_en1_gpio_p) {
6510 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6511 __func__, "qcom,hph-en1-gpio",
6512 pdev->dev.of_node->full_name);
6513 }
6514
6515 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6516 "qcom,hph-en0-gpio", 0);
6517 if (!pdata->hph_en0_gpio_p) {
6518 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6519 __func__, "qcom,hph-en0-gpio",
6520 pdev->dev.of_node->full_name);
6521 }
6522
6523 ret = of_property_read_string(pdev->dev.of_node,
6524 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6525 if (ret) {
6526 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6527 __func__, "qcom,mbhc-audio-jack-type",
6528 pdev->dev.of_node->full_name);
6529 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6530 } else {
6531 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6532 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6533 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6534 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6535 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6536 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6537 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6538 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6539 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6540 } else {
6541 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6542 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6543 }
6544 }
6545 /*
6546 * Parse US-Euro gpio info from DT. Report no error if us-euro
6547 * entry is not found in DT file as some targets do not support
6548 * US-Euro detection
6549 */
6550 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6551 "qcom,us-euro-gpios", 0);
6552 if (!pdata->us_euro_gpio_p) {
6553 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6554 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6555 } else {
6556 dev_dbg(&pdev->dev, "%s detected\n",
6557 "qcom,us-euro-gpios");
6558 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6559 }
6560
6561 if (wcd_mbhc_cfg.enable_usbc_analog)
6562 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6563
6564 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6565 "fsa4480-i2c-handle", 0);
6566 if (!pdata->fsa_handle)
6567 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6568 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6569
6570 msm_i2s_auxpcm_init(pdev);
6571 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6572 "qcom,cdc-dmic01-gpios",
6573 0);
6574 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6575 "qcom,cdc-dmic23-gpios",
6576 0);
6577
6578 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
6579 "qcom,pri-mi2s-gpios", 0);
6580 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
6581 "qcom,sec-mi2s-gpios", 0);
6582 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6583 "qcom,tert-mi2s-gpios", 0);
6584 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6585 "qcom,quat-mi2s-gpios", 0);
6586 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
6587 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
6588
6589 ret = msm_audio_ssr_register(&pdev->dev);
6590 if (ret)
6591 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
6592 __func__, ret);
6593
6594 is_initial_boot = true;
6595
6596 return 0;
6597err:
6598 devm_kfree(&pdev->dev, pdata);
6599 return ret;
6600}
6601
6602static int msm_asoc_machine_remove(struct platform_device *pdev)
6603{
6604 struct snd_soc_card *card = platform_get_drvdata(pdev);
6605
6606 snd_event_master_deregister(&pdev->dev);
6607 snd_soc_unregister_card(card);
6608 msm_i2s_auxpcm_deinit();
6609
6610 return 0;
6611}
6612
6613static struct platform_driver bengal_asoc_machine_driver = {
6614 .driver = {
6615 .name = DRV_NAME,
6616 .owner = THIS_MODULE,
6617 .pm = &snd_soc_pm_ops,
6618 .of_match_table = bengal_asoc_machine_of_match,
6619 .suppress_bind_attrs = true,
6620 },
6621 .probe = msm_asoc_machine_probe,
6622 .remove = msm_asoc_machine_remove,
6623};
6624module_platform_driver(bengal_asoc_machine_driver);
6625
6626MODULE_DESCRIPTION("ALSA SoC msm");
6627MODULE_LICENSE("GPL v2");
6628MODULE_ALIAS("platform:" DRV_NAME);
6629MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);