blob: 8d9d32dc283eef6e9c9d5b5591c10ff0da2f6b63 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
39#include "codecs/wsa881x.h"
40#include "codecs/bolero/bolero-cdc.h"
41#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +053042#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053043
44#define DRV_NAME "sm6150-asoc-snd"
45
46#define __CHIPSET__ "SM6150 "
47#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
48
49#define SAMPLING_RATE_8KHZ 8000
50#define SAMPLING_RATE_11P025KHZ 11025
51#define SAMPLING_RATE_16KHZ 16000
52#define SAMPLING_RATE_22P05KHZ 22050
53#define SAMPLING_RATE_32KHZ 32000
54#define SAMPLING_RATE_44P1KHZ 44100
55#define SAMPLING_RATE_48KHZ 48000
56#define SAMPLING_RATE_88P2KHZ 88200
57#define SAMPLING_RATE_96KHZ 96000
58#define SAMPLING_RATE_176P4KHZ 176400
59#define SAMPLING_RATE_192KHZ 192000
60#define SAMPLING_RATE_352P8KHZ 352800
61#define SAMPLING_RATE_384KHZ 384000
62
63#define WCD9XXX_MBHC_DEF_BUTTONS 8
64#define WCD9XXX_MBHC_DEF_RLOADS 5
65#define CODEC_EXT_CLK_RATE 9600000
66#define ADSP_STATE_READY_TIMEOUT_MS 3000
67#define DEV_NAME_STR_LEN 32
68
69#define WSA8810_NAME_1 "wsa881x.20170211"
70#define WSA8810_NAME_2 "wsa881x.20170212"
71#define WCN_CDC_SLIM_RX_CH_MAX 2
72#define WCN_CDC_SLIM_TX_CH_MAX 3
73#define TDM_CHANNEL_MAX 8
74
75#define ADSP_STATE_READY_TIMEOUT_MS 3000
76#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
77#define MSM_HIFI_ON 1
78
79enum {
80 SLIM_RX_0 = 0,
81 SLIM_RX_1,
82 SLIM_RX_2,
83 SLIM_RX_3,
84 SLIM_RX_4,
85 SLIM_RX_5,
86 SLIM_RX_6,
87 SLIM_RX_7,
88 SLIM_RX_MAX,
89};
90enum {
91 SLIM_TX_0 = 0,
92 SLIM_TX_1,
93 SLIM_TX_2,
94 SLIM_TX_3,
95 SLIM_TX_4,
96 SLIM_TX_5,
97 SLIM_TX_6,
98 SLIM_TX_7,
99 SLIM_TX_8,
100 SLIM_TX_MAX,
101};
102
103enum {
104 PRIM_MI2S = 0,
105 SEC_MI2S,
106 TERT_MI2S,
107 QUAT_MI2S,
108 QUIN_MI2S,
109 MI2S_MAX,
110};
111
112enum {
113 PRIM_AUX_PCM = 0,
114 SEC_AUX_PCM,
115 TERT_AUX_PCM,
116 QUAT_AUX_PCM,
117 QUIN_AUX_PCM,
118 AUX_PCM_MAX,
119};
120
121enum {
122 WSA_CDC_DMA_RX_0 = 0,
123 WSA_CDC_DMA_RX_1,
124 RX_CDC_DMA_RX_0,
125 RX_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_2,
127 RX_CDC_DMA_RX_3,
128 RX_CDC_DMA_RX_5,
129 CDC_DMA_RX_MAX,
130};
131
132enum {
133 WSA_CDC_DMA_TX_0 = 0,
134 WSA_CDC_DMA_TX_1,
135 WSA_CDC_DMA_TX_2,
136 TX_CDC_DMA_TX_0,
137 TX_CDC_DMA_TX_3,
138 TX_CDC_DMA_TX_4,
139 CDC_DMA_TX_MAX,
140};
141
142struct mi2s_conf {
143 struct mutex lock;
144 u32 ref_cnt;
145 u32 msm_is_mi2s_master;
146};
147
148static u32 mi2s_ebit_clk[MI2S_MAX] = {
149 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
150 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
151 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
154};
155
156struct dev_config {
157 u32 sample_rate;
158 u32 bit_format;
159 u32 channels;
160};
161
162enum {
163 DP_RX_IDX = 0,
164 EXT_DISP_RX_IDX_MAX,
165};
166
167struct msm_wsa881x_dev_info {
168 struct device_node *of_node;
169 u32 index;
170};
171
172struct aux_codec_dev_info {
173 struct device_node *of_node;
174 u32 index;
175};
176
177enum pinctrl_pin_state {
178 STATE_DISABLE = 0, /* All pins are in sleep state */
179 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
180 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
181};
182
183struct msm_pinctrl_info {
184 struct pinctrl *pinctrl;
185 struct pinctrl_state *mi2s_disable;
186 struct pinctrl_state *tdm_disable;
187 struct pinctrl_state *mi2s_active;
188 struct pinctrl_state *tdm_active;
189 enum pinctrl_pin_state curr_state;
190};
191
192struct msm_asoc_mach_data {
193 struct snd_info_entry *codec_root;
194 struct msm_pinctrl_info pinctrl_info;
195 int usbc_en2_gpio; /* used by gpio driver API */
196 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
197 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
198 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
199 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
200 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
201 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
202};
203
204struct msm_asoc_wcd93xx_codec {
205 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
206 enum afe_config_type config_type);
207};
208
209static const char *const pin_states[] = {"sleep", "i2s-active",
210 "tdm-active"};
211
212static struct snd_soc_card snd_soc_card_sm6150_msm;
213
214enum {
215 TDM_0 = 0,
216 TDM_1,
217 TDM_2,
218 TDM_3,
219 TDM_4,
220 TDM_5,
221 TDM_6,
222 TDM_7,
223 TDM_PORT_MAX,
224};
225
226enum {
227 TDM_PRI = 0,
228 TDM_SEC,
229 TDM_TERT,
230 TDM_QUAT,
231 TDM_QUIN,
232 TDM_INTERFACE_MAX,
233};
234
235struct tdm_port {
236 u32 mode;
237 u32 channel;
238};
239
240/* TDM default config */
241static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
242 { /* PRI TDM */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
251 },
252 { /* SEC TDM */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
261 },
262 { /* TERT TDM */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
271 },
272 { /* QUAT TDM */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
281 },
282 { /* QUIN TDM */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
291 }
292
293};
294
295/* TDM default config */
296static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
297 { /* PRI TDM */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
306 },
307 { /* SEC TDM */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
316 },
317 { /* TERT TDM */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
326 },
327 { /* QUAT TDM */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
336 },
337 { /* QUIN TDM */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
346 }
347};
348
349
350/* Default configuration of slimbus channels */
351static struct dev_config slim_rx_cfg[] = {
352 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360};
361
362static struct dev_config slim_tx_cfg[] = {
363 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372};
373
374/* Default configuration of Codec DMA Interface Tx */
375static struct dev_config cdc_dma_rx_cfg[] = {
376 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383};
384
385/* Default configuration of Codec DMA Interface Rx */
386static struct dev_config cdc_dma_tx_cfg[] = {
387 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393};
394
395/* Default configuration of external display BE */
396static struct dev_config ext_disp_rx_cfg[] = {
397 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
398};
399
400static struct dev_config usb_rx_cfg = {
401 .sample_rate = SAMPLING_RATE_48KHZ,
402 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
403 .channels = 2,
404};
405
406static struct dev_config usb_tx_cfg = {
407 .sample_rate = SAMPLING_RATE_48KHZ,
408 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
409 .channels = 1,
410};
411
412static struct dev_config proxy_rx_cfg = {
413 .sample_rate = SAMPLING_RATE_48KHZ,
414 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
415 .channels = 2,
416};
417
418/* Default configuration of MI2S channels */
419static struct dev_config mi2s_rx_cfg[] = {
420 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
421 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
422 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425};
426
427static struct dev_config mi2s_tx_cfg[] = {
428 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433};
434
435static struct dev_config aux_pcm_rx_cfg[] = {
436 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
437 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441};
442
443static struct dev_config aux_pcm_tx_cfg[] = {
444 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
445 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449};
450static int msm_vi_feed_tx_ch = 2;
451static const char *const slim_rx_ch_text[] = {"One", "Two"};
452static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
453 "Five", "Six", "Seven",
454 "Eight"};
455static const char *const vi_feed_ch_text[] = {"One", "Two"};
456static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
457 "S32_LE"};
458static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
459 "S24_3LE"};
460static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
461 "KHZ_32", "KHZ_44P1", "KHZ_48",
462 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
463 "KHZ_192", "KHZ_352P8", "KHZ_384"};
464static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
465 "KHZ_44P1", "KHZ_48",
466 "KHZ_88P2", "KHZ_96"};
467static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
468 "Five", "Six", "Seven",
469 "Eight"};
470static char const *ch_text[] = {"Two", "Three", "Four", "Five",
471 "Six", "Seven", "Eight"};
472static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
473 "KHZ_16", "KHZ_22P05",
474 "KHZ_32", "KHZ_44P1", "KHZ_48",
475 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
476 "KHZ_192", "KHZ_352P8", "KHZ_384"};
477static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
478 "KHZ_192", "KHZ_32", "KHZ_44P1",
479 "KHZ_88P2", "KHZ_176P4" };
480static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
481 "Five", "Six", "Seven", "Eight"};
482static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
483static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
484 "KHZ_48", "KHZ_176P4",
485 "KHZ_352P8"};
486static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
487static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
488 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
489 "KHZ_48", "KHZ_96", "KHZ_192"};
490static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
491 "Five", "Six", "Seven",
492 "Eight"};
493static const char *const hifi_text[] = {"Off", "On"};
494static const char *const qos_text[] = {"Disable", "Enable"};
495
496static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
497static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
498 "Five", "Six", "Seven",
499 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530500static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
501 "KHZ_16", "KHZ_22P05",
502 "KHZ_32", "KHZ_44P1", "KHZ_48",
503 "KHZ_88P2", "KHZ_96",
504 "KHZ_176P4", "KHZ_192",
505 "KHZ_352P8", "KHZ_384"};
506
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530507
508static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
535 ext_disp_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
537static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
573static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
574static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
575static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
577static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
603 cdc_dma_sample_rate_text);
604static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
619 cdc_dma_sample_rate_text);
620static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
621 cdc_dma_sample_rate_text);
622static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
623 cdc_dma_sample_rate_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
625 cdc_dma_sample_rate_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
627 cdc_dma_sample_rate_text);
628
629static struct platform_device *spdev;
630
631static int msm_hifi_control;
632static bool is_initial_boot;
633static bool codec_reg_done;
634static struct snd_soc_aux_dev *msm_aux_dev;
635static struct snd_soc_codec_conf *msm_codec_conf;
636static struct msm_asoc_wcd93xx_codec msm_codec_fn;
637
638static int dmic_0_1_gpio_cnt;
639static int dmic_2_3_gpio_cnt;
640
641static void *def_wcd_mbhc_cal(void);
642static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
643 int enable, bool dapm);
644static int msm_wsa881x_init(struct snd_soc_component *component);
645static int msm_aux_codec_init(struct snd_soc_component *component);
646
647/*
648 * Need to report LINEIN
649 * if R/L channel impedance is larger than 5K ohm
650 */
651static struct wcd_mbhc_config wcd_mbhc_cfg = {
652 .read_fw_bin = false,
653 .calibration = NULL,
654 .detect_extn_cable = true,
655 .mono_stero_detection = false,
656 .swap_gnd_mic = NULL,
657 .hs_ext_micbias = true,
658 .key_code[0] = KEY_MEDIA,
659 .key_code[1] = KEY_VOICECOMMAND,
660 .key_code[2] = KEY_VOLUMEUP,
661 .key_code[3] = KEY_VOLUMEDOWN,
662 .key_code[4] = 0,
663 .key_code[5] = 0,
664 .key_code[6] = 0,
665 .key_code[7] = 0,
666 .linein_th = 5000,
667 .moisture_en = true,
668 .mbhc_micbias = MIC_BIAS_2,
669 .anc_micbias = MIC_BIAS_2,
670 .enable_anc_mic_detect = false,
671};
672
673static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
674 {"MIC BIAS1", NULL, "MCLK TX"},
675 {"MIC BIAS2", NULL, "MCLK TX"},
676 {"MIC BIAS3", NULL, "MCLK TX"},
677 {"MIC BIAS4", NULL, "MCLK TX"},
678};
679
680static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
681 {
682 AFE_API_VERSION_I2S_CONFIG,
683 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
684 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
685 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
686 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
687 0,
688 },
689 {
690 AFE_API_VERSION_I2S_CONFIG,
691 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
692 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
693 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
694 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
695 0,
696 },
697 {
698 AFE_API_VERSION_I2S_CONFIG,
699 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
700 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
701 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
702 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
703 0,
704 },
705 {
706 AFE_API_VERSION_I2S_CONFIG,
707 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
708 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
709 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
710 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
711 0,
712 },
713 {
714 AFE_API_VERSION_I2S_CONFIG,
715 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
716 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
717 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
718 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
719 0,
720 }
721
722};
723
724static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
725
726static int slim_get_sample_rate_val(int sample_rate)
727{
728 int sample_rate_val = 0;
729
730 switch (sample_rate) {
731 case SAMPLING_RATE_8KHZ:
732 sample_rate_val = 0;
733 break;
734 case SAMPLING_RATE_16KHZ:
735 sample_rate_val = 1;
736 break;
737 case SAMPLING_RATE_32KHZ:
738 sample_rate_val = 2;
739 break;
740 case SAMPLING_RATE_44P1KHZ:
741 sample_rate_val = 3;
742 break;
743 case SAMPLING_RATE_48KHZ:
744 sample_rate_val = 4;
745 break;
746 case SAMPLING_RATE_88P2KHZ:
747 sample_rate_val = 5;
748 break;
749 case SAMPLING_RATE_96KHZ:
750 sample_rate_val = 6;
751 break;
752 case SAMPLING_RATE_176P4KHZ:
753 sample_rate_val = 7;
754 break;
755 case SAMPLING_RATE_192KHZ:
756 sample_rate_val = 8;
757 break;
758 case SAMPLING_RATE_352P8KHZ:
759 sample_rate_val = 9;
760 break;
761 case SAMPLING_RATE_384KHZ:
762 sample_rate_val = 10;
763 break;
764 default:
765 sample_rate_val = 4;
766 break;
767 }
768 return sample_rate_val;
769}
770
771static int slim_get_sample_rate(int value)
772{
773 int sample_rate = 0;
774
775 switch (value) {
776 case 0:
777 sample_rate = SAMPLING_RATE_8KHZ;
778 break;
779 case 1:
780 sample_rate = SAMPLING_RATE_16KHZ;
781 break;
782 case 2:
783 sample_rate = SAMPLING_RATE_32KHZ;
784 break;
785 case 3:
786 sample_rate = SAMPLING_RATE_44P1KHZ;
787 break;
788 case 4:
789 sample_rate = SAMPLING_RATE_48KHZ;
790 break;
791 case 5:
792 sample_rate = SAMPLING_RATE_88P2KHZ;
793 break;
794 case 6:
795 sample_rate = SAMPLING_RATE_96KHZ;
796 break;
797 case 7:
798 sample_rate = SAMPLING_RATE_176P4KHZ;
799 break;
800 case 8:
801 sample_rate = SAMPLING_RATE_192KHZ;
802 break;
803 case 9:
804 sample_rate = SAMPLING_RATE_352P8KHZ;
805 break;
806 case 10:
807 sample_rate = SAMPLING_RATE_384KHZ;
808 break;
809 default:
810 sample_rate = SAMPLING_RATE_48KHZ;
811 break;
812 }
813 return sample_rate;
814}
815
816static int slim_get_bit_format_val(int bit_format)
817{
818 int val = 0;
819
820 switch (bit_format) {
821 case SNDRV_PCM_FORMAT_S32_LE:
822 val = 3;
823 break;
824 case SNDRV_PCM_FORMAT_S24_3LE:
825 val = 2;
826 break;
827 case SNDRV_PCM_FORMAT_S24_LE:
828 val = 1;
829 break;
830 case SNDRV_PCM_FORMAT_S16_LE:
831 default:
832 val = 0;
833 break;
834 }
835 return val;
836}
837
838static int slim_get_bit_format(int val)
839{
840 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
841
842 switch (val) {
843 case 0:
844 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
845 break;
846 case 1:
847 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
848 break;
849 case 2:
850 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
851 break;
852 case 3:
853 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
854 break;
855 default:
856 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
857 break;
858 }
859 return bit_fmt;
860}
861
862static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
863{
864 int port_id = 0;
865
866 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
867 port_id = SLIM_RX_0;
868 } else if (strnstr(kcontrol->id.name,
869 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
870 port_id = SLIM_RX_2;
871 } else if (strnstr(kcontrol->id.name,
872 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
873 port_id = SLIM_RX_5;
874 } else if (strnstr(kcontrol->id.name,
875 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
876 port_id = SLIM_RX_6;
877 } else if (strnstr(kcontrol->id.name,
878 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
879 port_id = SLIM_TX_0;
880 } else if (strnstr(kcontrol->id.name,
881 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
882 port_id = SLIM_TX_1;
883 } else {
884 pr_err("%s: unsupported channel: %s\n",
885 __func__, kcontrol->id.name);
886 return -EINVAL;
887 }
888
889 return port_id;
890}
891
892static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_value *ucontrol)
894{
895 int ch_num = slim_get_port_idx(kcontrol);
896
897 if (ch_num < 0)
898 return ch_num;
899
900 ucontrol->value.enumerated.item[0] =
901 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
902
903 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
904 ch_num, slim_rx_cfg[ch_num].sample_rate,
905 ucontrol->value.enumerated.item[0]);
906
907 return 0;
908}
909
910static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912{
913 int ch_num = slim_get_port_idx(kcontrol);
914
915 if (ch_num < 0)
916 return ch_num;
917
918 slim_rx_cfg[ch_num].sample_rate =
919 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
920
921 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
922 ch_num, slim_rx_cfg[ch_num].sample_rate,
923 ucontrol->value.enumerated.item[0]);
924
925 return 0;
926}
927
928static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int ch_num = slim_get_port_idx(kcontrol);
932
933 if (ch_num < 0)
934 return ch_num;
935
936 ucontrol->value.enumerated.item[0] =
937 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
938
939 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
940 ch_num, slim_tx_cfg[ch_num].sample_rate,
941 ucontrol->value.enumerated.item[0]);
942
943 return 0;
944}
945
946static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 int sample_rate = 0;
950 int ch_num = slim_get_port_idx(kcontrol);
951
952 if (ch_num < 0)
953 return ch_num;
954
955 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
956 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
957 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
958 __func__, sample_rate);
959 return -EINVAL;
960 }
961 slim_tx_cfg[ch_num].sample_rate = sample_rate;
962
963 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
964 ch_num, slim_tx_cfg[ch_num].sample_rate,
965 ucontrol->value.enumerated.item[0]);
966
967 return 0;
968}
969
970static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
972{
973 int ch_num = slim_get_port_idx(kcontrol);
974
975 if (ch_num < 0)
976 return ch_num;
977
978 ucontrol->value.enumerated.item[0] =
979 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
980
981 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
982 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
983 ucontrol->value.enumerated.item[0]);
984
985 return 0;
986}
987
988static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
989 struct snd_ctl_elem_value *ucontrol)
990{
991 int ch_num = slim_get_port_idx(kcontrol);
992
993 if (ch_num < 0)
994 return ch_num;
995
996 slim_rx_cfg[ch_num].bit_format =
997 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
998
999 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1000 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1001 ucontrol->value.enumerated.item[0]);
1002
1003 return 0;
1004}
1005
1006static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 int ch_num = slim_get_port_idx(kcontrol);
1010
1011 if (ch_num < 0)
1012 return ch_num;
1013
1014 ucontrol->value.enumerated.item[0] =
1015 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1016
1017 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1018 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1019 ucontrol->value.enumerated.item[0]);
1020
1021 return 0;
1022}
1023
1024static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 int ch_num = slim_get_port_idx(kcontrol);
1028
1029 if (ch_num < 0)
1030 return ch_num;
1031
1032 slim_tx_cfg[ch_num].bit_format =
1033 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1034
1035 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1036 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1037 ucontrol->value.enumerated.item[0]);
1038
1039 return 0;
1040}
1041
1042static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044{
1045 int ch_num = slim_get_port_idx(kcontrol);
1046
1047 if (ch_num < 0)
1048 return ch_num;
1049
1050 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1051 ch_num, slim_rx_cfg[ch_num].channels);
1052 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1053
1054 return 0;
1055}
1056
1057static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1058 struct snd_ctl_elem_value *ucontrol)
1059{
1060 int ch_num = slim_get_port_idx(kcontrol);
1061
1062 if (ch_num < 0)
1063 return ch_num;
1064
1065 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1066 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1067 ch_num, slim_rx_cfg[ch_num].channels);
1068
1069 return 1;
1070}
1071
1072static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 int ch_num = slim_get_port_idx(kcontrol);
1076
1077 if (ch_num < 0)
1078 return ch_num;
1079
1080 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1081 ch_num, slim_tx_cfg[ch_num].channels);
1082 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1083
1084 return 0;
1085}
1086
1087static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 int ch_num = slim_get_port_idx(kcontrol);
1091
1092 if (ch_num < 0)
1093 return ch_num;
1094
1095 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1096 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1097 ch_num, slim_tx_cfg[ch_num].channels);
1098
1099 return 1;
1100}
1101
1102static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1106 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1107 ucontrol->value.integer.value[0]);
1108 return 0;
1109}
1110
1111static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1112 struct snd_ctl_elem_value *ucontrol)
1113{
1114 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1115
1116 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1117 return 1;
1118}
1119
1120static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1121 struct snd_ctl_elem_value *ucontrol)
1122{
1123 /*
1124 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1125 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1126 * value.
1127 */
1128 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1129 case SAMPLING_RATE_96KHZ:
1130 ucontrol->value.integer.value[0] = 5;
1131 break;
1132 case SAMPLING_RATE_88P2KHZ:
1133 ucontrol->value.integer.value[0] = 4;
1134 break;
1135 case SAMPLING_RATE_48KHZ:
1136 ucontrol->value.integer.value[0] = 3;
1137 break;
1138 case SAMPLING_RATE_44P1KHZ:
1139 ucontrol->value.integer.value[0] = 2;
1140 break;
1141 case SAMPLING_RATE_16KHZ:
1142 ucontrol->value.integer.value[0] = 1;
1143 break;
1144 case SAMPLING_RATE_8KHZ:
1145 default:
1146 ucontrol->value.integer.value[0] = 0;
1147 break;
1148 }
1149 pr_debug("%s: sample rate = %d\n", __func__,
1150 slim_rx_cfg[SLIM_RX_7].sample_rate);
1151
1152 return 0;
1153}
1154
1155static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 switch (ucontrol->value.integer.value[0]) {
1159 case 1:
1160 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1161 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1162 break;
1163 case 2:
1164 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1165 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1166 break;
1167 case 3:
1168 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1169 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1170 break;
1171 case 4:
1172 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1173 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1174 break;
1175 case 5:
1176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1177 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1178 break;
1179 case 0:
1180 default:
1181 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1182 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1183 break;
1184 }
1185 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1186 __func__,
1187 slim_rx_cfg[SLIM_RX_7].sample_rate,
1188 slim_tx_cfg[SLIM_TX_7].sample_rate,
1189 ucontrol->value.enumerated.item[0]);
1190
1191 return 0;
1192}
1193
1194static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1195{
1196 int idx = 0;
1197
1198 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1199 sizeof("WSA_CDC_DMA_RX_0")))
1200 idx = WSA_CDC_DMA_RX_0;
1201 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1202 sizeof("WSA_CDC_DMA_RX_0")))
1203 idx = WSA_CDC_DMA_RX_1;
1204 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1205 sizeof("RX_CDC_DMA_RX_0")))
1206 idx = RX_CDC_DMA_RX_0;
1207 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1208 sizeof("RX_CDC_DMA_RX_1")))
1209 idx = RX_CDC_DMA_RX_1;
1210 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1211 sizeof("RX_CDC_DMA_RX_2")))
1212 idx = RX_CDC_DMA_RX_2;
1213 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1214 sizeof("RX_CDC_DMA_RX_3")))
1215 idx = RX_CDC_DMA_RX_3;
1216 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1217 sizeof("RX_CDC_DMA_RX_5")))
1218 idx = RX_CDC_DMA_RX_5;
1219 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1220 sizeof("WSA_CDC_DMA_TX_0")))
1221 idx = WSA_CDC_DMA_TX_0;
1222 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1223 sizeof("WSA_CDC_DMA_TX_1")))
1224 idx = WSA_CDC_DMA_TX_1;
1225 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1226 sizeof("WSA_CDC_DMA_TX_2")))
1227 idx = WSA_CDC_DMA_TX_2;
1228 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1229 sizeof("TX_CDC_DMA_TX_0")))
1230 idx = TX_CDC_DMA_TX_0;
1231 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1232 sizeof("TX_CDC_DMA_TX_3")))
1233 idx = TX_CDC_DMA_TX_3;
1234 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1235 sizeof("TX_CDC_DMA_TX_4")))
1236 idx = TX_CDC_DMA_TX_4;
1237 else {
1238 pr_err("%s: unsupported channel: %s\n",
1239 __func__, kcontrol->id.name);
1240 return -EINVAL;
1241 }
1242
1243 return idx;
1244}
1245
1246static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 int ch_num = cdc_dma_get_port_idx(kcontrol);
1250
1251 if (ch_num < 0)
1252 return ch_num;
1253
1254 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1255 cdc_dma_rx_cfg[ch_num].channels - 1);
1256 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1257 return 0;
1258}
1259
1260static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1261 struct snd_ctl_elem_value *ucontrol)
1262{
1263 int ch_num = cdc_dma_get_port_idx(kcontrol);
1264
1265 if (ch_num < 0)
1266 return ch_num;
1267
1268 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1269
1270 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1271 cdc_dma_rx_cfg[ch_num].channels);
1272 return 1;
1273}
1274
1275static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1277{
1278 int ch_num = cdc_dma_get_port_idx(kcontrol);
1279
1280 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1281 case SNDRV_PCM_FORMAT_S32_LE:
1282 ucontrol->value.integer.value[0] = 3;
1283 break;
1284 case SNDRV_PCM_FORMAT_S24_3LE:
1285 ucontrol->value.integer.value[0] = 2;
1286 break;
1287 case SNDRV_PCM_FORMAT_S24_LE:
1288 ucontrol->value.integer.value[0] = 1;
1289 break;
1290 case SNDRV_PCM_FORMAT_S16_LE:
1291 default:
1292 ucontrol->value.integer.value[0] = 0;
1293 break;
1294 }
1295
1296 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1297 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1298 ucontrol->value.integer.value[0]);
1299 return 0;
1300}
1301
1302static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_value *ucontrol)
1304{
1305 int rc = 0;
1306 int ch_num = cdc_dma_get_port_idx(kcontrol);
1307
1308 switch (ucontrol->value.integer.value[0]) {
1309 case 3:
1310 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1311 break;
1312 case 2:
1313 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1314 break;
1315 case 1:
1316 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1317 break;
1318 case 0:
1319 default:
1320 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1321 break;
1322 }
1323 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1324 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1325 ucontrol->value.integer.value[0]);
1326
1327 return rc;
1328}
1329
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301330
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301331static int cdc_dma_get_sample_rate_val(int sample_rate)
1332{
1333 int sample_rate_val = 0;
1334
1335 switch (sample_rate) {
1336 case SAMPLING_RATE_8KHZ:
1337 sample_rate_val = 0;
1338 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301339 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301340 sample_rate_val = 1;
1341 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301342 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301343 sample_rate_val = 2;
1344 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301345 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301346 sample_rate_val = 3;
1347 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301348 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301349 sample_rate_val = 4;
1350 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301351 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301352 sample_rate_val = 5;
1353 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301354 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301355 sample_rate_val = 6;
1356 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301357 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301358 sample_rate_val = 7;
1359 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301360 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301361 sample_rate_val = 8;
1362 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301363 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301364 sample_rate_val = 9;
1365 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301366 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301367 sample_rate_val = 10;
1368 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301369 case SAMPLING_RATE_352P8KHZ:
1370 sample_rate_val = 11;
1371 break;
1372 case SAMPLING_RATE_384KHZ:
1373 sample_rate_val = 12;
1374 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301375 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301376 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301377 break;
1378 }
1379 return sample_rate_val;
1380}
1381
1382static int cdc_dma_get_sample_rate(int value)
1383{
1384 int sample_rate = 0;
1385
1386 switch (value) {
1387 case 0:
1388 sample_rate = SAMPLING_RATE_8KHZ;
1389 break;
1390 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301391 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301392 break;
1393 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301394 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301395 break;
1396 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301397 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301398 break;
1399 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301400 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301401 break;
1402 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301403 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301404 break;
1405 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301406 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301407 break;
1408 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301409 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301410 break;
1411 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301412 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301413 break;
1414 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301415 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301416 break;
1417 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301418 sample_rate = SAMPLING_RATE_192KHZ;
1419 break;
1420 case 11:
1421 sample_rate = SAMPLING_RATE_352P8KHZ;
1422 break;
1423 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301424 sample_rate = SAMPLING_RATE_384KHZ;
1425 break;
1426 default:
1427 sample_rate = SAMPLING_RATE_48KHZ;
1428 break;
1429 }
1430 return sample_rate;
1431}
1432
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301433static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1434 struct snd_ctl_elem_value *ucontrol)
1435{
1436 int ch_num = cdc_dma_get_port_idx(kcontrol);
1437
1438 if (ch_num < 0)
1439 return ch_num;
1440
1441 ucontrol->value.enumerated.item[0] =
1442 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1443
1444 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1445 cdc_dma_rx_cfg[ch_num].sample_rate);
1446 return 0;
1447}
1448
1449static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1451{
1452 int ch_num = cdc_dma_get_port_idx(kcontrol);
1453
1454 if (ch_num < 0)
1455 return ch_num;
1456
1457 cdc_dma_rx_cfg[ch_num].sample_rate =
1458 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1459
1460
1461 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1462 __func__, ucontrol->value.enumerated.item[0],
1463 cdc_dma_rx_cfg[ch_num].sample_rate);
1464 return 0;
1465}
1466
1467static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1469{
1470 int ch_num = cdc_dma_get_port_idx(kcontrol);
1471
1472 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1473 cdc_dma_tx_cfg[ch_num].channels);
1474 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1475 return 0;
1476}
1477
1478static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1479 struct snd_ctl_elem_value *ucontrol)
1480{
1481 int ch_num = cdc_dma_get_port_idx(kcontrol);
1482
1483 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1484
1485 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1486 cdc_dma_tx_cfg[ch_num].channels);
1487 return 1;
1488}
1489
1490static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1491 struct snd_ctl_elem_value *ucontrol)
1492{
1493 int sample_rate_val;
1494 int ch_num = cdc_dma_get_port_idx(kcontrol);
1495
1496 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1497 case SAMPLING_RATE_384KHZ:
1498 sample_rate_val = 12;
1499 break;
1500 case SAMPLING_RATE_352P8KHZ:
1501 sample_rate_val = 11;
1502 break;
1503 case SAMPLING_RATE_192KHZ:
1504 sample_rate_val = 10;
1505 break;
1506 case SAMPLING_RATE_176P4KHZ:
1507 sample_rate_val = 9;
1508 break;
1509 case SAMPLING_RATE_96KHZ:
1510 sample_rate_val = 8;
1511 break;
1512 case SAMPLING_RATE_88P2KHZ:
1513 sample_rate_val = 7;
1514 break;
1515 case SAMPLING_RATE_48KHZ:
1516 sample_rate_val = 6;
1517 break;
1518 case SAMPLING_RATE_44P1KHZ:
1519 sample_rate_val = 5;
1520 break;
1521 case SAMPLING_RATE_32KHZ:
1522 sample_rate_val = 4;
1523 break;
1524 case SAMPLING_RATE_22P05KHZ:
1525 sample_rate_val = 3;
1526 break;
1527 case SAMPLING_RATE_16KHZ:
1528 sample_rate_val = 2;
1529 break;
1530 case SAMPLING_RATE_11P025KHZ:
1531 sample_rate_val = 1;
1532 break;
1533 case SAMPLING_RATE_8KHZ:
1534 sample_rate_val = 0;
1535 break;
1536 default:
1537 sample_rate_val = 6;
1538 break;
1539 }
1540
1541 ucontrol->value.integer.value[0] = sample_rate_val;
1542 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1543 cdc_dma_tx_cfg[ch_num].sample_rate);
1544 return 0;
1545}
1546
1547static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1549{
1550 int ch_num = cdc_dma_get_port_idx(kcontrol);
1551
1552 switch (ucontrol->value.integer.value[0]) {
1553 case 12:
1554 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1555 break;
1556 case 11:
1557 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1558 break;
1559 case 10:
1560 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1561 break;
1562 case 9:
1563 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1564 break;
1565 case 8:
1566 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1567 break;
1568 case 7:
1569 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1570 break;
1571 case 6:
1572 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1573 break;
1574 case 5:
1575 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1576 break;
1577 case 4:
1578 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1579 break;
1580 case 3:
1581 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1582 break;
1583 case 2:
1584 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1585 break;
1586 case 1:
1587 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1588 break;
1589 case 0:
1590 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1591 break;
1592 default:
1593 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1594 break;
1595 }
1596
1597 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1598 __func__, ucontrol->value.integer.value[0],
1599 cdc_dma_tx_cfg[ch_num].sample_rate);
1600 return 0;
1601}
1602
1603static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1604 struct snd_ctl_elem_value *ucontrol)
1605{
1606 int ch_num = cdc_dma_get_port_idx(kcontrol);
1607
1608 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1609 case SNDRV_PCM_FORMAT_S32_LE:
1610 ucontrol->value.integer.value[0] = 3;
1611 break;
1612 case SNDRV_PCM_FORMAT_S24_3LE:
1613 ucontrol->value.integer.value[0] = 2;
1614 break;
1615 case SNDRV_PCM_FORMAT_S24_LE:
1616 ucontrol->value.integer.value[0] = 1;
1617 break;
1618 case SNDRV_PCM_FORMAT_S16_LE:
1619 default:
1620 ucontrol->value.integer.value[0] = 0;
1621 break;
1622 }
1623
1624 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1625 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1626 ucontrol->value.integer.value[0]);
1627 return 0;
1628}
1629
1630static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol)
1632{
1633 int rc = 0;
1634 int ch_num = cdc_dma_get_port_idx(kcontrol);
1635
1636 switch (ucontrol->value.integer.value[0]) {
1637 case 3:
1638 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1639 break;
1640 case 2:
1641 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1642 break;
1643 case 1:
1644 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1645 break;
1646 case 0:
1647 default:
1648 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1649 break;
1650 }
1651 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1652 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1653 ucontrol->value.integer.value[0]);
1654
1655 return rc;
1656}
1657
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301658static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1660{
1661 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1662 usb_rx_cfg.channels);
1663 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1664 return 0;
1665}
1666
1667static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1668 struct snd_ctl_elem_value *ucontrol)
1669{
1670 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1671
1672 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1673 return 1;
1674}
1675
1676static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1678{
1679 int sample_rate_val;
1680
1681 switch (usb_rx_cfg.sample_rate) {
1682 case SAMPLING_RATE_384KHZ:
1683 sample_rate_val = 12;
1684 break;
1685 case SAMPLING_RATE_352P8KHZ:
1686 sample_rate_val = 11;
1687 break;
1688 case SAMPLING_RATE_192KHZ:
1689 sample_rate_val = 10;
1690 break;
1691 case SAMPLING_RATE_176P4KHZ:
1692 sample_rate_val = 9;
1693 break;
1694 case SAMPLING_RATE_96KHZ:
1695 sample_rate_val = 8;
1696 break;
1697 case SAMPLING_RATE_88P2KHZ:
1698 sample_rate_val = 7;
1699 break;
1700 case SAMPLING_RATE_48KHZ:
1701 sample_rate_val = 6;
1702 break;
1703 case SAMPLING_RATE_44P1KHZ:
1704 sample_rate_val = 5;
1705 break;
1706 case SAMPLING_RATE_32KHZ:
1707 sample_rate_val = 4;
1708 break;
1709 case SAMPLING_RATE_22P05KHZ:
1710 sample_rate_val = 3;
1711 break;
1712 case SAMPLING_RATE_16KHZ:
1713 sample_rate_val = 2;
1714 break;
1715 case SAMPLING_RATE_11P025KHZ:
1716 sample_rate_val = 1;
1717 break;
1718 case SAMPLING_RATE_8KHZ:
1719 default:
1720 sample_rate_val = 0;
1721 break;
1722 }
1723
1724 ucontrol->value.integer.value[0] = sample_rate_val;
1725 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1726 usb_rx_cfg.sample_rate);
1727 return 0;
1728}
1729
1730static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
1732{
1733 switch (ucontrol->value.integer.value[0]) {
1734 case 12:
1735 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1736 break;
1737 case 11:
1738 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1739 break;
1740 case 10:
1741 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1742 break;
1743 case 9:
1744 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1745 break;
1746 case 8:
1747 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1748 break;
1749 case 7:
1750 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1751 break;
1752 case 6:
1753 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1754 break;
1755 case 5:
1756 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1757 break;
1758 case 4:
1759 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1760 break;
1761 case 3:
1762 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1763 break;
1764 case 2:
1765 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1766 break;
1767 case 1:
1768 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1769 break;
1770 case 0:
1771 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1772 break;
1773 default:
1774 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1775 break;
1776 }
1777
1778 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1779 __func__, ucontrol->value.integer.value[0],
1780 usb_rx_cfg.sample_rate);
1781 return 0;
1782}
1783
1784static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1785 struct snd_ctl_elem_value *ucontrol)
1786{
1787 switch (usb_rx_cfg.bit_format) {
1788 case SNDRV_PCM_FORMAT_S32_LE:
1789 ucontrol->value.integer.value[0] = 3;
1790 break;
1791 case SNDRV_PCM_FORMAT_S24_3LE:
1792 ucontrol->value.integer.value[0] = 2;
1793 break;
1794 case SNDRV_PCM_FORMAT_S24_LE:
1795 ucontrol->value.integer.value[0] = 1;
1796 break;
1797 case SNDRV_PCM_FORMAT_S16_LE:
1798 default:
1799 ucontrol->value.integer.value[0] = 0;
1800 break;
1801 }
1802
1803 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1804 __func__, usb_rx_cfg.bit_format,
1805 ucontrol->value.integer.value[0]);
1806 return 0;
1807}
1808
1809static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1810 struct snd_ctl_elem_value *ucontrol)
1811{
1812 int rc = 0;
1813
1814 switch (ucontrol->value.integer.value[0]) {
1815 case 3:
1816 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1817 break;
1818 case 2:
1819 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1820 break;
1821 case 1:
1822 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1823 break;
1824 case 0:
1825 default:
1826 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1827 break;
1828 }
1829 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1830 __func__, usb_rx_cfg.bit_format,
1831 ucontrol->value.integer.value[0]);
1832
1833 return rc;
1834}
1835
1836static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1837 struct snd_ctl_elem_value *ucontrol)
1838{
1839 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1840 usb_tx_cfg.channels);
1841 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1842 return 0;
1843}
1844
1845static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1846 struct snd_ctl_elem_value *ucontrol)
1847{
1848 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1849
1850 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1851 return 1;
1852}
1853
1854static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1855 struct snd_ctl_elem_value *ucontrol)
1856{
1857 int sample_rate_val;
1858
1859 switch (usb_tx_cfg.sample_rate) {
1860 case SAMPLING_RATE_384KHZ:
1861 sample_rate_val = 12;
1862 break;
1863 case SAMPLING_RATE_352P8KHZ:
1864 sample_rate_val = 11;
1865 break;
1866 case SAMPLING_RATE_192KHZ:
1867 sample_rate_val = 10;
1868 break;
1869 case SAMPLING_RATE_176P4KHZ:
1870 sample_rate_val = 9;
1871 break;
1872 case SAMPLING_RATE_96KHZ:
1873 sample_rate_val = 8;
1874 break;
1875 case SAMPLING_RATE_88P2KHZ:
1876 sample_rate_val = 7;
1877 break;
1878 case SAMPLING_RATE_48KHZ:
1879 sample_rate_val = 6;
1880 break;
1881 case SAMPLING_RATE_44P1KHZ:
1882 sample_rate_val = 5;
1883 break;
1884 case SAMPLING_RATE_32KHZ:
1885 sample_rate_val = 4;
1886 break;
1887 case SAMPLING_RATE_22P05KHZ:
1888 sample_rate_val = 3;
1889 break;
1890 case SAMPLING_RATE_16KHZ:
1891 sample_rate_val = 2;
1892 break;
1893 case SAMPLING_RATE_11P025KHZ:
1894 sample_rate_val = 1;
1895 break;
1896 case SAMPLING_RATE_8KHZ:
1897 sample_rate_val = 0;
1898 break;
1899 default:
1900 sample_rate_val = 6;
1901 break;
1902 }
1903
1904 ucontrol->value.integer.value[0] = sample_rate_val;
1905 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1906 usb_tx_cfg.sample_rate);
1907 return 0;
1908}
1909
1910static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1911 struct snd_ctl_elem_value *ucontrol)
1912{
1913 switch (ucontrol->value.integer.value[0]) {
1914 case 12:
1915 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1916 break;
1917 case 11:
1918 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1919 break;
1920 case 10:
1921 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1922 break;
1923 case 9:
1924 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1925 break;
1926 case 8:
1927 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1928 break;
1929 case 7:
1930 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1931 break;
1932 case 6:
1933 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1934 break;
1935 case 5:
1936 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1937 break;
1938 case 4:
1939 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1940 break;
1941 case 3:
1942 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1943 break;
1944 case 2:
1945 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1946 break;
1947 case 1:
1948 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1949 break;
1950 case 0:
1951 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1952 break;
1953 default:
1954 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1955 break;
1956 }
1957
1958 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1959 __func__, ucontrol->value.integer.value[0],
1960 usb_tx_cfg.sample_rate);
1961 return 0;
1962}
1963
1964static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 switch (usb_tx_cfg.bit_format) {
1968 case SNDRV_PCM_FORMAT_S32_LE:
1969 ucontrol->value.integer.value[0] = 3;
1970 break;
1971 case SNDRV_PCM_FORMAT_S24_3LE:
1972 ucontrol->value.integer.value[0] = 2;
1973 break;
1974 case SNDRV_PCM_FORMAT_S24_LE:
1975 ucontrol->value.integer.value[0] = 1;
1976 break;
1977 case SNDRV_PCM_FORMAT_S16_LE:
1978 default:
1979 ucontrol->value.integer.value[0] = 0;
1980 break;
1981 }
1982
1983 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1984 __func__, usb_tx_cfg.bit_format,
1985 ucontrol->value.integer.value[0]);
1986 return 0;
1987}
1988
1989static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 int rc = 0;
1993
1994 switch (ucontrol->value.integer.value[0]) {
1995 case 3:
1996 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1997 break;
1998 case 2:
1999 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2000 break;
2001 case 1:
2002 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2003 break;
2004 case 0:
2005 default:
2006 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2007 break;
2008 }
2009 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2010 __func__, usb_tx_cfg.bit_format,
2011 ucontrol->value.integer.value[0]);
2012
2013 return rc;
2014}
2015
2016static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2017{
2018 int idx;
2019
2020 if (strnstr(kcontrol->id.name, "Display Port RX",
2021 sizeof("Display Port RX"))) {
2022 idx = DP_RX_IDX;
2023 } else {
2024 pr_err("%s: unsupported BE: %s\n",
2025 __func__, kcontrol->id.name);
2026 idx = -EINVAL;
2027 }
2028
2029 return idx;
2030}
2031
2032static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2033 struct snd_ctl_elem_value *ucontrol)
2034{
2035 int idx = ext_disp_get_port_idx(kcontrol);
2036
2037 if (idx < 0)
2038 return idx;
2039
2040 switch (ext_disp_rx_cfg[idx].bit_format) {
2041 case SNDRV_PCM_FORMAT_S24_3LE:
2042 ucontrol->value.integer.value[0] = 2;
2043 break;
2044 case SNDRV_PCM_FORMAT_S24_LE:
2045 ucontrol->value.integer.value[0] = 1;
2046 break;
2047 case SNDRV_PCM_FORMAT_S16_LE:
2048 default:
2049 ucontrol->value.integer.value[0] = 0;
2050 break;
2051 }
2052
2053 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2054 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2055 ucontrol->value.integer.value[0]);
2056 return 0;
2057}
2058
2059static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061{
2062 int idx = ext_disp_get_port_idx(kcontrol);
2063
2064 if (idx < 0)
2065 return idx;
2066
2067 switch (ucontrol->value.integer.value[0]) {
2068 case 2:
2069 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2070 break;
2071 case 1:
2072 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2073 break;
2074 case 0:
2075 default:
2076 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2077 break;
2078 }
2079 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2080 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2081 ucontrol->value.integer.value[0]);
2082
2083 return 0;
2084}
2085
2086static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_value *ucontrol)
2088{
2089 int idx = ext_disp_get_port_idx(kcontrol);
2090
2091 if (idx < 0)
2092 return idx;
2093
2094 ucontrol->value.integer.value[0] =
2095 ext_disp_rx_cfg[idx].channels - 2;
2096
2097 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2098 idx, ext_disp_rx_cfg[idx].channels);
2099
2100 return 0;
2101}
2102
2103static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2104 struct snd_ctl_elem_value *ucontrol)
2105{
2106 int idx = ext_disp_get_port_idx(kcontrol);
2107
2108 if (idx < 0)
2109 return idx;
2110
2111 ext_disp_rx_cfg[idx].channels =
2112 ucontrol->value.integer.value[0] + 2;
2113
2114 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2115 idx, ext_disp_rx_cfg[idx].channels);
2116 return 1;
2117}
2118
2119static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2120 struct snd_ctl_elem_value *ucontrol)
2121{
2122 int sample_rate_val;
2123 int idx = ext_disp_get_port_idx(kcontrol);
2124
2125 if (idx < 0)
2126 return idx;
2127
2128 switch (ext_disp_rx_cfg[idx].sample_rate) {
2129 case SAMPLING_RATE_176P4KHZ:
2130 sample_rate_val = 6;
2131 break;
2132
2133 case SAMPLING_RATE_88P2KHZ:
2134 sample_rate_val = 5;
2135 break;
2136
2137 case SAMPLING_RATE_44P1KHZ:
2138 sample_rate_val = 4;
2139 break;
2140
2141 case SAMPLING_RATE_32KHZ:
2142 sample_rate_val = 3;
2143 break;
2144
2145 case SAMPLING_RATE_192KHZ:
2146 sample_rate_val = 2;
2147 break;
2148
2149 case SAMPLING_RATE_96KHZ:
2150 sample_rate_val = 1;
2151 break;
2152
2153 case SAMPLING_RATE_48KHZ:
2154 default:
2155 sample_rate_val = 0;
2156 break;
2157 }
2158
2159 ucontrol->value.integer.value[0] = sample_rate_val;
2160 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2161 idx, ext_disp_rx_cfg[idx].sample_rate);
2162
2163 return 0;
2164}
2165
2166static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2167 struct snd_ctl_elem_value *ucontrol)
2168{
2169 int idx = ext_disp_get_port_idx(kcontrol);
2170
2171 if (idx < 0)
2172 return idx;
2173
2174 switch (ucontrol->value.integer.value[0]) {
2175 case 6:
2176 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2177 break;
2178 case 5:
2179 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2180 break;
2181 case 4:
2182 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2183 break;
2184 case 3:
2185 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2186 break;
2187 case 2:
2188 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2189 break;
2190 case 1:
2191 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2192 break;
2193 case 0:
2194 default:
2195 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2196 break;
2197 }
2198
2199 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2200 __func__, ucontrol->value.integer.value[0], idx,
2201 ext_disp_rx_cfg[idx].sample_rate);
2202 return 0;
2203}
2204
2205static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 pr_debug("%s: proxy_rx channels = %d\n",
2209 __func__, proxy_rx_cfg.channels);
2210 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2211
2212 return 0;
2213}
2214
2215static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2216 struct snd_ctl_elem_value *ucontrol)
2217{
2218 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2219 pr_debug("%s: proxy_rx channels = %d\n",
2220 __func__, proxy_rx_cfg.channels);
2221
2222 return 1;
2223}
2224
2225static int tdm_get_sample_rate(int value)
2226{
2227 int sample_rate = 0;
2228
2229 switch (value) {
2230 case 0:
2231 sample_rate = SAMPLING_RATE_8KHZ;
2232 break;
2233 case 1:
2234 sample_rate = SAMPLING_RATE_16KHZ;
2235 break;
2236 case 2:
2237 sample_rate = SAMPLING_RATE_32KHZ;
2238 break;
2239 case 3:
2240 sample_rate = SAMPLING_RATE_48KHZ;
2241 break;
2242 case 4:
2243 sample_rate = SAMPLING_RATE_176P4KHZ;
2244 break;
2245 case 5:
2246 sample_rate = SAMPLING_RATE_352P8KHZ;
2247 break;
2248 default:
2249 sample_rate = SAMPLING_RATE_48KHZ;
2250 break;
2251 }
2252 return sample_rate;
2253}
2254
2255static int aux_pcm_get_sample_rate(int value)
2256{
2257 int sample_rate;
2258
2259 switch (value) {
2260 case 1:
2261 sample_rate = SAMPLING_RATE_16KHZ;
2262 break;
2263 case 0:
2264 default:
2265 sample_rate = SAMPLING_RATE_8KHZ;
2266 break;
2267 }
2268 return sample_rate;
2269}
2270
2271static int tdm_get_sample_rate_val(int sample_rate)
2272{
2273 int sample_rate_val = 0;
2274
2275 switch (sample_rate) {
2276 case SAMPLING_RATE_8KHZ:
2277 sample_rate_val = 0;
2278 break;
2279 case SAMPLING_RATE_16KHZ:
2280 sample_rate_val = 1;
2281 break;
2282 case SAMPLING_RATE_32KHZ:
2283 sample_rate_val = 2;
2284 break;
2285 case SAMPLING_RATE_48KHZ:
2286 sample_rate_val = 3;
2287 break;
2288 case SAMPLING_RATE_176P4KHZ:
2289 sample_rate_val = 4;
2290 break;
2291 case SAMPLING_RATE_352P8KHZ:
2292 sample_rate_val = 5;
2293 break;
2294 default:
2295 sample_rate_val = 3;
2296 break;
2297 }
2298 return sample_rate_val;
2299}
2300
2301static int aux_pcm_get_sample_rate_val(int sample_rate)
2302{
2303 int sample_rate_val;
2304
2305 switch (sample_rate) {
2306 case SAMPLING_RATE_16KHZ:
2307 sample_rate_val = 1;
2308 break;
2309 case SAMPLING_RATE_8KHZ:
2310 default:
2311 sample_rate_val = 0;
2312 break;
2313 }
2314 return sample_rate_val;
2315}
2316
2317static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2318 struct tdm_port *port)
2319{
2320 if (port) {
2321 if (strnstr(kcontrol->id.name, "PRI",
2322 sizeof(kcontrol->id.name))) {
2323 port->mode = TDM_PRI;
2324 } else if (strnstr(kcontrol->id.name, "SEC",
2325 sizeof(kcontrol->id.name))) {
2326 port->mode = TDM_SEC;
2327 } else if (strnstr(kcontrol->id.name, "TERT",
2328 sizeof(kcontrol->id.name))) {
2329 port->mode = TDM_TERT;
2330 } else if (strnstr(kcontrol->id.name, "QUAT",
2331 sizeof(kcontrol->id.name))) {
2332 port->mode = TDM_QUAT;
2333 } else if (strnstr(kcontrol->id.name, "QUIN",
2334 sizeof(kcontrol->id.name))) {
2335 port->mode = TDM_QUIN;
2336 } else {
2337 pr_err("%s: unsupported mode in: %s\n",
2338 __func__, kcontrol->id.name);
2339 return -EINVAL;
2340 }
2341
2342 if (strnstr(kcontrol->id.name, "RX_0",
2343 sizeof(kcontrol->id.name)) ||
2344 strnstr(kcontrol->id.name, "TX_0",
2345 sizeof(kcontrol->id.name))) {
2346 port->channel = TDM_0;
2347 } else if (strnstr(kcontrol->id.name, "RX_1",
2348 sizeof(kcontrol->id.name)) ||
2349 strnstr(kcontrol->id.name, "TX_1",
2350 sizeof(kcontrol->id.name))) {
2351 port->channel = TDM_1;
2352 } else if (strnstr(kcontrol->id.name, "RX_2",
2353 sizeof(kcontrol->id.name)) ||
2354 strnstr(kcontrol->id.name, "TX_2",
2355 sizeof(kcontrol->id.name))) {
2356 port->channel = TDM_2;
2357 } else if (strnstr(kcontrol->id.name, "RX_3",
2358 sizeof(kcontrol->id.name)) ||
2359 strnstr(kcontrol->id.name, "TX_3",
2360 sizeof(kcontrol->id.name))) {
2361 port->channel = TDM_3;
2362 } else if (strnstr(kcontrol->id.name, "RX_4",
2363 sizeof(kcontrol->id.name)) ||
2364 strnstr(kcontrol->id.name, "TX_4",
2365 sizeof(kcontrol->id.name))) {
2366 port->channel = TDM_4;
2367 } else if (strnstr(kcontrol->id.name, "RX_5",
2368 sizeof(kcontrol->id.name)) ||
2369 strnstr(kcontrol->id.name, "TX_5",
2370 sizeof(kcontrol->id.name))) {
2371 port->channel = TDM_5;
2372 } else if (strnstr(kcontrol->id.name, "RX_6",
2373 sizeof(kcontrol->id.name)) ||
2374 strnstr(kcontrol->id.name, "TX_6",
2375 sizeof(kcontrol->id.name))) {
2376 port->channel = TDM_6;
2377 } else if (strnstr(kcontrol->id.name, "RX_7",
2378 sizeof(kcontrol->id.name)) ||
2379 strnstr(kcontrol->id.name, "TX_7",
2380 sizeof(kcontrol->id.name))) {
2381 port->channel = TDM_7;
2382 } else {
2383 pr_err("%s: unsupported channel in: %s\n",
2384 __func__, kcontrol->id.name);
2385 return -EINVAL;
2386 }
2387 } else {
2388 return -EINVAL;
2389 }
2390 return 0;
2391}
2392
2393static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2394 struct snd_ctl_elem_value *ucontrol)
2395{
2396 struct tdm_port port;
2397 int ret = tdm_get_port_idx(kcontrol, &port);
2398
2399 if (ret) {
2400 pr_err("%s: unsupported control: %s\n",
2401 __func__, kcontrol->id.name);
2402 } else {
2403 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2404 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2405
2406 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2407 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2408 ucontrol->value.enumerated.item[0]);
2409 }
2410 return ret;
2411}
2412
2413static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_value *ucontrol)
2415{
2416 struct tdm_port port;
2417 int ret = tdm_get_port_idx(kcontrol, &port);
2418
2419 if (ret) {
2420 pr_err("%s: unsupported control: %s\n",
2421 __func__, kcontrol->id.name);
2422 } else {
2423 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2424 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2425
2426 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2427 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2428 ucontrol->value.enumerated.item[0]);
2429 }
2430 return ret;
2431}
2432
2433static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2434 struct snd_ctl_elem_value *ucontrol)
2435{
2436 struct tdm_port port;
2437 int ret = tdm_get_port_idx(kcontrol, &port);
2438
2439 if (ret) {
2440 pr_err("%s: unsupported control: %s\n",
2441 __func__, kcontrol->id.name);
2442 } else {
2443 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2444 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2445
2446 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2447 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2448 ucontrol->value.enumerated.item[0]);
2449 }
2450 return ret;
2451}
2452
2453static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2454 struct snd_ctl_elem_value *ucontrol)
2455{
2456 struct tdm_port port;
2457 int ret = tdm_get_port_idx(kcontrol, &port);
2458
2459 if (ret) {
2460 pr_err("%s: unsupported control: %s\n",
2461 __func__, kcontrol->id.name);
2462 } else {
2463 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2464 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2465
2466 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2467 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2468 ucontrol->value.enumerated.item[0]);
2469 }
2470 return ret;
2471}
2472
2473static int tdm_get_format(int value)
2474{
2475 int format = 0;
2476
2477 switch (value) {
2478 case 0:
2479 format = SNDRV_PCM_FORMAT_S16_LE;
2480 break;
2481 case 1:
2482 format = SNDRV_PCM_FORMAT_S24_LE;
2483 break;
2484 case 2:
2485 format = SNDRV_PCM_FORMAT_S32_LE;
2486 break;
2487 default:
2488 format = SNDRV_PCM_FORMAT_S16_LE;
2489 break;
2490 }
2491 return format;
2492}
2493
2494static int tdm_get_format_val(int format)
2495{
2496 int value = 0;
2497
2498 switch (format) {
2499 case SNDRV_PCM_FORMAT_S16_LE:
2500 value = 0;
2501 break;
2502 case SNDRV_PCM_FORMAT_S24_LE:
2503 value = 1;
2504 break;
2505 case SNDRV_PCM_FORMAT_S32_LE:
2506 value = 2;
2507 break;
2508 default:
2509 value = 0;
2510 break;
2511 }
2512 return value;
2513}
2514
2515static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2516 struct snd_ctl_elem_value *ucontrol)
2517{
2518 struct tdm_port port;
2519 int ret = tdm_get_port_idx(kcontrol, &port);
2520
2521 if (ret) {
2522 pr_err("%s: unsupported control: %s\n",
2523 __func__, kcontrol->id.name);
2524 } else {
2525 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2526 tdm_rx_cfg[port.mode][port.channel].bit_format);
2527
2528 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2529 tdm_rx_cfg[port.mode][port.channel].bit_format,
2530 ucontrol->value.enumerated.item[0]);
2531 }
2532 return ret;
2533}
2534
2535static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2536 struct snd_ctl_elem_value *ucontrol)
2537{
2538 struct tdm_port port;
2539 int ret = tdm_get_port_idx(kcontrol, &port);
2540
2541 if (ret) {
2542 pr_err("%s: unsupported control: %s\n",
2543 __func__, kcontrol->id.name);
2544 } else {
2545 tdm_rx_cfg[port.mode][port.channel].bit_format =
2546 tdm_get_format(ucontrol->value.enumerated.item[0]);
2547
2548 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2549 tdm_rx_cfg[port.mode][port.channel].bit_format,
2550 ucontrol->value.enumerated.item[0]);
2551 }
2552 return ret;
2553}
2554
2555static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2556 struct snd_ctl_elem_value *ucontrol)
2557{
2558 struct tdm_port port;
2559 int ret = tdm_get_port_idx(kcontrol, &port);
2560
2561 if (ret) {
2562 pr_err("%s: unsupported control: %s\n",
2563 __func__, kcontrol->id.name);
2564 } else {
2565 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2566 tdm_tx_cfg[port.mode][port.channel].bit_format);
2567
2568 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2569 tdm_tx_cfg[port.mode][port.channel].bit_format,
2570 ucontrol->value.enumerated.item[0]);
2571 }
2572 return ret;
2573}
2574
2575static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2576 struct snd_ctl_elem_value *ucontrol)
2577{
2578 struct tdm_port port;
2579 int ret = tdm_get_port_idx(kcontrol, &port);
2580
2581 if (ret) {
2582 pr_err("%s: unsupported control: %s\n",
2583 __func__, kcontrol->id.name);
2584 } else {
2585 tdm_tx_cfg[port.mode][port.channel].bit_format =
2586 tdm_get_format(ucontrol->value.enumerated.item[0]);
2587
2588 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2589 tdm_tx_cfg[port.mode][port.channel].bit_format,
2590 ucontrol->value.enumerated.item[0]);
2591 }
2592 return ret;
2593}
2594
2595static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct tdm_port port;
2599 int ret = tdm_get_port_idx(kcontrol, &port);
2600
2601 if (ret) {
2602 pr_err("%s: unsupported control: %s\n",
2603 __func__, kcontrol->id.name);
2604 } else {
2605
2606 ucontrol->value.enumerated.item[0] =
2607 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2608
2609 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2610 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2611 ucontrol->value.enumerated.item[0]);
2612 }
2613 return ret;
2614}
2615
2616static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2617 struct snd_ctl_elem_value *ucontrol)
2618{
2619 struct tdm_port port;
2620 int ret = tdm_get_port_idx(kcontrol, &port);
2621
2622 if (ret) {
2623 pr_err("%s: unsupported control: %s\n",
2624 __func__, kcontrol->id.name);
2625 } else {
2626 tdm_rx_cfg[port.mode][port.channel].channels =
2627 ucontrol->value.enumerated.item[0] + 1;
2628
2629 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2630 tdm_rx_cfg[port.mode][port.channel].channels,
2631 ucontrol->value.enumerated.item[0] + 1);
2632 }
2633 return ret;
2634}
2635
2636static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct tdm_port port;
2640 int ret = tdm_get_port_idx(kcontrol, &port);
2641
2642 if (ret) {
2643 pr_err("%s: unsupported control: %s\n",
2644 __func__, kcontrol->id.name);
2645 } else {
2646 ucontrol->value.enumerated.item[0] =
2647 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2648
2649 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2650 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2651 ucontrol->value.enumerated.item[0]);
2652 }
2653 return ret;
2654}
2655
2656static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2657 struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct tdm_port port;
2660 int ret = tdm_get_port_idx(kcontrol, &port);
2661
2662 if (ret) {
2663 pr_err("%s: unsupported control: %s\n",
2664 __func__, kcontrol->id.name);
2665 } else {
2666 tdm_tx_cfg[port.mode][port.channel].channels =
2667 ucontrol->value.enumerated.item[0] + 1;
2668
2669 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2670 tdm_tx_cfg[port.mode][port.channel].channels,
2671 ucontrol->value.enumerated.item[0] + 1);
2672 }
2673 return ret;
2674}
2675
2676static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2677{
2678 int idx;
2679
2680 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2681 sizeof("PRIM_AUX_PCM"))) {
2682 idx = PRIM_AUX_PCM;
2683 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2684 sizeof("SEC_AUX_PCM"))) {
2685 idx = SEC_AUX_PCM;
2686 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2687 sizeof("TERT_AUX_PCM"))) {
2688 idx = TERT_AUX_PCM;
2689 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2690 sizeof("QUAT_AUX_PCM"))) {
2691 idx = QUAT_AUX_PCM;
2692 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2693 sizeof("QUIN_AUX_PCM"))) {
2694 idx = QUIN_AUX_PCM;
2695 } else {
2696 pr_err("%s: unsupported port: %s\n",
2697 __func__, kcontrol->id.name);
2698 idx = -EINVAL;
2699 }
2700
2701 return idx;
2702}
2703
2704static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2705 struct snd_ctl_elem_value *ucontrol)
2706{
2707 int idx = aux_pcm_get_port_idx(kcontrol);
2708
2709 if (idx < 0)
2710 return idx;
2711
2712 aux_pcm_rx_cfg[idx].sample_rate =
2713 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2714
2715 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2716 idx, aux_pcm_rx_cfg[idx].sample_rate,
2717 ucontrol->value.enumerated.item[0]);
2718
2719 return 0;
2720}
2721
2722static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2723 struct snd_ctl_elem_value *ucontrol)
2724{
2725 int idx = aux_pcm_get_port_idx(kcontrol);
2726
2727 if (idx < 0)
2728 return idx;
2729
2730 ucontrol->value.enumerated.item[0] =
2731 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2732
2733 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2734 idx, aux_pcm_rx_cfg[idx].sample_rate,
2735 ucontrol->value.enumerated.item[0]);
2736
2737 return 0;
2738}
2739
2740static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2741 struct snd_ctl_elem_value *ucontrol)
2742{
2743 int idx = aux_pcm_get_port_idx(kcontrol);
2744
2745 if (idx < 0)
2746 return idx;
2747
2748 aux_pcm_tx_cfg[idx].sample_rate =
2749 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2750
2751 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2752 idx, aux_pcm_tx_cfg[idx].sample_rate,
2753 ucontrol->value.enumerated.item[0]);
2754
2755 return 0;
2756}
2757
2758static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2759 struct snd_ctl_elem_value *ucontrol)
2760{
2761 int idx = aux_pcm_get_port_idx(kcontrol);
2762
2763 if (idx < 0)
2764 return idx;
2765
2766 ucontrol->value.enumerated.item[0] =
2767 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2768
2769 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2770 idx, aux_pcm_tx_cfg[idx].sample_rate,
2771 ucontrol->value.enumerated.item[0]);
2772
2773 return 0;
2774}
2775
2776static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2777{
2778 int idx;
2779
2780 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2781 sizeof("PRIM_MI2S_RX"))) {
2782 idx = PRIM_MI2S;
2783 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2784 sizeof("SEC_MI2S_RX"))) {
2785 idx = SEC_MI2S;
2786 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2787 sizeof("TERT_MI2S_RX"))) {
2788 idx = TERT_MI2S;
2789 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2790 sizeof("QUAT_MI2S_RX"))) {
2791 idx = QUAT_MI2S;
2792 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2793 sizeof("QUIN_MI2S_RX"))) {
2794 idx = QUIN_MI2S;
2795 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2796 sizeof("PRIM_MI2S_TX"))) {
2797 idx = PRIM_MI2S;
2798 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2799 sizeof("SEC_MI2S_TX"))) {
2800 idx = SEC_MI2S;
2801 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2802 sizeof("TERT_MI2S_TX"))) {
2803 idx = TERT_MI2S;
2804 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2805 sizeof("QUAT_MI2S_TX"))) {
2806 idx = QUAT_MI2S;
2807 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2808 sizeof("QUIN_MI2S_TX"))) {
2809 idx = QUIN_MI2S;
2810 } else {
2811 pr_err("%s: unsupported channel: %s\n",
2812 __func__, kcontrol->id.name);
2813 idx = -EINVAL;
2814 }
2815
2816 return idx;
2817}
2818
2819static int mi2s_get_sample_rate_val(int sample_rate)
2820{
2821 int sample_rate_val;
2822
2823 switch (sample_rate) {
2824 case SAMPLING_RATE_8KHZ:
2825 sample_rate_val = 0;
2826 break;
2827 case SAMPLING_RATE_11P025KHZ:
2828 sample_rate_val = 1;
2829 break;
2830 case SAMPLING_RATE_16KHZ:
2831 sample_rate_val = 2;
2832 break;
2833 case SAMPLING_RATE_22P05KHZ:
2834 sample_rate_val = 3;
2835 break;
2836 case SAMPLING_RATE_32KHZ:
2837 sample_rate_val = 4;
2838 break;
2839 case SAMPLING_RATE_44P1KHZ:
2840 sample_rate_val = 5;
2841 break;
2842 case SAMPLING_RATE_48KHZ:
2843 sample_rate_val = 6;
2844 break;
2845 case SAMPLING_RATE_96KHZ:
2846 sample_rate_val = 7;
2847 break;
2848 case SAMPLING_RATE_192KHZ:
2849 sample_rate_val = 8;
2850 break;
2851 default:
2852 sample_rate_val = 6;
2853 break;
2854 }
2855 return sample_rate_val;
2856}
2857
2858static int mi2s_get_sample_rate(int value)
2859{
2860 int sample_rate;
2861
2862 switch (value) {
2863 case 0:
2864 sample_rate = SAMPLING_RATE_8KHZ;
2865 break;
2866 case 1:
2867 sample_rate = SAMPLING_RATE_11P025KHZ;
2868 break;
2869 case 2:
2870 sample_rate = SAMPLING_RATE_16KHZ;
2871 break;
2872 case 3:
2873 sample_rate = SAMPLING_RATE_22P05KHZ;
2874 break;
2875 case 4:
2876 sample_rate = SAMPLING_RATE_32KHZ;
2877 break;
2878 case 5:
2879 sample_rate = SAMPLING_RATE_44P1KHZ;
2880 break;
2881 case 6:
2882 sample_rate = SAMPLING_RATE_48KHZ;
2883 break;
2884 case 7:
2885 sample_rate = SAMPLING_RATE_96KHZ;
2886 break;
2887 case 8:
2888 sample_rate = SAMPLING_RATE_192KHZ;
2889 break;
2890 default:
2891 sample_rate = SAMPLING_RATE_48KHZ;
2892 break;
2893 }
2894 return sample_rate;
2895}
2896
2897static int mi2s_auxpcm_get_format(int value)
2898{
2899 int format;
2900
2901 switch (value) {
2902 case 0:
2903 format = SNDRV_PCM_FORMAT_S16_LE;
2904 break;
2905 case 1:
2906 format = SNDRV_PCM_FORMAT_S24_LE;
2907 break;
2908 case 2:
2909 format = SNDRV_PCM_FORMAT_S24_3LE;
2910 break;
2911 case 3:
2912 format = SNDRV_PCM_FORMAT_S32_LE;
2913 break;
2914 default:
2915 format = SNDRV_PCM_FORMAT_S16_LE;
2916 break;
2917 }
2918 return format;
2919}
2920
2921static int mi2s_auxpcm_get_format_value(int format)
2922{
2923 int value;
2924
2925 switch (format) {
2926 case SNDRV_PCM_FORMAT_S16_LE:
2927 value = 0;
2928 break;
2929 case SNDRV_PCM_FORMAT_S24_LE:
2930 value = 1;
2931 break;
2932 case SNDRV_PCM_FORMAT_S24_3LE:
2933 value = 2;
2934 break;
2935 case SNDRV_PCM_FORMAT_S32_LE:
2936 value = 3;
2937 break;
2938 default:
2939 value = 0;
2940 break;
2941 }
2942 return value;
2943}
2944
2945static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2946 struct snd_ctl_elem_value *ucontrol)
2947{
2948 int idx = mi2s_get_port_idx(kcontrol);
2949
2950 if (idx < 0)
2951 return idx;
2952
2953 mi2s_rx_cfg[idx].sample_rate =
2954 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2955
2956 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2957 idx, mi2s_rx_cfg[idx].sample_rate,
2958 ucontrol->value.enumerated.item[0]);
2959
2960 return 0;
2961}
2962
2963static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2964 struct snd_ctl_elem_value *ucontrol)
2965{
2966 int idx = mi2s_get_port_idx(kcontrol);
2967
2968 if (idx < 0)
2969 return idx;
2970
2971 ucontrol->value.enumerated.item[0] =
2972 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2973
2974 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2975 idx, mi2s_rx_cfg[idx].sample_rate,
2976 ucontrol->value.enumerated.item[0]);
2977
2978 return 0;
2979}
2980
2981static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2982 struct snd_ctl_elem_value *ucontrol)
2983{
2984 int idx = mi2s_get_port_idx(kcontrol);
2985
2986 if (idx < 0)
2987 return idx;
2988
2989 mi2s_tx_cfg[idx].sample_rate =
2990 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2991
2992 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2993 idx, mi2s_tx_cfg[idx].sample_rate,
2994 ucontrol->value.enumerated.item[0]);
2995
2996 return 0;
2997}
2998
2999static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3000 struct snd_ctl_elem_value *ucontrol)
3001{
3002 int idx = mi2s_get_port_idx(kcontrol);
3003
3004 if (idx < 0)
3005 return idx;
3006
3007 ucontrol->value.enumerated.item[0] =
3008 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3009
3010 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3011 idx, mi2s_tx_cfg[idx].sample_rate,
3012 ucontrol->value.enumerated.item[0]);
3013
3014 return 0;
3015}
3016
3017static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3018 struct snd_ctl_elem_value *ucontrol)
3019{
3020 int idx = mi2s_get_port_idx(kcontrol);
3021
3022 if (idx < 0)
3023 return idx;
3024
3025 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3026 idx, mi2s_rx_cfg[idx].channels);
3027 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3028
3029 return 0;
3030}
3031
3032static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3033 struct snd_ctl_elem_value *ucontrol)
3034{
3035 int idx = mi2s_get_port_idx(kcontrol);
3036
3037 if (idx < 0)
3038 return idx;
3039
3040 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3041 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3042 idx, mi2s_rx_cfg[idx].channels);
3043
3044 return 1;
3045}
3046
3047static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3048 struct snd_ctl_elem_value *ucontrol)
3049{
3050 int idx = mi2s_get_port_idx(kcontrol);
3051
3052 if (idx < 0)
3053 return idx;
3054
3055 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3056 idx, mi2s_tx_cfg[idx].channels);
3057 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3058
3059 return 0;
3060}
3061
3062static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3063 struct snd_ctl_elem_value *ucontrol)
3064{
3065 int idx = mi2s_get_port_idx(kcontrol);
3066
3067 if (idx < 0)
3068 return idx;
3069
3070 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3071 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3072 idx, mi2s_tx_cfg[idx].channels);
3073
3074 return 1;
3075}
3076
3077static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3078 struct snd_ctl_elem_value *ucontrol)
3079{
3080 int idx = mi2s_get_port_idx(kcontrol);
3081
3082 if (idx < 0)
3083 return idx;
3084
3085 ucontrol->value.enumerated.item[0] =
3086 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3087
3088 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3089 idx, mi2s_rx_cfg[idx].bit_format,
3090 ucontrol->value.enumerated.item[0]);
3091
3092 return 0;
3093}
3094
3095static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int idx = mi2s_get_port_idx(kcontrol);
3099
3100 if (idx < 0)
3101 return idx;
3102
3103 mi2s_rx_cfg[idx].bit_format =
3104 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3105
3106 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3107 idx, mi2s_rx_cfg[idx].bit_format,
3108 ucontrol->value.enumerated.item[0]);
3109
3110 return 0;
3111}
3112
3113static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3114 struct snd_ctl_elem_value *ucontrol)
3115{
3116 int idx = mi2s_get_port_idx(kcontrol);
3117
3118 if (idx < 0)
3119 return idx;
3120
3121 ucontrol->value.enumerated.item[0] =
3122 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3123
3124 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3125 idx, mi2s_tx_cfg[idx].bit_format,
3126 ucontrol->value.enumerated.item[0]);
3127
3128 return 0;
3129}
3130
3131static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3132 struct snd_ctl_elem_value *ucontrol)
3133{
3134 int idx = mi2s_get_port_idx(kcontrol);
3135
3136 if (idx < 0)
3137 return idx;
3138
3139 mi2s_tx_cfg[idx].bit_format =
3140 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3141
3142 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3143 idx, mi2s_tx_cfg[idx].bit_format,
3144 ucontrol->value.enumerated.item[0]);
3145
3146 return 0;
3147}
3148
3149static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3150 struct snd_ctl_elem_value *ucontrol)
3151{
3152 int idx = aux_pcm_get_port_idx(kcontrol);
3153
3154 if (idx < 0)
3155 return idx;
3156
3157 ucontrol->value.enumerated.item[0] =
3158 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3159
3160 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3161 idx, aux_pcm_rx_cfg[idx].bit_format,
3162 ucontrol->value.enumerated.item[0]);
3163
3164 return 0;
3165}
3166
3167static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3168 struct snd_ctl_elem_value *ucontrol)
3169{
3170 int idx = aux_pcm_get_port_idx(kcontrol);
3171
3172 if (idx < 0)
3173 return idx;
3174
3175 aux_pcm_rx_cfg[idx].bit_format =
3176 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3177
3178 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3179 idx, aux_pcm_rx_cfg[idx].bit_format,
3180 ucontrol->value.enumerated.item[0]);
3181
3182 return 0;
3183}
3184
3185static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3186 struct snd_ctl_elem_value *ucontrol)
3187{
3188 int idx = aux_pcm_get_port_idx(kcontrol);
3189
3190 if (idx < 0)
3191 return idx;
3192
3193 ucontrol->value.enumerated.item[0] =
3194 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3195
3196 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3197 idx, aux_pcm_tx_cfg[idx].bit_format,
3198 ucontrol->value.enumerated.item[0]);
3199
3200 return 0;
3201}
3202
3203static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3204 struct snd_ctl_elem_value *ucontrol)
3205{
3206 int idx = aux_pcm_get_port_idx(kcontrol);
3207
3208 if (idx < 0)
3209 return idx;
3210
3211 aux_pcm_tx_cfg[idx].bit_format =
3212 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3213
3214 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3215 idx, aux_pcm_tx_cfg[idx].bit_format,
3216 ucontrol->value.enumerated.item[0]);
3217
3218 return 0;
3219}
3220
3221static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3222{
3223 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3224 struct snd_soc_card *card = codec->component.card;
3225 struct msm_asoc_mach_data *pdata =
3226 snd_soc_card_get_drvdata(card);
3227
3228 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3229 msm_hifi_control);
3230
3231 if (!pdata || !pdata->hph_en1_gpio_p) {
3232 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3233 return -EINVAL;
3234 }
3235 if (msm_hifi_control == MSM_HIFI_ON) {
3236 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3237 /* 5msec delay needed as per HW requirement */
3238 usleep_range(5000, 5010);
3239 } else {
3240 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3241 }
3242 snd_soc_dapm_sync(dapm);
3243
3244 return 0;
3245}
3246
3247static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3248 struct snd_ctl_elem_value *ucontrol)
3249{
3250 pr_debug("%s: msm_hifi_control = %d\n",
3251 __func__, msm_hifi_control);
3252 ucontrol->value.integer.value[0] = msm_hifi_control;
3253
3254 return 0;
3255}
3256
3257static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3261
3262 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3263 __func__, ucontrol->value.integer.value[0]);
3264
3265 msm_hifi_control = ucontrol->value.integer.value[0];
3266 msm_hifi_ctrl(codec);
3267
3268 return 0;
3269}
3270
3271static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3272 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3273 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3274 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3275 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3276 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3277 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3278 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3279 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3280 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3281 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3282 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3283 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3284 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3285 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3286 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3287 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3288 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3289 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3290 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3291 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3292 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3293 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3294 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3295 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3296 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3297 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3298 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3299 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3300 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3301 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3302 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3303 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3304 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3305 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3306 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3307 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3308 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3309 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3310 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3311 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3312 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3313 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3314 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3315 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3316 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3317 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3318 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3319 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3320 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3321 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3323 wsa_cdc_dma_rx_0_sample_rate,
3324 cdc_dma_rx_sample_rate_get,
3325 cdc_dma_rx_sample_rate_put),
3326 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3327 wsa_cdc_dma_rx_1_sample_rate,
3328 cdc_dma_rx_sample_rate_get,
3329 cdc_dma_rx_sample_rate_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3331 rx_cdc_dma_rx_0_sample_rate,
3332 cdc_dma_rx_sample_rate_get,
3333 cdc_dma_rx_sample_rate_put),
3334 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3335 rx_cdc_dma_rx_1_sample_rate,
3336 cdc_dma_rx_sample_rate_get,
3337 cdc_dma_rx_sample_rate_put),
3338 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3339 rx_cdc_dma_rx_2_sample_rate,
3340 cdc_dma_rx_sample_rate_get,
3341 cdc_dma_rx_sample_rate_put),
3342 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3343 rx_cdc_dma_rx_3_sample_rate,
3344 cdc_dma_rx_sample_rate_get,
3345 cdc_dma_rx_sample_rate_put),
3346 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3347 rx_cdc_dma_rx_5_sample_rate,
3348 cdc_dma_rx_sample_rate_get,
3349 cdc_dma_rx_sample_rate_put),
3350 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3351 wsa_cdc_dma_tx_0_sample_rate,
3352 cdc_dma_tx_sample_rate_get,
3353 cdc_dma_tx_sample_rate_put),
3354 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3355 wsa_cdc_dma_tx_1_sample_rate,
3356 cdc_dma_tx_sample_rate_get,
3357 cdc_dma_tx_sample_rate_put),
3358 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3359 wsa_cdc_dma_tx_2_sample_rate,
3360 cdc_dma_tx_sample_rate_get,
3361 cdc_dma_tx_sample_rate_put),
3362 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3363 tx_cdc_dma_tx_0_sample_rate,
3364 cdc_dma_tx_sample_rate_get,
3365 cdc_dma_tx_sample_rate_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3367 tx_cdc_dma_tx_3_sample_rate,
3368 cdc_dma_tx_sample_rate_get,
3369 cdc_dma_tx_sample_rate_put),
3370 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3371 tx_cdc_dma_tx_4_sample_rate,
3372 cdc_dma_tx_sample_rate_get,
3373 cdc_dma_tx_sample_rate_put),
3374};
3375
3376static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3377 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3378 slim_rx_ch_get, slim_rx_ch_put),
3379 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3380 slim_rx_ch_get, slim_rx_ch_put),
3381 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3382 slim_tx_ch_get, slim_tx_ch_put),
3383 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3384 slim_tx_ch_get, slim_tx_ch_put),
3385 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3386 slim_rx_ch_get, slim_rx_ch_put),
3387 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3388 slim_rx_ch_get, slim_rx_ch_put),
3389 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3390 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3391 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3392 slim_rx_bit_format_get, slim_rx_bit_format_put),
3393 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3394 slim_rx_bit_format_get, slim_rx_bit_format_put),
3395 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3396 slim_rx_bit_format_get, slim_rx_bit_format_put),
3397 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3398 slim_tx_bit_format_get, slim_tx_bit_format_put),
3399 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3400 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3401 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3402 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3403 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3404 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3405 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3406 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3407 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3408 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3409};
3410
3411static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3412 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3413 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3414 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3415 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3416 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3417 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3418 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3419 proxy_rx_ch_get, proxy_rx_ch_put),
3420 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3421 usb_audio_rx_format_get, usb_audio_rx_format_put),
3422 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3423 usb_audio_tx_format_get, usb_audio_tx_format_put),
3424 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3425 ext_disp_rx_format_get, ext_disp_rx_format_put),
3426 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3427 usb_audio_rx_sample_rate_get,
3428 usb_audio_rx_sample_rate_put),
3429 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3430 usb_audio_tx_sample_rate_get,
3431 usb_audio_tx_sample_rate_put),
3432 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3433 ext_disp_rx_sample_rate_get,
3434 ext_disp_rx_sample_rate_put),
3435 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3436 tdm_rx_sample_rate_get,
3437 tdm_rx_sample_rate_put),
3438 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3439 tdm_tx_sample_rate_get,
3440 tdm_tx_sample_rate_put),
3441 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3442 tdm_rx_format_get,
3443 tdm_rx_format_put),
3444 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3445 tdm_tx_format_get,
3446 tdm_tx_format_put),
3447 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3448 tdm_rx_ch_get,
3449 tdm_rx_ch_put),
3450 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3451 tdm_tx_ch_get,
3452 tdm_tx_ch_put),
3453 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3454 tdm_rx_sample_rate_get,
3455 tdm_rx_sample_rate_put),
3456 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3457 tdm_tx_sample_rate_get,
3458 tdm_tx_sample_rate_put),
3459 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3460 tdm_rx_format_get,
3461 tdm_rx_format_put),
3462 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3463 tdm_tx_format_get,
3464 tdm_tx_format_put),
3465 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3466 tdm_rx_ch_get,
3467 tdm_rx_ch_put),
3468 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3469 tdm_tx_ch_get,
3470 tdm_tx_ch_put),
3471 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3472 tdm_rx_sample_rate_get,
3473 tdm_rx_sample_rate_put),
3474 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3475 tdm_tx_sample_rate_get,
3476 tdm_tx_sample_rate_put),
3477 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3478 tdm_rx_format_get,
3479 tdm_rx_format_put),
3480 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3481 tdm_tx_format_get,
3482 tdm_tx_format_put),
3483 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3484 tdm_rx_ch_get,
3485 tdm_rx_ch_put),
3486 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3487 tdm_tx_ch_get,
3488 tdm_tx_ch_put),
3489 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3490 tdm_rx_sample_rate_get,
3491 tdm_rx_sample_rate_put),
3492 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3493 tdm_tx_sample_rate_get,
3494 tdm_tx_sample_rate_put),
3495 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3496 tdm_rx_format_get,
3497 tdm_rx_format_put),
3498 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3499 tdm_tx_format_get,
3500 tdm_tx_format_put),
3501 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3502 tdm_rx_ch_get,
3503 tdm_rx_ch_put),
3504 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3505 tdm_tx_ch_get,
3506 tdm_tx_ch_put),
3507 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3508 tdm_rx_sample_rate_get,
3509 tdm_rx_sample_rate_put),
3510 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3511 tdm_tx_sample_rate_get,
3512 tdm_tx_sample_rate_put),
3513 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3514 tdm_rx_format_get,
3515 tdm_rx_format_put),
3516 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3517 tdm_tx_format_get,
3518 tdm_tx_format_put),
3519 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3520 tdm_rx_ch_get,
3521 tdm_rx_ch_put),
3522 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3523 tdm_tx_ch_get,
3524 tdm_tx_ch_put),
3525 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3526 aux_pcm_rx_sample_rate_get,
3527 aux_pcm_rx_sample_rate_put),
3528 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3529 aux_pcm_rx_sample_rate_get,
3530 aux_pcm_rx_sample_rate_put),
3531 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3532 aux_pcm_rx_sample_rate_get,
3533 aux_pcm_rx_sample_rate_put),
3534 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3535 aux_pcm_rx_sample_rate_get,
3536 aux_pcm_rx_sample_rate_put),
3537 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3538 aux_pcm_rx_sample_rate_get,
3539 aux_pcm_rx_sample_rate_put),
3540 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3541 aux_pcm_tx_sample_rate_get,
3542 aux_pcm_tx_sample_rate_put),
3543 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3544 aux_pcm_tx_sample_rate_get,
3545 aux_pcm_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3547 aux_pcm_tx_sample_rate_get,
3548 aux_pcm_tx_sample_rate_put),
3549 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3550 aux_pcm_tx_sample_rate_get,
3551 aux_pcm_tx_sample_rate_put),
3552 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3553 aux_pcm_tx_sample_rate_get,
3554 aux_pcm_tx_sample_rate_put),
3555 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3556 mi2s_rx_sample_rate_get,
3557 mi2s_rx_sample_rate_put),
3558 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3559 mi2s_rx_sample_rate_get,
3560 mi2s_rx_sample_rate_put),
3561 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3562 mi2s_rx_sample_rate_get,
3563 mi2s_rx_sample_rate_put),
3564 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3565 mi2s_rx_sample_rate_get,
3566 mi2s_rx_sample_rate_put),
3567 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3568 mi2s_rx_sample_rate_get,
3569 mi2s_rx_sample_rate_put),
3570 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3571 mi2s_tx_sample_rate_get,
3572 mi2s_tx_sample_rate_put),
3573 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3574 mi2s_tx_sample_rate_get,
3575 mi2s_tx_sample_rate_put),
3576 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3577 mi2s_tx_sample_rate_get,
3578 mi2s_tx_sample_rate_put),
3579 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3580 mi2s_tx_sample_rate_get,
3581 mi2s_tx_sample_rate_put),
3582 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3583 mi2s_tx_sample_rate_get,
3584 mi2s_tx_sample_rate_put),
3585 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3586 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3587 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3588 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3589 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3590 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3591 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3592 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3593 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3594 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3595 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3596 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3597 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3598 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3599 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3600 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3601 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3602 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3603 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3604 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3605 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3606 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3607 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3608 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3609 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3610 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3611 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3612 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3613 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3614 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3615 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3616 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3617 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3618 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3619 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3620 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3621 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3622 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3623 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3624 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3625 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3626 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3627 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3628 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3629 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3630 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3631 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3632 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3633 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3634 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3635 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3636 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3637 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3638 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3639 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3640 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3641 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3642 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3643 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3644 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3645 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3646 msm_hifi_put),
3647 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3648 msm_bt_sample_rate_get,
3649 msm_bt_sample_rate_put),
3650};
3651
3652static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3653 int enable, bool dapm)
3654{
3655 int ret = 0;
3656
3657 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3658 ret = tavil_cdc_mclk_enable(codec, enable);
3659 } else {
3660 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3661 __func__);
3662 ret = -EINVAL;
3663 }
3664 return ret;
3665}
3666
3667static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3668 int enable, bool dapm)
3669{
3670 int ret = 0;
3671
3672 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3673 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3674 } else {
3675 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3676 __func__);
3677 ret = -EINVAL;
3678 }
3679
3680 return ret;
3681}
3682
3683static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3684 struct snd_kcontrol *kcontrol, int event)
3685{
3686 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3687
3688 pr_debug("%s: event = %d\n", __func__, event);
3689
3690 switch (event) {
3691 case SND_SOC_DAPM_PRE_PMU:
3692 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3693 case SND_SOC_DAPM_POST_PMD:
3694 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3695 }
3696 return 0;
3697}
3698
3699static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3700 struct snd_kcontrol *kcontrol, int event)
3701{
3702 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3703
3704 pr_debug("%s: event = %d\n", __func__, event);
3705
3706 switch (event) {
3707 case SND_SOC_DAPM_PRE_PMU:
3708 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3709 case SND_SOC_DAPM_POST_PMD:
3710 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3711 }
3712 return 0;
3713}
3714
3715static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3716 struct snd_kcontrol *k, int event)
3717{
3718 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3719 struct snd_soc_card *card = codec->component.card;
3720 struct msm_asoc_mach_data *pdata =
3721 snd_soc_card_get_drvdata(card);
3722
3723 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3724 __func__, msm_hifi_control);
3725
3726 if (!pdata || !pdata->hph_en0_gpio_p) {
3727 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3728 return -EINVAL;
3729 }
3730
3731 if (msm_hifi_control != MSM_HIFI_ON) {
3732 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3733 __func__);
3734 return 0;
3735 }
3736
3737 switch (event) {
3738 case SND_SOC_DAPM_POST_PMU:
3739 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3740 break;
3741 case SND_SOC_DAPM_PRE_PMD:
3742 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3743 break;
3744 }
3745
3746 return 0;
3747}
3748
3749static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3750
3751 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3752 msm_mclk_event,
3753 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3754
3755 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3756 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3757
3758 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3759 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3760 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3761 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3762 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3763 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3764 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3765 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3766
3767 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3768 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3769 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3770 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3771 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3772 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3773};
3774
3775static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3776 struct snd_kcontrol *kcontrol, int event)
3777{
3778 struct msm_asoc_mach_data *pdata = NULL;
3779 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3780 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05303781 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303782 int *dmic_gpio_cnt;
3783 struct device_node *dmic_gpio;
3784 char *wname;
3785
3786 wname = strpbrk(w->name, "0123");
3787 if (!wname) {
3788 dev_err(codec->dev, "%s: widget not found\n", __func__);
3789 return -EINVAL;
3790 }
3791
3792 ret = kstrtouint(wname, 10, &dmic_idx);
3793 if (ret < 0) {
3794 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3795 __func__);
3796 return -EINVAL;
3797 }
3798
3799 pdata = snd_soc_card_get_drvdata(codec->component.card);
3800
3801 switch (dmic_idx) {
3802 case 0:
3803 case 1:
3804 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3805 dmic_gpio = pdata->dmic01_gpio_p;
3806 break;
3807 case 2:
3808 case 3:
3809 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3810 dmic_gpio = pdata->dmic23_gpio_p;
3811 break;
3812 default:
3813 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3814 __func__);
3815 return -EINVAL;
3816 }
3817
3818 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3819 __func__, event, dmic_idx, *dmic_gpio_cnt);
3820
3821 switch (event) {
3822 case SND_SOC_DAPM_PRE_PMU:
3823 (*dmic_gpio_cnt)++;
3824 if (*dmic_gpio_cnt == 1) {
3825 ret = msm_cdc_pinctrl_select_active_state(
3826 dmic_gpio);
3827 if (ret < 0) {
3828 pr_err("%s: gpio set cannot be activated %sd",
3829 __func__, "dmic_gpio");
3830 return ret;
3831 }
3832 }
3833
3834 break;
3835 case SND_SOC_DAPM_POST_PMD:
3836 (*dmic_gpio_cnt)--;
3837 if (*dmic_gpio_cnt == 0) {
3838 ret = msm_cdc_pinctrl_select_sleep_state(
3839 dmic_gpio);
3840 if (ret < 0) {
3841 pr_err("%s: gpio set cannot be de-activated %sd",
3842 __func__, "dmic_gpio");
3843 return ret;
3844 }
3845 }
3846 break;
3847 default:
3848 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3849 return -EINVAL;
3850 }
3851 return 0;
3852}
3853
3854static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3855 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3856 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3857 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3858 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3859 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3860 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3861 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3862 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3863};
3864
3865static inline int param_is_mask(int p)
3866{
3867 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3868 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3869}
3870
3871static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3872 int n)
3873{
3874 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3875}
3876
3877static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3878 unsigned int bit)
3879{
3880 if (bit >= SNDRV_MASK_MAX)
3881 return;
3882 if (param_is_mask(n)) {
3883 struct snd_mask *m = param_to_mask(p, n);
3884
3885 m->bits[0] = 0;
3886 m->bits[1] = 0;
3887 m->bits[bit >> 5] |= (1 << (bit & 31));
3888 }
3889}
3890
3891static int msm_slim_get_ch_from_beid(int32_t be_id)
3892{
3893 int ch_id = 0;
3894
3895 switch (be_id) {
3896 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3897 ch_id = SLIM_RX_0;
3898 break;
3899 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3900 ch_id = SLIM_RX_1;
3901 break;
3902 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3903 ch_id = SLIM_RX_2;
3904 break;
3905 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3906 ch_id = SLIM_RX_3;
3907 break;
3908 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3909 ch_id = SLIM_RX_4;
3910 break;
3911 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3912 ch_id = SLIM_RX_6;
3913 break;
3914 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3915 ch_id = SLIM_TX_0;
3916 break;
3917 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3918 ch_id = SLIM_TX_3;
3919 break;
3920 default:
3921 ch_id = SLIM_RX_0;
3922 break;
3923 }
3924
3925 return ch_id;
3926}
3927
3928static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3929{
3930 int idx = 0;
3931
3932 switch (be_id) {
3933 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3934 idx = WSA_CDC_DMA_RX_0;
3935 break;
3936 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3937 idx = WSA_CDC_DMA_TX_0;
3938 break;
3939 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3940 idx = WSA_CDC_DMA_RX_1;
3941 break;
3942 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3943 idx = WSA_CDC_DMA_TX_1;
3944 break;
3945 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3946 idx = WSA_CDC_DMA_TX_2;
3947 break;
3948 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3949 idx = RX_CDC_DMA_RX_0;
3950 break;
3951 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3952 idx = RX_CDC_DMA_RX_1;
3953 break;
3954 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3955 idx = RX_CDC_DMA_RX_2;
3956 break;
3957 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3958 idx = RX_CDC_DMA_RX_3;
3959 break;
3960 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3961 idx = RX_CDC_DMA_RX_5;
3962 break;
3963 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3964 idx = TX_CDC_DMA_TX_0;
3965 break;
3966 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3967 idx = TX_CDC_DMA_TX_3;
3968 break;
3969 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3970 idx = TX_CDC_DMA_TX_4;
3971 break;
3972 default:
3973 idx = RX_CDC_DMA_RX_0;
3974 break;
3975 }
3976
3977 return idx;
3978}
3979
3980static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3981{
3982 int idx = -EINVAL;
3983
3984 switch (be_id) {
3985 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3986 idx = DP_RX_IDX;
3987 break;
3988 default:
3989 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3990 idx = -EINVAL;
3991 break;
3992 }
3993
3994 return idx;
3995}
3996
3997static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3998 struct snd_pcm_hw_params *params)
3999{
4000 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4001 struct snd_interval *rate = hw_param_interval(params,
4002 SNDRV_PCM_HW_PARAM_RATE);
4003 struct snd_interval *channels = hw_param_interval(params,
4004 SNDRV_PCM_HW_PARAM_CHANNELS);
4005 int rc = 0;
4006 int idx;
4007 void *config = NULL;
4008 struct snd_soc_codec *codec = NULL;
4009
4010 pr_debug("%s: format = %d, rate = %d\n",
4011 __func__, params_format(params), params_rate(params));
4012
4013 switch (dai_link->id) {
4014 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4015 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4016 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4017 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4018 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4019 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4020 idx = msm_slim_get_ch_from_beid(dai_link->id);
4021 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4022 slim_rx_cfg[idx].bit_format);
4023 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4024 channels->min = channels->max = slim_rx_cfg[idx].channels;
4025 break;
4026
4027 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4028 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4029 idx = msm_slim_get_ch_from_beid(dai_link->id);
4030 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4031 slim_tx_cfg[idx].bit_format);
4032 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4033 channels->min = channels->max = slim_tx_cfg[idx].channels;
4034 break;
4035
4036 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4037 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4038 slim_tx_cfg[1].bit_format);
4039 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4040 channels->min = channels->max = slim_tx_cfg[1].channels;
4041 break;
4042
4043 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4044 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4045 SNDRV_PCM_FORMAT_S32_LE);
4046 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4047 channels->min = channels->max = msm_vi_feed_tx_ch;
4048 break;
4049
4050 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4051 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4052 slim_rx_cfg[5].bit_format);
4053 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4054 channels->min = channels->max = slim_rx_cfg[5].channels;
4055 break;
4056
4057 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4058 codec = rtd->codec;
4059 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4060 channels->min = channels->max = 1;
4061
4062 config = msm_codec_fn.get_afe_config_fn(codec,
4063 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4064 if (config) {
4065 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4066 config, SLIMBUS_5_TX);
4067 if (rc)
4068 pr_err("%s: Failed to set slimbus slave port config %d\n",
4069 __func__, rc);
4070 }
4071 break;
4072
4073 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4074 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4075 slim_rx_cfg[SLIM_RX_7].bit_format);
4076 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4077 channels->min = channels->max =
4078 slim_rx_cfg[SLIM_RX_7].channels;
4079 break;
4080
4081 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4082 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4083 channels->min = channels->max =
4084 slim_tx_cfg[SLIM_TX_7].channels;
4085 break;
4086
4087 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4088 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4089 channels->min = channels->max =
4090 slim_tx_cfg[SLIM_TX_8].channels;
4091 break;
4092
4093 case MSM_BACKEND_DAI_USB_RX:
4094 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4095 usb_rx_cfg.bit_format);
4096 rate->min = rate->max = usb_rx_cfg.sample_rate;
4097 channels->min = channels->max = usb_rx_cfg.channels;
4098 break;
4099
4100 case MSM_BACKEND_DAI_USB_TX:
4101 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4102 usb_tx_cfg.bit_format);
4103 rate->min = rate->max = usb_tx_cfg.sample_rate;
4104 channels->min = channels->max = usb_tx_cfg.channels;
4105 break;
4106
4107 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4108 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4109 if (idx < 0) {
4110 pr_err("%s: Incorrect ext disp idx %d\n",
4111 __func__, idx);
4112 rc = idx;
4113 goto done;
4114 }
4115
4116 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4117 ext_disp_rx_cfg[idx].bit_format);
4118 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4119 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4120 break;
4121
4122 case MSM_BACKEND_DAI_AFE_PCM_RX:
4123 channels->min = channels->max = proxy_rx_cfg.channels;
4124 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4125 break;
4126
4127 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4128 channels->min = channels->max =
4129 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4130 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4131 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4132 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4133 break;
4134
4135 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4136 channels->min = channels->max =
4137 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4138 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4139 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4140 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4141 break;
4142
4143 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4144 channels->min = channels->max =
4145 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4146 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4147 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4148 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4149 break;
4150
4151 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4152 channels->min = channels->max =
4153 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4154 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4155 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4156 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4157 break;
4158
4159 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4160 channels->min = channels->max =
4161 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4162 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4163 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4164 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4165 break;
4166
4167 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4168 channels->min = channels->max =
4169 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4170 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4171 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4172 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4173 break;
4174
4175 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4176 channels->min = channels->max =
4177 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4178 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4179 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4180 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4181 break;
4182
4183 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4184 channels->min = channels->max =
4185 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4186 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4187 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4188 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4189 break;
4190
4191 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4192 channels->min = channels->max =
4193 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4194 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4195 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4196 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4197 break;
4198
4199 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4200 channels->min = channels->max =
4201 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4202 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4203 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4204 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4205 break;
4206
4207
4208 case MSM_BACKEND_DAI_AUXPCM_RX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_AUXPCM_TX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4242 break;
4243
4244 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4251 break;
4252
4253 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4265 rate->min = rate->max =
4266 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4267 channels->min = channels->max =
4268 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4273 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4274 rate->min = rate->max =
4275 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4276 channels->min = channels->max =
4277 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4278 break;
4279
4280 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4281 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4282 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4283 rate->min = rate->max =
4284 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4285 channels->min = channels->max =
4286 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4291 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4292 rate->min = rate->max =
4293 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4294 channels->min = channels->max =
4295 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4296 break;
4297
4298 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4301 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4302 channels->min = channels->max =
4303 mi2s_rx_cfg[PRIM_MI2S].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4309 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4310 channels->min = channels->max =
4311 mi2s_tx_cfg[PRIM_MI2S].channels;
4312 break;
4313
4314 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4315 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4316 mi2s_rx_cfg[SEC_MI2S].bit_format);
4317 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4318 channels->min = channels->max =
4319 mi2s_rx_cfg[SEC_MI2S].channels;
4320 break;
4321
4322 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4323 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4324 mi2s_tx_cfg[SEC_MI2S].bit_format);
4325 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4326 channels->min = channels->max =
4327 mi2s_tx_cfg[SEC_MI2S].channels;
4328 break;
4329
4330 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4332 mi2s_rx_cfg[TERT_MI2S].bit_format);
4333 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4334 channels->min = channels->max =
4335 mi2s_rx_cfg[TERT_MI2S].channels;
4336 break;
4337
4338 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4339 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4340 mi2s_tx_cfg[TERT_MI2S].bit_format);
4341 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4342 channels->min = channels->max =
4343 mi2s_tx_cfg[TERT_MI2S].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4349 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4350 channels->min = channels->max =
4351 mi2s_rx_cfg[QUAT_MI2S].channels;
4352 break;
4353
4354 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4357 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4358 channels->min = channels->max =
4359 mi2s_tx_cfg[QUAT_MI2S].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4365 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4366 channels->min = channels->max =
4367 mi2s_rx_cfg[QUIN_MI2S].channels;
4368 break;
4369
4370 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4373 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4374 channels->min = channels->max =
4375 mi2s_tx_cfg[QUIN_MI2S].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4379 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4380 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4381 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4382 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4383 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4385 cdc_dma_rx_cfg[idx].bit_format);
4386 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4387 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4388 break;
4389
4390 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4391 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4392 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4393 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
4394 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4395 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4396 cdc_dma_tx_cfg[idx].bit_format);
4397 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4398 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4399 break;
4400
4401 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4402 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4403 SNDRV_PCM_FORMAT_S32_LE);
4404 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4405 channels->min = channels->max = msm_vi_feed_tx_ch;
4406 break;
4407
4408 default:
4409 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4410 break;
4411 }
4412
4413done:
4414 return rc;
4415}
4416
4417static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4418{
4419 int value = 0;
4420 bool ret = 0;
4421 struct snd_soc_card *card = codec->component.card;
4422 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4423 struct pinctrl_state *en2_pinctrl_active;
4424 struct pinctrl_state *en2_pinctrl_sleep;
4425
4426 if (!pdata->usbc_en2_gpio_p) {
4427 if (active) {
4428 /* if active and usbc_en2_gpio undefined, get pin */
4429 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4430 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4431 dev_err(card->dev,
4432 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4433 __func__,
4434 PTR_ERR(pdata->usbc_en2_gpio_p));
4435 pdata->usbc_en2_gpio_p = NULL;
4436 return false;
4437 }
4438 } else {
4439 /* if not active and usbc_en2_gpio undefined, return */
4440 return false;
4441 }
4442 }
4443
4444 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4445 "qcom,usbc-analog-en2-gpio", 0);
4446 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4447 dev_err(card->dev, "%s, property %s not in node %s",
4448 __func__, "qcom,usbc-analog-en2-gpio",
4449 card->dev->of_node->full_name);
4450 return false;
4451 }
4452
4453 en2_pinctrl_active = pinctrl_lookup_state(
4454 pdata->usbc_en2_gpio_p, "aud_active");
4455 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4456 dev_err(card->dev,
4457 "%s: Cannot get aud_active pinctrl state:%ld\n",
4458 __func__, PTR_ERR(en2_pinctrl_active));
4459 ret = false;
4460 goto err_lookup_state;
4461 }
4462
4463 en2_pinctrl_sleep = pinctrl_lookup_state(
4464 pdata->usbc_en2_gpio_p, "aud_sleep");
4465 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4466 dev_err(card->dev,
4467 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4468 __func__, PTR_ERR(en2_pinctrl_sleep));
4469 ret = false;
4470 goto err_lookup_state;
4471 }
4472
4473 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4474 if (active) {
4475 dev_dbg(codec->dev, "%s: enter\n", __func__);
4476 if (pdata->usbc_en2_gpio_p) {
4477 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4478 if (value)
4479 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4480 en2_pinctrl_sleep);
4481 else
4482 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4483 en2_pinctrl_active);
4484 } else if (pdata->usbc_en2_gpio >= 0) {
4485 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4486 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4487 }
4488 pr_debug("%s: swap select switch %d to %d\n", __func__,
4489 value, !value);
4490 ret = true;
4491 } else {
4492 /* if not active, release usbc_en2_gpio_p pin */
4493 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4494 en2_pinctrl_sleep);
4495 }
4496
4497err_lookup_state:
4498 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4499 pdata->usbc_en2_gpio_p = NULL;
4500 return ret;
4501}
4502
4503static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4504{
4505 int value = 0;
4506 bool ret = false;
4507 struct snd_soc_card *card;
4508 struct msm_asoc_mach_data *pdata;
4509
4510 if (!codec) {
4511 pr_err("%s codec is NULL\n", __func__);
4512 return false;
4513 }
4514 card = codec->component.card;
4515 pdata = snd_soc_card_get_drvdata(card);
4516
4517 if (!pdata)
4518 return false;
4519
4520 if (wcd_mbhc_cfg.enable_usbc_analog)
4521 return msm_usbc_swap_gnd_mic(codec, active);
4522
4523 /* if usbc is not defined, swap using us_euro_gpio_p */
4524 if (pdata->us_euro_gpio_p) {
4525 value = msm_cdc_pinctrl_get_state(
4526 pdata->us_euro_gpio_p);
4527 if (value)
4528 msm_cdc_pinctrl_select_sleep_state(
4529 pdata->us_euro_gpio_p);
4530 else
4531 msm_cdc_pinctrl_select_active_state(
4532 pdata->us_euro_gpio_p);
4533 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4534 __func__, value, !value);
4535 ret = true;
4536 }
4537 return ret;
4538}
4539
4540static int msm_afe_set_config(struct snd_soc_codec *codec)
4541{
4542 int ret = 0;
4543 void *config_data = NULL;
4544
4545 if (!msm_codec_fn.get_afe_config_fn) {
4546 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4547 __func__);
4548 return -EINVAL;
4549 }
4550
4551 config_data = msm_codec_fn.get_afe_config_fn(codec,
4552 AFE_CDC_REGISTERS_CONFIG);
4553 if (config_data) {
4554 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4555 if (ret) {
4556 dev_err(codec->dev,
4557 "%s: Failed to set codec registers config %d\n",
4558 __func__, ret);
4559 return ret;
4560 }
4561 }
4562
4563 config_data = msm_codec_fn.get_afe_config_fn(codec,
4564 AFE_CDC_REGISTER_PAGE_CONFIG);
4565 if (config_data) {
4566 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4567 0);
4568 if (ret)
4569 dev_err(codec->dev,
4570 "%s: Failed to set cdc register page config\n",
4571 __func__);
4572 }
4573
4574 config_data = msm_codec_fn.get_afe_config_fn(codec,
4575 AFE_SLIMBUS_SLAVE_CONFIG);
4576 if (config_data) {
4577 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4578 if (ret) {
4579 dev_err(codec->dev,
4580 "%s: Failed to set slimbus slave config %d\n",
4581 __func__, ret);
4582 return ret;
4583 }
4584 }
4585
4586 return 0;
4587}
4588
4589static void msm_afe_clear_config(void)
4590{
4591 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4592 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4593}
4594
4595static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4596 struct snd_card *card)
4597{
4598 int ret = 0;
4599 unsigned long timeout;
4600 int adsp_ready = 0;
4601 bool snd_card_online = 0;
4602
4603 timeout = jiffies +
4604 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4605
4606 do {
4607 if (!snd_card_online) {
4608 snd_card_online = snd_card_is_online_state(card);
4609 pr_debug("%s: Sound card is %s\n", __func__,
4610 snd_card_online ? "Online" : "Offline");
4611 }
4612 if (!adsp_ready) {
4613 adsp_ready = q6core_is_adsp_ready();
4614 pr_debug("%s: ADSP Audio is %s\n", __func__,
4615 adsp_ready ? "ready" : "not ready");
4616 }
4617 if (snd_card_online && adsp_ready)
4618 break;
4619
4620 /*
4621 * Sound card/ADSP will be coming up after subsystem restart and
4622 * it might not be fully up when the control reaches
4623 * here. So, wait for 50msec before checking ADSP state
4624 */
4625 msleep(50);
4626 } while (time_after(timeout, jiffies));
4627
4628 if (!snd_card_online || !adsp_ready) {
4629 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4630 __func__,
4631 snd_card_online ? "Online" : "Offline",
4632 adsp_ready ? "ready" : "not ready");
4633 ret = -ETIMEDOUT;
4634 goto err;
4635 }
4636
4637 ret = msm_afe_set_config(codec);
4638 if (ret)
4639 pr_err("%s: Failed to set AFE config. err %d\n",
4640 __func__, ret);
4641
4642 return 0;
4643
4644err:
4645 return ret;
4646}
4647
4648static int sm6150_notifier_service_cb(struct notifier_block *this,
4649 unsigned long opcode, void *ptr)
4650{
4651 int ret;
4652 struct snd_soc_card *card = NULL;
4653 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4654 struct snd_soc_pcm_runtime *rtd;
4655 struct snd_soc_codec *codec;
4656
4657 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4658
4659 switch (opcode) {
4660 case AUDIO_NOTIFIER_SERVICE_DOWN:
4661 /*
4662 * Use flag to ignore initial boot notifications
4663 * On initial boot msm_adsp_power_up_config is
4664 * called on init. There is no need to clear
4665 * and set the config again on initial boot.
4666 */
4667 if (is_initial_boot)
4668 break;
4669 msm_afe_clear_config();
4670 break;
4671 case AUDIO_NOTIFIER_SERVICE_UP:
4672 if (is_initial_boot) {
4673 is_initial_boot = false;
4674 break;
4675 }
4676 if (!spdev)
4677 return -EINVAL;
4678
4679 card = platform_get_drvdata(spdev);
4680 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4681 if (!rtd) {
4682 dev_err(card->dev,
4683 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4684 __func__, be_dl_name);
4685 ret = -EINVAL;
4686 goto err;
4687 }
4688 codec = rtd->codec;
4689
4690 ret = msm_adsp_power_up_config(codec, card->snd_card);
4691 if (ret < 0) {
4692 dev_err(card->dev,
4693 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4694 __func__, ret);
4695 goto err;
4696 }
4697 break;
4698 default:
4699 break;
4700 }
4701err:
4702 return NOTIFY_OK;
4703}
4704
4705static struct notifier_block service_nb = {
4706 .notifier_call = sm6150_notifier_service_cb,
4707 .priority = -INT_MAX,
4708};
4709
4710static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4711{
4712 int ret = 0;
4713 void *config_data;
4714 struct snd_soc_codec *codec = rtd->codec;
4715 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4716 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4717 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4718 struct snd_soc_component *aux_comp;
4719 struct snd_card *card;
4720 struct snd_info_entry *entry;
4721 struct msm_asoc_mach_data *pdata =
4722 snd_soc_card_get_drvdata(rtd->card);
4723
4724 /*
4725 * Codec SLIMBUS configuration
4726 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4727 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4728 * TX14, TX15, TX16
4729 */
4730 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4731 150, 151};
4732 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4733 134, 135, 136, 137, 138, 139,
4734 140, 141, 142, 143};
4735
4736 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4737
4738 rtd->pmdown_time = 0;
4739
4740 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4741 ARRAY_SIZE(msm_tavil_snd_controls));
4742 if (ret < 0) {
4743 pr_err("%s: add_codec_controls failed, err %d\n",
4744 __func__, ret);
4745 return ret;
4746 }
4747
4748 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4749 ARRAY_SIZE(msm_common_snd_controls));
4750 if (ret < 0) {
4751 pr_err("%s: add_codec_controls failed, err %d\n",
4752 __func__, ret);
4753 return ret;
4754 }
4755
4756 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4757 ARRAY_SIZE(msm_dapm_widgets_tavil));
4758
4759 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4760 ARRAY_SIZE(wcd_audio_paths_tavil));
4761
4762 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4763 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4764 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4765 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4766 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4767 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4770 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4771 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4772 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4773 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4774 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4775 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4776 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4777 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4778 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4779 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4780 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4781 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4782 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4783 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4784 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4785 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4786 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4787 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4788 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4789
4790 snd_soc_dapm_sync(dapm);
4791
4792 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4793 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4794
4795 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4796
4797 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4798 if (ret) {
4799 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4800 goto err;
4801 }
4802
4803 config_data = msm_codec_fn.get_afe_config_fn(codec,
4804 AFE_AANC_VERSION);
4805 if (config_data) {
4806 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4807 if (ret) {
4808 pr_err("%s: Failed to set aanc version %d\n",
4809 __func__, ret);
4810 goto err;
4811 }
4812 }
4813
4814 /*
4815 * Send speaker configuration only for WSA8810.
4816 * Default configuration is for WSA8815.
4817 */
4818 pr_debug("%s: Number of aux devices: %d\n",
4819 __func__, rtd->card->num_aux_devs);
4820 if (rtd->card->num_aux_devs &&
4821 !list_empty(&rtd->card->aux_comp_list)) {
4822 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4823 struct snd_soc_component, card_aux_list);
4824 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4825 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4826 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4827 tavil_set_spkr_gain_offset(rtd->codec,
4828 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4829 }
4830 }
4831
4832 card = rtd->card->snd_card;
4833 entry = snd_info_create_subdir(card->module, "codecs",
4834 card->proc_root);
4835 if (!entry) {
4836 pr_debug("%s: Cannot create codecs module entry\n",
4837 __func__);
4838 ret = 0;
4839 goto err;
4840 }
4841 pdata->codec_root = entry;
4842 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4843
4844 codec_reg_done = true;
4845 return 0;
4846err:
4847 return ret;
4848}
4849
4850static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4851{
4852 int ret = 0;
4853 struct snd_soc_codec *codec = rtd->codec;
4854 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4855 struct snd_card *card;
4856 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304857 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304858 struct msm_asoc_mach_data *pdata =
4859 snd_soc_card_get_drvdata(rtd->card);
4860
4861 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4862 ARRAY_SIZE(msm_int_snd_controls));
4863 if (ret < 0) {
4864 pr_err("%s: add_codec_controls failed: %d\n",
4865 __func__, ret);
4866 return ret;
4867 }
4868 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4869 ARRAY_SIZE(msm_common_snd_controls));
4870 if (ret < 0) {
4871 pr_err("%s: add common snd controls failed: %d\n",
4872 __func__, ret);
4873 return ret;
4874 }
4875
4876 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4877 ARRAY_SIZE(msm_int_dapm_widgets));
4878
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304879 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304880 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4881 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4882 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304883
4884 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4885 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4886 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4887 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4888
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304889 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4890 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4891 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4892 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304893
4894 snd_soc_dapm_sync(dapm);
4895
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304896 /*
4897 * Send speaker configuration only for WSA8810.
4898 * Default configuration is for WSA8815.
4899 */
4900 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4901 __func__, rtd->card->num_aux_devs);
4902 if (rtd->card->num_aux_devs &&
4903 !list_empty(&rtd->card->component_dev_list)) {
4904 aux_comp = list_first_entry(
4905 &rtd->card->component_dev_list,
4906 struct snd_soc_component,
4907 card_aux_list);
4908 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4909 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4910 wsa_macro_set_spkr_mode(rtd->codec,
4911 WSA_MACRO_SPKR_MODE_1);
4912 wsa_macro_set_spkr_gain_offset(rtd->codec,
4913 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4914 }
4915 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304916 card = rtd->card->snd_card;
4917 entry = snd_info_create_subdir(card->module, "codecs",
4918 card->proc_root);
4919 if (!entry) {
4920 pr_debug("%s: Cannot create codecs module entry\n",
4921 __func__);
4922 ret = 0;
4923 goto err;
4924 }
4925 pdata->codec_root = entry;
4926 bolero_info_create_codec_entry(pdata->codec_root, codec);
4927 codec_reg_done = true;
4928 return 0;
4929err:
4930 return ret;
4931}
4932
4933static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4934{
4935 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4936 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4937 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4938
4939 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4940 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4941}
4942
4943static void *def_wcd_mbhc_cal(void)
4944{
4945 void *wcd_mbhc_cal;
4946 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4947 u16 *btn_high;
4948
4949 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4950 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4951 if (!wcd_mbhc_cal)
4952 return NULL;
4953
4954#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4955 S(v_hs_max, 1600);
4956#undef S
4957#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4958 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4959#undef S
4960
4961 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4962 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4963 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4964
4965 btn_high[0] = 75;
4966 btn_high[1] = 150;
4967 btn_high[2] = 237;
4968 btn_high[3] = 500;
4969 btn_high[4] = 500;
4970 btn_high[5] = 500;
4971 btn_high[6] = 500;
4972 btn_high[7] = 500;
4973
4974 return wcd_mbhc_cal;
4975}
4976
4977static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4978 struct snd_pcm_hw_params *params)
4979{
4980 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4981 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4982 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4983 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4984
4985 int ret = 0;
4986 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4987 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4988 u32 user_set_tx_ch = 0;
4989 u32 rx_ch_count;
4990
4991 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4992 ret = snd_soc_dai_get_channel_map(codec_dai,
4993 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4994 if (ret < 0) {
4995 pr_err("%s: failed to get codec chan map, err:%d\n",
4996 __func__, ret);
4997 goto err;
4998 }
4999 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5000 pr_debug("%s: rx_5_ch=%d\n", __func__,
5001 slim_rx_cfg[5].channels);
5002 rx_ch_count = slim_rx_cfg[5].channels;
5003 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5004 pr_debug("%s: rx_2_ch=%d\n", __func__,
5005 slim_rx_cfg[2].channels);
5006 rx_ch_count = slim_rx_cfg[2].channels;
5007 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5008 pr_debug("%s: rx_6_ch=%d\n", __func__,
5009 slim_rx_cfg[6].channels);
5010 rx_ch_count = slim_rx_cfg[6].channels;
5011 } else {
5012 pr_debug("%s: rx_0_ch=%d\n", __func__,
5013 slim_rx_cfg[0].channels);
5014 rx_ch_count = slim_rx_cfg[0].channels;
5015 }
5016 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5017 rx_ch_count, rx_ch);
5018 if (ret < 0) {
5019 pr_err("%s: failed to set cpu chan map, err:%d\n",
5020 __func__, ret);
5021 goto err;
5022 }
5023 } else {
5024
5025 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5026 codec_dai->name, codec_dai->id, user_set_tx_ch);
5027 ret = snd_soc_dai_get_channel_map(codec_dai,
5028 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5029 if (ret < 0) {
5030 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5031 __func__, ret);
5032 goto err;
5033 }
5034 /* For <codec>_tx1 case */
5035 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5036 user_set_tx_ch = slim_tx_cfg[0].channels;
5037 /* For <codec>_tx3 case */
5038 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5039 user_set_tx_ch = slim_tx_cfg[1].channels;
5040 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5041 user_set_tx_ch = msm_vi_feed_tx_ch;
5042 else
5043 user_set_tx_ch = tx_ch_cnt;
5044
5045 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5046 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5047 tx_ch_cnt, dai_link->id);
5048
5049 ret = snd_soc_dai_set_channel_map(cpu_dai,
5050 user_set_tx_ch, tx_ch, 0, 0);
5051 if (ret < 0)
5052 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5053 __func__, ret);
5054 }
5055
5056err:
5057 return ret;
5058}
5059
5060
5061static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5062 struct snd_pcm_hw_params *params)
5063{
5064 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5065 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5066 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5067 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5068
5069 int ret = 0;
5070 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5071 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5072 u32 user_set_tx_ch = 0;
5073 u32 user_set_rx_ch = 0;
5074 u32 ch_id;
5075
5076 ret = snd_soc_dai_get_channel_map(codec_dai,
5077 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5078 &rx_ch_cdc_dma);
5079 if (ret < 0) {
5080 pr_err("%s: failed to get codec chan map, err:%d\n",
5081 __func__, ret);
5082 goto err;
5083 }
5084
5085 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5086 switch (dai_link->id) {
5087 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5088 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5089 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5090 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5091 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5093 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5095 {
5096 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5097 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5098 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5099 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5100 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5101 user_set_rx_ch, &rx_ch_cdc_dma);
5102 if (ret < 0) {
5103 pr_err("%s: failed to set cpu chan map, err:%d\n",
5104 __func__, ret);
5105 goto err;
5106 }
5107
5108 }
5109 break;
5110 }
5111 } else {
5112 switch (dai_link->id) {
5113 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5114 {
5115 user_set_tx_ch = msm_vi_feed_tx_ch;
5116 }
5117 break;
5118 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5119 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5120 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
5121 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
5122 {
5123 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5124 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5125 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5126 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5127 }
5128 break;
5129 }
5130
5131 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5132 &tx_ch_cdc_dma, 0, 0);
5133 if (ret < 0) {
5134 pr_err("%s: failed to set cpu chan map, err:%d\n",
5135 __func__, ret);
5136 goto err;
5137 }
5138 }
5139
5140err:
5141 return ret;
5142}
5143
5144static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5145 struct snd_pcm_hw_params *params)
5146{
5147 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5148 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5149 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5150 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5151 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5152 unsigned int num_tx_ch = 0;
5153 unsigned int num_rx_ch = 0;
5154 int ret = 0;
5155
5156 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5157 num_rx_ch = params_channels(params);
5158 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5159 codec_dai->name, codec_dai->id, num_rx_ch);
5160 ret = snd_soc_dai_get_channel_map(codec_dai,
5161 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5162 if (ret < 0) {
5163 pr_err("%s: failed to get codec chan map, err:%d\n",
5164 __func__, ret);
5165 goto err;
5166 }
5167 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5168 num_rx_ch, rx_ch);
5169 if (ret < 0) {
5170 pr_err("%s: failed to set cpu chan map, err:%d\n",
5171 __func__, ret);
5172 goto err;
5173 }
5174 } else {
5175 num_tx_ch = params_channels(params);
5176 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5177 codec_dai->name, codec_dai->id, num_tx_ch);
5178 ret = snd_soc_dai_get_channel_map(codec_dai,
5179 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5180 if (ret < 0) {
5181 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5182 __func__, ret);
5183 goto err;
5184 }
5185 ret = snd_soc_dai_set_channel_map(cpu_dai,
5186 num_tx_ch, tx_ch, 0, 0);
5187 if (ret < 0) {
5188 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5189 __func__, ret);
5190 goto err;
5191 }
5192 }
5193
5194err:
5195 return ret;
5196}
5197
5198static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5199 struct snd_pcm_hw_params *params)
5200{
5201 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5202 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5203 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5204 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5205 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5206 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5207 int ret;
5208
5209 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5210 codec_dai->name, codec_dai->id);
5211 ret = snd_soc_dai_get_channel_map(codec_dai,
5212 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5213 if (ret) {
5214 dev_err(rtd->dev,
5215 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5216 __func__, ret);
5217 goto err;
5218 }
5219
5220 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5221 __func__, tx_ch_cnt, dai_link->id);
5222
5223 ret = snd_soc_dai_set_channel_map(cpu_dai,
5224 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5225 if (ret)
5226 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5227 __func__, ret);
5228
5229err:
5230 return ret;
5231}
5232
5233static int msm_get_port_id(int be_id)
5234{
5235 int afe_port_id;
5236
5237 switch (be_id) {
5238 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5239 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5240 break;
5241 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5242 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5243 break;
5244 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5245 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5246 break;
5247 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5248 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5249 break;
5250 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5251 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5252 break;
5253 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5254 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5255 break;
5256 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5257 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5258 break;
5259 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5260 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5261 break;
5262 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5263 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5264 break;
5265 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5266 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5267 break;
5268 default:
5269 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5270 afe_port_id = -EINVAL;
5271 }
5272
5273 return afe_port_id;
5274}
5275
5276static u32 get_mi2s_bits_per_sample(u32 bit_format)
5277{
5278 u32 bit_per_sample;
5279
5280 switch (bit_format) {
5281 case SNDRV_PCM_FORMAT_S32_LE:
5282 case SNDRV_PCM_FORMAT_S24_3LE:
5283 case SNDRV_PCM_FORMAT_S24_LE:
5284 bit_per_sample = 32;
5285 break;
5286 case SNDRV_PCM_FORMAT_S16_LE:
5287 default:
5288 bit_per_sample = 16;
5289 break;
5290 }
5291
5292 return bit_per_sample;
5293}
5294
5295static void update_mi2s_clk_val(int dai_id, int stream)
5296{
5297 u32 bit_per_sample;
5298
5299 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5300 bit_per_sample =
5301 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5302 mi2s_clk[dai_id].clk_freq_in_hz =
5303 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5304 } else {
5305 bit_per_sample =
5306 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5307 mi2s_clk[dai_id].clk_freq_in_hz =
5308 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5309 }
5310}
5311
5312static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5313{
5314 int ret = 0;
5315 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5316 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5317 int port_id = 0;
5318 int index = cpu_dai->id;
5319
5320 port_id = msm_get_port_id(rtd->dai_link->id);
5321 if (port_id < 0) {
5322 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5323 ret = port_id;
5324 goto err;
5325 }
5326
5327 if (enable) {
5328 update_mi2s_clk_val(index, substream->stream);
5329 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5330 mi2s_clk[index].clk_freq_in_hz);
5331 }
5332
5333 mi2s_clk[index].enable = enable;
5334 ret = afe_set_lpass_clock_v2(port_id,
5335 &mi2s_clk[index]);
5336 if (ret < 0) {
5337 dev_err(rtd->card->dev,
5338 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5339 __func__, port_id, ret);
5340 goto err;
5341 }
5342
5343err:
5344 return ret;
5345}
5346
5347static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5348 enum pinctrl_pin_state new_state)
5349{
5350 int ret = 0;
5351 int curr_state = 0;
5352
5353 if (pinctrl_info == NULL) {
5354 pr_err("%s: pinctrl_info is NULL\n", __func__);
5355 ret = -EINVAL;
5356 goto err;
5357 }
5358
5359 if (pinctrl_info->pinctrl == NULL) {
5360 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5361 ret = -EINVAL;
5362 goto err;
5363 }
5364
5365 curr_state = pinctrl_info->curr_state;
5366 pinctrl_info->curr_state = new_state;
5367 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5368 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5369
5370 if (curr_state == pinctrl_info->curr_state) {
5371 pr_debug("%s: Already in same state\n", __func__);
5372 goto err;
5373 }
5374
5375 if (curr_state != STATE_DISABLE &&
5376 pinctrl_info->curr_state != STATE_DISABLE) {
5377 pr_debug("%s: state already active cannot switch\n", __func__);
5378 ret = -EIO;
5379 goto err;
5380 }
5381
5382 switch (pinctrl_info->curr_state) {
5383 case STATE_MI2S_ACTIVE:
5384 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5385 pinctrl_info->mi2s_active);
5386 if (ret) {
5387 pr_err("%s: MI2S state select failed with %d\n",
5388 __func__, ret);
5389 ret = -EIO;
5390 goto err;
5391 }
5392 break;
5393 case STATE_TDM_ACTIVE:
5394 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5395 pinctrl_info->tdm_active);
5396 if (ret) {
5397 pr_err("%s: TDM state select failed with %d\n",
5398 __func__, ret);
5399 ret = -EIO;
5400 goto err;
5401 }
5402 break;
5403 case STATE_DISABLE:
5404 if (curr_state == STATE_MI2S_ACTIVE) {
5405 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5406 pinctrl_info->mi2s_disable);
5407 } else {
5408 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5409 pinctrl_info->tdm_disable);
5410 }
5411 if (ret) {
5412 pr_err("%s: state disable failed with %d\n",
5413 __func__, ret);
5414 ret = -EIO;
5415 goto err;
5416 }
5417 break;
5418 default:
5419 pr_err("%s: TLMM pin state is invalid\n", __func__);
5420 return -EINVAL;
5421 }
5422
5423err:
5424 return ret;
5425}
5426
5427static int msm_get_pinctrl(struct platform_device *pdev)
5428{
5429 struct snd_soc_card *card = platform_get_drvdata(pdev);
5430 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5431 struct msm_pinctrl_info *pinctrl_info = NULL;
5432 struct pinctrl *pinctrl;
5433 int ret = 0;
5434
5435 pinctrl_info = &pdata->pinctrl_info;
5436
5437 if (pinctrl_info == NULL) {
5438 pr_err("%s: pinctrl_info is NULL\n", __func__);
5439 return -EINVAL;
5440 }
5441
5442 pinctrl = devm_pinctrl_get(&pdev->dev);
5443 if (IS_ERR_OR_NULL(pinctrl)) {
5444 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5445 return -EINVAL;
5446 }
5447 pinctrl_info->pinctrl = pinctrl;
5448
5449 /* get all the states handles from Device Tree */
5450 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5451 "quat-mi2s-sleep");
5452 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5453 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5454 goto err;
5455 }
5456 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5457 "quat-mi2s-active");
5458 if (IS_ERR(pinctrl_info->mi2s_active)) {
5459 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5460 goto err;
5461 }
5462 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5463 "quat-tdm-sleep");
5464 if (IS_ERR(pinctrl_info->tdm_disable)) {
5465 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5466 goto err;
5467 }
5468 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5469 "quat-tdm-active");
5470 if (IS_ERR(pinctrl_info->tdm_active)) {
5471 pr_err("%s: could not get tdm_active pinstate\n",
5472 __func__);
5473 goto err;
5474 }
5475 /* Reset the TLMM pins to a default state */
5476 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5477 pinctrl_info->mi2s_disable);
5478 if (ret != 0) {
5479 pr_err("%s: Disable TLMM pins failed with %d\n",
5480 __func__, ret);
5481 ret = -EIO;
5482 goto err;
5483 }
5484 pinctrl_info->curr_state = STATE_DISABLE;
5485
5486 return 0;
5487
5488err:
5489 devm_pinctrl_put(pinctrl);
5490 pinctrl_info->pinctrl = NULL;
5491 return -EINVAL;
5492}
5493
5494static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5495 struct snd_pcm_hw_params *params)
5496{
5497 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5498 struct snd_interval *rate = hw_param_interval(params,
5499 SNDRV_PCM_HW_PARAM_RATE);
5500 struct snd_interval *channels = hw_param_interval(params,
5501 SNDRV_PCM_HW_PARAM_CHANNELS);
5502
5503 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5504 channels->min = channels->max =
5505 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5506 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5507 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5508 rate->min = rate->max =
5509 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5510 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5511 channels->min = channels->max =
5512 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5513 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5514 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5515 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5516 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5517 channels->min = channels->max =
5518 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5519 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5520 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5521 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5522 } else {
5523 pr_err("%s: dai id 0x%x not supported\n",
5524 __func__, cpu_dai->id);
5525 return -EINVAL;
5526 }
5527
5528 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5529 __func__, cpu_dai->id, channels->max, rate->max,
5530 params_format(params));
5531
5532 return 0;
5533}
5534
5535static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5536 struct snd_pcm_hw_params *params)
5537{
5538 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5539 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5540 int ret = 0;
5541 int slot_width = 32;
5542 int channels, slots;
5543 unsigned int slot_mask, rate, clk_freq;
5544 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5545
5546 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5547
5548 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5549 switch (cpu_dai->id) {
5550 case AFE_PORT_ID_PRIMARY_TDM_RX:
5551 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5552 break;
5553 case AFE_PORT_ID_SECONDARY_TDM_RX:
5554 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5555 break;
5556 case AFE_PORT_ID_TERTIARY_TDM_RX:
5557 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5558 break;
5559 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5560 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5561 break;
5562 case AFE_PORT_ID_QUINARY_TDM_RX:
5563 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5564 break;
5565 case AFE_PORT_ID_PRIMARY_TDM_TX:
5566 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5567 break;
5568 case AFE_PORT_ID_SECONDARY_TDM_TX:
5569 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5570 break;
5571 case AFE_PORT_ID_TERTIARY_TDM_TX:
5572 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5573 break;
5574 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5575 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5576 break;
5577 case AFE_PORT_ID_QUINARY_TDM_TX:
5578 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5579 break;
5580
5581 default:
5582 pr_err("%s: dai id 0x%x not supported\n",
5583 __func__, cpu_dai->id);
5584 return -EINVAL;
5585 }
5586
5587 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5588 /*2 slot config - bits 0 and 1 set for the first two slots */
5589 slot_mask = 0x0000FFFF >> (16-slots);
5590 channels = slots;
5591
5592 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5593 __func__, slot_width, slots);
5594
5595 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5596 slots, slot_width);
5597 if (ret < 0) {
5598 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5599 __func__, ret);
5600 goto end;
5601 }
5602
5603 ret = snd_soc_dai_set_channel_map(cpu_dai,
5604 0, NULL, channels, slot_offset);
5605 if (ret < 0) {
5606 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5607 __func__, ret);
5608 goto end;
5609 }
5610 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5611 /*2 slot config - bits 0 and 1 set for the first two slots */
5612 slot_mask = 0x0000FFFF >> (16-slots);
5613 channels = slots;
5614
5615 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5616 __func__, slot_width, slots);
5617
5618 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5619 slots, slot_width);
5620 if (ret < 0) {
5621 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5622 __func__, ret);
5623 goto end;
5624 }
5625
5626 ret = snd_soc_dai_set_channel_map(cpu_dai,
5627 channels, slot_offset, 0, NULL);
5628 if (ret < 0) {
5629 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5630 __func__, ret);
5631 goto end;
5632 }
5633 } else {
5634 ret = -EINVAL;
5635 pr_err("%s: invalid use case, err:%d\n",
5636 __func__, ret);
5637 goto end;
5638 }
5639
5640 rate = params_rate(params);
5641 clk_freq = rate * slot_width * slots;
5642 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5643 if (ret < 0)
5644 pr_err("%s: failed to set tdm clk, err:%d\n",
5645 __func__, ret);
5646
5647end:
5648 return ret;
5649}
5650
5651static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5652{
5653 int ret = 0;
5654 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5655 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5656 struct snd_soc_card *card = rtd->card;
5657 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5658 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5659
5660 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5661 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5662 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5663 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5664 if (ret)
5665 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5666 __func__, ret);
5667 }
5668
5669 return ret;
5670}
5671
5672static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5673{
5674 int ret = 0;
5675 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5676 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5677 struct snd_soc_card *card = rtd->card;
5678 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5679 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5680
5681 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5682 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5683 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5684 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5685 if (ret)
5686 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5687 __func__, ret);
5688 }
5689}
5690
5691static struct snd_soc_ops sm6150_tdm_be_ops = {
5692 .hw_params = sm6150_tdm_snd_hw_params,
5693 .startup = sm6150_tdm_snd_startup,
5694 .shutdown = sm6150_tdm_snd_shutdown
5695};
5696
5697static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5698{
5699 cpumask_t mask;
5700
5701 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5702 pm_qos_remove_request(&substream->latency_pm_qos_req);
5703
5704 cpumask_clear(&mask);
5705 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5706 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5707 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5708
5709 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5710
5711 pm_qos_add_request(&substream->latency_pm_qos_req,
5712 PM_QOS_CPU_DMA_LATENCY,
5713 MSM_LL_QOS_VALUE);
5714 return 0;
5715}
5716
5717static struct snd_soc_ops msm_fe_qos_ops = {
5718 .prepare = msm_fe_qos_prepare,
5719};
5720
5721static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5722{
5723 int ret = 0;
5724 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5725 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5726 int index = cpu_dai->id;
5727 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5728 struct snd_soc_card *card = rtd->card;
5729 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5730 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5731 int ret_pinctrl = 0;
5732
5733 dev_dbg(rtd->card->dev,
5734 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5735 __func__, substream->name, substream->stream,
5736 cpu_dai->name, cpu_dai->id);
5737
5738 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5739 ret = -EINVAL;
5740 dev_err(rtd->card->dev,
5741 "%s: CPU DAI id (%d) out of range\n",
5742 __func__, cpu_dai->id);
5743 goto err;
5744 }
5745 /*
5746 * Mutex protection in case the same MI2S
5747 * interface using for both TX and RX so
5748 * that the same clock won't be enable twice.
5749 */
5750 mutex_lock(&mi2s_intf_conf[index].lock);
5751 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5752 /* Check if msm needs to provide the clock to the interface */
5753 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5754 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5755 fmt = SND_SOC_DAIFMT_CBM_CFM;
5756 }
5757 ret = msm_mi2s_set_sclk(substream, true);
5758 if (ret < 0) {
5759 dev_err(rtd->card->dev,
5760 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5761 __func__, ret);
5762 goto clean_up;
5763 }
5764
5765 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5766 if (ret < 0) {
5767 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5768 __func__, index, ret);
5769 goto clk_off;
5770 }
5771 if (index == QUAT_MI2S) {
5772 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5773 STATE_MI2S_ACTIVE);
5774 if (ret_pinctrl)
5775 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5776 __func__, ret_pinctrl);
5777 }
5778 }
5779clk_off:
5780 if (ret < 0)
5781 msm_mi2s_set_sclk(substream, false);
5782clean_up:
5783 if (ret < 0)
5784 mi2s_intf_conf[index].ref_cnt--;
5785 mutex_unlock(&mi2s_intf_conf[index].lock);
5786err:
5787 return ret;
5788}
5789
5790static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5791{
5792 int ret;
5793 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5794 int index = rtd->cpu_dai->id;
5795 struct snd_soc_card *card = rtd->card;
5796 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5797 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5798 int ret_pinctrl = 0;
5799
5800 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5801 substream->name, substream->stream);
5802 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5803 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5804 return;
5805 }
5806
5807 mutex_lock(&mi2s_intf_conf[index].lock);
5808 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5809 ret = msm_mi2s_set_sclk(substream, false);
5810 if (ret < 0)
5811 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5812 __func__, index, ret);
5813 if (index == QUAT_MI2S) {
5814 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5815 STATE_DISABLE);
5816 if (ret_pinctrl)
5817 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5818 __func__, ret_pinctrl);
5819 }
5820 }
5821 mutex_unlock(&mi2s_intf_conf[index].lock);
5822}
5823
5824static struct snd_soc_ops msm_mi2s_be_ops = {
5825 .startup = msm_mi2s_snd_startup,
5826 .shutdown = msm_mi2s_snd_shutdown,
5827};
5828
5829static struct snd_soc_ops msm_cdc_dma_be_ops = {
5830 .hw_params = msm_snd_cdc_dma_hw_params,
5831};
5832
5833static struct snd_soc_ops msm_be_ops = {
5834 .hw_params = msm_snd_hw_params,
5835};
5836
5837static struct snd_soc_ops msm_slimbus_2_be_ops = {
5838 .hw_params = msm_slimbus_2_hw_params,
5839};
5840
5841static struct snd_soc_ops msm_wcn_ops = {
5842 .hw_params = msm_wcn_hw_params,
5843};
5844
5845
5846/* Digital audio interface glue - connects codec <---> CPU */
5847static struct snd_soc_dai_link msm_common_dai_links[] = {
5848 /* FrontEnd DAI Links */
5849 {
5850 .name = MSM_DAILINK_NAME(Media1),
5851 .stream_name = "MultiMedia1",
5852 .cpu_dai_name = "MultiMedia1",
5853 .platform_name = "msm-pcm-dsp.0",
5854 .dynamic = 1,
5855 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5856 .dpcm_playback = 1,
5857 .dpcm_capture = 1,
5858 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5859 SND_SOC_DPCM_TRIGGER_POST},
5860 .codec_dai_name = "snd-soc-dummy-dai",
5861 .codec_name = "snd-soc-dummy",
5862 .ignore_suspend = 1,
5863 /* this dainlink has playback support */
5864 .ignore_pmdown_time = 1,
5865 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5866 },
5867 {
5868 .name = MSM_DAILINK_NAME(Media2),
5869 .stream_name = "MultiMedia2",
5870 .cpu_dai_name = "MultiMedia2",
5871 .platform_name = "msm-pcm-dsp.0",
5872 .dynamic = 1,
5873 .dpcm_playback = 1,
5874 .dpcm_capture = 1,
5875 .codec_dai_name = "snd-soc-dummy-dai",
5876 .codec_name = "snd-soc-dummy",
5877 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5878 SND_SOC_DPCM_TRIGGER_POST},
5879 .ignore_suspend = 1,
5880 /* this dainlink has playback support */
5881 .ignore_pmdown_time = 1,
5882 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5883 },
5884 {
5885 .name = "VoiceMMode1",
5886 .stream_name = "VoiceMMode1",
5887 .cpu_dai_name = "VoiceMMode1",
5888 .platform_name = "msm-pcm-voice",
5889 .dynamic = 1,
5890 .dpcm_playback = 1,
5891 .dpcm_capture = 1,
5892 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5893 SND_SOC_DPCM_TRIGGER_POST},
5894 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5895 .ignore_suspend = 1,
5896 .ignore_pmdown_time = 1,
5897 .codec_dai_name = "snd-soc-dummy-dai",
5898 .codec_name = "snd-soc-dummy",
5899 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5900 },
5901 {
5902 .name = "MSM VoIP",
5903 .stream_name = "VoIP",
5904 .cpu_dai_name = "VoIP",
5905 .platform_name = "msm-voip-dsp",
5906 .dynamic = 1,
5907 .dpcm_playback = 1,
5908 .dpcm_capture = 1,
5909 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5910 SND_SOC_DPCM_TRIGGER_POST},
5911 .codec_dai_name = "snd-soc-dummy-dai",
5912 .codec_name = "snd-soc-dummy",
5913 .ignore_suspend = 1,
5914 /* this dainlink has playback support */
5915 .ignore_pmdown_time = 1,
5916 .id = MSM_FRONTEND_DAI_VOIP,
5917 },
5918 {
5919 .name = MSM_DAILINK_NAME(ULL),
5920 .stream_name = "MultiMedia3",
5921 .cpu_dai_name = "MultiMedia3",
5922 .platform_name = "msm-pcm-dsp.2",
5923 .dynamic = 1,
5924 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5925 .dpcm_playback = 1,
5926 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5927 SND_SOC_DPCM_TRIGGER_POST},
5928 .codec_dai_name = "snd-soc-dummy-dai",
5929 .codec_name = "snd-soc-dummy",
5930 .ignore_suspend = 1,
5931 /* this dainlink has playback support */
5932 .ignore_pmdown_time = 1,
5933 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5934 },
5935 /* Hostless PCM purpose */
5936 {
5937 .name = "SLIMBUS_0 Hostless",
5938 .stream_name = "SLIMBUS_0 Hostless",
5939 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5940 .platform_name = "msm-pcm-hostless",
5941 .dynamic = 1,
5942 .dpcm_playback = 1,
5943 .dpcm_capture = 1,
5944 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5945 SND_SOC_DPCM_TRIGGER_POST},
5946 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5947 .ignore_suspend = 1,
5948 /* this dailink has playback support */
5949 .ignore_pmdown_time = 1,
5950 .codec_dai_name = "snd-soc-dummy-dai",
5951 .codec_name = "snd-soc-dummy",
5952 },
5953 {
5954 .name = "MSM AFE-PCM RX",
5955 .stream_name = "AFE-PROXY RX",
5956 .cpu_dai_name = "msm-dai-q6-dev.241",
5957 .codec_name = "msm-stub-codec.1",
5958 .codec_dai_name = "msm-stub-rx",
5959 .platform_name = "msm-pcm-afe",
5960 .dpcm_playback = 1,
5961 .ignore_suspend = 1,
5962 /* this dainlink has playback support */
5963 .ignore_pmdown_time = 1,
5964 },
5965 {
5966 .name = "MSM AFE-PCM TX",
5967 .stream_name = "AFE-PROXY TX",
5968 .cpu_dai_name = "msm-dai-q6-dev.240",
5969 .codec_name = "msm-stub-codec.1",
5970 .codec_dai_name = "msm-stub-tx",
5971 .platform_name = "msm-pcm-afe",
5972 .dpcm_capture = 1,
5973 .ignore_suspend = 1,
5974 },
5975 {
5976 .name = MSM_DAILINK_NAME(Compress1),
5977 .stream_name = "Compress1",
5978 .cpu_dai_name = "MultiMedia4",
5979 .platform_name = "msm-compress-dsp",
5980 .dynamic = 1,
5981 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5982 .dpcm_playback = 1,
5983 .dpcm_capture = 1,
5984 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5985 SND_SOC_DPCM_TRIGGER_POST},
5986 .codec_dai_name = "snd-soc-dummy-dai",
5987 .codec_name = "snd-soc-dummy",
5988 .ignore_suspend = 1,
5989 .ignore_pmdown_time = 1,
5990 /* this dainlink has playback support */
5991 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5992 },
5993 {
5994 .name = "AUXPCM Hostless",
5995 .stream_name = "AUXPCM Hostless",
5996 .cpu_dai_name = "AUXPCM_HOSTLESS",
5997 .platform_name = "msm-pcm-hostless",
5998 .dynamic = 1,
5999 .dpcm_playback = 1,
6000 .dpcm_capture = 1,
6001 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6002 SND_SOC_DPCM_TRIGGER_POST},
6003 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6004 .ignore_suspend = 1,
6005 /* this dainlink has playback support */
6006 .ignore_pmdown_time = 1,
6007 .codec_dai_name = "snd-soc-dummy-dai",
6008 .codec_name = "snd-soc-dummy",
6009 },
6010 {
6011 .name = "SLIMBUS_1 Hostless",
6012 .stream_name = "SLIMBUS_1 Hostless",
6013 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6014 .platform_name = "msm-pcm-hostless",
6015 .dynamic = 1,
6016 .dpcm_playback = 1,
6017 .dpcm_capture = 1,
6018 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6019 SND_SOC_DPCM_TRIGGER_POST},
6020 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6021 .ignore_suspend = 1,
6022 /* this dailink has playback support */
6023 .ignore_pmdown_time = 1,
6024 .codec_dai_name = "snd-soc-dummy-dai",
6025 .codec_name = "snd-soc-dummy",
6026 },
6027 {
6028 .name = "SLIMBUS_3 Hostless",
6029 .stream_name = "SLIMBUS_3 Hostless",
6030 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6031 .platform_name = "msm-pcm-hostless",
6032 .dynamic = 1,
6033 .dpcm_playback = 1,
6034 .dpcm_capture = 1,
6035 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6036 SND_SOC_DPCM_TRIGGER_POST},
6037 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6038 .ignore_suspend = 1,
6039 /* this dailink has playback support */
6040 .ignore_pmdown_time = 1,
6041 .codec_dai_name = "snd-soc-dummy-dai",
6042 .codec_name = "snd-soc-dummy",
6043 },
6044 {
6045 .name = "SLIMBUS_4 Hostless",
6046 .stream_name = "SLIMBUS_4 Hostless",
6047 .cpu_dai_name = "SLIMBUS4_HOSTLESS",
6048 .platform_name = "msm-pcm-hostless",
6049 .dynamic = 1,
6050 .dpcm_playback = 1,
6051 .dpcm_capture = 1,
6052 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6053 SND_SOC_DPCM_TRIGGER_POST},
6054 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6055 .ignore_suspend = 1,
6056 /* this dailink has playback support */
6057 .ignore_pmdown_time = 1,
6058 .codec_dai_name = "snd-soc-dummy-dai",
6059 .codec_name = "snd-soc-dummy",
6060 },
6061 {
6062 .name = MSM_DAILINK_NAME(LowLatency),
6063 .stream_name = "MultiMedia5",
6064 .cpu_dai_name = "MultiMedia5",
6065 .platform_name = "msm-pcm-dsp.1",
6066 .dynamic = 1,
6067 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6068 .dpcm_playback = 1,
6069 .dpcm_capture = 1,
6070 .codec_dai_name = "snd-soc-dummy-dai",
6071 .codec_name = "snd-soc-dummy",
6072 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6073 SND_SOC_DPCM_TRIGGER_POST},
6074 .ignore_suspend = 1,
6075 /* this dainlink has playback support */
6076 .ignore_pmdown_time = 1,
6077 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6078 .ops = &msm_fe_qos_ops,
6079 },
6080 {
6081 .name = "Listen 1 Audio Service",
6082 .stream_name = "Listen 1 Audio Service",
6083 .cpu_dai_name = "LSM1",
6084 .platform_name = "msm-lsm-client",
6085 .dynamic = 1,
6086 .dpcm_capture = 1,
6087 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6088 SND_SOC_DPCM_TRIGGER_POST },
6089 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6090 .ignore_suspend = 1,
6091 .codec_dai_name = "snd-soc-dummy-dai",
6092 .codec_name = "snd-soc-dummy",
6093 .id = MSM_FRONTEND_DAI_LSM1,
6094 },
6095 /* Multiple Tunnel instances */
6096 {
6097 .name = MSM_DAILINK_NAME(Compress2),
6098 .stream_name = "Compress2",
6099 .cpu_dai_name = "MultiMedia7",
6100 .platform_name = "msm-compress-dsp",
6101 .dynamic = 1,
6102 .dpcm_playback = 1,
6103 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6104 SND_SOC_DPCM_TRIGGER_POST},
6105 .codec_dai_name = "snd-soc-dummy-dai",
6106 .codec_name = "snd-soc-dummy",
6107 .ignore_suspend = 1,
6108 .ignore_pmdown_time = 1,
6109 /* this dainlink has playback support */
6110 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6111 },
6112 {
6113 .name = MSM_DAILINK_NAME(MultiMedia10),
6114 .stream_name = "MultiMedia10",
6115 .cpu_dai_name = "MultiMedia10",
6116 .platform_name = "msm-pcm-dsp.1",
6117 .dynamic = 1,
6118 .dpcm_playback = 1,
6119 .dpcm_capture = 1,
6120 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6121 SND_SOC_DPCM_TRIGGER_POST},
6122 .codec_dai_name = "snd-soc-dummy-dai",
6123 .codec_name = "snd-soc-dummy",
6124 .ignore_suspend = 1,
6125 .ignore_pmdown_time = 1,
6126 /* this dainlink has playback support */
6127 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6128 },
6129 {
6130 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6131 .stream_name = "MM_NOIRQ",
6132 .cpu_dai_name = "MultiMedia8",
6133 .platform_name = "msm-pcm-dsp-noirq",
6134 .dynamic = 1,
6135 .dpcm_playback = 1,
6136 .dpcm_capture = 1,
6137 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6138 SND_SOC_DPCM_TRIGGER_POST},
6139 .codec_dai_name = "snd-soc-dummy-dai",
6140 .codec_name = "snd-soc-dummy",
6141 .ignore_suspend = 1,
6142 .ignore_pmdown_time = 1,
6143 /* this dainlink has playback support */
6144 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6145 .ops = &msm_fe_qos_ops,
6146 },
6147 /* HDMI Hostless */
6148 {
6149 .name = "HDMI_RX_HOSTLESS",
6150 .stream_name = "HDMI_RX_HOSTLESS",
6151 .cpu_dai_name = "HDMI_HOSTLESS",
6152 .platform_name = "msm-pcm-hostless",
6153 .dynamic = 1,
6154 .dpcm_playback = 1,
6155 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6156 SND_SOC_DPCM_TRIGGER_POST},
6157 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6158 .ignore_suspend = 1,
6159 .ignore_pmdown_time = 1,
6160 .codec_dai_name = "snd-soc-dummy-dai",
6161 .codec_name = "snd-soc-dummy",
6162 },
6163 {
6164 .name = "VoiceMMode2",
6165 .stream_name = "VoiceMMode2",
6166 .cpu_dai_name = "VoiceMMode2",
6167 .platform_name = "msm-pcm-voice",
6168 .dynamic = 1,
6169 .dpcm_playback = 1,
6170 .dpcm_capture = 1,
6171 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6172 SND_SOC_DPCM_TRIGGER_POST},
6173 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6174 .ignore_suspend = 1,
6175 .ignore_pmdown_time = 1,
6176 .codec_dai_name = "snd-soc-dummy-dai",
6177 .codec_name = "snd-soc-dummy",
6178 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6179 },
6180 /* LSM FE */
6181 {
6182 .name = "Listen 2 Audio Service",
6183 .stream_name = "Listen 2 Audio Service",
6184 .cpu_dai_name = "LSM2",
6185 .platform_name = "msm-lsm-client",
6186 .dynamic = 1,
6187 .dpcm_capture = 1,
6188 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6189 SND_SOC_DPCM_TRIGGER_POST },
6190 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6191 .ignore_suspend = 1,
6192 .codec_dai_name = "snd-soc-dummy-dai",
6193 .codec_name = "snd-soc-dummy",
6194 .id = MSM_FRONTEND_DAI_LSM2,
6195 },
6196 {
6197 .name = "Listen 3 Audio Service",
6198 .stream_name = "Listen 3 Audio Service",
6199 .cpu_dai_name = "LSM3",
6200 .platform_name = "msm-lsm-client",
6201 .dynamic = 1,
6202 .dpcm_capture = 1,
6203 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6204 SND_SOC_DPCM_TRIGGER_POST },
6205 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6206 .ignore_suspend = 1,
6207 .codec_dai_name = "snd-soc-dummy-dai",
6208 .codec_name = "snd-soc-dummy",
6209 .id = MSM_FRONTEND_DAI_LSM3,
6210 },
6211 {
6212 .name = "Listen 4 Audio Service",
6213 .stream_name = "Listen 4 Audio Service",
6214 .cpu_dai_name = "LSM4",
6215 .platform_name = "msm-lsm-client",
6216 .dynamic = 1,
6217 .dpcm_capture = 1,
6218 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6219 SND_SOC_DPCM_TRIGGER_POST },
6220 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6221 .ignore_suspend = 1,
6222 .codec_dai_name = "snd-soc-dummy-dai",
6223 .codec_name = "snd-soc-dummy",
6224 .id = MSM_FRONTEND_DAI_LSM4,
6225 },
6226 {
6227 .name = "Listen 5 Audio Service",
6228 .stream_name = "Listen 5 Audio Service",
6229 .cpu_dai_name = "LSM5",
6230 .platform_name = "msm-lsm-client",
6231 .dynamic = 1,
6232 .dpcm_capture = 1,
6233 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6234 SND_SOC_DPCM_TRIGGER_POST },
6235 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6236 .ignore_suspend = 1,
6237 .codec_dai_name = "snd-soc-dummy-dai",
6238 .codec_name = "snd-soc-dummy",
6239 .id = MSM_FRONTEND_DAI_LSM5,
6240 },
6241 {
6242 .name = "Listen 6 Audio Service",
6243 .stream_name = "Listen 6 Audio Service",
6244 .cpu_dai_name = "LSM6",
6245 .platform_name = "msm-lsm-client",
6246 .dynamic = 1,
6247 .dpcm_capture = 1,
6248 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6249 SND_SOC_DPCM_TRIGGER_POST },
6250 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6251 .ignore_suspend = 1,
6252 .codec_dai_name = "snd-soc-dummy-dai",
6253 .codec_name = "snd-soc-dummy",
6254 .id = MSM_FRONTEND_DAI_LSM6,
6255 },
6256 {
6257 .name = "Listen 7 Audio Service",
6258 .stream_name = "Listen 7 Audio Service",
6259 .cpu_dai_name = "LSM7",
6260 .platform_name = "msm-lsm-client",
6261 .dynamic = 1,
6262 .dpcm_capture = 1,
6263 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6264 SND_SOC_DPCM_TRIGGER_POST },
6265 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6266 .ignore_suspend = 1,
6267 .codec_dai_name = "snd-soc-dummy-dai",
6268 .codec_name = "snd-soc-dummy",
6269 .id = MSM_FRONTEND_DAI_LSM7,
6270 },
6271 {
6272 .name = "Listen 8 Audio Service",
6273 .stream_name = "Listen 8 Audio Service",
6274 .cpu_dai_name = "LSM8",
6275 .platform_name = "msm-lsm-client",
6276 .dynamic = 1,
6277 .dpcm_capture = 1,
6278 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6279 SND_SOC_DPCM_TRIGGER_POST },
6280 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6281 .ignore_suspend = 1,
6282 .codec_dai_name = "snd-soc-dummy-dai",
6283 .codec_name = "snd-soc-dummy",
6284 .id = MSM_FRONTEND_DAI_LSM8,
6285 },
6286 {
6287 .name = MSM_DAILINK_NAME(Media9),
6288 .stream_name = "MultiMedia9",
6289 .cpu_dai_name = "MultiMedia9",
6290 .platform_name = "msm-pcm-dsp.0",
6291 .dynamic = 1,
6292 .dpcm_playback = 1,
6293 .dpcm_capture = 1,
6294 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6295 SND_SOC_DPCM_TRIGGER_POST},
6296 .codec_dai_name = "snd-soc-dummy-dai",
6297 .codec_name = "snd-soc-dummy",
6298 .ignore_suspend = 1,
6299 /* this dainlink has playback support */
6300 .ignore_pmdown_time = 1,
6301 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6302 },
6303 {
6304 .name = MSM_DAILINK_NAME(Compress4),
6305 .stream_name = "Compress4",
6306 .cpu_dai_name = "MultiMedia11",
6307 .platform_name = "msm-compress-dsp",
6308 .dynamic = 1,
6309 .dpcm_playback = 1,
6310 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6311 SND_SOC_DPCM_TRIGGER_POST},
6312 .codec_dai_name = "snd-soc-dummy-dai",
6313 .codec_name = "snd-soc-dummy",
6314 .ignore_suspend = 1,
6315 .ignore_pmdown_time = 1,
6316 /* this dainlink has playback support */
6317 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6318 },
6319 {
6320 .name = MSM_DAILINK_NAME(Compress5),
6321 .stream_name = "Compress5",
6322 .cpu_dai_name = "MultiMedia12",
6323 .platform_name = "msm-compress-dsp",
6324 .dynamic = 1,
6325 .dpcm_playback = 1,
6326 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6327 SND_SOC_DPCM_TRIGGER_POST},
6328 .codec_dai_name = "snd-soc-dummy-dai",
6329 .codec_name = "snd-soc-dummy",
6330 .ignore_suspend = 1,
6331 .ignore_pmdown_time = 1,
6332 /* this dainlink has playback support */
6333 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6334 },
6335 {
6336 .name = MSM_DAILINK_NAME(Compress6),
6337 .stream_name = "Compress6",
6338 .cpu_dai_name = "MultiMedia13",
6339 .platform_name = "msm-compress-dsp",
6340 .dynamic = 1,
6341 .dpcm_playback = 1,
6342 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6343 SND_SOC_DPCM_TRIGGER_POST},
6344 .codec_dai_name = "snd-soc-dummy-dai",
6345 .codec_name = "snd-soc-dummy",
6346 .ignore_suspend = 1,
6347 .ignore_pmdown_time = 1,
6348 /* this dainlink has playback support */
6349 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6350 },
6351 {
6352 .name = MSM_DAILINK_NAME(Compress7),
6353 .stream_name = "Compress7",
6354 .cpu_dai_name = "MultiMedia14",
6355 .platform_name = "msm-compress-dsp",
6356 .dynamic = 1,
6357 .dpcm_playback = 1,
6358 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6359 SND_SOC_DPCM_TRIGGER_POST},
6360 .codec_dai_name = "snd-soc-dummy-dai",
6361 .codec_name = "snd-soc-dummy",
6362 .ignore_suspend = 1,
6363 .ignore_pmdown_time = 1,
6364 /* this dainlink has playback support */
6365 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6366 },
6367 {
6368 .name = MSM_DAILINK_NAME(Compress8),
6369 .stream_name = "Compress8",
6370 .cpu_dai_name = "MultiMedia15",
6371 .platform_name = "msm-compress-dsp",
6372 .dynamic = 1,
6373 .dpcm_playback = 1,
6374 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6375 SND_SOC_DPCM_TRIGGER_POST},
6376 .codec_dai_name = "snd-soc-dummy-dai",
6377 .codec_name = "snd-soc-dummy",
6378 .ignore_suspend = 1,
6379 .ignore_pmdown_time = 1,
6380 /* this dainlink has playback support */
6381 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6382 },
6383 {
6384 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6385 .stream_name = "MM_NOIRQ_2",
6386 .cpu_dai_name = "MultiMedia16",
6387 .platform_name = "msm-pcm-dsp-noirq",
6388 .dynamic = 1,
6389 .dpcm_playback = 1,
6390 .dpcm_capture = 1,
6391 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6392 SND_SOC_DPCM_TRIGGER_POST},
6393 .codec_dai_name = "snd-soc-dummy-dai",
6394 .codec_name = "snd-soc-dummy",
6395 .ignore_suspend = 1,
6396 .ignore_pmdown_time = 1,
6397 /* this dainlink has playback support */
6398 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6399 },
6400 {
6401 .name = "SLIMBUS_8 Hostless",
6402 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6403 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6404 .platform_name = "msm-pcm-hostless",
6405 .dynamic = 1,
6406 .dpcm_capture = 1,
6407 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6408 SND_SOC_DPCM_TRIGGER_POST},
6409 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6410 .ignore_suspend = 1,
6411 .codec_dai_name = "snd-soc-dummy-dai",
6412 .codec_name = "snd-soc-dummy",
6413 },
6414};
6415
6416
6417static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
6418 {
6419 .name = LPASS_BE_SLIMBUS_4_TX,
6420 .stream_name = "Slimbus4 Capture",
6421 .cpu_dai_name = "msm-dai-q6-dev.16393",
6422 .platform_name = "msm-pcm-hostless",
6423 .codec_name = "tavil_codec",
6424 .codec_dai_name = "tavil_vifeedback",
6425 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6426 .be_hw_params_fixup = msm_be_hw_params_fixup,
6427 .ops = &msm_be_ops,
6428 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6429 .ignore_suspend = 1,
6430 },
6431 /* Ultrasound RX DAI Link */
6432 {
6433 .name = "SLIMBUS_2 Hostless Playback",
6434 .stream_name = "SLIMBUS_2 Hostless Playback",
6435 .cpu_dai_name = "msm-dai-q6-dev.16388",
6436 .platform_name = "msm-pcm-hostless",
6437 .codec_name = "tavil_codec",
6438 .codec_dai_name = "tavil_rx2",
6439 .ignore_suspend = 1,
6440 .ignore_pmdown_time = 1,
6441 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6442 .ops = &msm_slimbus_2_be_ops,
6443 },
6444 /* Ultrasound TX DAI Link */
6445 {
6446 .name = "SLIMBUS_2 Hostless Capture",
6447 .stream_name = "SLIMBUS_2 Hostless Capture",
6448 .cpu_dai_name = "msm-dai-q6-dev.16389",
6449 .platform_name = "msm-pcm-hostless",
6450 .codec_name = "tavil_codec",
6451 .codec_dai_name = "tavil_tx2",
6452 .ignore_suspend = 1,
6453 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6454 .ops = &msm_slimbus_2_be_ops,
6455 },
6456};
6457
6458static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
6459 {
6460 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6461 .stream_name = "WSA CDC DMA0 Capture",
6462 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6463 .platform_name = "msm-pcm-hostless",
6464 .codec_name = "bolero_codec",
6465 .codec_dai_name = "wsa_macro_vifeedback",
6466 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6467 .be_hw_params_fixup = msm_be_hw_params_fixup,
6468 .ignore_suspend = 1,
6469 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6470 .ops = &msm_cdc_dma_be_ops,
6471 },
6472};
6473
6474static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6475 {
6476 .name = MSM_DAILINK_NAME(ASM Loopback),
6477 .stream_name = "MultiMedia6",
6478 .cpu_dai_name = "MultiMedia6",
6479 .platform_name = "msm-pcm-loopback",
6480 .dynamic = 1,
6481 .dpcm_playback = 1,
6482 .dpcm_capture = 1,
6483 .codec_dai_name = "snd-soc-dummy-dai",
6484 .codec_name = "snd-soc-dummy",
6485 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6486 SND_SOC_DPCM_TRIGGER_POST},
6487 .ignore_suspend = 1,
6488 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6489 .ignore_pmdown_time = 1,
6490 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6491 },
6492 {
6493 .name = "USB Audio Hostless",
6494 .stream_name = "USB Audio Hostless",
6495 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6496 .platform_name = "msm-pcm-hostless",
6497 .dynamic = 1,
6498 .dpcm_playback = 1,
6499 .dpcm_capture = 1,
6500 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6501 SND_SOC_DPCM_TRIGGER_POST},
6502 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6503 .ignore_suspend = 1,
6504 .ignore_pmdown_time = 1,
6505 .codec_dai_name = "snd-soc-dummy-dai",
6506 .codec_name = "snd-soc-dummy",
6507 },
6508};
6509
6510static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6511 /* Backend AFE DAI Links */
6512 {
6513 .name = LPASS_BE_AFE_PCM_RX,
6514 .stream_name = "AFE Playback",
6515 .cpu_dai_name = "msm-dai-q6-dev.224",
6516 .platform_name = "msm-pcm-routing",
6517 .codec_name = "msm-stub-codec.1",
6518 .codec_dai_name = "msm-stub-rx",
6519 .no_pcm = 1,
6520 .dpcm_playback = 1,
6521 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6522 .be_hw_params_fixup = msm_be_hw_params_fixup,
6523 /* this dainlink has playback support */
6524 .ignore_pmdown_time = 1,
6525 .ignore_suspend = 1,
6526 },
6527 {
6528 .name = LPASS_BE_AFE_PCM_TX,
6529 .stream_name = "AFE Capture",
6530 .cpu_dai_name = "msm-dai-q6-dev.225",
6531 .platform_name = "msm-pcm-routing",
6532 .codec_name = "msm-stub-codec.1",
6533 .codec_dai_name = "msm-stub-tx",
6534 .no_pcm = 1,
6535 .dpcm_capture = 1,
6536 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6537 .be_hw_params_fixup = msm_be_hw_params_fixup,
6538 .ignore_suspend = 1,
6539 },
6540 /* Incall Record Uplink BACK END DAI Link */
6541 {
6542 .name = LPASS_BE_INCALL_RECORD_TX,
6543 .stream_name = "Voice Uplink Capture",
6544 .cpu_dai_name = "msm-dai-q6-dev.32772",
6545 .platform_name = "msm-pcm-routing",
6546 .codec_name = "msm-stub-codec.1",
6547 .codec_dai_name = "msm-stub-tx",
6548 .no_pcm = 1,
6549 .dpcm_capture = 1,
6550 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6551 .be_hw_params_fixup = msm_be_hw_params_fixup,
6552 .ignore_suspend = 1,
6553 },
6554 /* Incall Record Downlink BACK END DAI Link */
6555 {
6556 .name = LPASS_BE_INCALL_RECORD_RX,
6557 .stream_name = "Voice Downlink Capture",
6558 .cpu_dai_name = "msm-dai-q6-dev.32771",
6559 .platform_name = "msm-pcm-routing",
6560 .codec_name = "msm-stub-codec.1",
6561 .codec_dai_name = "msm-stub-tx",
6562 .no_pcm = 1,
6563 .dpcm_capture = 1,
6564 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6565 .be_hw_params_fixup = msm_be_hw_params_fixup,
6566 .ignore_suspend = 1,
6567 },
6568 /* Incall Music BACK END DAI Link */
6569 {
6570 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6571 .stream_name = "Voice Farend Playback",
6572 .cpu_dai_name = "msm-dai-q6-dev.32773",
6573 .platform_name = "msm-pcm-routing",
6574 .codec_name = "msm-stub-codec.1",
6575 .codec_dai_name = "msm-stub-rx",
6576 .no_pcm = 1,
6577 .dpcm_playback = 1,
6578 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6579 .be_hw_params_fixup = msm_be_hw_params_fixup,
6580 .ignore_suspend = 1,
6581 .ignore_pmdown_time = 1,
6582 },
6583 /* Incall Music 2 BACK END DAI Link */
6584 {
6585 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6586 .stream_name = "Voice2 Farend Playback",
6587 .cpu_dai_name = "msm-dai-q6-dev.32770",
6588 .platform_name = "msm-pcm-routing",
6589 .codec_name = "msm-stub-codec.1",
6590 .codec_dai_name = "msm-stub-rx",
6591 .no_pcm = 1,
6592 .dpcm_playback = 1,
6593 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6594 .be_hw_params_fixup = msm_be_hw_params_fixup,
6595 .ignore_suspend = 1,
6596 .ignore_pmdown_time = 1,
6597 },
6598 {
6599 .name = LPASS_BE_USB_AUDIO_RX,
6600 .stream_name = "USB Audio Playback",
6601 .cpu_dai_name = "msm-dai-q6-dev.28672",
6602 .platform_name = "msm-pcm-routing",
6603 .codec_name = "msm-stub-codec.1",
6604 .codec_dai_name = "msm-stub-rx",
6605 .no_pcm = 1,
6606 .dpcm_playback = 1,
6607 .id = MSM_BACKEND_DAI_USB_RX,
6608 .be_hw_params_fixup = msm_be_hw_params_fixup,
6609 .ignore_pmdown_time = 1,
6610 .ignore_suspend = 1,
6611 },
6612 {
6613 .name = LPASS_BE_USB_AUDIO_TX,
6614 .stream_name = "USB Audio Capture",
6615 .cpu_dai_name = "msm-dai-q6-dev.28673",
6616 .platform_name = "msm-pcm-routing",
6617 .codec_name = "msm-stub-codec.1",
6618 .codec_dai_name = "msm-stub-tx",
6619 .no_pcm = 1,
6620 .dpcm_capture = 1,
6621 .id = MSM_BACKEND_DAI_USB_TX,
6622 .be_hw_params_fixup = msm_be_hw_params_fixup,
6623 .ignore_suspend = 1,
6624 },
6625 {
6626 .name = LPASS_BE_PRI_TDM_RX_0,
6627 .stream_name = "Primary TDM0 Playback",
6628 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6629 .platform_name = "msm-pcm-routing",
6630 .codec_name = "msm-stub-codec.1",
6631 .codec_dai_name = "msm-stub-rx",
6632 .no_pcm = 1,
6633 .dpcm_playback = 1,
6634 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6635 .be_hw_params_fixup = msm_be_hw_params_fixup,
6636 .ops = &sm6150_tdm_be_ops,
6637 .ignore_suspend = 1,
6638 .ignore_pmdown_time = 1,
6639 },
6640 {
6641 .name = LPASS_BE_PRI_TDM_TX_0,
6642 .stream_name = "Primary TDM0 Capture",
6643 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "msm-stub-codec.1",
6646 .codec_dai_name = "msm-stub-tx",
6647 .no_pcm = 1,
6648 .dpcm_capture = 1,
6649 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .ops = &sm6150_tdm_be_ops,
6652 .ignore_suspend = 1,
6653 },
6654 {
6655 .name = LPASS_BE_SEC_TDM_RX_0,
6656 .stream_name = "Secondary TDM0 Playback",
6657 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6658 .platform_name = "msm-pcm-routing",
6659 .codec_name = "msm-stub-codec.1",
6660 .codec_dai_name = "msm-stub-rx",
6661 .no_pcm = 1,
6662 .dpcm_playback = 1,
6663 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
6665 .ops = &sm6150_tdm_be_ops,
6666 .ignore_suspend = 1,
6667 .ignore_pmdown_time = 1,
6668 },
6669 {
6670 .name = LPASS_BE_SEC_TDM_TX_0,
6671 .stream_name = "Secondary TDM0 Capture",
6672 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6673 .platform_name = "msm-pcm-routing",
6674 .codec_name = "msm-stub-codec.1",
6675 .codec_dai_name = "msm-stub-tx",
6676 .no_pcm = 1,
6677 .dpcm_capture = 1,
6678 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6679 .be_hw_params_fixup = msm_be_hw_params_fixup,
6680 .ops = &sm6150_tdm_be_ops,
6681 .ignore_suspend = 1,
6682 },
6683 {
6684 .name = LPASS_BE_TERT_TDM_RX_0,
6685 .stream_name = "Tertiary TDM0 Playback",
6686 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6687 .platform_name = "msm-pcm-routing",
6688 .codec_name = "msm-stub-codec.1",
6689 .codec_dai_name = "msm-stub-rx",
6690 .no_pcm = 1,
6691 .dpcm_playback = 1,
6692 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6693 .be_hw_params_fixup = msm_be_hw_params_fixup,
6694 .ops = &sm6150_tdm_be_ops,
6695 .ignore_suspend = 1,
6696 .ignore_pmdown_time = 1,
6697 },
6698 {
6699 .name = LPASS_BE_TERT_TDM_TX_0,
6700 .stream_name = "Tertiary TDM0 Capture",
6701 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6702 .platform_name = "msm-pcm-routing",
6703 .codec_name = "msm-stub-codec.1",
6704 .codec_dai_name = "msm-stub-tx",
6705 .no_pcm = 1,
6706 .dpcm_capture = 1,
6707 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6708 .be_hw_params_fixup = msm_be_hw_params_fixup,
6709 .ops = &sm6150_tdm_be_ops,
6710 .ignore_suspend = 1,
6711 },
6712 {
6713 .name = LPASS_BE_QUAT_TDM_RX_0,
6714 .stream_name = "Quaternary TDM0 Playback",
6715 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6716 .platform_name = "msm-pcm-routing",
6717 .codec_name = "msm-stub-codec.1",
6718 .codec_dai_name = "msm-stub-rx",
6719 .no_pcm = 1,
6720 .dpcm_playback = 1,
6721 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6722 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6723 .ops = &sm6150_tdm_be_ops,
6724 .ignore_suspend = 1,
6725 .ignore_pmdown_time = 1,
6726 },
6727 {
6728 .name = LPASS_BE_QUAT_TDM_TX_0,
6729 .stream_name = "Quaternary TDM0 Capture",
6730 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6731 .platform_name = "msm-pcm-routing",
6732 .codec_name = "msm-stub-codec.1",
6733 .codec_dai_name = "msm-stub-tx",
6734 .no_pcm = 1,
6735 .dpcm_capture = 1,
6736 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6737 .be_hw_params_fixup = msm_be_hw_params_fixup,
6738 .ops = &sm6150_tdm_be_ops,
6739 .ignore_suspend = 1,
6740 },
6741};
6742
6743static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6744 {
6745 .name = LPASS_BE_SLIMBUS_0_RX,
6746 .stream_name = "Slimbus Playback",
6747 .cpu_dai_name = "msm-dai-q6-dev.16384",
6748 .platform_name = "msm-pcm-routing",
6749 .codec_name = "tavil_codec",
6750 .codec_dai_name = "tavil_rx1",
6751 .no_pcm = 1,
6752 .dpcm_playback = 1,
6753 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6754 .init = &msm_audrx_tavil_init,
6755 .be_hw_params_fixup = msm_be_hw_params_fixup,
6756 /* this dainlink has playback support */
6757 .ignore_pmdown_time = 1,
6758 .ignore_suspend = 1,
6759 .ops = &msm_be_ops,
6760 },
6761 {
6762 .name = LPASS_BE_SLIMBUS_0_TX,
6763 .stream_name = "Slimbus Capture",
6764 .cpu_dai_name = "msm-dai-q6-dev.16385",
6765 .platform_name = "msm-pcm-routing",
6766 .codec_name = "tavil_codec",
6767 .codec_dai_name = "tavil_tx1",
6768 .no_pcm = 1,
6769 .dpcm_capture = 1,
6770 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6771 .be_hw_params_fixup = msm_be_hw_params_fixup,
6772 .ignore_suspend = 1,
6773 .ops = &msm_be_ops,
6774 },
6775 {
6776 .name = LPASS_BE_SLIMBUS_1_RX,
6777 .stream_name = "Slimbus1 Playback",
6778 .cpu_dai_name = "msm-dai-q6-dev.16386",
6779 .platform_name = "msm-pcm-routing",
6780 .codec_name = "tavil_codec",
6781 .codec_dai_name = "tavil_rx1",
6782 .no_pcm = 1,
6783 .dpcm_playback = 1,
6784 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6785 .be_hw_params_fixup = msm_be_hw_params_fixup,
6786 .ops = &msm_be_ops,
6787 /* dai link has playback support */
6788 .ignore_pmdown_time = 1,
6789 .ignore_suspend = 1,
6790 },
6791 {
6792 .name = LPASS_BE_SLIMBUS_1_TX,
6793 .stream_name = "Slimbus1 Capture",
6794 .cpu_dai_name = "msm-dai-q6-dev.16387",
6795 .platform_name = "msm-pcm-routing",
6796 .codec_name = "tavil_codec",
6797 .codec_dai_name = "tavil_tx3",
6798 .no_pcm = 1,
6799 .dpcm_capture = 1,
6800 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6801 .be_hw_params_fixup = msm_be_hw_params_fixup,
6802 .ops = &msm_be_ops,
6803 .ignore_suspend = 1,
6804 },
6805 {
6806 .name = LPASS_BE_SLIMBUS_2_RX,
6807 .stream_name = "Slimbus2 Playback",
6808 .cpu_dai_name = "msm-dai-q6-dev.16388",
6809 .platform_name = "msm-pcm-routing",
6810 .codec_name = "tavil_codec",
6811 .codec_dai_name = "tavil_rx2",
6812 .no_pcm = 1,
6813 .dpcm_playback = 1,
6814 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6815 .be_hw_params_fixup = msm_be_hw_params_fixup,
6816 .ops = &msm_be_ops,
6817 .ignore_pmdown_time = 1,
6818 .ignore_suspend = 1,
6819 },
6820 {
6821 .name = LPASS_BE_SLIMBUS_3_RX,
6822 .stream_name = "Slimbus3 Playback",
6823 .cpu_dai_name = "msm-dai-q6-dev.16390",
6824 .platform_name = "msm-pcm-routing",
6825 .codec_name = "tavil_codec",
6826 .codec_dai_name = "tavil_rx1",
6827 .no_pcm = 1,
6828 .dpcm_playback = 1,
6829 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6830 .be_hw_params_fixup = msm_be_hw_params_fixup,
6831 .ops = &msm_be_ops,
6832 /* dai link has playback support */
6833 .ignore_pmdown_time = 1,
6834 .ignore_suspend = 1,
6835 },
6836 {
6837 .name = LPASS_BE_SLIMBUS_3_TX,
6838 .stream_name = "Slimbus3 Capture",
6839 .cpu_dai_name = "msm-dai-q6-dev.16391",
6840 .platform_name = "msm-pcm-routing",
6841 .codec_name = "tavil_codec",
6842 .codec_dai_name = "tavil_tx1",
6843 .no_pcm = 1,
6844 .dpcm_capture = 1,
6845 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6846 .be_hw_params_fixup = msm_be_hw_params_fixup,
6847 .ops = &msm_be_ops,
6848 .ignore_suspend = 1,
6849 },
6850 {
6851 .name = LPASS_BE_SLIMBUS_4_RX,
6852 .stream_name = "Slimbus4 Playback",
6853 .cpu_dai_name = "msm-dai-q6-dev.16392",
6854 .platform_name = "msm-pcm-routing",
6855 .codec_name = "tavil_codec",
6856 .codec_dai_name = "tavil_rx1",
6857 .no_pcm = 1,
6858 .dpcm_playback = 1,
6859 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6860 .be_hw_params_fixup = msm_be_hw_params_fixup,
6861 .ops = &msm_be_ops,
6862 /* dai link has playback support */
6863 .ignore_pmdown_time = 1,
6864 .ignore_suspend = 1,
6865 },
6866 {
6867 .name = LPASS_BE_SLIMBUS_5_RX,
6868 .stream_name = "Slimbus5 Playback",
6869 .cpu_dai_name = "msm-dai-q6-dev.16394",
6870 .platform_name = "msm-pcm-routing",
6871 .codec_name = "tavil_codec",
6872 .codec_dai_name = "tavil_rx3",
6873 .no_pcm = 1,
6874 .dpcm_playback = 1,
6875 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6876 .be_hw_params_fixup = msm_be_hw_params_fixup,
6877 .ops = &msm_be_ops,
6878 /* dai link has playback support */
6879 .ignore_pmdown_time = 1,
6880 .ignore_suspend = 1,
6881 },
6882 /* MAD BE */
6883 {
6884 .name = LPASS_BE_SLIMBUS_5_TX,
6885 .stream_name = "Slimbus5 Capture",
6886 .cpu_dai_name = "msm-dai-q6-dev.16395",
6887 .platform_name = "msm-pcm-routing",
6888 .codec_name = "tavil_codec",
6889 .codec_dai_name = "tavil_mad1",
6890 .no_pcm = 1,
6891 .dpcm_capture = 1,
6892 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6893 .be_hw_params_fixup = msm_be_hw_params_fixup,
6894 .ops = &msm_be_ops,
6895 .ignore_suspend = 1,
6896 },
6897 {
6898 .name = LPASS_BE_SLIMBUS_6_RX,
6899 .stream_name = "Slimbus6 Playback",
6900 .cpu_dai_name = "msm-dai-q6-dev.16396",
6901 .platform_name = "msm-pcm-routing",
6902 .codec_name = "tavil_codec",
6903 .codec_dai_name = "tavil_rx4",
6904 .no_pcm = 1,
6905 .dpcm_playback = 1,
6906 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6907 .be_hw_params_fixup = msm_be_hw_params_fixup,
6908 .ops = &msm_be_ops,
6909 /* dai link has playback support */
6910 .ignore_pmdown_time = 1,
6911 .ignore_suspend = 1,
6912 },
6913 /* Slimbus VI Recording */
6914 {
6915 .name = LPASS_BE_SLIMBUS_TX_VI,
6916 .stream_name = "Slimbus4 Capture",
6917 .cpu_dai_name = "msm-dai-q6-dev.16393",
6918 .platform_name = "msm-pcm-routing",
6919 .codec_name = "tavil_codec",
6920 .codec_dai_name = "tavil_vifeedback",
6921 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6922 .be_hw_params_fixup = msm_be_hw_params_fixup,
6923 .ops = &msm_be_ops,
6924 .ignore_suspend = 1,
6925 .no_pcm = 1,
6926 .dpcm_capture = 1,
6927 },
6928};
6929
6930static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6931 {
6932 .name = LPASS_BE_SLIMBUS_7_RX,
6933 .stream_name = "Slimbus7 Playback",
6934 .cpu_dai_name = "msm-dai-q6-dev.16398",
6935 .platform_name = "msm-pcm-routing",
6936 .codec_name = "btfmslim_slave",
6937 /* BT codec driver determines capabilities based on
6938 * dai name, bt codecdai name should always contains
6939 * supported usecase information
6940 */
6941 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6942 .no_pcm = 1,
6943 .dpcm_playback = 1,
6944 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6945 .be_hw_params_fixup = msm_be_hw_params_fixup,
6946 .ops = &msm_wcn_ops,
6947 /* dai link has playback support */
6948 .ignore_pmdown_time = 1,
6949 .ignore_suspend = 1,
6950 },
6951 {
6952 .name = LPASS_BE_SLIMBUS_7_TX,
6953 .stream_name = "Slimbus7 Capture",
6954 .cpu_dai_name = "msm-dai-q6-dev.16399",
6955 .platform_name = "msm-pcm-routing",
6956 .codec_name = "btfmslim_slave",
6957 .codec_dai_name = "btfm_bt_sco_slim_tx",
6958 .no_pcm = 1,
6959 .dpcm_capture = 1,
6960 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6961 .be_hw_params_fixup = msm_be_hw_params_fixup,
6962 .ops = &msm_wcn_ops,
6963 .ignore_suspend = 1,
6964 },
6965 {
6966 .name = LPASS_BE_SLIMBUS_8_TX,
6967 .stream_name = "Slimbus8 Capture",
6968 .cpu_dai_name = "msm-dai-q6-dev.16401",
6969 .platform_name = "msm-pcm-routing",
6970 .codec_name = "btfmslim_slave",
6971 .codec_dai_name = "btfm_fm_slim_tx",
6972 .no_pcm = 1,
6973 .dpcm_capture = 1,
6974 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6975 .be_hw_params_fixup = msm_be_hw_params_fixup,
6976 .init = &msm_wcn_init,
6977 .ops = &msm_wcn_ops,
6978 .ignore_suspend = 1,
6979 },
6980};
6981
6982static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6983 /* DISP PORT BACK END DAI Link */
6984 {
6985 .name = LPASS_BE_DISPLAY_PORT,
6986 .stream_name = "Display Port Playback",
6987 .cpu_dai_name = "msm-dai-q6-dp.24608",
6988 .platform_name = "msm-pcm-routing",
6989 .codec_name = "msm-ext-disp-audio-codec-rx",
6990 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6991 .no_pcm = 1,
6992 .dpcm_playback = 1,
6993 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6994 .be_hw_params_fixup = msm_be_hw_params_fixup,
6995 .ignore_pmdown_time = 1,
6996 .ignore_suspend = 1,
6997 },
6998};
6999
7000static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7001 {
7002 .name = LPASS_BE_PRI_MI2S_RX,
7003 .stream_name = "Primary MI2S Playback",
7004 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7005 .platform_name = "msm-pcm-routing",
7006 .codec_name = "msm-stub-codec.1",
7007 .codec_dai_name = "msm-stub-rx",
7008 .no_pcm = 1,
7009 .dpcm_playback = 1,
7010 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7011 .be_hw_params_fixup = msm_be_hw_params_fixup,
7012 .ops = &msm_mi2s_be_ops,
7013 .ignore_suspend = 1,
7014 .ignore_pmdown_time = 1,
7015 },
7016 {
7017 .name = LPASS_BE_PRI_MI2S_TX,
7018 .stream_name = "Primary MI2S Capture",
7019 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7020 .platform_name = "msm-pcm-routing",
7021 .codec_name = "msm-stub-codec.1",
7022 .codec_dai_name = "msm-stub-tx",
7023 .no_pcm = 1,
7024 .dpcm_capture = 1,
7025 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7026 .be_hw_params_fixup = msm_be_hw_params_fixup,
7027 .ops = &msm_mi2s_be_ops,
7028 .ignore_suspend = 1,
7029 },
7030 {
7031 .name = LPASS_BE_SEC_MI2S_RX,
7032 .stream_name = "Secondary MI2S Playback",
7033 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7034 .platform_name = "msm-pcm-routing",
7035 .codec_name = "msm-stub-codec.1",
7036 .codec_dai_name = "msm-stub-rx",
7037 .no_pcm = 1,
7038 .dpcm_playback = 1,
7039 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7040 .be_hw_params_fixup = msm_be_hw_params_fixup,
7041 .ops = &msm_mi2s_be_ops,
7042 .ignore_suspend = 1,
7043 .ignore_pmdown_time = 1,
7044 },
7045 {
7046 .name = LPASS_BE_SEC_MI2S_TX,
7047 .stream_name = "Secondary MI2S Capture",
7048 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7049 .platform_name = "msm-pcm-routing",
7050 .codec_name = "msm-stub-codec.1",
7051 .codec_dai_name = "msm-stub-tx",
7052 .no_pcm = 1,
7053 .dpcm_capture = 1,
7054 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7055 .be_hw_params_fixup = msm_be_hw_params_fixup,
7056 .ops = &msm_mi2s_be_ops,
7057 .ignore_suspend = 1,
7058 },
7059 {
7060 .name = LPASS_BE_TERT_MI2S_RX,
7061 .stream_name = "Tertiary MI2S Playback",
7062 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7063 .platform_name = "msm-pcm-routing",
7064 .codec_name = "msm-stub-codec.1",
7065 .codec_dai_name = "msm-stub-rx",
7066 .no_pcm = 1,
7067 .dpcm_playback = 1,
7068 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7069 .be_hw_params_fixup = msm_be_hw_params_fixup,
7070 .ops = &msm_mi2s_be_ops,
7071 .ignore_suspend = 1,
7072 .ignore_pmdown_time = 1,
7073 },
7074 {
7075 .name = LPASS_BE_TERT_MI2S_TX,
7076 .stream_name = "Tertiary MI2S Capture",
7077 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7078 .platform_name = "msm-pcm-routing",
7079 .codec_name = "msm-stub-codec.1",
7080 .codec_dai_name = "msm-stub-tx",
7081 .no_pcm = 1,
7082 .dpcm_capture = 1,
7083 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7084 .be_hw_params_fixup = msm_be_hw_params_fixup,
7085 .ops = &msm_mi2s_be_ops,
7086 .ignore_suspend = 1,
7087 },
7088 {
7089 .name = LPASS_BE_QUAT_MI2S_RX,
7090 .stream_name = "Quaternary MI2S Playback",
7091 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7092 .platform_name = "msm-pcm-routing",
7093 .codec_name = "msm-stub-codec.1",
7094 .codec_dai_name = "msm-stub-rx",
7095 .no_pcm = 1,
7096 .dpcm_playback = 1,
7097 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7098 .be_hw_params_fixup = msm_be_hw_params_fixup,
7099 .ops = &msm_mi2s_be_ops,
7100 .ignore_suspend = 1,
7101 .ignore_pmdown_time = 1,
7102 },
7103 {
7104 .name = LPASS_BE_QUAT_MI2S_TX,
7105 .stream_name = "Quaternary MI2S Capture",
7106 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7107 .platform_name = "msm-pcm-routing",
7108 .codec_name = "msm-stub-codec.1",
7109 .codec_dai_name = "msm-stub-tx",
7110 .no_pcm = 1,
7111 .dpcm_capture = 1,
7112 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7113 .be_hw_params_fixup = msm_be_hw_params_fixup,
7114 .ops = &msm_mi2s_be_ops,
7115 .ignore_suspend = 1,
7116 },
7117 {
7118 .name = LPASS_BE_QUIN_MI2S_RX,
7119 .stream_name = "Quinary MI2S Playback",
7120 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7121 .platform_name = "msm-pcm-routing",
7122 .codec_name = "msm-stub-codec.1",
7123 .codec_dai_name = "msm-stub-rx",
7124 .no_pcm = 1,
7125 .dpcm_playback = 1,
7126 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7127 .be_hw_params_fixup = msm_be_hw_params_fixup,
7128 .ops = &msm_mi2s_be_ops,
7129 .ignore_suspend = 1,
7130 .ignore_pmdown_time = 1,
7131 },
7132 {
7133 .name = LPASS_BE_QUIN_MI2S_TX,
7134 .stream_name = "Quinary MI2S Capture",
7135 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7136 .platform_name = "msm-pcm-routing",
7137 .codec_name = "msm-stub-codec.1",
7138 .codec_dai_name = "msm-stub-tx",
7139 .no_pcm = 1,
7140 .dpcm_capture = 1,
7141 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7142 .be_hw_params_fixup = msm_be_hw_params_fixup,
7143 .ops = &msm_mi2s_be_ops,
7144 .ignore_suspend = 1,
7145 },
7146
7147};
7148
7149static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7150 /* Primary AUX PCM Backend DAI Links */
7151 {
7152 .name = LPASS_BE_AUXPCM_RX,
7153 .stream_name = "AUX PCM Playback",
7154 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7155 .platform_name = "msm-pcm-routing",
7156 .codec_name = "msm-stub-codec.1",
7157 .codec_dai_name = "msm-stub-rx",
7158 .no_pcm = 1,
7159 .dpcm_playback = 1,
7160 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7161 .be_hw_params_fixup = msm_be_hw_params_fixup,
7162 .ignore_pmdown_time = 1,
7163 .ignore_suspend = 1,
7164 },
7165 {
7166 .name = LPASS_BE_AUXPCM_TX,
7167 .stream_name = "AUX PCM Capture",
7168 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7169 .platform_name = "msm-pcm-routing",
7170 .codec_name = "msm-stub-codec.1",
7171 .codec_dai_name = "msm-stub-tx",
7172 .no_pcm = 1,
7173 .dpcm_capture = 1,
7174 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7175 .be_hw_params_fixup = msm_be_hw_params_fixup,
7176 .ignore_suspend = 1,
7177 },
7178 /* Secondary AUX PCM Backend DAI Links */
7179 {
7180 .name = LPASS_BE_SEC_AUXPCM_RX,
7181 .stream_name = "Sec AUX PCM Playback",
7182 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7183 .platform_name = "msm-pcm-routing",
7184 .codec_name = "msm-stub-codec.1",
7185 .codec_dai_name = "msm-stub-rx",
7186 .no_pcm = 1,
7187 .dpcm_playback = 1,
7188 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7189 .be_hw_params_fixup = msm_be_hw_params_fixup,
7190 .ignore_pmdown_time = 1,
7191 .ignore_suspend = 1,
7192 },
7193 {
7194 .name = LPASS_BE_SEC_AUXPCM_TX,
7195 .stream_name = "Sec AUX PCM Capture",
7196 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7197 .platform_name = "msm-pcm-routing",
7198 .codec_name = "msm-stub-codec.1",
7199 .codec_dai_name = "msm-stub-tx",
7200 .no_pcm = 1,
7201 .dpcm_capture = 1,
7202 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7203 .be_hw_params_fixup = msm_be_hw_params_fixup,
7204 .ignore_suspend = 1,
7205 },
7206 /* Tertiary AUX PCM Backend DAI Links */
7207 {
7208 .name = LPASS_BE_TERT_AUXPCM_RX,
7209 .stream_name = "Tert AUX PCM Playback",
7210 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7211 .platform_name = "msm-pcm-routing",
7212 .codec_name = "msm-stub-codec.1",
7213 .codec_dai_name = "msm-stub-rx",
7214 .no_pcm = 1,
7215 .dpcm_playback = 1,
7216 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7217 .be_hw_params_fixup = msm_be_hw_params_fixup,
7218 .ignore_suspend = 1,
7219 },
7220 {
7221 .name = LPASS_BE_TERT_AUXPCM_TX,
7222 .stream_name = "Tert AUX PCM Capture",
7223 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7224 .platform_name = "msm-pcm-routing",
7225 .codec_name = "msm-stub-codec.1",
7226 .codec_dai_name = "msm-stub-tx",
7227 .no_pcm = 1,
7228 .dpcm_capture = 1,
7229 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7230 .be_hw_params_fixup = msm_be_hw_params_fixup,
7231 .ignore_suspend = 1,
7232 },
7233 /* Quaternary AUX PCM Backend DAI Links */
7234 {
7235 .name = LPASS_BE_QUAT_AUXPCM_RX,
7236 .stream_name = "Quat AUX PCM Playback",
7237 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7238 .platform_name = "msm-pcm-routing",
7239 .codec_name = "msm-stub-codec.1",
7240 .codec_dai_name = "msm-stub-rx",
7241 .no_pcm = 1,
7242 .dpcm_playback = 1,
7243 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7244 .be_hw_params_fixup = msm_be_hw_params_fixup,
7245 .ignore_pmdown_time = 1,
7246 .ignore_suspend = 1,
7247 },
7248 {
7249 .name = LPASS_BE_QUAT_AUXPCM_TX,
7250 .stream_name = "Quat AUX PCM Capture",
7251 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7252 .platform_name = "msm-pcm-routing",
7253 .codec_name = "msm-stub-codec.1",
7254 .codec_dai_name = "msm-stub-tx",
7255 .no_pcm = 1,
7256 .dpcm_capture = 1,
7257 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7258 .be_hw_params_fixup = msm_be_hw_params_fixup,
7259 .ignore_suspend = 1,
7260 },
7261 /* Quinary AUX PCM Backend DAI Links */
7262 {
7263 .name = LPASS_BE_QUIN_AUXPCM_RX,
7264 .stream_name = "Quin AUX PCM Playback",
7265 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7266 .platform_name = "msm-pcm-routing",
7267 .codec_name = "msm-stub-codec.1",
7268 .codec_dai_name = "msm-stub-rx",
7269 .no_pcm = 1,
7270 .dpcm_playback = 1,
7271 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7272 .be_hw_params_fixup = msm_be_hw_params_fixup,
7273 .ignore_pmdown_time = 1,
7274 .ignore_suspend = 1,
7275 },
7276 {
7277 .name = LPASS_BE_QUIN_AUXPCM_TX,
7278 .stream_name = "Quin AUX PCM Capture",
7279 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7280 .platform_name = "msm-pcm-routing",
7281 .codec_name = "msm-stub-codec.1",
7282 .codec_dai_name = "msm-stub-tx",
7283 .no_pcm = 1,
7284 .dpcm_capture = 1,
7285 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7286 .be_hw_params_fixup = msm_be_hw_params_fixup,
7287 .ignore_suspend = 1,
7288 },
7289};
7290
7291static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7292 /* WSA CDC DMA Backend DAI Links */
7293 {
7294 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7295 .stream_name = "WSA CDC DMA0 Playback",
7296 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7297 .platform_name = "msm-pcm-routing",
7298 .codec_name = "bolero_codec",
7299 .codec_dai_name = "wsa_macro_rx1",
7300 .no_pcm = 1,
7301 .dpcm_playback = 1,
7302 .init = &msm_int_audrx_init,
7303 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7304 .be_hw_params_fixup = msm_be_hw_params_fixup,
7305 .ignore_pmdown_time = 1,
7306 .ignore_suspend = 1,
7307 .ops = &msm_cdc_dma_be_ops,
7308 },
7309 {
7310 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7311 .stream_name = "WSA CDC DMA1 Playback",
7312 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7313 .platform_name = "msm-pcm-routing",
7314 .codec_name = "bolero_codec",
7315 .codec_dai_name = "wsa_macro_rx_mix",
7316 .no_pcm = 1,
7317 .dpcm_playback = 1,
7318 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7319 .be_hw_params_fixup = msm_be_hw_params_fixup,
7320 .ignore_pmdown_time = 1,
7321 .ignore_suspend = 1,
7322 .ops = &msm_cdc_dma_be_ops,
7323 },
7324 {
7325 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7326 .stream_name = "WSA CDC DMA1 Capture",
7327 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7328 .platform_name = "msm-pcm-routing",
7329 .codec_name = "bolero_codec",
7330 .codec_dai_name = "wsa_macro_echo",
7331 .no_pcm = 1,
7332 .dpcm_capture = 1,
7333 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7334 .be_hw_params_fixup = msm_be_hw_params_fixup,
7335 .ignore_suspend = 1,
7336 .ops = &msm_cdc_dma_be_ops,
7337 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307338};
7339
7340static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7341 /* RX CDC DMA Backend DAI Links */
7342 {
7343 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7344 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307345 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307346 .platform_name = "msm-pcm-routing",
7347 .codec_name = "bolero_codec",
7348 .codec_dai_name = "rx_macro_rx1",
7349 .no_pcm = 1,
7350 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307351 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7352 .be_hw_params_fixup = msm_be_hw_params_fixup,
7353 .ignore_pmdown_time = 1,
7354 .ignore_suspend = 1,
7355 .ops = &msm_cdc_dma_be_ops,
7356 },
7357 {
7358 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7359 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307360 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307361 .platform_name = "msm-pcm-routing",
7362 .codec_name = "bolero_codec",
7363 .codec_dai_name = "rx_macro_rx2",
7364 .no_pcm = 1,
7365 .dpcm_playback = 1,
7366 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7367 .be_hw_params_fixup = msm_be_hw_params_fixup,
7368 .ignore_pmdown_time = 1,
7369 .ignore_suspend = 1,
7370 .ops = &msm_cdc_dma_be_ops,
7371 },
7372 {
7373 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7374 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307375 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307376 .platform_name = "msm-pcm-routing",
7377 .codec_name = "bolero_codec",
7378 .codec_dai_name = "rx_macro_rx3",
7379 .no_pcm = 1,
7380 .dpcm_playback = 1,
7381 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7382 .be_hw_params_fixup = msm_be_hw_params_fixup,
7383 .ignore_pmdown_time = 1,
7384 .ignore_suspend = 1,
7385 .ops = &msm_cdc_dma_be_ops,
7386 },
7387 {
7388 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7389 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307390 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307391 .platform_name = "msm-pcm-routing",
7392 .codec_name = "bolero_codec",
7393 .codec_dai_name = "rx_macro_rx4",
7394 .no_pcm = 1,
7395 .dpcm_playback = 1,
7396 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7397 .be_hw_params_fixup = msm_be_hw_params_fixup,
7398 .ignore_pmdown_time = 1,
7399 .ignore_suspend = 1,
7400 .ops = &msm_cdc_dma_be_ops,
7401 },
7402 /* TX CDC DMA Backend DAI Links */
7403 {
7404 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7405 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307406 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307407 .platform_name = "msm-pcm-routing",
7408 .codec_name = "bolero_codec",
7409 .codec_dai_name = "tx_macro_tx1",
7410 .no_pcm = 1,
7411 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307412 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7413 .be_hw_params_fixup = msm_be_hw_params_fixup,
7414 .ignore_suspend = 1,
7415 .ops = &msm_cdc_dma_be_ops,
7416 },
7417 {
7418 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7419 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307420 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307421 .platform_name = "msm-pcm-routing",
7422 .codec_name = "bolero_codec",
7423 .codec_dai_name = "tx_macro_tx2",
7424 .no_pcm = 1,
7425 .dpcm_capture = 1,
7426 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7427 .be_hw_params_fixup = msm_be_hw_params_fixup,
7428 .ignore_suspend = 1,
7429 .ops = &msm_cdc_dma_be_ops,
7430 },
7431};
7432
7433static struct snd_soc_dai_link msm_sm6150_dai_links[
7434 ARRAY_SIZE(msm_common_dai_links) +
7435 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7436 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7437 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7438 ARRAY_SIZE(msm_common_be_dai_links) +
7439 ARRAY_SIZE(msm_tavil_be_dai_links) +
7440 ARRAY_SIZE(msm_wcn_be_dai_links) +
7441 ARRAY_SIZE(ext_disp_be_dai_link) +
7442 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7443 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7444 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7445 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7446
7447static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7448{
7449 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7450 struct snd_soc_pcm_runtime *rtd;
7451 int ret = 0;
7452 void *mbhc_calibration;
7453
7454 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7455 if (!rtd) {
7456 dev_err(card->dev,
7457 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7458 __func__, be_dl_name);
7459 ret = -EINVAL;
7460 goto err_pcm_runtime;
7461 }
7462
7463 mbhc_calibration = def_wcd_mbhc_cal();
7464 if (!mbhc_calibration) {
7465 ret = -ENOMEM;
7466 goto err_mbhc_cal;
7467 }
7468 wcd_mbhc_cfg.calibration = mbhc_calibration;
7469 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7470 if (ret) {
7471 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7472 __func__, ret);
7473 goto err_hs_detect;
7474 }
7475 return 0;
7476
7477err_hs_detect:
7478 kfree(mbhc_calibration);
7479err_mbhc_cal:
7480err_pcm_runtime:
7481 return ret;
7482}
7483
7484
7485static int msm_populate_dai_link_component_of_node(
7486 struct snd_soc_card *card)
7487{
7488 int i, index, ret = 0;
7489 struct device *cdev = card->dev;
7490 struct snd_soc_dai_link *dai_link = card->dai_link;
7491 struct device_node *np;
7492
7493 if (!cdev) {
7494 pr_err("%s: Sound card device memory NULL\n", __func__);
7495 return -ENODEV;
7496 }
7497
7498 for (i = 0; i < card->num_links; i++) {
7499 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7500 continue;
7501
7502 /* populate platform_of_node for snd card dai links */
7503 if (dai_link[i].platform_name &&
7504 !dai_link[i].platform_of_node) {
7505 index = of_property_match_string(cdev->of_node,
7506 "asoc-platform-names",
7507 dai_link[i].platform_name);
7508 if (index < 0) {
7509 pr_err("%s: No match found for platform name: %s\n",
7510 __func__, dai_link[i].platform_name);
7511 ret = index;
7512 goto err;
7513 }
7514 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7515 index);
7516 if (!np) {
7517 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7518 __func__, dai_link[i].platform_name,
7519 index);
7520 ret = -ENODEV;
7521 goto err;
7522 }
7523 dai_link[i].platform_of_node = np;
7524 dai_link[i].platform_name = NULL;
7525 }
7526
7527 /* populate cpu_of_node for snd card dai links */
7528 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7529 index = of_property_match_string(cdev->of_node,
7530 "asoc-cpu-names",
7531 dai_link[i].cpu_dai_name);
7532 if (index >= 0) {
7533 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7534 index);
7535 if (!np) {
7536 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7537 __func__,
7538 dai_link[i].cpu_dai_name);
7539 ret = -ENODEV;
7540 goto err;
7541 }
7542 dai_link[i].cpu_of_node = np;
7543 dai_link[i].cpu_dai_name = NULL;
7544 }
7545 }
7546
7547 /* populate codec_of_node for snd card dai links */
7548 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7549 index = of_property_match_string(cdev->of_node,
7550 "asoc-codec-names",
7551 dai_link[i].codec_name);
7552 if (index < 0)
7553 continue;
7554 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7555 index);
7556 if (!np) {
7557 pr_err("%s: retrieving phandle for codec %s failed\n",
7558 __func__, dai_link[i].codec_name);
7559 ret = -ENODEV;
7560 goto err;
7561 }
7562 dai_link[i].codec_of_node = np;
7563 dai_link[i].codec_name = NULL;
7564 }
7565 }
7566
7567err:
7568 return ret;
7569}
7570
7571static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7572{
7573 int ret = 0;
7574 struct snd_soc_codec *codec = rtd->codec;
7575
7576 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7577 ARRAY_SIZE(msm_tavil_snd_controls));
7578 if (ret < 0) {
7579 dev_err(codec->dev,
7580 "%s: add_codec_controls failed, err = %d\n",
7581 __func__, ret);
7582 return ret;
7583 }
7584
7585 return 0;
7586}
7587
7588static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7589 struct snd_pcm_hw_params *params)
7590{
7591 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7592 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7593
7594 int ret = 0;
7595 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7596 151};
7597 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7598 134, 135, 136, 137, 138, 139,
7599 140, 141, 142, 143};
7600
7601 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7602 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7603 slim_rx_cfg[SLIM_RX_0].channels,
7604 rx_ch);
7605 if (ret < 0)
7606 pr_err("%s: RX failed to set cpu chan map error %d\n",
7607 __func__, ret);
7608 } else {
7609 ret = snd_soc_dai_set_channel_map(cpu_dai,
7610 slim_tx_cfg[SLIM_TX_0].channels,
7611 tx_ch, 0, 0);
7612 if (ret < 0)
7613 pr_err("%s: TX failed to set cpu chan map error %d\n",
7614 __func__, ret);
7615 }
7616
7617 return ret;
7618}
7619
7620static struct snd_soc_ops msm_stub_be_ops = {
7621 .hw_params = msm_snd_stub_hw_params,
7622};
7623
7624static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7625
7626 /* FrontEnd DAI Links */
7627 {
7628 .name = "MSMSTUB Media1",
7629 .stream_name = "MultiMedia1",
7630 .cpu_dai_name = "MultiMedia1",
7631 .platform_name = "msm-pcm-dsp.0",
7632 .dynamic = 1,
7633 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7634 .dpcm_playback = 1,
7635 .dpcm_capture = 1,
7636 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7637 SND_SOC_DPCM_TRIGGER_POST},
7638 .codec_dai_name = "snd-soc-dummy-dai",
7639 .codec_name = "snd-soc-dummy",
7640 .ignore_suspend = 1,
7641 /* this dainlink has playback support */
7642 .ignore_pmdown_time = 1,
7643 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7644 },
7645};
7646
7647static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7648
7649 /* Backend DAI Links */
7650 {
7651 .name = LPASS_BE_SLIMBUS_0_RX,
7652 .stream_name = "Slimbus Playback",
7653 .cpu_dai_name = "msm-dai-q6-dev.16384",
7654 .platform_name = "msm-pcm-routing",
7655 .codec_name = "msm-stub-codec.1",
7656 .codec_dai_name = "msm-stub-rx",
7657 .no_pcm = 1,
7658 .dpcm_playback = 1,
7659 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7660 .init = &msm_audrx_stub_init,
7661 .be_hw_params_fixup = msm_be_hw_params_fixup,
7662 .ignore_pmdown_time = 1, /* dai link has playback support */
7663 .ignore_suspend = 1,
7664 .ops = &msm_stub_be_ops,
7665 },
7666 {
7667 .name = LPASS_BE_SLIMBUS_0_TX,
7668 .stream_name = "Slimbus Capture",
7669 .cpu_dai_name = "msm-dai-q6-dev.16385",
7670 .platform_name = "msm-pcm-routing",
7671 .codec_name = "msm-stub-codec.1",
7672 .codec_dai_name = "msm-stub-tx",
7673 .no_pcm = 1,
7674 .dpcm_capture = 1,
7675 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7676 .be_hw_params_fixup = msm_be_hw_params_fixup,
7677 .ignore_suspend = 1,
7678 .ops = &msm_stub_be_ops,
7679 },
7680};
7681
7682static struct snd_soc_dai_link msm_stub_dai_links[
7683 ARRAY_SIZE(msm_stub_fe_dai_links) +
7684 ARRAY_SIZE(msm_stub_be_dai_links)];
7685
7686struct snd_soc_card snd_soc_card_stub_msm = {
7687 .name = "sm6150-stub-snd-card",
7688};
7689
7690static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7691 { .compatible = "qcom,sm6150-asoc-snd",
7692 .data = "codec"},
7693 { .compatible = "qcom,sm6150-asoc-snd-stub",
7694 .data = "stub_codec"},
7695 {},
7696};
7697
7698static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7699{
7700 struct snd_soc_card *card = NULL;
7701 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307702 int total_links = 0, rc = 0;
7703 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7704 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7705 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307706 const struct of_device_id *match;
7707
7708 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7709 if (!match) {
7710 dev_err(dev, "%s: No DT match found for sound card\n",
7711 __func__);
7712 return NULL;
7713 }
7714
7715 if (!strcmp(match->data, "codec")) {
7716 card = &snd_soc_card_sm6150_msm;
7717 memcpy(msm_sm6150_dai_links + total_links,
7718 msm_common_dai_links,
7719 sizeof(msm_common_dai_links));
7720
7721 total_links += ARRAY_SIZE(msm_common_dai_links);
7722
7723 memcpy(msm_sm6150_dai_links + total_links,
7724 msm_common_misc_fe_dai_links,
7725 sizeof(msm_common_misc_fe_dai_links));
7726
7727 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7728
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307729 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7730 &tavil_codec);
7731 if (rc) {
7732 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307733 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307734 } else {
7735 if (tavil_codec) {
7736 card->late_probe =
7737 msm_snd_card_tavil_late_probe;
7738 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307739 msm_tavil_fe_dai_links,
7740 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307741 total_links +=
7742 ARRAY_SIZE(msm_tavil_fe_dai_links);
7743 }
7744 }
7745
7746 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307747 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307748 msm_bolero_fe_dai_links,
7749 sizeof(msm_bolero_fe_dai_links));
7750 total_links +=
7751 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307752 }
7753
7754 memcpy(msm_sm6150_dai_links + total_links,
7755 msm_common_be_dai_links,
7756 sizeof(msm_common_be_dai_links));
7757
7758 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7759
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307760 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307761 memcpy(msm_sm6150_dai_links + total_links,
7762 msm_tavil_be_dai_links,
7763 sizeof(msm_tavil_be_dai_links));
7764 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7765 } else {
7766 memcpy(msm_sm6150_dai_links + total_links,
7767 msm_wsa_cdc_dma_be_dai_links,
7768 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307769 total_links +=
7770 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307771
7772 memcpy(msm_sm6150_dai_links + total_links,
7773 msm_rx_tx_cdc_dma_be_dai_links,
7774 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7775 total_links +=
7776 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7777 }
7778
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307779 rc = of_property_read_u32(dev->of_node,
7780 "qcom,ext-disp-audio-rx",
7781 &ext_disp_audio_intf);
7782 if (rc) {
7783 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307784 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307785 } else {
7786 if (auxpcm_audio_intf) {
7787 memcpy(msm_sm6150_dai_links + total_links,
7788 ext_disp_be_dai_link,
7789 sizeof(ext_disp_be_dai_link));
7790 total_links +=
7791 ARRAY_SIZE(ext_disp_be_dai_link);
7792 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307793 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307794
7795 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7796 &mi2s_audio_intf);
7797 if (rc) {
7798 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7799 __func__);
7800 } else {
7801 if (mi2s_audio_intf) {
7802 memcpy(msm_sm6150_dai_links + total_links,
7803 msm_mi2s_be_dai_links,
7804 sizeof(msm_mi2s_be_dai_links));
7805 total_links +=
7806 ARRAY_SIZE(msm_mi2s_be_dai_links);
7807 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307808 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307809
7810
7811 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7812 &wcn_btfm_intf);
7813 if (rc) {
7814 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7815 __func__);
7816 } else {
7817 if (wcn_btfm_intf) {
7818 memcpy(msm_sm6150_dai_links + total_links,
7819 msm_wcn_be_dai_links,
7820 sizeof(msm_wcn_be_dai_links));
7821 total_links +=
7822 ARRAY_SIZE(msm_wcn_be_dai_links);
7823 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307824 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307825
7826 rc = of_property_read_u32(dev->of_node,
7827 "qcom,auxpcm-audio-intf",
7828 &auxpcm_audio_intf);
7829 if (rc) {
7830 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7831 __func__);
7832 } else {
7833 if (auxpcm_audio_intf) {
7834 memcpy(msm_sm6150_dai_links + total_links,
7835 msm_auxpcm_be_dai_links,
7836 sizeof(msm_auxpcm_be_dai_links));
7837 total_links +=
7838 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7839 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307840 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307841
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307842 dailink = msm_sm6150_dai_links;
7843 } else if (!strcmp(match->data, "stub_codec")) {
7844 card = &snd_soc_card_stub_msm;
7845
7846 memcpy(msm_stub_dai_links + total_links,
7847 msm_stub_fe_dai_links,
7848 sizeof(msm_stub_fe_dai_links));
7849 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7850
7851 memcpy(msm_stub_dai_links + total_links,
7852 msm_stub_be_dai_links,
7853 sizeof(msm_stub_be_dai_links));
7854 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7855
7856 dailink = msm_stub_dai_links;
7857 }
7858
7859 if (card) {
7860 card->dai_link = dailink;
7861 card->num_links = total_links;
7862 }
7863
7864 return card;
7865}
7866
7867static int msm_wsa881x_init(struct snd_soc_component *component)
7868{
7869 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7870 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7871 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7872 SPKR_L_BOOST, SPKR_L_VI};
7873 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7874 SPKR_R_BOOST, SPKR_R_VI};
7875 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7876 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7877 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7878 struct msm_asoc_mach_data *pdata;
7879 struct snd_soc_dapm_context *dapm;
7880 int ret = 0;
7881
7882 if (!codec) {
7883 pr_err("%s codec is NULL\n", __func__);
7884 return -EINVAL;
7885 }
7886
7887 dapm = snd_soc_codec_get_dapm(codec);
7888
7889 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7890 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7891 __func__, codec->component.name);
7892 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7893 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7894 &ch_rate[0], &spkleft_port_types[0]);
7895 if (dapm->component) {
7896 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7897 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7898 }
7899 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7900 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7901 __func__, codec->component.name);
7902 wsa881x_set_channel_map(codec, &spkright_ports[0],
7903 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7904 &ch_rate[0], &spkright_port_types[0]);
7905 if (dapm->component) {
7906 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7907 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7908 }
7909 } else {
7910 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7911 codec->component.name);
7912 ret = -EINVAL;
7913 goto err;
7914 }
7915 pdata = snd_soc_card_get_drvdata(component->card);
7916 if (pdata && pdata->codec_root)
7917 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7918 codec);
7919
7920err:
7921 return ret;
7922}
7923
7924static int msm_aux_codec_init(struct snd_soc_component *component)
7925{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307926 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7927 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
7928
7929 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7930 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7931 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7932 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7933 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7934 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7935 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7936 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7937 snd_soc_dapm_sync(dapm);
7938
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307939 return 0;
7940}
7941
7942static int msm_init_aux_dev(struct platform_device *pdev,
7943 struct snd_soc_card *card)
7944{
7945 struct device_node *wsa_of_node;
7946 struct device_node *aux_codec_of_node;
7947 u32 wsa_max_devs;
7948 u32 wsa_dev_cnt;
7949 u32 codec_aux_dev_cnt = 0;
7950 int i;
7951 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7952 struct aux_codec_dev_info *aux_cdc_dev_info;
7953 const char *auxdev_name_prefix[1];
7954 char *dev_name_str = NULL;
7955 int found = 0;
7956 int codecs_found = 0;
7957 int ret = 0;
7958
7959 /* Get maximum WSA device count for this platform */
7960 ret = of_property_read_u32(pdev->dev.of_node,
7961 "qcom,wsa-max-devs", &wsa_max_devs);
7962 if (ret) {
7963 dev_info(&pdev->dev,
7964 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7965 __func__, pdev->dev.of_node->full_name, ret);
7966 wsa_max_devs = 0;
7967 goto codec_aux_dev;
7968 }
7969 if (wsa_max_devs == 0) {
7970 dev_warn(&pdev->dev,
7971 "%s: Max WSA devices is 0 for this target?\n",
7972 __func__);
7973 goto codec_aux_dev;
7974 }
7975
7976 /* Get count of WSA device phandles for this platform */
7977 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7978 "qcom,wsa-devs", NULL);
7979 if (wsa_dev_cnt == -ENOENT) {
7980 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7981 __func__);
7982 goto err;
7983 } else if (wsa_dev_cnt <= 0) {
7984 dev_err(&pdev->dev,
7985 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7986 __func__, wsa_dev_cnt);
7987 ret = -EINVAL;
7988 goto err;
7989 }
7990
7991 /*
7992 * Expect total phandles count to be NOT less than maximum possible
7993 * WSA count. However, if it is less, then assign same value to
7994 * max count as well.
7995 */
7996 if (wsa_dev_cnt < wsa_max_devs) {
7997 dev_dbg(&pdev->dev,
7998 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7999 __func__, wsa_max_devs, wsa_dev_cnt);
8000 wsa_max_devs = wsa_dev_cnt;
8001 }
8002
8003 /* Make sure prefix string passed for each WSA device */
8004 ret = of_property_count_strings(pdev->dev.of_node,
8005 "qcom,wsa-aux-dev-prefix");
8006 if (ret != wsa_dev_cnt) {
8007 dev_err(&pdev->dev,
8008 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8009 __func__, wsa_dev_cnt, ret);
8010 ret = -EINVAL;
8011 goto err;
8012 }
8013
8014 /*
8015 * Alloc mem to store phandle and index info of WSA device, if already
8016 * registered with ALSA core
8017 */
8018 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8019 sizeof(struct msm_wsa881x_dev_info),
8020 GFP_KERNEL);
8021 if (!wsa881x_dev_info) {
8022 ret = -ENOMEM;
8023 goto err;
8024 }
8025
8026 /*
8027 * search and check whether all WSA devices are already
8028 * registered with ALSA core or not. If found a node, store
8029 * the node and the index in a local array of struct for later
8030 * use.
8031 */
8032 for (i = 0; i < wsa_dev_cnt; i++) {
8033 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8034 "qcom,wsa-devs", i);
8035 if (unlikely(!wsa_of_node)) {
8036 /* we should not be here */
8037 dev_err(&pdev->dev,
8038 "%s: wsa dev node is not present\n",
8039 __func__);
8040 ret = -EINVAL;
8041 goto err;
8042 }
8043 if (soc_find_component(wsa_of_node, NULL)) {
8044 /* WSA device registered with ALSA core */
8045 wsa881x_dev_info[found].of_node = wsa_of_node;
8046 wsa881x_dev_info[found].index = i;
8047 found++;
8048 if (found == wsa_max_devs)
8049 break;
8050 }
8051 }
8052
8053 if (found < wsa_max_devs) {
8054 dev_dbg(&pdev->dev,
8055 "%s: failed to find %d components. Found only %d\n",
8056 __func__, wsa_max_devs, found);
8057 return -EPROBE_DEFER;
8058 }
8059 dev_info(&pdev->dev,
8060 "%s: found %d wsa881x devices registered with ALSA core\n",
8061 __func__, found);
8062
8063codec_aux_dev:
8064 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8065 /* Get count of aux codec device phandles for this platform */
8066 codec_aux_dev_cnt = of_count_phandle_with_args(
8067 pdev->dev.of_node,
8068 "qcom,codec-aux-devs", NULL);
8069 if (codec_aux_dev_cnt == -ENOENT) {
8070 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8071 __func__);
8072 goto err;
8073 } else if (codec_aux_dev_cnt <= 0) {
8074 dev_err(&pdev->dev,
8075 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8076 __func__, codec_aux_dev_cnt);
8077 ret = -EINVAL;
8078 goto err;
8079 }
8080
8081 /*
8082 * Alloc mem to store phandle and index info of aux codec
8083 * if already registered with ALSA core
8084 */
8085 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8086 sizeof(struct aux_codec_dev_info),
8087 GFP_KERNEL);
8088 if (!aux_cdc_dev_info) {
8089 ret = -ENOMEM;
8090 goto err;
8091 }
8092
8093 /*
8094 * search and check whether all aux codecs are already
8095 * registered with ALSA core or not. If found a node, store
8096 * the node and the index in a local array of struct for later
8097 * use.
8098 */
8099 for (i = 0; i < codec_aux_dev_cnt; i++) {
8100 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8101 "qcom,codec-aux-devs", i);
8102 if (unlikely(!aux_codec_of_node)) {
8103 /* we should not be here */
8104 dev_err(&pdev->dev,
8105 "%s: aux codec dev node is not present\n",
8106 __func__);
8107 ret = -EINVAL;
8108 goto err;
8109 }
8110 if (soc_find_component(aux_codec_of_node, NULL)) {
8111 /* AUX codec registered with ALSA core */
8112 aux_cdc_dev_info[codecs_found].of_node =
8113 aux_codec_of_node;
8114 aux_cdc_dev_info[codecs_found].index = i;
8115 codecs_found++;
8116 }
8117 }
8118
8119 if (codecs_found < codec_aux_dev_cnt) {
8120 dev_dbg(&pdev->dev,
8121 "%s: failed to find %d components. Found only %d\n",
8122 __func__, codec_aux_dev_cnt, codecs_found);
8123 return -EPROBE_DEFER;
8124 }
8125 dev_info(&pdev->dev,
8126 "%s: found %d AUX codecs registered with ALSA core\n",
8127 __func__, codecs_found);
8128
8129 }
8130
8131 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8132 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8133
8134 /* Alloc array of AUX devs struct */
8135 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8136 sizeof(struct snd_soc_aux_dev),
8137 GFP_KERNEL);
8138 if (!msm_aux_dev) {
8139 ret = -ENOMEM;
8140 goto err;
8141 }
8142
8143 /* Alloc array of codec conf struct */
8144 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8145 sizeof(struct snd_soc_codec_conf),
8146 GFP_KERNEL);
8147 if (!msm_codec_conf) {
8148 ret = -ENOMEM;
8149 goto err;
8150 }
8151
8152 for (i = 0; i < wsa_max_devs; i++) {
8153 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8154 GFP_KERNEL);
8155 if (!dev_name_str) {
8156 ret = -ENOMEM;
8157 goto err;
8158 }
8159
8160 ret = of_property_read_string_index(pdev->dev.of_node,
8161 "qcom,wsa-aux-dev-prefix",
8162 wsa881x_dev_info[i].index,
8163 auxdev_name_prefix);
8164 if (ret) {
8165 dev_err(&pdev->dev,
8166 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8167 __func__, ret);
8168 ret = -EINVAL;
8169 goto err;
8170 }
8171
8172 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8173 msm_aux_dev[i].name = dev_name_str;
8174 msm_aux_dev[i].codec_name = NULL;
8175 msm_aux_dev[i].codec_of_node =
8176 wsa881x_dev_info[i].of_node;
8177 msm_aux_dev[i].init = msm_wsa881x_init;
8178 msm_codec_conf[i].dev_name = NULL;
8179 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8180 msm_codec_conf[i].of_node =
8181 wsa881x_dev_info[i].of_node;
8182 }
8183
8184 for (i = 0; i < codec_aux_dev_cnt; i++) {
8185 msm_aux_dev[wsa_max_devs + i].name = NULL;
8186 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8187 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8188 aux_cdc_dev_info[i].of_node;
8189 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8190 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8191 msm_codec_conf[wsa_max_devs + i].name_prefix =
8192 NULL;
8193 msm_codec_conf[wsa_max_devs + i].of_node =
8194 aux_cdc_dev_info[i].of_node;
8195 }
8196
8197 card->codec_conf = msm_codec_conf;
8198 card->aux_dev = msm_aux_dev;
8199err:
8200 return ret;
8201}
8202
8203static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8204{
8205 int count;
8206 u32 mi2s_master_slave[MI2S_MAX];
8207 int ret;
8208
8209 for (count = 0; count < MI2S_MAX; count++) {
8210 mutex_init(&mi2s_intf_conf[count].lock);
8211 mi2s_intf_conf[count].ref_cnt = 0;
8212 }
8213
8214 ret = of_property_read_u32_array(pdev->dev.of_node,
8215 "qcom,msm-mi2s-master",
8216 mi2s_master_slave, MI2S_MAX);
8217 if (ret) {
8218 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8219 __func__);
8220 } else {
8221 for (count = 0; count < MI2S_MAX; count++) {
8222 mi2s_intf_conf[count].msm_is_mi2s_master =
8223 mi2s_master_slave[count];
8224 }
8225 }
8226}
8227
8228static void msm_i2s_auxpcm_deinit(void)
8229{
8230 int count;
8231
8232 for (count = 0; count < MI2S_MAX; count++) {
8233 mutex_destroy(&mi2s_intf_conf[count].lock);
8234 mi2s_intf_conf[count].ref_cnt = 0;
8235 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8236 }
8237}
8238static int msm_asoc_machine_probe(struct platform_device *pdev)
8239{
8240 struct snd_soc_card *card;
8241 struct msm_asoc_mach_data *pdata;
8242 const char *mbhc_audio_jack_type = NULL;
8243 int ret;
8244
8245 if (!pdev->dev.of_node) {
8246 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8247 return -EINVAL;
8248 }
8249
8250 pdata = devm_kzalloc(&pdev->dev,
8251 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8252 if (!pdata)
8253 return -ENOMEM;
8254
8255 card = populate_snd_card_dailinks(&pdev->dev);
8256 if (!card) {
8257 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8258 ret = -EINVAL;
8259 goto err;
8260 }
8261 card->dev = &pdev->dev;
8262 platform_set_drvdata(pdev, card);
8263 snd_soc_card_set_drvdata(card, pdata);
8264
8265 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8266 if (ret) {
8267 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8268 ret);
8269 goto err;
8270 }
8271
8272 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8273 if (ret) {
8274 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8275 ret);
8276 goto err;
8277 }
8278
8279 ret = msm_populate_dai_link_component_of_node(card);
8280 if (ret) {
8281 ret = -EPROBE_DEFER;
8282 goto err;
8283 }
8284
8285 ret = msm_init_aux_dev(pdev, card);
8286 if (ret)
8287 goto err;
8288
8289 ret = devm_snd_soc_register_card(&pdev->dev, card);
8290 if (ret == -EPROBE_DEFER) {
8291 if (codec_reg_done)
8292 ret = -EINVAL;
8293 goto err;
8294 } else if (ret) {
8295 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8296 ret);
8297 goto err;
8298 }
8299 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8300 spdev = pdev;
8301
8302 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8303 "qcom,hph-en1-gpio", 0);
8304 if (!pdata->hph_en1_gpio_p) {
8305 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8306 "qcom,hph-en1-gpio",
8307 pdev->dev.of_node->full_name);
8308 }
8309
8310 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8311 "qcom,hph-en0-gpio", 0);
8312 if (!pdata->hph_en0_gpio_p) {
8313 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8314 "qcom,hph-en0-gpio",
8315 pdev->dev.of_node->full_name);
8316 }
8317
8318 ret = of_property_read_string(pdev->dev.of_node,
8319 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8320 if (ret) {
8321 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8322 "qcom,mbhc-audio-jack-type",
8323 pdev->dev.of_node->full_name);
8324 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8325 } else {
8326 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8327 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8328 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8329 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8330 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8331 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8332 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8333 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8334 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8335 } else {
8336 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8337 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8338 }
8339 }
8340 /*
8341 * Parse US-Euro gpio info from DT. Report no error if us-euro
8342 * entry is not found in DT file as some targets do not support
8343 * US-Euro detection
8344 */
8345 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8346 "qcom,us-euro-gpios", 0);
8347 if (!pdata->us_euro_gpio_p) {
8348 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8349 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8350 } else {
8351 dev_dbg(&pdev->dev, "%s detected\n",
8352 "qcom,us-euro-gpios");
8353 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8354 }
8355 /* Parse pinctrl info from devicetree */
8356 ret = msm_get_pinctrl(pdev);
8357 if (!ret) {
8358 pr_debug("%s: pinctrl parsing successful\n", __func__);
8359 } else {
8360 dev_dbg(&pdev->dev,
8361 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8362 __func__, ret);
8363 ret = 0;
8364 }
8365
8366 msm_i2s_auxpcm_init(pdev);
8367 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8368 is_initial_boot = true;
8369 ret = audio_notifier_register("sm6150",
8370 AUDIO_NOTIFIER_ADSP_DOMAIN,
8371 &service_nb);
8372 if (ret < 0)
8373 pr_err("%s: Audio notifier register failed ret = %d\n",
8374 __func__, ret);
8375 } else {
8376 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8377 "qcom,cdc-dmic01-gpios",
8378 0);
8379 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8380 "qcom,cdc-dmic23-gpios",
8381 0);
8382 }
8383err:
8384 return ret;
8385}
8386
8387static int msm_asoc_machine_remove(struct platform_device *pdev)
8388{
8389 audio_notifier_deregister("sm6150");
8390 msm_i2s_auxpcm_deinit();
8391
8392 return 0;
8393}
8394
8395static struct platform_driver sm6150_asoc_machine_driver = {
8396 .driver = {
8397 .name = DRV_NAME,
8398 .owner = THIS_MODULE,
8399 .pm = &snd_soc_pm_ops,
8400 .of_match_table = sm6150_asoc_machine_of_match,
8401 },
8402 .probe = msm_asoc_machine_probe,
8403 .remove = msm_asoc_machine_remove,
8404};
8405module_platform_driver(sm6150_asoc_machine_driver);
8406
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308407MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308408MODULE_LICENSE("GPL v2");
8409MODULE_ALIAS("platform:" DRV_NAME);
8410MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);