Asish Bhattacharya | 8e2277f | 2017-07-20 18:31:55 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __CPE_SERVICES__ |
| 14 | #define __CPE_SERVICES__ |
| 15 | |
| 16 | #define CPE_IRQ_OUTBOX_IRQ 0x01 |
| 17 | #define CPE_IRQ_MEM_ACCESS_ERROR 0x02 |
| 18 | #define CPE_IRQ_WDOG_BITE 0x04 |
| 19 | #define CPE_IRQ_BUFFER_OVERFLOW 0x08 |
| 20 | #define CPE_IRQ_LAB_OVFUNF 0x10 |
| 21 | #define CPE_IRQ_FLL_LOCK_LOST 0x20 |
| 22 | #define CPE_IRQ_RCO_WDOG_INT 0x40 |
| 23 | |
| 24 | #define EFAILED (MAX_ERRNO - 1) |
| 25 | #define ENOTREADY (MAX_ERRNO - 2) |
| 26 | |
| 27 | #define MAX_SUPPORTED_CLKFREQ 8 |
| 28 | #define CPE_SVC_INIT_PARAM_V1 1 |
| 29 | |
| 30 | enum cpe_svc_result { |
| 31 | CPE_SVC_SUCCESS = 0, |
| 32 | CPE_SVC_FAILED = -EFAILED, |
| 33 | CPE_SVC_NO_MEMORY = -ENOMEM, |
| 34 | CPE_SVC_INVALID_HANDLE = -EINVAL, |
| 35 | CPE_SVC_NOT_READY = -ENOTREADY, |
| 36 | CPE_SVC_SHUTTING_DOWN = -ESHUTDOWN, |
| 37 | CPE_SVC_BUSY = -EBUSY, |
| 38 | }; |
| 39 | |
| 40 | enum cpe_svc_event { |
| 41 | CPE_SVC_CMI_MSG = 0x01, |
| 42 | CPE_SVC_OFFLINE = 0x02, |
| 43 | CPE_SVC_ONLINE = 0x04, |
| 44 | CPE_SVC_BOOT_FAILED = 0x08, |
| 45 | CPE_SVC_READ_COMPLETE = 0x10, |
| 46 | CPE_SVC_READ_ERROR = 0x20, |
| 47 | CPE_SVC_BOOT = 0x40, |
| 48 | CPE_SVC_CMI_CLIENTS_DEREG = 0x100, |
| 49 | CPE_SVC_EVENT_ANCHOR = 0x7FFF |
| 50 | }; |
| 51 | |
| 52 | enum cpe_svc_module { |
| 53 | CPE_SVC_LISTEN_PROC = 1, |
| 54 | CPE_SVC_MODULE_ANCHOR = 0x7F |
| 55 | }; |
| 56 | |
| 57 | enum cpe_svc_route_dest { |
| 58 | CPE_SVC_EXTERNAL = 1, |
| 59 | CPE_SVC_INTERNAL = 2, |
| 60 | CPE_SVC_ROUTE_ANCHOR = 0x7F |
| 61 | }; |
| 62 | |
| 63 | enum cpe_svc_mem_type { |
| 64 | CPE_SVC_DATA_MEM = 1, |
| 65 | CPE_SVC_INSTRUCTION_MEM = 2, |
| 66 | CPE_SVC_IPC_MEM = 3, |
| 67 | CPE_SVC_MEM_TYPE_ANCHOR = 0x7F |
| 68 | }; |
| 69 | |
| 70 | enum cpe_svc_codec_id { |
| 71 | CPE_SVC_CODEC_TOMTOM = 5, |
| 72 | CPE_SVC_CODEC_WCD9335 = 7, |
| 73 | CPE_SVC_CODEC_WCD9326 = 8, |
| 74 | CPE_SVC_CODEC_ID_ANCHOR = 0x7ffffff |
| 75 | }; |
| 76 | |
| 77 | enum cpe_svc_codec_version { |
| 78 | CPE_SVC_CODEC_V1P0 = 1, |
| 79 | CPE_SVC_CODEC_VERSION_ANCHOR = 0x7fffffff |
| 80 | }; |
| 81 | |
| 82 | struct cpe_svc_codec_info_v1 { |
| 83 | u16 major_version;/*must be 1*/ |
| 84 | u16 minor_version;/*must be 0*/ |
| 85 | u32 id; |
| 86 | u32 version; |
| 87 | /*Add 1.1 version fields after this line*/ |
| 88 | }; |
| 89 | |
| 90 | struct cpe_svc_notification { |
| 91 | enum cpe_svc_event event; |
| 92 | enum cpe_svc_result result; |
| 93 | void *payload; |
| 94 | void *private_data; |
| 95 | }; |
| 96 | |
| 97 | struct cpe_svc_msg_payload { |
| 98 | u8 *cmi_msg; |
| 99 | }; |
| 100 | |
| 101 | struct cpe_svc_read_complete { |
| 102 | u8 *buffer; |
| 103 | size_t size; |
| 104 | }; |
| 105 | |
| 106 | struct cpe_svc_boot_event { |
| 107 | u32 debug_address; |
| 108 | size_t debug_buffer_size; |
| 109 | u32 status; |
| 110 | }; |
| 111 | |
| 112 | struct cpe_svc_mem_segment { |
| 113 | enum cpe_svc_mem_type type; |
| 114 | u32 cpe_addr; |
| 115 | size_t size; |
| 116 | u8 *data; |
| 117 | }; |
| 118 | |
| 119 | struct cpe_svc_hw_cfg { |
| 120 | size_t DRAM_size; |
| 121 | u32 DRAM_offset; |
| 122 | size_t IRAM_size; |
| 123 | u32 IRAM_offset; |
| 124 | u8 inbox_size; |
| 125 | u8 outbox_size; |
| 126 | }; |
| 127 | |
| 128 | struct cpe_svc_cfg_clk_plan { |
| 129 | u32 current_clk_feq; |
| 130 | u32 num_clk_freqs; |
| 131 | u32 clk_freqs[MAX_SUPPORTED_CLKFREQ]; |
| 132 | }; |
| 133 | |
| 134 | struct cpe_svc_init_param { |
| 135 | void *context; |
| 136 | u32 version; |
| 137 | void (*query_freq_plans_cb)(void *cdc_priv, |
| 138 | struct cpe_svc_cfg_clk_plan *clk_freq); |
| 139 | void (*change_freq_plan_cb)(void *cdc_priv, |
| 140 | u32 clk_freq); |
| 141 | }; |
| 142 | |
| 143 | |
| 144 | void *cpe_svc_initialize( |
| 145 | void irq_control_callback(u32 enable), |
| 146 | const void *codec_info, void *context); |
| 147 | enum cpe_svc_result cpe_svc_deinitialize(void *cpe_handle); |
| 148 | |
| 149 | void *cpe_svc_register(void *cpe_handle, |
| 150 | void (*notification_callback)( |
| 151 | const struct cpe_svc_notification *parameter), |
| 152 | u32 mask, const char *name); |
| 153 | |
| 154 | enum cpe_svc_result cpe_svc_deregister(void *cpe_handle, void *reg_handle); |
| 155 | |
| 156 | enum cpe_svc_result cpe_svc_download_segment(void *cpe_handle, |
| 157 | const struct cpe_svc_mem_segment *segment); |
| 158 | |
| 159 | enum cpe_svc_result cpe_svc_boot(void *cpe_handle, int debug_mode); |
| 160 | |
| 161 | enum cpe_svc_result cpe_svc_shutdown(void *cpe_handle); |
| 162 | |
| 163 | enum cpe_svc_result cpe_svc_reset(void *cpe_handle); |
| 164 | |
| 165 | enum cpe_svc_result cpe_svc_process_irq(void *cpe_handle, u32 cpe_irq); |
| 166 | |
| 167 | enum cpe_svc_result |
| 168 | cpe_svc_route_notification(void *cpe_handle, enum cpe_svc_module module, |
| 169 | enum cpe_svc_route_dest dest); |
| 170 | |
| 171 | enum cpe_svc_result cpe_svc_ramdump(void *cpe_handle, |
| 172 | struct cpe_svc_mem_segment *buffer); |
| 173 | |
| 174 | enum cpe_svc_result cpe_svc_set_debug_mode(void *cpe_handle, u32 mode); |
| 175 | |
| 176 | const struct cpe_svc_hw_cfg *cpe_svc_get_hw_cfg(void *cpe_handle); |
| 177 | enum cpe_svc_result cpe_svc_toggle_lab(void *cpe_handle, bool enable); |
| 178 | enum cpe_svc_result cpe_svc_ftm_test(void *cpe_handle, u32 *status); |
| 179 | #endif /*__CPE_SERVICES__*/ |