Soumya Managoli | 9d62724 | 2018-02-24 16:13:25 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/clk.h> |
| 14 | #include <linux/gpio.h> |
| 15 | #include <linux/of_gpio.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/workqueue.h> |
| 20 | #include <sound/core.h> |
| 21 | #include <sound/soc.h> |
| 22 | #include <sound/soc-dapm.h> |
| 23 | #include <sound/pcm.h> |
| 24 | #include <sound/jack.h> |
| 25 | #include <dsp/q6afe-v2.h> |
| 26 | #include <dsp/q6core.h> |
| 27 | #include <sound/pcm_params.h> |
| 28 | #include <sound/info.h> |
| 29 | #include <soc/qcom/socinfo.h> |
| 30 | #include <linux/input.h> |
| 31 | #include "msm-pcm-routing-v2.h" |
| 32 | #include "codecs/msm-cdc-pinctrl.h" |
| 33 | #include "codecs/wcd9335.h" |
| 34 | #include "codecs/wcd-mbhc-v2.h" |
| 35 | #include "codecs/wsa881x.h" |
| 36 | #include "msm8952-slimbus.h" |
| 37 | |
| 38 | #define DRV_NAME "msm8952-slimbus-wcd" |
| 39 | |
| 40 | #define BTSCO_RATE_8KHZ 8000 |
| 41 | #define BTSCO_RATE_16KHZ 16000 |
| 42 | #define SAMPLING_RATE_8KHZ 8000 |
| 43 | #define SAMPLING_RATE_16KHZ 16000 |
| 44 | #define SAMPLING_RATE_32KHZ 32000 |
| 45 | #define SAMPLING_RATE_48KHZ 48000 |
| 46 | #define SAMPLING_RATE_96KHZ 96000 |
| 47 | #define SAMPLING_RATE_192KHZ 192000 |
| 48 | #define SAMPLING_RATE_44P1KHZ 44100 |
| 49 | |
| 50 | #define MSM8952_SPK_ON 1 |
| 51 | #define MSM8952_SPK_OFF 0 |
| 52 | |
| 53 | #define WCD9XXX_MBHC_DEF_BUTTONS 8 |
| 54 | #define WCD9XXX_MBHC_DEF_RLOADS 5 |
| 55 | #define CODEC_EXT_CLK_RATE 9600000 |
| 56 | |
| 57 | #define PRI_MI2S_ID (1 << 0) |
| 58 | #define SEC_MI2S_ID (1 << 1) |
| 59 | #define TER_MI2S_ID (1 << 2) |
| 60 | #define QUAT_MI2S_ID (1 << 3) |
| 61 | #define QUIN_MI2S_ID (1 << 4) |
| 62 | |
| 63 | #define HS_STARTWORK_TIMEOUT 4000 |
| 64 | |
| 65 | #define Q6AFE_LPASS_OSR_CLK_9_P600_MHZ 0x927C00 |
| 66 | #define MAX_AUX_CODECS 4 |
| 67 | |
| 68 | #define WSA8810_NAME_1 "wsa881x.20170211" |
| 69 | #define WSA8810_NAME_2 "wsa881x.20170212" |
| 70 | |
| 71 | #define TDM_SLOT_OFFSET_MAX 8 |
| 72 | |
| 73 | enum btsco_rates { |
| 74 | RATE_8KHZ_ID, |
| 75 | RATE_16KHZ_ID, |
| 76 | }; |
| 77 | |
| 78 | enum { |
| 79 | PRIMARY_TDM_RX_0, |
| 80 | PRIMARY_TDM_TX_0, |
| 81 | SECONDARY_TDM_RX_0, |
| 82 | SECONDARY_TDM_TX_0, |
| 83 | TDM_MAX, |
| 84 | }; |
| 85 | |
| 86 | static int slim0_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 87 | static int slim0_tx_sample_rate = SAMPLING_RATE_48KHZ; |
| 88 | static int slim1_tx_sample_rate = SAMPLING_RATE_48KHZ; |
| 89 | static int slim2_tx_sample_rate = SAMPLING_RATE_48KHZ; |
| 90 | static int slim0_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 91 | static int slim0_tx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 92 | static int slim1_tx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 93 | static int slim2_tx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 94 | static int msm_slim_0_rx_ch = 1; |
| 95 | static int msm_slim_0_tx_ch = 1; |
| 96 | static int msm_slim_1_tx_ch = 1; |
| 97 | static int msm_slim_2_tx_ch = 1; |
| 98 | static int msm_vi_feed_tx_ch = 2; |
| 99 | static int msm_slim_5_rx_ch = 1; |
| 100 | static int msm_slim_6_rx_ch = 1; |
| 101 | static int slim5_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 102 | static int slim5_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 103 | static int slim6_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 104 | static int slim6_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 105 | static int msm8952_auxpcm_rate = SAMPLING_RATE_8KHZ; |
| 106 | static int slim4_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 107 | static int slim4_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 108 | static int msm_slim_4_rx_ch = 1; |
| 109 | static int msm_btsco_rate = SAMPLING_RATE_8KHZ; |
| 110 | static int msm_btsco_ch = 1; |
| 111 | static int msm8952_spk_control = 1; |
| 112 | |
| 113 | static bool codec_reg_done; |
| 114 | |
| 115 | static int mi2s_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 116 | |
| 117 | static int msm_proxy_rx_ch = 2; |
| 118 | static void *adsp_state_notifier; |
| 119 | |
| 120 | /* TDM default channels */ |
| 121 | static int msm_pri_tdm_rx_0_ch = 8; |
| 122 | static int msm_pri_tdm_tx_0_ch = 8; |
| 123 | |
| 124 | static int msm_sec_tdm_rx_0_ch = 8; |
| 125 | static int msm_sec_tdm_tx_0_ch = 8; |
| 126 | |
| 127 | /* TDM default bit format */ |
| 128 | static int msm_pri_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 129 | static int msm_pri_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 130 | |
| 131 | static int msm_sec_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 132 | static int msm_sec_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 133 | |
| 134 | /* TDM default sampling rate */ |
| 135 | static int msm_pri_tdm_rx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 136 | static int msm_pri_tdm_tx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 137 | |
| 138 | static int msm_sec_tdm_rx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 139 | static int msm_sec_tdm_tx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 140 | |
| 141 | static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four", |
| 142 | "Five", "Six", "Seven", "Eight"}; |
| 143 | static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE", |
| 144 | "S32_LE"}; |
| 145 | static char const *tdm_sample_rate_text[] = {"KHZ_16", "KHZ_48"}; |
| 146 | |
| 147 | /* TDM default offset */ |
| 148 | static unsigned int tdm_slot_offset[TDM_MAX][TDM_SLOT_OFFSET_MAX] = { |
| 149 | /* PRI_TDM_RX */ |
| 150 | {0, 4, 8, 12, 16, 20, 24, 28}, |
| 151 | /* PRI_TDM_TX */ |
| 152 | {0, 4, 8, 12, 16, 20, 24, 28}, |
| 153 | /* SEC_TDM_RX */ |
| 154 | {0, 4, 8, 12, 16, 20, 24, 28}, |
| 155 | /* SEC_TDM_TX */ |
| 156 | {0, 4, 8, 12, 16, 20, 24, 28}, |
| 157 | }; |
| 158 | |
| 159 | static int msm8952_enable_codec_mclk(struct snd_soc_codec *codec, int enable, |
| 160 | bool dapm); |
| 161 | |
| 162 | static struct wcd_mbhc_config wcd_mbhc_cfg = { |
| 163 | .read_fw_bin = false, |
| 164 | .calibration = NULL, |
| 165 | .detect_extn_cable = true, |
| 166 | .mono_stero_detection = false, |
| 167 | .swap_gnd_mic = NULL, |
| 168 | .hs_ext_micbias = true, |
| 169 | .key_code[0] = KEY_MEDIA, |
| 170 | .key_code[1] = KEY_VOICECOMMAND, |
| 171 | .key_code[2] = KEY_VOLUMEUP, |
| 172 | .key_code[3] = KEY_VOLUMEDOWN, |
| 173 | .key_code[4] = 0, |
| 174 | .key_code[5] = 0, |
| 175 | .key_code[6] = 0, |
| 176 | .key_code[7] = 0, |
| 177 | .linein_th = 5000, |
| 178 | }; |
| 179 | |
| 180 | static void *def_tasha_mbhc_cal(void) |
| 181 | { |
| 182 | void *tasha_wcd_cal; |
| 183 | struct wcd_mbhc_btn_detect_cfg *btn_cfg; |
| 184 | u16 *btn_high; |
| 185 | |
| 186 | tasha_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS, |
| 187 | WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL); |
| 188 | if (!tasha_wcd_cal) |
| 189 | return NULL; |
| 190 | |
| 191 | #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(tasha_wcd_cal)->X) = (Y)) |
jinjiawu | ea34575 | 2020-05-14 18:02:21 +0800 | [diff] [blame] | 192 | S(v_hs_max, 1600); |
Soumya Managoli | 9d62724 | 2018-02-24 16:13:25 +0530 | [diff] [blame] | 193 | #undef S |
| 194 | #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(tasha_wcd_cal)->X) = (Y)) |
| 195 | S(num_btn, WCD_MBHC_DEF_BUTTONS); |
| 196 | #undef S |
| 197 | |
| 198 | btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(tasha_wcd_cal); |
| 199 | btn_high = ((void *)&btn_cfg->_v_btn_low) + |
| 200 | (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn); |
| 201 | |
jinjiawu | ea34575 | 2020-05-14 18:02:21 +0800 | [diff] [blame] | 202 | //[FairPhone][jinjia]=2019.01.23=Adjust the voltage range threshold for headset multi-key detection. -s |
| 203 | #if 1 |
| 204 | btn_high[0] = 75; |
| 205 | btn_high[1] = 125; |
| 206 | btn_high[2] = 237; |
| 207 | btn_high[3] = 450; |
| 208 | btn_high[4] = 450; |
| 209 | btn_high[5] = 450; |
| 210 | btn_high[6] = 450; |
| 211 | btn_high[7] = 450; |
| 212 | #else |
Soumya Managoli | 9d62724 | 2018-02-24 16:13:25 +0530 | [diff] [blame] | 213 | btn_high[0] = 75; |
| 214 | btn_high[1] = 150; |
| 215 | btn_high[2] = 237; |
| 216 | btn_high[3] = 450; |
| 217 | btn_high[4] = 450; |
| 218 | btn_high[5] = 450; |
| 219 | btn_high[6] = 450; |
| 220 | btn_high[7] = 450; |
jinjiawu | ea34575 | 2020-05-14 18:02:21 +0800 | [diff] [blame] | 221 | #endif |
| 222 | //[FairPhone][jinjia]=2019.01.23=Adjust the voltage range threshold for headset multi-key detection. -e |
| 223 | |
Soumya Managoli | 9d62724 | 2018-02-24 16:13:25 +0530 | [diff] [blame] | 224 | |
| 225 | return tasha_wcd_cal; |
| 226 | } |
| 227 | |
| 228 | static struct afe_clk_set mi2s_tx_clk = { |
| 229 | AFE_API_VERSION_I2S_CONFIG, |
| 230 | Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT, |
| 231 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| 232 | Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| 233 | Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 234 | 0, |
| 235 | }; |
| 236 | |
| 237 | static struct afe_clk_set mi2s_rx_clk = { |
| 238 | AFE_API_VERSION_I2S_CONFIG, |
| 239 | Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, |
| 240 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, |
| 241 | Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, |
| 242 | Q6AFE_LPASS_CLK_ROOT_DEFAULT, |
| 243 | 0, |
| 244 | }; |
| 245 | |
| 246 | struct msm895x_auxcodec_prefix_map { |
| 247 | char codec_name[50]; |
| 248 | char codec_prefix[25]; |
| 249 | }; |
| 250 | |
| 251 | static inline int param_is_mask(int p) |
| 252 | { |
| 253 | return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) && |
| 254 | (p <= SNDRV_PCM_HW_PARAM_LAST_MASK); |
| 255 | } |
| 256 | |
| 257 | static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p, int n) |
| 258 | { |
| 259 | return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]); |
| 260 | } |
| 261 | |
| 262 | int msm895x_wsa881x_init(struct snd_soc_component *component) |
| 263 | { |
| 264 | u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106}; |
| 265 | u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107}; |
| 266 | unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200}; |
| 267 | unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3}; |
| 268 | struct snd_soc_codec *codec = snd_soc_component_to_codec(component); |
| 269 | struct msm8952_asoc_mach_data *pdata; |
| 270 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
| 271 | |
| 272 | if (!codec) { |
| 273 | pr_err("%s codec is NULL\n", __func__); |
| 274 | return -EINVAL; |
| 275 | } |
| 276 | |
| 277 | if (!strcmp(component->name_prefix, "SpkrLeft")) { |
| 278 | dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n", |
| 279 | __func__, codec->component.name); |
| 280 | wsa881x_set_channel_map(codec, &spkleft_ports[0], |
| 281 | WSA881X_MAX_SWR_PORTS, &ch_mask[0], |
| 282 | &ch_rate[0]); |
| 283 | if (dapm->component) { |
| 284 | snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN"); |
| 285 | snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR"); |
| 286 | } |
| 287 | } else if (!strcmp(component->name_prefix, "SpkrRight")) { |
| 288 | dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n", |
| 289 | __func__, codec->component.name); |
| 290 | wsa881x_set_channel_map(codec, &spkright_ports[0], |
| 291 | WSA881X_MAX_SWR_PORTS, &ch_mask[0], |
| 292 | &ch_rate[0]); |
| 293 | if (dapm->component) { |
| 294 | snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN"); |
| 295 | snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR"); |
| 296 | } |
| 297 | } else { |
| 298 | dev_err(codec->dev, "%s: wrong codec name %s\n", __func__, |
| 299 | codec->component.name); |
| 300 | return -EINVAL; |
| 301 | } |
| 302 | |
| 303 | |
| 304 | pdata = snd_soc_card_get_drvdata(component->card); |
| 305 | if (pdata && pdata->codec_root) |
| 306 | wsa881x_codec_info_create_codec_entry(pdata->codec_root, |
| 307 | codec); |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit) |
| 312 | { |
| 313 | if (bit >= SNDRV_MASK_MAX) |
| 314 | return; |
| 315 | if (param_is_mask(n)) { |
| 316 | struct snd_mask *m = param_to_mask(p, n); |
| 317 | |
| 318 | m->bits[0] = 0; |
| 319 | m->bits[1] = 0; |
| 320 | m->bits[bit >> 5] |= (1 << (bit & 31)); |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | static void msm8952_ext_control(struct snd_soc_codec *codec) |
| 325 | { |
| 326 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
| 327 | |
| 328 | pr_debug("%s: msm8952_spk_control = %d\n", |
| 329 | __func__, msm8952_spk_control); |
| 330 | if (msm8952_spk_control == MSM8952_SPK_ON) { |
| 331 | snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp"); |
| 332 | snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp"); |
| 333 | } else { |
| 334 | snd_soc_dapm_disable_pin(dapm, "Lineout_1 amp"); |
| 335 | snd_soc_dapm_disable_pin(dapm, "Lineout_3 amp"); |
| 336 | } |
| 337 | snd_soc_dapm_sync(dapm); |
| 338 | } |
| 339 | |
| 340 | static int msm8952_get_spk(struct snd_kcontrol *kcontrol, |
| 341 | struct snd_ctl_elem_value *ucontrol) |
| 342 | { |
| 343 | pr_debug("%s: msm8952_spk_control = %d\n", |
| 344 | __func__, msm8952_spk_control); |
| 345 | ucontrol->value.integer.value[0] = msm8952_spk_control; |
| 346 | return 0; |
| 347 | } |
| 348 | |
| 349 | static int msm8952_set_spk(struct snd_kcontrol *kcontrol, |
| 350 | struct snd_ctl_elem_value *ucontrol) |
| 351 | { |
| 352 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
| 353 | |
| 354 | pr_debug("%s()\n", __func__); |
| 355 | if (msm8952_spk_control == ucontrol->value.integer.value[0]) |
| 356 | return 0; |
| 357 | |
| 358 | msm8952_spk_control = ucontrol->value.integer.value[0]; |
| 359 | msm8952_ext_control(codec); |
| 360 | return 1; |
| 361 | } |
| 362 | |
| 363 | |
| 364 | static int msm8952_enable_codec_mclk(struct snd_soc_codec *codec, int enable, |
| 365 | bool dapm) |
| 366 | { |
| 367 | struct snd_soc_card *card = codec->component.card; |
| 368 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 369 | |
| 370 | pr_debug("%s: enable = %d\n", __func__, enable); |
| 371 | |
| 372 | if (!strcmp(dev_name(pdata->codec->dev), "tasha_codec")) |
| 373 | tasha_cdc_mclk_enable(codec, enable, dapm); |
| 374 | |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | static int slim5_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 379 | struct snd_ctl_elem_value *ucontrol) |
| 380 | { |
| 381 | int sample_rate_val = 0; |
| 382 | |
| 383 | switch (slim5_rx_sample_rate) { |
| 384 | case SAMPLING_RATE_44P1KHZ: |
| 385 | sample_rate_val = 3; |
| 386 | break; |
| 387 | |
| 388 | case SAMPLING_RATE_192KHZ: |
| 389 | sample_rate_val = 2; |
| 390 | break; |
| 391 | |
| 392 | case SAMPLING_RATE_96KHZ: |
| 393 | sample_rate_val = 1; |
| 394 | break; |
| 395 | |
| 396 | case SAMPLING_RATE_48KHZ: |
| 397 | default: |
| 398 | sample_rate_val = 0; |
| 399 | break; |
| 400 | } |
| 401 | |
| 402 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 403 | pr_debug("%s: slim5_rx_sample_rate = %d\n", __func__, |
| 404 | slim5_rx_sample_rate); |
| 405 | |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | static int slim5_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 410 | struct snd_ctl_elem_value *ucontrol) |
| 411 | { |
| 412 | pr_debug("%s: ucontrol value = %ld\n", __func__, |
| 413 | ucontrol->value.integer.value[0]); |
| 414 | |
| 415 | switch (ucontrol->value.integer.value[0]) { |
| 416 | case 3: |
| 417 | slim5_rx_sample_rate = SAMPLING_RATE_44P1KHZ; |
| 418 | break; |
| 419 | case 2: |
| 420 | slim5_rx_sample_rate = SAMPLING_RATE_192KHZ; |
| 421 | break; |
| 422 | case 1: |
| 423 | slim5_rx_sample_rate = SAMPLING_RATE_96KHZ; |
| 424 | break; |
| 425 | case 0: |
| 426 | default: |
| 427 | slim5_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 428 | } |
| 429 | |
| 430 | pr_debug("%s: slim5_rx_sample_rate = %d\n", __func__, |
| 431 | slim5_rx_sample_rate); |
| 432 | |
| 433 | return 0; |
| 434 | } |
| 435 | |
| 436 | static int mi2s_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 437 | struct snd_ctl_elem_value *ucontrol) |
| 438 | { |
| 439 | |
| 440 | switch (mi2s_rx_bit_format) { |
| 441 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 442 | ucontrol->value.integer.value[0] = 2; |
| 443 | break; |
| 444 | |
| 445 | case SNDRV_PCM_FORMAT_S24_LE: |
| 446 | ucontrol->value.integer.value[0] = 1; |
| 447 | break; |
| 448 | |
| 449 | case SNDRV_PCM_FORMAT_S16_LE: |
| 450 | default: |
| 451 | ucontrol->value.integer.value[0] = 0; |
| 452 | break; |
| 453 | } |
| 454 | |
| 455 | pr_debug("%s: mi2s_rx_bit_format = %d, ucontrol value = %ld\n", |
| 456 | __func__, mi2s_rx_bit_format, |
| 457 | ucontrol->value.integer.value[0]); |
| 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | static int mi2s_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 463 | struct snd_ctl_elem_value *ucontrol) |
| 464 | { |
| 465 | switch (ucontrol->value.integer.value[0]) { |
| 466 | case 2: |
| 467 | mi2s_rx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 468 | break; |
| 469 | case 1: |
| 470 | mi2s_rx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 471 | break; |
| 472 | case 0: |
| 473 | default: |
| 474 | mi2s_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 475 | break; |
| 476 | } |
| 477 | return 0; |
| 478 | } |
| 479 | |
| 480 | static int msm_slim_1_tx_ch_get(struct snd_kcontrol *kcontrol, |
| 481 | struct snd_ctl_elem_value *ucontrol) |
| 482 | { |
| 483 | pr_debug("%s: msm_slim_1_tx_ch = %d\n", __func__, |
| 484 | msm_slim_1_tx_ch); |
| 485 | ucontrol->value.integer.value[0] = msm_slim_1_tx_ch - 1; |
| 486 | return 0; |
| 487 | } |
| 488 | |
| 489 | static int msm_slim_1_tx_ch_put(struct snd_kcontrol *kcontrol, |
| 490 | struct snd_ctl_elem_value *ucontrol) |
| 491 | { |
| 492 | msm_slim_1_tx_ch = ucontrol->value.integer.value[0] + 1; |
| 493 | |
| 494 | pr_debug("%s: msm_slim_1_tx_ch = %d\n", __func__, msm_slim_1_tx_ch); |
| 495 | return 1; |
| 496 | } |
| 497 | |
| 498 | static int slim0_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 499 | struct snd_ctl_elem_value *ucontrol) |
| 500 | { |
| 501 | int sample_rate_val = 0; |
| 502 | |
| 503 | switch (slim0_rx_sample_rate) { |
| 504 | case SAMPLING_RATE_44P1KHZ: |
| 505 | sample_rate_val = 3; |
| 506 | break; |
| 507 | |
| 508 | case SAMPLING_RATE_192KHZ: |
| 509 | sample_rate_val = 2; |
| 510 | break; |
| 511 | |
| 512 | case SAMPLING_RATE_96KHZ: |
| 513 | sample_rate_val = 1; |
| 514 | break; |
| 515 | |
| 516 | case SAMPLING_RATE_48KHZ: |
| 517 | default: |
| 518 | sample_rate_val = 0; |
| 519 | break; |
| 520 | } |
| 521 | |
| 522 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 523 | pr_debug("%s: slim0_rx_sample_rate = %d\n", __func__, |
| 524 | slim0_rx_sample_rate); |
| 525 | |
| 526 | return 0; |
| 527 | } |
| 528 | |
| 529 | static int slim0_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 530 | struct snd_ctl_elem_value *ucontrol) |
| 531 | { |
| 532 | pr_debug("%s: ucontrol value = %ld\n", __func__, |
| 533 | ucontrol->value.integer.value[0]); |
| 534 | |
| 535 | switch (ucontrol->value.integer.value[0]) { |
| 536 | case 3: |
| 537 | slim0_rx_sample_rate = SAMPLING_RATE_44P1KHZ; |
| 538 | break; |
| 539 | case 2: |
| 540 | slim0_rx_sample_rate = SAMPLING_RATE_192KHZ; |
| 541 | break; |
| 542 | case 1: |
| 543 | slim0_rx_sample_rate = SAMPLING_RATE_96KHZ; |
| 544 | break; |
| 545 | case 0: |
| 546 | default: |
| 547 | slim0_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 548 | } |
| 549 | |
| 550 | pr_debug("%s: slim0_rx_sample_rate = %d\n", __func__, |
| 551 | slim0_rx_sample_rate); |
| 552 | |
| 553 | return 0; |
| 554 | } |
| 555 | |
| 556 | static int slim4_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 557 | struct snd_ctl_elem_value *ucontrol) |
| 558 | { |
| 559 | int sample_rate_val = 0; |
| 560 | |
| 561 | switch (slim4_rx_sample_rate) { |
| 562 | case SAMPLING_RATE_16KHZ: |
| 563 | sample_rate_val = 4; |
| 564 | break; |
| 565 | case SAMPLING_RATE_44P1KHZ: |
| 566 | sample_rate_val = 3; |
| 567 | break; |
| 568 | |
| 569 | case SAMPLING_RATE_192KHZ: |
| 570 | sample_rate_val = 2; |
| 571 | break; |
| 572 | |
| 573 | case SAMPLING_RATE_96KHZ: |
| 574 | sample_rate_val = 1; |
| 575 | break; |
| 576 | |
| 577 | case SAMPLING_RATE_48KHZ: |
| 578 | default: |
| 579 | sample_rate_val = 0; |
| 580 | break; |
| 581 | } |
| 582 | |
| 583 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 584 | pr_debug("%s: slim4_rx_sample_rate = %d\n", __func__, |
| 585 | slim4_rx_sample_rate); |
| 586 | |
| 587 | return 0; |
| 588 | } |
| 589 | |
| 590 | static int slim4_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 591 | struct snd_ctl_elem_value *ucontrol) |
| 592 | { |
| 593 | pr_debug("%s: ucontrol value = %ld\n", __func__, |
| 594 | ucontrol->value.integer.value[0]); |
| 595 | |
| 596 | switch (ucontrol->value.integer.value[0]) { |
| 597 | case 4: |
| 598 | slim4_rx_sample_rate = SAMPLING_RATE_16KHZ; |
| 599 | break; |
| 600 | case 3: |
| 601 | slim4_rx_sample_rate = SAMPLING_RATE_44P1KHZ; |
| 602 | break; |
| 603 | case 2: |
| 604 | slim4_rx_sample_rate = SAMPLING_RATE_192KHZ; |
| 605 | break; |
| 606 | case 1: |
| 607 | slim4_rx_sample_rate = SAMPLING_RATE_96KHZ; |
| 608 | break; |
| 609 | case 0: |
| 610 | default: |
| 611 | slim4_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 612 | } |
| 613 | |
| 614 | pr_debug("%s: slim4_rx_sample_rate = %d\n", __func__, |
| 615 | slim4_rx_sample_rate); |
| 616 | |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | static int slim5_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 621 | struct snd_ctl_elem_value *ucontrol) |
| 622 | { |
| 623 | |
| 624 | switch (slim5_rx_bit_format) { |
| 625 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 626 | ucontrol->value.integer.value[0] = 2; |
| 627 | break; |
| 628 | |
| 629 | case SNDRV_PCM_FORMAT_S24_LE: |
| 630 | ucontrol->value.integer.value[0] = 1; |
| 631 | break; |
| 632 | |
| 633 | case SNDRV_PCM_FORMAT_S16_LE: |
| 634 | default: |
| 635 | ucontrol->value.integer.value[0] = 0; |
| 636 | break; |
| 637 | } |
| 638 | |
| 639 | pr_debug("%s: slim5_rx_bit_format = %d, ucontrol value = %ld\n", |
| 640 | __func__, slim5_rx_bit_format, |
| 641 | ucontrol->value.integer.value[0]); |
| 642 | |
| 643 | return 0; |
| 644 | } |
| 645 | |
| 646 | static int slim5_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 647 | struct snd_ctl_elem_value *ucontrol) |
| 648 | { |
| 649 | switch (ucontrol->value.integer.value[0]) { |
| 650 | case 2: |
| 651 | slim5_rx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 652 | break; |
| 653 | case 1: |
| 654 | slim5_rx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 655 | break; |
| 656 | case 0: |
| 657 | default: |
| 658 | slim5_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 659 | break; |
| 660 | } |
| 661 | return 0; |
| 662 | } |
| 663 | static int slim6_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 664 | struct snd_ctl_elem_value *ucontrol) |
| 665 | { |
| 666 | |
| 667 | switch (slim6_rx_bit_format) { |
| 668 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 669 | ucontrol->value.integer.value[0] = 2; |
| 670 | break; |
| 671 | |
| 672 | case SNDRV_PCM_FORMAT_S24_LE: |
| 673 | ucontrol->value.integer.value[0] = 1; |
| 674 | break; |
| 675 | |
| 676 | case SNDRV_PCM_FORMAT_S16_LE: |
| 677 | default: |
| 678 | ucontrol->value.integer.value[0] = 0; |
| 679 | break; |
| 680 | } |
| 681 | |
| 682 | pr_debug("%s: slim6_rx_bit_format = %d, ucontrol value = %ld\n", |
| 683 | __func__, slim6_rx_bit_format, |
| 684 | ucontrol->value.integer.value[0]); |
| 685 | |
| 686 | return 0; |
| 687 | } |
| 688 | |
| 689 | static int slim6_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 690 | struct snd_ctl_elem_value *ucontrol) |
| 691 | { |
| 692 | switch (ucontrol->value.integer.value[0]) { |
| 693 | case 2: |
| 694 | slim6_rx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 695 | break; |
| 696 | case 1: |
| 697 | slim6_rx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 698 | break; |
| 699 | case 0: |
| 700 | default: |
| 701 | slim6_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 702 | break; |
| 703 | } |
| 704 | return 1; |
| 705 | } |
| 706 | static int slim6_rx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 707 | struct snd_ctl_elem_value *ucontrol) |
| 708 | { |
| 709 | int sample_rate_val = 0; |
| 710 | |
| 711 | switch (slim6_rx_sample_rate) { |
| 712 | case SAMPLING_RATE_44P1KHZ: |
| 713 | sample_rate_val = 3; |
| 714 | break; |
| 715 | |
| 716 | case SAMPLING_RATE_192KHZ: |
| 717 | sample_rate_val = 2; |
| 718 | break; |
| 719 | |
| 720 | case SAMPLING_RATE_96KHZ: |
| 721 | sample_rate_val = 1; |
| 722 | break; |
| 723 | |
| 724 | case SAMPLING_RATE_48KHZ: |
| 725 | default: |
| 726 | sample_rate_val = 0; |
| 727 | break; |
| 728 | } |
| 729 | |
| 730 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 731 | pr_debug("%s: slim6_rx_sample_rate = %d\n", __func__, |
| 732 | slim6_rx_sample_rate); |
| 733 | |
| 734 | return 0; |
| 735 | } |
| 736 | |
| 737 | static int slim6_rx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 738 | struct snd_ctl_elem_value *ucontrol) |
| 739 | { |
| 740 | switch (ucontrol->value.integer.value[0]) { |
| 741 | case 3: |
| 742 | slim6_rx_sample_rate = SAMPLING_RATE_44P1KHZ; |
| 743 | break; |
| 744 | case 2: |
| 745 | slim6_rx_sample_rate = SAMPLING_RATE_192KHZ; |
| 746 | break; |
| 747 | case 1: |
| 748 | slim6_rx_sample_rate = SAMPLING_RATE_96KHZ; |
| 749 | break; |
| 750 | case 0: |
| 751 | default: |
| 752 | slim6_rx_sample_rate = SAMPLING_RATE_48KHZ; |
| 753 | break; |
| 754 | } |
| 755 | |
| 756 | pr_debug("%s: ucontrol value = %ld, slim6_rx_sample_rate = %d\n", |
| 757 | __func__, ucontrol->value.integer.value[0], |
| 758 | slim6_rx_sample_rate); |
| 759 | |
| 760 | return 1; |
| 761 | } |
| 762 | |
| 763 | static int slim0_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 764 | struct snd_ctl_elem_value *ucontrol) |
| 765 | { |
| 766 | |
| 767 | switch (slim0_rx_bit_format) { |
| 768 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 769 | ucontrol->value.integer.value[0] = 2; |
| 770 | break; |
| 771 | |
| 772 | case SNDRV_PCM_FORMAT_S24_LE: |
| 773 | ucontrol->value.integer.value[0] = 1; |
| 774 | break; |
| 775 | |
| 776 | case SNDRV_PCM_FORMAT_S16_LE: |
| 777 | default: |
| 778 | ucontrol->value.integer.value[0] = 0; |
| 779 | break; |
| 780 | } |
| 781 | |
| 782 | pr_debug("%s: slim0_rx_bit_format = %d, ucontrol value = %ld\n", |
| 783 | __func__, slim0_rx_bit_format, |
| 784 | ucontrol->value.integer.value[0]); |
| 785 | |
| 786 | return 0; |
| 787 | } |
| 788 | |
| 789 | static int slim0_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 790 | struct snd_ctl_elem_value *ucontrol) |
| 791 | { |
| 792 | switch (ucontrol->value.integer.value[0]) { |
| 793 | case 2: |
| 794 | slim0_rx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 795 | break; |
| 796 | case 1: |
| 797 | slim0_rx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 798 | break; |
| 799 | case 0: |
| 800 | default: |
| 801 | slim0_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 802 | break; |
| 803 | } |
| 804 | return 0; |
| 805 | } |
| 806 | |
| 807 | static int slim4_rx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 808 | struct snd_ctl_elem_value *ucontrol) |
| 809 | { |
| 810 | |
| 811 | switch (slim4_rx_bit_format) { |
| 812 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 813 | ucontrol->value.integer.value[0] = 2; |
| 814 | break; |
| 815 | |
| 816 | case SNDRV_PCM_FORMAT_S24_LE: |
| 817 | ucontrol->value.integer.value[0] = 1; |
| 818 | break; |
| 819 | |
| 820 | case SNDRV_PCM_FORMAT_S16_LE: |
| 821 | default: |
| 822 | ucontrol->value.integer.value[0] = 0; |
| 823 | break; |
| 824 | } |
| 825 | |
| 826 | pr_debug("%s: slim4_rx_bit_format = %d, ucontrol value = %ld\n", |
| 827 | __func__, slim4_rx_bit_format, |
| 828 | ucontrol->value.integer.value[0]); |
| 829 | |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | static int slim4_rx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 834 | struct snd_ctl_elem_value *ucontrol) |
| 835 | { |
| 836 | switch (ucontrol->value.integer.value[0]) { |
| 837 | case 2: |
| 838 | slim4_rx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 839 | break; |
| 840 | case 1: |
| 841 | slim4_rx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 842 | break; |
| 843 | case 0: |
| 844 | default: |
| 845 | slim4_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 846 | break; |
| 847 | } |
| 848 | return 0; |
| 849 | } |
| 850 | |
| 851 | static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol, |
| 852 | struct snd_ctl_elem_value *ucontrol) |
| 853 | { |
| 854 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
| 855 | |
| 856 | if (!strcmp(dev_name(codec->dev), "tasha_codec")) |
| 857 | ucontrol->value.integer.value[0] = |
| 858 | (msm_vi_feed_tx_ch - 1); |
| 859 | else |
| 860 | ucontrol->value.integer.value[0] = |
| 861 | (msm_vi_feed_tx_ch/2 - 1); |
| 862 | |
| 863 | pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__, |
| 864 | ucontrol->value.integer.value[0]); |
| 865 | return 0; |
| 866 | } |
| 867 | |
| 868 | static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol, |
| 869 | struct snd_ctl_elem_value *ucontrol) |
| 870 | { |
| 871 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
| 872 | |
| 873 | if (!strcmp(dev_name(codec->dev), "tasha_codec")) |
| 874 | msm_vi_feed_tx_ch = |
| 875 | ucontrol->value.integer.value[0] + 1; |
| 876 | else |
| 877 | msm_vi_feed_tx_ch = |
| 878 | roundup_pow_of_two( |
| 879 | ucontrol->value.integer.value[0] + 2); |
| 880 | |
| 881 | pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch); |
| 882 | return 1; |
| 883 | } |
| 884 | |
| 885 | static int msm_slim_0_rx_ch_get(struct snd_kcontrol *kcontrol, |
| 886 | struct snd_ctl_elem_value *ucontrol) |
| 887 | { |
| 888 | pr_debug("%s: msm_slim_0_rx_ch = %d\n", __func__, |
| 889 | msm_slim_0_rx_ch); |
| 890 | ucontrol->value.integer.value[0] = msm_slim_0_rx_ch - 1; |
| 891 | return 0; |
| 892 | } |
| 893 | |
| 894 | static int msm_slim_0_rx_ch_put(struct snd_kcontrol *kcontrol, |
| 895 | struct snd_ctl_elem_value *ucontrol) |
| 896 | { |
| 897 | msm_slim_0_rx_ch = ucontrol->value.integer.value[0] + 1; |
| 898 | |
| 899 | pr_debug("%s: msm_slim_0_rx_ch = %d\n", __func__, |
| 900 | msm_slim_0_rx_ch); |
| 901 | return 1; |
| 902 | } |
| 903 | |
| 904 | static int msm_slim_4_rx_ch_get(struct snd_kcontrol *kcontrol, |
| 905 | struct snd_ctl_elem_value *ucontrol) |
| 906 | { |
| 907 | pr_debug("%s: msm_slim_4_rx_ch = %d\n", __func__, |
| 908 | msm_slim_4_rx_ch); |
| 909 | ucontrol->value.integer.value[0] = msm_slim_4_rx_ch - 1; |
| 910 | return 0; |
| 911 | } |
| 912 | |
| 913 | static int msm_slim_4_rx_ch_put(struct snd_kcontrol *kcontrol, |
| 914 | struct snd_ctl_elem_value *ucontrol) |
| 915 | { |
| 916 | msm_slim_4_rx_ch = ucontrol->value.integer.value[0] + 1; |
| 917 | |
| 918 | pr_debug("%s: msm_slim_4_rx_ch = %d\n", __func__, |
| 919 | msm_slim_4_rx_ch); |
| 920 | return 1; |
| 921 | } |
| 922 | |
| 923 | static int slim0_tx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 924 | struct snd_ctl_elem_value *ucontrol) |
| 925 | { |
| 926 | switch (slim0_tx_bit_format) { |
| 927 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 928 | ucontrol->value.integer.value[0] = 2; |
| 929 | break; |
| 930 | case SNDRV_PCM_FORMAT_S24_LE: |
| 931 | ucontrol->value.integer.value[0] = 1; |
| 932 | break; |
| 933 | case SNDRV_PCM_FORMAT_S16_LE: |
| 934 | default: |
| 935 | ucontrol->value.integer.value[0] = 0; |
| 936 | break; |
| 937 | } |
| 938 | pr_debug("%s: slim0_tx_bit_format = %d, ucontrol value = %ld\n", |
| 939 | __func__, slim0_tx_bit_format, |
| 940 | ucontrol->value.integer.value[0]); |
| 941 | return 0; |
| 942 | } |
| 943 | |
| 944 | static int slim0_tx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 945 | struct snd_ctl_elem_value *ucontrol) |
| 946 | { |
| 947 | int rc = 0; |
| 948 | |
| 949 | switch (ucontrol->value.integer.value[0]) { |
| 950 | case 2: |
| 951 | slim0_tx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 952 | break; |
| 953 | case 1: |
| 954 | slim0_tx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 955 | break; |
| 956 | case 0: |
| 957 | slim0_tx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 958 | break; |
| 959 | default: |
| 960 | pr_err("%s: invalid value %ld\n", __func__, |
| 961 | ucontrol->value.integer.value[0]); |
| 962 | rc = -EINVAL; |
| 963 | break; |
| 964 | } |
| 965 | return rc; |
| 966 | } |
| 967 | |
| 968 | static int slim2_tx_bit_format_get(struct snd_kcontrol *kcontrol, |
| 969 | struct snd_ctl_elem_value *ucontrol) |
| 970 | { |
| 971 | switch (slim2_tx_bit_format) { |
| 972 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 973 | ucontrol->value.integer.value[0] = 2; |
| 974 | break; |
| 975 | case SNDRV_PCM_FORMAT_S24_LE: |
| 976 | ucontrol->value.integer.value[0] = 1; |
| 977 | break; |
| 978 | case SNDRV_PCM_FORMAT_S16_LE: |
| 979 | default: |
| 980 | ucontrol->value.integer.value[0] = 0; |
| 981 | break; |
| 982 | } |
| 983 | pr_debug("%s: slim2_tx_bit_format = %d, ucontrol value = %ld\n", |
| 984 | __func__, slim2_tx_bit_format, |
| 985 | ucontrol->value.integer.value[0]); |
| 986 | return 0; |
| 987 | } |
| 988 | |
| 989 | static int slim2_tx_bit_format_put(struct snd_kcontrol *kcontrol, |
| 990 | struct snd_ctl_elem_value *ucontrol) |
| 991 | { |
| 992 | int rc = 0; |
| 993 | |
| 994 | switch (ucontrol->value.integer.value[0]) { |
| 995 | case 2: |
| 996 | slim2_tx_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 997 | break; |
| 998 | case 1: |
| 999 | slim2_tx_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 1000 | break; |
| 1001 | case 0: |
| 1002 | slim2_tx_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 1003 | break; |
| 1004 | default: |
| 1005 | pr_err("%s: invalid value %ld\n", __func__, |
| 1006 | ucontrol->value.integer.value[0]); |
| 1007 | rc = -EINVAL; |
| 1008 | break; |
| 1009 | } |
| 1010 | return rc; |
| 1011 | } |
| 1012 | |
| 1013 | static int msm_slim_5_rx_ch_get(struct snd_kcontrol *kcontrol, |
| 1014 | struct snd_ctl_elem_value *ucontrol) |
| 1015 | { |
| 1016 | pr_debug("%s: msm_slim_5_rx_ch = %d\n", __func__, |
| 1017 | msm_slim_5_rx_ch); |
| 1018 | ucontrol->value.integer.value[0] = msm_slim_5_rx_ch - 1; |
| 1019 | return 0; |
| 1020 | } |
| 1021 | |
| 1022 | static int msm_slim_5_rx_ch_put(struct snd_kcontrol *kcontrol, |
| 1023 | struct snd_ctl_elem_value *ucontrol) |
| 1024 | { |
| 1025 | msm_slim_5_rx_ch = ucontrol->value.integer.value[0] + 1; |
| 1026 | |
| 1027 | pr_debug("%s: msm_slim_0_rx_ch = %d\n", __func__, |
| 1028 | msm_slim_5_rx_ch); |
| 1029 | return 0; |
| 1030 | } |
| 1031 | static int msm_slim_6_rx_ch_get(struct snd_kcontrol *kcontrol, |
| 1032 | struct snd_ctl_elem_value *ucontrol) |
| 1033 | { |
| 1034 | pr_debug("%s: msm_slim_6_rx_ch = %d\n", __func__, |
| 1035 | msm_slim_6_rx_ch); |
| 1036 | ucontrol->value.integer.value[0] = msm_slim_6_rx_ch - 1; |
| 1037 | return 0; |
| 1038 | } |
| 1039 | |
| 1040 | static int msm_slim_6_rx_ch_put(struct snd_kcontrol *kcontrol, |
| 1041 | struct snd_ctl_elem_value *ucontrol) |
| 1042 | { |
| 1043 | msm_slim_6_rx_ch = ucontrol->value.integer.value[0] + 1; |
| 1044 | pr_debug("%s: msm_slim_6_rx_ch = %d\n", __func__, |
| 1045 | msm_slim_6_rx_ch); |
| 1046 | return 1; |
| 1047 | } |
| 1048 | |
| 1049 | static int msm_slim_0_tx_ch_get(struct snd_kcontrol *kcontrol, |
| 1050 | struct snd_ctl_elem_value *ucontrol) |
| 1051 | { |
| 1052 | pr_debug("%s: msm_slim_0_tx_ch = %d\n", __func__, |
| 1053 | msm_slim_0_tx_ch); |
| 1054 | ucontrol->value.integer.value[0] = msm_slim_0_tx_ch - 1; |
| 1055 | return 0; |
| 1056 | } |
| 1057 | |
| 1058 | static int msm_slim_0_tx_ch_put(struct snd_kcontrol *kcontrol, |
| 1059 | struct snd_ctl_elem_value *ucontrol) |
| 1060 | { |
| 1061 | msm_slim_0_tx_ch = ucontrol->value.integer.value[0] + 1; |
| 1062 | |
| 1063 | pr_debug("%s: msm_slim_0_tx_ch = %d\n", __func__, msm_slim_0_tx_ch); |
| 1064 | return 1; |
| 1065 | } |
| 1066 | |
| 1067 | static int msm_slim_2_tx_ch_get(struct snd_kcontrol *kcontrol, |
| 1068 | struct snd_ctl_elem_value *ucontrol) |
| 1069 | { |
| 1070 | pr_debug("%s: msm_slim_2_tx_ch = %d\n", __func__, |
| 1071 | msm_slim_2_tx_ch); |
| 1072 | ucontrol->value.integer.value[0] = msm_slim_2_tx_ch - 1; |
| 1073 | return 0; |
| 1074 | } |
| 1075 | |
| 1076 | static int msm_slim_2_tx_ch_put(struct snd_kcontrol *kcontrol, |
| 1077 | struct snd_ctl_elem_value *ucontrol) |
| 1078 | { |
| 1079 | msm_slim_2_tx_ch = ucontrol->value.integer.value[0] + 1; |
| 1080 | |
| 1081 | pr_debug("%s: msm_slim_2_tx_ch = %d\n", __func__, msm_slim_2_tx_ch); |
| 1082 | return 1; |
| 1083 | } |
| 1084 | |
| 1085 | static int slim0_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1086 | struct snd_ctl_elem_value *ucontrol) |
| 1087 | { |
| 1088 | int sample_rate_val = 0; |
| 1089 | |
| 1090 | switch (slim0_tx_sample_rate) { |
| 1091 | case SAMPLING_RATE_16KHZ: |
| 1092 | sample_rate_val = 4; |
| 1093 | break; |
| 1094 | case SAMPLING_RATE_192KHZ: |
| 1095 | sample_rate_val = 2; |
| 1096 | break; |
| 1097 | case SAMPLING_RATE_96KHZ: |
| 1098 | sample_rate_val = 1; |
| 1099 | break; |
| 1100 | case SAMPLING_RATE_48KHZ: |
| 1101 | default: |
| 1102 | sample_rate_val = 0; |
| 1103 | break; |
| 1104 | } |
| 1105 | |
| 1106 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 1107 | pr_debug("%s: slim0_tx_sample_rate = %d\n", __func__, |
| 1108 | slim0_tx_sample_rate); |
| 1109 | return 0; |
| 1110 | |
| 1111 | } |
| 1112 | |
| 1113 | static int slim0_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1114 | struct snd_ctl_elem_value *ucontrol) |
| 1115 | { |
| 1116 | int rc = 0; |
| 1117 | |
| 1118 | pr_debug("%s: ucontrol value = %ld\n", __func__, |
| 1119 | ucontrol->value.integer.value[0]); |
| 1120 | |
| 1121 | switch (ucontrol->value.integer.value[0]) { |
| 1122 | case 4: |
| 1123 | slim0_tx_sample_rate = SAMPLING_RATE_16KHZ; |
| 1124 | break; |
| 1125 | case 2: |
| 1126 | slim0_tx_sample_rate = SAMPLING_RATE_192KHZ; |
| 1127 | break; |
| 1128 | case 1: |
| 1129 | slim0_tx_sample_rate = SAMPLING_RATE_96KHZ; |
| 1130 | break; |
| 1131 | case 0: |
| 1132 | slim0_tx_sample_rate = SAMPLING_RATE_48KHZ; |
| 1133 | break; |
| 1134 | default: |
| 1135 | rc = -EINVAL; |
| 1136 | pr_err("%s: invalid sample rate being passed\n", __func__); |
| 1137 | break; |
| 1138 | } |
| 1139 | pr_debug("%s: slim0_tx_sample_rate = %d\n", __func__, |
| 1140 | slim0_tx_sample_rate); |
| 1141 | return rc; |
| 1142 | } |
| 1143 | |
| 1144 | static int slim2_tx_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1145 | struct snd_ctl_elem_value *ucontrol) |
| 1146 | { |
| 1147 | int sample_rate_val = 0; |
| 1148 | |
| 1149 | switch (slim2_tx_sample_rate) { |
| 1150 | case SAMPLING_RATE_16KHZ: |
| 1151 | sample_rate_val = 4; |
| 1152 | break; |
| 1153 | case SAMPLING_RATE_192KHZ: |
| 1154 | sample_rate_val = 2; |
| 1155 | break; |
| 1156 | case SAMPLING_RATE_96KHZ: |
| 1157 | sample_rate_val = 1; |
| 1158 | break; |
| 1159 | case SAMPLING_RATE_48KHZ: |
| 1160 | default: |
| 1161 | sample_rate_val = 0; |
| 1162 | break; |
| 1163 | } |
| 1164 | |
| 1165 | ucontrol->value.integer.value[0] = sample_rate_val; |
| 1166 | pr_debug("%s: slim2_tx_sample_rate = %d\n", __func__, |
| 1167 | slim2_tx_sample_rate); |
| 1168 | return 0; |
| 1169 | |
| 1170 | } |
| 1171 | |
| 1172 | static int slim2_tx_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1173 | struct snd_ctl_elem_value *ucontrol) |
| 1174 | { |
| 1175 | int rc = 0; |
| 1176 | |
| 1177 | pr_debug("%s: ucontrol value = %ld\n", __func__, |
| 1178 | ucontrol->value.integer.value[0]); |
| 1179 | |
| 1180 | switch (ucontrol->value.integer.value[0]) { |
| 1181 | case 4: |
| 1182 | slim2_tx_sample_rate = SAMPLING_RATE_16KHZ; |
| 1183 | break; |
| 1184 | case 2: |
| 1185 | slim2_tx_sample_rate = SAMPLING_RATE_192KHZ; |
| 1186 | break; |
| 1187 | case 1: |
| 1188 | slim2_tx_sample_rate = SAMPLING_RATE_96KHZ; |
| 1189 | break; |
| 1190 | case 0: |
| 1191 | slim2_tx_sample_rate = SAMPLING_RATE_48KHZ; |
| 1192 | break; |
| 1193 | default: |
| 1194 | rc = -EINVAL; |
| 1195 | pr_err("%s: invalid sample rate being passed\n", __func__); |
| 1196 | break; |
| 1197 | } |
| 1198 | pr_debug("%s: slim2_tx_sample_rate = %d\n", __func__, |
| 1199 | slim2_tx_sample_rate); |
| 1200 | return rc; |
| 1201 | } |
| 1202 | |
| 1203 | static int msm_btsco_rate_get(struct snd_kcontrol *kcontrol, |
| 1204 | struct snd_ctl_elem_value *ucontrol) |
| 1205 | { |
| 1206 | pr_debug("%s: msm_btsco_rate = %d", __func__, msm_btsco_rate); |
| 1207 | ucontrol->value.integer.value[0] = msm_btsco_rate; |
| 1208 | return 0; |
| 1209 | } |
| 1210 | |
| 1211 | static int msm_btsco_rate_put(struct snd_kcontrol *kcontrol, |
| 1212 | struct snd_ctl_elem_value *ucontrol) |
| 1213 | { |
| 1214 | switch (ucontrol->value.integer.value[0]) { |
| 1215 | case RATE_8KHZ_ID: |
| 1216 | msm_btsco_rate = BTSCO_RATE_8KHZ; |
| 1217 | break; |
| 1218 | case RATE_16KHZ_ID: |
| 1219 | msm_btsco_rate = BTSCO_RATE_16KHZ; |
| 1220 | break; |
| 1221 | default: |
| 1222 | msm_btsco_rate = BTSCO_RATE_8KHZ; |
| 1223 | break; |
| 1224 | } |
| 1225 | |
| 1226 | pr_debug("%s: msm_btsco_rate = %d\n", __func__, msm_btsco_rate); |
| 1227 | return 0; |
| 1228 | } |
| 1229 | |
| 1230 | static int msm_auxpcm_rate_get(struct snd_kcontrol *kcontrol, |
| 1231 | struct snd_ctl_elem_value *ucontrol) |
| 1232 | { |
| 1233 | pr_debug("%s: msm_auxpcm_rate = %d", __func__, msm8952_auxpcm_rate); |
| 1234 | ucontrol->value.integer.value[0] = msm8952_auxpcm_rate; |
| 1235 | return 0; |
| 1236 | } |
| 1237 | |
| 1238 | static int msm_auxpcm_rate_put(struct snd_kcontrol *kcontrol, |
| 1239 | struct snd_ctl_elem_value *ucontrol) |
| 1240 | { |
| 1241 | switch (ucontrol->value.integer.value[0]) { |
| 1242 | case RATE_8KHZ_ID: |
| 1243 | msm8952_auxpcm_rate = SAMPLING_RATE_8KHZ; |
| 1244 | break; |
| 1245 | case RATE_16KHZ_ID: |
| 1246 | msm8952_auxpcm_rate = SAMPLING_RATE_16KHZ; |
| 1247 | break; |
| 1248 | default: |
| 1249 | msm8952_auxpcm_rate = SAMPLING_RATE_8KHZ; |
| 1250 | break; |
| 1251 | } |
| 1252 | |
| 1253 | pr_debug("%s: msm_auxpcm_rate = %d\n", __func__, msm8952_auxpcm_rate); |
| 1254 | return 0; |
| 1255 | } |
| 1256 | |
| 1257 | static int msm_proxy_rx_ch_get(struct snd_kcontrol *kcontrol, |
| 1258 | struct snd_ctl_elem_value *ucontrol) |
| 1259 | { |
| 1260 | pr_debug("%s: msm_proxy_rx_ch = %d\n", __func__, |
| 1261 | msm_proxy_rx_ch); |
| 1262 | ucontrol->value.integer.value[0] = msm_proxy_rx_ch - 1; |
| 1263 | return 0; |
| 1264 | } |
| 1265 | |
| 1266 | static int msm_proxy_rx_ch_put(struct snd_kcontrol *kcontrol, |
| 1267 | struct snd_ctl_elem_value *ucontrol) |
| 1268 | { |
| 1269 | msm_proxy_rx_ch = ucontrol->value.integer.value[0] + 1; |
| 1270 | pr_debug("%s: msm_proxy_rx_ch = %d\n", __func__, |
| 1271 | msm_proxy_rx_ch); |
| 1272 | return 1; |
| 1273 | } |
| 1274 | |
| 1275 | static int msm_pri_tdm_rx_0_ch_get(struct snd_kcontrol *kcontrol, |
| 1276 | struct snd_ctl_elem_value *ucontrol) |
| 1277 | { |
| 1278 | pr_debug("%s: msm_pri_tdm_rx_0_ch = %d\n", __func__, |
| 1279 | msm_pri_tdm_rx_0_ch); |
| 1280 | ucontrol->value.integer.value[0] = msm_pri_tdm_rx_0_ch - 1; |
| 1281 | return 0; |
| 1282 | } |
| 1283 | |
| 1284 | static int msm_pri_tdm_rx_0_ch_put(struct snd_kcontrol *kcontrol, |
| 1285 | struct snd_ctl_elem_value *ucontrol) |
| 1286 | { |
| 1287 | msm_pri_tdm_rx_0_ch = ucontrol->value.integer.value[0] + 1; |
| 1288 | pr_debug("%s: msm_pri_tdm_rx_0_ch = %d\n", __func__, |
| 1289 | msm_pri_tdm_rx_0_ch); |
| 1290 | return 0; |
| 1291 | } |
| 1292 | |
| 1293 | static int msm_pri_tdm_tx_0_ch_get(struct snd_kcontrol *kcontrol, |
| 1294 | struct snd_ctl_elem_value *ucontrol) |
| 1295 | { |
| 1296 | pr_debug("%s: msm_pri_tdm_tx_0_ch = %d\n", __func__, |
| 1297 | msm_pri_tdm_tx_0_ch); |
| 1298 | ucontrol->value.integer.value[0] = msm_pri_tdm_tx_0_ch - 1; |
| 1299 | return 0; |
| 1300 | } |
| 1301 | |
| 1302 | static int msm_pri_tdm_tx_0_ch_put(struct snd_kcontrol *kcontrol, |
| 1303 | struct snd_ctl_elem_value *ucontrol) |
| 1304 | { |
| 1305 | msm_pri_tdm_tx_0_ch = ucontrol->value.integer.value[0] + 1; |
| 1306 | pr_debug("%s: msm_pri_tdm_tx_0_ch = %d\n", __func__, |
| 1307 | msm_pri_tdm_tx_0_ch); |
| 1308 | return 0; |
| 1309 | } |
| 1310 | |
| 1311 | static int msm_sec_tdm_rx_0_ch_get(struct snd_kcontrol *kcontrol, |
| 1312 | struct snd_ctl_elem_value *ucontrol) |
| 1313 | { |
| 1314 | pr_debug("%s: msm_sec_tdm_rx_0_ch = %d\n", __func__, |
| 1315 | msm_sec_tdm_rx_0_ch); |
| 1316 | ucontrol->value.integer.value[0] = msm_sec_tdm_rx_0_ch - 1; |
| 1317 | return 0; |
| 1318 | } |
| 1319 | |
| 1320 | static int msm_sec_tdm_rx_0_ch_put(struct snd_kcontrol *kcontrol, |
| 1321 | struct snd_ctl_elem_value *ucontrol) |
| 1322 | { |
| 1323 | msm_sec_tdm_rx_0_ch = ucontrol->value.integer.value[0] + 1; |
| 1324 | pr_debug("%s: msm_sec_tdm_rx_0_ch = %d\n", __func__, |
| 1325 | msm_sec_tdm_rx_0_ch); |
| 1326 | return 0; |
| 1327 | } |
| 1328 | |
| 1329 | static int msm_sec_tdm_tx_0_ch_get(struct snd_kcontrol *kcontrol, |
| 1330 | struct snd_ctl_elem_value *ucontrol) |
| 1331 | { |
| 1332 | pr_debug("%s: msm_sec_tdm_tx_0_ch = %d\n", __func__, |
| 1333 | msm_sec_tdm_tx_0_ch); |
| 1334 | ucontrol->value.integer.value[0] = msm_sec_tdm_tx_0_ch - 1; |
| 1335 | return 0; |
| 1336 | } |
| 1337 | |
| 1338 | static int msm_sec_tdm_tx_0_ch_put(struct snd_kcontrol *kcontrol, |
| 1339 | struct snd_ctl_elem_value *ucontrol) |
| 1340 | { |
| 1341 | msm_sec_tdm_tx_0_ch = ucontrol->value.integer.value[0] + 1; |
| 1342 | pr_debug("%s: msm_sec_tdm_tx_0_ch = %d\n", __func__, |
| 1343 | msm_sec_tdm_tx_0_ch); |
| 1344 | return 0; |
| 1345 | } |
| 1346 | |
| 1347 | static int msm_pri_tdm_rx_0_bit_format_get(struct snd_kcontrol *kcontrol, |
| 1348 | struct snd_ctl_elem_value *ucontrol) |
| 1349 | { |
| 1350 | switch (msm_pri_tdm_rx_0_bit_format) { |
| 1351 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1352 | ucontrol->value.integer.value[0] = 3; |
| 1353 | break; |
| 1354 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 1355 | ucontrol->value.integer.value[0] = 2; |
| 1356 | break; |
| 1357 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1358 | ucontrol->value.integer.value[0] = 1; |
| 1359 | break; |
| 1360 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1361 | default: |
| 1362 | ucontrol->value.integer.value[0] = 0; |
| 1363 | break; |
| 1364 | } |
| 1365 | pr_debug("%s: msm_pri_tdm_rx_0_bit_format = %ld\n", |
| 1366 | __func__, ucontrol->value.integer.value[0]); |
| 1367 | return 0; |
| 1368 | } |
| 1369 | |
| 1370 | static int msm_pri_tdm_rx_0_bit_format_put(struct snd_kcontrol *kcontrol, |
| 1371 | struct snd_ctl_elem_value *ucontrol) |
| 1372 | { |
| 1373 | switch (ucontrol->value.integer.value[0]) { |
| 1374 | case 3: |
| 1375 | msm_pri_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| 1376 | break; |
| 1377 | case 2: |
| 1378 | msm_pri_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 1379 | break; |
| 1380 | case 1: |
| 1381 | msm_pri_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 1382 | break; |
| 1383 | case 0: |
| 1384 | default: |
| 1385 | msm_pri_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 1386 | break; |
| 1387 | } |
| 1388 | pr_debug("%s: msm_pri_tdm_rx_0_bit_format = %d\n", |
| 1389 | __func__, msm_pri_tdm_rx_0_bit_format); |
| 1390 | return 0; |
| 1391 | } |
| 1392 | |
| 1393 | static int msm_pri_tdm_tx_0_bit_format_get(struct snd_kcontrol *kcontrol, |
| 1394 | struct snd_ctl_elem_value *ucontrol) |
| 1395 | { |
| 1396 | switch (msm_pri_tdm_tx_0_bit_format) { |
| 1397 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1398 | ucontrol->value.integer.value[0] = 3; |
| 1399 | break; |
| 1400 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 1401 | ucontrol->value.integer.value[0] = 2; |
| 1402 | break; |
| 1403 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1404 | ucontrol->value.integer.value[0] = 1; |
| 1405 | break; |
| 1406 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1407 | default: |
| 1408 | ucontrol->value.integer.value[0] = 0; |
| 1409 | break; |
| 1410 | } |
| 1411 | pr_debug("%s: msm_pri_tdm_tx_0_bit_format = %ld\n", |
| 1412 | __func__, ucontrol->value.integer.value[0]); |
| 1413 | return 0; |
| 1414 | } |
| 1415 | |
| 1416 | static int msm_pri_tdm_tx_0_bit_format_put(struct snd_kcontrol *kcontrol, |
| 1417 | struct snd_ctl_elem_value *ucontrol) |
| 1418 | { |
| 1419 | switch (ucontrol->value.integer.value[0]) { |
| 1420 | case 3: |
| 1421 | msm_pri_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| 1422 | break; |
| 1423 | case 2: |
| 1424 | msm_pri_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 1425 | break; |
| 1426 | case 1: |
| 1427 | msm_pri_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 1428 | break; |
| 1429 | case 0: |
| 1430 | default: |
| 1431 | msm_pri_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 1432 | break; |
| 1433 | } |
| 1434 | pr_debug("%s: msm_pri_tdm_tx_0_bit_format = %d\n", |
| 1435 | __func__, msm_pri_tdm_tx_0_bit_format); |
| 1436 | return 0; |
| 1437 | } |
| 1438 | |
| 1439 | static int msm_sec_tdm_rx_0_bit_format_get(struct snd_kcontrol *kcontrol, |
| 1440 | struct snd_ctl_elem_value *ucontrol) |
| 1441 | { |
| 1442 | switch (msm_sec_tdm_rx_0_bit_format) { |
| 1443 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1444 | ucontrol->value.integer.value[0] = 3; |
| 1445 | break; |
| 1446 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 1447 | ucontrol->value.integer.value[0] = 2; |
| 1448 | break; |
| 1449 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1450 | ucontrol->value.integer.value[0] = 1; |
| 1451 | break; |
| 1452 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1453 | default: |
| 1454 | ucontrol->value.integer.value[0] = 0; |
| 1455 | break; |
| 1456 | } |
| 1457 | pr_debug("%s: msm_sec_tdm_rx_0_bit_format = %ld\n", |
| 1458 | __func__, ucontrol->value.integer.value[0]); |
| 1459 | return 0; |
| 1460 | } |
| 1461 | |
| 1462 | static int msm_sec_tdm_rx_0_bit_format_put(struct snd_kcontrol *kcontrol, |
| 1463 | struct snd_ctl_elem_value *ucontrol) |
| 1464 | { |
| 1465 | switch (ucontrol->value.integer.value[0]) { |
| 1466 | case 3: |
| 1467 | msm_sec_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| 1468 | break; |
| 1469 | case 2: |
| 1470 | msm_sec_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 1471 | break; |
| 1472 | case 1: |
| 1473 | msm_sec_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 1474 | break; |
| 1475 | case 0: |
| 1476 | default: |
| 1477 | msm_sec_tdm_rx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 1478 | break; |
| 1479 | } |
| 1480 | pr_debug("%s: msm_sec_tdm_rx_0_bit_format = %d\n", |
| 1481 | __func__, msm_sec_tdm_rx_0_bit_format); |
| 1482 | return 0; |
| 1483 | } |
| 1484 | |
| 1485 | static int msm_sec_tdm_tx_0_bit_format_get(struct snd_kcontrol *kcontrol, |
| 1486 | struct snd_ctl_elem_value *ucontrol) |
| 1487 | { |
| 1488 | switch (msm_sec_tdm_tx_0_bit_format) { |
| 1489 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1490 | ucontrol->value.integer.value[0] = 3; |
| 1491 | break; |
| 1492 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 1493 | ucontrol->value.integer.value[0] = 2; |
| 1494 | break; |
| 1495 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1496 | ucontrol->value.integer.value[0] = 1; |
| 1497 | break; |
| 1498 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1499 | default: |
| 1500 | ucontrol->value.integer.value[0] = 0; |
| 1501 | break; |
| 1502 | } |
| 1503 | pr_debug("%s: msm_sec_tdm_tx_0_bit_format = %ld\n", |
| 1504 | __func__, ucontrol->value.integer.value[0]); |
| 1505 | return 0; |
| 1506 | } |
| 1507 | |
| 1508 | static int msm_sec_tdm_tx_0_bit_format_put(struct snd_kcontrol *kcontrol, |
| 1509 | struct snd_ctl_elem_value *ucontrol) |
| 1510 | { |
| 1511 | switch (ucontrol->value.integer.value[0]) { |
| 1512 | case 3: |
| 1513 | msm_sec_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S32_LE; |
| 1514 | break; |
| 1515 | case 2: |
| 1516 | msm_sec_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S24_3LE; |
| 1517 | break; |
| 1518 | case 1: |
| 1519 | msm_sec_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S24_LE; |
| 1520 | break; |
| 1521 | case 0: |
| 1522 | default: |
| 1523 | msm_sec_tdm_tx_0_bit_format = SNDRV_PCM_FORMAT_S16_LE; |
| 1524 | break; |
| 1525 | } |
| 1526 | pr_debug("%s: msm_sec_tdm_tx_0_bit_format = %d\n", |
| 1527 | __func__, msm_sec_tdm_tx_0_bit_format); |
| 1528 | return 0; |
| 1529 | } |
| 1530 | |
| 1531 | static int msm_pri_tdm_rx_0_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1532 | struct snd_ctl_elem_value *ucontrol) |
| 1533 | { |
| 1534 | switch (msm_pri_tdm_rx_0_sample_rate) { |
| 1535 | case SAMPLING_RATE_16KHZ: |
| 1536 | ucontrol->value.integer.value[0] = 0; |
| 1537 | break; |
| 1538 | case SAMPLING_RATE_48KHZ: |
| 1539 | default: |
| 1540 | ucontrol->value.integer.value[0] = 1; |
| 1541 | break; |
| 1542 | } |
| 1543 | pr_debug("%s: msm_pri_tdm_rx_0_sample_rate = %ld\n", |
| 1544 | __func__, ucontrol->value.integer.value[0]); |
| 1545 | return 0; |
| 1546 | } |
| 1547 | |
| 1548 | static int msm_pri_tdm_rx_0_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1549 | struct snd_ctl_elem_value *ucontrol) |
| 1550 | { |
| 1551 | switch (ucontrol->value.integer.value[0]) { |
| 1552 | case 0: |
| 1553 | msm_pri_tdm_rx_0_sample_rate = SAMPLING_RATE_16KHZ; |
| 1554 | break; |
| 1555 | case 1: |
| 1556 | default: |
| 1557 | msm_pri_tdm_rx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 1558 | break; |
| 1559 | } |
| 1560 | pr_debug("%s: msm_pri_tdm_rx_0_sample_rate = %d\n", |
| 1561 | __func__, msm_pri_tdm_rx_0_sample_rate); |
| 1562 | return 0; |
| 1563 | } |
| 1564 | |
| 1565 | static int msm_sec_tdm_rx_0_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1566 | struct snd_ctl_elem_value *ucontrol) |
| 1567 | { |
| 1568 | switch (msm_sec_tdm_rx_0_sample_rate) { |
| 1569 | case SAMPLING_RATE_16KHZ: |
| 1570 | ucontrol->value.integer.value[0] = 0; |
| 1571 | break; |
| 1572 | case SAMPLING_RATE_48KHZ: |
| 1573 | default: |
| 1574 | ucontrol->value.integer.value[0] = 1; |
| 1575 | break; |
| 1576 | } |
| 1577 | pr_debug("%s: msm_sec_tdm_rx_0_sample_rate = %ld\n", |
| 1578 | __func__, ucontrol->value.integer.value[0]); |
| 1579 | return 0; |
| 1580 | } |
| 1581 | |
| 1582 | static int msm_sec_tdm_rx_0_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1583 | struct snd_ctl_elem_value *ucontrol) |
| 1584 | { |
| 1585 | switch (ucontrol->value.integer.value[0]) { |
| 1586 | case 0: |
| 1587 | msm_sec_tdm_rx_0_sample_rate = SAMPLING_RATE_16KHZ; |
| 1588 | break; |
| 1589 | case 1: |
| 1590 | default: |
| 1591 | msm_sec_tdm_rx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 1592 | break; |
| 1593 | } |
| 1594 | pr_debug("%s: msm_sec_tdm_rx_0_sample_rate = %d\n", |
| 1595 | __func__, msm_sec_tdm_rx_0_sample_rate); |
| 1596 | return 0; |
| 1597 | } |
| 1598 | |
| 1599 | static int msm_pri_tdm_tx_0_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1600 | struct snd_ctl_elem_value *ucontrol) |
| 1601 | { |
| 1602 | switch (msm_pri_tdm_tx_0_sample_rate) { |
| 1603 | case SAMPLING_RATE_16KHZ: |
| 1604 | ucontrol->value.integer.value[0] = 0; |
| 1605 | break; |
| 1606 | case SAMPLING_RATE_48KHZ: |
| 1607 | default: |
| 1608 | ucontrol->value.integer.value[0] = 1; |
| 1609 | break; |
| 1610 | } |
| 1611 | pr_debug("%s: msm_pri_tdm_tx_0_sample_rate = %ld\n", |
| 1612 | __func__, ucontrol->value.integer.value[0]); |
| 1613 | return 0; |
| 1614 | } |
| 1615 | |
| 1616 | static int msm_pri_tdm_tx_0_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1617 | struct snd_ctl_elem_value *ucontrol) |
| 1618 | { |
| 1619 | switch (ucontrol->value.integer.value[0]) { |
| 1620 | case 0: |
| 1621 | msm_pri_tdm_tx_0_sample_rate = SAMPLING_RATE_16KHZ; |
| 1622 | break; |
| 1623 | case 1: |
| 1624 | default: |
| 1625 | msm_pri_tdm_tx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 1626 | break; |
| 1627 | } |
| 1628 | pr_debug("%s: msm_pri_tdm_tx_0_sample_rate = %d\n", |
| 1629 | __func__, msm_pri_tdm_tx_0_sample_rate); |
| 1630 | return 0; |
| 1631 | } |
| 1632 | |
| 1633 | static int msm_sec_tdm_tx_0_sample_rate_get(struct snd_kcontrol *kcontrol, |
| 1634 | struct snd_ctl_elem_value *ucontrol) |
| 1635 | { |
| 1636 | switch (msm_sec_tdm_tx_0_sample_rate) { |
| 1637 | case SAMPLING_RATE_16KHZ: |
| 1638 | ucontrol->value.integer.value[0] = 0; |
| 1639 | break; |
| 1640 | case SAMPLING_RATE_48KHZ: |
| 1641 | default: |
| 1642 | ucontrol->value.integer.value[0] = 1; |
| 1643 | break; |
| 1644 | } |
| 1645 | pr_debug("%s: msm_sec_tdm_tx_0_sample_rate = %ld\n", |
| 1646 | __func__, ucontrol->value.integer.value[0]); |
| 1647 | return 0; |
| 1648 | } |
| 1649 | |
| 1650 | static int msm_sec_tdm_tx_0_sample_rate_put(struct snd_kcontrol *kcontrol, |
| 1651 | struct snd_ctl_elem_value *ucontrol) |
| 1652 | { |
| 1653 | switch (ucontrol->value.integer.value[0]) { |
| 1654 | case 0: |
| 1655 | msm_sec_tdm_tx_0_sample_rate = SAMPLING_RATE_16KHZ; |
| 1656 | break; |
| 1657 | case 1: |
| 1658 | default: |
| 1659 | msm_sec_tdm_tx_0_sample_rate = SAMPLING_RATE_48KHZ; |
| 1660 | break; |
| 1661 | } |
| 1662 | pr_debug("%s: msm_sec_tdm_tx_0_sample_rate = %d\n", |
| 1663 | __func__, msm_sec_tdm_tx_0_sample_rate); |
| 1664 | return 0; |
| 1665 | } |
| 1666 | |
| 1667 | static const char *const spk_function[] = {"Off", "On"}; |
| 1668 | static const char *const slim0_rx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1669 | "Five", "Six", "Seven", |
| 1670 | "Eight"}; |
| 1671 | static const char *const slim4_rx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1672 | "Five", "Six", "Seven", |
| 1673 | "Eight"}; |
| 1674 | static const char *const slim0_tx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1675 | "Five", "Six", "Seven", |
| 1676 | "Eight"}; |
| 1677 | static const char *const slim2_tx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1678 | "Five", "Six", "Seven", |
| 1679 | "Eight"}; |
| 1680 | static const char *const slim4_tx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1681 | "Five", "Six", "Seven", |
| 1682 | "Eight"}; |
| 1683 | static const char *const vi_feed_ch_text[] = {"One", "Two"}; |
| 1684 | static char const *rx_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"}; |
| 1685 | static char const *slim0_rx_sample_rate_text[] = {"KHZ_48", "KHZ_96", |
| 1686 | "KHZ_192", "KHZ_44P1", "KHZ_16"}; |
| 1687 | static char const *slim4_rx_sample_rate_text[] = {"KHZ_48", "KHZ_96", |
| 1688 | "KHZ_192", "KHZ_44P1", "KHZ_16"}; |
| 1689 | static const char *const slim5_rx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1690 | "Five", "Six", "Seven", |
| 1691 | "Eight"}; |
| 1692 | static const char *const slim6_rx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1693 | "Five", "Six", "Seven", |
| 1694 | "Eight"}; |
| 1695 | static char const *slim5_rx_sample_rate_text[] = {"KHZ_48", "KHZ_96", |
| 1696 | "KHZ_192", "KHZ_44P1"}; |
| 1697 | static char const *slim6_rx_sample_rate_text[] = {"KHZ_48", "KHZ_96", |
| 1698 | "KHZ_192", "KHZ_44P1"}; |
| 1699 | static char const *slim4_rx_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"}; |
| 1700 | static char const *slim5_rx_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"}; |
| 1701 | static const char *const proxy_rx_ch_text[] = {"One", "Two", "Three", "Four", |
| 1702 | "Five", "Six", "Seven", "Eight"}; |
| 1703 | static char const *slim6_rx_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"}; |
| 1704 | |
| 1705 | static const struct soc_enum msm_snd_enum[] = { |
| 1706 | SOC_ENUM_SINGLE_EXT(2, spk_function), |
| 1707 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim0_rx_ch_text), slim0_rx_ch_text), |
| 1708 | SOC_ENUM_SINGLE_EXT(8, slim0_tx_ch_text), |
| 1709 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_bit_format_text), |
| 1710 | rx_bit_format_text), |
| 1711 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim0_rx_sample_rate_text), |
| 1712 | slim0_rx_sample_rate_text), |
| 1713 | SOC_ENUM_SINGLE_EXT(2, vi_feed_ch_text), |
| 1714 | SOC_ENUM_SINGLE_EXT(4, slim5_rx_sample_rate_text), |
| 1715 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim5_rx_bit_format_text), |
| 1716 | slim5_rx_bit_format_text), |
| 1717 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim5_rx_ch_text), slim5_rx_ch_text), |
| 1718 | SOC_ENUM_SINGLE_EXT(8, proxy_rx_ch_text), |
| 1719 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim6_rx_sample_rate_text), |
| 1720 | slim6_rx_sample_rate_text), |
| 1721 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim6_rx_bit_format_text), |
| 1722 | slim6_rx_bit_format_text), |
| 1723 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim6_rx_ch_text), slim6_rx_ch_text), |
| 1724 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(tdm_ch_text), |
| 1725 | tdm_ch_text), |
| 1726 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(tdm_bit_format_text), |
| 1727 | tdm_bit_format_text), |
| 1728 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(tdm_sample_rate_text), |
| 1729 | tdm_sample_rate_text), |
| 1730 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim4_rx_ch_text), slim4_rx_ch_text), |
| 1731 | SOC_ENUM_SINGLE_EXT(8, slim2_tx_ch_text), |
| 1732 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim4_rx_sample_rate_text), |
| 1733 | slim4_rx_sample_rate_text), |
| 1734 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim4_rx_bit_format_text), |
| 1735 | slim4_rx_bit_format_text), |
| 1736 | }; |
| 1737 | |
| 1738 | static const char *const btsco_rate_text[] = {"BTSCO_RATE_8KHZ", |
| 1739 | "BTSCO_RATE_16KHZ"}; |
| 1740 | static const struct soc_enum msm_btsco_enum[] = { |
| 1741 | SOC_ENUM_SINGLE_EXT(2, btsco_rate_text), |
| 1742 | }; |
| 1743 | |
| 1744 | static const char *const auxpcm_rate_text[] = {"SAMPLING_RATE_8KHZ", |
| 1745 | "SAMPLING_RATE_16KHZ"}; |
| 1746 | static const struct soc_enum msm_auxpcm_enum[] = { |
| 1747 | SOC_ENUM_SINGLE_EXT(2, auxpcm_rate_text), |
| 1748 | }; |
| 1749 | |
| 1750 | static const struct snd_kcontrol_new msm_snd_controls[] = { |
| 1751 | SOC_ENUM_EXT("Speaker Function", msm_snd_enum[0], msm8952_get_spk, |
| 1752 | msm8952_set_spk), |
| 1753 | SOC_ENUM_EXT("SLIM_0_RX Channels", msm_snd_enum[1], |
| 1754 | msm_slim_0_rx_ch_get, msm_slim_0_rx_ch_put), |
| 1755 | SOC_ENUM_EXT("SLIM_4_RX Channels", msm_snd_enum[16], |
| 1756 | msm_slim_4_rx_ch_get, msm_slim_4_rx_ch_put), |
| 1757 | SOC_ENUM_EXT("SLIM_5_RX Channels", msm_snd_enum[8], |
| 1758 | msm_slim_5_rx_ch_get, msm_slim_5_rx_ch_put), |
| 1759 | SOC_ENUM_EXT("SLIM_6_RX Channels", msm_snd_enum[12], |
| 1760 | msm_slim_6_rx_ch_get, msm_slim_6_rx_ch_put), |
| 1761 | SOC_ENUM_EXT("SLIM_0_TX Channels", msm_snd_enum[2], |
| 1762 | msm_slim_0_tx_ch_get, msm_slim_0_tx_ch_put), |
| 1763 | SOC_ENUM_EXT("SLIM_1_TX Channels", msm_snd_enum[2], |
| 1764 | msm_slim_1_tx_ch_get, msm_slim_1_tx_ch_put), |
| 1765 | SOC_ENUM_EXT("SLIM_2_TX Channels", msm_snd_enum[17], |
| 1766 | msm_slim_2_tx_ch_get, msm_slim_2_tx_ch_put), |
| 1767 | SOC_ENUM_EXT("MI2S_RX Format", msm_snd_enum[3], |
| 1768 | mi2s_rx_bit_format_get, mi2s_rx_bit_format_put), |
| 1769 | SOC_ENUM_EXT("SLIM_0_RX Format", msm_snd_enum[3], |
| 1770 | slim0_rx_bit_format_get, slim0_rx_bit_format_put), |
| 1771 | SOC_ENUM_EXT("SLIM_4_RX Format", msm_snd_enum[19], |
| 1772 | slim4_rx_bit_format_get, slim4_rx_bit_format_put), |
| 1773 | SOC_ENUM_EXT("SLIM_5_RX Format", msm_snd_enum[7], |
| 1774 | slim5_rx_bit_format_get, slim5_rx_bit_format_put), |
| 1775 | SOC_ENUM_EXT("SLIM_6_RX Format", msm_snd_enum[11], |
| 1776 | slim6_rx_bit_format_get, slim6_rx_bit_format_put), |
| 1777 | SOC_ENUM_EXT("SLIM_0_RX SampleRate", msm_snd_enum[4], |
| 1778 | slim0_rx_sample_rate_get, slim0_rx_sample_rate_put), |
| 1779 | SOC_ENUM_EXT("SLIM_4_RX SampleRate", msm_snd_enum[18], |
| 1780 | slim4_rx_sample_rate_get, slim4_rx_sample_rate_put), |
| 1781 | SOC_ENUM_EXT("SLIM_5_RX SampleRate", msm_snd_enum[6], |
| 1782 | slim5_rx_sample_rate_get, slim5_rx_sample_rate_put), |
| 1783 | SOC_ENUM_EXT("SLIM_6_RX SampleRate", msm_snd_enum[10], |
| 1784 | slim6_rx_sample_rate_get, slim6_rx_sample_rate_put), |
| 1785 | SOC_ENUM_EXT("VI_FEED_TX Channels", msm_snd_enum[5], |
| 1786 | msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put), |
| 1787 | SOC_ENUM_EXT("SLIM_0_TX SampleRate", msm_snd_enum[4], |
| 1788 | slim0_tx_sample_rate_get, slim0_tx_sample_rate_put), |
| 1789 | SOC_ENUM_EXT("SLIM_0_TX Format", msm_snd_enum[3], |
| 1790 | slim0_tx_bit_format_get, slim0_tx_bit_format_put), |
| 1791 | SOC_ENUM_EXT("SLIM_2_TX SampleRate", msm_snd_enum[4], |
| 1792 | slim2_tx_sample_rate_get, slim2_tx_sample_rate_put), |
| 1793 | SOC_ENUM_EXT("SLIM_2_TX Format", msm_snd_enum[3], |
| 1794 | slim2_tx_bit_format_get, slim2_tx_bit_format_put), |
| 1795 | SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0], |
| 1796 | msm_btsco_rate_get, msm_btsco_rate_put), |
| 1797 | SOC_ENUM_EXT("AUXPCM SampleRate", msm_auxpcm_enum[0], |
| 1798 | msm_auxpcm_rate_get, msm_auxpcm_rate_put), |
| 1799 | SOC_ENUM_EXT("PROXY_RX Channels", msm_snd_enum[9], |
| 1800 | msm_proxy_rx_ch_get, msm_proxy_rx_ch_put), |
| 1801 | SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", msm_snd_enum[13], |
| 1802 | msm_pri_tdm_rx_0_ch_get, msm_pri_tdm_rx_0_ch_put), |
| 1803 | SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", msm_snd_enum[13], |
| 1804 | msm_pri_tdm_tx_0_ch_get, msm_pri_tdm_tx_0_ch_put), |
| 1805 | SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", msm_snd_enum[13], |
| 1806 | msm_sec_tdm_rx_0_ch_get, msm_sec_tdm_rx_0_ch_put), |
| 1807 | SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", msm_snd_enum[13], |
| 1808 | msm_sec_tdm_tx_0_ch_get, msm_sec_tdm_tx_0_ch_put), |
| 1809 | SOC_ENUM_EXT("PRI_TDM_RX_0 Bit Format", msm_snd_enum[14], |
| 1810 | msm_pri_tdm_rx_0_bit_format_get, |
| 1811 | msm_pri_tdm_rx_0_bit_format_put), |
| 1812 | SOC_ENUM_EXT("PRI_TDM_TX_0 Bit Format", msm_snd_enum[14], |
| 1813 | msm_pri_tdm_tx_0_bit_format_get, |
| 1814 | msm_pri_tdm_tx_0_bit_format_put), |
| 1815 | SOC_ENUM_EXT("SEC_TDM_RX_0 Bit Format", msm_snd_enum[14], |
| 1816 | msm_sec_tdm_rx_0_bit_format_get, |
| 1817 | msm_sec_tdm_rx_0_bit_format_put), |
| 1818 | SOC_ENUM_EXT("SEC_TDM_TX_0 Bit Format", msm_snd_enum[14], |
| 1819 | msm_sec_tdm_tx_0_bit_format_get, |
| 1820 | msm_sec_tdm_tx_0_bit_format_put), |
| 1821 | SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", msm_snd_enum[15], |
| 1822 | msm_pri_tdm_rx_0_sample_rate_get, |
| 1823 | msm_pri_tdm_rx_0_sample_rate_put), |
| 1824 | SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", msm_snd_enum[15], |
| 1825 | msm_pri_tdm_tx_0_sample_rate_get, |
| 1826 | msm_pri_tdm_tx_0_sample_rate_put), |
| 1827 | SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", msm_snd_enum[15], |
| 1828 | msm_sec_tdm_rx_0_sample_rate_get, |
| 1829 | msm_sec_tdm_rx_0_sample_rate_put), |
| 1830 | SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", msm_snd_enum[15], |
| 1831 | msm_sec_tdm_tx_0_sample_rate_get, |
| 1832 | msm_sec_tdm_tx_0_sample_rate_put), |
| 1833 | }; |
| 1834 | |
| 1835 | int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1836 | struct snd_pcm_hw_params *params) |
| 1837 | { |
| 1838 | struct snd_interval *rate = hw_param_interval(params, |
| 1839 | SNDRV_PCM_HW_PARAM_RATE); |
| 1840 | |
| 1841 | struct snd_interval *channels = hw_param_interval(params, |
| 1842 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1843 | |
| 1844 | pr_debug("%s()\n", __func__); |
| 1845 | rate->min = rate->max = 48000; |
| 1846 | channels->min = channels->max = 2; |
| 1847 | |
| 1848 | return 0; |
| 1849 | } |
| 1850 | |
| 1851 | int msm_quin_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1852 | struct snd_pcm_hw_params *params) |
| 1853 | { |
| 1854 | struct snd_interval *rate = hw_param_interval(params, |
| 1855 | SNDRV_PCM_HW_PARAM_RATE); |
| 1856 | |
| 1857 | struct snd_interval *channels = hw_param_interval(params, |
| 1858 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1859 | |
| 1860 | pr_debug("%s()\n", __func__); |
| 1861 | rate->min = rate->max = 48000; |
| 1862 | channels->min = channels->max = 2; |
| 1863 | |
| 1864 | return 0; |
| 1865 | } |
| 1866 | |
| 1867 | int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1868 | struct snd_pcm_hw_params *params) |
| 1869 | { |
| 1870 | struct snd_interval *rate = hw_param_interval(params, |
| 1871 | SNDRV_PCM_HW_PARAM_RATE); |
| 1872 | |
| 1873 | struct snd_interval *channels = hw_param_interval(params, |
| 1874 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1875 | |
| 1876 | rate->min = rate->max = msm8952_auxpcm_rate; |
| 1877 | channels->min = channels->max = 1; |
| 1878 | |
| 1879 | return 0; |
| 1880 | } |
| 1881 | |
| 1882 | int msm_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1883 | struct snd_pcm_hw_params *params) |
| 1884 | { |
| 1885 | struct snd_interval *rate = hw_param_interval(params, |
| 1886 | SNDRV_PCM_HW_PARAM_RATE); |
| 1887 | |
| 1888 | struct snd_interval *channels = hw_param_interval(params, |
| 1889 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1890 | |
| 1891 | rate->min = rate->max = msm_btsco_rate; |
| 1892 | channels->min = channels->max = msm_btsco_ch; |
| 1893 | |
| 1894 | return 0; |
| 1895 | } |
| 1896 | |
| 1897 | int msm_proxy_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1898 | struct snd_pcm_hw_params *params) |
| 1899 | { |
| 1900 | struct snd_interval *rate = hw_param_interval(params, |
| 1901 | SNDRV_PCM_HW_PARAM_RATE); |
| 1902 | |
| 1903 | struct snd_interval *channels = hw_param_interval(params, |
| 1904 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1905 | |
| 1906 | pr_debug("%s: msm_proxy_rx_ch =%d\n", __func__, msm_proxy_rx_ch); |
| 1907 | |
| 1908 | if (channels->max < 2) |
| 1909 | channels->min = channels->max = 2; |
| 1910 | channels->min = channels->max = msm_proxy_rx_ch; |
| 1911 | rate->min = rate->max = 48000; |
| 1912 | return 0; |
| 1913 | } |
| 1914 | |
| 1915 | int msm_proxy_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1916 | struct snd_pcm_hw_params *params) |
| 1917 | { |
| 1918 | struct snd_interval *rate = hw_param_interval(params, |
| 1919 | SNDRV_PCM_HW_PARAM_RATE); |
| 1920 | |
| 1921 | rate->min = rate->max = 48000; |
| 1922 | return 0; |
| 1923 | } |
| 1924 | |
| 1925 | int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 1926 | struct snd_pcm_hw_params *params) |
| 1927 | { |
| 1928 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 1929 | struct snd_interval *rate = hw_param_interval(params, |
| 1930 | SNDRV_PCM_HW_PARAM_RATE); |
| 1931 | struct snd_interval *channels = hw_param_interval(params, |
| 1932 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 1933 | |
| 1934 | switch (cpu_dai->id) { |
| 1935 | case AFE_PORT_ID_PRIMARY_TDM_RX: |
| 1936 | channels->min = channels->max = msm_pri_tdm_rx_0_ch; |
| 1937 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 1938 | msm_pri_tdm_rx_0_bit_format); |
| 1939 | rate->min = rate->max = msm_pri_tdm_rx_0_sample_rate; |
| 1940 | break; |
| 1941 | case AFE_PORT_ID_PRIMARY_TDM_TX: |
| 1942 | channels->min = channels->max = msm_pri_tdm_tx_0_ch; |
| 1943 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 1944 | msm_pri_tdm_tx_0_bit_format); |
| 1945 | rate->min = rate->max = msm_pri_tdm_tx_0_sample_rate; |
| 1946 | break; |
| 1947 | case AFE_PORT_ID_SECONDARY_TDM_RX: |
| 1948 | channels->min = channels->max = msm_sec_tdm_rx_0_ch; |
| 1949 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 1950 | msm_sec_tdm_rx_0_bit_format); |
| 1951 | rate->min = rate->max = msm_sec_tdm_rx_0_sample_rate; |
| 1952 | break; |
| 1953 | case AFE_PORT_ID_SECONDARY_TDM_TX: |
| 1954 | channels->min = channels->max = msm_sec_tdm_tx_0_ch; |
| 1955 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 1956 | msm_sec_tdm_tx_0_bit_format); |
| 1957 | rate->min = rate->max = msm_sec_tdm_tx_0_sample_rate; |
| 1958 | break; |
| 1959 | default: |
| 1960 | pr_err("%s: dai id 0x%x not supported\n", |
| 1961 | __func__, cpu_dai->id); |
| 1962 | return -EINVAL; |
| 1963 | } |
| 1964 | |
| 1965 | pr_debug("%s: dai id = 0x%x channels = %d rate = %d\n", |
| 1966 | __func__, cpu_dai->id, channels->max, rate->max); |
| 1967 | |
| 1968 | return 0; |
| 1969 | } |
| 1970 | |
| 1971 | static unsigned int tdm_param_set_slot_mask(u16 port_id, |
| 1972 | int slot_width, int slots) |
| 1973 | { |
| 1974 | unsigned int slot_mask = 0; |
| 1975 | int upper, lower, i, j; |
| 1976 | unsigned int *slot_offset; |
| 1977 | |
| 1978 | switch (port_id) { |
| 1979 | case AFE_PORT_ID_PRIMARY_TDM_RX: |
| 1980 | lower = PRIMARY_TDM_RX_0; |
| 1981 | upper = PRIMARY_TDM_RX_0; |
| 1982 | break; |
| 1983 | case AFE_PORT_ID_PRIMARY_TDM_TX: |
| 1984 | lower = PRIMARY_TDM_TX_0; |
| 1985 | upper = PRIMARY_TDM_TX_0; |
| 1986 | break; |
| 1987 | case AFE_PORT_ID_SECONDARY_TDM_RX: |
| 1988 | lower = SECONDARY_TDM_RX_0; |
| 1989 | upper = SECONDARY_TDM_RX_0; |
| 1990 | break; |
| 1991 | case AFE_PORT_ID_SECONDARY_TDM_TX: |
| 1992 | lower = SECONDARY_TDM_TX_0; |
| 1993 | upper = SECONDARY_TDM_TX_0; |
| 1994 | break; |
| 1995 | default: |
| 1996 | return slot_mask; |
| 1997 | } |
| 1998 | |
| 1999 | for (i = lower; i <= upper; i++) { |
| 2000 | slot_offset = tdm_slot_offset[i]; |
| 2001 | for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) { |
| 2002 | if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID) |
| 2003 | /* |
| 2004 | * set the mask of active slot according to |
| 2005 | * the offset table for the group of devices |
| 2006 | */ |
| 2007 | slot_mask |= |
| 2008 | (1 << ((slot_offset[j] * 8) / slot_width)); |
| 2009 | else |
| 2010 | break; |
| 2011 | } |
| 2012 | } |
| 2013 | |
| 2014 | return slot_mask; |
| 2015 | } |
| 2016 | |
| 2017 | int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream, |
| 2018 | struct snd_pcm_hw_params *params) |
| 2019 | { |
| 2020 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2021 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2022 | int ret = 0; |
| 2023 | int channels, slot_width, slots; |
| 2024 | unsigned int slot_mask; |
| 2025 | unsigned int *slot_offset; |
| 2026 | int offset_channels = 0; |
| 2027 | int i; |
| 2028 | |
| 2029 | pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id); |
| 2030 | |
| 2031 | channels = params_channels(params); |
| 2032 | switch (channels) { |
| 2033 | case 1: |
| 2034 | case 2: |
| 2035 | case 3: |
| 2036 | case 4: |
| 2037 | case 6: |
| 2038 | case 8: |
| 2039 | switch (params_format(params)) { |
| 2040 | case SNDRV_PCM_FORMAT_S32_LE: |
| 2041 | case SNDRV_PCM_FORMAT_S24_LE: |
| 2042 | case SNDRV_PCM_FORMAT_S16_LE: |
| 2043 | /* |
| 2044 | * up to 8 channel HW configuration should |
| 2045 | * use 32 bit slot width for max support of |
| 2046 | * stream bit width. (slot_width > bit_width) |
| 2047 | */ |
| 2048 | slot_width = 32; |
| 2049 | break; |
| 2050 | default: |
| 2051 | pr_err("%s: invalid param format 0x%x\n", |
| 2052 | __func__, params_format(params)); |
| 2053 | return -EINVAL; |
| 2054 | } |
| 2055 | slots = 8; |
| 2056 | slot_mask = tdm_param_set_slot_mask(cpu_dai->id, |
| 2057 | slot_width, slots); |
| 2058 | if (!slot_mask) { |
| 2059 | pr_err("%s: invalid slot_mask 0x%x\n", |
| 2060 | __func__, slot_mask); |
| 2061 | return -EINVAL; |
| 2062 | } |
| 2063 | break; |
| 2064 | default: |
| 2065 | pr_err("%s: invalid param channels %d\n", |
| 2066 | __func__, channels); |
| 2067 | return -EINVAL; |
| 2068 | } |
| 2069 | |
| 2070 | switch (cpu_dai->id) { |
| 2071 | case AFE_PORT_ID_PRIMARY_TDM_RX: |
| 2072 | slot_offset = tdm_slot_offset[PRIMARY_TDM_RX_0]; |
| 2073 | break; |
| 2074 | case AFE_PORT_ID_PRIMARY_TDM_TX: |
| 2075 | slot_offset = tdm_slot_offset[PRIMARY_TDM_TX_0]; |
| 2076 | break; |
| 2077 | case AFE_PORT_ID_SECONDARY_TDM_RX: |
| 2078 | slot_offset = tdm_slot_offset[SECONDARY_TDM_RX_0]; |
| 2079 | break; |
| 2080 | case AFE_PORT_ID_SECONDARY_TDM_TX: |
| 2081 | slot_offset = tdm_slot_offset[SECONDARY_TDM_TX_0]; |
| 2082 | break; |
| 2083 | default: |
| 2084 | pr_err("%s: dai id 0x%x not supported\n", |
| 2085 | __func__, cpu_dai->id); |
| 2086 | return -EINVAL; |
| 2087 | } |
| 2088 | |
| 2089 | for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) { |
| 2090 | if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID) |
| 2091 | offset_channels++; |
| 2092 | else |
| 2093 | break; |
| 2094 | } |
| 2095 | |
| 2096 | if (offset_channels == 0) { |
| 2097 | pr_err("%s: slot offset not supported, offset_channels %d\n", |
| 2098 | __func__, offset_channels); |
| 2099 | return -EINVAL; |
| 2100 | } |
| 2101 | |
| 2102 | if (channels > offset_channels) { |
| 2103 | pr_err("%s: channels %d exceed offset_channels %d\n", |
| 2104 | __func__, channels, offset_channels); |
| 2105 | return -EINVAL; |
| 2106 | } |
| 2107 | |
| 2108 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2109 | ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask, |
| 2110 | slots, slot_width); |
| 2111 | if (ret < 0) { |
| 2112 | pr_err("%s: failed to set tdm slot, err:%d\n", |
| 2113 | __func__, ret); |
| 2114 | goto end; |
| 2115 | } |
| 2116 | |
| 2117 | ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 2118 | 0, NULL, channels, slot_offset); |
| 2119 | if (ret < 0) { |
| 2120 | pr_err("%s: failed to set channel map, err:%d\n", |
| 2121 | __func__, ret); |
| 2122 | goto end; |
| 2123 | } |
| 2124 | } else { |
| 2125 | ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0, |
| 2126 | slots, slot_width); |
| 2127 | if (ret < 0) { |
| 2128 | pr_err("%s: failed to set tdm slot, err:%d\n", |
| 2129 | __func__, ret); |
| 2130 | goto end; |
| 2131 | } |
| 2132 | |
| 2133 | ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 2134 | channels, slot_offset, 0, NULL); |
| 2135 | if (ret < 0) { |
| 2136 | pr_err("%s: failed to set channel map, err:%d\n", |
| 2137 | __func__, ret); |
| 2138 | goto end; |
| 2139 | } |
| 2140 | } |
| 2141 | |
| 2142 | end: |
| 2143 | return ret; |
| 2144 | } |
| 2145 | |
| 2146 | int msm_mi2s_snd_hw_params(struct snd_pcm_substream *substream, |
| 2147 | struct snd_pcm_hw_params *params) |
| 2148 | { |
| 2149 | pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| 2150 | substream->name, substream->stream); |
| 2151 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, mi2s_rx_bit_format); |
| 2152 | return 0; |
| 2153 | } |
| 2154 | |
| 2155 | int msm_snd_hw_params(struct snd_pcm_substream *substream, |
| 2156 | struct snd_pcm_hw_params *params) |
| 2157 | { |
| 2158 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2159 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 2160 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2161 | struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| 2162 | |
| 2163 | int ret = 0; |
| 2164 | u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS]; |
| 2165 | u32 rx_ch_cnt = 0, tx_ch_cnt = 0; |
| 2166 | u32 user_set_tx_ch = 0; |
| 2167 | u32 rx_ch_count; |
| 2168 | |
| 2169 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2170 | ret = snd_soc_dai_get_channel_map(codec_dai, |
| 2171 | &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| 2172 | if (ret < 0) { |
| 2173 | pr_err("%s: failed to get codec chan map, err:%d\n", |
| 2174 | __func__, ret); |
| 2175 | goto end; |
| 2176 | } |
| 2177 | if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_RX) { |
| 2178 | pr_debug("%s: rx_4_ch=%d\n", __func__, |
| 2179 | msm_slim_4_rx_ch); |
| 2180 | rx_ch_count = msm_slim_4_rx_ch; |
| 2181 | } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) { |
| 2182 | pr_debug("%s: rx_5_ch=%d\n", __func__, |
| 2183 | msm_slim_5_rx_ch); |
| 2184 | rx_ch_count = msm_slim_5_rx_ch; |
| 2185 | } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) { |
| 2186 | pr_debug("%s: rx_6_ch=%d\n", __func__, |
| 2187 | msm_slim_6_rx_ch); |
| 2188 | rx_ch_count = msm_slim_6_rx_ch; |
| 2189 | } else { |
| 2190 | pr_debug("%s: rx_0_ch=%d\n", __func__, |
| 2191 | msm_slim_0_rx_ch); |
| 2192 | rx_ch_count = msm_slim_0_rx_ch; |
| 2193 | } |
| 2194 | ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0, |
| 2195 | rx_ch_count, rx_ch); |
| 2196 | if (ret < 0) { |
| 2197 | pr_err("%s: failed to set cpu chan map, err:%d\n", |
| 2198 | __func__, ret); |
| 2199 | goto end; |
| 2200 | } |
| 2201 | } else { |
| 2202 | pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__, |
| 2203 | codec_dai->name, codec_dai->id, user_set_tx_ch); |
| 2204 | ret = snd_soc_dai_get_channel_map(codec_dai, |
| 2205 | &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| 2206 | if (ret < 0) { |
| 2207 | pr_err("%s: failed to get codec chan map\n, err:%d\n", |
| 2208 | __func__, ret); |
| 2209 | goto end; |
| 2210 | } |
| 2211 | /* For <codec>_tx1 case */ |
| 2212 | if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX) |
| 2213 | user_set_tx_ch = msm_slim_0_tx_ch; |
| 2214 | /* For <codec>_tx2 case */ |
| 2215 | else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX) |
| 2216 | user_set_tx_ch = msm_slim_1_tx_ch; |
| 2217 | else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_TX) |
| 2218 | user_set_tx_ch = msm_slim_2_tx_ch; |
| 2219 | else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_3_TX) |
| 2220 | /* DAI 5 is used for external EC reference from codec. |
| 2221 | * Since Rx is fed as reference for EC, the config of |
| 2222 | * this DAI is based on that of the Rx path. |
| 2223 | */ |
| 2224 | user_set_tx_ch = msm_slim_0_rx_ch; |
| 2225 | else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX) |
| 2226 | user_set_tx_ch = msm_vi_feed_tx_ch; |
| 2227 | else |
| 2228 | user_set_tx_ch = tx_ch_cnt; |
| 2229 | |
| 2230 | pr_debug( |
| 2231 | "%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d)\n", |
| 2232 | __func__, msm_slim_0_tx_ch, user_set_tx_ch, tx_ch_cnt); |
| 2233 | |
| 2234 | ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 2235 | user_set_tx_ch, tx_ch, 0, 0); |
| 2236 | if (ret < 0) { |
| 2237 | pr_err("%s: failed to set cpu chan map, err:%d\n", |
| 2238 | __func__, ret); |
| 2239 | goto end; |
| 2240 | } |
| 2241 | } |
| 2242 | end: |
| 2243 | return ret; |
| 2244 | } |
| 2245 | |
| 2246 | int msm8952_slimbus_2_hw_params(struct snd_pcm_substream *substream, |
| 2247 | struct snd_pcm_hw_params *params) |
| 2248 | { |
| 2249 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2250 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 2251 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2252 | int ret = 0; |
| 2253 | unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS]; |
| 2254 | unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0; |
| 2255 | unsigned int num_tx_ch = 0; |
| 2256 | unsigned int num_rx_ch = 0; |
| 2257 | |
| 2258 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2259 | num_rx_ch = params_channels(params); |
| 2260 | pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__, |
| 2261 | codec_dai->name, codec_dai->id, num_rx_ch); |
| 2262 | ret = snd_soc_dai_get_channel_map(codec_dai, |
| 2263 | &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| 2264 | if (ret < 0) { |
| 2265 | pr_err("%s: failed to get codec chan map, err:%d\n", |
| 2266 | __func__, ret); |
| 2267 | goto end; |
| 2268 | } |
| 2269 | ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0, |
| 2270 | num_rx_ch, rx_ch); |
| 2271 | if (ret < 0) { |
| 2272 | pr_err("%s: failed to set cpu chan map, err:%d\n", |
| 2273 | __func__, ret); |
| 2274 | goto end; |
| 2275 | } |
| 2276 | } else { |
| 2277 | num_tx_ch = params_channels(params); |
| 2278 | pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__, |
| 2279 | codec_dai->name, codec_dai->id, num_tx_ch); |
| 2280 | ret = snd_soc_dai_get_channel_map(codec_dai, |
| 2281 | &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); |
| 2282 | if (ret < 0) { |
| 2283 | pr_err("%s: failed to get codec chan map, err:%d\n", |
| 2284 | __func__, ret); |
| 2285 | goto end; |
| 2286 | } |
| 2287 | ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 2288 | num_tx_ch, tx_ch, 0, 0); |
| 2289 | if (ret < 0) { |
| 2290 | pr_err("%s: failed to set cpu chan map, err:%d\n", |
| 2291 | __func__, ret); |
| 2292 | goto end; |
| 2293 | } |
| 2294 | } |
| 2295 | end: |
| 2296 | return ret; |
| 2297 | } |
| 2298 | |
| 2299 | int msm_slim_0_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2300 | struct snd_pcm_hw_params *params) |
| 2301 | { |
| 2302 | struct snd_interval *rate = hw_param_interval(params, |
| 2303 | SNDRV_PCM_HW_PARAM_RATE); |
| 2304 | |
| 2305 | struct snd_interval *channels = |
| 2306 | hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2307 | |
| 2308 | pr_debug("%s()\n", __func__); |
| 2309 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2310 | slim0_rx_bit_format); |
| 2311 | rate->min = rate->max = slim0_rx_sample_rate; |
| 2312 | channels->min = channels->max = msm_slim_0_rx_ch; |
| 2313 | |
| 2314 | pr_debug("%s: format = %d, rate = %d, channels = %d\n", |
| 2315 | __func__, params_format(params), params_rate(params), |
| 2316 | msm_slim_0_rx_ch); |
| 2317 | |
| 2318 | return 0; |
| 2319 | } |
| 2320 | |
| 2321 | int msm_slim_0_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2322 | struct snd_pcm_hw_params *params) |
| 2323 | { |
| 2324 | struct snd_interval *rate = hw_param_interval(params, |
| 2325 | SNDRV_PCM_HW_PARAM_RATE); |
| 2326 | |
| 2327 | struct snd_interval *channels = hw_param_interval(params, |
| 2328 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2329 | |
| 2330 | pr_debug("%s()\n", __func__); |
| 2331 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2332 | slim0_tx_bit_format); |
| 2333 | rate->min = rate->max = slim0_tx_sample_rate; |
| 2334 | channels->min = channels->max = msm_slim_0_tx_ch; |
| 2335 | |
| 2336 | return 0; |
| 2337 | } |
| 2338 | |
| 2339 | int msm_slim_1_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2340 | struct snd_pcm_hw_params *params) |
| 2341 | { |
| 2342 | struct snd_interval *rate = hw_param_interval(params, |
| 2343 | SNDRV_PCM_HW_PARAM_RATE); |
| 2344 | |
| 2345 | struct snd_interval *channels = hw_param_interval(params, |
| 2346 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2347 | |
| 2348 | pr_debug("%s()\n", __func__); |
| 2349 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2350 | slim1_tx_bit_format); |
| 2351 | rate->min = rate->max = slim1_tx_sample_rate; |
| 2352 | channels->min = channels->max = msm_slim_1_tx_ch; |
| 2353 | |
| 2354 | return 0; |
| 2355 | } |
| 2356 | |
| 2357 | int msm_slim_2_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2358 | struct snd_pcm_hw_params *params) |
| 2359 | { |
| 2360 | struct snd_interval *rate = hw_param_interval(params, |
| 2361 | SNDRV_PCM_HW_PARAM_RATE); |
| 2362 | |
| 2363 | struct snd_interval *channels = hw_param_interval(params, |
| 2364 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2365 | |
| 2366 | pr_debug("%s()\n", __func__); |
| 2367 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2368 | slim2_tx_bit_format); |
| 2369 | rate->min = rate->max = slim2_tx_sample_rate; |
| 2370 | channels->min = channels->max = msm_slim_2_tx_ch; |
| 2371 | |
| 2372 | return 0; |
| 2373 | } |
| 2374 | |
| 2375 | int msm_slim_4_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2376 | struct snd_pcm_hw_params *params) |
| 2377 | { |
| 2378 | struct snd_interval *rate = hw_param_interval(params, |
| 2379 | SNDRV_PCM_HW_PARAM_RATE); |
| 2380 | |
| 2381 | struct snd_interval *channels = |
| 2382 | hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2383 | |
| 2384 | pr_debug("%s()\n", __func__); |
| 2385 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2386 | slim4_rx_bit_format); |
| 2387 | rate->min = rate->max = slim4_rx_sample_rate; |
| 2388 | channels->min = channels->max = msm_slim_4_rx_ch; |
| 2389 | |
| 2390 | pr_debug("%s: format = %d, rate = %d, channels = %d\n", |
| 2391 | __func__, params_format(params), params_rate(params), |
| 2392 | msm_slim_4_rx_ch); |
| 2393 | |
| 2394 | return 0; |
| 2395 | } |
| 2396 | |
| 2397 | int msm_slim_4_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2398 | struct snd_pcm_hw_params *params) |
| 2399 | { |
| 2400 | struct snd_interval *rate = hw_param_interval(params, |
| 2401 | SNDRV_PCM_HW_PARAM_RATE); |
| 2402 | |
| 2403 | struct snd_interval *channels = hw_param_interval(params, |
| 2404 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2405 | |
| 2406 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 2407 | |
| 2408 | pr_debug("%s: codec name: %s", __func__, codec_dai->name); |
| 2409 | if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| 2410 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2411 | SNDRV_PCM_FORMAT_S32_LE); |
| 2412 | rate->min = rate->max = SAMPLING_RATE_8KHZ; |
| 2413 | channels->min = channels->max = msm_vi_feed_tx_ch; |
| 2414 | pr_debug("%s: tasha vi sample rate = %d\n", |
| 2415 | __func__, rate->min); |
| 2416 | } else { |
| 2417 | rate->min = rate->max = SAMPLING_RATE_48KHZ; |
| 2418 | channels->min = channels->max = msm_vi_feed_tx_ch; |
| 2419 | pr_debug("%s: default sample rate = %d\n", |
| 2420 | __func__, rate->min); |
| 2421 | } |
| 2422 | |
| 2423 | pr_debug("%s: %d\n", __func__, msm_vi_feed_tx_ch); |
| 2424 | return 0; |
| 2425 | } |
| 2426 | |
| 2427 | int msm_slim_5_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2428 | struct snd_pcm_hw_params *params) |
| 2429 | { |
| 2430 | struct snd_interval *rate = hw_param_interval(params, |
| 2431 | SNDRV_PCM_HW_PARAM_RATE); |
| 2432 | struct snd_interval *channels = hw_param_interval(params, |
| 2433 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2434 | |
| 2435 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2436 | slim5_rx_bit_format); |
| 2437 | rate->min = rate->max = slim5_rx_sample_rate; |
| 2438 | channels->min = channels->max = msm_slim_5_rx_ch; |
| 2439 | |
| 2440 | pr_debug("%s: format = %d, rate = %d, channels = %d\n", |
| 2441 | __func__, params_format(params), params_rate(params), |
| 2442 | msm_slim_5_rx_ch); |
| 2443 | |
| 2444 | return 0; |
| 2445 | } |
| 2446 | |
| 2447 | int msm_slim_6_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2448 | struct snd_pcm_hw_params *params) |
| 2449 | { |
| 2450 | struct snd_interval *rate = hw_param_interval(params, |
| 2451 | SNDRV_PCM_HW_PARAM_RATE); |
| 2452 | struct snd_interval *channels = hw_param_interval(params, |
| 2453 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2454 | |
| 2455 | param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT, |
| 2456 | slim6_rx_bit_format); |
| 2457 | rate->min = rate->max = slim6_rx_sample_rate; |
| 2458 | channels->min = channels->max = msm_slim_6_rx_ch; |
| 2459 | |
| 2460 | pr_debug("%s: format = %d, rate = %d, channels = %d\n", |
| 2461 | __func__, params_format(params), params_rate(params), |
| 2462 | msm_slim_6_rx_ch); |
| 2463 | |
| 2464 | return 0; |
| 2465 | } |
| 2466 | |
| 2467 | int msm_slim_5_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 2468 | struct snd_pcm_hw_params *params) |
| 2469 | { |
| 2470 | int rc; |
| 2471 | void *config; |
| 2472 | struct snd_soc_codec *codec = rtd->codec; |
| 2473 | struct snd_interval *rate = |
| 2474 | hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); |
| 2475 | struct snd_interval *channels = |
| 2476 | hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); |
| 2477 | struct snd_soc_card *card = codec->component.card; |
| 2478 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2479 | |
| 2480 | pr_debug("%s enter\n", __func__); |
| 2481 | |
| 2482 | rate->min = rate->max = 16000; |
| 2483 | channels->min = channels->max = 1; |
| 2484 | config = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2485 | AFE_SLIMBUS_SLAVE_PORT_CONFIG); |
| 2486 | rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG, config, |
| 2487 | SLIMBUS_5_TX); |
| 2488 | if (rc) { |
| 2489 | pr_err("%s: Failed to set slimbus slave port config %d\n", |
| 2490 | __func__, rc); |
| 2491 | return rc; |
| 2492 | } |
| 2493 | return 0; |
| 2494 | } |
| 2495 | |
| 2496 | int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream, |
| 2497 | struct snd_pcm_hw_params *params) |
| 2498 | { |
| 2499 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2500 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 2501 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2502 | struct snd_soc_dai_link *dai_link = rtd->dai_link; |
| 2503 | int ret = 0; |
| 2504 | u32 tx_ch[SLIM_MAX_TX_PORTS]; |
| 2505 | u32 tx_ch_cnt = 0; |
| 2506 | u32 user_set_tx_ch = 0; |
| 2507 | |
| 2508 | if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) { |
| 2509 | pr_err("%s: Invalid stream type %d\n", |
| 2510 | __func__, substream->stream); |
| 2511 | ret = -EINVAL; |
| 2512 | goto end; |
| 2513 | } |
| 2514 | |
| 2515 | pr_debug("%s: %s_tx_dai_id_%d\n", __func__, |
| 2516 | codec_dai->name, codec_dai->id); |
| 2517 | ret = snd_soc_dai_get_channel_map(codec_dai, |
| 2518 | &tx_ch_cnt, tx_ch, NULL, NULL); |
| 2519 | if (ret < 0) { |
| 2520 | pr_err("%s: failed to get codec chan map\n, err:%d\n", |
| 2521 | __func__, ret); |
| 2522 | goto end; |
| 2523 | } |
| 2524 | |
| 2525 | user_set_tx_ch = tx_ch_cnt; |
| 2526 | |
| 2527 | pr_debug("%s: tx_ch_cnt(%d) id %d\n", |
| 2528 | __func__, tx_ch_cnt, dai_link->id); |
| 2529 | |
| 2530 | ret = snd_soc_dai_set_channel_map(cpu_dai, |
| 2531 | user_set_tx_ch, tx_ch, 0, 0); |
| 2532 | if (ret < 0) { |
| 2533 | pr_err("%s: failed to set cpu chan map, err:%d\n", |
| 2534 | __func__, ret); |
| 2535 | goto end; |
| 2536 | } |
| 2537 | end: |
| 2538 | return ret; |
| 2539 | } |
| 2540 | |
| 2541 | static int msm_afe_set_config(struct snd_soc_codec *codec) |
| 2542 | { |
| 2543 | int rc; |
| 2544 | void *config_data; |
| 2545 | struct snd_soc_card *card = codec->component.card; |
| 2546 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2547 | |
| 2548 | pr_debug("%s: enter\n", __func__); |
| 2549 | |
| 2550 | if (!pdata->msm8952_codec_fn.get_afe_config_fn) { |
| 2551 | dev_err(codec->dev, "%s: codec get afe config not init'ed\n", |
| 2552 | __func__); |
| 2553 | return -EINVAL; |
| 2554 | } |
| 2555 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2556 | AFE_CDC_REGISTERS_CONFIG); |
| 2557 | if (config_data) { |
| 2558 | rc = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0); |
| 2559 | if (rc) { |
| 2560 | pr_err("%s: Failed to set codec registers config %d\n", |
| 2561 | __func__, rc); |
| 2562 | return rc; |
| 2563 | } |
| 2564 | } |
| 2565 | |
| 2566 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2567 | AFE_CDC_REGISTER_PAGE_CONFIG); |
| 2568 | if (config_data) { |
| 2569 | rc = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data, |
| 2570 | 0); |
| 2571 | if (rc) |
| 2572 | pr_err("%s: Failed to set cdc register page config\n", |
| 2573 | __func__); |
| 2574 | } |
| 2575 | |
| 2576 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2577 | AFE_SLIMBUS_SLAVE_CONFIG); |
| 2578 | if (config_data) { |
| 2579 | rc = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0); |
| 2580 | if (rc) { |
| 2581 | pr_err("%s: Failed to set slimbus slave config %d\n", |
| 2582 | __func__, rc); |
| 2583 | return rc; |
| 2584 | } |
| 2585 | } |
| 2586 | |
| 2587 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2588 | AFE_AANC_VERSION); |
| 2589 | if (config_data) { |
| 2590 | rc = afe_set_config(AFE_AANC_VERSION, config_data, 0); |
| 2591 | if (rc) { |
| 2592 | pr_err("%s: Failed to set AANC version %d\n", |
| 2593 | __func__, rc); |
| 2594 | return rc; |
| 2595 | } |
| 2596 | } |
| 2597 | |
| 2598 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2599 | AFE_CDC_CLIP_REGISTERS_CONFIG); |
| 2600 | if (config_data) { |
| 2601 | rc = afe_set_config(AFE_CDC_CLIP_REGISTERS_CONFIG, |
| 2602 | config_data, 0); |
| 2603 | if (rc) { |
| 2604 | pr_err("%s: Failed to set clip registers %d\n", |
| 2605 | __func__, rc); |
| 2606 | return rc; |
| 2607 | } |
| 2608 | } |
| 2609 | |
| 2610 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2611 | AFE_CLIP_BANK_SEL); |
| 2612 | if (config_data) { |
| 2613 | rc = afe_set_config(AFE_CLIP_BANK_SEL, |
| 2614 | config_data, 0); |
| 2615 | if (rc) { |
| 2616 | pr_err("%s: Failed to set AFE bank selection %d\n", |
| 2617 | __func__, rc); |
| 2618 | return rc; |
| 2619 | } |
| 2620 | } |
| 2621 | |
| 2622 | config_data = pdata->msm8952_codec_fn.get_afe_config_fn(codec, |
| 2623 | AFE_CDC_REGISTER_PAGE_CONFIG); |
| 2624 | if (config_data) { |
| 2625 | rc = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data, |
| 2626 | 0); |
| 2627 | if (rc) |
| 2628 | pr_err("%s: Failed to set cdc register page config\n", |
| 2629 | __func__); |
| 2630 | } |
| 2631 | |
| 2632 | return 0; |
| 2633 | } |
| 2634 | |
| 2635 | static void msm_afe_clear_config(void) |
| 2636 | { |
| 2637 | afe_clear_config(AFE_CDC_REGISTERS_CONFIG); |
| 2638 | afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG); |
| 2639 | } |
| 2640 | |
| 2641 | static int quat_mi2s_clk_ctl(struct snd_pcm_substream *substream, bool enable) |
| 2642 | { |
| 2643 | int ret = 0; |
| 2644 | |
| 2645 | if (enable) { |
| 2646 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2647 | mi2s_rx_clk.enable = enable; |
| 2648 | mi2s_rx_clk.clk_id = |
| 2649 | Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT; |
| 2650 | if ((mi2s_rx_bit_format == SNDRV_PCM_FORMAT_S24_LE) || |
| 2651 | (mi2s_rx_bit_format == |
| 2652 | SNDRV_PCM_FORMAT_S24_3LE)) |
| 2653 | mi2s_rx_clk.clk_freq_in_hz = |
| 2654 | Q6AFE_LPASS_IBIT_CLK_3_P072_MHZ; |
| 2655 | else |
| 2656 | mi2s_rx_clk.clk_freq_in_hz = |
| 2657 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; |
| 2658 | ret = afe_set_lpass_clock_v2( |
| 2659 | AFE_PORT_ID_QUATERNARY_MI2S_RX, |
| 2660 | &mi2s_rx_clk); |
| 2661 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 2662 | mi2s_tx_clk.enable = enable; |
| 2663 | mi2s_tx_clk.clk_id = |
| 2664 | Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT; |
| 2665 | mi2s_tx_clk.clk_freq_in_hz = |
| 2666 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; |
| 2667 | ret = afe_set_lpass_clock_v2( |
| 2668 | AFE_PORT_ID_QUATERNARY_MI2S_TX, |
| 2669 | &mi2s_tx_clk); |
| 2670 | } else { |
| 2671 | pr_err("%s:Not valid substream.\n", __func__); |
| 2672 | } |
| 2673 | |
| 2674 | if (ret < 0) |
| 2675 | pr_err("%s:afe_set_lpass_clock failed %d\n", |
| 2676 | __func__, ret); |
| 2677 | } else { |
| 2678 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2679 | mi2s_rx_clk.enable = enable; |
| 2680 | mi2s_rx_clk.clk_id = |
| 2681 | Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT; |
| 2682 | ret = afe_set_lpass_clock_v2( |
| 2683 | AFE_PORT_ID_QUATERNARY_MI2S_RX, |
| 2684 | &mi2s_rx_clk); |
| 2685 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 2686 | mi2s_tx_clk.enable = enable; |
| 2687 | mi2s_tx_clk.clk_id = |
| 2688 | Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT; |
| 2689 | ret = afe_set_lpass_clock_v2( |
| 2690 | AFE_PORT_ID_QUATERNARY_MI2S_TX, |
| 2691 | &mi2s_tx_clk); |
| 2692 | } else |
| 2693 | pr_err("%s:Not valid substream %d\n", __func__, |
| 2694 | substream->stream); |
| 2695 | |
| 2696 | if (ret < 0) |
| 2697 | pr_err("%s:afe_set_lpass_clock failed ret=%d\n", |
| 2698 | __func__, ret); |
| 2699 | } |
| 2700 | return ret; |
| 2701 | } |
| 2702 | |
| 2703 | static int quin_mi2s_sclk_ctl(struct snd_pcm_substream *substream, bool enable) |
| 2704 | { |
| 2705 | int ret = 0; |
| 2706 | |
| 2707 | if (enable) { |
| 2708 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2709 | mi2s_rx_clk.enable = enable; |
| 2710 | mi2s_rx_clk.clk_id = |
| 2711 | Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT; |
| 2712 | if ((mi2s_rx_bit_format == SNDRV_PCM_FORMAT_S24_LE) || |
| 2713 | (mi2s_rx_bit_format == |
| 2714 | SNDRV_PCM_FORMAT_S24_3LE)) |
| 2715 | mi2s_rx_clk.clk_freq_in_hz = |
| 2716 | Q6AFE_LPASS_IBIT_CLK_3_P072_MHZ; |
| 2717 | else |
| 2718 | mi2s_rx_clk.clk_freq_in_hz = |
| 2719 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; |
| 2720 | ret = afe_set_lpass_clock_v2( |
| 2721 | AFE_PORT_ID_QUINARY_MI2S_RX, |
| 2722 | &mi2s_rx_clk); |
| 2723 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 2724 | mi2s_tx_clk.enable = enable; |
| 2725 | mi2s_tx_clk.clk_id = |
| 2726 | Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT; |
| 2727 | mi2s_tx_clk.clk_freq_in_hz = |
| 2728 | Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; |
| 2729 | ret = afe_set_lpass_clock_v2( |
| 2730 | AFE_PORT_ID_QUINARY_MI2S_TX, |
| 2731 | &mi2s_tx_clk); |
| 2732 | } else { |
| 2733 | pr_err("%s:Not valid substream.\n", __func__); |
| 2734 | } |
| 2735 | |
| 2736 | if (ret < 0) |
| 2737 | pr_err("%s:afe_set_lpass_clock failed\n", __func__); |
| 2738 | } else { |
| 2739 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 2740 | mi2s_rx_clk.enable = enable; |
| 2741 | mi2s_rx_clk.clk_id = |
| 2742 | Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT; |
| 2743 | ret = afe_set_lpass_clock_v2( |
| 2744 | AFE_PORT_ID_QUINARY_MI2S_RX, |
| 2745 | &mi2s_rx_clk); |
| 2746 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 2747 | mi2s_tx_clk.enable = enable; |
| 2748 | mi2s_tx_clk.clk_id = |
| 2749 | Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT; |
| 2750 | ret = afe_set_lpass_clock_v2( |
| 2751 | AFE_PORT_ID_QUINARY_MI2S_TX, |
| 2752 | &mi2s_tx_clk); |
| 2753 | } else |
| 2754 | pr_err("%s:Not valid substream %d\n", __func__, |
| 2755 | substream->stream); |
| 2756 | |
| 2757 | if (ret < 0) |
| 2758 | pr_err("%s:afe_set_lpass_clock failed ret=%d\n", |
| 2759 | __func__, ret); |
| 2760 | } |
| 2761 | return ret; |
| 2762 | } |
| 2763 | |
| 2764 | static int msm8952_adsp_state_callback(struct notifier_block *nb, |
| 2765 | unsigned long value, void *priv) |
| 2766 | { |
| 2767 | if (value == SUBSYS_BEFORE_SHUTDOWN) { |
| 2768 | pr_debug("%s: ADSP is about to shutdown. Clearing AFE config\n", |
| 2769 | __func__); |
| 2770 | msm_afe_clear_config(); |
| 2771 | } else if (value == SUBSYS_AFTER_POWERUP) { |
| 2772 | pr_debug("%s: ADSP is up\n", __func__); |
| 2773 | } |
| 2774 | |
| 2775 | return NOTIFY_OK; |
| 2776 | } |
| 2777 | |
| 2778 | static struct notifier_block adsp_state_notifier_block = { |
| 2779 | .notifier_call = msm8952_adsp_state_callback, |
| 2780 | .priority = -INT_MAX, |
| 2781 | }; |
| 2782 | |
| 2783 | void msm_quat_mi2s_snd_shutdown(struct snd_pcm_substream *substream) |
| 2784 | { |
| 2785 | int ret = 0; |
| 2786 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2787 | struct snd_soc_card *card = rtd->card; |
| 2788 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2789 | |
| 2790 | pr_debug("%s(): substream = %s stream = %d, ext_pa = %d\n", __func__, |
| 2791 | substream->name, substream->stream, pdata->ext_pa); |
| 2792 | |
| 2793 | ret = quat_mi2s_clk_ctl(substream, false); |
| 2794 | if (ret < 0) |
| 2795 | pr_err("%s:clock disable failed\n", __func__); |
| 2796 | if (atomic_read(&pdata->clk_ref.quat_mi2s_clk_ref) > 0) |
| 2797 | atomic_dec(&pdata->clk_ref.quat_mi2s_clk_ref); |
| 2798 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 2799 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 2800 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 2801 | if (ret < 0) { |
| 2802 | pr_err("%s: failed to disable quat gpio's state\n", |
| 2803 | __func__); |
| 2804 | return; |
| 2805 | } |
| 2806 | } |
| 2807 | } |
| 2808 | |
| 2809 | int msm_prim_auxpcm_startup(struct snd_pcm_substream *substream) |
| 2810 | { |
| 2811 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2812 | struct snd_soc_card *card = rtd->card; |
| 2813 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2814 | int ret = 0, val = 0; |
| 2815 | |
| 2816 | pr_debug("%s(): substream = %s\n", |
| 2817 | __func__, substream->name); |
| 2818 | |
| 2819 | /* mux config to route the AUX MI2S */ |
| 2820 | if (pdata->vaddr_gpio_mux_mic_ctl) { |
| 2821 | val = ioread32(pdata->vaddr_gpio_mux_mic_ctl); |
| 2822 | val = val | 0x2; |
| 2823 | iowrite32(val, pdata->vaddr_gpio_mux_mic_ctl); |
| 2824 | } |
| 2825 | if (pdata->vaddr_gpio_mux_pcm_ctl) { |
| 2826 | val = ioread32(pdata->vaddr_gpio_mux_pcm_ctl); |
| 2827 | val = val | 0x1; |
| 2828 | iowrite32(val, pdata->vaddr_gpio_mux_pcm_ctl); |
| 2829 | } |
| 2830 | atomic_inc(&pdata->clk_ref.auxpcm_mi2s_clk_ref); |
| 2831 | |
| 2832 | /* enable the gpio's used for the external AUXPCM interface */ |
| 2833 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 2834 | ret = msm_cdc_pinctrl_select_active_state( |
| 2835 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 2836 | if (ret < 0) |
| 2837 | pr_err("%s(): configure gpios failed = %s\n", |
| 2838 | __func__, "quat_i2s"); |
| 2839 | } |
| 2840 | return ret; |
| 2841 | } |
| 2842 | |
| 2843 | void msm_prim_auxpcm_shutdown(struct snd_pcm_substream *substream) |
| 2844 | { |
| 2845 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2846 | struct snd_soc_card *card = rtd->card; |
| 2847 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2848 | int ret; |
| 2849 | |
| 2850 | pr_debug("%s(): substream = %s\n", |
| 2851 | __func__, substream->name); |
| 2852 | if (atomic_read(&pdata->clk_ref.auxpcm_mi2s_clk_ref) > 0) |
| 2853 | atomic_dec(&pdata->clk_ref.auxpcm_mi2s_clk_ref); |
| 2854 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 2855 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 2856 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 2857 | if (ret < 0) |
| 2858 | pr_err("%s(): configure gpios failed = %s\n", |
| 2859 | __func__, "quat_i2s"); |
| 2860 | } |
| 2861 | } |
| 2862 | |
| 2863 | int msm_quat_mi2s_snd_startup(struct snd_pcm_substream *substream) |
| 2864 | { |
| 2865 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2866 | struct snd_soc_card *card = rtd->card; |
| 2867 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2868 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2869 | int ret = 0, val; |
| 2870 | |
| 2871 | pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| 2872 | substream->name, substream->stream); |
| 2873 | |
| 2874 | /* Configure mux for quaternary i2s */ |
| 2875 | if (pdata->vaddr_gpio_mux_mic_ctl) { |
| 2876 | val = ioread32(pdata->vaddr_gpio_mux_mic_ctl); |
| 2877 | val = val | 0x02020002; |
| 2878 | iowrite32(val, pdata->vaddr_gpio_mux_mic_ctl); |
| 2879 | } |
| 2880 | ret = quat_mi2s_clk_ctl(substream, true); |
| 2881 | if (ret < 0) { |
| 2882 | pr_err("%s: failed to enable bit clock\n", |
| 2883 | __func__); |
| 2884 | return ret; |
| 2885 | } |
| 2886 | |
| 2887 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 2888 | ret = msm_cdc_pinctrl_select_active_state( |
| 2889 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 2890 | if (ret < 0) { |
| 2891 | pr_err("%s: failed to actiavte the quat gpio's state\n", |
| 2892 | __func__); |
| 2893 | goto err; |
| 2894 | } |
| 2895 | } |
| 2896 | |
| 2897 | if (atomic_inc_return(&pdata->clk_ref.quat_mi2s_clk_ref) == 1) { |
| 2898 | ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS); |
| 2899 | if (ret < 0) |
| 2900 | pr_err("%s: set fmt cpu dai failed\n", __func__); |
| 2901 | } |
| 2902 | return ret; |
| 2903 | |
| 2904 | err: |
| 2905 | ret = quat_mi2s_clk_ctl(substream, false); |
| 2906 | if (ret < 0) |
| 2907 | pr_err("%s:failed to disable sclk\n", __func__); |
| 2908 | return ret; |
| 2909 | } |
| 2910 | |
| 2911 | int msm_quin_mi2s_snd_startup(struct snd_pcm_substream *substream) |
| 2912 | { |
| 2913 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2914 | struct snd_soc_card *card = rtd->card; |
| 2915 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2916 | struct msm8952_asoc_mach_data *pdata = |
| 2917 | snd_soc_card_get_drvdata(card); |
| 2918 | int ret = 0, val = 0; |
| 2919 | |
| 2920 | pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| 2921 | substream->name, substream->stream); |
| 2922 | if (pdata->vaddr_gpio_mux_quin_ctl) { |
| 2923 | val = ioread32(pdata->vaddr_gpio_mux_quin_ctl); |
| 2924 | val = val | 0x00000001; |
| 2925 | iowrite32(val, pdata->vaddr_gpio_mux_quin_ctl); |
| 2926 | } else { |
| 2927 | return -EINVAL; |
| 2928 | } |
| 2929 | ret = quin_mi2s_sclk_ctl(substream, true); |
| 2930 | if (ret < 0) { |
| 2931 | pr_err("failed to enable sclk\n"); |
| 2932 | return ret; |
| 2933 | } |
| 2934 | if (pdata->mi2s_gpio_p[QUIN_MI2S]) { |
| 2935 | ret = msm_cdc_pinctrl_select_active_state( |
| 2936 | pdata->mi2s_gpio_p[QUIN_MI2S]); |
| 2937 | if (ret < 0) { |
| 2938 | pr_err("failed to enable codec gpios\n"); |
| 2939 | goto err; |
| 2940 | } |
| 2941 | } |
| 2942 | |
| 2943 | if (atomic_inc_return(&pdata->clk_ref.quin_mi2s_clk_ref) == 1) { |
| 2944 | ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS); |
| 2945 | if (ret < 0) |
| 2946 | pr_debug("%s: set fmt cpu dai failed\n", __func__); |
| 2947 | } |
| 2948 | return ret; |
| 2949 | err: |
| 2950 | ret = quin_mi2s_sclk_ctl(substream, false); |
| 2951 | if (ret < 0) |
| 2952 | pr_err("failed to disable sclk\n"); |
| 2953 | return ret; |
| 2954 | } |
| 2955 | |
| 2956 | void msm_quin_mi2s_snd_shutdown(struct snd_pcm_substream *substream) |
| 2957 | { |
| 2958 | int ret; |
| 2959 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2960 | struct snd_soc_card *card = rtd->card; |
| 2961 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 2962 | |
| 2963 | pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| 2964 | substream->name, substream->stream); |
| 2965 | ret = quin_mi2s_sclk_ctl(substream, false); |
| 2966 | if (ret < 0) |
| 2967 | pr_err("%s:clock disable failed\n", __func__); |
| 2968 | if (atomic_read(&pdata->clk_ref.quin_mi2s_clk_ref) > 0) |
| 2969 | atomic_dec(&pdata->clk_ref.quin_mi2s_clk_ref); |
| 2970 | if (pdata->mi2s_gpio_p[QUIN_MI2S]) { |
| 2971 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 2972 | pdata->mi2s_gpio_p[QUIN_MI2S]); |
| 2973 | if (ret < 0) { |
| 2974 | pr_err("%s: gpio set cannot be de-activated %sd", |
| 2975 | __func__, "quin_i2s"); |
| 2976 | return; |
| 2977 | } |
| 2978 | } |
| 2979 | } |
| 2980 | |
| 2981 | int msm_tdm_startup(struct snd_pcm_substream *substream) |
| 2982 | { |
| 2983 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 2984 | struct snd_soc_card *card = rtd->card; |
| 2985 | struct msm8952_asoc_mach_data *pdata = |
| 2986 | snd_soc_card_get_drvdata(card); |
| 2987 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 2988 | int ret = 0, val = 0; |
| 2989 | |
| 2990 | pr_debug("%s(): substream = %s stream = %d\n", __func__, |
| 2991 | substream->name, substream->stream); |
| 2992 | pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id); |
| 2993 | |
| 2994 | switch (cpu_dai->id) { |
| 2995 | case AFE_PORT_ID_PRIMARY_TDM_RX: |
| 2996 | case AFE_PORT_ID_PRIMARY_TDM_RX_1: |
| 2997 | case AFE_PORT_ID_PRIMARY_TDM_RX_2: |
| 2998 | case AFE_PORT_ID_PRIMARY_TDM_RX_3: |
| 2999 | case AFE_PORT_ID_PRIMARY_TDM_RX_4: |
| 3000 | case AFE_PORT_ID_PRIMARY_TDM_RX_5: |
| 3001 | case AFE_PORT_ID_PRIMARY_TDM_RX_6: |
| 3002 | case AFE_PORT_ID_PRIMARY_TDM_RX_7: |
| 3003 | case AFE_PORT_ID_PRIMARY_TDM_TX: |
| 3004 | case AFE_PORT_ID_PRIMARY_TDM_TX_1: |
| 3005 | case AFE_PORT_ID_PRIMARY_TDM_TX_2: |
| 3006 | case AFE_PORT_ID_PRIMARY_TDM_TX_3: |
| 3007 | case AFE_PORT_ID_PRIMARY_TDM_TX_4: |
| 3008 | case AFE_PORT_ID_PRIMARY_TDM_TX_5: |
| 3009 | case AFE_PORT_ID_PRIMARY_TDM_TX_6: |
| 3010 | case AFE_PORT_ID_PRIMARY_TDM_TX_7: |
| 3011 | /* Configure mux for Primary TDM */ |
| 3012 | if (pdata->vaddr_gpio_mux_pcm_ctl) { |
| 3013 | val = ioread32(pdata->vaddr_gpio_mux_pcm_ctl); |
| 3014 | val = val | 0x00000001; |
| 3015 | iowrite32(val, pdata->vaddr_gpio_mux_pcm_ctl); |
| 3016 | } else { |
| 3017 | return -EINVAL; |
| 3018 | } |
| 3019 | |
| 3020 | if (pdata->vaddr_gpio_mux_mic_ctl) { |
| 3021 | val = ioread32(pdata->vaddr_gpio_mux_mic_ctl); |
| 3022 | val = val | 0x00000002; |
| 3023 | iowrite32(val, pdata->vaddr_gpio_mux_mic_ctl); |
| 3024 | } else { |
| 3025 | return -EINVAL; |
| 3026 | } |
| 3027 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 3028 | ret = msm_cdc_pinctrl_select_active_state( |
| 3029 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 3030 | if (ret < 0) |
| 3031 | pr_err("%s: failed to activate pri TDM gpio\n", |
| 3032 | __func__); |
| 3033 | } |
| 3034 | break; |
| 3035 | case AFE_PORT_ID_SECONDARY_TDM_RX: |
| 3036 | case AFE_PORT_ID_SECONDARY_TDM_RX_1: |
| 3037 | case AFE_PORT_ID_SECONDARY_TDM_RX_2: |
| 3038 | case AFE_PORT_ID_SECONDARY_TDM_RX_3: |
| 3039 | case AFE_PORT_ID_SECONDARY_TDM_RX_4: |
| 3040 | case AFE_PORT_ID_SECONDARY_TDM_RX_5: |
| 3041 | case AFE_PORT_ID_SECONDARY_TDM_RX_6: |
| 3042 | case AFE_PORT_ID_SECONDARY_TDM_RX_7: |
| 3043 | case AFE_PORT_ID_SECONDARY_TDM_TX: |
| 3044 | case AFE_PORT_ID_SECONDARY_TDM_TX_1: |
| 3045 | case AFE_PORT_ID_SECONDARY_TDM_TX_2: |
| 3046 | case AFE_PORT_ID_SECONDARY_TDM_TX_3: |
| 3047 | case AFE_PORT_ID_SECONDARY_TDM_TX_4: |
| 3048 | case AFE_PORT_ID_SECONDARY_TDM_TX_5: |
| 3049 | case AFE_PORT_ID_SECONDARY_TDM_TX_6: |
| 3050 | case AFE_PORT_ID_SECONDARY_TDM_TX_7: |
| 3051 | /* Configure mux for Secondary TDM */ |
| 3052 | if (pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl) { |
| 3053 | val = ioread32( |
| 3054 | pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl); |
| 3055 | val = val | 0x00000001; |
| 3056 | iowrite32(val, |
| 3057 | pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl); |
| 3058 | } else { |
| 3059 | return -EINVAL; |
| 3060 | } |
| 3061 | |
| 3062 | if (pdata->vaddr_gpio_mux_quin_ctl) { |
| 3063 | val = ioread32(pdata->vaddr_gpio_mux_quin_ctl); |
| 3064 | val = val | 0x00000001; |
| 3065 | iowrite32(val, pdata->vaddr_gpio_mux_quin_ctl); |
| 3066 | } else { |
| 3067 | return -EINVAL; |
| 3068 | } |
| 3069 | |
| 3070 | if (pdata->vaddr_gpio_mux_mic_ext_clk_ctl) { |
| 3071 | val = ioread32(pdata->vaddr_gpio_mux_mic_ext_clk_ctl); |
| 3072 | val = val | 0x00000001; |
| 3073 | iowrite32(val, pdata->vaddr_gpio_mux_mic_ext_clk_ctl); |
| 3074 | } else { |
| 3075 | return -EINVAL; |
| 3076 | } |
| 3077 | |
| 3078 | if (pdata->vaddr_gpio_mux_sec_tlmm_ctl) { |
| 3079 | val = ioread32(pdata->vaddr_gpio_mux_sec_tlmm_ctl); |
| 3080 | val = val | 0x00000002; |
| 3081 | iowrite32(val, pdata->vaddr_gpio_mux_sec_tlmm_ctl); |
| 3082 | } else { |
| 3083 | return -EINVAL; |
| 3084 | } |
| 3085 | |
| 3086 | if (pdata->vaddr_gpio_mux_spkr_ctl) { |
| 3087 | val = ioread32(pdata->vaddr_gpio_mux_spkr_ctl); |
| 3088 | val = val | 0x00000002; |
| 3089 | iowrite32(val, pdata->vaddr_gpio_mux_spkr_ctl); |
| 3090 | } else { |
| 3091 | return -EINVAL; |
| 3092 | } |
| 3093 | if (pdata->mi2s_gpio_p[QUIN_MI2S]) { |
| 3094 | ret = msm_cdc_pinctrl_select_active_state( |
| 3095 | pdata->mi2s_gpio_p[QUIN_MI2S]); |
| 3096 | if (ret < 0) |
| 3097 | pr_err("%s: failed to activate sec TDM gpio\n", |
| 3098 | __func__); |
| 3099 | } |
| 3100 | break; |
| 3101 | default: |
| 3102 | pr_err("%s: dai id 0x%x not supported\n", |
| 3103 | __func__, cpu_dai->id); |
| 3104 | break; |
| 3105 | return -EINVAL; |
| 3106 | } |
| 3107 | return ret; |
| 3108 | } |
| 3109 | |
| 3110 | void msm_tdm_shutdown(struct snd_pcm_substream *substream) |
| 3111 | { |
| 3112 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 3113 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 3114 | struct snd_soc_card *card = rtd->card; |
| 3115 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 3116 | int ret; |
| 3117 | |
| 3118 | switch (cpu_dai->id) { |
| 3119 | case AFE_PORT_ID_PRIMARY_TDM_RX: |
| 3120 | case AFE_PORT_ID_PRIMARY_TDM_RX_1: |
| 3121 | case AFE_PORT_ID_PRIMARY_TDM_RX_2: |
| 3122 | case AFE_PORT_ID_PRIMARY_TDM_RX_3: |
| 3123 | case AFE_PORT_ID_PRIMARY_TDM_RX_4: |
| 3124 | case AFE_PORT_ID_PRIMARY_TDM_RX_5: |
| 3125 | case AFE_PORT_ID_PRIMARY_TDM_RX_6: |
| 3126 | case AFE_PORT_ID_PRIMARY_TDM_RX_7: |
| 3127 | case AFE_PORT_ID_PRIMARY_TDM_TX: |
| 3128 | case AFE_PORT_ID_PRIMARY_TDM_TX_1: |
| 3129 | case AFE_PORT_ID_PRIMARY_TDM_TX_2: |
| 3130 | case AFE_PORT_ID_PRIMARY_TDM_TX_3: |
| 3131 | case AFE_PORT_ID_PRIMARY_TDM_TX_4: |
| 3132 | case AFE_PORT_ID_PRIMARY_TDM_TX_5: |
| 3133 | case AFE_PORT_ID_PRIMARY_TDM_TX_6: |
| 3134 | case AFE_PORT_ID_PRIMARY_TDM_TX_7: |
| 3135 | if (pdata->mi2s_gpio_p[QUAT_MI2S]) { |
| 3136 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 3137 | pdata->mi2s_gpio_p[QUAT_MI2S]); |
| 3138 | if (ret < 0) { |
| 3139 | pr_err("%s: gpio cannot be de-activated %s\n", |
| 3140 | __func__, "pri_tdm"); |
| 3141 | return; |
| 3142 | } |
| 3143 | } |
| 3144 | break; |
| 3145 | case AFE_PORT_ID_SECONDARY_TDM_RX: |
| 3146 | case AFE_PORT_ID_SECONDARY_TDM_RX_1: |
| 3147 | case AFE_PORT_ID_SECONDARY_TDM_RX_2: |
| 3148 | case AFE_PORT_ID_SECONDARY_TDM_RX_3: |
| 3149 | case AFE_PORT_ID_SECONDARY_TDM_RX_4: |
| 3150 | case AFE_PORT_ID_SECONDARY_TDM_RX_5: |
| 3151 | case AFE_PORT_ID_SECONDARY_TDM_RX_6: |
| 3152 | case AFE_PORT_ID_SECONDARY_TDM_RX_7: |
| 3153 | case AFE_PORT_ID_SECONDARY_TDM_TX: |
| 3154 | case AFE_PORT_ID_SECONDARY_TDM_TX_1: |
| 3155 | case AFE_PORT_ID_SECONDARY_TDM_TX_2: |
| 3156 | case AFE_PORT_ID_SECONDARY_TDM_TX_3: |
| 3157 | case AFE_PORT_ID_SECONDARY_TDM_TX_4: |
| 3158 | case AFE_PORT_ID_SECONDARY_TDM_TX_5: |
| 3159 | case AFE_PORT_ID_SECONDARY_TDM_TX_6: |
| 3160 | case AFE_PORT_ID_SECONDARY_TDM_TX_7: |
| 3161 | if (pdata->mi2s_gpio_p[QUIN_MI2S]) { |
| 3162 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 3163 | pdata->mi2s_gpio_p[QUIN_MI2S]); |
| 3164 | if (ret < 0) { |
| 3165 | pr_err("%s: gpio cannot be de-activated %s", |
| 3166 | __func__, "sec_tdm"); |
| 3167 | return; |
| 3168 | } |
| 3169 | } |
| 3170 | break; |
| 3171 | } |
| 3172 | } |
| 3173 | |
| 3174 | static int msm8952_mclk_event(struct snd_soc_dapm_widget *w, |
| 3175 | struct snd_kcontrol *kcontrol, int event) |
| 3176 | { |
| 3177 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
| 3178 | |
| 3179 | pr_debug("%s: event = %d\n", __func__, event); |
| 3180 | |
| 3181 | switch (event) { |
| 3182 | case SND_SOC_DAPM_PRE_PMU: |
| 3183 | return msm8952_enable_codec_mclk(codec, 1, true); |
| 3184 | case SND_SOC_DAPM_POST_PMD: |
| 3185 | return msm8952_enable_codec_mclk(codec, 0, true); |
| 3186 | } |
| 3187 | return 0; |
| 3188 | } |
| 3189 | |
| 3190 | static const struct snd_soc_dapm_widget msm8952_tasha_dapm_widgets[] = { |
| 3191 | |
| 3192 | SND_SOC_DAPM_SUPPLY_S("MCLK", -1, SND_SOC_NOPM, 0, 0, |
| 3193 | msm8952_mclk_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| 3194 | |
| 3195 | SND_SOC_DAPM_SPK("Lineout_1 amp", NULL), |
| 3196 | SND_SOC_DAPM_SPK("Lineout_3 amp", NULL), |
| 3197 | SND_SOC_DAPM_SPK("Lineout_2 amp", NULL), |
| 3198 | SND_SOC_DAPM_SPK("Lineout_4 amp", NULL), |
| 3199 | SND_SOC_DAPM_MIC("Handset Mic", NULL), |
| 3200 | SND_SOC_DAPM_MIC("Headset Mic", NULL), |
| 3201 | SND_SOC_DAPM_MIC("Secondary Mic", NULL), |
| 3202 | SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL), |
| 3203 | SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL), |
| 3204 | SND_SOC_DAPM_MIC("Analog Mic4", NULL), |
| 3205 | SND_SOC_DAPM_MIC("Analog Mic6", NULL), |
| 3206 | SND_SOC_DAPM_MIC("Analog Mic7", NULL), |
| 3207 | SND_SOC_DAPM_MIC("Analog Mic8", NULL), |
| 3208 | |
| 3209 | SND_SOC_DAPM_MIC("Digital Mic0", NULL), |
| 3210 | SND_SOC_DAPM_MIC("Digital Mic1", NULL), |
| 3211 | SND_SOC_DAPM_MIC("Digital Mic2", NULL), |
| 3212 | SND_SOC_DAPM_MIC("Digital Mic3", NULL), |
| 3213 | SND_SOC_DAPM_MIC("Digital Mic4", NULL), |
| 3214 | SND_SOC_DAPM_MIC("Digital Mic5", NULL), |
| 3215 | SND_SOC_DAPM_MIC("Digital Mic6", NULL), |
| 3216 | }; |
| 3217 | |
| 3218 | static struct snd_soc_dapm_route wcd9335_audio_paths[] = { |
| 3219 | {"MIC BIAS1", NULL, "MCLK"}, |
| 3220 | {"MIC BIAS2", NULL, "MCLK"}, |
| 3221 | {"MIC BIAS3", NULL, "MCLK"}, |
| 3222 | {"MIC BIAS4", NULL, "MCLK"}, |
| 3223 | }; |
| 3224 | |
| 3225 | int msm_audrx_init(struct snd_soc_pcm_runtime *rtd) |
| 3226 | { |
| 3227 | int err; |
| 3228 | struct snd_soc_codec *codec = rtd->codec; |
| 3229 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
| 3230 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 3231 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 3232 | struct snd_card *card; |
| 3233 | struct snd_soc_component *aux_comp; |
| 3234 | struct snd_info_entry *entry; |
| 3235 | struct msm8952_asoc_mach_data *pdata = |
| 3236 | snd_soc_card_get_drvdata(rtd->card); |
| 3237 | |
| 3238 | /* Codec SLIMBUS configuration |
| 3239 | * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13 |
| 3240 | * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13 |
| 3241 | * TX14, TX15, TX16 |
| 3242 | */ |
| 3243 | unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150, |
| 3244 | 151, 152, 153, 154, 155, 156}; |
| 3245 | unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133, |
| 3246 | 134, 135, 136, 137, 138, 139, |
| 3247 | 140, 141, 142, 143}; |
| 3248 | |
| 3249 | pr_debug("%s: dev_name%s\n", __func__, dev_name(cpu_dai->dev)); |
| 3250 | |
| 3251 | rtd->pmdown_time = 0; |
| 3252 | |
| 3253 | err = snd_soc_add_codec_controls(codec, msm_snd_controls, |
| 3254 | ARRAY_SIZE(msm_snd_controls)); |
| 3255 | if (err < 0) { |
| 3256 | pr_err("%s: add_codec_controls failed, err%d\n", |
| 3257 | __func__, err); |
| 3258 | return err; |
| 3259 | } |
| 3260 | |
| 3261 | if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| 3262 | pdata->msm8952_codec_fn.get_afe_config_fn = |
| 3263 | tasha_get_afe_config; |
| 3264 | snd_soc_dapm_new_controls(dapm, msm8952_tasha_dapm_widgets, |
| 3265 | ARRAY_SIZE(msm8952_tasha_dapm_widgets)); |
| 3266 | snd_soc_dapm_add_routes(dapm, wcd9335_audio_paths, |
| 3267 | ARRAY_SIZE(wcd9335_audio_paths)); |
| 3268 | } |
| 3269 | |
| 3270 | snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp"); |
| 3271 | snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp"); |
| 3272 | snd_soc_dapm_enable_pin(dapm, "Lineout_2 amp"); |
| 3273 | snd_soc_dapm_enable_pin(dapm, "Lineout_4 amp"); |
| 3274 | |
| 3275 | snd_soc_dapm_ignore_suspend(dapm, "MADINPUT"); |
| 3276 | snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT"); |
| 3277 | snd_soc_dapm_ignore_suspend(dapm, "Handset Mic"); |
| 3278 | snd_soc_dapm_ignore_suspend(dapm, "Headset Mic"); |
| 3279 | snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic"); |
| 3280 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1"); |
| 3281 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2"); |
| 3282 | snd_soc_dapm_ignore_suspend(dapm, "Lineout_1 amp"); |
| 3283 | snd_soc_dapm_ignore_suspend(dapm, "Lineout_3 amp"); |
| 3284 | snd_soc_dapm_ignore_suspend(dapm, "Lineout_2 amp"); |
| 3285 | snd_soc_dapm_ignore_suspend(dapm, "Lineout_4 amp"); |
| 3286 | snd_soc_dapm_ignore_suspend(dapm, "Handset Mic"); |
| 3287 | snd_soc_dapm_ignore_suspend(dapm, "Headset Mic"); |
| 3288 | snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic"); |
| 3289 | snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic"); |
| 3290 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1"); |
| 3291 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2"); |
| 3292 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3"); |
| 3293 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4"); |
| 3294 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5"); |
| 3295 | snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4"); |
| 3296 | snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6"); |
| 3297 | snd_soc_dapm_ignore_suspend(dapm, "Analog Mic7"); |
| 3298 | snd_soc_dapm_ignore_suspend(dapm, "Analog Mic8"); |
| 3299 | snd_soc_dapm_ignore_suspend(dapm, "MADINPUT"); |
| 3300 | snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT"); |
| 3301 | |
| 3302 | snd_soc_dapm_ignore_suspend(dapm, "EAR"); |
| 3303 | snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1"); |
| 3304 | snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2"); |
| 3305 | snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3"); |
| 3306 | snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4"); |
| 3307 | snd_soc_dapm_ignore_suspend(dapm, "AMIC1"); |
| 3308 | snd_soc_dapm_ignore_suspend(dapm, "AMIC2"); |
| 3309 | snd_soc_dapm_ignore_suspend(dapm, "AMIC3"); |
| 3310 | snd_soc_dapm_ignore_suspend(dapm, "AMIC4"); |
| 3311 | snd_soc_dapm_ignore_suspend(dapm, "AMIC5"); |
| 3312 | snd_soc_dapm_ignore_suspend(dapm, "AMIC6"); |
| 3313 | snd_soc_dapm_ignore_suspend(dapm, "DMIC1"); |
| 3314 | snd_soc_dapm_ignore_suspend(dapm, "DMIC2"); |
| 3315 | snd_soc_dapm_ignore_suspend(dapm, "DMIC3"); |
| 3316 | snd_soc_dapm_ignore_suspend(dapm, "DMIC4"); |
| 3317 | snd_soc_dapm_ignore_suspend(dapm, "DMIC5"); |
| 3318 | snd_soc_dapm_ignore_suspend(dapm, "DMIC6"); |
| 3319 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6"); |
| 3320 | snd_soc_dapm_ignore_suspend(dapm, "ANC EAR"); |
| 3321 | snd_soc_dapm_ignore_suspend(dapm, "ANC HEADPHONE"); |
| 3322 | if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| 3323 | snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0"); |
| 3324 | snd_soc_dapm_ignore_suspend(dapm, "DMIC0"); |
| 3325 | snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT"); |
| 3326 | snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT"); |
| 3327 | snd_soc_dapm_ignore_suspend(dapm, "HPHL"); |
| 3328 | snd_soc_dapm_ignore_suspend(dapm, "HPHR"); |
| 3329 | snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL"); |
| 3330 | snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR"); |
| 3331 | snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1"); |
| 3332 | snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2"); |
| 3333 | snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI"); |
| 3334 | snd_soc_dapm_ignore_suspend(dapm, "VIINPUT"); |
| 3335 | |
| 3336 | } |
| 3337 | |
| 3338 | snd_soc_dapm_sync(dapm); |
| 3339 | snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch), |
| 3340 | tx_ch, ARRAY_SIZE(rx_ch), rx_ch); |
| 3341 | |
| 3342 | err = msm_afe_set_config(codec); |
| 3343 | if (err) { |
| 3344 | pr_err("%s: Failed to set AFE config %d\n", __func__, err); |
| 3345 | goto out; |
| 3346 | } |
| 3347 | |
| 3348 | adsp_state_notifier = |
| 3349 | subsys_notif_register_notifier("adsp", |
| 3350 | &adsp_state_notifier_block); |
| 3351 | if (!adsp_state_notifier) { |
| 3352 | pr_err("%s: Failed to register adsp state notifier\n", |
| 3353 | __func__); |
| 3354 | err = -EFAULT; |
| 3355 | goto out; |
| 3356 | } |
| 3357 | |
| 3358 | if (rtd->card->num_aux_devs && |
| 3359 | !list_empty(&rtd->card->aux_comp_list)) { |
| 3360 | aux_comp = list_first_entry(&rtd->card->aux_comp_list, |
| 3361 | struct snd_soc_component, list_aux); |
| 3362 | if (!strcmp(aux_comp->name, WSA8810_NAME_1) || |
| 3363 | !strcmp(aux_comp->name, WSA8810_NAME_2)) { |
| 3364 | tasha_set_spkr_mode(rtd->codec, SPKR_MODE_1); |
| 3365 | tasha_set_spkr_gain_offset(rtd->codec, |
| 3366 | RX_GAIN_OFFSET_M1P5_DB); |
| 3367 | } |
| 3368 | } |
| 3369 | |
| 3370 | if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| 3371 | wcd_mbhc_cfg.calibration = def_tasha_mbhc_cal(); |
| 3372 | if (wcd_mbhc_cfg.calibration) { |
| 3373 | pdata->codec = codec; |
| 3374 | err = tasha_mbhc_hs_detect(codec, &wcd_mbhc_cfg); |
| 3375 | if (err < 0) |
| 3376 | pr_err("%s: Failed to intialise mbhc %d\n", |
| 3377 | __func__, err); |
| 3378 | } else { |
| 3379 | pr_err("%s: wcd_mbhc_cfg calibration is NULL\n", |
| 3380 | __func__); |
| 3381 | err = -ENOMEM; |
| 3382 | goto out; |
| 3383 | } |
| 3384 | |
| 3385 | } |
| 3386 | |
| 3387 | codec_reg_done = true; |
| 3388 | |
| 3389 | if (!strcmp(dev_name(codec_dai->dev), "tasha_codec")) { |
| 3390 | card = rtd->card->snd_card; |
| 3391 | entry = snd_info_create_subdir(card->module, |
| 3392 | "codecs", |
| 3393 | card->proc_root); |
| 3394 | if (!entry) { |
| 3395 | pr_debug("%s: Cannot create codecs module entry\n", |
| 3396 | __func__); |
| 3397 | err = 0; |
| 3398 | goto out; |
| 3399 | } |
| 3400 | pdata->codec_root = entry; |
| 3401 | tasha_codec_info_create_codec_entry(pdata->codec_root, |
| 3402 | codec); |
| 3403 | } |
| 3404 | return 0; |
| 3405 | out: |
| 3406 | return err; |
| 3407 | } |
| 3408 | |
| 3409 | static bool msm8952_swap_gnd_mic(struct snd_soc_codec *codec, bool active) |
| 3410 | { |
| 3411 | struct snd_soc_card *card = codec->component.card; |
| 3412 | struct msm8952_asoc_mach_data *pdata = NULL; |
| 3413 | int value = 0; |
| 3414 | int ret = 0; |
| 3415 | |
| 3416 | pdata = snd_soc_card_get_drvdata(card); |
| 3417 | if (!gpio_is_valid(pdata->us_euro_gpio)) { |
| 3418 | pr_err("%s: Invalid gpio: %d", __func__, pdata->us_euro_gpio); |
| 3419 | return false; |
| 3420 | } |
| 3421 | value = gpio_get_value_cansleep(pdata->us_euro_gpio); |
| 3422 | if (pdata->us_euro_gpio_p) { |
| 3423 | ret = msm_cdc_pinctrl_select_active_state( |
| 3424 | pdata->us_euro_gpio_p); |
| 3425 | if (ret < 0) { |
| 3426 | pr_err("%s: gpio set cannot be activated %sd", |
| 3427 | __func__, "us_eu_gpio"); |
| 3428 | return false; |
| 3429 | } |
| 3430 | } |
| 3431 | gpio_set_value_cansleep(pdata->us_euro_gpio, !value); |
| 3432 | pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value); |
| 3433 | if (pdata->us_euro_gpio_p) { |
| 3434 | ret = msm_cdc_pinctrl_select_sleep_state( |
| 3435 | pdata->us_euro_gpio_p); |
| 3436 | if (ret < 0) { |
| 3437 | pr_err("%s: gpio set cannot be de-activated %sd", |
| 3438 | __func__, "us_eu_gpio"); |
| 3439 | return false; |
| 3440 | } |
| 3441 | } |
| 3442 | return true; |
| 3443 | } |
| 3444 | |
| 3445 | static int is_us_eu_switch_gpio_support(struct platform_device *pdev, |
| 3446 | struct msm8952_asoc_mach_data *pdata) |
| 3447 | { |
| 3448 | pr_debug("%s\n", __func__); |
| 3449 | |
| 3450 | /* check if US-EU GPIO is supported */ |
| 3451 | pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node, |
| 3452 | "qcom,cdc-us-euro-gpios", 0); |
| 3453 | if (pdata->us_euro_gpio < 0) { |
| 3454 | dev_err(&pdev->dev, |
| 3455 | "property %s in node %s not found %d\n", |
| 3456 | "qcom,cdc-us-euro-gpios", pdev->dev.of_node->full_name, |
| 3457 | pdata->us_euro_gpio); |
| 3458 | } else { |
| 3459 | if (!gpio_is_valid(pdata->us_euro_gpio)) { |
| 3460 | pr_err("%s: Invalid gpio: %d", __func__, |
| 3461 | pdata->us_euro_gpio); |
| 3462 | return -EINVAL; |
| 3463 | } |
| 3464 | pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node, |
| 3465 | "qcom,cdc-us-eu-gpios", 0); |
| 3466 | wcd_mbhc_cfg.swap_gnd_mic = msm8952_swap_gnd_mic; |
| 3467 | } |
| 3468 | return 0; |
| 3469 | } |
| 3470 | |
| 3471 | static int msm8952_populate_dai_link_component_of_node( |
| 3472 | struct snd_soc_card *card) |
| 3473 | { |
| 3474 | int i, index, ret = 0; |
| 3475 | struct device *cdev = card->dev; |
| 3476 | struct snd_soc_dai_link *dai_link = card->dai_link; |
| 3477 | struct device_node *phandle; |
| 3478 | |
| 3479 | if (!cdev) { |
| 3480 | pr_err("%s: Sound card device memory NULL\n", __func__); |
| 3481 | return -ENODEV; |
| 3482 | } |
| 3483 | |
| 3484 | for (i = 0; i < card->num_links; i++) { |
| 3485 | if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node) |
| 3486 | continue; |
| 3487 | /* populate platform_of_node for snd card dai links */ |
| 3488 | if (dai_link[i].platform_name && |
| 3489 | !dai_link[i].platform_of_node) { |
| 3490 | index = of_property_match_string(cdev->of_node, |
| 3491 | "asoc-platform-names", |
| 3492 | dai_link[i].platform_name); |
| 3493 | if (index < 0) { |
| 3494 | pr_err("%s: No match found for platform name: %s\n", |
| 3495 | __func__, dai_link[i].platform_name); |
| 3496 | ret = index; |
| 3497 | goto cpu_dai; |
| 3498 | } |
| 3499 | phandle = of_parse_phandle(cdev->of_node, |
| 3500 | "asoc-platform", |
| 3501 | index); |
| 3502 | if (!phandle) { |
| 3503 | pr_err("%s: retrieving phandle for platform %s, index %d failed\n", |
| 3504 | __func__, dai_link[i].platform_name, |
| 3505 | index); |
| 3506 | ret = -ENODEV; |
| 3507 | goto err; |
| 3508 | } |
| 3509 | dai_link[i].platform_of_node = phandle; |
| 3510 | dai_link[i].platform_name = NULL; |
| 3511 | } |
| 3512 | cpu_dai: |
| 3513 | /* populate cpu_of_node for snd card dai links */ |
| 3514 | if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) { |
| 3515 | index = of_property_match_string(cdev->of_node, |
| 3516 | "asoc-cpu-names", |
| 3517 | dai_link[i].cpu_dai_name); |
| 3518 | if (index < 0) { |
| 3519 | pr_debug("cpu-names not found index = %d\n", i); |
| 3520 | goto codec_dai; |
| 3521 | } |
| 3522 | phandle = of_parse_phandle(cdev->of_node, "asoc-cpu", |
| 3523 | index); |
| 3524 | if (!phandle) { |
| 3525 | pr_err("%s: phandle for cpu dai %s failed\n", |
| 3526 | __func__, dai_link[i].cpu_dai_name); |
| 3527 | ret = -ENODEV; |
| 3528 | goto err; |
| 3529 | } |
| 3530 | dai_link[i].cpu_of_node = phandle; |
| 3531 | dai_link[i].cpu_dai_name = NULL; |
| 3532 | } |
| 3533 | codec_dai: |
| 3534 | /* populate codec_of_node for snd card dai links */ |
| 3535 | if (dai_link[i].codec_name && !dai_link[i].codec_of_node) { |
| 3536 | index = of_property_match_string(cdev->of_node, |
| 3537 | "asoc-codec-names", |
| 3538 | dai_link[i].codec_name); |
| 3539 | if (index < 0) |
| 3540 | continue; |
| 3541 | phandle = of_parse_phandle(cdev->of_node, "asoc-codec", |
| 3542 | index); |
| 3543 | if (!phandle) { |
| 3544 | pr_err("%s: retrieving phandle for codec dai %s failed\n", |
| 3545 | __func__, dai_link[i].codec_name); |
| 3546 | ret = -ENODEV; |
| 3547 | goto err; |
| 3548 | } |
| 3549 | dai_link[i].codec_of_node = phandle; |
| 3550 | dai_link[i].codec_name = NULL; |
| 3551 | } |
| 3552 | } |
| 3553 | err: |
| 3554 | return ret; |
| 3555 | } |
| 3556 | |
| 3557 | static int msm8952_asoc_machine_probe(struct platform_device *pdev) |
| 3558 | { |
| 3559 | struct snd_soc_card *card; |
| 3560 | struct msm8952_asoc_mach_data *pdata = NULL; |
| 3561 | const char *ext_pa = "qcom,msm-ext-pa"; |
| 3562 | const char *ext_pa_str = NULL; |
| 3563 | int num_strings = 0; |
| 3564 | int ret, i; |
| 3565 | struct resource *muxsel; |
| 3566 | |
| 3567 | pdata = devm_kzalloc(&pdev->dev, |
| 3568 | sizeof(struct msm8952_asoc_mach_data), GFP_KERNEL); |
| 3569 | if (!pdata) |
| 3570 | return -ENOMEM; |
| 3571 | |
| 3572 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3573 | "csr_gp_io_mux_mic_ctl"); |
| 3574 | if (!muxsel) { |
| 3575 | dev_err(&pdev->dev, "MUX addr invalid for MIC CTL\n"); |
| 3576 | ret = -ENODEV; |
| 3577 | goto err; |
| 3578 | } |
| 3579 | pdata->vaddr_gpio_mux_mic_ctl = |
| 3580 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3581 | if (pdata->vaddr_gpio_mux_mic_ctl == NULL) { |
| 3582 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3583 | __func__); |
| 3584 | ret = -ENOMEM; |
| 3585 | goto err; |
| 3586 | } |
| 3587 | |
| 3588 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3589 | "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel"); |
| 3590 | if (!muxsel) { |
| 3591 | dev_err(&pdev->dev, "MUX addr invalid for QUAT I2S\n"); |
| 3592 | ret = -ENODEV; |
| 3593 | goto err; |
| 3594 | } |
| 3595 | pdata->vaddr_gpio_mux_pcm_ctl = |
| 3596 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3597 | if (pdata->vaddr_gpio_mux_pcm_ctl == NULL) { |
| 3598 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3599 | __func__); |
| 3600 | ret = -ENOMEM; |
| 3601 | goto err; |
| 3602 | } |
| 3603 | |
| 3604 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3605 | "csr_gp_io_mux_spkr_ctl"); |
| 3606 | if (!muxsel) { |
| 3607 | dev_err(&pdev->dev, "MUX addr invalid for SPKR CTL\n"); |
| 3608 | ret = -ENODEV; |
| 3609 | goto err; |
| 3610 | } |
| 3611 | pdata->vaddr_gpio_mux_spkr_ctl = |
| 3612 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3613 | if (pdata->vaddr_gpio_mux_spkr_ctl == NULL) { |
| 3614 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3615 | __func__); |
| 3616 | ret = -ENOMEM; |
| 3617 | goto err; |
| 3618 | } |
| 3619 | |
| 3620 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3621 | "csr_gp_io_mux_quin_ctl"); |
| 3622 | if (!muxsel) { |
| 3623 | dev_dbg(&pdev->dev, "MUX addr invalid for QUIN I2S\n"); |
| 3624 | ret = -ENODEV; |
| 3625 | } else { |
| 3626 | pdata->vaddr_gpio_mux_quin_ctl = |
| 3627 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3628 | if (pdata->vaddr_gpio_mux_quin_ctl == NULL) { |
| 3629 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3630 | __func__); |
| 3631 | ret = -ENOMEM; |
| 3632 | goto err; |
| 3633 | } |
| 3634 | } |
| 3635 | |
| 3636 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3637 | "csr_gp_io_lpaif_qui_pcm_sec_mode_muxsel"); |
| 3638 | if (!muxsel) { |
| 3639 | dev_err(&pdev->dev, "MUX addr invalid for QUIN PCM\n"); |
| 3640 | ret = -ENODEV; |
| 3641 | } else { |
| 3642 | pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl = |
| 3643 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3644 | if (pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl == NULL) { |
| 3645 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3646 | __func__); |
| 3647 | ret = -ENOMEM; |
| 3648 | goto err; |
| 3649 | } |
| 3650 | } |
| 3651 | |
| 3652 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3653 | "csr_gp_io_mux_mic_ext_clk_ctl"); |
| 3654 | if (!muxsel) { |
| 3655 | dev_err(&pdev->dev, "MUX addr invalid for EXT CLK CTL\n"); |
| 3656 | ret = -ENODEV; |
| 3657 | } else { |
| 3658 | pdata->vaddr_gpio_mux_mic_ext_clk_ctl = |
| 3659 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3660 | if (pdata->vaddr_gpio_mux_mic_ext_clk_ctl == NULL) { |
| 3661 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3662 | __func__); |
| 3663 | ret = -ENOMEM; |
| 3664 | goto err; |
| 3665 | } |
| 3666 | } |
| 3667 | |
| 3668 | muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 3669 | "csr_gp_io_mux_sec_tlmm_ctl"); |
| 3670 | if (!muxsel) { |
| 3671 | dev_err(&pdev->dev, "MUX addr invalid for SEC TLMM CTL\n"); |
| 3672 | ret = -ENODEV; |
| 3673 | } else { |
| 3674 | pdata->vaddr_gpio_mux_sec_tlmm_ctl = |
| 3675 | ioremap(muxsel->start, resource_size(muxsel)); |
| 3676 | if (pdata->vaddr_gpio_mux_sec_tlmm_ctl == NULL) { |
| 3677 | pr_err("%s ioremap failure for muxsel virt addr\n", |
| 3678 | __func__); |
| 3679 | ret = -ENOMEM; |
| 3680 | goto err; |
| 3681 | } |
| 3682 | } |
| 3683 | |
| 3684 | pdev->id = 0; |
| 3685 | |
| 3686 | atomic_set(&pdata->clk_ref.quat_mi2s_clk_ref, 0); |
| 3687 | atomic_set(&pdata->clk_ref.auxpcm_mi2s_clk_ref, 0); |
| 3688 | card = populate_snd_card_dailinks(&pdev->dev); |
| 3689 | if (!card) { |
| 3690 | ret = -EPROBE_DEFER; |
| 3691 | goto err; |
| 3692 | } |
| 3693 | card->dev = &pdev->dev; |
| 3694 | platform_set_drvdata(pdev, card); |
| 3695 | snd_soc_card_set_drvdata(card, pdata); |
| 3696 | |
| 3697 | ret = snd_soc_of_parse_audio_routing(card, |
| 3698 | "qcom,audio-routing"); |
| 3699 | if (ret) |
| 3700 | goto err; |
| 3701 | |
| 3702 | ret = msm8952_populate_dai_link_component_of_node(card); |
| 3703 | if (ret) { |
| 3704 | ret = -EPROBE_DEFER; |
| 3705 | goto err; |
| 3706 | } |
| 3707 | |
| 3708 | ret = msm8952_init_wsa_dev(pdev, card); |
| 3709 | if (ret) |
| 3710 | goto err; |
| 3711 | |
| 3712 | ret = devm_snd_soc_register_card(&pdev->dev, card); |
| 3713 | if (ret) { |
| 3714 | if (codec_reg_done) |
| 3715 | ret = -EINVAL; |
| 3716 | dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", |
| 3717 | ret); |
| 3718 | goto err; |
| 3719 | } |
| 3720 | num_strings = of_property_count_strings(pdev->dev.of_node, |
| 3721 | ext_pa); |
| 3722 | if (num_strings < 0) { |
| 3723 | dev_err(&pdev->dev, |
| 3724 | "%s: missing %s in dt node or length is incorrect\n", |
| 3725 | __func__, ext_pa); |
| 3726 | pdata->ext_pa = 0; |
| 3727 | } |
| 3728 | for (i = 0; i < num_strings; i++) { |
| 3729 | of_property_read_string_index(pdev->dev.of_node, |
| 3730 | ext_pa, i, &ext_pa_str); |
| 3731 | if (!strcmp(ext_pa_str, "primary")) |
| 3732 | pdata->ext_pa = (pdata->ext_pa | PRI_MI2S_ID); |
| 3733 | else if (!strcmp(ext_pa_str, "secondary")) |
| 3734 | pdata->ext_pa = (pdata->ext_pa | SEC_MI2S_ID); |
| 3735 | else if (!strcmp(ext_pa_str, "tertiary")) |
| 3736 | pdata->ext_pa = (pdata->ext_pa | TER_MI2S_ID); |
| 3737 | else if (!strcmp(ext_pa_str, "quaternary")) |
| 3738 | pdata->ext_pa = (pdata->ext_pa | QUAT_MI2S_ID); |
| 3739 | else if (!strcmp(ext_pa_str, "quinary")) |
| 3740 | pdata->ext_pa = (pdata->ext_pa | QUIN_MI2S_ID); |
| 3741 | } |
| 3742 | |
| 3743 | /* Parse US-Euro gpio info from DT. Report no error if us-euro |
| 3744 | * entry is not found in DT file as some targets do not support |
| 3745 | * US-Euro detection |
| 3746 | */ |
| 3747 | ret = is_us_eu_switch_gpio_support(pdev, pdata); |
| 3748 | if (ret < 0) { |
| 3749 | pr_err("%s: failed to is_us_eu_switch_gpio_support %d\n", |
| 3750 | __func__, ret); |
| 3751 | goto err; |
| 3752 | } |
| 3753 | pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| 3754 | "qcom,quat-mi2s-gpios", 0); |
| 3755 | pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node, |
| 3756 | "qcom,quin-mi2s-gpios", 0); |
| 3757 | |
| 3758 | return 0; |
| 3759 | err: |
| 3760 | if (pdata->us_euro_gpio > 0) { |
| 3761 | dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n", |
| 3762 | __func__, pdata->us_euro_gpio); |
| 3763 | gpio_free(pdata->us_euro_gpio); |
| 3764 | pdata->us_euro_gpio = 0; |
| 3765 | } |
| 3766 | if (pdata->vaddr_gpio_mux_spkr_ctl) |
| 3767 | iounmap(pdata->vaddr_gpio_mux_spkr_ctl); |
| 3768 | if (pdata->vaddr_gpio_mux_mic_ctl) |
| 3769 | iounmap(pdata->vaddr_gpio_mux_mic_ctl); |
| 3770 | if (pdata->vaddr_gpio_mux_pcm_ctl) |
| 3771 | iounmap(pdata->vaddr_gpio_mux_pcm_ctl); |
| 3772 | if (pdata->vaddr_gpio_mux_quin_ctl) |
| 3773 | iounmap(pdata->vaddr_gpio_mux_quin_ctl); |
| 3774 | if (pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl) |
| 3775 | iounmap(pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl); |
| 3776 | if (pdata->vaddr_gpio_mux_mic_ext_clk_ctl) |
| 3777 | iounmap(pdata->vaddr_gpio_mux_mic_ext_clk_ctl); |
| 3778 | if (pdata->vaddr_gpio_mux_sec_tlmm_ctl) |
| 3779 | iounmap(pdata->vaddr_gpio_mux_sec_tlmm_ctl); |
| 3780 | devm_kfree(&pdev->dev, pdata); |
| 3781 | return ret; |
| 3782 | } |
| 3783 | |
| 3784 | static int msm8952_asoc_machine_remove(struct platform_device *pdev) |
| 3785 | { |
| 3786 | struct snd_soc_card *card = platform_get_drvdata(pdev); |
| 3787 | struct msm8952_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card); |
| 3788 | |
| 3789 | if (pdata->us_euro_gpio > 0) { |
| 3790 | dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n", |
| 3791 | __func__, pdata->us_euro_gpio); |
| 3792 | gpio_free(pdata->us_euro_gpio); |
| 3793 | pdata->us_euro_gpio = 0; |
| 3794 | } |
| 3795 | if (pdata->vaddr_gpio_mux_spkr_ctl) |
| 3796 | iounmap(pdata->vaddr_gpio_mux_spkr_ctl); |
| 3797 | if (pdata->vaddr_gpio_mux_mic_ctl) |
| 3798 | iounmap(pdata->vaddr_gpio_mux_mic_ctl); |
| 3799 | if (pdata->vaddr_gpio_mux_pcm_ctl) |
| 3800 | iounmap(pdata->vaddr_gpio_mux_pcm_ctl); |
| 3801 | if (pdata->vaddr_gpio_mux_quin_ctl) |
| 3802 | iounmap(pdata->vaddr_gpio_mux_quin_ctl); |
| 3803 | if (pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl) |
| 3804 | iounmap(pdata->vaddr_gpio_mux_qui_pcm_sec_mode_ctl); |
| 3805 | if (pdata->vaddr_gpio_mux_mic_ext_clk_ctl) |
| 3806 | iounmap(pdata->vaddr_gpio_mux_mic_ext_clk_ctl); |
| 3807 | if (pdata->vaddr_gpio_mux_sec_tlmm_ctl) |
| 3808 | iounmap(pdata->vaddr_gpio_mux_sec_tlmm_ctl); |
| 3809 | msm895x_free_auxdev_mem(pdev); |
| 3810 | |
| 3811 | snd_soc_unregister_card(card); |
| 3812 | return 0; |
| 3813 | } |
| 3814 | |
| 3815 | static const struct of_device_id msm8952_asoc_machine_of_match[] = { |
| 3816 | { .compatible = "qcom,msm8952-audio-slim-codec", }, |
| 3817 | {}, |
| 3818 | }; |
| 3819 | |
| 3820 | static struct platform_driver msm8952_asoc_machine_driver = { |
| 3821 | .driver = { |
| 3822 | .name = DRV_NAME, |
| 3823 | .owner = THIS_MODULE, |
| 3824 | .pm = &snd_soc_pm_ops, |
| 3825 | .of_match_table = msm8952_asoc_machine_of_match, |
| 3826 | }, |
| 3827 | .probe = msm8952_asoc_machine_probe, |
| 3828 | .remove = msm8952_asoc_machine_remove, |
| 3829 | }; |
| 3830 | |
| 3831 | static int __init msm8952_slim_machine_init(void) |
| 3832 | { |
| 3833 | return platform_driver_register(&msm8952_asoc_machine_driver); |
| 3834 | } |
| 3835 | module_init(msm8952_slim_machine_init); |
| 3836 | |
| 3837 | static void __exit msm8952_slim_machine_exit(void) |
| 3838 | { |
| 3839 | return platform_driver_unregister(&msm8952_asoc_machine_driver); |
| 3840 | } |
| 3841 | module_exit(msm8952_slim_machine_exit); |
| 3842 | |
| 3843 | MODULE_DESCRIPTION("ALSA SoC msm"); |
| 3844 | MODULE_LICENSE("GPL v2"); |
| 3845 | MODULE_ALIAS("platform:" DRV_NAME); |
| 3846 | MODULE_DEVICE_TABLE(of, msm8952_asoc_machine_of_match); |