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Manjunatha Madana80e8ffa2018-12-17 14:13:08 +05301/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
Soumya Managoli84c975c2018-02-23 13:00:54 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __MSM8953_H
14#define __MSM8953_H
15
16#include <sound/soc.h>
17#include <dsp/q6afe-v2.h>
18#include "codecs/wcd-mbhc-v2.h"
19#include "codecs/sdm660_cdc/msm-analog-cdc.h"
20#include "codecs/sdm660_cdc/msm-digital-cdc.h"
21#include "codecs/wsa881x-analog.h"
22#include <linux/regulator/consumer.h>
23#include <linux/regulator/driver.h>
24
25
26#define BTSCO_RATE_8KHZ 8000
27#define BTSCO_RATE_16KHZ 16000
28
29#define SAMPLING_RATE_48KHZ 48000
30#define SAMPLING_RATE_96KHZ 96000
31#define SAMPLING_RATE_192KHZ 192000
32
33#define PRI_MI2S_ID (1 << 0)
34#define SEC_MI2S_ID (1 << 1)
35#define TER_MI2S_ID (1 << 2)
36#define QUAT_MI2S_ID (1 << 3)
37#define QUIN_MI2S_ID (1 << 4)
38
39#define DEFAULT_MCLK_RATE 9600000
40
41#define WCD_MBHC_DEF_RLOADS 5
42#define MAX_WSA_CODEC_NAME_LENGTH 80
43#define MSM_DT_MAX_PROP_SIZE 80
44
45enum {
46 DIG_CDC,
47 ANA_CDC,
48 CODECS_MAX,
49};
50
51enum {
52 PRIM_MI2S = 0,
53 SEC_MI2S,
54 TERT_MI2S,
55 QUAT_MI2S,
56 QUIN_MI2S,
57 MI2S_MAX,
58};
59
60struct msm_asoc_mach_data {
61 int codec_type;
62 int ext_pa;
63 int us_euro_gpio;
64 int spk_ext_pa_gpio;
65 int mclk_freq;
66 bool native_clk_set;
67 int lb_mode;
68 int afe_clk_ver;
69 int snd_card_val;
70 u8 micbias1_cap_mode;
71 u8 micbias2_cap_mode;
72 atomic_t int_mclk0_rsc_ref;
73 atomic_t int_mclk0_enabled;
74 atomic_t wsa_int_mclk0_rsc_ref;
75 struct mutex cdc_int_mclk0_mutex;
76 struct mutex wsa_mclk_mutex;
77 struct delayed_work disable_int_mclk0_work;
78 struct afe_digital_clk_cfg digital_cdc_clk;
79 struct afe_clk_set digital_cdc_core_clk;
80 void __iomem *vaddr_gpio_mux_spkr_ctl;
81 void __iomem *vaddr_gpio_mux_mic_ctl;
82 void __iomem *vaddr_gpio_mux_quin_ctl;
83 void __iomem *vaddr_gpio_mux_pcm_ctl;
84 struct on_demand_supply wsa_switch_supply;
85 struct device_node *spk_ext_pa_gpio_p;
86 struct device_node *us_euro_gpio_p;
87 struct device_node *comp_gpio_p;
88 struct device_node *mi2s_gpio_p[MI2S_MAX];
Manjunatha Madana80e8ffa2018-12-17 14:13:08 +053089 struct device_node *dmic_gpio_p; /* used by pinctrl API */
90 struct snd_soc_codec *codec;
Soumya Managoli84c975c2018-02-23 13:00:54 +053091 struct snd_info_entry *codec_root;
92};
93
94#endif/*__MSM8953_H*/