wlan: DXE RX interrupt enable too early
DXE RX system level interrupt happen too early.
As a result, before PS bit clear, interrupt may arrive.
Then PS bit set happen twice before PS bit clear.
In this case, next time RX event scheduled, HW might
Power down state. Then ilegal register access may happen.
To avoid this, enable system level interrupt after celar PS bit.
Then bit set and clear will always sync.
Since DXE interrupt is level trigger interrupt,
this change is safe
Change-Id: Iab2553cc3de0ea29468779f84cef1101de3f2816
CRs-fixed: 506475
diff --git a/CORE/DXE/src/wlan_qct_dxe.c b/CORE/DXE/src/wlan_qct_dxe.c
index 9118367..07bc403 100644
--- a/CORE/DXE/src/wlan_qct_dxe.c
+++ b/CORE/DXE/src/wlan_qct_dxe.c
@@ -1,8 +1,44 @@
/*
-* Copyright (c) 2012 Qualcomm Atheros, Inc.
-* All Rights Reserved.
-* Qualcomm Atheros Confidential and Proprietary.
-*/
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
/**=========================================================================
@@ -13,7 +49,6 @@
This file contains the external API exposed by the wlan data transfer abstraction layer module.
Copyright (c) 2010-2011 Qualcomm Technologies, Inc.
All Rights Reserved.
- Qualcomm Technologies Confidential and Proprietary
========================================================================*/
/*===========================================================================
@@ -1966,14 +2001,6 @@
while(channelEntry->numFreeDesc > 0)
{
- /* If RX thread drain small size of frame from HW too fast
- * Sometimes HW cannot handle interrupt fast enough
- * And system crash might happen
- * To avoid system crash, input 1usec delay each frame draining
- * within host side, This is SW work around, to fix HW problem
- * Throughput and SnS test done successfully */
- wpalUsecSleep(1);
-
/* Current Control block is free
* and associated frame buffer is not linked with control block anymore
* allocate new frame buffer for current control block */
@@ -2223,11 +2250,11 @@
{
if(!(WLANDXE_U32_SWAP_ENDIAN(descCtrl) & WLANDXE_DESC_CTRL_VALID))
{
- HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
+ HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
"Found Invalidated Descriptor %d", (int)descLoop);
if(eWLAN_PAL_STATUS_SUCCESS == wpalIsPacketLocked(currentCtrlBlk->xfrFrame))
{
- HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
+ HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
"Packet locked, Resync Host and HW");
channelEntry->headCtrlBlk = currentCtrlBlk;
invalidatedFound = 1;
@@ -2235,7 +2262,7 @@
}
else
{
- HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
+ HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
"Packet Not Locked, cannot transfer frame");
}
}
@@ -2650,16 +2677,6 @@
return;
}
- /* Enable system level ISR */
- /* Enable RX ready Interrupt at here */
- status = wpalEnableInterrupt(DXE_INTERRUPT_RX_READY);
- if(eWLAN_PAL_STATUS_SUCCESS != status)
- {
- HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
- "dxeRXEventHandler Enable RX Ready interrupt fail");
- return;
- }
-
/* Prepare Control Register EN Channel */
if(!(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].extraConfig.chan_mask & WLANDXE_CH_CTRL_EN_MASK))
{
@@ -2683,6 +2700,16 @@
regValue &= WLANDXE_RX_INTERRUPT_PRO_UNMASK;
wpalWriteRegister(WLANDXE_INT_MASK_REG_ADDRESS, regValue);
+ /* Enable system level ISR */
+ /* Enable RX ready Interrupt at here */
+ status = wpalEnableInterrupt(DXE_INTERRUPT_RX_READY);
+ if(eWLAN_PAL_STATUS_SUCCESS != status)
+ {
+ HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
+ "dxeRXEventHandler Enable RX Ready interrupt fail");
+ return;
+ }
+
HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
"%s Exit", __func__);
return;