blob: ecb478cb176070d8129eeb4fb433491b8df9f49d [file] [log] [blame]
Jeff Johnson295189b2012-06-20 16:38:30 -07001/*
Jeff Johnson32d95a32012-09-10 13:15:23 -07002 * Copyright (c) 2012, The Linux Foundation. All rights reserved.
Jeff Johnson295189b2012-06-20 16:38:30 -07003 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/**
23 *
24 Airgo Networks, Inc proprietary.
25 All Rights Reserved, Copyright 2005
26 This program is the confidential and proprietary product of Airgo Networks Inc.
27 Any Unauthorized use, reproduction or transfer of this program is strictly prohibited.
28
29
30 pttMsgApi.h: Contains messages to PTT Module for physical layer testing
31 Author: Mark Nelson
32 Date: 6/21/05
33
34 History -
35 Date Modified by Modification Information
36 --------------------------------------------------------------------------
37
38 */
39
40#ifndef PTT_MSG_API_H
41#define PTT_MSG_API_H
42
43#include "halCompiler.h"
44#include "wlan_nv.h"
45#include "wlan_phy.h"
46#include "pttFrameGen.h"
47#include "pttModule.h"
48
49#include "halLegacyPalTypes.h"
50
51typedef tANI_U8 tQWPTT_U8;
52typedef tANI_S8 tQWPTT_S8;
53
54typedef tANI_U16 tQWPTT_U16;
55typedef tANI_S16 tQWPTT_S16;
56
57typedef tANI_U32 tQWPTT_U32;
58typedef tANI_S32 tQWPTT_S32;
59
60typedef tANI_U8 tQWPTT_BYTE;
61typedef tANI_S9 tQWPTT_S9;
62
63typedef tANI_U8 tQWPTT_BOOLEAN;
64
65#define PTT_MEM_ACCESS_MAX_SIZE 256
66
67//Messages to/from socket or pttApi.c
68typedef enum {
69 PTT_MSG_TYPES_BEGIN = 0x3000,
70
71 // Init
72 PTT_MSG_INIT = PTT_MSG_TYPES_BEGIN, //extra: internal only
73
74//NV Service
75 PTT_MSG_GET_TPC_CAL_STATE_OBSOLETE = 0x3011,
76 PTT_MSG_RESET_TPC_CAL_STATE_OBSOLETE = 0x3012,
77
78 PTT_MSG_SET_NV_CKSUM_OBSOLETE = 0x3013,
79 PTT_MSG_GET_NV_CKSUM_OBSOLETE = 0x3014,
80 PTT_MSG_GET_NV_TABLE = 0x3016,
81 PTT_MSG_SET_NV_TABLE = 0x3017,
82 PTT_MSG_SET_NV_IMAGE_OBSOLETE = 0x3018,
83 PTT_MSG_BLANK_NV = 0x3019,
84 PTT_MSG_GET_NV_IMAGE_OBSOLETE = 0x301E,
85 PTT_MSG_DEL_NV_TABLE = 0x301F,
86 PTT_MSG_GET_NV_FIELD = 0x3020,
87 PTT_MSG_SET_NV_FIELD = 0x3021,
88 PTT_MSG_STORE_NV_TABLE = 0x3022,
89 PTT_MSG_SET_REG_DOMAIN = 0x3023,
90
91//Device Register Access
92 PTT_MSG_DBG_READ_REGISTER = 0x3040,
93 PTT_MSG_DBG_WRITE_REGISTER = 0x3041,
94 PTT_MSG_API_WRITE_REGISTER_OBSOLETE = 0x3042,
95 PTT_MSG_API_READ_REGISTER_OBSOLETE = 0x3043,
96 PTT_MSG_DBG_READ_MEMORY = 0x3044,
97 PTT_MSG_DBG_WRITE_MEMORY = 0x3045,
98
99//Device MAC Test Setup
100 PTT_MSG_ENABLE_CHAINS = 0x304F,
101 PTT_MSG_SET_CHANNEL = 0x3050,
102
103//Tx Waveform Gen Service
104 PTT_MSG_SET_WAVEFORM = 0x3071,
105 PTT_MSG_SET_TX_WAVEFORM_GAIN = 0x3072,
106 PTT_MSG_GET_WAVEFORM_POWER_ADC = 0x3073,
107 PTT_MSG_START_WAVEFORM = 0x3074,
108 PTT_MSG_STOP_WAVEFORM = 0x3075,
109 PTT_MSG_SET_RX_WAVEFORM_GAIN = 0x3076,
110 PTT_MSG_SET_TX_WAVEFORM_GAIN_PRIMA_V1 = 0x3077,
111
112//Tx Frame Gen Service
113 PTT_MSG_CONFIG_TX_PACKET_GEN = 0x3081,
114 PTT_MSG_START_STOP_TX_PACKET_GEN = 0x3082,
115 PTT_MSG_POLL_TX_PACKET_PROGRESS_OBSOLETE = 0x3083,
116 PTT_MSG_FRAME_GEN_STOP_IND_OBSOLETE = 0x3088,
117 PTT_MSG_QUERY_TX_STATUS = 0x3089,
118
119
120//Tx Frame Power Service
121 PTT_MSG_CLOSE_TPC_LOOP = 0x30A0,
122
123//open loop service
124 PTT_MSG_SET_PACKET_TX_GAIN_TABLE = 0x30A1,
125 PTT_MSG_SET_PACKET_TX_GAIN_INDEX = 0x30A2,
126 PTT_MSG_FORCE_PACKET_TX_GAIN = 0x30A3,
127
128//closed loop(CLPC) service
129 PTT_MSG_SET_PWR_INDEX_SOURCE = 0x30A4,
130 PTT_MSG_SET_TX_POWER = 0x30A5,
131 PTT_MSG_GET_TX_POWER_REPORT = 0x30A7,
132 PTT_MSG_SAVE_TX_PWR_CAL_TABLE_OBSOLETE = 0x30A8,
133 PTT_MSG_SET_POWER_LUT = 0x30A9,
134 PTT_MSG_GET_POWER_LUT = 0x30AA,
135 PTT_MSG_GET_PACKET_TX_GAIN_TABLE = 0x30AB,
136 PTT_MSG_SAVE_TX_PWR_FREQ_TABLE_OBSOLETE = 0x30AC,
137 PTT_MSG_CLPC_TEMP_COMPENSATION_OBSOLETE = 0x30AD,
138
139//Rx Gain Service
140 PTT_MSG_DISABLE_AGC_TABLES = 0x30D0,
141 PTT_MSG_ENABLE_AGC_TABLES = 0x30D1,
142 PTT_MSG_SET_AGC_TABLES_OBSOLETE = 0x30D2,
143 PTT_MSG_GET_RX_RSSI = 0x30D3,
144 PTT_MSG_GET_AGC_TABLE_OBSOLETE = 0x30D5,
145
146//Rx Frame Catcher Service
147 PTT_MSG_SET_RX_DISABLE_MODE = 0x30D4,
148 PTT_MSG_GET_RX_PKT_COUNTS = 0x30E0,
149 PTT_MSG_RESET_RX_PACKET_STATISTICS = 0x30E2,
150 PTT_MSG_GET_UNI_CAST_MAC_PKT_RX_RSSI = 0x30E3,
151 PTT_MSG_GET_UNI_CAST_MAC_PKT_RX_RSSI_CONFIG = 0x30E4,
152
153//Rx Symbol Service
154 PTT_MSG_GRAB_RAM = 0x30F0,
155 PTT_MSG_GRAB_RAM_ONE_CHAIN_OBSOLETE = 0x30F1,
156
157//Phy Calibration Service
158 PTT_MSG_RX_IQ_CAL = 0x3100,
159 PTT_MSG_RX_DCO_CAL = 0x3101,
160 PTT_MSG_TX_CARRIER_SUPPRESS_CAL = 0x3102,
161 PTT_MSG_TX_IQ_CAL = 0x3103,
162 PTT_MSG_EXECUTE_INITIAL_CALS = 0x3104,
163 PTT_MSG_HDET_CAL = 0x3105,
164 PTT_MSG_VCO_LINEARITY_CAL_OBSOLETE = 0x3106,
165
166//Phy Calibration Override Service
167 PTT_MSG_SET_TX_CARRIER_SUPPRESS_CORRECT = 0x3110,
168 PTT_MSG_GET_TX_CARRIER_SUPPRESS_CORRECT = 0x3111,
169 PTT_MSG_SET_TX_IQ_CORRECT = 0x3112,
170 PTT_MSG_GET_TX_IQ_CORRECT = 0x3113,
171 PTT_MSG_SET_RX_IQ_CORRECT = 0x3114,
172 PTT_MSG_GET_RX_IQ_CORRECT = 0x3115,
173 PTT_MSG_SET_RX_DCO_CORRECT = 0x3116,
174 PTT_MSG_GET_RX_DCO_CORRECT = 0x3117,
175 PTT_MSG_SET_TX_IQ_PHASE_NV_TABLE_OBSOLETE = 0x3118,
176 PTT_MSG_GET_HDET_CORRECT_OBSOLETE = 0x3119,
177
178//RF Chip Access
179 PTT_MSG_GET_TEMP_ADC = 0x3202,
180 PTT_MSG_READ_RF_REG = 0x3203,
181 PTT_MSG_WRITE_RF_REG = 0x3204,
182 PTT_MSG_GET_RF_VERSION = 0x3205,
183
184//Deep sleep support
185 PTT_MSG_DEEP_SLEEP = 0x3220,
186 PTT_MSG_READ_SIF_BAR4_REGISTER = 0x3221,
187 PTT_MSG_WRITE_SIF_BAR4_REGISTER = 0x3222,
188 PTT_MSG_ENTER_FULL_POWER = 0x3223,
189
190//Misc
191 PTT_MSG_SYSTEM_RESET = 0x32A0, //is there any meaning for this in Gen6?
192 PTT_MSG_LOG_DUMP = 0x32A1,
193 PTT_MSG_GET_BUILD_RELEASE_NUMBER = 0x32A2,
194
195
196//Messages for Socket App
197 PTT_MSG_ADAPTER_DISABLED_RSP_OBSOLETE = 0x32A3,
198 PTT_MSG_ENABLE_ADAPTER = 0x32A4,
199 PTT_MSG_DISABLE_ADAPTER = 0x32A5,
200 PTT_MSG_PAUSE_RSP_OBSOLETE = 0x32A6,
201 PTT_MSG_CONTINUE_RSP_OBSOLETE = 0x32A7,
202
203 PTT_MSG_HALPHY_INIT = 0x32A8,
204 PTT_MSG_TEST_RXIQ_CAL = 0x32A9,
205 PTT_MSG_START_TONE_GEN = 0x32AA,
206 PTT_MSG_STOP_TONE_GEN = 0x32AB,
207 PTT_MSG_RX_IM2_CAL = 0x32AC,
208 PTT_MSG_SET_RX_IM2_CORRECT = 0x31AD,
209 PTT_MSG_GET_RX_IM2_CORRECT = 0x31AE,
210 PTT_MSG_TEST_DPD_CAL = 0x32AF, // not handle
211 PTT_MSG_SET_CALCONTROL_BITMAP = 0x32B0,
212
213//[RY] specific new messages for PRIMA
214 PTT_MSG_START_WAVEFORM_RF = 0x32B1,
215 PTT_MSG_STOP_WAVEFORM_RF = 0x32B2,
216 PTT_MSG_HKDAC_TX_IQ_CAL = 0x32B3,
217 PTT_MSG_SET_HKADC_TX_IQ_CORRECT = 0x32B4,
218 PTT_MSG_GET_HKADC_TX_IQ_CORRECT = 0x32B5,
219 PTT_MSG_SET_DPD_CORRECT = 0x32B6,
220 PTT_MSG_GET_DPD_CORRECT = 0x32B7,
221 PTT_MSG_SET_WAVEFORM_RF = 0x32B8,
222 PTT_MSG_LNA_BAND_CAL = 0x32B9,
223 PTT_MSG_GET_LNA_BAND_CORRECT = 0x32BA,
224 PTT_MSG_SET_LNA_BAND_CORRECT = 0x32BB,
225 PTT_MSG_DPD_CAL = 0x32BC,
226
227// Suffix'ed Message ID to differential from existing Message name.
228// ===============================================================
229 PTT_MSG_GET_NV_TABLE_PRIMA_V1 = 0x32BD,
230 PTT_MSG_SET_NV_TABLE_PRIMA_V1 = 0x32BE,
231 PTT_MSG_RX_IQ_CAL_PRIMA_V1 = 0x32BF,
232 PTT_MSG_TX_IQ_CAL_PRIMA_V1 = 0x32C0,
233 PTT_MSG_SET_TX_IQ_CORRECT_PRIMA_V1 = 0x32C1,
234 PTT_MSG_GET_TX_IQ_CORRECT_PRIMA_V1 = 0x32C2,
235 PTT_MSG_SET_RX_IQ_CORRECT_PRIMA_V1 = 0x32C3,
236 PTT_MSG_GET_RX_IQ_CORRECT_PRIMA_V1 = 0x32C4,
237 PTT_MSG_START_WAVEFORM_PRIMA_V1 = 0x32C5,
238 PTT_MSG_FORCE_PACKET_TX_GAIN_PRIMA_V1 = 0x32C6,
239 PTT_MSG_CLPC_CAL_SETUP_PRIMA_V1 = 0x32C7,
240 PTT_MSG_CLPC_CAL_RESTORE_PRIMA_V1 = 0x32C8,
241 PTT_MSG_CLOSE_TPC_LOOP_PRIMA_V1 = 0x32C9,
242 PTT_MSG_SW_CLPC_CAL_PRIMA_V1 = 0x32CA,
243 PTT_MSG_CLPC_CAL_EXTRA_MEASUREMENT_PRIMA_V1 = 0x32CB,
244 PTT_MSG_PRIMA_GENERIC_CMD = 0x32CC,
245 PTT_MSG_DIGITAL_PIN_CONNECTIVITY_TEST_RES = 0X32CD,
246
247 PTT_MSG_EXIT = 0x32ff,
248 PTT_MAX_MSG_ID = PTT_MSG_EXIT
249} ePttMsgId;
250
251enum
252{
253 PTT_MSG_PRIMA_GENERIC_CMD_FAST_SET_CHANNEL = 0x0,
254};
255
256#define PTT_MSG_TYPES_BEGIN_30 PTT_MSG_TYPES_BEGIN
257#define PTT_MSG_TYPES_BEGIN_31 PTT_MSG_TYPES_BEGIN + 0x100
258#define PTT_MSG_TYPES_BEGIN_32 PTT_MSG_TYPES_BEGIN + 0x200
259
260// for FTM PER feature
261enum {
262Legacy_FTM = 0,
263FTM_PER_TX = 1,
264FTM_PER_RX = 2,
265};
266
267#ifndef tANI_BOOLEAN
268#define tANI_BOOLEAN tANI_U8
269#endif
270
271
272
273/******************************************************************************************************************
274 PTT MESSAGES
275******************************************************************************************************************/
276//Init
277typedef PACKED_PRE struct PACKED_POST {
278 tPttModuleVariables ptt;
279} tMsgPttMsgInit;
280
281typedef PACKED_PRE struct PACKED_POST {
282 tANI_U32 tableSize;
283 tANI_U32 chunkSize;
284 eNvTable nvTable;
285} tMsgPttGetNvTable;
286
287typedef PACKED_PRE struct PACKED_POST {
288 tANI_U32 tableSize;
289 tANI_U32 chunkSize;
290 eNvTable nvTable;
291} tMsgPttSetNvTable;
292
293typedef PACKED_PRE struct PACKED_POST {
294 eNvTable nvTable;
295} tMsgPttDelNvTable;
296
297typedef PACKED_PRE struct PACKED_POST {
298 tANI_U32 notUsed;
299} tMsgPttBlankNv;
300
301typedef PACKED_PRE struct PACKED_POST {
302 eNvField nvField;
303 uNvFields fieldData;
304} tMsgPttGetNvField;
305
306typedef PACKED_PRE struct PACKED_POST {
307 eNvField nvField;
308 uNvFields fieldData;
309} tMsgPttSetNvField;
310
311typedef PACKED_PRE struct PACKED_POST {
312 eNvTable nvTable;
313} tMsgPttStoreNvTable;
314
315typedef PACKED_PRE struct PACKED_POST {
316 eRegDomainId regDomainId;
317} tMsgPttSetRegDomain;
318
319//Device Register Access
320typedef PACKED_PRE struct PACKED_POST {
321 tANI_U32 regAddr;
322 tANI_U32 regValue;
323} tMsgPttDbgReadRegister;
324
325typedef PACKED_PRE struct PACKED_POST {
326 tANI_U32 regAddr;
327 tANI_U32 regValue;
328} tMsgPttDbgWriteRegister;
329
330#define PTT_READ_MEM_MAX 512
331typedef PACKED_PRE struct PACKED_POST {
332 tANI_U32 memAddr;
333 tANI_U32 nBytes;
334 tANI_U32 pMemBuf[PTT_READ_MEM_MAX]; //caller should allocate space
335} tMsgPttDbgReadMemory;
336
337typedef PACKED_PRE struct PACKED_POST {
338 tANI_U32 memAddr;
339 tANI_U32 nBytes;
340 tANI_U32 pMemBuf[PTT_READ_MEM_MAX];
341} tMsgPttDbgWriteMemory;
342
343//Device MAC Test Setup
344typedef PACKED_PRE struct PACKED_POST {
345 tANI_U32 chId;
346 ePhyChanBondState cbState;
347} tMsgPttSetChannel;
348
349typedef PACKED_PRE struct PACKED_POST {
350 ePhyChainSelect chainSelect;
351} tMsgPttEnableChains;
352
353typedef tIQSamples tWaveformSample;
354
355//Tx Waveform Gen Service
356typedef PACKED_PRE struct PACKED_POST {
357 tWaveformSample waveform[MAX_TEST_WAVEFORM_SAMPLES];
358 tANI_U16 numSamples;
359 tANI_BOOLEAN clk80;
360 tANI_U8 reserved[1];
361} tMsgPttSetWaveform;
362
363typedef PACKED_PRE struct PACKED_POST {
364 ePhyTxChains txChain;
365 tANI_U8 gain;
366} tMsgPttSetTxWaveformGain;
367
368typedef PACKED_PRE struct PACKED_POST {
369 ePhyTxChains txChain;
370 tANI_U32 gain;
371} tMsgPttSetTxWaveformGain_PRIMA_V1;
372
373typedef PACKED_PRE struct PACKED_POST {
374 ePhyRxChains rxChain;
375 tANI_U8 gain;
376} tMsgPttSetRxWaveformGain;
377
378typedef PACKED_PRE struct PACKED_POST {
379 sTxChainsPowerAdcReadings txPowerAdc;
380} tMsgPttGetWaveformPowerAdc;
381
382typedef PACKED_PRE struct PACKED_POST {
383 tANI_U32 notUsed;
384} tMsgPttStopWaveform;
385
386typedef PACKED_PRE struct PACKED_POST {
387 tANI_U32 notUsed;
388} tMsgPttClpcCalSetup_PRIMA_V1;
389
390typedef PACKED_PRE struct PACKED_POST {
391 tANI_U16 setup_measure;
392 tANI_U16 setup_txDmdPwrOffset;
393 tANI_U16 measure_totalExtraPt;
394 tANI_U16 measure_currentMeasurePtIdx;
395 tANI_U8 plut[256];
396} tMsgPttClpcCalExtraMeasurement_PRIMA_V1;
397
398typedef PACKED_PRE struct PACKED_POST {
399 tANI_U32 notUsed;
400} tMsgPttClpcCalRestore_PRIMA_V1;
401
402typedef PACKED_PRE struct PACKED_POST {
403 tANI_U32 startIndex;
404 tANI_U32 numSamples;
405} tMsgPttStartWaveform;
406
407typedef PACKED_PRE struct PACKED_POST {
408 tANI_U32 startIndex;
409 tANI_U32 numSamples;
410} tMsgPttStartWaveform_PRIMA_V1;
411
412// Added for PRIMA
413typedef PACKED_PRE struct PACKED_POST {
414 tWaveformSample waveform[MAX_TEST_WAVEFORM_SAMPLES];
415 tANI_U16 numSamples;
416 tANI_BOOLEAN clk80;
417 tANI_U8 reserved[1];
418} tMsgPttSetWaveformRF;
419
420typedef PACKED_PRE struct PACKED_POST {
421 tANI_U32 startIndex;
422 tANI_U32 numSamples;
423} tMsgPttStartWaveformRF;
424
425typedef PACKED_PRE struct PACKED_POST {
426 tANI_U32 notUsed;
427} tMsgPttStopWaveformRF;
428
429//Tx Frame Gen Service
430typedef PACKED_PRE struct PACKED_POST {
431 sPttFrameGenParams frameParams;
432} tMsgPttConfigTxPacketGen;
433
434typedef PACKED_PRE struct PACKED_POST {
435 tANI_BOOLEAN startStop;
436 tANI_U8 reserved[3];
437} tMsgPttStartStopTxPacketGen;
438
439typedef PACKED_PRE struct PACKED_POST {
440 sTxFrameCounters numFrames;
441 tANI_BOOLEAN status;
442 tANI_U8 reserved[3];
443} tMsgPttQueryTxStatus;
444
445//Tx Frame Power Service
446typedef PACKED_PRE struct PACKED_POST {
447 tANI_BOOLEAN tpcClose;
448 tANI_U8 reserved[3];
449} tMsgPttCloseTpcLoop;
450
451typedef PACKED_PRE struct PACKED_POST {
452 tANI_U32 tpcClose;
453} tMsgPttCloseTpcLoop_PRIMA_V1;
454
455
456 //open loop service
457typedef PACKED_PRE struct PACKED_POST {
458
459 ePhyTxChains txChain;
460 tANI_U8 minIndex;
461 tANI_U8 maxIndex;
462 tANI_U8 reserved[2];
463 tANI_U8 gainTable[TPC_MEM_GAIN_LUT_DEPTH];
464} tMsgPttSetPacketTxGainTable;
465
466typedef PACKED_PRE struct PACKED_POST {
467 ePhyTxChains txChain;
468 tANI_U8 gainTable[TPC_MEM_GAIN_LUT_DEPTH];
469} tMsgPttGetPacketTxGainTable;
470
471typedef PACKED_PRE struct PACKED_POST {
472 tANI_U8 index;
473 tANI_U8 reserved[3];
474} tMsgPttSetPacketTxGainIndex;
475
476typedef PACKED_PRE struct PACKED_POST {
477 ePhyTxChains txChain;
478 tANI_U8 gain;
479 tANI_U8 reserved[3];
480} tMsgPttForcePacketTxGain;
481
482typedef PACKED_PRE struct PACKED_POST {
483 ePhyTxChains txChain;
484 tANI_U32 gain;
485} tMsgPttForcePacketTxGain_PRIMA_V1;
486
487
488typedef PACKED_PRE struct PACKED_POST {
489 ePowerTempIndexSource indexSource;
490} tMsgPttSetPwrIndexSource;
491
492typedef PACKED_PRE struct PACKED_POST {
493 t2Decimal dbmPwr;
494 tANI_U8 reserved[2];
495} tMsgPttSetTxPower;
496
497typedef tTxPowerReport tMsgPttGetTxPowerReport;
498
499typedef PACKED_PRE struct PACKED_POST {
500 ePhyTxChains txChain;
501
502 tANI_U8 minIndex;
503 tANI_U8 maxIndex;
504 tANI_U8 reserved[2];
505
506 tANI_U8 powerLut[TPC_MEM_POWER_LUT_DEPTH];
507} tMsgPttSetPowerLut;
508
509typedef PACKED_PRE struct PACKED_POST {
510 ePhyTxChains txChain;
511
512 tANI_U8 powerLut[TPC_MEM_POWER_LUT_DEPTH];
513} tMsgPttGetPowerLut;
514
515
516//Rx Gain Service
517typedef PACKED_PRE struct PACKED_POST {
518 sRxChainsAgcDisable gains;
519} tMsgPttDisableAgcTables;
520
521
522typedef PACKED_PRE struct PACKED_POST {
523 sRxChainsAgcEnable enables;
524} tMsgPttEnableAgcTables;
525
526typedef PACKED_PRE struct PACKED_POST {
527 sRxChainsRssi rssi;
528} tMsgPttGetRxRssi;
529
530typedef PACKED_PRE struct PACKED_POST {
531 sRxChainsRssi rssi;
532}tMsgPttGetUnicastMacPktRxRssi;
533
534typedef PACKED_PRE struct PACKED_POST {
535 tANI_U32 conf;
536}tMsgPttGetUnicastMacPktRxRssiConf_PRIMA_V1;
537
538//Rx Frame Catcher Service
539typedef PACKED_PRE struct PACKED_POST {
540 sRxTypesDisabled disabled;
541} tMsgPttSetRxDisableMode;
542
543typedef PACKED_PRE struct PACKED_POST {
544 sRxFrameCounters counters;
545} tMsgPttGetRxPktCounts;
546
547
548typedef PACKED_PRE struct PACKED_POST {
549 tANI_U32 notUsed;
550} tMsgPttResetRxPacketStatistics;
551
552
553
554
555
556//ADC Sample Service
557typedef PACKED_PRE struct PACKED_POST {
558 tANI_U32 startSample; //index of first requested sample, 0 causes new capture
559 tANI_U32 numSamples; //number of samples to transfer to host
560 eGrabRamSampleType sampleType;
561 tGrabRamSample grabRam[MAX_REQUESTED_GRAB_RAM_SAMPLES];
562} tMsgPttGrabRam;
563
564
565//Phy Calibration Service
566typedef PACKED_PRE struct PACKED_POST {
567 sRxChainsIQCalValues calValues;
568 eGainSteps gain;
569} tMsgPttRxIqCal;
570
571typedef PACKED_PRE struct PACKED_POST {
572 tRxChainsDcoCorrections calValues;
573 tANI_U8 gain;
574} tMsgPttRxDcoCal;
575
576typedef PACKED_PRE struct PACKED_POST {
577 tRxChainsIm2Corrections calValues;
578 eGainSteps gain;
579 tANI_U8 im2CalOnly;
580} tMsgPttRxIm2Cal;
581
582typedef PACKED_PRE struct PACKED_POST {
583 sTxChainsLoCorrections calValues;
584 tANI_U8 reserve[2];
585 eGainSteps gain;
586} tMsgPttTxCarrierSuppressCal;
587
588typedef PACKED_PRE struct PACKED_POST {
589 sTxChainsIQCalValues calValues;
590 tANI_U8 reserve[2];
591 eGainSteps gain;
592} tMsgPttTxIqCal;
593
594typedef PACKED_PRE struct PACKED_POST {
595 sTxChainsHKIQCalValues calValues;
596 eGainSteps gain;
597} tMsgPttHKdacTxIqCal;
598
599typedef PACKED_PRE struct PACKED_POST {
600 tANI_U32 unused;
601} tMsgPttExecuteInitialCals;
602
603typedef PACKED_PRE struct PACKED_POST {
604 sRfHdetCalValues hdetCalValues;
605} tMsgPttHdetCal;
606
607typedef PACKED_PRE struct PACKED_POST {
608 tANI_U16 clpcMode;
609 tANI_U16 txCmdPwr;
610 tANI_U16 pwrMax_pwrMin;
611 tANI_U16 step;
612 tANI_U8 plut[256];
613} tMsgPttClpcSwCal_PRIMA_V1;
614
615
616//Phy Calibration Override Service
617typedef PACKED_PRE struct PACKED_POST {
618 sTxChainsLoCorrections calValues;
619 tANI_U8 reserve[2];
620 eGainSteps gain;
621} tMsgPttSetTxCarrierSuppressCorrect;
622
623typedef PACKED_PRE struct PACKED_POST {
624 sTxChainsLoCorrections calValues;
625 tANI_U8 reserve[2];
626 eGainSteps gain;
627} tMsgPttGetTxCarrierSuppressCorrect;
628
629typedef PACKED_PRE struct PACKED_POST {
630 sTxChainsIQCalValues calValues;
631 tANI_U8 reserve[2];
632 eGainSteps gain;
633} tMsgPttSetTxIqCorrect;
634
635typedef PACKED_PRE struct PACKED_POST {
636 sTxChainsIQCalValues calValues;
637 tANI_U8 reserve[2];
638 eGainSteps gain;
639} tMsgPttGetTxIqCorrect;
640
641typedef PACKED_PRE struct PACKED_POST {
642 sTxChainsHKIQCalValues calValues;
643 eGainSteps gain;
644} tMsgPttHKdacSetTxIqCorrect;
645
646typedef PACKED_PRE struct PACKED_POST {
647 sTxChainsHKIQCalValues calValues;
648 eGainSteps gain;
649} tMsgPttHKdacGetTxIqCorrect;
650
651typedef PACKED_PRE struct PACKED_POST {
652 sRxChainsIQCalValues calValues;
653 eGainSteps gain;
654} tMsgPttSetRxIqCorrect;
655
656typedef PACKED_PRE struct PACKED_POST {
657 sRxChainsIQCalValues calValues;
658 eGainSteps gain;
659} tMsgPttGetRxIqCorrect;
660
661typedef PACKED_PRE struct PACKED_POST {
662 tRxChainsDcoCorrections calValues;
663 tANI_U8 gain;
664} tMsgPttSetRxDcoCorrect;
665
666typedef PACKED_PRE struct PACKED_POST {
667 tRxChainsDcoCorrections calValues;
668 tANI_U8 gain;
669} tMsgPttGetRxDcoCorrect;
670
671typedef PACKED_PRE struct PACKED_POST {
672 tRxChainsIm2Corrections calValues;
673 tANI_U8 dummy;
674} tMsgPttSetRxIm2Correct;
675
676typedef PACKED_PRE struct PACKED_POST {
677 tRxChainsIm2Corrections calValues;
678 tANI_U8 dummy;
679} tMsgPttGetRxIm2Correct;
680
681typedef PACKED_PRE struct PACKED_POST {
682 eRfTempSensor tempSensor;
683 tTempADCVal tempAdc;
684 tANI_U8 reserved[4 - sizeof(tTempADCVal)];
685} tMsgPttGetTempAdc;
686
687typedef PACKED_PRE struct PACKED_POST {
688 tANI_U32 addr;
689 tANI_U32 mask;
690 tANI_U32 shift;
691 tANI_U32 value;
692} tMsgPttReadRfField;
693
694typedef PACKED_PRE struct PACKED_POST {
695 tANI_U32 addr;
696 tANI_U32 mask;
697 tANI_U32 shift;
698 tANI_U32 value;
699} tMsgPttWriteRfField;
700
701//SIF bar4 Register Access
702typedef PACKED_PRE struct PACKED_POST {
703 tANI_U32 sifRegAddr;
704 tANI_U32 sifRegValue;
705} tMsgPttReadSifBar4Register;
706
707typedef PACKED_PRE struct PACKED_POST {
708 tANI_U32 sifRegAddr;
709 tANI_U32 sifRegValue;
710} tMsgPttWriteSifBar4Register;
711
712typedef PACKED_PRE struct PACKED_POST {
713 tANI_U32 notUsed;
714} tMsgPttDeepSleep;
715
716typedef PACKED_PRE struct PACKED_POST {
717 tANI_U32 notUsed;
718} tMsgPttEnterFullPower;
719
720//Misc.
721typedef PACKED_PRE struct PACKED_POST {
722 tANI_U32 notUsed;
723} tMsgPttSystemReset;
724
725typedef PACKED_PRE struct PACKED_POST {
726 tANI_U32 cmd;
727 tANI_U32 arg1;
728 tANI_U32 arg2;
729 tANI_U32 arg3;
730 tANI_U32 arg4;
731} tMsgPttLogDump;
732
733typedef PACKED_PRE struct PACKED_POST {
734 sBuildReleaseParams relParams;
735} tMsgPttGetBuildReleaseNumber;
736
737typedef PACKED_PRE struct PACKED_POST {
738 tANI_U32 revId;
739} tMsgPttGetRFVersion;
740
741typedef PACKED_PRE struct PACKED_POST {
742 tANI_U32 option; //dummy variable
743} tMsgPttCalControlBitmap;
744
745//#ifdef VERIFY_HALPHY_SIMV_MODEL
746
747
748typedef PACKED_PRE struct PACKED_POST {
749 tANI_U32 option; //dummy variable
750} tMsgPttHalPhyInit;
751
752typedef PACKED_PRE struct PACKED_POST {
753 tANI_U32 option; //dummy variable
754} tMsgPttRxIQTest;
755
756typedef PACKED_PRE struct PACKED_POST {
757 sTxChainsDPDCalValues calValues;
758 eGainSteps gain;
759} tMsgPttDpdCal;
760
761typedef PACKED_PRE struct PACKED_POST {
762 tANI_U8 lutIdx;
763 tANI_U8 band;
764} tMsgPttStartToneGen;
765
766typedef PACKED_PRE struct PACKED_POST {
767 tANI_U32 option; //dummy variable
768} tMsgPttStopToneGen;
769
770typedef PACKED_PRE struct PACKED_POST {
771 sTxChainsLnaBandCalValues calValues;
772 eGainSteps gain;
773} tMsgPttLnaBandCal;
774
775typedef PACKED_PRE struct PACKED_POST {
776 sTxChainsLnaBandCalValues calValues;
777 eGainSteps gain;
778} tMsgPttGetLnaBandCalCorrect;
779
780typedef PACKED_PRE struct PACKED_POST {
781 sTxChainsLnaBandCalValues calValues;
782 eGainSteps gain;
783} tMsgPttSetLnaBandCalCorrect;
784
785typedef PACKED_PRE struct PACKED_POST {
786 sTxChainsDPDCalValues calValues;
787 eGainSteps gain;
788}tMsgPttSetDPDCorrect;
789
790typedef PACKED_PRE struct PACKED_POST {
791 sTxChainsDPDCalValues calValues;
792 eGainSteps gain;
793}tMsgPttGetDPDCorrect;
794
795typedef PACKED_PRE struct PACKED_POST {
796 tQWPTT_U32 cmdIdx;
797 tQWPTT_U32 param1;
798 tQWPTT_U32 param2;
799 tQWPTT_U32 param3;
800 tQWPTT_U32 param4;
801} tMsgPttPrimaGenericCmd;
802
803typedef PACKED_PRE struct PACKED_POST {
804 tANI_U16 testID;
805 tANI_U16 result;
806} tMsgPttPinConnTestRes;
807//#endif
808
809/******************************************************************************************************************
810 END OF PTT MESSAGES
811******************************************************************************************************************/
812
813typedef PACKED_PRE union PACKED_POST pttMsgUnion{
814//typedef union pttMsgUnion {
815 tMsgPttMsgInit MsgInit;
816 tMsgPttGetNvTable GetNvTable;
817 tMsgPttSetNvTable SetNvTable;
818 tMsgPttDelNvTable DelNvTable;
819 tMsgPttBlankNv BlankNv;
820 tMsgPttStoreNvTable StoreNvTable;
821 tMsgPttSetRegDomain SetRegDomain;
822 tMsgPttGetNvField GetNvField;
823 tMsgPttSetNvField SetNvField;
824 tMsgPttDbgReadRegister DbgReadRegister;
825 tMsgPttDbgWriteRegister DbgWriteRegister;
826 tMsgPttDbgReadMemory DbgReadMemory;
827 tMsgPttDbgWriteMemory DbgWriteMemory;
828 tMsgPttEnableChains EnableChains;
829 tMsgPttSetChannel SetChannel;
830 tMsgPttSetWaveform SetWaveform;
831 tMsgPttSetTxWaveformGain SetTxWaveformGain;
832 tMsgPttSetTxWaveformGain_PRIMA_V1 SetTxWaveformGain_PRIMA_V1;
833 tMsgPttGetWaveformPowerAdc GetWaveformPowerAdc;
834 tMsgPttStartWaveform StartWaveform;
835 tMsgPttStartWaveform_PRIMA_V1 StartWaveform_PRIMA_V1;
836 tMsgPttStopWaveform StopWaveform;
837 tMsgPttSetRxWaveformGain SetRxWaveformGain;
838 tMsgPttConfigTxPacketGen ConfigTxPacketGen;
839 tMsgPttStartStopTxPacketGen StartStopTxPacketGen;
840 tMsgPttQueryTxStatus QueryTxStatus;
841 tMsgPttCloseTpcLoop CloseTpcLoop;
842 tMsgPttCloseTpcLoop_PRIMA_V1 CloseTpcLoop_PRIMA_V1;
843 tMsgPttSetPacketTxGainTable SetPacketTxGainTable;
844 tMsgPttGetPacketTxGainTable GetPacketTxGainTable;
845 tMsgPttSetPacketTxGainIndex SetPacketTxGainIndex;
846 tMsgPttForcePacketTxGain ForcePacketTxGain;
847 tMsgPttForcePacketTxGain_PRIMA_V1 ForcePacketTxGain_PRIMA_V1;
848 tMsgPttSetPwrIndexSource SetPwrIndexSource;
849 tMsgPttSetTxPower SetTxPower;
850 tMsgPttGetTxPowerReport GetTxPowerReport;
851 tMsgPttSetPowerLut SetPowerLut;
852 tMsgPttGetPowerLut GetPowerLut;
853 tMsgPttDisableAgcTables DisableAgcTables;
854 tMsgPttEnableAgcTables EnableAgcTables;
855 tMsgPttGetRxRssi GetRxRssi;
856 tMsgPttGetUnicastMacPktRxRssi GetUnicastMacPktRxRssi;
857 tMsgPttGetUnicastMacPktRxRssiConf_PRIMA_V1 GetUnicastMacPktRxRssiConf_PRIMA_V1;
858 tMsgPttSetRxDisableMode SetRxDisableMode;
859 tMsgPttGetRxPktCounts GetRxPktCounts;
860 tMsgPttResetRxPacketStatistics ResetRxPacketStatistics;
861 tMsgPttGrabRam GrabRam;
862 tMsgPttRxIqCal RxIqCal;
863 tMsgPttRxDcoCal RxDcoCal;
864 tMsgPttRxIm2Cal RxIm2Cal;
865
866 tMsgPttExecuteInitialCals ExecuteInitialCals;
867 tMsgPttTxCarrierSuppressCal TxCarrierSuppressCal;
868 tMsgPttTxIqCal TxIqCal;
869 tMsgPttHKdacTxIqCal HKdacTxIqCal;
870 tMsgPttClpcCalSetup_PRIMA_V1 ClpcCalSetup_PRIMA_V1;
871 tMsgPttClpcCalRestore_PRIMA_V1 ClpcCalRestore_PRIMA_V1;
872 tMsgPttHdetCal HdetCal;
873 tMsgPttClpcSwCal_PRIMA_V1 ClpcSwCal_PRIMA_V1;
874 tMsgPttClpcCalExtraMeasurement_PRIMA_V1 ClpcCalExtraMeasurement_PRIMA_V1;
875 tMsgPttSetTxCarrierSuppressCorrect SetTxCarrierSuppressCorrect;
876 tMsgPttGetTxCarrierSuppressCorrect GetTxCarrierSuppressCorrect;
877 tMsgPttSetTxIqCorrect SetTxIqCorrect;
878 tMsgPttGetTxIqCorrect GetTxIqCorrect;
879 tMsgPttSetRxIqCorrect SetRxIqCorrect;
880 tMsgPttGetRxIqCorrect GetRxIqCorrect;
881 tMsgPttSetRxDcoCorrect SetRxDcoCorrect;
882 tMsgPttGetRxDcoCorrect GetRxDcoCorrect;
883 tMsgPttSetRxIm2Correct SetRxIm2Correct;
884 tMsgPttGetRxIm2Correct GetRxIm2Correct;
885 tMsgPttHKdacSetTxIqCorrect HKdacSetTxIqCorrect;
886 tMsgPttHKdacGetTxIqCorrect HKdacGetTxIqCorrect;
887
888 tMsgPttGetTempAdc GetTempAdc;
889 tMsgPttReadRfField ReadRfField;
890 tMsgPttWriteRfField WriteRfField;
891 tMsgPttCalControlBitmap SetCalControlBitmap;
892
893//#ifdef VERIFY_HALPHY_SIMV_MODEL
894
895 tMsgPttHalPhyInit InitOption;
896 tMsgPttRxIQTest RxIQTest;
897 tMsgPttDpdCal DpdCal;
898 tMsgPttStartToneGen StartToneGen;
899 tMsgPttStopToneGen StopToneGen;
900//#endif
901 tMsgPttDeepSleep DeepSleep;
902 tMsgPttReadSifBar4Register ReadSifBar4Register;
903 tMsgPttWriteSifBar4Register WriteSifBar4Register;
904 tMsgPttEnterFullPower EnterFullPower;
905 tMsgPttSystemReset SystemReset;
906 tMsgPttLogDump LogDump;
907 tMsgPttGetBuildReleaseNumber GetBuildReleaseNumber;
908 tMsgPttGetRFVersion GetRFVersion;
909
910//[RY] added for PRIMA
911 tMsgPttSetWaveformRF SetWaveformRF;
912 tMsgPttStopWaveformRF StopWaveformRF;
913 tMsgPttStartWaveformRF StartWaveformRF;
914 tMsgPttLnaBandCal LnaBandCal;
915 tMsgPttGetLnaBandCalCorrect GetLnaBandCalCorrect;
916 tMsgPttSetLnaBandCalCorrect SetLnaBandCalCorrect;
917 tMsgPttGetDPDCorrect GetDPDCorrect;
918 tMsgPttSetDPDCorrect SetDPDCorrect;
919 tMsgPttDpdCal DPDCal;
920 tMsgPttPrimaGenericCmd PrimaGenericCmd;
921 tMsgPttPinConnTestRes PinConnTestRes;
922} uPttMsgs;
923
924typedef PACKED_PRE struct PACKED_POST {
925 tANI_U16 msgId;
926 tANI_U16 msgBodyLength; //actually, the length of all the fields in this structure
927 eQWPttStatus msgResponse;
928 uPttMsgs msgBody;
929} tPttMsgbuffer, *tpPttMsgbuffer;
930
931
932typedef PACKED_PRE struct PACKED_POST {
933 /*
934 * success or failure
935 */
936 tANI_U32 status;
937 tPttMsgbuffer pttMsgBuffer;
938} tProcessPttRspParams, *tpProcessPttRspParams;
939
940/* End of Ptt Parameters */
941
942#endif