Blame - CORE/MAC/src/cfg/cfgProcMsg.c - platform/vendor/qcom-opensource/wlan/prima

blob: e25a7986c8f0f1111e2c671060fb0385cb23cf0a [file] [log] [blame]

Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	1	/*
Manjeet Singh	3d8e094	2016-02-09 19:06:08 +0530	[diff] [blame^]	2	* Copyright (c) 2011-2016 The Linux Foundation. All rights reserved.
Kiet Lam	842dad0	2014-02-18 18:44:02 -0800	[diff] [blame]	3	*
				4	* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
				5	*
				6	*
				7	* Permission to use, copy, modify, and/or distribute this software for
				8	* any purpose with or without fee is hereby granted, provided that the
				9	* above copyright notice and this permission notice appear in all
				10	* copies.
				11	*
				12	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
				13	* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
				14	* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
				15	* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
				16	* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
				17	* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
				18	* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
				19	* PERFORMANCE OF THIS SOFTWARE.
Gopichand Nakkala	92f07d8	2013-01-08 21:16:34 -0800	[diff] [blame]	20	*/
Kiet Lam	842dad0	2014-02-18 18:44:02 -0800	[diff] [blame]	21
				22	/*
				23	* This file was originally distributed by Qualcomm Atheros, Inc.
				24	* under proprietary terms before Copyright ownership was assigned
				25	* to the Linux Foundation.
				26	*/
				27
Gopichand Nakkala	92f07d8	2013-01-08 21:16:34 -0800	[diff] [blame]	28	/*
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	29	*
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	30	* This file contains CFG functions for processing host messages.
				31	*
				32	* Author: Kevin Nguyen
				33	* Date: 04/09/02
				34	* History:-
				35	* 04/09/02 Created.
				36	* --------------------------------------------------------------------
				37	*/
				38	#include "palTypes.h"
				39	#include "aniGlobal.h"
				40	#include "cfgPriv.h"
				41	#include "cfgDebug.h"
				42	#include "wlan_qct_wda.h"
				43
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	44	tAniSirCgStatic cfgStatic[CFG_PARAM_MAX_NUM] =
				45	{
				46	{WNI_CFG_STA_ID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	47	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RELOAD \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	48	0, 255, 1},
				49	{WNI_CFG_CF_POLLABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	50	CFG_CTL_RE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	51	0, 255, 1},
				52	{WNI_CFG_CFP_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	53	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	54	WNI_CFG_CFP_PERIOD_STAMIN,
				55	WNI_CFG_CFP_PERIOD_STAMAX,
				56	WNI_CFG_CFP_PERIOD_STADEF},
				57	{WNI_CFG_CFP_MAX_DURATION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	58	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	59	WNI_CFG_CFP_MAX_DURATION_STAMIN,
				60	WNI_CFG_CFP_MAX_DURATION_STAMAX,
				61	WNI_CFG_CFP_MAX_DURATION_STADEF},
				62	{WNI_CFG_SSID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	63	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	64	0, 255, 6},
				65	{WNI_CFG_BEACON_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	66	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_SCH,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	67	WNI_CFG_BEACON_INTERVAL_STAMIN,
				68	WNI_CFG_BEACON_INTERVAL_STAMAX,
				69	WNI_CFG_BEACON_INTERVAL_STADEF},
				70	{WNI_CFG_DTIM_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	71	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	72	WNI_CFG_DTIM_PERIOD_STAMIN,
				73	WNI_CFG_DTIM_PERIOD_STAMAX,
				74	WNI_CFG_DTIM_PERIOD_STADEF},
				75	{WNI_CFG_WEP_KEY_LENGTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	76	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	77	WNI_CFG_WEP_KEY_LENGTH_STAMIN,
				78	WNI_CFG_WEP_KEY_LENGTH_STAMAX,
				79	WNI_CFG_WEP_KEY_LENGTH_STADEF},
				80	{WNI_CFG_WEP_DEFAULT_KEY_1,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	81	CFG_CTL_VALID \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	82	0, 65535, 0},
				83	{WNI_CFG_WEP_DEFAULT_KEY_2,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	84	CFG_CTL_VALID \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	85	1, 1, 1},
				86	{WNI_CFG_WEP_DEFAULT_KEY_3,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	87	CFG_CTL_VALID \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	88	0, 5, 5},
				89	{WNI_CFG_WEP_DEFAULT_KEY_4,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	90	CFG_CTL_VALID \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	91	0, 1, 0},
				92	{WNI_CFG_WEP_DEFAULT_KEYID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	93	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	94	WNI_CFG_WEP_DEFAULT_KEYID_STAMIN,
				95	WNI_CFG_WEP_DEFAULT_KEYID_STAMAX,
				96	WNI_CFG_WEP_DEFAULT_KEYID_STADEF},
				97	{WNI_CFG_EXCLUDE_UNENCRYPTED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	98	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	99	WNI_CFG_EXCLUDE_UNENCRYPTED_STAMIN,
				100	WNI_CFG_EXCLUDE_UNENCRYPTED_STAMAX,
				101	WNI_CFG_EXCLUDE_UNENCRYPTED_STADEF},
				102	{WNI_CFG_RTS_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	103	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	104	WNI_CFG_RTS_THRESHOLD_STAMIN,
				105	WNI_CFG_RTS_THRESHOLD_STAMAX,
				106	WNI_CFG_RTS_THRESHOLD_STADEF},
				107	{WNI_CFG_SHORT_RETRY_LIMIT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	108	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	109	WNI_CFG_SHORT_RETRY_LIMIT_STAMIN,
				110	WNI_CFG_SHORT_RETRY_LIMIT_STAMAX,
				111	WNI_CFG_SHORT_RETRY_LIMIT_STADEF},
				112	{WNI_CFG_LONG_RETRY_LIMIT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	113	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	114	WNI_CFG_LONG_RETRY_LIMIT_STAMIN,
				115	WNI_CFG_LONG_RETRY_LIMIT_STAMAX,
				116	WNI_CFG_LONG_RETRY_LIMIT_STADEF},
				117	{WNI_CFG_FRAGMENTATION_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	118	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	119	WNI_CFG_FRAGMENTATION_THRESHOLD_STAMIN,
				120	WNI_CFG_FRAGMENTATION_THRESHOLD_STAMAX,
				121	WNI_CFG_FRAGMENTATION_THRESHOLD_STADEF},
				122	{WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	123	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	124	WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STAMIN,
				125	WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STAMAX,
				126	WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STADEF},
				127	{WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	128	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	129	WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STAMIN,
				130	WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STAMAX,
				131	WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STADEF},
				132	{WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	133	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	134	WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STAMIN,
				135	WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STAMAX,
				136	WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STADEF},
				137	{WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	138	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	139	WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STAMIN,
				140	WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STAMAX,
				141	WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STADEF},
				142	{WNI_CFG_JOIN_FAILURE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	143	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	144	WNI_CFG_JOIN_FAILURE_TIMEOUT_STAMIN,
				145	WNI_CFG_JOIN_FAILURE_TIMEOUT_STAMAX,
				146	WNI_CFG_JOIN_FAILURE_TIMEOUT_STADEF},
				147	{WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	148	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	149	WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STAMIN,
				150	WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STAMAX,
				151	WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STADEF},
				152	{WNI_CFG_AUTHENTICATE_RSP_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	153	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	154	WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STAMIN,
				155	WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STAMAX,
				156	WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STADEF},
				157	{WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	158	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	159	WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STAMIN,
				160	WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STAMAX,
				161	WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STADEF},
				162	{WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	163	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	164	WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STAMIN,
				165	WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STAMAX,
				166	WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STADEF},
				167	{WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	168	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	169	WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STAMIN,
				170	WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STAMAX,
				171	WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STADEF},
				172	{WNI_CFG_PS_ENABLE_BCN_FILTER,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	173	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	174	WNI_CFG_PS_ENABLE_BCN_FILTER_STAMIN,
				175	WNI_CFG_PS_ENABLE_BCN_FILTER_STAMAX,
				176	WNI_CFG_PS_ENABLE_BCN_FILTER_STADEF},
				177	{WNI_CFG_PS_ENABLE_HEART_BEAT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	178	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	179	WNI_CFG_PS_ENABLE_HEART_BEAT_STAMIN,
				180	WNI_CFG_PS_ENABLE_HEART_BEAT_STAMAX,
				181	WNI_CFG_PS_ENABLE_HEART_BEAT_STADEF},
				182	{WNI_CFG_PS_ENABLE_RSSI_MONITOR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	183	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	184	WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMIN,
				185	WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMAX,
				186	WNI_CFG_PS_ENABLE_RSSI_MONITOR_STADEF},
				187	{WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	188	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	189	WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMIN,
				190	WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMAX,
				191	WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STADEF},
				192	{WNI_CFG_RF_SETTLING_TIME_CLK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	193	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	194	WNI_CFG_RF_SETTLING_TIME_CLK_STAMIN,
				195	WNI_CFG_RF_SETTLING_TIME_CLK_STAMAX,
				196	WNI_CFG_RF_SETTLING_TIME_CLK_STADEF},
				197	{WNI_CFG_SUPPORTED_RATES_11B,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	198	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	199	0, 3, 1},
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	200	{WNI_CFG_SUPPORTED_RATES_11A, CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	201	0, 255, 15},
				202	{WNI_CFG_PHY_MODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	203	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	204	WNI_CFG_PHY_MODE_STAMIN,
				205	WNI_CFG_PHY_MODE_STAMAX,
				206	WNI_CFG_PHY_MODE_STADEF},
				207	{WNI_CFG_DOT11_MODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	208	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	209	WNI_CFG_DOT11_MODE_STAMIN,
				210	WNI_CFG_DOT11_MODE_STAMAX,
				211	WNI_CFG_DOT11_MODE_STADEF},
				212	{WNI_CFG_OPERATIONAL_RATE_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	213	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	214	0, 1, 1},
				215	{WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	216	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	217	0, 65535, 65534},
				218	{WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	219	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	220	0, 0, 0},
				221	{WNI_CFG_BSSID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	222	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	223	0,0,0},
				224	{WNI_CFG_LISTEN_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	225	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	226	WNI_CFG_LISTEN_INTERVAL_STAMIN,
				227	WNI_CFG_LISTEN_INTERVAL_STAMAX,
				228	WNI_CFG_LISTEN_INTERVAL_STADEF},
				229	{WNI_CFG_VALID_CHANNEL_LIST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	230	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	231	0, 1, 1},
				232	{WNI_CFG_CURRENT_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	233	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	234	WNI_CFG_CURRENT_CHANNEL_STAMIN,
				235	WNI_CFG_CURRENT_CHANNEL_STAMAX,
				236	WNI_CFG_CURRENT_CHANNEL_STADEF},
				237	{WNI_CFG_DEFAULT_RATE_INDEX_5GHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	238	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	239	WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STAMIN,
				240	WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STAMAX,
				241	WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STADEF},
				242	{WNI_CFG_DEFAULT_RATE_INDEX_24GHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	243	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	244	WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STAMIN,
				245	WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STAMAX,
				246	WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STADEF},
				247	{WNI_CFG_RATE_ADAPTATION_TYPE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	248	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_SCH,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	249	WNI_CFG_RATE_ADAPTATION_TYPE_STAMIN,
				250	WNI_CFG_RATE_ADAPTATION_TYPE_STAMAX,
				251	WNI_CFG_RATE_ADAPTATION_TYPE_STADEF},
				252	{WNI_CFG_FIXED_RATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	253	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	254	WNI_CFG_FIXED_RATE_STAMIN,
				255	WNI_CFG_FIXED_RATE_STAMAX,
				256	WNI_CFG_FIXED_RATE_STADEF},
				257	{WNI_CFG_FIXED_RATE_MULTICAST_24GHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	258	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	259	WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STAMIN,
				260	WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STAMAX,
				261	WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STADEF},
				262	{WNI_CFG_FIXED_RATE_MULTICAST_5GHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	263	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	264	WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STAMIN,
				265	WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STAMAX,
				266	WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STADEF},
				267	{WNI_CFG_RETRYRATE_POLICY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	268	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	269	WNI_CFG_RETRYRATE_POLICY_STAMIN,
				270	WNI_CFG_RETRYRATE_POLICY_STAMAX,
				271	WNI_CFG_RETRYRATE_POLICY_STADEF},
				272	{WNI_CFG_RETRYRATE_SECONDARY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	273	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	274	WNI_CFG_RETRYRATE_SECONDARY_STAMIN,
				275	WNI_CFG_RETRYRATE_SECONDARY_STAMAX,
				276	WNI_CFG_RETRYRATE_SECONDARY_STADEF},
				277	{WNI_CFG_RETRYRATE_TERTIARY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	278	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	279	WNI_CFG_RETRYRATE_TERTIARY_STAMIN,
				280	WNI_CFG_RETRYRATE_TERTIARY_STAMAX,
				281	WNI_CFG_RETRYRATE_TERTIARY_STADEF},
				282	{WNI_CFG_APSD_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	283	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	284	WNI_CFG_APSD_ENABLED_STAMIN,
				285	WNI_CFG_APSD_ENABLED_STAMAX,
				286	WNI_CFG_APSD_ENABLED_STADEF},
				287	{WNI_CFG_SHARED_KEY_AUTH_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	288	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	289	WNI_CFG_SHARED_KEY_AUTH_ENABLE_STAMIN,
				290	WNI_CFG_SHARED_KEY_AUTH_ENABLE_STAMAX,
				291	WNI_CFG_SHARED_KEY_AUTH_ENABLE_STADEF},
				292	{WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	293	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	294	WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STAMIN,
				295	WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STAMAX,
				296	WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STADEF},
				297	{WNI_CFG_AUTHENTICATION_TYPE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	298	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	299	WNI_CFG_AUTHENTICATION_TYPE_STAMIN,
				300	WNI_CFG_AUTHENTICATION_TYPE_STAMAX,
				301	WNI_CFG_AUTHENTICATION_TYPE_STADEF},
				302	{WNI_CFG_CF_POLL_REQUEST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	303	CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	304	0, 255, 1},
				305	{WNI_CFG_PRIVACY_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	306	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	307	WNI_CFG_PRIVACY_ENABLED_STAMIN,
				308	WNI_CFG_PRIVACY_ENABLED_STAMAX,
				309	WNI_CFG_PRIVACY_ENABLED_STADEF},
				310	{WNI_CFG_SHORT_PREAMBLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	311	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	312	WNI_CFG_SHORT_PREAMBLE_STAMIN,
				313	WNI_CFG_SHORT_PREAMBLE_STAMAX,
				314	WNI_CFG_SHORT_PREAMBLE_STADEF},
				315	{WNI_CFG_SHORT_SLOT_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	316	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	317	WNI_CFG_SHORT_SLOT_TIME_STAMIN,
				318	WNI_CFG_SHORT_SLOT_TIME_STAMAX,
				319	WNI_CFG_SHORT_SLOT_TIME_STADEF},
				320	{WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	321	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	322	WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STAMIN,
				323	WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STAMAX,
				324	WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STADEF},
				325	{WNI_CFG_QOS_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	326	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	327	WNI_CFG_QOS_ENABLED_STAMIN,
				328	WNI_CFG_QOS_ENABLED_STAMAX,
				329	WNI_CFG_QOS_ENABLED_STADEF},
				330	{WNI_CFG_HCF_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	331	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	332	WNI_CFG_HCF_ENABLED_STAMIN,
				333	WNI_CFG_HCF_ENABLED_STAMAX,
				334	WNI_CFG_HCF_ENABLED_STADEF},
				335	{WNI_CFG_RSN_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	336	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	337	WNI_CFG_RSN_ENABLED_STAMIN,
				338	WNI_CFG_RSN_ENABLED_STAMAX,
				339	WNI_CFG_RSN_ENABLED_STADEF},
				340	{WNI_CFG_BACKGROUND_SCAN_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	341	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	342	WNI_CFG_BACKGROUND_SCAN_PERIOD_STAMIN,
				343	WNI_CFG_BACKGROUND_SCAN_PERIOD_STAMAX,
				344	WNI_CFG_BACKGROUND_SCAN_PERIOD_STADEF},
				345	{WNI_CFG_MAX_NUM_PRE_AUTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	346	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	347	WNI_CFG_MAX_NUM_PRE_AUTH_STAMIN,
				348	WNI_CFG_MAX_NUM_PRE_AUTH_STAMAX,
				349	WNI_CFG_MAX_NUM_PRE_AUTH_STADEF},
				350	{WNI_CFG_PREAUTH_CLNUP_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	351	CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	352	0, 255, 1},
				353	{WNI_CFG_RELEASE_AID_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	354	CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	355	0, 255, 1},
				356	{WNI_CFG_HEART_BEAT_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	357	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	358	WNI_CFG_HEART_BEAT_THRESHOLD_STAMIN,
				359	WNI_CFG_HEART_BEAT_THRESHOLD_STAMAX,
				360	WNI_CFG_HEART_BEAT_THRESHOLD_STADEF},
				361	{WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	362	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	363	WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STAMIN,
				364	WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STAMAX,
				365	WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STADEF},
				366	{WNI_CFG_MANUFACTURER_OUI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	367	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	368	0, 0, 0},
				369	{WNI_CFG_MANUFACTURER_NAME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	370	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	371	0, 0, 0},
				372	{WNI_CFG_MODEL_NUMBER,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	373	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	374	0, 0, 0},
				375	{WNI_CFG_MODEL_NAME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	376	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	377	0, 0, 0},
				378	{WNI_CFG_MANUFACTURER_PRODUCT_NAME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	379	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	380	0, 0, 0},
				381	{WNI_CFG_MANUFACTURER_PRODUCT_VERSION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	382	CFG_CTL_VALID \| CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	383	0, 0, 0},
				384	{WNI_CFG_11D_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	385	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	386	WNI_CFG_11D_ENABLED_STAMIN,
				387	WNI_CFG_11D_ENABLED_STAMAX,
				388	WNI_CFG_11D_ENABLED_STADEF},
				389	{WNI_CFG_MAX_TX_POWER_2_4,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	390	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	391	0, 0, 0},
				392	{WNI_CFG_MAX_TX_POWER_5,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	393	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	394	0, 0, 0},
				395	{WNI_CFG_NETWORK_DENSITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	396	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	397	WNI_CFG_NETWORK_DENSITY_STAMIN,
				398	WNI_CFG_NETWORK_DENSITY_STAMAX,
				399	WNI_CFG_NETWORK_DENSITY_STADEF},
				400	{WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	401	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	402	WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STAMIN,
				403	WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STAMAX,
				404	WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STADEF},
				405	{WNI_CFG_CURRENT_TX_ANTENNA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	406	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	407	WNI_CFG_CURRENT_TX_ANTENNA_STAMIN,
				408	WNI_CFG_CURRENT_TX_ANTENNA_STAMAX,
				409	WNI_CFG_CURRENT_TX_ANTENNA_STADEF},
				410	{WNI_CFG_CURRENT_RX_ANTENNA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	411	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	412	WNI_CFG_CURRENT_RX_ANTENNA_STAMIN,
				413	WNI_CFG_CURRENT_RX_ANTENNA_STAMAX,
				414	WNI_CFG_CURRENT_RX_ANTENNA_STADEF},
				415	{WNI_CFG_CURRENT_TX_POWER_LEVEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	416	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	417	WNI_CFG_CURRENT_TX_POWER_LEVEL_STAMIN,
				418	WNI_CFG_CURRENT_TX_POWER_LEVEL_STAMAX,
				419	WNI_CFG_CURRENT_TX_POWER_LEVEL_STADEF},
				420	{WNI_CFG_POWER_STATE_PER_CHAIN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	421	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	422	WNI_CFG_POWER_STATE_PER_CHAIN_STAMIN,
				423	WNI_CFG_POWER_STATE_PER_CHAIN_STAMAX,
				424	WNI_CFG_POWER_STATE_PER_CHAIN_STADEF},
				425	{WNI_CFG_NEW_BSS_FOUND_IND,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	426	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	427	WNI_CFG_NEW_BSS_FOUND_IND_STAMIN,
				428	WNI_CFG_NEW_BSS_FOUND_IND_STAMAX,
				429	WNI_CFG_NEW_BSS_FOUND_IND_STADEF},
				430	{WNI_CFG_PROPRIETARY_ANI_FEATURES_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	431	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	432	WNI_CFG_PROPRIETARY_ANI_FEATURES_ENABLED_STAMIN,
				433	WNI_CFG_PROPRIETARY_ANI_FEATURES_ENABLED_STAMAX,
				434	WNI_CFG_PROPRIETARY_ANI_FEATURES_ENABLED_STADEF},
				435	{WNI_CFG_PROPRIETARY_RATES_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	436	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	437	WNI_CFG_PROPRIETARY_RATES_ENABLED_STAMIN,
				438	WNI_CFG_PROPRIETARY_RATES_ENABLED_STAMAX,
				439	WNI_CFG_PROPRIETARY_RATES_ENABLED_STADEF},
				440	{WNI_CFG_AP_NODE_NAME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	441	CFG_CTL_RE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	442	0, 255, 1},
				443	{WNI_CFG_COUNTRY_CODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	444	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	445	0, 0, 0},
				446	{WNI_CFG_11H_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	447	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	448	WNI_CFG_11H_ENABLED_STAMIN,
				449	WNI_CFG_11H_ENABLED_STAMAX,
				450	WNI_CFG_11H_ENABLED_STADEF},
				451	{WNI_CFG_WT_CNF_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	452	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	453	WNI_CFG_WT_CNF_TIMEOUT_STAMIN,
				454	WNI_CFG_WT_CNF_TIMEOUT_STAMAX,
				455	WNI_CFG_WT_CNF_TIMEOUT_STADEF},
				456	{WNI_CFG_KEEPALIVE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	457	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	458	WNI_CFG_KEEPALIVE_TIMEOUT_STAMIN,
				459	WNI_CFG_KEEPALIVE_TIMEOUT_STAMAX,
				460	WNI_CFG_KEEPALIVE_TIMEOUT_STADEF},
				461	{WNI_CFG_PROXIMITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	462	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	463	WNI_CFG_PROXIMITY_STAMIN,
				464	WNI_CFG_PROXIMITY_STAMAX,
				465	WNI_CFG_PROXIMITY_STADEF},
				466	{WNI_CFG_LOG_LEVEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	467	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	468	WNI_CFG_LOG_LEVEL_STAMIN,
				469	WNI_CFG_LOG_LEVEL_STAMAX,
				470	WNI_CFG_LOG_LEVEL_STADEF},
				471	{WNI_CFG_OLBC_DETECT_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	472	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	473	WNI_CFG_OLBC_DETECT_TIMEOUT_STAMIN,
				474	WNI_CFG_OLBC_DETECT_TIMEOUT_STAMAX,
				475	WNI_CFG_OLBC_DETECT_TIMEOUT_STADEF},
				476	{WNI_CFG_PROTECTION_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	477	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	478	WNI_CFG_PROTECTION_ENABLED_STAMIN,
				479	WNI_CFG_PROTECTION_ENABLED_STAMAX,
				480	WNI_CFG_PROTECTION_ENABLED_STADEF},
				481	{WNI_CFG_11G_PROTECTION_ALWAYS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	482	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	483	WNI_CFG_11G_PROTECTION_ALWAYS_STAMIN,
				484	WNI_CFG_11G_PROTECTION_ALWAYS_STAMAX,
				485	WNI_CFG_11G_PROTECTION_ALWAYS_STADEF},
				486	{WNI_CFG_FORCE_POLICY_PROTECTION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	487	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	488	WNI_CFG_FORCE_POLICY_PROTECTION_STAMIN,
				489	WNI_CFG_FORCE_POLICY_PROTECTION_STAMAX,
				490	WNI_CFG_FORCE_POLICY_PROTECTION_STADEF},
				491	{WNI_CFG_11G_SHORT_PREAMBLE_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	492	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	493	WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STAMIN,
				494	WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STAMAX,
				495	WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STADEF},
				496	{WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	497	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	498	WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STAMIN,
				499	WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STAMAX,
				500	WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STADEF},
				501	{WNI_CFG_CAL_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	502	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	503	WNI_CFG_CAL_PERIOD_STAMIN,
				504	WNI_CFG_CAL_PERIOD_STAMAX,
				505	WNI_CFG_CAL_PERIOD_STADEF},
				506	{WNI_CFG_STATS_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	507	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	508	WNI_CFG_STATS_PERIOD_STAMIN,
				509	WNI_CFG_STATS_PERIOD_STAMAX,
				510	WNI_CFG_STATS_PERIOD_STADEF},
				511	{WNI_CFG_CAL_CONTROL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	512	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	513	WNI_CFG_CAL_CONTROL_STAMIN,
				514	WNI_CFG_CAL_CONTROL_STAMAX,
				515	WNI_CFG_CAL_CONTROL_STADEF},
				516	{WNI_CFG_11G_ONLY_POLICY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	517	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	518	WNI_CFG_11G_ONLY_POLICY_STAMIN,
				519	WNI_CFG_11G_ONLY_POLICY_STAMAX,
				520	WNI_CFG_11G_ONLY_POLICY_STADEF},
				521	{WNI_CFG_PACKET_CLASSIFICATION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	522	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	523	WNI_CFG_PACKET_CLASSIFICATION_STAMIN,
				524	WNI_CFG_PACKET_CLASSIFICATION_STAMAX,
				525	WNI_CFG_PACKET_CLASSIFICATION_STADEF},
				526	{WNI_CFG_WME_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	527	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	528	WNI_CFG_WME_ENABLED_STAMIN,
				529	WNI_CFG_WME_ENABLED_STAMAX,
				530	WNI_CFG_WME_ENABLED_STADEF},
				531	{WNI_CFG_ADDTS_RSP_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	532	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	533	WNI_CFG_ADDTS_RSP_TIMEOUT_STAMIN,
				534	WNI_CFG_ADDTS_RSP_TIMEOUT_STAMAX,
				535	WNI_CFG_ADDTS_RSP_TIMEOUT_STADEF},
				536	{WNI_CFG_MAX_SP_LENGTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	537	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	538	WNI_CFG_MAX_SP_LENGTH_STAMIN,
				539	WNI_CFG_MAX_SP_LENGTH_STAMAX,
				540	WNI_CFG_MAX_SP_LENGTH_STADEF},
				541	{WNI_CFG_KEEP_ALIVE_STA_LIMIT_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	542	CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	543	0, 255, 1},
				544	{WNI_CFG_SEND_SINGLE_SSID_ALWAYS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	545	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	546	WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STAMIN,
				547	WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STAMAX,
				548	WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STADEF},
				549	{WNI_CFG_WSM_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	550	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	551	WNI_CFG_WSM_ENABLED_STAMIN,
				552	WNI_CFG_WSM_ENABLED_STAMAX,
				553	WNI_CFG_WSM_ENABLED_STADEF},
				554	{WNI_CFG_PROP_CAPABILITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	555	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	556	WNI_CFG_PROP_CAPABILITY_STAMIN,
				557	WNI_CFG_PROP_CAPABILITY_STAMAX,
				558	WNI_CFG_PROP_CAPABILITY_STADEF},
				559	{WNI_CFG_EDCA_PROFILE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	560	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_SCH,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	561	WNI_CFG_EDCA_PROFILE_STAMIN,
				562	WNI_CFG_EDCA_PROFILE_STAMAX,
				563	WNI_CFG_EDCA_PROFILE_STADEF},
				564	{WNI_CFG_EDCA_ANI_ACBK_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	565	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	566	0, 0, 0},
				567	{WNI_CFG_EDCA_ANI_ACBE_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	568	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	569	0, 0, 0},
				570	{WNI_CFG_EDCA_ANI_ACVI_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	571	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	572	0, 0, 0},
				573	{WNI_CFG_EDCA_ANI_ACVO_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	574	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	575	0, 0, 0},
				576	{WNI_CFG_EDCA_ANI_ACBK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	577	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	578	0, 0, 0},
				579	{WNI_CFG_EDCA_ANI_ACBE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	580	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	581	0, 0, 0},
				582	{WNI_CFG_EDCA_ANI_ACVI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	583	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	584	0, 0, 0},
				585	{WNI_CFG_EDCA_ANI_ACVO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	586	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	587	0, 0, 0},
				588	{WNI_CFG_EDCA_WME_ACBK_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	589	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	590	0, 0, 0},
				591	{WNI_CFG_EDCA_WME_ACBE_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	592	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	593	0, 0, 0},
				594	{WNI_CFG_EDCA_WME_ACVI_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	595	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	596	0, 0, 0},
				597	{WNI_CFG_EDCA_WME_ACVO_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	598	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	599	0, 0, 0},
				600	{WNI_CFG_EDCA_WME_ACBK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	601	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	602	0, 0, 0},
				603	{WNI_CFG_EDCA_WME_ACBE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	604	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	605	0, 0, 0},
				606	{WNI_CFG_EDCA_WME_ACVI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	607	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	608	0, 0, 0},
				609	{WNI_CFG_EDCA_WME_ACVO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	610	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	611	0, 0, 0},
				612	{WNI_CFG_EDCA_TIT_DEMO_ACBK_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	613	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	614	0, 0, 0},
				615	{WNI_CFG_EDCA_TIT_DEMO_ACBE_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	616	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	617	0, 0, 0},
				618	{WNI_CFG_EDCA_TIT_DEMO_ACVI_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	619	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	620	0, 0, 0},
				621	{WNI_CFG_EDCA_TIT_DEMO_ACVO_LOCAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	622	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	623	0, 0, 0},
				624	{WNI_CFG_EDCA_TIT_DEMO_ACBK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	625	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	626	0, 0, 0},
				627	{WNI_CFG_EDCA_TIT_DEMO_ACBE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	628	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	629	0, 0, 0},
				630	{WNI_CFG_EDCA_TIT_DEMO_ACVI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	631	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	632	0, 0, 0},
				633	{WNI_CFG_EDCA_TIT_DEMO_ACVO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	634	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	635	0, 0, 0},
				636	{WNI_CFG_RDET_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	637	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	638	WNI_CFG_RDET_FLAG_STAMIN,
				639	WNI_CFG_RDET_FLAG_STAMAX,
				640	WNI_CFG_RDET_FLAG_STADEF},
				641	{WNI_CFG_RADAR_CHANNEL_LIST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	642	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	643	0, 0, 0},
				644	{WNI_CFG_LOCAL_POWER_CONSTRAINT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	645	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	646	WNI_CFG_LOCAL_POWER_CONSTRAINT_STAMIN,
				647	WNI_CFG_LOCAL_POWER_CONSTRAINT_STAMAX,
				648	WNI_CFG_LOCAL_POWER_CONSTRAINT_STADEF},
				649	{WNI_CFG_ADMIT_POLICY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	650	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	651	WNI_CFG_ADMIT_POLICY_STAMIN,
				652	WNI_CFG_ADMIT_POLICY_STAMAX,
				653	WNI_CFG_ADMIT_POLICY_STADEF},
				654	{WNI_CFG_ADMIT_BWFACTOR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	655	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	656	WNI_CFG_ADMIT_BWFACTOR_STAMIN,
				657	WNI_CFG_ADMIT_BWFACTOR_STAMAX,
				658	WNI_CFG_ADMIT_BWFACTOR_STADEF},
				659	{WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	660	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	661	WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STAMIN,
				662	WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STAMAX,
				663	WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STADEF},
				664	{WNI_CFG_CHANNEL_BONDING_MODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	665	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	666	WNI_CFG_CHANNEL_BONDING_MODE_STAMIN,
				667	WNI_CFG_CHANNEL_BONDING_MODE_STAMAX,
				668	WNI_CFG_CHANNEL_BONDING_MODE_STADEF},
				669	{WNI_CFG_CB_SECONDARY_CHANNEL_STATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	670	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	671	WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STAMIN,
				672	WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STAMAX,
				673	WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STADEF},
				674	{WNI_CFG_DYNAMIC_THRESHOLD_ZERO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	675	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	676	WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMIN,
				677	WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMAX,
				678	WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STADEF},
				679	{WNI_CFG_DYNAMIC_THRESHOLD_ONE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	680	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	681	WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMIN,
				682	WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMAX,
				683	WNI_CFG_DYNAMIC_THRESHOLD_ONE_STADEF},
				684	{WNI_CFG_DYNAMIC_THRESHOLD_TWO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	685	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	686	WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMIN,
				687	WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMAX,
				688	WNI_CFG_DYNAMIC_THRESHOLD_TWO_STADEF},
				689	{WNI_CFG_TRIG_STA_BK_SCAN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	690	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	691	WNI_CFG_TRIG_STA_BK_SCAN_STAMIN,
				692	WNI_CFG_TRIG_STA_BK_SCAN_STAMAX,
				693	WNI_CFG_TRIG_STA_BK_SCAN_STADEF},
				694	{WNI_CFG_DYNAMIC_PROFILE_SWITCHING,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	695	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	696	WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STAMIN,
				697	WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STAMAX,
				698	WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STADEF},
				699	{WNI_CFG_SCAN_CONTROL_LIST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	700	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	701	0, 0, 0},
				702	{WNI_CFG_MIMO_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	703	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RELOAD,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	704	WNI_CFG_MIMO_ENABLED_STAMIN,
				705	WNI_CFG_MIMO_ENABLED_STAMAX,
				706	WNI_CFG_MIMO_ENABLED_STADEF},
				707	{WNI_CFG_BLOCK_ACK_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	708	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	709	WNI_CFG_BLOCK_ACK_ENABLED_STAMIN,
				710	WNI_CFG_BLOCK_ACK_ENABLED_STAMAX,
				711	WNI_CFG_BLOCK_ACK_ENABLED_STADEF},
				712	{WNI_CFG_BA_ACTIVITY_CHECK_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	713	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	714	WNI_CFG_BA_ACTIVITY_CHECK_TIMEOUT_STAMIN,
				715	WNI_CFG_BA_ACTIVITY_CHECK_TIMEOUT_STAMAX,
				716	WNI_CFG_BA_ACTIVITY_CHECK_TIMEOUT_STADEF},
				717	{WNI_CFG_HT_RX_STBC,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	718	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	719	WNI_CFG_HT_RX_STBC_STAMIN,
				720	WNI_CFG_HT_RX_STBC_STAMAX,
				721	WNI_CFG_HT_RX_STBC_STADEF},
				722	{WNI_CFG_HT_CAP_INFO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	723	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	724	WNI_CFG_HT_CAP_INFO_STAMIN,
				725	WNI_CFG_HT_CAP_INFO_STAMAX,
				726	WNI_CFG_HT_CAP_INFO_STADEF},
				727	{WNI_CFG_HT_AMPDU_PARAMS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	728	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	729	WNI_CFG_HT_AMPDU_PARAMS_STAMIN,
				730	WNI_CFG_HT_AMPDU_PARAMS_STAMAX,
				731	WNI_CFG_HT_AMPDU_PARAMS_STADEF},
				732	{WNI_CFG_SUPPORTED_MCS_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	733	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_SAVE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	734	0, 0, 0},
				735	{WNI_CFG_EXT_HT_CAP_INFO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	736	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_SAVE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	737	WNI_CFG_EXT_HT_CAP_INFO_STAMIN,
				738	WNI_CFG_EXT_HT_CAP_INFO_STAMAX,
				739	WNI_CFG_EXT_HT_CAP_INFO_STADEF},
				740	{WNI_CFG_TX_BF_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	741	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	742	WNI_CFG_TX_BF_CAP_STAMIN,
				743	4294967295u,
				744	WNI_CFG_TX_BF_CAP_STADEF},
				745	{WNI_CFG_AS_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	746	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_SAVE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	747	WNI_CFG_AS_CAP_STAMIN,
				748	WNI_CFG_AS_CAP_STAMAX,
				749	WNI_CFG_AS_CAP_STADEF},
				750	{WNI_CFG_HT_INFO_FIELD1,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	751	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	752	WNI_CFG_HT_INFO_FIELD1_STAMIN,
				753	WNI_CFG_HT_INFO_FIELD1_STAMAX,
				754	WNI_CFG_HT_INFO_FIELD1_STADEF},
				755	{WNI_CFG_HT_INFO_FIELD2,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	756	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_SAVE \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	757	WNI_CFG_HT_INFO_FIELD2_STAMIN,
				758	WNI_CFG_HT_INFO_FIELD2_STAMAX,
				759	WNI_CFG_HT_INFO_FIELD2_STADEF},
				760	{WNI_CFG_HT_INFO_FIELD3,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	761	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_SAVE \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	762	WNI_CFG_HT_INFO_FIELD3_STAMIN,
				763	WNI_CFG_HT_INFO_FIELD3_STAMAX,
				764	WNI_CFG_HT_INFO_FIELD3_STADEF},
				765	{WNI_CFG_BASIC_MCS_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	766	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_SAVE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	767	0, 0, 0},
				768	{WNI_CFG_CURRENT_MCS_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	769	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_SAVE \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	770	0, 0, 0},
				771	{WNI_CFG_GREENFIELD_CAPABILITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	772	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	773	WNI_CFG_GREENFIELD_CAPABILITY_STAMIN,
				774	WNI_CFG_GREENFIELD_CAPABILITY_STAMAX,
				775	WNI_CFG_GREENFIELD_CAPABILITY_STADEF},
				776	{WNI_CFG_VHT_MAX_MPDU_LENGTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	777	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	778	WNI_CFG_VHT_MAX_MPDU_LENGTH_STAMIN,
				779	WNI_CFG_VHT_MAX_MPDU_LENGTH_STAMAX,
				780	WNI_CFG_VHT_MAX_MPDU_LENGTH_STADEF},
				781	{WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	782	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	783	WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STAMIN,
				784	WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STAMAX,
				785	WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STADEF},
				786	{WNI_CFG_VHT_LDPC_CODING_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	787	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	788	WNI_CFG_VHT_LDPC_CODING_CAP_STAMIN,
				789	WNI_CFG_VHT_LDPC_CODING_CAP_STAMAX,
				790	WNI_CFG_VHT_LDPC_CODING_CAP_STADEF},
				791	{WNI_CFG_VHT_SHORT_GI_80MHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	792	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	793	WNI_CFG_VHT_SHORT_GI_80MHZ_STAMIN,
				794	WNI_CFG_VHT_SHORT_GI_80MHZ_STAMAX,
				795	WNI_CFG_VHT_SHORT_GI_80MHZ_STADEF},
				796	{WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	797	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	798	WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STAMIN,
				799	WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STAMAX,
				800	WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STADEF},
				801	{WNI_CFG_VHT_TXSTBC,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	802	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	803	WNI_CFG_VHT_TXSTBC_STAMIN,
				804	WNI_CFG_VHT_TXSTBC_STAMAX,
				805	WNI_CFG_VHT_TXSTBC_STADEF},
				806	{WNI_CFG_VHT_RXSTBC,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	807	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	808	WNI_CFG_VHT_RXSTBC_STAMIN,
				809	WNI_CFG_VHT_RXSTBC_STAMAX,
				810	WNI_CFG_VHT_RXSTBC_STADEF},
				811	{WNI_CFG_VHT_SU_BEAMFORMER_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	812	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	813	WNI_CFG_VHT_SU_BEAMFORMER_CAP_STAMIN,
				814	WNI_CFG_VHT_SU_BEAMFORMER_CAP_STAMAX,
				815	WNI_CFG_VHT_SU_BEAMFORMER_CAP_STADEF},
				816	{WNI_CFG_VHT_SU_BEAMFORMEE_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	817	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	818	WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STAMIN,
				819	WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STAMAX,
				820	WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STADEF},
				821	{WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	822	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	823	WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STAMIN,
				824	WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STAMAX,
				825	WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STADEF},
				826	{WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	827	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	828	WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STAMIN,
				829	WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STAMAX,
				830	WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STADEF},
				831	{WNI_CFG_VHT_MU_BEAMFORMER_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	832	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	833	WNI_CFG_VHT_MU_BEAMFORMER_CAP_STAMIN,
				834	WNI_CFG_VHT_MU_BEAMFORMER_CAP_STAMAX,
				835	WNI_CFG_VHT_MU_BEAMFORMER_CAP_STADEF},
				836	{WNI_CFG_VHT_MU_BEAMFORMEE_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	837	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	838	WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STAMIN,
				839	WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STAMAX,
				840	WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STADEF},
				841	{WNI_CFG_VHT_TXOP_PS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	842	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	843	WNI_CFG_VHT_TXOP_PS_STAMIN,
				844	WNI_CFG_VHT_TXOP_PS_STAMAX,
				845	WNI_CFG_VHT_TXOP_PS_STADEF},
				846	{WNI_CFG_VHT_HTC_VHTC_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	847	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	848	WNI_CFG_VHT_HTC_VHTC_CAP_STAMIN,
				849	WNI_CFG_VHT_HTC_VHTC_CAP_STAMAX,
				850	WNI_CFG_VHT_HTC_VHTC_CAP_STADEF},
				851	{WNI_CFG_VHT_AMPDU_LEN_EXPONENT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	852	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	853	WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STAMIN,
				854	WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STAMAX,
				855	WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STADEF},
				856	{WNI_CFG_VHT_LINK_ADAPTATION_CAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	857	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	858	WNI_CFG_VHT_LINK_ADAPTATION_CAP_STAMIN,
				859	WNI_CFG_VHT_LINK_ADAPTATION_CAP_STAMAX,
				860	WNI_CFG_VHT_LINK_ADAPTATION_CAP_STADEF},
				861	{WNI_CFG_VHT_RX_ANT_PATTERN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	862	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	863	WNI_CFG_VHT_RX_ANT_PATTERN_STAMIN,
				864	WNI_CFG_VHT_RX_ANT_PATTERN_STAMAX,
				865	WNI_CFG_VHT_RX_ANT_PATTERN_STADEF},
				866	{WNI_CFG_VHT_TX_ANT_PATTERN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	867	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	868	WNI_CFG_VHT_TX_ANT_PATTERN_STAMIN,
				869	WNI_CFG_VHT_TX_ANT_PATTERN_STAMAX,
				870	WNI_CFG_VHT_TX_ANT_PATTERN_STADEF},
				871	{WNI_CFG_VHT_RX_MCS_MAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	872	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	873	WNI_CFG_VHT_RX_MCS_MAP_STAMIN,
				874	WNI_CFG_VHT_RX_MCS_MAP_STAMAX,
				875	WNI_CFG_VHT_RX_MCS_MAP_STADEF},
				876	{WNI_CFG_VHT_TX_MCS_MAP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	877	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	878	WNI_CFG_VHT_TX_MCS_MAP_STAMIN,
				879	WNI_CFG_VHT_TX_MCS_MAP_STAMAX,
				880	WNI_CFG_VHT_TX_MCS_MAP_STADEF},
				881	{WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	882	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	883	WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STAMIN,
				884	WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STAMAX,
				885	WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STADEF},
				886	{WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	887	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	888	WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STAMIN,
				889	WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STAMAX,
				890	WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STADEF},
				891	{WNI_CFG_VHT_CHANNEL_WIDTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	892	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	893	WNI_CFG_VHT_CHANNEL_WIDTH_STAMIN,
				894	WNI_CFG_VHT_CHANNEL_WIDTH_STAMAX,
				895	WNI_CFG_VHT_CHANNEL_WIDTH_STADEF},
				896	{WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	897	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	898	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STAMIN,
				899	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STAMAX,
				900	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STADEF},
				901	{WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	902	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	903	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STAMIN,
				904	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STAMAX,
				905	WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STADEF},
				906	{WNI_CFG_VHT_BASIC_MCS_SET,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	907	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	908	WNI_CFG_VHT_BASIC_MCS_SET_STAMIN,
				909	WNI_CFG_VHT_BASIC_MCS_SET_STAMAX,
				910	WNI_CFG_VHT_BASIC_MCS_SET_STADEF},
				911	{WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	912	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	913	WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STAMIN,
				914	WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STAMAX,
				915	WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STADEF},
				916	{WNI_CFG_VHT_SS_UNDER_UTIL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	917	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	918	WNI_CFG_VHT_SS_UNDER_UTIL_STAMIN,
				919	WNI_CFG_VHT_SS_UNDER_UTIL_STAMAX,
				920	WNI_CFG_VHT_SS_UNDER_UTIL_STADEF},
				921	{WNI_CFG_VHT_40MHZ_UTILIZATION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	922	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	923	WNI_CFG_VHT_40MHZ_UTILIZATION_STAMIN,
				924	WNI_CFG_VHT_40MHZ_UTILIZATION_STAMAX,
				925	WNI_CFG_VHT_40MHZ_UTILIZATION_STADEF},
				926	{WNI_CFG_VHT_80MHZ_UTILIZATION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	927	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	928	WNI_CFG_VHT_80MHZ_UTILIZATION_STAMIN,
				929	WNI_CFG_VHT_80MHZ_UTILIZATION_STAMAX,
				930	WNI_CFG_VHT_80MHZ_UTILIZATION_STADEF},
				931	{WNI_CFG_VHT_160MHZ_UTILIZATION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	932	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	933	WNI_CFG_VHT_80MHZ_UTILIZATION_STADEF,
				934	WNI_CFG_VHT_160MHZ_UTILIZATION_STAMAX,
				935	WNI_CFG_VHT_160MHZ_UTILIZATION_STADEF},
				936	{WNI_CFG_MAX_AMSDU_LENGTH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	937	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	938	WNI_CFG_MAX_AMSDU_LENGTH_STAMIN,
				939	WNI_CFG_MAX_AMSDU_LENGTH_STAMAX,
				940	WNI_CFG_MAX_AMSDU_LENGTH_STADEF},
				941	{WNI_CFG_MPDU_DENSITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	942	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	943	WNI_CFG_MPDU_DENSITY_STAMIN,
				944	WNI_CFG_MPDU_DENSITY_STAMAX,
				945	WNI_CFG_MPDU_DENSITY_STADEF},
				946	{WNI_CFG_NUM_BUFF_ADVERT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	947	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	948	WNI_CFG_NUM_BUFF_ADVERT_STAMIN,
				949	WNI_CFG_NUM_BUFF_ADVERT_STAMAX,
				950	WNI_CFG_NUM_BUFF_ADVERT_STADEF},
				951	{WNI_CFG_MAX_RX_AMPDU_FACTOR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	952	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	953	WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMIN,
				954	WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMAX,
				955	WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMAX},
				956	{WNI_CFG_SHORT_GI_20MHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	957	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	958	WNI_CFG_SHORT_GI_20MHZ_STAMIN,
				959	WNI_CFG_SHORT_GI_20MHZ_STAMAX,
				960	WNI_CFG_SHORT_GI_20MHZ_STADEF},
				961	{WNI_CFG_SHORT_GI_40MHZ,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	962	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	963	WNI_CFG_SHORT_GI_40MHZ_STAMIN,
				964	WNI_CFG_SHORT_GI_40MHZ_STAMAX,
				965	WNI_CFG_SHORT_GI_40MHZ_STADEF},
				966	{WNI_CFG_RIFS_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	967	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	968	WNI_CFG_RIFS_ENABLED_STAMIN,
				969	WNI_CFG_RIFS_ENABLED_STAMAX,
				970	WNI_CFG_RIFS_ENABLED_STADEF},
				971	{WNI_CFG_MAX_PS_POLL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	972	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	973	WNI_CFG_MAX_PS_POLL_STAMIN,
				974	WNI_CFG_MAX_PS_POLL_STAMAX,
				975	WNI_CFG_MAX_PS_POLL_STADEF},
				976	{WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	977	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	978	WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STAMIN,
				979	WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STAMAX,
				980	WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STADEF},
				981	{WNI_CFG_RSSI_FILTER_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	982	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	983	WNI_CFG_RSSI_FILTER_PERIOD_STAMIN,
				984	WNI_CFG_RSSI_FILTER_PERIOD_STAMAX,
				985	WNI_CFG_RSSI_FILTER_PERIOD_STADEF},
				986	{WNI_CFG_MIN_RSSI_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	987	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	988	WNI_CFG_MIN_RSSI_THRESHOLD_STAMIN,
				989	WNI_CFG_MIN_RSSI_THRESHOLD_STAMAX,
				990	WNI_CFG_MIN_RSSI_THRESHOLD_STADEF},
				991	{WNI_CFG_NTH_BEACON_FILTER,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	992	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	993	WNI_CFG_NTH_BEACON_FILTER_STAMIN,
				994	WNI_CFG_NTH_BEACON_FILTER_STAMAX,
				995	WNI_CFG_NTH_BEACON_FILTER_STADEF},
				996	{WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	997	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	998	WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STAMIN,
				999	WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STAMAX,
				1000	WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STADEF},
				1001	{WNI_CFG_SCAN_IN_POWERSAVE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1002	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1003	WNI_CFG_SCAN_IN_POWERSAVE_STAMIN,
				1004	WNI_CFG_SCAN_IN_POWERSAVE_STAMAX,
				1005	WNI_CFG_SCAN_IN_POWERSAVE_STADEF},
				1006	{WNI_CFG_IGNORE_DTIM,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1007	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1008	WNI_CFG_IGNORE_DTIM_STAMIN,
				1009	WNI_CFG_IGNORE_DTIM_STAMAX,
				1010	WNI_CFG_IGNORE_DTIM_STADEF},
				1011	{WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1012	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1013	WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STAMIN,
				1014	WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STAMAX,
				1015	WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STADEF},
				1016	{WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1017	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1018	WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STAMIN,
				1019	WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STAMAX,
				1020	WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STADEF},
				1021	{WNI_CFG_WOWLAN_DEAUTH_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1022	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1023	WNI_CFG_WOWLAN_DEAUTH_ENABLE_STAMIN,
				1024	WNI_CFG_WOWLAN_DEAUTH_ENABLE_STAMAX,
				1025	WNI_CFG_WOWLAN_DEAUTH_ENABLE_STADEF},
				1026	{WNI_CFG_WOWLAN_DISASSOC_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1027	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1028	WNI_CFG_WOWLAN_DISASSOC_ENABLE_STAMIN,
				1029	WNI_CFG_WOWLAN_DISASSOC_ENABLE_STAMAX,
				1030	WNI_CFG_WOWLAN_DISASSOC_ENABLE_STADEF},
				1031	{WNI_CFG_WOWLAN_MAX_MISSED_BEACON,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1032	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1033	WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STAMIN,
				1034	WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STAMAX,
				1035	WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STADEF},
				1036	{WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1037	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1038	WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STAMIN,
				1039	WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STAMAX,
				1040	WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STADEF},
				1041	{WNI_CFG_BA_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1042	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1043	WNI_CFG_BA_TIMEOUT_STAMIN,
				1044	WNI_CFG_BA_TIMEOUT_STAMAX,
				1045	WNI_CFG_BA_TIMEOUT_STADEF},
				1046	{WNI_CFG_BA_THRESHOLD_HIGH,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1047	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1048	WNI_CFG_BA_THRESHOLD_HIGH_STAMIN,
				1049	WNI_CFG_BA_THRESHOLD_HIGH_STAMAX,
				1050	WNI_CFG_BA_THRESHOLD_HIGH_STADEF},
				1051	{WNI_CFG_MAX_BA_BUFFERS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1052	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1053	WNI_CFG_MAX_BA_BUFFERS_STAMIN,
				1054	WNI_CFG_MAX_BA_BUFFERS_STAMAX,
				1055	WNI_CFG_MAX_BA_BUFFERS_STADEF},
				1056	{WNI_CFG_MAX_BA_SESSIONS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1057	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1058	WNI_CFG_MAX_BA_SESSIONS_STAMIN,
				1059	WNI_CFG_MAX_BA_SESSIONS_STAMAX,
				1060	WNI_CFG_MAX_BA_SESSIONS_STADEF},
				1061	{WNI_CFG_BA_AUTO_SETUP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1062	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1063	WNI_CFG_BA_AUTO_SETUP_STAMIN,
				1064	WNI_CFG_BA_AUTO_SETUP_STAMAX,
				1065	WNI_CFG_BA_AUTO_SETUP_STADEF},
				1066	{WNI_CFG_ADDBA_REQ_DECLINE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1067	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1068	WNI_CFG_ADDBA_REQ_DECLINE_STAMIN,
				1069	WNI_CFG_ADDBA_REQ_DECLINE_STAMAX,
				1070	WNI_CFG_ADDBA_REQ_DECLINE_STADEF},
c_hpothu	3ba2a51	2014-08-06 14:02:54 +0530	[diff] [blame]	1071	{WNI_CFG_DEL_ALL_RX_TX_BA_SESSIONS_2_4_G_BTC,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1072	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
c_hpothu	3ba2a51	2014-08-06 14:02:54 +0530	[diff] [blame]	1073	WNI_CFG_DEL_ALL_RX_TX_BA_SESSIONS_2_4_G_BTC_STAMIN,
				1074	WNI_CFG_DEL_ALL_RX_TX_BA_SESSIONS_2_4_G_BTC_STAMAX,
				1075	WNI_CFG_DEL_ALL_RX_TX_BA_SESSIONS_2_4_G_BTC_STADEF},
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1076	{WNI_CFG_BG_SCAN_CHANNEL_LIST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1077	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1078	0, 0, 0},
				1079	{WNI_CFG_MAX_MEDIUM_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1080	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1081	WNI_CFG_MAX_MEDIUM_TIME_STAMIN,
				1082	WNI_CFG_MAX_MEDIUM_TIME_STAMAX,
				1083	WNI_CFG_MAX_MEDIUM_TIME_STADEF},
				1084	{WNI_CFG_MAX_MPDUS_IN_AMPDU,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1085	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1086	WNI_CFG_MAX_MPDUS_IN_AMPDU_STAMIN,
				1087	WNI_CFG_MAX_MPDUS_IN_AMPDU_STAMAX,
				1088	WNI_CFG_MAX_MPDUS_IN_AMPDU_STADEF},
				1089	{WNI_CFG_IBSS_AUTO_BSSID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1090	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1091	WNI_CFG_IBSS_AUTO_BSSID_STAMIN,
				1092	WNI_CFG_IBSS_AUTO_BSSID_STAMAX,
				1093	WNI_CFG_IBSS_AUTO_BSSID_STADEF},
				1094	{WNI_CFG_PROBE_REQ_ADDNIE_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1095	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1096	WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STAMIN,
				1097	WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STAMAX,
				1098	WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STADEF},
				1099	{WNI_CFG_PROBE_REQ_ADDNIE_DATA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1100	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1101	0, 0, 0},
				1102	{WNI_CFG_PROBE_RSP_ADDNIE_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1103	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1104	WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STAMIN,
				1105	WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STAMAX,
				1106	WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STADEF},
				1107	{WNI_CFG_PROBE_RSP_ADDNIE_DATA1,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1108	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1109	0, 0, 0},
				1110	{WNI_CFG_PROBE_RSP_ADDNIE_DATA2,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1111	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1112	0, 0, 0},
				1113	{WNI_CFG_PROBE_RSP_ADDNIE_DATA3,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1114	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1115	0, 0, 0},
				1116	{WNI_CFG_ASSOC_RSP_ADDNIE_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1117	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1118	WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STAMIN,
				1119	WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STAMAX,
				1120	WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STADEF},
				1121	{WNI_CFG_ASSOC_RSP_ADDNIE_DATA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1122	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1123	0, 0, 0},
				1124	{WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1125	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1126	WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STAMIN,
				1127	WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STAMAX,
				1128	WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STADEF},
				1129	{WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1130	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1131	0, 0, 0},
				1132	{WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1133	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1134	WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STAMIN,
				1135	WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STAMAX,
				1136	WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STADEF},
				1137	{WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1138	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1139	0, 0, 0},
				1140	{WNI_CFG_WPS_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1141	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1142	WNI_CFG_WPS_ENABLE_STAMIN,
				1143	WNI_CFG_WPS_ENABLE_STAMAX,
				1144	WNI_CFG_WPS_ENABLE_STADEF},
				1145	{WNI_CFG_WPS_STATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1146	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1147	WNI_CFG_WPS_STATE_STAMIN,
				1148	WNI_CFG_WPS_STATE_STAMAX,
				1149	WNI_CFG_WPS_STATE_STADEF},
				1150	{WNI_CFG_WPS_PROBE_REQ_FLAG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1151	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1152	WNI_CFG_WPS_PROBE_REQ_FLAG_STAMIN,
				1153	WNI_CFG_WPS_PROBE_REQ_FLAG_STAMAX,
				1154	WNI_CFG_WPS_PROBE_REQ_FLAG_STADEF},
				1155	{WNI_CFG_WPS_VERSION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1156	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1157	WNI_CFG_WPS_VERSION_STAMIN,
				1158	WNI_CFG_WPS_VERSION_STAMAX,
				1159	WNI_CFG_WPS_VERSION_STADEF},
				1160	{WNI_CFG_WPS_REQUEST_TYPE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1161	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1162	WNI_CFG_WPS_REQUEST_TYPE_STAMIN,
				1163	WNI_CFG_WPS_REQUEST_TYPE_STAMAX,
				1164	WNI_CFG_WPS_REQUEST_TYPE_STADEF},
				1165	{WNI_CFG_WPS_CFG_METHOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1166	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1167	WNI_CFG_WPS_CFG_METHOD_STAMIN,
				1168	4294967295u,
				1169	WNI_CFG_WPS_CFG_METHOD_STADEF},
				1170	{WNI_CFG_WPS_UUID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1171	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1172	0, 0, 0},
				1173	{WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1174	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1175	WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STAMIN,
				1176	WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STAMAX,
				1177	WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STADEF},
				1178	{WNI_CFG_WPS_PIMARY_DEVICE_OUI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1179	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1180	WNI_CFG_WPS_PIMARY_DEVICE_OUI_STAMIN,
				1181	4294967295u,
				1182	WNI_CFG_WPS_PIMARY_DEVICE_OUI_STADEF},
				1183	{WNI_CFG_WPS_DEVICE_SUB_CATEGORY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1184	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1185	WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STAMIN,
				1186	WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STAMAX,
				1187	WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STADEF},
				1188	{WNI_CFG_WPS_ASSOCIATION_STATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1189	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1190	WNI_CFG_WPS_ASSOCIATION_STATE_STAMIN,
				1191	WNI_CFG_WPS_ASSOCIATION_STATE_STAMAX,
				1192	WNI_CFG_WPS_ASSOCIATION_STATE_STADEF},
				1193	{WNI_CFG_WPS_CONFIGURATION_ERROR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1194	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1195	WNI_CFG_WPS_CONFIGURATION_ERROR_STAMIN,
				1196	WNI_CFG_WPS_CONFIGURATION_ERROR_STAMAX,
				1197	WNI_CFG_WPS_CONFIGURATION_ERROR_STADEF},
				1198	{WNI_CFG_WPS_DEVICE_PASSWORD_ID,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1199	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1200	WNI_CFG_WPS_DEVICE_PASSWORD_ID_STAMIN,
				1201	4294967295u,
				1202	WNI_CFG_WPS_DEVICE_PASSWORD_ID_STADEF},
				1203	{WNI_CFG_WPS_ASSOC_METHOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1204	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1205	WNI_CFG_WPS_ASSOC_METHOD_STAMIN,
				1206	WNI_CFG_WPS_ASSOC_METHOD_STAMAX,
				1207	WNI_CFG_WPS_ASSOC_METHOD_STADEF},
				1208	{WNI_CFG_LOW_GAIN_OVERRIDE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1209	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1210	WNI_CFG_LOW_GAIN_OVERRIDE_STAMIN,
				1211	WNI_CFG_LOW_GAIN_OVERRIDE_STAMAX,
				1212	WNI_CFG_LOW_GAIN_OVERRIDE_STADEF},
				1213	{WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1214	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1215	WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STAMIN,
				1216	WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STAMAX,
				1217	WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STADEF},
				1218	{WNI_CFG_RPE_POLLING_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1219	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1220	WNI_CFG_RPE_POLLING_THRESHOLD_STAMIN,
				1221	WNI_CFG_RPE_POLLING_THRESHOLD_STAMAX,
				1222	WNI_CFG_RPE_POLLING_THRESHOLD_STADEF},
				1223	{WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1224	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1225	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STAMIN,
				1226	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STAMAX,
				1227	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STADEF},
				1228	{WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1229	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1230	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STAMIN,
				1231	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STAMAX,
				1232	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STADEF},
				1233	{WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1234	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1235	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STAMIN,
				1236	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STAMAX,
				1237	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STADEF},
				1238	{WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1239	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1240	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STAMIN,
				1241	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STAMAX,
				1242	WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STADEF},
				1243	{WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1244	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1245	WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STAMIN,
				1246	WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STAMAX,
				1247	WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STADEF},
				1248	{WNI_CFG_SINGLE_TID_RC,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1249	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1250	WNI_CFG_SINGLE_TID_RC_STAMIN,
				1251	WNI_CFG_SINGLE_TID_RC_STAMAX,
				1252	WNI_CFG_SINGLE_TID_RC_STADEF},
				1253	{WNI_CFG_RRM_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1254	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1255	WNI_CFG_RRM_ENABLED_STAMIN,
				1256	WNI_CFG_RRM_ENABLED_STAMAX,
				1257	WNI_CFG_RRM_ENABLED_STADEF},
				1258	{WNI_CFG_RRM_OPERATING_CHAN_MAX,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1259	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1260	WNI_CFG_RRM_OPERATING_CHAN_MAX_STAMIN,
				1261	WNI_CFG_RRM_OPERATING_CHAN_MAX_STAMAX,
				1262	WNI_CFG_RRM_OPERATING_CHAN_MAX_STADEF},
				1263	{WNI_CFG_RRM_NON_OPERATING_CHAN_MAX,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1264	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1265	WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STAMIN,
				1266	WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STAMAX,
				1267	WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STADEF},
				1268	{WNI_CFG_TX_PWR_CTRL_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1269	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1270	WNI_CFG_TX_PWR_CTRL_ENABLE_STAMIN,
				1271	WNI_CFG_TX_PWR_CTRL_ENABLE_STAMAX,
				1272	WNI_CFG_TX_PWR_CTRL_ENABLE_STADEF},
				1273	{WNI_CFG_MCAST_BCAST_FILTER_SETTING,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1274	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1275	WNI_CFG_MCAST_BCAST_FILTER_SETTING_STAMIN,
				1276	WNI_CFG_MCAST_BCAST_FILTER_SETTING_STAMAX,
				1277	WNI_CFG_MCAST_BCAST_FILTER_SETTING_STADEF},
				1278	{WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1279	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1280	WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STAMIN,
				1281	WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STAMAX,
				1282	WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STADEF},
				1283	{WNI_CFG_DYNAMIC_PS_POLL_VALUE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1284	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1285	WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMIN,
				1286	WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMAX,
				1287	WNI_CFG_DYNAMIC_PS_POLL_VALUE_STADEF},
				1288	{WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1289	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1290	WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMIN,
				1291	WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMAX,
				1292	WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STADEF},
				1293	{WNI_CFG_TELE_BCN_WAKEUP_EN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1294	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1295	WNI_CFG_TELE_BCN_WAKEUP_EN_STAMIN,
				1296	WNI_CFG_TELE_BCN_WAKEUP_EN_STAMAX,
				1297	WNI_CFG_TELE_BCN_WAKEUP_EN_STADEF},
				1298	{WNI_CFG_TELE_BCN_TRANS_LI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1299	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1300	WNI_CFG_TELE_BCN_TRANS_LI_STAMIN,
				1301	WNI_CFG_TELE_BCN_TRANS_LI_STAMAX,
				1302	WNI_CFG_TELE_BCN_TRANS_LI_STADEF},
				1303	{WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1304	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1305	WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMIN,
				1306	WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMAX,
				1307	WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STADEF},
				1308	{WNI_CFG_TELE_BCN_MAX_LI,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1309	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1310	WNI_CFG_TELE_BCN_MAX_LI_STAMIN,
				1311	WNI_CFG_TELE_BCN_MAX_LI_STAMAX,
				1312	WNI_CFG_TELE_BCN_MAX_LI_STADEF},
				1313	{WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1314	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1315	WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMIN,
				1316	WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMAX,
				1317	WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STADEF},
				1318	{WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1319	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1320	WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STAMIN,
				1321	WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STAMAX,
				1322	WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STADEF},
				1323	{WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1324	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1325	WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMIN,
				1326	WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMAX,
				1327	WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STADEF},
				1328	{WNI_CFG_ASSOC_STA_LIMIT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1329	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1330	WNI_CFG_ASSOC_STA_LIMIT_STAMIN,
				1331	WNI_CFG_ASSOC_STA_LIMIT_STAMAX,
				1332	WNI_CFG_ASSOC_STA_LIMIT_STADEF},
				1333	{WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1334	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1335	WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STAMIN,
				1336	WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STAMAX,
				1337	WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STADEF},
				1338	{WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1339	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1340	WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STAMIN,
				1341	WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STAMAX,
				1342	WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STADEF},
				1343	{WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1344	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1345	WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STAMIN,
				1346	WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STAMAX,
				1347	WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STADEF},
				1348	{WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1349	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1350	WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STAMIN,
				1351	WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STAMAX,
				1352	WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STADEF},
				1353	{WNI_CFG_ENABLE_CLOSE_LOOP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1354	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1355	WNI_CFG_ENABLE_CLOSE_LOOP_STAMIN,
				1356	WNI_CFG_ENABLE_CLOSE_LOOP_STAMAX,
				1357	WNI_CFG_ENABLE_CLOSE_LOOP_STADEF},
				1358	{WNI_CFG_ENABLE_LTE_COEX,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1359	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1360	WNI_CFG_ENABLE_LTE_COEX_STAMIN,
				1361	WNI_CFG_ENABLE_LTE_COEX_STAMAX,
				1362	WNI_CFG_ENABLE_LTE_COEX_STADEF},
				1363	{WNI_CFG_AP_KEEP_ALIVE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1364	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1365	WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMIN,
				1366	WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMAX,
				1367	WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STADEF},
				1368	{WNI_CFG_GO_KEEP_ALIVE_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1369	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1370	WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMIN,
				1371	WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMAX,
				1372	WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STADEF},
				1373	{WNI_CFG_ENABLE_MC_ADDR_LIST,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1374	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1375	WNI_CFG_ENABLE_MC_ADDR_LIST_STAMIN,
				1376	WNI_CFG_ENABLE_MC_ADDR_LIST_STAMAX,
				1377	WNI_CFG_ENABLE_MC_ADDR_LIST_STADEF},
				1378	{WNI_CFG_ENABLE_UC_FILTER,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1379	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1380	WNI_CFG_ENABLE_UC_FILTER_STAMIN,
				1381	WNI_CFG_ENABLE_UC_FILTER_STAMAX,
				1382	WNI_CFG_ENABLE_UC_FILTER_STADEF},
				1383	{WNI_CFG_ENABLE_LPWR_IMG_TRANSITION,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1384	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1385	WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STAMIN,
				1386	WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STAMAX,
				1387	WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STADEF},
				1388	{WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1389	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1390	WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STAMIN,
				1391	WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STAMAX,
				1392	WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STADEF},
				1393	{WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1394	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1395	WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STAMIN,
				1396	WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STAMAX,
				1397	WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STADEF},
				1398	{WNI_CFG_AP_LINK_MONITOR_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1399	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1400	WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMIN,
				1401	WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMAX,
				1402	WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STADEF},
				1403	{WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1404	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1405	WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STAMIN,
				1406	WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STAMAX,
				1407	WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STADEF},
				1408	{WNI_CFG_TDLS_BUF_STA_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1409	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1410	WNI_CFG_TDLS_BUF_STA_ENABLED_STAMIN,
				1411	WNI_CFG_TDLS_BUF_STA_ENABLED_STAMAX,
				1412	WNI_CFG_TDLS_BUF_STA_ENABLED_STADEF},
				1413	{WNI_CFG_TDLS_PUAPSD_INACT_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1414	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1415	WNI_CFG_TDLS_PUAPSD_INACT_TIME_STAMIN,
				1416	WNI_CFG_TDLS_PUAPSD_INACT_TIME_STAMAX,
				1417	WNI_CFG_TDLS_PUAPSD_INACT_TIME_STADEF},
				1418	{WNI_CFG_TDLS_RX_FRAME_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1419	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1420	WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STAMIN,
				1421	WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STAMAX,
				1422	WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STADEF},
				1423	{WNI_CFG_ENABLE_ADAPT_RX_DRAIN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1424	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1425	WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMIN,
				1426	WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMAX,
				1427	WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STADEF},
				1428	{WNI_CFG_FLEX_CONNECT_POWER_FACTOR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1429	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1430	WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STAMIN,
				1431	WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STAMAX,
				1432	WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STADEF},
				1433	{WNI_CFG_ANTENNA_DIVESITY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1434	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1435	WNI_CFG_ANTENNA_DIVESITY_STAMIN,
				1436	WNI_CFG_ANTENNA_DIVESITY_STAMAX,
				1437	WNI_CFG_ANTENNA_DIVESITY_STADEF},
				1438	{WNI_CFG_GO_LINK_MONITOR_TIMEOUT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1439	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1440	WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMIN,
				1441	WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMAX,
				1442	WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STADEF},
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1443	{WNI_CFG_ATH_DISABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1444	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1445	WNI_CFG_ATH_DISABLE_STAMIN,
				1446	WNI_CFG_ATH_DISABLE_STAMAX,
				1447	WNI_CFG_ATH_DISABLE_STADEF},
				1448	{WNI_CFG_BTC_ACTIVE_WLAN_LEN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1449	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1450	WNI_CFG_BTC_ACTIVE_WLAN_LEN_STAMIN,
				1451	WNI_CFG_BTC_ACTIVE_WLAN_LEN_STAMAX,
				1452	WNI_CFG_BTC_ACTIVE_WLAN_LEN_STADEF},
				1453	{WNI_CFG_BTC_ACTIVE_BT_LEN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1454	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1455	WNI_CFG_BTC_ACTIVE_BT_LEN_STAMIN,
				1456	WNI_CFG_BTC_ACTIVE_BT_LEN_STAMAX,
				1457	WNI_CFG_BTC_ACTIVE_BT_LEN_STADEF},
				1458	{WNI_CFG_BTC_SAP_ACTIVE_WLAN_LEN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1459	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1460	WNI_CFG_BTC_SAP_ACTIVE_WLAN_LEN_STAMIN,
				1461	WNI_CFG_BTC_SAP_ACTIVE_WLAN_LEN_STAMAX,
				1462	WNI_CFG_BTC_SAP_ACTIVE_WLAN_LEN_STADEF},
				1463	{WNI_CFG_BTC_SAP_ACTIVE_BT_LEN,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1464	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1465	WNI_CFG_BTC_SAP_ACTIVE_BT_LEN_STAMIN,
				1466	WNI_CFG_BTC_SAP_ACTIVE_BT_LEN_STAMAX,
				1467	WNI_CFG_BTC_SAP_ACTIVE_BT_LEN_STADEF},
c_hpothu	1ad6064	2014-09-03 16:58:45 +0530	[diff] [blame]	1468	{WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1469	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
c_hpothu	1ad6064	2014-09-03 16:58:45 +0530	[diff] [blame]	1470	WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STAMIN,
				1471	4294967295u,
				1472	WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STADEF},
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1473	{WNI_CFG_ASD_PROBE_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1474	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1475	WNI_CFG_ASD_PROBE_INTERVAL_STAMIN,
				1476	WNI_CFG_ASD_PROBE_INTERVAL_STAMAX,
				1477	WNI_CFG_ASD_PROBE_INTERVAL_STADEF},
				1478	{WNI_CFG_ASD_TRIGGER_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1479	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1480	WNI_CFG_ASD_TRIGGER_THRESHOLD_STAMIN,
				1481	WNI_CFG_ASD_TRIGGER_THRESHOLD_STAMAX,
				1482	WNI_CFG_ASD_TRIGGER_THRESHOLD_STADEF},
				1483	{WNI_CFG_ASD_RTT_RSSI_HYST_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1484	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1485	WNI_CFG_ASD_RTT_RSSI_HYST_THRESHOLD_STAMIN,
				1486	WNI_CFG_ASD_RTT_RSSI_HYST_THRESHOLD_STAMAX,
				1487	WNI_CFG_ASD_RTT_RSSI_HYST_THRESHOLD_STADEF},
				1488	{WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1489	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1490	WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STAMIN,
				1491	WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STAMAX,
				1492	WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STADEF},
				1493	{WNI_CFG_BTC_CTS2S_DURING_SCO,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1494	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1495	WNI_CFG_BTC_CTS2S_DURING_SCO_STAMIN,
				1496	WNI_CFG_BTC_CTS2S_DURING_SCO_STAMAX,
				1497	WNI_CFG_BTC_CTS2S_DURING_SCO_STADEF},
				1498	{WNI_CFG_CHANNEL_BONDING_24G,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1499	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1500	WNI_CFG_CHANNEL_BONDING_24G_STAMIN,
				1501	WNI_CFG_CHANNEL_BONDING_24G_STAMAX,
				1502	WNI_CFG_CHANNEL_BONDING_24G_STADEF},
				1503	{WNI_CFG_OBSS_HT40_SCAN_PASSIVE_DWELL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1504	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1505	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_DWELL_TIME_STAMIN,
				1506	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_DWELL_TIME_STAMAX,
				1507	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_DWELL_TIME_STADEF},
				1508	{WNI_CFG_OBSS_HT40_SCAN_ACTIVE_DWELL_TIME,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1509	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1510	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_DWELL_TIME_STAMIN,
				1511	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_DWELL_TIME_STAMAX,
				1512	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_DWELL_TIME_STADEF},
				1513	{WNI_CFG_OBSS_HT40_SCAN_WIDTH_TRIGGER_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1514	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1515	WNI_CFG_OBSS_HT40_SCAN_WIDTH_TRIGGER_INTERVAL_STAMIN,
				1516	WNI_CFG_OBSS_HT40_SCAN_WIDTH_TRIGGER_INTERVAL_STAMAX,
				1517	WNI_CFG_OBSS_HT40_SCAN_WIDTH_TRIGGER_INTERVAL_STADEF},
				1518	{WNI_CFG_OBSS_HT40_SCAN_PASSIVE_TOTAL_PER_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1519	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1520	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_TOTAL_PER_CHANNEL_STAMIN,
				1521	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_TOTAL_PER_CHANNEL_STAMAX,
				1522	WNI_CFG_OBSS_HT40_SCAN_PASSIVE_TOTAL_PER_CHANNEL_STADEF},
				1523	{WNI_CFG_OBSS_HT40_SCAN_ACTIVE_TOTAL_PER_CHANNEL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1524	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1525	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_TOTAL_PER_CHANNEL_STAMIN,
				1526	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_TOTAL_PER_CHANNEL_STAMAX,
				1527	WNI_CFG_OBSS_HT40_SCAN_ACTIVE_TOTAL_PER_CHANNEL_STADEF},
				1528	{WNI_CFG_OBSS_HT40_WIDTH_CHANNEL_TRANSITION_DELAY_FACTOR,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1529	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1530	WNI_CFG_OBSS_HT40_WIDTH_CHANNEL_TRANSITION_DELAY_FACTOR_STAMIN,
				1531	WNI_CFG_OBSS_HT40_WIDTH_CHANNEL_TRANSITION_DELAY_FACTOR_STAMAX,
				1532	WNI_CFG_OBSS_HT40_WIDTH_CHANNEL_TRANSITION_DELAY_FACTOR_STADEF},
				1533	{WNI_CFG_OBSS_HT40_SCAN_ACTIVITY_THRESHOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1534	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1535	WNI_CFG_OBSS_HT40_SCAN_ACTIVITY_THRESHOLD_STAMIN,
				1536	WNI_CFG_OBSS_HT40_SCAN_ACTIVITY_THRESHOLD_STAMAX,
				1537	WNI_CFG_OBSS_HT40_SCAN_ACTIVITY_THRESHOLD_STADEF},
				1538	{WNI_CFG_TDLS_OFF_CHANNEL_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1539	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1540	WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STAMIN,
				1541	WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STAMAX,
				1542	WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STADEF},
				1543	{WNI_CFG_PMF_SA_QUERY_MAX_RETRIES,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1544	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1545	WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STAMIN,
				1546	WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STAMAX,
				1547	WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STADEF},
				1548	{WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1549	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_RESTART,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1550	WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STAMIN,
				1551	WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STAMAX,
				1552	WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STADEF},
				1553	{WNI_CFG_RA_FILTER_ENABLE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1554	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1555	WNI_CFG_RA_FILTER_ENABLE_STAMIN,
				1556	WNI_CFG_RA_FILTER_ENABLE_STAMAX,
				1557	WNI_CFG_RA_FILTER_ENABLE_STADEF},
				1558	{WNI_CFG_RA_RATE_LIMIT_INTERVAL,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1559	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1560	WNI_CFG_RA_RATE_LIMIT_INTERVAL_STAMIN,
				1561	WNI_CFG_RA_RATE_LIMIT_INTERVAL_STAMAX,
				1562	WNI_CFG_RA_RATE_LIMIT_INTERVAL_STADEF},
				1563	{WNI_CFG_BTC_FATAL_HID_NSNIFF_BLK_GUIDANCE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1564	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1565	WNI_CFG_BTC_FATAL_HID_NSNIFF_BLK_GUIDANCE_STAMIN,
				1566	WNI_CFG_BTC_FATAL_HID_NSNIFF_BLK_GUIDANCE_STAMAX,
				1567	WNI_CFG_BTC_FATAL_HID_NSNIFF_BLK_GUIDANCE_STADEF},
				1568	{WNI_CFG_BTC_CRITICAL_HID_NSNIFF_BLK_GUIDANCE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1569	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1570	WNI_CFG_BTC_CRITICAL_HID_NSNIFF_BLK_GUIDANCE_STAMIN,
				1571	WNI_CFG_BTC_CRITICAL_HID_NSNIFF_BLK_GUIDANCE_STAMAX,
				1572	WNI_CFG_BTC_CRITICAL_HID_NSNIFF_BLK_GUIDANCE_STADEF},
				1573	{WNI_CFG_BTC_DYN_A2DP_TX_QUEUE_THOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1574	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1575	WNI_CFG_BTC_DYN_A2DP_TX_QUEUE_THOLD_STAMIN,
				1576	WNI_CFG_BTC_DYN_A2DP_TX_QUEUE_THOLD_STAMAX,
				1577	WNI_CFG_BTC_DYN_A2DP_TX_QUEUE_THOLD_STADEF},
				1578	{WNI_CFG_BTC_DYN_OPP_TX_QUEUE_THOLD,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1579	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1580	WNI_CFG_BTC_DYN_OPP_TX_QUEUE_THOLD_STAMIN,
				1581	WNI_CFG_BTC_DYN_OPP_TX_QUEUE_THOLD_STAMAX,
				1582	WNI_CFG_BTC_DYN_OPP_TX_QUEUE_THOLD_STADEF},
				1583	{WNI_CFG_TDLS_WMM_MODE_ENABLED,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1584	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_LIM,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1585	WNI_CFG_TDLS_WMM_MODE_ENABLED_STAMIN,
				1586	WNI_CFG_TDLS_WMM_MODE_ENABLED_STAMAX,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1587	WNI_CFG_TDLS_WMM_MODE_ENABLED_STADEF},
				1588
				1589
				1590	{WNI_CFG_MAX_UAPSD_CONSEC_SP,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1591	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1592	WNI_CFG_MAX_UAPSD_CONSEC_SP_STAMIN,
				1593	WNI_CFG_MAX_UAPSD_CONSEC_SP_STAMAX,
				1594	WNI_CFG_MAX_UAPSD_CONSEC_SP_STADEF},
				1595	{WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1596	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1597	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_STAMIN,
				1598	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_STAMAX,
				1599	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_STADEF},
				1600	{WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1601	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1602	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_STAMIN,
				1603	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_STAMAX,
				1604	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_STADEF},
				1605	{WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_MEAS_WINDOW,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1606	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1607	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_MEAS_WINDOW_STAMIN,
				1608	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_MEAS_WINDOW_STAMAX,
				1609	WNI_CFG_MAX_UAPSD_CONSEC_TX_CNT_MEAS_WINDOW_STADEF},
				1610	{WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_MEAS_WINDOW,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1611	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1612	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_MEAS_WINDOW_STAMIN,
				1613	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_MEAS_WINDOW_STAMAX,
				1614	WNI_CFG_MAX_UAPSD_CONSEC_RX_CNT_MEAS_WINDOW_STADEF},
				1615	{WNI_CFG_MAX_PSPOLL_IN_WMM_UAPSD_PS_MODE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1616	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1617	WNI_CFG_MAX_PSPOLL_IN_WMM_UAPSD_PS_MODE_STAMIN,
				1618	WNI_CFG_MAX_PSPOLL_IN_WMM_UAPSD_PS_MODE_STAMAX,
				1619	WNI_CFG_MAX_PSPOLL_IN_WMM_UAPSD_PS_MODE_STADEF},
				1620	{WNI_CFG_MAX_UAPSD_INACTIVITY_INTERVALS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1621	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1622	WNI_CFG_MAX_UAPSD_INACTIVITY_INTERVALS_STAMIN,
				1623	WNI_CFG_MAX_UAPSD_INACTIVITY_INTERVALS_STAMAX,
				1624	WNI_CFG_MAX_UAPSD_INACTIVITY_INTERVALS_STADEF},
				1625	{WNI_CFG_ENABLE_DYNAMIC_WMMPS,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1626	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Mihir Shete	c34258c	2014-07-30 17:50:27 +0530	[diff] [blame]	1627	WNI_CFG_ENABLE_DYNAMIC_WMMPS_STAMIN,
				1628	WNI_CFG_ENABLE_DYNAMIC_WMMPS_STAMAX,
				1629	WNI_CFG_ENABLE_DYNAMIC_WMMPS_STADEF},
c_hpothu	03d961b	2014-09-19 16:45:00 +0530	[diff] [blame]	1630	{WNI_CFG_BURST_MODE_BE_TXOP_VALUE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1631	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
c_hpothu	03d961b	2014-09-19 16:45:00 +0530	[diff] [blame]	1632	WNI_CFG_BURST_MODE_BE_TXOP_VALUE_STAMIN,
				1633	WNI_CFG_BURST_MODE_BE_TXOP_VALUE_STAMAX,
				1634	WNI_CFG_BURST_MODE_BE_TXOP_VALUE_STADEF},
Deepthi Gowri	9025aa6	2014-11-07 19:45:36 +0530	[diff] [blame]	1635	{WNI_CFG_ENABLE_DYNAMIC_RA_START_RATE,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1636	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Deepthi Gowri	9025aa6	2014-11-07 19:45:36 +0530	[diff] [blame]	1637	WNI_CFG_ENABLE_DYNAMIC_RA_START_RATE_STAMIN,
				1638	WNI_CFG_ENABLE_DYNAMIC_RA_START_RATE_STAMAX,
				1639	WNI_CFG_ENABLE_DYNAMIC_RA_START_RATE_STADEF},
Naresh Jayaram	f5bbe3f	2014-12-29 18:32:47 +0530	[diff] [blame]	1640	{WNI_CFG_BTC_FAST_WLAN_CONN_PREF,
Satyanarayana Dash	dd67de3	2015-03-03 18:02:48 +0530	[diff] [blame]	1641	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
Naresh Jayaram	f5bbe3f	2014-12-29 18:32:47 +0530	[diff] [blame]	1642	WNI_CFG_BTC_FAST_WLAN_CONN_PREF_STAMIN,
				1643	WNI_CFG_BTC_FAST_WLAN_CONN_PREF_STAMAX,
				1644	WNI_CFG_BTC_FAST_WLAN_CONN_PREF_STADEF},
jagadeesh	af2d0ce	2015-03-31 11:45:30 +0530	[diff] [blame]	1645	{WNI_CFG_ENABLE_RTSCTS_HTVHT,
				1646	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1647	WNI_CFG_ENABLE_RTSCTS_HTVHT_MIN,
				1648	WNI_CFG_ENABLE_RTSCTS_HTVHT_MAX,
				1649	WNI_CFG_ENABLE_RTSCTS_HTVHT_DEF},
Hanumantha Reddy Pothula	ee001fc	2015-05-26 15:21:53 +0530	[diff] [blame]	1650	{WNI_CFG_TOGGLE_ARP_BDRATES,
				1651	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1652	WNI_CFG_TOGGLE_ARP_BDRATES_MIN,
				1653	WNI_CFG_TOGGLE_ARP_BDRATES_MAX,
				1654	WNI_CFG_TOGGLE_ARP_BDRATES_DEF},
Sachin Ahuja	41b6190	2015-06-18 18:32:15 +0530	[diff] [blame]	1655	{WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_WLAN_LEN,
				1656	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1657	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_WLAN_LEN_MIN,
				1658	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_WLAN_LEN_MAX,
				1659	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_WLAN_LEN_DEF},
				1660	{WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_BT_LEN,
				1661	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1662	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_BT_LEN_MIN,
				1663	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_BT_LEN_MAX,
				1664	WNI_CFG_BTC_STATIC_OPP_WLAN_IDLE_BT_LEN_DEF},
Hanumantha Reddy Pothula	9a8ccab	2015-07-03 14:33:17 +0530	[diff] [blame]	1665	{WNI_CFG_LINK_FAIL_TIMEOUT,
				1666	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1667	WNI_CFG_LINK_FAIL_TIMEOUT_MIN,
				1668	WNI_CFG_LINK_FAIL_TIMEOUT_MAX,
				1669	WNI_CFG_LINK_FAIL_TIMEOUT_DEF},
				1670	{WNI_CFG_LINK_FAIL_TX_CNT,
				1671	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1672	WNI_CFG_LINK_FAIL_TX_CNT_MIN,
				1673	WNI_CFG_LINK_FAIL_TX_CNT_MAX,
				1674	WNI_CFG_LINK_FAIL_TX_CNT_DEF},
Mahesh A Saptasagar	beca12c	2015-09-07 16:21:06 +0530	[diff] [blame]	1675	{WNI_CFG_OPTIMIZE_CA_EVENT,
				1676	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1677	WNI_CFG_OPTIMIZE_CA_EVENT_DISABLE,
				1678	WNI_CFG_OPTIMIZE_CA_EVENT_ENABLE,
				1679	WNI_CFG_OPTIMIZE_CA_EVENT_DEFAULT},
Hanumantha Reddy Pothula	802d31d	2015-09-29 17:39:11 +0530	[diff] [blame]	1680	{WNI_CFG_ACTIVE_PASSIVE_CON,
				1681	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1682	WNI_CFG_ACTIVE_PASSIVE_CON_MIN,
				1683	WNI_CFG_ACTIVE_PASSIVE_CON_MAX,
				1684	WNI_CFG_ACTIVE_PASSIVE_CON_DEF},
Padma, Santhosh Kumar	e2eb0fa	2015-08-26 13:40:47 +0530	[diff] [blame]	1685	{WNI_CFG_EXT_SCAN_CONC_MODE,
				1686	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1687	WNI_CFG_EXT_SCAN_CONC_MODE_MIN,
				1688	WNI_CFG_EXT_SCAN_CONC_MODE_MAX,
				1689	WNI_CFG_EXT_SCAN_CONC_MODE_DEF},
Hanumantha Reddy Pothula	ca1d1cc	2015-10-26 15:37:35 +0530	[diff] [blame]	1690	{WNI_CFG_ENABLE_MAC_ADDR_SPOOFING,
				1691	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1692	WNI_CFG_ENABLE_MAC_ADDR_SPOOFING_MIN,
				1693	WNI_CFG_ENABLE_MAC_ADDR_SPOOFING_MAX,
Sachin Ahuja	e9f85aa	2015-12-08 19:57:04 +0530	[diff] [blame]	1694	WNI_CFG_ENABLE_MAC_ADDR_SPOOFING_DEF},
				1695	{WNI_CFG_DISABLE_BAR_WAKE_UP_HOST,
				1696	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1697	WNI_CFG_DISABLE_BAR_WAKE_UP_HOST_MIN,
				1698	WNI_CFG_DISABLE_BAR_WAKE_UP_HOST_MAX,
				1699	WNI_CFG_DISABLE_BAR_WAKE_UP_HOST_DEF},
Manjeet Singh	3d8e094	2016-02-09 19:06:08 +0530	[diff] [blame^]	1700	{WNI_CFG_SAR_BOFFSET_SET_CORRECTION,
				1701	CFG_CTL_VALID \| CFG_CTL_RE \| CFG_CTL_WE \| CFG_CTL_INT \| CFG_CTL_NTF_HAL,
				1702	WNI_CFG_SAR_BOFFSET_SET_CORRECTION_MIN,
				1703	WNI_CFG_SAR_BOFFSET_SET_CORRECTION_MAX,
				1704	WNI_CFG_SAR_BOFFSET_SET_CORRECTION_DEFAULT},
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1705	};
				1706
				1707	tAniSirCfgStaticString cfgStaticString[CFG_MAX_STATIC_STRING] =
				1708	{
				1709
				1710	{WNI_CFG_STA_ID,
				1711	WNI_CFG_STA_ID_LEN,
				1712	6,
				1713	{0x22, 0x22, 0x44, 0x44, 0x33, 0x33}},
				1714	{WNI_CFG_SSID,
				1715	WNI_CFG_SSID_LEN,
				1716	10,
				1717	{1, 2, 3, 4, 5, 6, 7, 8, 9, 0}},
				1718	{WNI_CFG_WEP_DEFAULT_KEY_1,
				1719	WNI_CFG_WEP_DEFAULT_KEY_1_LEN,
				1720	0,
				1721	{0}},
				1722	{WNI_CFG_WEP_DEFAULT_KEY_2,
				1723	WNI_CFG_WEP_DEFAULT_KEY_2_LEN,
				1724	0,
				1725	{0}},
				1726	{WNI_CFG_WEP_DEFAULT_KEY_3,
				1727	WNI_CFG_WEP_DEFAULT_KEY_3_LEN,
				1728	0,
				1729	{0}},
				1730	{WNI_CFG_WEP_DEFAULT_KEY_4,
				1731	WNI_CFG_WEP_DEFAULT_KEY_4_LEN,
				1732	0,
				1733	{0}},
				1734	{WNI_CFG_SUPPORTED_RATES_11B,
				1735	WNI_CFG_SUPPORTED_RATES_11B_LEN,
				1736	4,
				1737	{2, 4, 11, 22}},
				1738	{WNI_CFG_SUPPORTED_RATES_11A,
				1739	WNI_CFG_SUPPORTED_RATES_11A_LEN,
				1740	8,
				1741	{12, 18, 24, 36, 48, 72, 96, 108}},
				1742	{WNI_CFG_OPERATIONAL_RATE_SET,
				1743	WNI_CFG_OPERATIONAL_RATE_SET_LEN,
				1744	0,
				1745	{0}},
				1746	{WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET,
				1747	WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET_LEN,
				1748	0,
				1749	{0}},
				1750	{WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET,
				1751	WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET_LEN,
				1752	4,
				1753	{1, 3, 5, 7}},
				1754	{WNI_CFG_BSSID,
				1755	WNI_CFG_BSSID_LEN,
				1756	6,
				1757	{0x22, 0x22, 0x11, 0x11, 0x33, 0x33}},
				1758	{WNI_CFG_VALID_CHANNEL_LIST,
				1759	WNI_CFG_VALID_CHANNEL_LIST_LEN,
				1760	55,
				1761	{36, 40, 44, 48, 52, 56, 60, 64, 1, 6, 11, 34, 38, 42, 46, 2, 3, 4, 5, 7, 8,
				1762	9, 10, 12, 13, 14, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140,
				1763	149, 151, 153, 155, 157, 159, 161, 50, 54, 58, 62, 240, 242, 244, 246, 248,
				1764	250, 252}},
				1765
				1766	{WNI_CFG_MANUFACTURER_OUI,
				1767	WNI_CFG_MANUFACTURER_OUI_LEN,
				1768	3,
				1769	{0x0, 0xa, 0xf5}},
				1770	{WNI_CFG_MANUFACTURER_NAME,
				1771	WNI_CFG_MANUFACTURER_NAME_LEN,
				1772	8,
				1773	{0x51, 0x75, 0x61, 0x6c, 0x63, 0x6f, 0x6d, 0x6d}},
				1774	{WNI_CFG_MODEL_NUMBER,
				1775	WNI_CFG_MODEL_NUMBER_LEN,
				1776	6,
				1777	{0x4d, 0x4e, 0x31, 0x32, 0x33, 0x34}},
				1778	{WNI_CFG_MODEL_NAME,
				1779	WNI_CFG_MODEL_NAME_LEN,
				1780	7,
				1781	{0x57, 0x46, 0x52, 0x34, 0x30, 0x33, 0x31}},
				1782	{WNI_CFG_MANUFACTURER_PRODUCT_NAME,
				1783	WNI_CFG_MANUFACTURER_PRODUCT_NAME_LEN,
				1784	6,
				1785	{0x31, 0x31, 0x6e, 0x2d, 0x41, 0x50}},
				1786	{WNI_CFG_MANUFACTURER_PRODUCT_VERSION,
				1787	WNI_CFG_MANUFACTURER_PRODUCT_VERSION_LEN,
				1788	6,
				1789	{0x53, 0x4e, 0x31, 0x32, 0x33, 0x34}},
				1790	{WNI_CFG_MAX_TX_POWER_2_4,
				1791	WNI_CFG_MAX_TX_POWER_2_4_LEN,
				1792	3,
				1793	{0x1, 0xe, 0x14}},
				1794	{WNI_CFG_MAX_TX_POWER_5,
				1795	WNI_CFG_MAX_TX_POWER_5_LEN,
				1796	3,
				1797	{0x24, 0x7e, 0x14}},
				1798	{WNI_CFG_AP_NODE_NAME,
				1799	WNI_CFG_AP_NODE_NAME_LEN,
				1800	0,
				1801	{0}},
				1802	{WNI_CFG_COUNTRY_CODE,
				1803	WNI_CFG_COUNTRY_CODE_LEN,
				1804	0,
				1805	{0}},
				1806	{WNI_CFG_EDCA_ANI_ACBK_LOCAL,
				1807	WNI_CFG_EDCA_ANI_ACBK_LOCAL_LEN,
				1808	17,
				1809	{0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0}},
				1810	{WNI_CFG_EDCA_ANI_ACBE_LOCAL,
				1811	WNI_CFG_EDCA_ANI_ACBE_LOCAL_LEN,
				1812	17,
				1813	{0x0, 0x2, 0x0, 0xf, 0x3, 0xff, 0x64, 0x0, 0x1f, 0x3, 0xff, 0x64, 0x0, 0xf, 0x3, 0xff, 0x64}},
				1814	{WNI_CFG_EDCA_ANI_ACVI_LOCAL,
				1815	WNI_CFG_EDCA_ANI_ACVI_LOCAL_LEN,
				1816	17,
				1817	{0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0xc8, 0x0, 0xf, 0x0, 0x1f, 0xbc, 0x0, 0x7, 0x0, 0xf, 0xc8}},
				1818	{WNI_CFG_EDCA_ANI_ACVO_LOCAL,
				1819	WNI_CFG_EDCA_ANI_ACVO_LOCAL_LEN,
				1820	17,
				1821	{0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x64, 0x0, 0x7, 0x0, 0xf, 0x66, 0x0, 0x3, 0x0, 0x7, 0x64}},
				1822	{WNI_CFG_EDCA_ANI_ACBK,
				1823	WNI_CFG_EDCA_ANI_ACBK_LEN,
				1824	17,
				1825	{0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0}},
				1826	{WNI_CFG_EDCA_ANI_ACBE,
				1827	WNI_CFG_EDCA_ANI_ACBE_LEN,
				1828	17,
				1829	{0x0, 0x2, 0x0, 0xf, 0x3, 0xff, 0x64, 0x0, 0x1f, 0x3, 0xff, 0x64, 0x0, 0xf, 0x3, 0xff, 0x64}},
				1830	{WNI_CFG_EDCA_ANI_ACVI,
				1831	WNI_CFG_EDCA_ANI_ACVI_LEN,
				1832	17,
				1833	{0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0xc8, 0x0, 0xf, 0x0, 0x1f, 0xbc, 0x0, 0x7, 0x0, 0xf, 0xc8}},
				1834	{WNI_CFG_EDCA_ANI_ACVO,
				1835	WNI_CFG_EDCA_ANI_ACVO_LEN,
				1836	17,
				1837	{0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x64, 0x0, 0x7, 0x0, 0xf, 0x66, 0x0, 0x3, 0x0, 0x7, 0x64}},
				1838	{WNI_CFG_EDCA_WME_ACBK_LOCAL,
				1839	WNI_CFG_EDCA_WME_ACBK_LOCAL_LEN,
				1840	17,
				1841	{0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0}},
				1842	{WNI_CFG_EDCA_WME_ACBE_LOCAL,
				1843	WNI_CFG_EDCA_WME_ACBE_LOCAL_LEN,
				1844	17,
				1845	{0x0, 0x3, 0x0, 0xf, 0x0, 0x3f, 0x0, 0x0, 0x1f, 0x3, 0xff,0x0, 0x0, 0xf, 0x0, 0x3f, 0x0}},
				1846	{WNI_CFG_EDCA_WME_ACVI_LOCAL,
				1847	WNI_CFG_EDCA_WME_ACVI_LOCAL_LEN,
				1848	17,
				1849	{0x0, 0x1, 0x0, 0x7, 0x0, 0xf, 0x5e, 0x0, 0x7, 0x0, 0xf, 0xbc, 0x0, 0x7, 0x0, 0xf, 0x5e}},
				1850	{WNI_CFG_EDCA_WME_ACVO_LOCAL,
				1851	WNI_CFG_EDCA_WME_ACVO_LOCAL_LEN,
				1852	17,
				1853	{0x0, 0x1, 0x0, 0x3, 0x0, 0x7, 0x2f, 0x0, 0x3, 0x0, 0x7, 0x66, 0x0, 0x3, 0x0, 0x7, 0x2f}},
				1854	{WNI_CFG_EDCA_WME_ACBK,
				1855	WNI_CFG_EDCA_WME_ACBK_LEN,
				1856	17,
				1857	{0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0}},
				1858	{WNI_CFG_EDCA_WME_ACBE,
				1859	WNI_CFG_EDCA_WME_ACBE_LEN,
				1860	17,
				1861	{0x0, 0x3, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0}},
				1862	{WNI_CFG_EDCA_WME_ACVI,
				1863	WNI_CFG_EDCA_WME_ACVI_LEN,
				1864	17,
				1865	{0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0x5e, 0x0, 0x7, 0x0, 0xf, 0xbc, 0x0, 0x7, 0x0, 0xf, 0x5e}},
				1866	{WNI_CFG_EDCA_WME_ACVO,
				1867	WNI_CFG_EDCA_WME_ACVO_LEN,
				1868	17,
				1869	{0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x2f, 0x0, 0x3, 0x0, 0x7, 0x66, 0x0, 0x3, 0x0, 0x7, 0x2f}},
				1870	{WNI_CFG_EDCA_TIT_DEMO_ACBK_LOCAL,
				1871	WNI_CFG_EDCA_TIT_DEMO_ACBK_LOCAL_LEN,
				1872	17,
				1873	{0x0, 0x7, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x1f, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1874	{WNI_CFG_EDCA_TIT_DEMO_ACBE_LOCAL,
				1875	WNI_CFG_EDCA_TIT_DEMO_ACBE_LOCAL_LEN,
				1876	17,
				1877	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x1f, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1878	{WNI_CFG_EDCA_TIT_DEMO_ACVI_LOCAL,
				1879	WNI_CFG_EDCA_TIT_DEMO_ACVI_LOCAL_LEN,
				1880	17,
				1881	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1882	{WNI_CFG_EDCA_TIT_DEMO_ACVO_LOCAL,
				1883	WNI_CFG_EDCA_TIT_DEMO_ACVO_LOCAL_LEN,
				1884	17,
				1885	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1886	{WNI_CFG_EDCA_TIT_DEMO_ACBK,
				1887	WNI_CFG_EDCA_TIT_DEMO_ACVO_LOCAL_LEN,
				1888	17,
				1889	{0x0, 0x7, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0,0x8, 0x0, 0xff, 0xc8}},
				1890	{WNI_CFG_EDCA_TIT_DEMO_ACBE,
				1891	WNI_CFG_EDCA_TIT_DEMO_ACBE_LEN,
				1892	17,
				1893	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1894	{WNI_CFG_EDCA_TIT_DEMO_ACVI,
				1895	WNI_CFG_EDCA_TIT_DEMO_ACVI_LEN,
				1896	17,
				1897	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1898	{WNI_CFG_EDCA_TIT_DEMO_ACVO,
				1899	WNI_CFG_EDCA_TIT_DEMO_ACVO_LEN,
				1900	17,
				1901	{0x0, 0x2, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8, 0x0, 0x8, 0x0, 0xff, 0xc8}},
				1902	{WNI_CFG_RADAR_CHANNEL_LIST,
				1903	WNI_CFG_RADAR_CHANNEL_LIST_LEN,
				1904	15,
				1905	{0x34, 0x38, 0x3c, 0x40, 0x64, 0x68, 0x6c, 0x70, 0x74, 0x78, 0x7c, 0x80, 0x84, 0x88, 0x8c}},
				1906	{WNI_CFG_SCAN_CONTROL_LIST,
				1907	WNI_CFG_SCAN_CONTROL_LIST_LEN,
Abhishek Singh	96df6f2	2014-09-17 10:24:11 +0530	[diff] [blame]	1908	114,
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1909	{0x1, 0x1, 0x2, 0x1, 0x3, 0x1, 0x4, 0x1, 0x5, 0x1, 0x6, 0x1, 0x7, 0x1, 0x8,
				1910	0x1, 0x9,0x1, 0xa, 0x1, 0xb, 0x1, 0xc, 0x1, 0xd, 0x1, 0xe, 0x1, 0x22, 0x1,
				1911	0x24, 0x1, 0x26, 0x1, 0x28,0x1, 0x2a, 0x1, 0x2c, 0x1, 0x2e, 0x1, 0x30, 0x1,
				1912	0x32, 0x1, 0x34, 0x0, 0x36, 0x0, 0x38, 0x0,0x3a, 0x0, 0x3c, 0x0, 0x3e, 0x0,
				1913	0x40, 0x0, 0x64, 0x0, 0x68, 0x0, 0x6c, 0x0, 0x70, 0x0, 0x74,0x0, 0x78, 0x0,
Abhishek Singh	96df6f2	2014-09-17 10:24:11 +0530	[diff] [blame]	1914	0x7c, 0x0, 0x80, 0x0, 0x84, 0x0, 0x88, 0x0, 0x8c, 0x0, 0x90, 0x0,0x95, 0x1,
				1915	0x97, 0x1, 0x99, 0x1, 0x9b, 0x1, 0x9d, 0x1, 0x9f, 0x1, 0xa1, 0x1,0xa5, 0x1,
				1916	0xf0, 0x1, 0xf2, 0x1, 0xf4, 0x1, 0xf6, 0x1, 0xf8, 0x1, 0xfa, 0x1, 0xfc, 0x1}},
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	1917	{WNI_CFG_SUPPORTED_MCS_SET,
				1918	WNI_CFG_SUPPORTED_MCS_SET_LEN,
				1919	16,
				1920	{0xff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}},
				1921	{WNI_CFG_BASIC_MCS_SET,
				1922	WNI_CFG_BASIC_MCS_SET_LEN,
				1923	16,
				1924	{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}},
				1925	{WNI_CFG_CURRENT_MCS_SET,
				1926	WNI_CFG_CURRENT_MCS_SET_LEN,
				1927	16,
				1928	{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}},
				1929	{WNI_CFG_BG_SCAN_CHANNEL_LIST,
				1930	WNI_CFG_BG_SCAN_CHANNEL_LIST_LEN,
				1931	55,
				1932	{0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c,0x40, 0x1, 0x6, 0xb, 0x22, 0x26,
				1933	0x2a, 0x2e, 0x2, 0x3, 0x4, 0x5, 0x7, 0x8, 0x9, 0xa, 0xc, 0xd, 0xe, 0x64,
				1934	0x68, 0x6c, 0x70, 0x74,0x78, 0x7c, 0x80, 0x84, 0x88, 0x8c, 0x95, 0x97,
				1935	0x99, 0x9b, 0x9d, 0x9f, 0xa1, 0x32, 0x36,0x3a, 0x3e, 0xf0, 0xf2, 0xf4,
				1936	0xf6, 0xf8, 0xfa, 0xfc}},
				1937	{WNI_CFG_PROBE_REQ_ADDNIE_DATA,
				1938	WNI_CFG_PROBE_REQ_ADDNIE_DATA_LEN,
				1939	0,
				1940	{0}},
				1941	{WNI_CFG_PROBE_RSP_ADDNIE_DATA1,
				1942	WNI_CFG_PROBE_RSP_ADDNIE_DATA1_LEN,
				1943	0,
				1944	{0}},
				1945	{WNI_CFG_PROBE_RSP_ADDNIE_DATA2,
				1946	WNI_CFG_PROBE_RSP_ADDNIE_DATA2_LEN,
				1947	0,
				1948	{0}},
				1949	{WNI_CFG_PROBE_RSP_ADDNIE_DATA3,
				1950	WNI_CFG_PROBE_RSP_ADDNIE_DATA3_LEN,
				1951	0,
				1952	{0}},
				1953	{WNI_CFG_ASSOC_RSP_ADDNIE_DATA,
				1954	WNI_CFG_ASSOC_RSP_ADDNIE_DATA_LEN,
				1955	0,
				1956	{0}},
				1957	{WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA,
				1958	WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA_LEN,
				1959	0,
				1960	{0}},
				1961	{WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA,
				1962	WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA_LEN,
				1963	0,
				1964	{0}},
				1965	{WNI_CFG_WPS_UUID,
				1966	WNI_CFG_WPS_UUID_LEN,
				1967	6,
				1968	{0xa, 0xb, 0xc, 0xd, 0xe, 0xf}}
				1969	};
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	1970
				1971	/--------------------------------------------------------------------/
				1972	/* Static function prototypes */
				1973	/--------------------------------------------------------------------/
				1974	static void ProcDnldRsp (tpAniSirGlobal, tANI_U16, tANI_U32*);
				1975	static void ProcGetReq (tpAniSirGlobal, tANI_U16, tANI_U32*);
				1976	static void ProcSetReq (tpAniSirGlobal, tANI_U16, tANI_U32*);
				1977	static void ProcSetReqNoRsp (tpAniSirGlobal, tANI_U16, tANI_U32*);
				1978
				1979	static tANI_U8 CheckParam(tpAniSirGlobal, tANI_U16, tANI_U32, tANI_U32, tANI_U32*);
				1980	static void GetStrValue(tANI_U8, tANI_U8, tANI_U32);
				1981
				1982
				1983	/--------------------------------------------------------------------/
				1984	/* Module global variables */
				1985	/--------------------------------------------------------------------/
				1986
				1987	// CFG function table
				1988	void (gCfgFunc[])(tpAniSirGlobal, tANI_U16, tANI_U32) =
				1989	{ ProcDnldRsp,
				1990	ProcGetReq,
				1991	ProcSetReq,
				1992	ProcSetReqNoRsp
				1993	};
				1994
				1995	/**---------------------------------------------------------------------
				1996	* cfgProcessMbMsg()
				1997	*
				1998	*FUNCTION:
				1999	* CFG mailbox message processing function.
				2000	*
				2001	*LOGIC:
				2002	*
				2003	*ASSUMPTIONS:
				2004	* None.
				2005	*
				2006	*NOTE:
				2007	*
				2008	* @param pMsg Message pointer
				2009	*
				2010	* @return None.
				2011	*
				2012	*/
				2013	void
				2014	cfgProcessMbMsg(tpAniSirGlobal pMac, tSirMbMsg *pMsg)
				2015	{
				2016	tANI_U16 index;
				2017	tANI_U16 len;
				2018	tANI_U32 *pParam;
				2019
				2020	// Use type[7:0] as index to function table
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2021	index = CFG_GET_FUNC_INDX(pMsg->type);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2022
				2023	if (index >= (sizeof(gCfgFunc) / sizeof(gCfgFunc[0])))
Kiran Kumar Lokere	fdf4241	2013-07-17 17:40:58 -0700	[diff] [blame]	2024	{
Kiet Lam	842c3e1	2013-11-16 22:40:57 +0530	[diff] [blame]	2025	vos_mem_free(pMsg);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2026	return;
Kiran Kumar Lokere	fdf4241	2013-07-17 17:40:58 -0700	[diff] [blame]	2027	}
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2028	len = pMsg->msgLen - WNI_CFG_MB_HDR_LEN;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2029	pParam = ((tANI_U32*)pMsg) + 1;
				2030
				2031	// Call processing function
				2032	gCfgFunc[index](pMac, len, pParam);
				2033
				2034	// Free up buffer
Bansidhar Gopalachari	0a96a38	2013-07-24 16:55:34 +0530	[diff] [blame]	2035	vos_mem_free(pMsg);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2036
				2037	} /* end cfgProcessMbMsg() */
				2038
				2039	/**---------------------------------------------------------------------
				2040	* ProcDnldRsp()
				2041	*
				2042	* FUNCTION:
				2043	* This function processes CFG_DNLD_RSP message from host.
				2044	*
				2045	* LOGIC:
				2046	*
				2047	* ASSUMPTIONS:
				2048	*
				2049	* NOTE:
				2050	*
				2051	* @param length: message length
				2052	* @param pParam: parameter list pointer
				2053	*
				2054	* @return None
				2055	*
				2056	*/
				2057	static void
				2058	ProcDnldRsp(tpAniSirGlobal pMac, tANI_U16 length, tANI_U32 *pParam)
				2059	{
				2060	tANI_S32 i;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2061
				2062	tANI_U32 expLen, retVal, bufStart, bufEnd;
				2063	tANI_U32 pSrc, pDst, *pDstEnd;
				2064	tANI_U32 strSize, j;
				2065	tANI_U8 pStr[CFG_MAX_STR_LEN];
				2066	tpCfgBinHdr pHdr;
				2067	tANI_U32 logLevel;
				2068	tSirMsgQ mmhMsg;
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2069	tANI_U32 paramList[WNI_CFG_DNLD_CNF_NUM];
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2070
				2071	// First Dword must contain the AP or STA magic dword
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2072	PELOGW(cfgLog(pMac, LOGW, FL("CFG size %d bytes MAGIC dword is 0x%x"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2073	length, sirReadU32N((tANI_U8*)pParam) );)
				2074
				2075	// if the string is not correct, return failure
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2076	if (*pParam == CFG_STA_MAGIC_DWORD) {}
				2077
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2078
				2079
				2080
				2081	else
				2082	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2083	PELOGE(cfgLog(pMac, LOGE, FL("Invalid magic dword 0x%x"),sirReadU32N((tANI_U8*)pParam) );)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2084	retVal = WNI_CFG_INVALID_LEN;
				2085	goto end;
				2086	}
				2087
				2088	pParam++;
				2089	length -= 4;
				2090
				2091	// Verify message length
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2092	{
				2093	pMac->cfg.gCfgMaxIBufSize = CFG_STA_IBUF_MAX_SIZE;
				2094	pMac->cfg.gCfgMaxSBufSize = CFG_STA_SBUF_MAX_SIZE;
				2095	}
				2096
				2097	// Parse the Cfg header
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2098	pHdr = (tpCfgBinHdr) pParam;
				2099	pParam += (sizeof(tCfgBinHdr) >> 2);
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2100	PELOGW(cfgLog(pMac, LOGW, FL("CFG hdr totParams %d intParams %d strBufSize %d/%d"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2101	pHdr->controlSize, pHdr->iBufSize, pHdr->sBufSize, pMac->cfg.gCfgMaxSBufSize);)
				2102
				2103	expLen = ((CFG_PARAM_MAX_NUM + 3 * pMac->cfg.gCfgMaxIBufSize) << 2) +
				2104	pHdr->sBufSize + sizeof(tCfgBinHdr);
				2105
				2106	if (length != expLen)
				2107	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2108	PELOGE(cfgLog(pMac, LOGE, FL("<CFG> DNLD_RSP invalid length %d (exp %d)"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2109	length, expLen);)
				2110	retVal = WNI_CFG_INVALID_LEN;
				2111	goto end;
				2112	}
				2113
				2114
				2115	if (pHdr->controlSize != CFG_PARAM_MAX_NUM)
				2116	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2117	PELOGE(cfgLog(pMac, LOGE, FL("<CFG> Total parameter count mismatch"));)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2118	retVal = WNI_CFG_INVALID_LEN;
				2119	goto end;
				2120	}
				2121
				2122	if (pHdr->iBufSize != pMac->cfg.gCfgMaxIBufSize)
				2123	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2124	PELOGE(cfgLog(pMac, LOGE, FL("<CFG> Integer parameter count mismatch"));)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2125	retVal = WNI_CFG_INVALID_LEN;
				2126	goto end;
				2127	}
				2128
				2129	// Copy control array
				2130	pDst = (tANI_U32*)pMac->cfg.gCfgEntry;
				2131	pDstEnd = pDst + CFG_PARAM_MAX_NUM;
				2132	pSrc = pParam;
				2133	while (pDst < pDstEnd)
				2134	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2135	pDst++ = pSrc++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2136	}
				2137	// Copy default values
				2138	pDst = pMac->cfg.gCfgIBuf;
				2139	pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
				2140	while (pDst < pDstEnd)
				2141	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2142	pDst++ = pSrc++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2143	}
				2144
				2145	// Copy min values
				2146	pDst = pMac->cfg.gCfgIBufMin;
				2147	pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
				2148	while (pDst < pDstEnd)
				2149	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2150	pDst++ = pSrc++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2151	}
				2152
				2153	// Copy max values
				2154	pDst = pMac->cfg.gCfgIBufMax;
				2155	pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
				2156	while (pDst < pDstEnd)
				2157	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2158	pDst++ = pSrc++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2159	}
				2160
				2161	for (i=0; i<pMac->cfg.gCfgMaxIBufSize; i++)
				2162	if (pMac->cfg.gCfgIBuf[i] < pMac->cfg.gCfgIBufMin[i] \|\|
				2163	pMac->cfg.gCfgIBuf[i] > pMac->cfg.gCfgIBufMax[i])
				2164	{
				2165	PELOGE(cfgLog(pMac, LOGE, FL("cfg id %d Invalid def value %d "
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2166	"min %d max %d"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2167	i, pMac->cfg.gCfgIBuf[i], pMac->cfg.gCfgIBufMin[i],
				2168	pMac->cfg.gCfgIBufMax[i]);)
				2169	}
				2170
				2171	// Calculate max string buffer lengths for all string parameters
				2172	bufEnd = pMac->cfg.gCfgMaxSBufSize;
				2173	for (i = CFG_PARAM_MAX_NUM - 1; i >= 0; i--)
				2174	{
				2175	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0)
				2176	continue;
				2177
				2178	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
				2179	continue;
				2180
				2181	bufStart = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
				2182	pMac->cfg.gCfgSBuf[bufStart] = (tANI_U8)(bufEnd - bufStart - 2);
				2183
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2184	PELOG1(cfgLog(pMac, LOG1, FL("id %d max %d bufStart %d bufEnd %d"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2185	i, pMac->cfg.gCfgSBuf[bufStart], bufStart, bufEnd);)
				2186
				2187	bufEnd = bufStart;
				2188	}
				2189
				2190	// Initialize string defaults
				2191	strSize = pHdr->sBufSize;
				2192	while (strSize)
				2193	{
				2194	tANI_U32 paramId, paramLen, paramLenCeil4;
				2195
				2196	if (strSize < 4)
				2197	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2198	PELOGE(cfgLog(pMac, LOGE, FL("Error parsing str defaults, rem %d bytes"), strSize);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2199	retVal = WNI_CFG_INVALID_LEN;
				2200	goto end;
				2201	}
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2202	paramId = *pSrc >> 16;
				2203	paramLen = *pSrc & 0xff;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2204	pSrc++;
				2205	strSize -= 4;
				2206
				2207	paramLenCeil4 = ((paramLen + 3) >> 2);
				2208	if (strSize < paramLenCeil4 << 2)
				2209	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2210	PELOGE(cfgLog(pMac, LOGE, FL("Error parsing str defaults, rem %d bytes"), strSize);)
				2211	PELOGE(cfgLog(pMac, LOGE, FL("param id %d len %d bytes"), paramId, paramLen);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2212	retVal = WNI_CFG_INVALID_LEN;
				2213	goto end;
				2214	}
				2215	for (j=0; j < paramLenCeil4; j++)
				2216	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2217	pStr[4j] = (tANI_U8) (pSrc >> 24) & 0xff;
				2218	pStr[4j+1] = (tANI_U8) (pSrc >> 16) & 0xff;
				2219	pStr[4j+2] = (tANI_U8) (pSrc >> 8) & 0xff;
				2220	pStr[4j+3] = (tANI_U8) (pSrc) & 0xff;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2221
				2222	pSrc++;
				2223	strSize -= 4;
				2224	}
				2225
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2226	PELOG1(cfgLog(pMac, LOG1, FL("set str id %d len %d"), paramId, paramLen);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2227
				2228	if (cfgSetStr(pMac, (tANI_U16) paramId, pStr, paramLen) != eSIR_SUCCESS)
				2229	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2230	PELOGE(cfgLog(pMac, LOGE, FL("Error setting str default param %d len %d"), paramId, paramLen);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2231	retVal = WNI_CFG_INVALID_LEN;
				2232	goto end;
				2233	}
				2234	}
				2235
				2236	// Set the default log level based on config
				2237	wlan_cfgGetInt(pMac, WNI_CFG_LOG_LEVEL, &logLevel);
				2238	for (i = 0; i < LOG_ENTRY_NUM; i++)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2239	pMac->utils.gLogEvtLevel[i] = pMac->utils.gLogDbgLevel[i] = logLevel;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2240
				2241	// Set status to READY
				2242	pMac->cfg.gCfgStatus = CFG_SUCCESS;
				2243	retVal = WNI_CFG_SUCCESS;
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2244	PELOG1(cfgLog(pMac, LOG1, "<CFG> Completed successfully");)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2245
				2246	end:
				2247
				2248	if ( retVal != WNI_CFG_SUCCESS )
				2249	pMac->cfg.gCfgStatus = CFG_FAILURE;
				2250
				2251	// Send response message to host
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2252	paramList[WNI_CFG_DNLD_CNF_RES] = retVal;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2253	cfgSendHostMsg(pMac, WNI_CFG_DNLD_CNF, WNI_CFG_DNLD_CNF_LEN,
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2254	WNI_CFG_DNLD_CNF_NUM, paramList, 0, 0);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2255
				2256	// Notify WDA that the config has downloaded
				2257	mmhMsg.type = SIR_CFG_DOWNLOAD_COMPLETE_IND;
				2258	mmhMsg.bodyptr = NULL;
				2259	mmhMsg.bodyval = 0;
				2260
Jeff Johnson	e724574	2012-09-05 17:12:55 -0700	[diff] [blame]	2261	MTRACE(macTraceMsgTx(pMac, NO_SESSION, mmhMsg.type));
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2262	if (wdaPostCtrlMsg(pMac, &mmhMsg) != eSIR_SUCCESS)
				2263	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2264	PELOGE(cfgLog(pMac, LOGE, FL("WDAPostMsgApi failed!"));)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2265	}
				2266
				2267	} /* end procDnldRsp() */
				2268
				2269
				2270	/**---------------------------------------------------------------------
				2271	* ProcGetReq()
				2272	*
				2273	* FUNCTION:
				2274	* This function processes CFG_GET_REQ message from host.
				2275	*
				2276	* LOGIC:
				2277	*
				2278	* ASSUMPTIONS:
				2279	*
				2280	* NOTE:
				2281	* For every parameter ID specified on the list, CFG will send a separate
				2282	* CFG_GET_RSP back to host.
				2283	*
				2284	* @param length: message length
				2285	* @param pParam: parameter list pointer
				2286	*
				2287	* @return None
				2288	*
				2289	*/
				2290	static void
				2291	ProcGetReq(tpAniSirGlobal pMac, tANI_U16 length, tANI_U32 *pParam)
				2292	{
				2293	tANI_U16 cfgId, i;
				2294	tANI_U32 value, valueLen, result;
				2295	tANI_U32 *pValue;
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2296	tANI_U32 paramList[WNI_CFG_GET_RSP_NUM];
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2297
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2298	PELOG1(cfgLog(pMac, LOG1, FL("Rcvd cfg get request %d bytes"), length);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2299	for (i=0; i<length/4; i++)
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2300	PELOG2(cfgLog(pMac, LOG2, FL("[%2d] 0x%08x"), i, pParam[i]);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2301
				2302	if (!pMac->cfg.gCfgStatus)
				2303	{
				2304	cfgId = (tANI_U16)sirReadU32N((tANI_U8*)pParam);
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2305	PELOGE(cfgLog(pMac, LOGE, FL("CFG not ready, param %d"), cfgId);)
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2306	paramList[WNI_CFG_GET_RSP_RES] = WNI_CFG_NOT_READY;
				2307	paramList[WNI_CFG_GET_RSP_PID] = cfgId;
				2308	paramList[WNI_CFG_GET_RSP_PLEN] = 0;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2309	cfgSendHostMsg(pMac, WNI_CFG_GET_RSP, WNI_CFG_GET_RSP_PARTIAL_LEN,
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2310	WNI_CFG_GET_RSP_NUM, paramList, 0, 0);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2311	}
				2312	else
				2313	{
				2314	// Process all parameter ID's on the list
				2315	while (length >= sizeof(tANI_U32))
				2316	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2317	cfgId = (tANI_U16)*pParam++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2318	pValue = 0;
				2319	valueLen = 0;
				2320
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2321	PELOG1(cfgLog(pMac, LOG1, FL("Cfg get param %d"), cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2322
				2323	// Check for valid parameter ID, etc...
				2324	if (CheckParam(pMac, cfgId, CFG_CTL_RE, WNI_CFG_WO_PARAM, &result))
				2325	{
				2326	if ((pMac->cfg.gCfgEntry[cfgId].control & CFG_CTL_INT) != 0)
				2327	{
				2328	// Get integer parameter
				2329	result = (wlan_cfgGetInt(pMac, cfgId, &value) == eSIR_SUCCESS ?
				2330	WNI_CFG_SUCCESS : WNI_CFG_OTHER_ERROR);
				2331	pValue = &value;
				2332	valueLen = sizeof(tANI_U32);
				2333	}
				2334	else
				2335	{
				2336	// Get string parameter
				2337	valueLen = sizeof(pMac->cfg.gSBuffer);
				2338	result = (wlan_cfgGetStr(pMac, cfgId, pMac->cfg.gSBuffer, &valueLen)
				2339	== eSIR_SUCCESS ?
				2340	WNI_CFG_SUCCESS : WNI_CFG_OTHER_ERROR);
				2341	pValue = (tANI_U32*)pMac->cfg.gSBuffer;
				2342	}
				2343	}
				2344	else
				2345	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2346	PELOGE(cfgLog(pMac, LOGE, FL("Check param failed, param %d"), cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2347	result = WNI_CFG_INVALID_LEN;
				2348	}
				2349
				2350	// Send response message to host
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2351	paramList[WNI_CFG_GET_RSP_RES] = result;
				2352	paramList[WNI_CFG_GET_RSP_PID] = cfgId;
				2353	paramList[WNI_CFG_GET_RSP_PLEN] = valueLen;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2354
				2355	// We need to round up buffer length to word-increment
				2356	valueLen = (((valueLen + 3) >> 2) << 2);
				2357	cfgSendHostMsg(pMac, WNI_CFG_GET_RSP,
				2358	WNI_CFG_GET_RSP_PARTIAL_LEN + valueLen,
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2359	WNI_CFG_GET_RSP_NUM, paramList, valueLen, pValue);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2360
				2361	// Decrement length
				2362	length -= sizeof(tANI_U32);
				2363	}
				2364	}
				2365
				2366	} /* end procGetReq() */
				2367
				2368
				2369
				2370	/**---------------------------------------------------------------------
				2371	* ProcSetReqInternal()
				2372	*
				2373	* FUNCTION:
				2374	* This function processes CFG_SET_REQ message from host.
				2375	*
				2376	* LOGIC:
				2377	*
				2378	* ASSUMPTIONS:
				2379	* - The message content is coded in TLV format.
				2380	* - For string parameter, the length field is byte accurate. However,
				2381	* the next TLV set will begin on the next word boundary.
				2382	*
				2383	* NOTE:
				2384	* - For every parameter ID specified on the list, CFG will send a separate
				2385	* CFG_SET_RSP back to host.
				2386	*
				2387	* @param length: message length
				2388	* @param pParam: parameter list pointer
				2389	* @param fRsp: whether to send response to host. TRUE means sending.
				2390	* @return None
				2391	*
				2392	*/
				2393	static void
				2394	ProcSetReqInternal(tpAniSirGlobal pMac, tANI_U16 length, tANI_U32 *pParam, tANI_BOOLEAN fRsp)
				2395	{
				2396	tANI_U16 cfgId, valueLen, valueLenRoundedUp4;
				2397	tANI_U32 value, result;
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2398	tANI_U32 paramList[WNI_CFG_SET_CNF_NUM];
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2399
Shake M Subhani	5d80fda	2013-12-09 17:28:23 +0530	[diff] [blame]	2400	PELOG1(cfgLog(pMac, LOG1, FL("Rcvd cfg set request %d bytes"), length);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2401	//for (i=0; i<length/4; i++)
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2402	// PELOG2(cfgLog(pMac, LOG2, FL("[%2d] 0x%08x"), i, pParam[i]);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2403
				2404	if (!pMac->cfg.gCfgStatus)
				2405	{
				2406	cfgId = (tANI_U16)sirReadU32N((tANI_U8*)pParam);
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2407	cfgLog(pMac, LOGW, FL("CFG not ready, param %d"), cfgId);
				2408	if (fRsp)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2409	{
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2410	paramList[WNI_CFG_SET_CNF_RES] = WNI_CFG_NOT_READY;
				2411	paramList[WNI_CFG_SET_CNF_PID] = cfgId;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2412	cfgSendHostMsg(pMac, WNI_CFG_SET_CNF, WNI_CFG_SET_CNF_LEN,
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2413	WNI_CFG_SET_CNF_NUM, paramList, 0, 0);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2414	}
				2415	}
				2416	else
				2417	{
				2418	// Process all TLVs in buffer
				2419	while (length >= (sizeof(tANI_U32) * 2))
				2420	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2421	cfgId = (tANI_U16) *pParam++;
				2422	valueLen = (tANI_U16) *pParam++;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2423	length -= (sizeof(tANI_U32) * 2);
				2424	// value length rounded up to a 4 byte multiple
				2425	valueLenRoundedUp4 = (((valueLen + 3) >> 2) << 2);
				2426
				2427	// Check for valid request before proceeding
				2428	if (CheckParam(pMac, cfgId, CFG_CTL_WE, WNI_CFG_RO_PARAM, &result))
				2429	{
				2430	PELOG1(cfgLog(pMac, LOGW, (char *) gCfgParamName[cfgId]);)
				2431	// Process integer parameter
				2432	if ((pMac->cfg.gCfgEntry[cfgId].control & CFG_CTL_INT) != 0)
				2433	{
				2434	// Set VALUE
				2435	if (valueLen != sizeof(tANI_U32))
				2436	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2437	PELOGE(cfgLog(pMac, LOGE, FL("Invalid value length %d in set param %d (tot %d)"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2438	valueLen, cfgId, length);)
				2439	result = WNI_CFG_INVALID_LEN;
				2440	}
				2441	else
				2442	{
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2443	value = *pParam;
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2444	PELOG1(cfgLog(pMac, LOGW, FL("Cfg set int %d len %d(%d) val %d"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2445	cfgId, valueLen, valueLenRoundedUp4, value);)
				2446	result = (cfgSetInt(pMac, cfgId, value) == eSIR_SUCCESS ?
				2447	WNI_CFG_SUCCESS : WNI_CFG_OTHER_ERROR);
				2448	if (result == WNI_CFG_SUCCESS)
				2449	{
				2450	if (cfgNeedRestart(pMac, cfgId))
				2451	{
				2452	result = WNI_CFG_NEED_RESTART ;
				2453	}
				2454	else
				2455	if (cfgNeedReload(pMac, cfgId))
				2456	{
				2457	result = WNI_CFG_NEED_RELOAD ;
				2458	}
				2459	}
				2460	}
				2461	}
				2462	// Process string parameter
				2463	else
				2464	{
				2465	if (valueLenRoundedUp4 > length)
				2466	{
Shake M Subhani	5d80fda	2013-12-09 17:28:23 +0530	[diff] [blame]	2467	PELOGE(cfgLog(pMac, LOGE, FL("Invalid string length %d"
				2468	"in set param %d (tot %d)"), valueLen,
				2469	cfgId, length);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2470	result = WNI_CFG_INVALID_LEN;
				2471	}
				2472	else
				2473	{
				2474	GetStrValue((tANI_U8*)pParam, pMac->cfg.gSBuffer, valueLen);
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2475	PELOG1(cfgLog(pMac, LOGW, FL("Cfg set str %d len %d(%d) bytes"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2476	cfgId, valueLen, valueLenRoundedUp4);)
				2477	result = (cfgSetStr(pMac, cfgId, pMac->cfg.gSBuffer, valueLen) == eSIR_SUCCESS ?
				2478	WNI_CFG_SUCCESS : WNI_CFG_OTHER_ERROR);
				2479	if (result == WNI_CFG_SUCCESS)
				2480	{
				2481	if (cfgNeedRestart(pMac, cfgId))
				2482	{
				2483	result = WNI_CFG_NEED_RESTART ;
				2484	}
				2485	else
				2486	if (cfgNeedReload(pMac, cfgId))
				2487	{
				2488	result = WNI_CFG_NEED_RELOAD ;
				2489	}
				2490	}
				2491	}
				2492	}
				2493	}
				2494	else
				2495	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2496	PELOGE(cfgLog(pMac, LOGE, FL("Check param failed, param %d"), cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2497	result = WNI_CFG_INVALID_LEN;
				2498	}
				2499
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2500	if (fRsp)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2501	{
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2502	/* Send confirm message to host */
				2503	paramList[WNI_CFG_SET_CNF_RES] = result;
				2504	paramList[WNI_CFG_SET_CNF_PID] = cfgId;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2505	cfgSendHostMsg(pMac, WNI_CFG_SET_CNF, WNI_CFG_SET_CNF_LEN,
Abhishek Singh	5dca33c	2015-10-05 12:37:35 +0530	[diff] [blame]	2506	WNI_CFG_SET_CNF_NUM, paramList, 0, 0);
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2507	}
				2508	else
				2509	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2510	PELOGW(cfgLog( pMac, LOG2, " CFGID %d no rsp", cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2511	}
				2512
				2513	if (valueLenRoundedUp4 > length)
				2514	length = 0;
				2515	else
				2516	{
				2517	length -= valueLenRoundedUp4;
				2518	pParam += (valueLenRoundedUp4 >> 2);
				2519	}
				2520	}
				2521	}
				2522	}
				2523
				2524
				2525
				2526	static void
				2527	ProcSetReq(tpAniSirGlobal pMac, tANI_U16 length, tANI_U32 *pParam)
				2528	{
				2529	ProcSetReqInternal( pMac, length, pParam, eANI_BOOLEAN_TRUE );
				2530	}
				2531
				2532	static void
				2533	ProcSetReqNoRsp(tpAniSirGlobal pMac, tANI_U16 length, tANI_U32 *pParam)
				2534	{
				2535	ProcSetReqInternal( pMac, length, pParam, eANI_BOOLEAN_FALSE );
				2536	}
				2537
				2538
				2539
				2540	/**---------------------------------------------------------------------
				2541	* CheckParam()
				2542	*
				2543	* FUNCTION:
				2544	* This function is called to perform various check on a parameter.
				2545	*
				2546	* LOGIC:
				2547	* - If cfgId is out of bound or parameter is not valid, result
				2548	* WNI_CFG_INVALID_PID is returned at address specified in pResult.
				2549	*
				2550	* - If specified 'flag' is not set in the parameter control entry,
				2551	* 'failedResult' is returned at address specified in pResult.
				2552	*
				2553	* ASSUMPTIONS:
				2554	* Since this function is used internally, 'pResult' is always valid.
				2555	*
				2556	* NOTE:
				2557	*
				2558	* @param None
				2559	*
				2560	* @return true: Parameter is valid and matches checked condition \n
				2561	* @return false: Parameter either is not valid or does not match
				2562	* checked condition.
				2563	*
				2564	*/
				2565	static tANI_U8
				2566	CheckParam(tpAniSirGlobal pMac, tANI_U16 cfgId, tANI_U32 flag, tANI_U32 failedResult, tANI_U32 *pResult)
				2567	{
				2568	// Check if parameter ID is out of bound
				2569	if (cfgId >= CFG_PARAM_MAX_NUM)
				2570	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2571	PELOGE(cfgLog(pMac, LOGE, FL("Invalid param id %d"), cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2572	*pResult = WNI_CFG_INVALID_PID;
				2573	}
				2574	else
				2575	{
				2576	// Check if parameter is valid
				2577	if ((pMac->cfg.gCfgEntry[cfgId].control & CFG_CTL_VALID) == 0)
				2578	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2579	PELOGE(cfgLog(pMac, LOGE, FL("Param id %d not valid"), cfgId);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2580	*pResult = WNI_CFG_INVALID_PID;
				2581	}
				2582	else
				2583	{
				2584	// Check control field against flag
				2585	if ((pMac->cfg.gCfgEntry[cfgId].control & flag) == 0)
				2586	{
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2587	PELOGE(cfgLog(pMac, LOGE, FL("Param id %d wrong permissions %x"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2588	cfgId, pMac->cfg.gCfgEntry[cfgId].control);)
				2589	*pResult = failedResult;
				2590	}
				2591	else
				2592	return(true);
				2593	}
				2594	}
				2595	return(false);
				2596
				2597	} /* cfgParamCheck() */
				2598
				2599
				2600	/**---------------------------------------------------------------------
				2601	* GetStrValue()
				2602	*
				2603	* FUNCTION:
				2604	* This function copies a string value from the specified buffer.
				2605	*
				2606	* LOGIC:
				2607	*
				2608	* ASSUMPTIONS:
				2609	*
				2610	* NOTE:
				2611	*
				2612	* @param pBuf: input data buffer
				2613	* @param pValue: address where data is returned
				2614	* @param length: number of bytes to copy
				2615	*
				2616	* @return None
				2617	*
				2618	*/
				2619	static void
				2620	GetStrValue(tANI_U8 pBuf, tANI_U8 pValue, tANI_U32 length)
				2621	{
				2622	tANI_U8 *pEnd;
				2623
				2624	pEnd = pValue + length;
				2625	while (pValue < pEnd)
				2626	pValue++ = pBuf++;
				2627	} /* end GetStrValue() */
				2628
				2629
				2630	/**---------------------------------------------------------------------
				2631	* processCfgDownloadReq()
				2632	*
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2633	* FUNCTION: This function reads the cfgStatic array and
				2634	* populates the cfg data structure.
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2635	*
				2636	* LOGIC:
				2637	*
				2638	* ASSUMPTIONS:
				2639	*
				2640	* NOTE:
				2641	*
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2642	* @param pMac: Pointer to Mac Structure
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2643	*
				2644	* @return None
				2645	*
				2646	*/
				2647
				2648	void
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2649	processCfgDownloadReq(tpAniSirGlobal pMac)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2650	{
				2651	tANI_S32 i;
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2652	tANI_U32 index;
				2653	tANI_U8 pDstTest, pSrcTest;
				2654	tANI_U8 len;
				2655	tAniSirCfgStaticString *pStrCfg;
				2656	tANI_U32 bufStart, bufEnd;
				2657	tANI_U32 logLevel, retVal;
				2658	tANI_U32 iCount = 0;
				2659	tANI_U32 sCount = 0;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2660
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2661
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2662	for (i=0; i<CFG_PARAM_MAX_NUM ;i++)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2663	{
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2664	if ((cfgStatic[i].control & CFG_CTL_VALID) != 0)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2665	{
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2666	if (!(cfgStatic[i].control & CFG_CTL_INT))
				2667	{
				2668	pStrCfg = (tAniSirCfgStaticString *)cfgStatic[i].pStrData;
				2669	if (pStrCfg == NULL)
				2670	{
				2671	PELOGE(cfgLog(pMac, LOGE, FL("pStrCfg is NULL for CfigID : %d"),
				2672	i);)
				2673	continue;
				2674	}
				2675	index = sCount & CFG_BUF_INDX_MASK;
				2676	sCount += pStrCfg->maxLen + 1 + 1;
				2677	}
				2678	else
				2679	{
				2680	index = iCount & CFG_BUF_INDX_MASK;
				2681	iCount++;
				2682	}
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2683	}
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2684	else
				2685	{
				2686	index = 0;
				2687	}
				2688	pMac->cfg.gCfgEntry[i].control = cfgStatic[i].control \| index;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2689	}
				2690
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2691	/Fill the SBUF wih maxLength/
				2692	bufEnd = pMac->cfg.gCfgMaxSBufSize;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2693	for (i = CFG_PARAM_MAX_NUM - 1; i >= 0; i--)
				2694	{
				2695	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0)
				2696	continue;
				2697
				2698	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
				2699	continue;
				2700
				2701	bufStart = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
				2702	pMac->cfg.gCfgSBuf[bufStart] = (tANI_U8)(bufEnd - bufStart - 2);
				2703
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2704	PELOG1(cfgLog(pMac, LOG1, FL("id %d max %d bufStart %d bufEnd %d"),
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2705	i, pMac->cfg.gCfgSBuf[bufStart], bufStart, bufEnd);)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2706	bufEnd = bufStart;
				2707	}
				2708
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2709	for(i=0; i<CFG_PARAM_MAX_NUM ;i++)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2710	{
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2711	index = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2712
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2713	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2714	{
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2715	pMac->cfg.gCfgIBufMin[index] = cfgStatic[i].cfgIMin;
				2716	pMac->cfg.gCfgIBufMax[index] = cfgStatic[i].cfgIMax;
				2717	pMac->cfg.gCfgIBuf[index] = cfgStatic[i].cfgIVal;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2718	}
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2719	else
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2720	{
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2721	tANI_U8 maxSavedLen;
				2722	if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
				2723	continue;
				2724	if (index >= CFG_STA_SBUF_MAX_SIZE)
				2725	continue;
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2726
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2727	pDstTest = &pMac->cfg.gCfgSBuf[index];
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2728	pStrCfg = (tAniSirCfgStaticString *)cfgStatic[i].pStrData;
				2729	pSrcTest = pStrCfg->data;
				2730	if ((pDstTest == NULL) \|\| (pStrCfg == NULL) \|\| (pSrcTest == NULL))
				2731	continue;
Sachin Ahuja	f22afd4	2014-07-31 22:47:26 +0530	[diff] [blame]	2732	maxSavedLen = *pDstTest;
Sachin Ahuja	a4b33a3	2014-06-18 13:22:00 +0530	[diff] [blame]	2733	len = pStrCfg->length;
				2734	if (len > maxSavedLen)
				2735	continue;
				2736	*pDstTest++ = pStrCfg->maxLen;
				2737	*pDstTest++ = len;
				2738	while(len)
				2739	{
				2740	pDstTest++ = pSrcTest++;
				2741	len--;
				2742	}
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2743	}
				2744	}
				2745
				2746	// Set the default log level based on config
				2747	wlan_cfgGetInt(pMac, WNI_CFG_LOG_LEVEL, &logLevel);
				2748	for (i = 0; i < LOG_ENTRY_NUM; i++)
				2749	pMac->utils.gLogEvtLevel[i] = pMac->utils.gLogDbgLevel[i] = logLevel;
				2750
				2751	// Set status to READY
				2752	pMac->cfg.gCfgStatus = CFG_SUCCESS;
				2753	retVal = WNI_CFG_SUCCESS;
Kiran Kumar Lokere	af882c8	2013-03-18 16:07:05 -0700	[diff] [blame]	2754	PELOG1(cfgLog(pMac, LOG1, "<CFG> Completed successfully");)
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2755
Jeff Johnson	295189b	2012-06-20 16:38:30 -0700	[diff] [blame]	2756	} /* end ProcessDownloadReq() */
				2757
				2758
				2759
				2760