Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 1 | /* |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, 2016 The Linux Foundation. All rights reserved. |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
| 27 | |
| 28 | #include "hif_io32.h" |
| 29 | #include "hif_debug.h" |
| 30 | |
| 31 | /*chaninfo*/ |
| 32 | #define CHANINFOMEM_S2_READ_MASK 0x00000008 |
| 33 | #define CHANINFO_CTRL_CAPTURE_CHAN_INFO_MASK 0x00000001 |
| 34 | #define CHANINFO_CTRL_CHANINFOMEM_BW_MASK 0x00000030 |
| 35 | #define MULTICHAIN_ENABLE_RX_CHAIN_MASK_MASK 0x00000007 |
| 36 | |
| 37 | /*agc*/ |
| 38 | #define GAINS_MIN_OFFSETS_CF_AGC_HIST_ENABLE_MASK 0x00040000 |
| 39 | #define GAINS_MIN_OFFSETS_CF_AGC_HIST_GC_MASK 0x00080000 |
| 40 | #define GAINS_MIN_OFFSETS_CF_AGC_HIST_VOTING_MASK 0x00100000 |
| 41 | #define GAINS_MIN_OFFSETS_CF_AGC_HIST_PHY_ERR_MASK 0x00200000 |
| 42 | #define AGC_HISTORY_DUMP_MASK (\ |
| 43 | GAINS_MIN_OFFSETS_CF_AGC_HIST_ENABLE_MASK| \ |
| 44 | GAINS_MIN_OFFSETS_CF_AGC_HIST_GC_MASK| \ |
| 45 | GAINS_MIN_OFFSETS_CF_AGC_HIST_VOTING_MASK| \ |
| 46 | GAINS_MIN_OFFSETS_CF_AGC_HIST_PHY_ERR_MASK \ |
| 47 | ) |
| 48 | |
| 49 | #define BB_chaninfo_ctrl 0x1a370 |
| 50 | #define BB_multichain_enable 0x1a2a0 |
| 51 | #define BB_chn_tables_intf_addr 0x19894 |
| 52 | #define BB_chn1_tables_intf_addr 0x1a894 |
| 53 | #define BB_chn_tables_intf_data 0x19898 |
| 54 | #define BB_chn1_tables_intf_data 0x1a898 |
| 55 | #define BB_gains_min_offsets 0x19e08 |
| 56 | #define BB_chaninfo_tab_b0 0x03200 |
| 57 | #define BB_chaninfo_tab_b1 0x03300 |
| 58 | #define BB_watchdog_status 0x1a7c0 |
| 59 | #define BB_watchdog_ctrl_1 0x1a7c4 |
| 60 | #define BB_watchdog_ctrl_2 0x1a7c8 |
| 61 | #define BB_watchdog_status_B 0x1a7e0 |
| 62 | |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 63 | |
| 64 | #define PHY_BB_CHN_TABLES_INTF_ADDR 0x19894 |
| 65 | #define PHY_BB_CHN_TABLES_INTF_DATA 0x19898 |
| 66 | |
| 67 | #define PHY_BB_CHN1_TABLES_INTF_ADDR 0x1a894 |
| 68 | #define PHY_BB_CHN1_TABLES_INTF_DATA 0x1a898 |
| 69 | |
| 70 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 71 | struct priv_ctrl_ctx { |
| 72 | uint32_t chaninfo_ctrl_orig; |
| 73 | uint32_t gain_min_offsets_orig; |
| 74 | uint32_t anyreg_start; |
| 75 | uint32_t anyreg_len; |
| 76 | }; |
| 77 | |
| 78 | static struct priv_ctrl_ctx g_priv_dump_ctx; |
| 79 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 80 | static inline void set_target_reg_bits(void __iomem *mem, uint32_t reg, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 81 | uint32_t bitmask, uint32_t val) |
| 82 | { |
| 83 | uint32_t value = hif_read32_mb(mem + (reg)); |
| 84 | uint32_t shift = 0; |
| 85 | value &= ~(bitmask); |
| 86 | while (!((bitmask >> shift) & 0x01)) |
| 87 | shift++; |
| 88 | |
| 89 | value |= (((val) << shift) & (bitmask)); |
| 90 | hif_write32_mb(mem + (reg), value); |
| 91 | } |
| 92 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 93 | static inline uint32_t get_target_reg_bits(void __iomem *mem, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 94 | uint32_t reg, uint32_t bitmask) |
| 95 | { |
| 96 | uint32_t value = hif_read32_mb(mem + (reg)); |
| 97 | uint32_t shift = 0; |
| 98 | while (!((bitmask >> shift) & 0x01)) |
| 99 | shift++; |
| 100 | |
| 101 | return (value >> shift) & bitmask; |
| 102 | } |
| 103 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 104 | void priv_start_cap_chaninfo(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 105 | { |
| 106 | set_target_reg_bits(scn->mem, BB_chaninfo_ctrl, |
| 107 | CHANINFO_CTRL_CAPTURE_CHAN_INFO_MASK, 1); |
| 108 | } |
| 109 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 110 | void priv_start_agc(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 111 | { |
| 112 | g_priv_dump_ctx.gain_min_offsets_orig = |
| 113 | hif_read32_mb(scn->mem + BB_gains_min_offsets); |
| 114 | set_target_reg_bits(scn->mem, BB_gains_min_offsets, |
| 115 | AGC_HISTORY_DUMP_MASK, |
| 116 | 0x0f); |
| 117 | } |
| 118 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 119 | void priv_stop_agc(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 120 | { |
| 121 | set_target_reg_bits(scn->mem, BB_gains_min_offsets, |
| 122 | AGC_HISTORY_DUMP_MASK, |
| 123 | 0); |
| 124 | } |
| 125 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 126 | void priv_dump_chaninfo(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 127 | { |
| 128 | uint32_t bw, val; |
| 129 | uint32_t len, i, tmp; |
| 130 | uint32_t chain_mask; |
| 131 | uint32_t chain0, chain1; |
| 132 | |
| 133 | chain_mask = |
| 134 | get_target_reg_bits(scn->mem, BB_multichain_enable, |
| 135 | MULTICHAIN_ENABLE_RX_CHAIN_MASK_MASK); |
| 136 | chain0 = chain_mask & 1; |
| 137 | chain1 = chain_mask & 2; |
| 138 | |
| 139 | HIF_TRACE("%s: E", __func__); |
| 140 | bw = get_target_reg_bits(scn->mem, BB_chaninfo_ctrl, |
| 141 | CHANINFO_CTRL_CHANINFOMEM_BW_MASK); |
| 142 | |
| 143 | if (bw == 0) |
| 144 | len = 53; |
| 145 | else if (bw == 1) |
| 146 | len = 57; |
| 147 | else if (bw == 2) |
| 148 | len = 59 * 2 - 1; |
| 149 | else |
| 150 | len = 60 * 2 + 61 * 2; |
| 151 | |
| 152 | /* |
| 153 | * each tone is 16 bit valid, write to 32bit buffer each. |
| 154 | * bw==0(legacy20): 53 tones. |
| 155 | * bw==1(ht/vht20): 57 tones. |
| 156 | * bw==2(ht/vht40): 59+58 tones. |
| 157 | * bw==3(vht80): 60*2+61*2 tones. |
| 158 | */ |
| 159 | |
| 160 | if (chain0) { |
| 161 | hif_write32_mb(scn->mem + BB_chn_tables_intf_addr, |
| 162 | 0x80003200); |
| 163 | } |
| 164 | if (chain1) { |
| 165 | hif_write32_mb(scn->mem + BB_chn1_tables_intf_addr, |
| 166 | 0x80003200); |
| 167 | } |
| 168 | |
| 169 | set_target_reg_bits(scn->mem, BB_chaninfo_ctrl, |
| 170 | CHANINFOMEM_S2_READ_MASK, 0); |
| 171 | |
| 172 | if (chain0) { |
| 173 | if (bw < 2) { |
| 174 | len = (bw == 0) ? 53 : 57; |
| 175 | for (i = 0; i < len; i++) { |
| 176 | val = |
| 177 | hif_read32_mb(scn->mem + |
| 178 | BB_chn_tables_intf_data) & |
| 179 | 0x0000ffff; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 180 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 181 | if (i % 4 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 182 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 183 | } |
| 184 | } else { |
| 185 | len = (bw == 2) ? 59 : 60; |
| 186 | for (i = 0; i < len; i++) { |
| 187 | tmp = |
| 188 | hif_read32_mb(scn->mem + |
| 189 | BB_chn_tables_intf_data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 190 | qdf_print("0x%x\t", ((tmp >> 16) & 0x0000ffff)); |
| 191 | qdf_print("0x%x\t", (tmp & 0x0000ffff)); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 192 | if (i % 2 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 193 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 194 | } |
| 195 | if (bw > 2) { |
| 196 | /* bw == 3 for vht80 */ |
| 197 | hif_write32_mb(scn->mem + |
| 198 | BB_chn_tables_intf_addr, |
| 199 | 0x80003300); |
| 200 | len = 61; |
| 201 | for (i = 0; i < len; i++) { |
| 202 | tmp = |
| 203 | hif_read32_mb(scn->mem + |
| 204 | BB_chn_tables_intf_data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 205 | qdf_print("0x%x\t", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 206 | ((tmp >> 16) & 0x0000ffff)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 207 | qdf_print("0x%x\t", (tmp & 0x0000ffff)); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 208 | if (i % 2 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 209 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 210 | } |
| 211 | } |
| 212 | } |
| 213 | } |
| 214 | if (chain1) { |
| 215 | if (bw < 2) { |
| 216 | len = (bw == 0) ? 53 : 57; |
| 217 | for (i = 0; i < len; i++) { |
| 218 | val = |
| 219 | hif_read32_mb(scn->mem + |
| 220 | BB_chn1_tables_intf_data) & |
| 221 | 0x0000ffff; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 222 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 223 | if (i % 4 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 224 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 225 | } |
| 226 | } else { |
| 227 | len = (bw == 2) ? 59 : 60; |
| 228 | for (i = 0; i < len; i++) { |
| 229 | tmp = |
| 230 | hif_read32_mb(scn->mem + |
| 231 | BB_chn1_tables_intf_data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 232 | qdf_print("0x%x\n", (tmp >> 16) & 0x0000ffff); |
| 233 | qdf_print("0x%x\n", tmp & 0x0000ffff); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 234 | if (i % 2 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 235 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 236 | } |
| 237 | if (bw > 2) { |
| 238 | /* bw == 3 for vht80 */ |
| 239 | hif_write32_mb(scn->mem + |
| 240 | BB_chn1_tables_intf_addr, |
| 241 | 0x80003300); |
| 242 | len = 61; |
| 243 | for (i = 0; i < len; i++) { |
| 244 | tmp = |
| 245 | hif_read32_mb(scn->mem + |
| 246 | BB_chn1_tables_intf_data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 247 | qdf_print("0x%x\t", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 248 | ((tmp >> 16) & 0x0000ffff)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 249 | qdf_print("0x%x\t", (tmp & 0x0000ffff)); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 250 | if (i % 2 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 251 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 252 | } |
| 253 | } |
| 254 | } |
| 255 | } |
| 256 | HIF_TRACE("%s: X", __func__); |
| 257 | } |
| 258 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 259 | void priv_dump_agc(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 260 | { |
| 261 | int i, len = 30; /* check this value for Rome and Peregrine */ |
| 262 | uint32_t chain0, chain1, chain_mask, val; |
| 263 | |
Houston Hoffman | bac9454 | 2016-03-14 21:11:59 -0700 | [diff] [blame] | 264 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 265 | return; |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 266 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 267 | chain_mask = |
| 268 | get_target_reg_bits(scn->mem, BB_multichain_enable, |
| 269 | MULTICHAIN_ENABLE_RX_CHAIN_MASK_MASK); |
| 270 | chain0 = chain_mask & 1; |
| 271 | chain1 = chain_mask & 2; |
| 272 | |
| 273 | len = len << 1; /* each agc item is 64bit, total*2 */ |
| 274 | priv_stop_agc(scn); |
| 275 | |
| 276 | set_target_reg_bits(scn->mem, BB_chaninfo_ctrl, |
| 277 | CHANINFOMEM_S2_READ_MASK, 0); |
| 278 | |
| 279 | HIF_TRACE("%s: AGC history buffer dump: E", __func__); |
| 280 | if (chain0) { |
| 281 | for (i = 0; i < len; i++) { |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 282 | hif_write32_mb(scn->mem + |
| 283 | PHY_BB_CHN_TABLES_INTF_ADDR, |
| 284 | BB_chaninfo_tab_b0 + i * 4); |
| 285 | val = hif_read32_mb(scn->mem + |
| 286 | PHY_BB_CHN_TABLES_INTF_DATA); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 287 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 288 | if (i % 4 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 289 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | if (chain1) { |
| 293 | for (i = 0; i < len; i++) { |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 294 | hif_write32_mb(scn->mem + |
| 295 | PHY_BB_CHN1_TABLES_INTF_ADDR, |
| 296 | BB_chaninfo_tab_b0 + i * 4); |
| 297 | val = hif_read32_mb(scn->mem + |
| 298 | PHY_BB_CHN1_TABLES_INTF_DATA); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 299 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 300 | if (i % 4 == 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 301 | qdf_print("\n"); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 302 | } |
| 303 | } |
| 304 | HIF_TRACE("%s: AGC history buffer dump X", __func__); |
| 305 | /* restore original value */ |
| 306 | hif_write32_mb(scn->mem + BB_gains_min_offsets, |
| 307 | g_priv_dump_ctx.gain_min_offsets_orig); |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 308 | |
Houston Hoffman | bac9454 | 2016-03-14 21:11:59 -0700 | [diff] [blame] | 309 | Q_TARGET_ACCESS_END(scn); |
Rajeev Kumar | 1a65e58 | 2015-11-23 11:36:53 -0800 | [diff] [blame] | 310 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 311 | return; |
| 312 | } |
| 313 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 314 | void priv_dump_bbwatchdog(struct hif_softc *scn) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 315 | { |
| 316 | uint32_t val; |
| 317 | |
| 318 | HIF_TRACE("%s: BB watchdog dump E", __func__); |
| 319 | val = hif_read32_mb(scn->mem + BB_watchdog_status); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 320 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 321 | val = hif_read32_mb(scn->mem + BB_watchdog_ctrl_1); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 322 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 323 | val = hif_read32_mb(scn->mem + BB_watchdog_ctrl_2); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 324 | qdf_print("0x%x\t", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 325 | val = hif_read32_mb(scn->mem + BB_watchdog_status_B); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 326 | qdf_print("0x%x", val); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 327 | HIF_TRACE("%s: BB watchdog dump X", __func__); |
| 328 | } |