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Debashis Duttc4c52dc2016-10-04 17:12:23 -07001/*
Aniruddha Paul80f52e72017-10-28 18:16:58 +05302 * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
Debashis Duttc4c52dc2016-10-04 17:12:23 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for
5 * any purpose with or without fee is hereby granted, provided that the
6 * above copyright notice and this permission notice appear in all
7 * copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16 * PERFORMANCE OF THIS SOFTWARE.
17 */
18
19#ifndef _DP_RX_H
20#define _DP_RX_H
21
22#include "hal_rx.h"
Tallapragada Kalyan603c5942016-12-07 21:30:44 +053023#include "dp_tx.h"
Ishank Jain2bf04b42017-02-23 22:38:42 +053024#include "dp_peer.h"
Debashis Duttc4c52dc2016-10-04 17:12:23 -070025
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +053026#ifdef RXDMA_OPTIMIZATION
27#define RX_BUFFER_ALIGNMENT 128
28#else /* RXDMA_OPTIMIZATION */
29#define RX_BUFFER_ALIGNMENT 4
30#endif /* RXDMA_OPTIMIZATION */
31
Keyur Parekhfad6d082017-05-07 08:54:47 -070032#define RX_BUFFER_SIZE 2048
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +053033#define RX_BUFFER_RESERVATION 0
34
Debashis Duttc4c52dc2016-10-04 17:12:23 -070035#define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
36#define DP_PEER_METADATA_PEER_ID_SHIFT 0
37#define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
38#define DP_PEER_METADATA_VDEV_ID_SHIFT 16
39
40#define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
41 (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
42 >> DP_PEER_METADATA_PEER_ID_SHIFT)
43
44#define DP_PEER_METADATA_ID_GET(_peer_metadata) \
45 (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
46 >> DP_PEER_METADATA_VDEV_ID_SHIFT)
47
Pamidipati, Vijay53794742017-06-03 11:24:32 +053048#define DP_RX_DESC_MAGIC 0xdec0de
49
Debashis Duttc4c52dc2016-10-04 17:12:23 -070050/**
51 * struct dp_rx_desc
52 *
53 * @nbuf : VA of the "skb" posted
54 * @rx_buf_start : VA of the original Rx buffer, before
55 * movement of any skb->data pointer
56 * @cookie : index into the sw array which holds
57 * the sw Rx descriptors
58 * Cookie space is 21 bits:
59 * lower 18 bits -- index
60 * upper 3 bits -- pool_id
61 * @pool_id : pool Id for which this allocated.
62 * Can only be used if there is no flow
63 * steering
64 */
65struct dp_rx_desc {
66 qdf_nbuf_t nbuf;
67 uint8_t *rx_buf_start;
Tallapragada Kalyanaae8c412017-02-13 12:00:17 +053068 uint32_t cookie;
Debashis Duttc4c52dc2016-10-04 17:12:23 -070069 uint8_t pool_id;
Pamidipati, Vijay53794742017-06-03 11:24:32 +053070#ifdef RX_DESC_DEBUG_CHECK
71 uint32_t magic;
72#endif
Pramod Simha59fcb312017-06-22 17:43:16 -070073 uint8_t in_use:1;
Debashis Duttc4c52dc2016-10-04 17:12:23 -070074};
75
76#define RX_DESC_COOKIE_INDEX_SHIFT 0
77#define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
78#define RX_DESC_COOKIE_POOL_ID_SHIFT 18
79#define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
80
81#define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
82 (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
83 RX_DESC_COOKIE_POOL_ID_SHIFT)
84
85#define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
86 (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
87 RX_DESC_COOKIE_INDEX_SHIFT)
88
Ravi Joshi36f68ad2016-11-09 17:09:47 -080089/*
90 *dp_rx_xor_block() - xor block of data
91 *@b: destination data block
92 *@a: source data block
93 *@len: length of the data to process
94 *
95 *Returns: None
96 */
97static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
98{
99 qdf_size_t i;
100
101 for (i = 0; i < len; i++)
102 b[i] ^= a[i];
103}
104
105/*
106 *dp_rx_rotl() - rotate the bits left
107 *@val: unsigned integer input value
108 *@bits: number of bits
109 *
110 *Returns: Integer with left rotated by number of 'bits'
111 */
112static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
113{
114 return (val << bits) | (val >> (32 - bits));
115}
116
117/*
118 *dp_rx_rotr() - rotate the bits right
119 *@val: unsigned integer input value
120 *@bits: number of bits
121 *
122 *Returns: Integer with right rotated by number of 'bits'
123 */
124static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
125{
126 return (val >> bits) | (val << (32 - bits));
127}
128
129/*
130 *dp_rx_xswap() - swap the bits left
131 *@val: unsigned integer input value
132 *
133 *Returns: Integer with bits swapped
134 */
135static inline uint32_t dp_rx_xswap(uint32_t val)
136{
137 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
138}
139
140/*
141 *dp_rx_get_le32_split() - get little endian 32 bits split
142 *@b0: byte 0
143 *@b1: byte 1
144 *@b2: byte 2
145 *@b3: byte 3
146 *
147 *Returns: Integer with split little endian 32 bits
148 */
149static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
150 uint8_t b3)
151{
152 return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
153}
154
155/*
156 *dp_rx_get_le32() - get little endian 32 bits
157 *@b0: byte 0
158 *@b1: byte 1
159 *@b2: byte 2
160 *@b3: byte 3
161 *
162 *Returns: Integer with little endian 32 bits
163 */
164static inline uint32_t dp_rx_get_le32(const uint8_t *p)
165{
166 return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
167}
168
169/*
170 * dp_rx_put_le32() - put little endian 32 bits
171 * @p: destination char array
172 * @v: source 32-bit integer
173 *
174 * Returns: None
175 */
176static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
177{
178 p[0] = (v) & 0xff;
179 p[1] = (v >> 8) & 0xff;
180 p[2] = (v >> 16) & 0xff;
181 p[3] = (v >> 24) & 0xff;
182}
183
184/* Extract michal mic block of data */
185#define dp_rx_michael_block(l, r) \
186 do { \
187 r ^= dp_rx_rotl(l, 17); \
188 l += r; \
189 r ^= dp_rx_xswap(l); \
190 l += r; \
191 r ^= dp_rx_rotl(l, 3); \
192 l += r; \
193 r ^= dp_rx_rotr(l, 2); \
194 l += r; \
195 } while (0)
196
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700197/**
198 * struct dp_rx_desc_list_elem_t
199 *
200 * @next : Next pointer to form free list
201 * @rx_desc : DP Rx descriptor
202 */
203union dp_rx_desc_list_elem_t {
204 union dp_rx_desc_list_elem_t *next;
205 struct dp_rx_desc rx_desc;
206};
207
208/**
Kai Chen6eca1a62017-01-12 10:17:53 -0800209 * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
210 * the Rx descriptor on Rx DMA source ring buffer
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700211 * @soc: core txrx main context
212 * @cookie: cookie used to lookup virtual address
213 *
214 * Return: void *: Virtual Address of the Rx descriptor
215 */
216static inline
Kai Chen6eca1a62017-01-12 10:17:53 -0800217void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700218{
219 uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
220 uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
221 /* TODO */
222 /* Add sanity for pool_id & index */
Kai Chen6eca1a62017-01-12 10:17:53 -0800223 return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
224}
225
226/**
227 * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
228 * the Rx descriptor on monitor ring buffer
229 * @soc: core txrx main context
230 * @cookie: cookie used to lookup virtual address
231 *
232 * Return: void *: Virtual Address of the Rx descriptor
233 */
234static inline
235void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
236{
237 uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
238 uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
239 /* TODO */
240 /* Add sanity for pool_id & index */
241 return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
242}
243
244/**
245 * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
246 * the Rx descriptor on monitor status ring buffer
247 * @soc: core txrx main context
248 * @cookie: cookie used to lookup virtual address
249 *
250 * Return: void *: Virtual Address of the Rx descriptor
251 */
252static inline
253void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
254{
255 uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
256 uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
257 /* TODO */
258 /* Add sanity for pool_id & index */
259 return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700260}
261
262void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
263 union dp_rx_desc_list_elem_t **local_desc_list,
264 union dp_rx_desc_list_elem_t **tail,
Kai Chen6eca1a62017-01-12 10:17:53 -0800265 uint16_t pool_id,
266 struct rx_desc_pool *rx_desc_pool);
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700267
268uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
Kai Chen6eca1a62017-01-12 10:17:53 -0800269 struct rx_desc_pool *rx_desc_pool,
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700270 uint16_t num_descs,
271 union dp_rx_desc_list_elem_t **desc_list,
272 union dp_rx_desc_list_elem_t **tail);
273
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700274
275QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
Kai Chen6eca1a62017-01-12 10:17:53 -0800276
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700277void dp_rx_pdev_detach(struct dp_pdev *pdev);
278
Kai Chen6eca1a62017-01-12 10:17:53 -0800279
Dhanashri Atre0da31222017-03-23 12:30:58 -0700280uint32_t
281dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota);
Kai Chen6eca1a62017-01-12 10:17:53 -0800282
Tallapragada Kalyan1ef54802016-11-30 12:54:55 +0530283uint32_t dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
284
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700285uint32_t
Tallapragada Kalyan1ef54802016-11-30 12:54:55 +0530286dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700287
Tallapragada Kalyan52b45a12017-05-12 17:36:16 +0530288void
289dp_rx_sg_create(qdf_nbuf_t nbuf,
290 uint8_t *rx_tlv_hdr,
291 uint16_t *mpdu_len,
292 bool *is_first_frag,
293 uint16_t *frag_list_len,
294 qdf_nbuf_t *head_frag_nbuf,
295 qdf_nbuf_t *frag_list_head,
296 qdf_nbuf_t *frag_list_tail);
297
Kai Chen6eca1a62017-01-12 10:17:53 -0800298QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
299 uint32_t pool_id,
300 uint32_t pool_size,
301 struct rx_desc_pool *rx_desc_pool);
302
303void dp_rx_desc_pool_free(struct dp_soc *soc,
304 uint32_t pool_id,
305 struct rx_desc_pool *rx_desc_pool);
306
c_cgodavbd5b3c22017-06-07 12:31:40 +0530307void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
Pamidipati, Vijayeb8a92c2017-05-01 00:55:56 +0530308 struct dp_peer *peer);
Tallapragada Kalyan3a0005c2017-03-10 15:22:57 +0530309
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700310/**
311 * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
312 *
313 * @head: pointer to the head of local free list
314 * @tail: pointer to the tail of local free list
315 * @new: new descriptor that is added to the free list
316 *
317 * Return: void:
318 */
319static inline
320void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
321 union dp_rx_desc_list_elem_t **tail,
322 struct dp_rx_desc *new)
323{
324 qdf_assert(head && new);
325
326 new->nbuf = NULL;
Pramod Simha59fcb312017-06-22 17:43:16 -0700327 new->in_use = 0;
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700328
329 ((union dp_rx_desc_list_elem_t *)new)->next = *head;
330 *head = (union dp_rx_desc_list_elem_t *)new;
331 if (*tail == NULL)
332 *tail = *head;
333
334}
Tallapragada Kalyan603c5942016-12-07 21:30:44 +0530335
Ishank Jain2bf04b42017-02-23 22:38:42 +0530336/**
337 * dp_rx_wds_srcport_learn() - Add or update the STA PEER which
338 * is behind the WDS repeater.
339 *
340 * @soc: core txrx main context
341 * @rx_tlv_hdr: base address of RX TLV header
342 * @ta_peer: WDS repeater peer
343 * @nbuf: rx pkt
344 *
345 * Return: void:
346 */
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530347#ifdef FEATURE_WDS
Ishank Jain2bf04b42017-02-23 22:38:42 +0530348static inline void
349dp_rx_wds_srcport_learn(struct dp_soc *soc,
350 uint8_t *rx_tlv_hdr,
351 struct dp_peer *ta_peer,
352 qdf_nbuf_t nbuf)
353{
354 uint16_t sa_sw_peer_id = hal_rx_msdu_end_sa_sw_peer_id_get(rx_tlv_hdr);
355 uint32_t flags = IEEE80211_NODE_F_WDS_HM;
356 uint32_t ret = 0;
357 uint8_t wds_src_mac[IEEE80211_ADDR_LEN];
358
Tallapragada Kalyan85a14552017-08-23 14:41:02 +0530359 /* Do wds source port learning only if it is a 4-address mpdu */
Vivekde90e592017-11-30 17:24:18 +0530360 if (!(qdf_nbuf_is_rx_chfrag_start(nbuf) &&
Tallapragada Kalyan85a14552017-08-23 14:41:02 +0530361 hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr)))
362 return;
363
Ishank Jain2bf04b42017-02-23 22:38:42 +0530364 memcpy(wds_src_mac, (qdf_nbuf_data(nbuf) + IEEE80211_ADDR_LEN),
365 IEEE80211_ADDR_LEN);
366
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530367 if (qdf_unlikely(!hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr))) {
Tallapragada Kalyan57b6bb32018-01-02 12:58:33 +0530368 ret = dp_peer_add_ast(soc,
369 ta_peer,
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530370 wds_src_mac,
Tallapragada Kalyan57b6bb32018-01-02 12:58:33 +0530371 CDP_TXRX_AST_TYPE_WDS,
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530372 flags);
Tallapragada Kalyan57b6bb32018-01-02 12:58:33 +0530373
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530374 } else {
375 /*
376 * Get the AST entry from HW SA index and mark it as active
377 */
378 struct dp_ast_entry *ast;
379 uint16_t sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
380 ast = soc->ast_table[sa_idx];
381
382 /*
383 * Ensure we are updating the right AST entry by
384 * validating ast_idx.
385 * There is a possibility we might arrive here without
386 * AST MAP event , so this check is mandatory
387 */
388 if (ast && (ast->ast_idx == sa_idx)) {
389 ast->is_active = TRUE;
390 }
391
Tallapragada Kalyan57b6bb32018-01-02 12:58:33 +0530392 if (ast && sa_sw_peer_id != ta_peer->peer_ids[0])
393 dp_peer_update_ast(soc, ta_peer, ast, flags);
Ishank Jain2bf04b42017-02-23 22:38:42 +0530394 }
395 return;
396}
397#else
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530398 static inline void
Ishank Jain2bf04b42017-02-23 22:38:42 +0530399dp_rx_wds_srcport_learn(struct dp_soc *soc,
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530400 uint8_t *rx_tlv_hdr,
401 struct dp_peer *ta_peer,
402 qdf_nbuf_t nbuf)
Ishank Jain2bf04b42017-02-23 22:38:42 +0530403{
404}
405#endif
406
Ishank Jain9f174c62017-03-30 18:37:42 +0530407uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
chenguo91c90102017-12-12 16:16:37 +0800408void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
409 qdf_nbuf_t mpdu, bool mpdu_done);
Chandru Neginahalccf1cbd2017-12-08 18:53:38 +0530410void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
Gurumoorthi Gnanasambandhan25607a72017-08-07 11:53:16 +0530411
Tallapragada Kalyan603c5942016-12-07 21:30:44 +0530412#define DP_RX_LIST_APPEND(head, tail, elem) \
Pamidipati, Vijayb8bbf162017-06-26 23:47:39 +0530413 do { \
414 if (!(head)) { \
415 (head) = (elem); \
416 } else { \
417 qdf_nbuf_set_next((tail), (elem)); \
418 } \
419 (tail) = (elem); \
Dhanashri Atre8b3f3772017-01-24 18:38:11 -0800420 qdf_nbuf_set_next((tail), NULL); \
Tallapragada Kalyan603c5942016-12-07 21:30:44 +0530421} while (0)
422
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +0530423#ifndef BUILD_X86
424static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
425 qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
426{
427 return QDF_STATUS_SUCCESS;
428}
429#else
430#define MAX_RETRY 100
431static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
432 qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
433{
434 uint32_t nbuf_retry = 0;
435 int32_t ret;
436 const uint32_t x86_phy_addr = 0x50000000;
437 /*
438 * in M2M emulation platforms (x86) the memory below 0x50000000
439 * is reserved for target use, so any memory allocated in this
440 * region should not be used by host
441 */
442 do {
443 if (qdf_likely(*paddr > x86_phy_addr))
444 return QDF_STATUS_SUCCESS;
445 else {
446 QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
Jeff Johnson3f217e22017-09-18 10:13:35 -0700447 "phy addr %pK exceded 0x50000000 trying again\n",
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +0530448 paddr);
449
450 nbuf_retry++;
451 if ((*rx_netbuf)) {
452 qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
453 QDF_DMA_BIDIRECTIONAL);
Kiran Venkatappa5dba3a32017-03-01 16:00:22 +0530454 /* Not freeing buffer intentionally.
455 * Observed that same buffer is getting
456 * re-allocated resulting in longer load time
457 * WMI init timeout.
458 * This buffer is anyway not useful so skip it.
459 **/
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +0530460 }
461
Tallapragada Kalyana867edf2017-11-14 12:26:41 +0530462 *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +0530463 RX_BUFFER_SIZE,
464 RX_BUFFER_RESERVATION,
465 RX_BUFFER_ALIGNMENT,
466 FALSE);
467
468 if (qdf_unlikely(!(*rx_netbuf)))
469 return QDF_STATUS_E_FAILURE;
470
471 ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
472 QDF_DMA_BIDIRECTIONAL);
473
474 if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
475 qdf_nbuf_free(*rx_netbuf);
476 *rx_netbuf = NULL;
477 continue;
478 }
479
480 *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
481 }
482 } while (nbuf_retry < MAX_RETRY);
483
484 if ((*rx_netbuf)) {
485 qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
486 QDF_DMA_BIDIRECTIONAL);
487 qdf_nbuf_free(*rx_netbuf);
488 }
489
490 return QDF_STATUS_E_FAILURE;
491}
492#endif
Ravi Joshi36f68ad2016-11-09 17:09:47 -0800493
Kai Chen6eca1a62017-01-12 10:17:53 -0800494/**
495 * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
496 * the MSDU Link Descriptor
497 * @soc: core txrx main context
498 * @buf_info: buf_info include cookie that used to lookup virtual address of
499 * link descriptor Normally this is just an index into a per SOC array.
500 *
501 * This is the VA of the link descriptor, that HAL layer later uses to
502 * retrieve the list of MSDU's for a given MPDU.
503 *
504 * Return: void *: Virtual Address of the Rx descriptor
505 */
506static inline
507void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
508 struct hal_buf_info *buf_info)
509{
510 void *link_desc_va;
Karunakar Dasinenidbaf4be2017-07-19 18:12:43 -0700511 uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
512
Tallapragada Kalyan4e3341a2017-02-06 12:19:43 +0530513
Kai Chen6eca1a62017-01-12 10:17:53 -0800514 /* TODO */
515 /* Add sanity for cookie */
516
Karunakar Dasinenidbaf4be2017-07-19 18:12:43 -0700517 link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
Kai Chen6eca1a62017-01-12 10:17:53 -0800518 (buf_info->paddr -
Karunakar Dasinenidbaf4be2017-07-19 18:12:43 -0700519 soc->link_desc_banks[bank_id].base_paddr);
Kai Chen6eca1a62017-01-12 10:17:53 -0800520
521 return link_desc_va;
522}
523
524/**
525 * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
526 * the MSDU Link Descriptor
527 * @pdev: core txrx pdev context
528 * @buf_info: buf_info includes cookie that used to lookup virtual address of
529 * link descriptor. Normally this is just an index into a per pdev array.
530 *
531 * This is the VA of the link descriptor in monitor mode destination ring,
532 * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
533 *
534 * Return: void *: Virtual Address of the Rx descriptor
535 */
536static inline
537void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
538 struct hal_buf_info *buf_info)
539{
540 void *link_desc_va;
541
542 /* TODO */
543 /* Add sanity for cookie */
544
545 link_desc_va = pdev->link_desc_banks[buf_info->sw_cookie].base_vaddr +
546 (buf_info->paddr -
547 pdev->link_desc_banks[buf_info->sw_cookie].base_paddr);
Kai Chen6eca1a62017-01-12 10:17:53 -0800548 return link_desc_va;
549}
550
Ravi Joshi36f68ad2016-11-09 17:09:47 -0800551/**
552 * dp_rx_defrag_concat() - Concatenate the fragments
553 *
554 * @dst: destination pointer to the buffer
555 * @src: source pointer from where the fragment payload is to be copied
556 *
557 * Return: QDF_STATUS
558 */
559static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
560{
561 /*
562 * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
563 * to provide space for src, the headroom portion is copied from
564 * the original dst buffer to the larger new dst buffer.
565 * (This is needed, because the headroom of the dst buffer
566 * contains the rx desc.)
567 */
568 if (qdf_nbuf_cat(dst, src))
569 return QDF_STATUS_E_DEFRAG_ERROR;
570
571 return QDF_STATUS_SUCCESS;
572}
573
Aniruddha Paulfbeb4bb2017-08-10 15:18:59 +0530574/*
575 * dp_rx_ast_set_active() - set the active flag of the astentry
576 * corresponding to a hw index.
577 * @soc: core txrx main context
578 * @sa_idx: hw idx
579 * @is_active: active flag
580 *
581 */
582#ifdef FEATURE_WDS
583static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
584{
585 struct dp_ast_entry *ast;
586 qdf_spin_lock_bh(&soc->ast_lock);
587 ast = soc->ast_table[sa_idx];
588
589 /*
590 * Ensure we are updating the right AST entry by
591 * validating ast_idx.
592 * There is a possibility we might arrive here without
593 * AST MAP event , so this check is mandatory
594 */
595 if (ast && (ast->ast_idx == sa_idx)) {
596 ast->is_active = is_active;
597 qdf_spin_unlock_bh(&soc->ast_lock);
598 return QDF_STATUS_SUCCESS;
599 }
600
601 qdf_spin_unlock_bh(&soc->ast_lock);
602 return QDF_STATUS_E_FAILURE;
603}
604#else
605static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
606{
607 return QDF_STATUS_SUCCESS;
608}
609#endif
Ravi Joshi36f68ad2016-11-09 17:09:47 -0800610
Kai Chen6eca1a62017-01-12 10:17:53 -0800611/*
Nandha Kishore Easwaran47e74162017-12-12 11:54:01 +0530612 * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
613 * In qwrap mode, packets originated from
614 * any vdev should not loopback and
615 * should be dropped.
616 * @vdev: vdev on which rx packet is received
617 * @nbuf: rx pkt
618 *
619 */
620#if ATH_SUPPORT_WRAP
621static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
622 qdf_nbuf_t nbuf)
623{
624 struct dp_vdev *psta_vdev;
625 struct dp_pdev *pdev = vdev->pdev;
626 uint8_t *data = qdf_nbuf_data(nbuf);
627
628 if (qdf_unlikely(vdev->proxysta_vdev)) {
629 /* In qwrap isolation mode, allow loopback packets as all
630 * packets go to RootAP and Loopback on the mpsta.
631 */
632 if (vdev->isolation_vdev)
633 return false;
634 TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
635 if (qdf_unlikely(psta_vdev->proxysta_vdev &&
636 !qdf_mem_cmp(psta_vdev->mac_addr.raw,
637 &data[DP_MAC_ADDR_LEN], DP_MAC_ADDR_LEN))) {
638 /* Drop packet if source address is equal to
639 * any of the vdev addresses.
640 */
641 return true;
642 }
643 }
644 }
645 return false;
646}
647#else
648static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
649 qdf_nbuf_t nbuf)
650{
651 return false;
652}
653#endif
654
655/*
Kai Chen6eca1a62017-01-12 10:17:53 -0800656 * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
657 * called during dp rx initialization
658 * and at the end of dp_rx_process.
659 *
660 * @soc: core txrx main context
661 * @mac_id: mac_id which is one of 3 mac_ids
662 * @dp_rxdma_srng: dp rxdma circular ring
663 * @rx_desc_pool: Poiter to free Rx descriptor pool
664 * @num_req_buffers: number of buffer to be replenished
665 * @desc_list: list of descs if called from dp_rx_process
666 * or NULL during dp rx initialization or out of buffer
667 * interrupt.
668 * @tail: tail of descs list
669 * @owner: who owns the nbuf (host, NSS etc...)
670 * Return: return success or failure
671 */
672QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
673 struct dp_srng *dp_rxdma_srng,
674 struct rx_desc_pool *rx_desc_pool,
675 uint32_t num_req_buffers,
676 union dp_rx_desc_list_elem_t **desc_list,
677 union dp_rx_desc_list_elem_t **tail,
678 uint8_t owner);
679
680/**
681 * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
682 * (WBM), following error handling
683 *
684 * @soc: core DP main context
685 * @buf_addr_info: opaque pointer to the REO error ring descriptor
686 * @buf_addr_info: void pointer to the buffer_addr_info
Tallapragada Kalyan00172912017-09-26 21:04:24 +0530687 * @bm_action: put to idle_list or release to msdu_list
Kai Chen6eca1a62017-01-12 10:17:53 -0800688 * Return: QDF_STATUS
689 */
690QDF_STATUS
psimha223883f2017-11-16 17:18:51 -0800691dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
692
693QDF_STATUS
Kai Chen6eca1a62017-01-12 10:17:53 -0800694dp_rx_link_desc_buf_return(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
Tallapragada Kalyan00172912017-09-26 21:04:24 +0530695 void *buf_addr_info, uint8_t bm_action);
Aniruddha Paul80f52e72017-10-28 18:16:58 +0530696/**
697 * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
698 * (WBM) by address
699 *
700 * @soc: core DP main context
701 * @link_desc_addr: link descriptor addr
702 *
703 * Return: QDF_STATUS
704 */
705QDF_STATUS
706dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
707 uint8_t bm_action);
Pramod Simhae382ff82017-06-05 18:09:26 -0700708
Pramod Simhae382ff82017-06-05 18:09:26 -0700709uint32_t
710dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id,
711 uint32_t quota);
Venkateswara Swamy Bandaru1fecd152017-07-04 17:26:18 +0530712
713void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
714 uint8_t *rx_tlv_hdr, struct dp_peer *peer);
715QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
716 uint8_t *rx_tlv_hdr);
717
Tallapragada Kalyan2a5fc622017-12-08 21:07:43 +0530718int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
719 struct dp_peer *peer, int rx_mcast);
720
Debashis Duttc4c52dc2016-10-04 17:12:23 -0700721#endif /* _DP_RX_H */