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gerrit-public.fairphone.software / platform / vendor / qcom-opensource / wlan / qca-wifi-host-cmn / 7d991b3f72812cccc36b83bd90c8a8081da15f6b / . / wlan_cfg / cfg_dp.h
blob: 7f7a2692000724025668e80c9a1620b2673a5ce3 [file] [log] [blame]
Vivek126db5d2018-07-25 22:05:04 +0530[diff] [blame]1/*
2 * Copyright (c) 2018 The Linux Foundation. All rights reserved.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for
5 * any purpose with or without fee is hereby granted, provided that the
6 * above copyright notice and this permission notice appear in all
7 * copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16 * PERFORMANCE OF THIS SOFTWARE.
17 */
18
19/**
20 * DOC: This file contains definitions of Data Path configuration.
21 */
22
23#ifndef _CFG_DP_H_
24#define _CFG_DP_H_
25
26#include "cfg_define.h"
27
28#define WLAN_CFG_MAX_CLIENTS 64
29#define WLAN_CFG_MAX_CLIENTS_MIN 64
30#define WLAN_CFG_MAX_CLIENTS_MAX 64
31
32/* Change this to a lower value to enforce scattered idle list mode */
33#define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
34#define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x200000
35#define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
36
37#define WLAN_CFG_NUM_TCL_DATA_RINGS 3
38#define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
39#define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
40
41#ifdef CONFIG_MCL
42#ifdef IPA_OFFLOAD
43#define WLAN_CFG_PER_PDEV_TX_RING 0
44#else
45#define WLAN_CFG_PER_PDEV_TX_RING 1
46#endif
47#else
48#define WLAN_CFG_PER_PDEV_TX_RING 0
49#endif
50
51#define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
52#define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
53
54#ifdef CONFIG_MCL
55#define WLAN_CFG_PER_PDEV_RX_RING 0
56#define WLAN_CFG_PER_PDEV_LMAC_RING 0
57#define WLAN_LRO_ENABLE 1
58#ifdef IPA_OFFLOAD
59#define WLAN_CFG_TX_RING_SIZE 2048
60#else
61#define WLAN_CFG_TX_RING_SIZE 512
62#endif
63#define WLAN_CFG_TX_COMP_RING_SIZE 1024
64
65/* Tx Descriptor and Tx Extension Descriptor pool sizes */
66#define WLAN_CFG_NUM_TX_DESC 1024
67#define WLAN_CFG_NUM_TX_EXT_DESC 1024
68
69/* Interrupt Mitigation - Batch threshold in terms of number of frames */
70#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
71#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
72#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
73
74/* Interrupt Mitigation - Timer threshold in us */
75#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
76#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
77#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
78#endif
79
80#ifdef CONFIG_WIN
81#define WLAN_CFG_PER_PDEV_RX_RING 0
82#define WLAN_CFG_PER_PDEV_LMAC_RING 1
83#define WLAN_LRO_ENABLE 0
84
85/* Tx Descriptor and Tx Extension Descriptor pool sizes */
86#define WLAN_CFG_NUM_TX_DESC 0x320000
87#define WLAN_CFG_NUM_TX_EXT_DESC 0x80000
88
89/* Interrupt Mitigation - Batch threshold in terms of number of frames */
90#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256
91#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128
92#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
93
94/* Interrupt Mitigation - Timer threshold in us */
95#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000
96#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500
97#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000
98
99#define WLAN_CFG_TX_RING_SIZE 512
100
101/* Size the completion ring using following 2 parameters
102 * - NAPI schedule latency (assuming 1 netdev competing for CPU)
103 * = 20 ms (2 jiffies)
104 * - Worst case PPS requirement = 400K PPS
105 *
106 * Ring size = 20 * 400 = 8000
107 * 8192 is nearest power of 2
108 */
109#define WLAN_CFG_TX_COMP_RING_SIZE 0x80000
110#endif
111
112#define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
113#define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
114
115#define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
116#define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
117
118#define WLAN_CFG_TX_RING_SIZE_MIN 512
119#define WLAN_CFG_TX_RING_SIZE_MAX 2048
120
121#define WLAN_CFG_TX_COMP_RING_SIZE_MIN 1024
122#define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
123
124#define WLAN_CFG_NUM_TX_DESC_MIN 1024
125#define WLAN_CFG_NUM_TX_DESC_MAX 0x320000
126
127#define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024
128#define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
129
130#define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
131#define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
132
133#define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1
134#define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
135
136#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
137#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
138
139#define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
140#define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100
141
142#define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
143#define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
144
145#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
146#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
147
Aniruddha Paul7d991b32018-09-03 17:40:00 +0530[diff] [blame^]148#define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
149#define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
150#define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0x2000
Vivek126db5d2018-07-25 22:05:04 +0530[diff] [blame]151
152#ifdef QCA_LL_TX_FLOW_CONTROL_V2
153
154/* Per vdev pools */
155#define WLAN_CFG_NUM_TX_DESC_POOL 3
156#define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
157
158#else /* QCA_LL_TX_FLOW_CONTROL_V2 */
159
160#ifdef TX_PER_PDEV_DESC_POOL
161#define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
162#define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
163
164#else /* TX_PER_PDEV_DESC_POOL */
165
166#define WLAN_CFG_NUM_TX_DESC_POOL 3
167#define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
168
169#endif /* TX_PER_PDEV_DESC_POOL */
170#endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
171
172#define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
173#define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
174
175#define WLAN_CFG_HTT_PKT_TYPE 2
176#define WLAN_CFG_HTT_PKT_TYPE_MIN 2
177#define WLAN_CFG_HTT_PKT_TYPE_MAX 2
178
179#define WLAN_CFG_MAX_PEER_ID 64
180#define WLAN_CFG_MAX_PEER_ID_MIN 64
181#define WLAN_CFG_MAX_PEER_ID_MAX 64
182
183#define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
184#define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
185#define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
186
187#define WLAN_CFG_NUM_TCL_DATA_RINGS 3
188#define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
189#define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
190
191#define WLAN_CFG_NUM_REO_DEST_RING 4
192#define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
193#define WLAN_CFG_NUM_REO_DEST_RING_MAX 4
194
195#define WLAN_CFG_WBM_RELEASE_RING_SIZE 64
196#define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
197#define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64
198
199#define WLAN_CFG_TCL_CMD_RING_SIZE 32
200#define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32
201#define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32
202
203#define WLAN_CFG_TCL_STATUS_RING_SIZE 32
204#define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
205#define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
206
207#if defined(QCA_WIFI_QCA6290)
208#define WLAN_CFG_REO_DST_RING_SIZE 1024
209#else
210#define WLAN_CFG_REO_DST_RING_SIZE 2048
211#endif
212
213#define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024
214#define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048
215
216#define WLAN_CFG_REO_REINJECT_RING_SIZE 32
217#define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
218#define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32
219
220#define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
221#define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 1024
222#define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
223
224#define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128
225#define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
226#define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128
227
228#define WLAN_CFG_REO_CMD_RING_SIZE 64
229#define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
230#define WLAN_CFG_REO_CMD_RING_SIZE_MAX 64
231
232#define WLAN_CFG_REO_STATUS_RING_SIZE 128
233#define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
234#define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 128
235
236#define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
237#define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
238#define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
239
240#define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
241#define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 4096
242#define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
243
244#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
245#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 4096
246#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 4096
247
248#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
249#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 2048
250#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 2048
251
252#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
253#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 1024
254#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 1024
255
256#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
257#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
258#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 4096
259
260#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
261#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
262#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 1024
263
264/* DP INI Declerations */
265#define CFG_DP_HTT_PACKET_TYPE \
266 CFG_INI_UINT("dp_htt_packet_type", \
267 WLAN_CFG_HTT_PKT_TYPE_MIN, \
268 WLAN_CFG_HTT_PKT_TYPE_MAX, \
269 WLAN_CFG_HTT_PKT_TYPE, \
270 CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
271
272#define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
273 CFG_INI_UINT("dp_int_batch_threshold_other", \
274 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
275 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
276 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
277 CFG_VALUE_OR_DEFAULT, "DP INT threshold Other")
278
279#define CFG_DP_INT_BATCH_THRESHOLD_RX \
280 CFG_INI_UINT("dp_int_batch_threshold_rx", \
281 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
282 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
283 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
284 CFG_VALUE_OR_DEFAULT, "DP INT threshold Rx")
285
286#define CFG_DP_INT_BATCH_THRESHOLD_TX \
287 CFG_INI_UINT("dp_int_batch_threshold_tx", \
288 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
289 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
290 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
291 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
292
293#define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
294 CFG_INI_UINT("dp_int_timer_threshold_other", \
295 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
296 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
297 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
298 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
299
300#define CFG_DP_INT_TIMER_THRESHOLD_RX \
301 CFG_INI_UINT("dp_int_timer_threshold_rx", \
302 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
303 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
304 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
305 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
306
307#define CFG_DP_INT_TIMER_THRESHOLD_TX \
308 CFG_INI_UINT("dp_int_timer_threshold_tx", \
309 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
310 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
311 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
312 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
313
314#define CFG_DP_MAX_ALLOC_SIZE \
315 CFG_INI_UINT("dp_max_alloc_size", \
316 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
317 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
318 WLAN_CFG_MAX_ALLOC_SIZE, \
319 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
320
321#define CFG_DP_MAX_CLIENTS \
322 CFG_INI_UINT("dp_max_clients", \
323 WLAN_CFG_MAX_CLIENTS_MIN, \
324 WLAN_CFG_MAX_CLIENTS_MAX, \
325 WLAN_CFG_MAX_CLIENTS, \
326 CFG_VALUE_OR_DEFAULT, "DP Max Clients")
327
328#define CFG_DP_MAX_PEER_ID \
329 CFG_INI_UINT("dp_max_peer_id", \
330 WLAN_CFG_MAX_PEER_ID_MIN, \
331 WLAN_CFG_MAX_PEER_ID_MAX, \
332 WLAN_CFG_MAX_PEER_ID, \
333 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
334
335#define CFG_DP_REO_DEST_RINGS \
336 CFG_INI_UINT("dp_reo_dest_rings", \
337 WLAN_CFG_NUM_REO_DEST_RING_MIN, \
338 WLAN_CFG_NUM_REO_DEST_RING_MAX, \
339 WLAN_CFG_NUM_REO_DEST_RING, \
340 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
341
342#define CFG_DP_TCL_DATA_RINGS \
343 CFG_INI_UINT("dp_tcl_data_rings", \
344 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
345 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
346 WLAN_CFG_NUM_TCL_DATA_RINGS, \
347 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
348
349#define CFG_DP_TX_DESC \
350 CFG_INI_UINT("dp_tx_desc", \
351 WLAN_CFG_NUM_TX_DESC_MIN, \
352 WLAN_CFG_NUM_TX_DESC_MAX, \
353 WLAN_CFG_NUM_TX_DESC, \
354 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
355
356#define CFG_DP_TX_EXT_DESC \
357 CFG_INI_UINT("dp_tx_ext_desc", \
358 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
359 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
360 WLAN_CFG_NUM_TX_EXT_DESC, \
361 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
362
363#define CFG_DP_TX_EXT_DESC_POOLS \
364 CFG_INI_UINT("dp_tx_ext_desc_pool", \
365 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
366 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
367 WLAN_CFG_NUM_TXEXT_DESC_POOL, \
368 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
369
370#define CFG_DP_PDEV_RX_RING \
371 CFG_INI_UINT("dp_pdev_rx_ring", \
372 WLAN_CFG_PER_PDEV_RX_RING_MIN, \
373 WLAN_CFG_PER_PDEV_RX_RING_MAX, \
374 WLAN_CFG_PER_PDEV_RX_RING, \
375 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
376
377#define CFG_DP_PDEV_TX_RING \
378 CFG_INI_UINT("dp_pdev_tx_ring", \
379 WLAN_CFG_PER_PDEV_TX_RING_MIN, \
380 WLAN_CFG_PER_PDEV_TX_RING_MAX, \
381 WLAN_CFG_PER_PDEV_TX_RING, \
382 CFG_VALUE_OR_DEFAULT, \
383 "DP PDEV Tx Ring")
384
385#define CFG_DP_RX_DEFRAG_TIMEOUT \
386 CFG_INI_UINT("dp_rx_defrag_timeout", \
387 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
388 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
389 WLAN_CFG_RX_DEFRAG_TIMEOUT, \
390 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
391
392#define CFG_DP_TX_COMPL_RING_SIZE \
393 CFG_INI_UINT("dp_tx_compl_ring_size", \
394 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
395 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
396 WLAN_CFG_TX_COMP_RING_SIZE, \
397 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
398
399#define CFG_DP_TX_RING_SIZE \
400 CFG_INI_UINT("dp_tx_ring_size", \
401 WLAN_CFG_TX_RING_SIZE_MIN,\
402 WLAN_CFG_TX_RING_SIZE_MAX,\
403 WLAN_CFG_TX_RING_SIZE,\
404 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
405
406#define CFG_DP_NSS_COMP_RING_SIZE \
407 CFG_INI_UINT("dp_nss_comp_ring_size", \
408 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
409 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
410 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
411 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
412
413#define CFG_DP_PDEV_LMAC_RING \
414 CFG_INI_UINT("dp_pdev_lmac_ring", \
415 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
416 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
417 WLAN_CFG_PER_PDEV_LMAC_RING, \
418 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
419
420#define CFG_DP_BASE_HW_MAC_ID \
421 CFG_INI_UINT("dp_base_hw_macid", \
422 0, 1, 1, \
423 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
424
425#define CFG_DP_LRO \
426 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
427 "DP LRO Enable")
428
429#define CFG_DP_RX_HASH \
430 CFG_INI_BOOL("dp_rx_hash", true, \
431 "DP Rx Hash")
432
433#define CFG_DP_TSO \
434 CFG_INI_BOOL("TSOEnable", false, \
435 "DP TSO Enabled")
436
437#define CFG_DP_NAPI \
438 CFG_INI_BOOL("dp_napi_enabled", MCL_OR_WIN_VALUE(true, false), \
439 "DP Napi Enabled")
440
441#define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
442 CFG_INI_BOOL("dp_tcp_udp_checksumoffload", true, \
443 "DP TCP UDP Checksum Offload")
444
445#define CFG_DP_DEFRAG_TIMEOUT_CHECK \
446 CFG_INI_BOOL("dp_defrag_timeout_check", true, \
447 "DP Defrag Timeout Check")
448
449#define CFG_DP_WBM_RELEASE_RING \
450 CFG_INI_UINT("dp_wbm_release_ring", \
451 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
452 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
453 WLAN_CFG_WBM_RELEASE_RING_SIZE, \
454 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
455
456#define CFG_DP_TCL_CMD_RING \
457 CFG_INI_UINT("dp_tcl_cmd_ring", \
458 WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \
459 WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \
460 WLAN_CFG_TCL_CMD_RING_SIZE, \
461 CFG_VALUE_OR_DEFAULT, "DP TCL command ring")
462
463#define CFG_DP_TCL_STATUS_RING \
464 CFG_INI_UINT("dp_tcl_status_ring",\
465 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
466 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
467 WLAN_CFG_TCL_STATUS_RING_SIZE, \
468 CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
469
470#define CFG_DP_REO_REINJECT_RING \
471 CFG_INI_UINT("dp_reo_reinject_ring", \
472 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
473 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
474 WLAN_CFG_REO_REINJECT_RING_SIZE, \
475 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
476
477#define CFG_DP_RX_RELEASE_RING \
478 CFG_INI_UINT("dp_rx_release_ring", \
479 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
480 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
481 WLAN_CFG_RX_RELEASE_RING_SIZE, \
482 CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
483
484#define CFG_DP_REO_EXCEPTION_RING \
485 CFG_INI_UINT("dp_reo_exception_ring", \
486 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
487 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
488 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
489 CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
490
491#define CFG_DP_REO_CMD_RING \
492 CFG_INI_UINT("dp_reo_cmd_ring", \
493 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
494 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
495 WLAN_CFG_REO_CMD_RING_SIZE, \
496 CFG_VALUE_OR_DEFAULT, "DP REO command ring")
497
498#define CFG_DP_REO_STATUS_RING \
499 CFG_INI_UINT("dp_reo_status_ring", \
500 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
501 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
502 WLAN_CFG_REO_STATUS_RING_SIZE, \
503 CFG_VALUE_OR_DEFAULT, "DP REO status ring")
504
505#define CFG_DP_RXDMA_BUF_RING \
506 CFG_INI_UINT("dp_rxdma_buf_ring", \
507 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
508 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
509 WLAN_CFG_RXDMA_BUF_RING_SIZE, \
510 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
511
512#define CFG_DP_RXDMA_REFILL_RING \
513 CFG_INI_UINT("dp_rxdma_refill_ring", \
514 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
515 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
516 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
517 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
518
519#define CFG_DP_RXDMA_MONITOR_BUF_RING \
520 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
521 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
522 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
523 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
524 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
525
526#define CFG_DP_RXDMA_MONITOR_DST_RING \
527 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
528 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
529 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
530 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
531 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
532
533#define CFG_DP_RXDMA_MONITOR_STATUS_RING \
534 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
535 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
536 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
537 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
538 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
539
540#define CFG_DP_RXDMA_MONITOR_DESC_RING \
541 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
542 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
543 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
544 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
545 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
546
547#define CFG_DP_RXDMA_ERR_DST_RING \
548 CFG_INI_UINT("dp_rxdma_err_dst_ring", \
549 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
550 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
551 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
552 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
553
554#define CFG_DP \
555 CFG(CFG_DP_HTT_PACKET_TYPE) \
556 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
557 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
558 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
559 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
560 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
561 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
562 CFG(CFG_DP_MAX_ALLOC_SIZE) \
563 CFG(CFG_DP_MAX_CLIENTS) \
564 CFG(CFG_DP_MAX_PEER_ID) \
565 CFG(CFG_DP_REO_DEST_RINGS) \
566 CFG(CFG_DP_TCL_DATA_RINGS) \
567 CFG(CFG_DP_TX_DESC) \
568 CFG(CFG_DP_TX_EXT_DESC) \
569 CFG(CFG_DP_TX_EXT_DESC_POOLS) \
570 CFG(CFG_DP_PDEV_RX_RING) \
571 CFG(CFG_DP_PDEV_TX_RING) \
572 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
573 CFG(CFG_DP_TX_COMPL_RING_SIZE) \
574 CFG(CFG_DP_TX_RING_SIZE) \
575 CFG(CFG_DP_NSS_COMP_RING_SIZE) \
576 CFG(CFG_DP_PDEV_LMAC_RING) \
577 CFG(CFG_DP_BASE_HW_MAC_ID) \
578 CFG(CFG_DP_LRO) \
579 CFG(CFG_DP_RX_HASH) \
580 CFG(CFG_DP_TSO) \
581 CFG(CFG_DP_NAPI) \
582 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
583 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
584 CFG(CFG_DP_WBM_RELEASE_RING) \
585 CFG(CFG_DP_TCL_CMD_RING) \
586 CFG(CFG_DP_TCL_STATUS_RING) \
587 CFG(CFG_DP_REO_REINJECT_RING) \
588 CFG(CFG_DP_RX_RELEASE_RING) \
589 CFG(CFG_DP_REO_EXCEPTION_RING) \
590 CFG(CFG_DP_REO_CMD_RING) \
591 CFG(CFG_DP_REO_STATUS_RING) \
592 CFG(CFG_DP_RXDMA_BUF_RING) \
593 CFG(CFG_DP_RXDMA_REFILL_RING) \
594 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
595 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
596 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
597 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
598 CFG(CFG_DP_RXDMA_ERR_DST_RING)
599
600#endif /* _CFG_DP_H_ */