Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 1 | /* |
Sravan Kumar Kairam | 4c6a8a9 | 2019-01-19 15:55:08 +0530 | [diff] [blame] | 2 | * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved. |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 3 | * |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 8 | * |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 17 | */ |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 18 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 19 | #include "hal_hw_headers.h" |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 20 | #include "hal_api.h" |
Pratik Gandhi | 034cb7c | 2017-11-10 16:46:06 +0530 | [diff] [blame] | 21 | #include "target_type.h" |
Kiran Venkatappa | 8524fdd | 2016-12-02 13:49:30 +0530 | [diff] [blame] | 22 | #include "wcss_version.h" |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 23 | #include "qdf_module.h" |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 24 | #ifdef QCA_WIFI_QCA8074 |
| 25 | void hal_qca6290_attach(struct hal_soc *hal); |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 26 | #endif |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 27 | #ifdef QCA_WIFI_QCA8074 |
| 28 | void hal_qca8074_attach(struct hal_soc *hal); |
Naveen Rawat | ba24c48 | 2017-05-15 12:02:48 -0700 | [diff] [blame] | 29 | #endif |
Balamurugan Mahalingam | 6a2601a | 2019-06-03 21:38:12 +0530 | [diff] [blame] | 30 | #if defined(QCA_WIFI_QCA8074V2) || defined(QCA_WIFI_QCA6018) |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 31 | void hal_qca8074v2_attach(struct hal_soc *hal); |
| 32 | #endif |
Balamurugan Mahalingam | 6cf4c27 | 2018-07-05 16:50:09 +0530 | [diff] [blame] | 33 | #ifdef QCA_WIFI_QCA6390 |
| 34 | void hal_qca6390_attach(struct hal_soc *hal); |
| 35 | #endif |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 36 | #ifdef QCA_WIFI_QCN9000 |
| 37 | void hal_qcn9000_attach(struct hal_soc *hal); |
| 38 | #endif |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 39 | |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 40 | #ifdef ENABLE_VERBOSE_DEBUG |
| 41 | bool is_hal_verbose_debug_enabled; |
| 42 | #endif |
| 43 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 44 | /** |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 45 | * hal_get_srng_ring_id() - get the ring id of a descriped ring |
| 46 | * @hal: hal_soc data structure |
| 47 | * @ring_type: type enum describing the ring |
| 48 | * @ring_num: which ring of the ring type |
| 49 | * @mac_id: which mac does the ring belong to (or 0 for non-lmac rings) |
| 50 | * |
| 51 | * Return: the ring id or -EINVAL if the ring does not exist. |
| 52 | */ |
| 53 | static int hal_get_srng_ring_id(struct hal_soc *hal, int ring_type, |
| 54 | int ring_num, int mac_id) |
| 55 | { |
| 56 | struct hal_hw_srng_config *ring_config = |
| 57 | HAL_SRNG_CONFIG(hal, ring_type); |
| 58 | int ring_id; |
| 59 | |
| 60 | if (ring_num >= ring_config->max_rings) { |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 61 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO, |
| 62 | "%s: ring_num exceeded maximum no. of supported rings", |
| 63 | __func__); |
Manoj Ekbote | 376116e | 2017-12-19 10:44:41 -0800 | [diff] [blame] | 64 | /* TODO: This is a programming error. Assert if this happens */ |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 65 | return -EINVAL; |
| 66 | } |
| 67 | |
| 68 | if (ring_config->lmac_ring) { |
| 69 | ring_id = ring_config->start_ring_id + ring_num + |
| 70 | (mac_id * HAL_MAX_RINGS_PER_LMAC); |
| 71 | } else { |
| 72 | ring_id = ring_config->start_ring_id + ring_num; |
| 73 | } |
| 74 | |
| 75 | return ring_id; |
| 76 | } |
| 77 | |
| 78 | static struct hal_srng *hal_get_srng(struct hal_soc *hal, int ring_id) |
| 79 | { |
| 80 | /* TODO: Should we allocate srng structures dynamically? */ |
| 81 | return &(hal->srng_list[ring_id]); |
| 82 | } |
| 83 | |
| 84 | #define HP_OFFSET_IN_REG_START 1 |
| 85 | #define OFFSET_FROM_HP_TO_TP 4 |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 86 | static void hal_update_srng_hp_tp_address(struct hal_soc *hal_soc, |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 87 | int shadow_config_index, |
| 88 | int ring_type, |
| 89 | int ring_num) |
| 90 | { |
| 91 | struct hal_srng *srng; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 92 | int ring_id; |
Pramod Simha | 627278c | 2018-08-14 11:58:29 -0700 | [diff] [blame] | 93 | struct hal_hw_srng_config *ring_config = |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 94 | HAL_SRNG_CONFIG(hal_soc, ring_type); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 95 | |
| 96 | ring_id = hal_get_srng_ring_id(hal_soc, ring_type, ring_num, 0); |
| 97 | if (ring_id < 0) |
| 98 | return; |
| 99 | |
| 100 | srng = hal_get_srng(hal_soc, ring_id); |
| 101 | |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 102 | if (ring_config->ring_dir == HAL_SRNG_DST_RING) { |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 103 | srng->u.dst_ring.tp_addr = SHADOW_REGISTER(shadow_config_index) |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 104 | + hal_soc->dev_base_addr; |
Mohit Khanna | efdae7f | 2018-11-02 16:19:48 -0700 | [diff] [blame] | 105 | hal_debug("tp_addr=%pK dev base addr %pK index %u", |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 106 | srng->u.dst_ring.tp_addr, hal_soc->dev_base_addr, |
Mohit Khanna | efdae7f | 2018-11-02 16:19:48 -0700 | [diff] [blame] | 107 | shadow_config_index); |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 108 | } else { |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 109 | srng->u.src_ring.hp_addr = SHADOW_REGISTER(shadow_config_index) |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 110 | + hal_soc->dev_base_addr; |
Mohit Khanna | efdae7f | 2018-11-02 16:19:48 -0700 | [diff] [blame] | 111 | hal_debug("hp_addr=%pK dev base addr %pK index %u", |
| 112 | srng->u.src_ring.hp_addr, |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 113 | hal_soc->dev_base_addr, shadow_config_index); |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 114 | } |
| 115 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | QDF_STATUS hal_set_one_shadow_config(void *hal_soc, |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 119 | int ring_type, |
| 120 | int ring_num) |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 121 | { |
| 122 | uint32_t target_register; |
| 123 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 124 | struct hal_hw_srng_config *srng_config = &hal->hw_srng_table[ring_type]; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 125 | int shadow_config_index = hal->num_shadow_registers_configured; |
| 126 | |
| 127 | if (shadow_config_index >= MAX_SHADOW_REGISTERS) { |
| 128 | QDF_ASSERT(0); |
| 129 | return QDF_STATUS_E_RESOURCES; |
| 130 | } |
| 131 | |
| 132 | hal->num_shadow_registers_configured++; |
| 133 | |
| 134 | target_register = srng_config->reg_start[HP_OFFSET_IN_REG_START]; |
| 135 | target_register += (srng_config->reg_size[HP_OFFSET_IN_REG_START] |
| 136 | *ring_num); |
| 137 | |
| 138 | /* if the ring is a dst ring, we need to shadow the tail pointer */ |
| 139 | if (srng_config->ring_dir == HAL_SRNG_DST_RING) |
| 140 | target_register += OFFSET_FROM_HP_TO_TP; |
| 141 | |
| 142 | hal->shadow_config[shadow_config_index].addr = target_register; |
| 143 | |
| 144 | /* update hp/tp addr in the hal_soc structure*/ |
| 145 | hal_update_srng_hp_tp_address(hal_soc, shadow_config_index, ring_type, |
| 146 | ring_num); |
| 147 | |
Mohit Khanna | efdae7f | 2018-11-02 16:19:48 -0700 | [diff] [blame] | 148 | hal_debug("target_reg %x, shadow register 0x%x shadow_index 0x%x, ring_type %d, ring num %d", |
| 149 | target_register, |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 150 | SHADOW_REGISTER(shadow_config_index), |
| 151 | shadow_config_index, |
| 152 | ring_type, ring_num); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 153 | |
| 154 | return QDF_STATUS_SUCCESS; |
| 155 | } |
| 156 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 157 | qdf_export_symbol(hal_set_one_shadow_config); |
| 158 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 159 | QDF_STATUS hal_construct_shadow_config(void *hal_soc) |
| 160 | { |
| 161 | int ring_type, ring_num; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 162 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 163 | |
| 164 | for (ring_type = 0; ring_type < MAX_RING_TYPES; ring_type++) { |
| 165 | struct hal_hw_srng_config *srng_config = |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 166 | &hal->hw_srng_table[ring_type]; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 167 | |
| 168 | if (ring_type == CE_SRC || |
| 169 | ring_type == CE_DST || |
| 170 | ring_type == CE_DST_STATUS) |
| 171 | continue; |
| 172 | |
| 173 | if (srng_config->lmac_ring) |
| 174 | continue; |
| 175 | |
| 176 | for (ring_num = 0; ring_num < srng_config->max_rings; |
| 177 | ring_num++) |
| 178 | hal_set_one_shadow_config(hal_soc, ring_type, ring_num); |
| 179 | } |
| 180 | |
| 181 | return QDF_STATUS_SUCCESS; |
| 182 | } |
| 183 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 184 | qdf_export_symbol(hal_construct_shadow_config); |
| 185 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 186 | void hal_get_shadow_config(void *hal_soc, |
| 187 | struct pld_shadow_reg_v2_cfg **shadow_config, |
| 188 | int *num_shadow_registers_configured) |
| 189 | { |
| 190 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
| 191 | |
| 192 | *shadow_config = hal->shadow_config; |
| 193 | *num_shadow_registers_configured = |
| 194 | hal->num_shadow_registers_configured; |
| 195 | |
| 196 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 197 | "%s", __func__); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 198 | } |
| 199 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 200 | qdf_export_symbol(hal_get_shadow_config); |
| 201 | |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 202 | |
| 203 | static void hal_validate_shadow_register(struct hal_soc *hal, |
| 204 | uint32_t *destination, |
| 205 | uint32_t *shadow_address) |
| 206 | { |
| 207 | unsigned int index; |
| 208 | uint32_t *shadow_0_offset = SHADOW_REGISTER(0) + hal->dev_base_addr; |
| 209 | int destination_ba_offset = |
| 210 | ((char *)destination) - (char *)hal->dev_base_addr; |
| 211 | |
| 212 | index = shadow_address - shadow_0_offset; |
| 213 | |
sumedh baikady | 668d867 | 2018-03-19 17:48:41 -0700 | [diff] [blame] | 214 | if (index >= MAX_SHADOW_REGISTERS) { |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 215 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 216 | "%s: index %x out of bounds", __func__, index); |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 217 | goto error; |
| 218 | } else if (hal->shadow_config[index].addr != destination_ba_offset) { |
| 219 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 220 | "%s: sanity check failure, expected %x, found %x", |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 221 | __func__, destination_ba_offset, |
| 222 | hal->shadow_config[index].addr); |
| 223 | goto error; |
| 224 | } |
| 225 | return; |
| 226 | error: |
Jeff Johnson | 05503ee | 2017-09-18 10:13:10 -0700 | [diff] [blame] | 227 | qdf_print("%s: baddr %pK, desination %pK, shadow_address %pK s0offset %pK index %x", |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 228 | __func__, hal->dev_base_addr, destination, shadow_address, |
| 229 | shadow_0_offset, index); |
| 230 | QDF_BUG(0); |
| 231 | return; |
| 232 | } |
| 233 | |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 234 | static void hal_target_based_configure(struct hal_soc *hal) |
| 235 | { |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 236 | switch (hal->target_type) { |
| 237 | #ifdef QCA_WIFI_QCA6290 |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 238 | case TARGET_TYPE_QCA6290: |
| 239 | hal->use_register_windowing = true; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 240 | hal_qca6290_attach(hal); |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 241 | break; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 242 | #endif |
Balamurugan Mahalingam | 6cf4c27 | 2018-07-05 16:50:09 +0530 | [diff] [blame] | 243 | #ifdef QCA_WIFI_QCA6390 |
| 244 | case TARGET_TYPE_QCA6390: |
| 245 | hal->use_register_windowing = true; |
| 246 | hal_qca6390_attach(hal); |
| 247 | break; |
| 248 | #endif |
Akshay Kosigi | 283e235 | 2019-06-19 14:33:47 +0530 | [diff] [blame] | 249 | #if defined(QCA_WIFI_QCA8074) && defined(WIFI_TARGET_TYPE_3_0) |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 250 | case TARGET_TYPE_QCA8074: |
| 251 | hal_qca8074_attach(hal); |
| 252 | break; |
| 253 | #endif |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 254 | |
Akshay Kosigi | 283e235 | 2019-06-19 14:33:47 +0530 | [diff] [blame] | 255 | #if defined(QCA_WIFI_QCA8074V2) |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 256 | case TARGET_TYPE_QCA8074V2: |
| 257 | hal_qca8074v2_attach(hal); |
| 258 | break; |
| 259 | #endif |
Basamma Yakkanahalli | 5f7cfd4 | 2018-11-02 15:52:37 +0530 | [diff] [blame] | 260 | |
Akshay Kosigi | 283e235 | 2019-06-19 14:33:47 +0530 | [diff] [blame] | 261 | #if defined(QCA_WIFI_QCA6018) |
Basamma Yakkanahalli | 5f7cfd4 | 2018-11-02 15:52:37 +0530 | [diff] [blame] | 262 | case TARGET_TYPE_QCA6018: |
Balamurugan Mahalingam | 6a2601a | 2019-06-03 21:38:12 +0530 | [diff] [blame] | 263 | hal_qca8074v2_attach(hal); |
Basamma Yakkanahalli | 5f7cfd4 | 2018-11-02 15:52:37 +0530 | [diff] [blame] | 264 | break; |
| 265 | #endif |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 266 | |
| 267 | #ifdef QCA_WIFI_QCN9000 |
| 268 | case TARGET_TYPE_QCN9000: |
| 269 | hal->use_register_windowing = true; |
| 270 | hal_qcn9000_attach(hal); |
| 271 | break; |
| 272 | #endif |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 273 | default: |
| 274 | break; |
| 275 | } |
| 276 | } |
| 277 | |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 278 | uint32_t hal_get_target_type(hal_soc_handle_t hal_soc_hdl) |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 279 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 280 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 281 | struct hif_target_info *tgt_info = |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 282 | hif_get_target_info_handle(hal_soc->hif_handle); |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 283 | |
| 284 | return tgt_info->target_type; |
| 285 | } |
| 286 | |
| 287 | qdf_export_symbol(hal_get_target_type); |
| 288 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 289 | /** |
Jeff Johnson | f7aed49 | 2018-05-12 11:14:55 -0700 | [diff] [blame] | 290 | * hal_attach - Initialize HAL layer |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 291 | * @hif_handle: Opaque HIF handle |
| 292 | * @qdf_dev: QDF device |
| 293 | * |
| 294 | * Return: Opaque HAL SOC handle |
| 295 | * NULL on failure (if given ring is not available) |
| 296 | * |
| 297 | * This function should be called as part of HIF initialization (for accessing |
| 298 | * copy engines). DP layer will get hal_soc handle using hif_get_hal_handle() |
| 299 | * |
| 300 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 301 | void *hal_attach(struct hif_opaque_softc *hif_handle, qdf_device_t qdf_dev) |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 302 | { |
| 303 | struct hal_soc *hal; |
| 304 | int i; |
| 305 | |
| 306 | hal = qdf_mem_malloc(sizeof(*hal)); |
| 307 | |
| 308 | if (!hal) { |
| 309 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 310 | "%s: hal_soc allocation failed", __func__); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 311 | goto fail0; |
| 312 | } |
Karunakar Dasineni | a46da42 | 2019-06-19 10:37:17 -0700 | [diff] [blame] | 313 | qdf_minidump_log(hal, sizeof(*hal), "hal_soc"); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 314 | hal->hif_handle = hif_handle; |
| 315 | hal->dev_base_addr = hif_get_dev_ba(hif_handle); |
| 316 | hal->qdf_dev = qdf_dev; |
| 317 | hal->shadow_rdptr_mem_vaddr = (uint32_t *)qdf_mem_alloc_consistent( |
Kiran Venkatappa | 6768509 | 2016-10-19 11:57:37 +0530 | [diff] [blame] | 318 | qdf_dev, qdf_dev->dev, sizeof(*(hal->shadow_rdptr_mem_vaddr)) * |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 319 | HAL_SRNG_ID_MAX, &(hal->shadow_rdptr_mem_paddr)); |
| 320 | if (!hal->shadow_rdptr_mem_paddr) { |
| 321 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 322 | "%s: hal->shadow_rdptr_mem_paddr allocation failed", |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 323 | __func__); |
| 324 | goto fail1; |
| 325 | } |
Sravan Kumar Kairam | 4c6a8a9 | 2019-01-19 15:55:08 +0530 | [diff] [blame] | 326 | qdf_mem_zero(hal->shadow_rdptr_mem_vaddr, |
| 327 | sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 328 | |
| 329 | hal->shadow_wrptr_mem_vaddr = |
Kiran Venkatappa | 6768509 | 2016-10-19 11:57:37 +0530 | [diff] [blame] | 330 | (uint32_t *)qdf_mem_alloc_consistent(qdf_dev, qdf_dev->dev, |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 331 | sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS, |
| 332 | &(hal->shadow_wrptr_mem_paddr)); |
| 333 | if (!hal->shadow_wrptr_mem_vaddr) { |
| 334 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 335 | "%s: hal->shadow_wrptr_mem_vaddr allocation failed", |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 336 | __func__); |
| 337 | goto fail2; |
| 338 | } |
Sravan Kumar Kairam | 4c6a8a9 | 2019-01-19 15:55:08 +0530 | [diff] [blame] | 339 | qdf_mem_zero(hal->shadow_wrptr_mem_vaddr, |
| 340 | sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 341 | |
| 342 | for (i = 0; i < HAL_SRNG_ID_MAX; i++) { |
| 343 | hal->srng_list[i].initialized = 0; |
| 344 | hal->srng_list[i].ring_id = i; |
| 345 | } |
| 346 | |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 347 | qdf_spinlock_create(&hal->register_access_lock); |
| 348 | hal->register_window = 0; |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 349 | hal->target_type = hal_get_target_type(hal_soc_to_hal_soc_handle(hal)); |
Houston Hoffman | 61dad49 | 2017-04-07 17:09:34 -0700 | [diff] [blame] | 350 | |
| 351 | hal_target_based_configure(hal); |
| 352 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 353 | return (void *)hal; |
| 354 | |
| 355 | fail2: |
Houston Hoffman | e1961b6 | 2016-10-17 19:29:55 -0700 | [diff] [blame] | 356 | qdf_mem_free_consistent(qdf_dev, qdf_dev->dev, |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 357 | sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX, |
| 358 | hal->shadow_rdptr_mem_vaddr, hal->shadow_rdptr_mem_paddr, 0); |
| 359 | fail1: |
| 360 | qdf_mem_free(hal); |
| 361 | fail0: |
| 362 | return NULL; |
| 363 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 364 | qdf_export_symbol(hal_attach); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 365 | |
| 366 | /** |
Jeff Johnson | f7aed49 | 2018-05-12 11:14:55 -0700 | [diff] [blame] | 367 | * hal_mem_info - Retrieve hal memory base address |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 368 | * |
| 369 | * @hal_soc: Opaque HAL SOC handle |
| 370 | * @mem: pointer to structure to be updated with hal mem info |
| 371 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 372 | void hal_get_meminfo(hal_soc_handle_t hal_soc_hdl, struct hal_mem_info *mem) |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 373 | { |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 374 | struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 375 | mem->dev_base_addr = (void *)hal->dev_base_addr; |
| 376 | mem->shadow_rdptr_mem_vaddr = (void *)hal->shadow_rdptr_mem_vaddr; |
| 377 | mem->shadow_wrptr_mem_vaddr = (void *)hal->shadow_wrptr_mem_vaddr; |
| 378 | mem->shadow_rdptr_mem_paddr = (void *)hal->shadow_rdptr_mem_paddr; |
| 379 | mem->shadow_wrptr_mem_paddr = (void *)hal->shadow_wrptr_mem_paddr; |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 380 | hif_read_phy_mem_base((void *)hal->hif_handle, |
| 381 | (qdf_dma_addr_t *)&mem->dev_base_paddr); |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 382 | return; |
| 383 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 384 | qdf_export_symbol(hal_get_meminfo); |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 385 | |
| 386 | /** |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 387 | * hal_detach - Detach HAL layer |
| 388 | * @hal_soc: HAL SOC handle |
| 389 | * |
| 390 | * Return: Opaque HAL SOC handle |
| 391 | * NULL on failure (if given ring is not available) |
| 392 | * |
| 393 | * This function should be called as part of HIF initialization (for accessing |
| 394 | * copy engines). DP layer will get hal_soc handle using hif_get_hal_handle() |
| 395 | * |
| 396 | */ |
| 397 | extern void hal_detach(void *hal_soc) |
| 398 | { |
| 399 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
| 400 | |
Houston Hoffman | e1961b6 | 2016-10-17 19:29:55 -0700 | [diff] [blame] | 401 | qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev, |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 402 | sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX, |
| 403 | hal->shadow_rdptr_mem_vaddr, hal->shadow_rdptr_mem_paddr, 0); |
Houston Hoffman | e1961b6 | 2016-10-17 19:29:55 -0700 | [diff] [blame] | 404 | qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev, |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 405 | sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS, |
| 406 | hal->shadow_wrptr_mem_vaddr, hal->shadow_wrptr_mem_paddr, 0); |
Karunakar Dasineni | a46da42 | 2019-06-19 10:37:17 -0700 | [diff] [blame] | 407 | qdf_minidump_remove(hal); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 408 | qdf_mem_free(hal); |
| 409 | |
| 410 | return; |
| 411 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 412 | qdf_export_symbol(hal_detach); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 413 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 414 | |
| 415 | /** |
Houston Hoffman | 7410912 | 2016-10-21 14:58:34 -0700 | [diff] [blame] | 416 | * hal_ce_dst_setup - Initialize CE destination ring registers |
| 417 | * @hal_soc: HAL SOC handle |
| 418 | * @srng: SRNG ring pointer |
| 419 | */ |
| 420 | static inline void hal_ce_dst_setup(struct hal_soc *hal, struct hal_srng *srng, |
| 421 | int ring_num) |
| 422 | { |
| 423 | uint32_t reg_val = 0; |
| 424 | uint32_t reg_addr; |
| 425 | struct hal_hw_srng_config *ring_config = |
| 426 | HAL_SRNG_CONFIG(hal, CE_DST); |
| 427 | |
| 428 | /* set DEST_MAX_LENGTH according to ce assignment */ |
| 429 | reg_addr = HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR( |
| 430 | ring_config->reg_start[R0_INDEX] + |
| 431 | (ring_num * ring_config->reg_size[R0_INDEX])); |
| 432 | |
| 433 | reg_val = HAL_REG_READ(hal, reg_addr); |
| 434 | reg_val &= ~HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_BMSK; |
| 435 | reg_val |= srng->u.dst_ring.max_buffer_length & |
| 436 | HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_BMSK; |
| 437 | HAL_REG_WRITE(hal, reg_addr, reg_val); |
| 438 | } |
| 439 | |
| 440 | /** |
jiad | 09526ac | 2019-04-12 17:42:40 +0800 | [diff] [blame] | 441 | * hal_reo_read_write_ctrl_ix - Read or write REO_DESTINATION_RING_CTRL_IX |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 442 | * @hal: HAL SOC handle |
jiad | 09526ac | 2019-04-12 17:42:40 +0800 | [diff] [blame] | 443 | * @read: boolean value to indicate if read or write |
| 444 | * @ix0: pointer to store IX0 reg value |
| 445 | * @ix1: pointer to store IX1 reg value |
| 446 | * @ix2: pointer to store IX2 reg value |
| 447 | * @ix3: pointer to store IX3 reg value |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 448 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 449 | void hal_reo_read_write_ctrl_ix(hal_soc_handle_t hal_soc_hdl, bool read, |
| 450 | uint32_t *ix0, uint32_t *ix1, |
| 451 | uint32_t *ix2, uint32_t *ix3) |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 452 | { |
jiad | 09526ac | 2019-04-12 17:42:40 +0800 | [diff] [blame] | 453 | uint32_t reg_offset; |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 454 | struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; |
jiad | 09526ac | 2019-04-12 17:42:40 +0800 | [diff] [blame] | 455 | |
| 456 | if (read) { |
| 457 | if (ix0) { |
| 458 | reg_offset = |
| 459 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR( |
| 460 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 461 | *ix0 = HAL_REG_READ(hal, reg_offset); |
| 462 | } |
| 463 | |
| 464 | if (ix1) { |
| 465 | reg_offset = |
| 466 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR( |
| 467 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 468 | *ix1 = HAL_REG_READ(hal, reg_offset); |
| 469 | } |
| 470 | |
| 471 | if (ix2) { |
| 472 | reg_offset = |
| 473 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR( |
| 474 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 475 | *ix2 = HAL_REG_READ(hal, reg_offset); |
| 476 | } |
| 477 | |
| 478 | if (ix3) { |
| 479 | reg_offset = |
| 480 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR( |
| 481 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 482 | *ix3 = HAL_REG_READ(hal, reg_offset); |
| 483 | } |
| 484 | } else { |
| 485 | if (ix0) { |
| 486 | reg_offset = |
| 487 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR( |
| 488 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 489 | HAL_REG_WRITE(hal, reg_offset, *ix0); |
| 490 | } |
| 491 | |
| 492 | if (ix1) { |
| 493 | reg_offset = |
| 494 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR( |
| 495 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 496 | HAL_REG_WRITE(hal, reg_offset, *ix1); |
| 497 | } |
| 498 | |
| 499 | if (ix2) { |
| 500 | reg_offset = |
| 501 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR( |
| 502 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 503 | HAL_REG_WRITE(hal, reg_offset, *ix2); |
| 504 | } |
| 505 | |
| 506 | if (ix3) { |
| 507 | reg_offset = |
| 508 | HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR( |
| 509 | SEQ_WCSS_UMAC_REO_REG_OFFSET); |
| 510 | HAL_REG_WRITE(hal, reg_offset, *ix3); |
| 511 | } |
| 512 | } |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 513 | } |
| 514 | |
| 515 | /** |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 516 | * hal_srng_dst_set_hp_paddr() - Set physical address to dest ring head pointer |
| 517 | * @srng: sring pointer |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 518 | * @paddr: physical address |
| 519 | */ |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 520 | void hal_srng_dst_set_hp_paddr(struct hal_srng *srng, |
| 521 | uint64_t paddr) |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 522 | { |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 523 | SRNG_DST_REG_WRITE(srng, HP_ADDR_LSB, |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 524 | paddr & 0xffffffff); |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 525 | SRNG_DST_REG_WRITE(srng, HP_ADDR_MSB, |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 526 | paddr >> 32); |
| 527 | } |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 528 | |
| 529 | /** |
| 530 | * hal_srng_dst_init_hp() - Initilaize destination ring head pointer |
| 531 | * @srng: sring pointer |
| 532 | * @vaddr: virtual address |
| 533 | */ |
| 534 | void hal_srng_dst_init_hp(struct hal_srng *srng, |
| 535 | uint32_t *vaddr) |
| 536 | { |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 537 | if (!srng) |
| 538 | return; |
| 539 | |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 540 | srng->u.dst_ring.hp_addr = vaddr; |
| 541 | SRNG_DST_REG_WRITE(srng, HP, srng->u.dst_ring.cached_hp); |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 542 | |
Mohit Khanna | 81179cb | 2018-08-16 20:50:43 -0700 | [diff] [blame] | 543 | if (vaddr) { |
| 544 | *srng->u.dst_ring.hp_addr = srng->u.dst_ring.cached_hp; |
| 545 | QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, |
| 546 | "hp_addr=%pK, cached_hp=%d, hp=%d", |
| 547 | (void *)srng->u.dst_ring.hp_addr, |
| 548 | srng->u.dst_ring.cached_hp, |
| 549 | *srng->u.dst_ring.hp_addr); |
| 550 | } |
Yun Park | 601d0d8 | 2017-08-28 21:49:31 -0700 | [diff] [blame] | 551 | } |
| 552 | |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 553 | /** |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 554 | * hal_srng_hw_init - Private function to initialize SRNG HW |
| 555 | * @hal_soc: HAL SOC handle |
| 556 | * @srng: SRNG ring pointer |
| 557 | */ |
| 558 | static inline void hal_srng_hw_init(struct hal_soc *hal, |
| 559 | struct hal_srng *srng) |
| 560 | { |
| 561 | if (srng->ring_dir == HAL_SRNG_SRC_RING) |
| 562 | hal_srng_src_hw_init(hal, srng); |
| 563 | else |
| 564 | hal_srng_dst_hw_init(hal, srng); |
| 565 | } |
| 566 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 567 | #ifdef CONFIG_SHADOW_V2 |
| 568 | #define ignore_shadow false |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 569 | #define CHECK_SHADOW_REGISTERS true |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 570 | #else |
| 571 | #define ignore_shadow true |
| 572 | #define CHECK_SHADOW_REGISTERS false |
| 573 | #endif |
| 574 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 575 | /** |
Jeff Johnson | f7aed49 | 2018-05-12 11:14:55 -0700 | [diff] [blame] | 576 | * hal_srng_setup - Initialize HW SRNG ring. |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 577 | * @hal_soc: Opaque HAL SOC handle |
| 578 | * @ring_type: one of the types from hal_ring_type |
| 579 | * @ring_num: Ring number if there are multiple rings of same type (staring |
| 580 | * from 0) |
| 581 | * @mac_id: valid MAC Id should be passed if ring type is one of lmac rings |
| 582 | * @ring_params: SRNG ring params in hal_srng_params structure. |
| 583 | |
| 584 | * Callers are expected to allocate contiguous ring memory of size |
| 585 | * 'num_entries * entry_size' bytes and pass the physical and virtual base |
| 586 | * addresses through 'ring_base_paddr' and 'ring_base_vaddr' in |
| 587 | * hal_srng_params structure. Ring base address should be 8 byte aligned |
| 588 | * and size of each ring entry should be queried using the API |
| 589 | * hal_srng_get_entrysize |
| 590 | * |
| 591 | * Return: Opaque pointer to ring on success |
| 592 | * NULL on failure (if given ring is not available) |
| 593 | */ |
| 594 | void *hal_srng_setup(void *hal_soc, int ring_type, int ring_num, |
| 595 | int mac_id, struct hal_srng_params *ring_params) |
| 596 | { |
| 597 | int ring_id; |
| 598 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
| 599 | struct hal_srng *srng; |
| 600 | struct hal_hw_srng_config *ring_config = |
| 601 | HAL_SRNG_CONFIG(hal, ring_type); |
| 602 | void *dev_base_addr; |
| 603 | int i; |
| 604 | |
Dhanashri Atre | 0215a3e | 2017-02-06 18:27:53 -0800 | [diff] [blame] | 605 | ring_id = hal_get_srng_ring_id(hal_soc, ring_type, ring_num, mac_id); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 606 | if (ring_id < 0) |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 607 | return NULL; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 608 | |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 609 | hal_verbose_debug("mac_id %d ring_id %d", mac_id, ring_id); |
Dhanashri Atre | d4032ab | 2017-01-17 15:05:41 -0800 | [diff] [blame] | 610 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 611 | srng = hal_get_srng(hal_soc, ring_id); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 612 | |
| 613 | if (srng->initialized) { |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 614 | hal_verbose_debug("Ring (ring_type, ring_num) already initialized"); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 615 | return NULL; |
| 616 | } |
| 617 | |
| 618 | dev_base_addr = hal->dev_base_addr; |
| 619 | srng->ring_id = ring_id; |
| 620 | srng->ring_dir = ring_config->ring_dir; |
| 621 | srng->ring_base_paddr = ring_params->ring_base_paddr; |
| 622 | srng->ring_base_vaddr = ring_params->ring_base_vaddr; |
| 623 | srng->entry_size = ring_config->entry_size; |
| 624 | srng->num_entries = ring_params->num_entries; |
| 625 | srng->ring_size = srng->num_entries * srng->entry_size; |
| 626 | srng->ring_size_mask = srng->ring_size - 1; |
| 627 | srng->msi_addr = ring_params->msi_addr; |
| 628 | srng->msi_data = ring_params->msi_data; |
| 629 | srng->intr_timer_thres_us = ring_params->intr_timer_thres_us; |
| 630 | srng->intr_batch_cntr_thres_entries = |
| 631 | ring_params->intr_batch_cntr_thres_entries; |
Houston Hoffman | 8bbc990 | 2017-04-10 14:09:51 -0700 | [diff] [blame] | 632 | srng->hal_soc = hal_soc; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 633 | |
| 634 | for (i = 0 ; i < MAX_SRNG_REG_GROUPS; i++) { |
| 635 | srng->hwreg_base[i] = dev_base_addr + ring_config->reg_start[i] |
| 636 | + (ring_num * ring_config->reg_size[i]); |
| 637 | } |
| 638 | |
| 639 | /* Zero out the entire ring memory */ |
| 640 | qdf_mem_zero(srng->ring_base_vaddr, (srng->entry_size * |
| 641 | srng->num_entries) << 2); |
| 642 | |
| 643 | srng->flags = ring_params->flags; |
| 644 | #ifdef BIG_ENDIAN_HOST |
| 645 | /* TODO: See if we should we get these flags from caller */ |
| 646 | srng->flags |= HAL_SRNG_DATA_TLV_SWAP; |
| 647 | srng->flags |= HAL_SRNG_MSI_SWAP; |
| 648 | srng->flags |= HAL_SRNG_RING_PTR_SWAP; |
| 649 | #endif |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 650 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 651 | if (srng->ring_dir == HAL_SRNG_SRC_RING) { |
| 652 | srng->u.src_ring.hp = 0; |
| 653 | srng->u.src_ring.reap_hp = srng->ring_size - |
| 654 | srng->entry_size; |
| 655 | srng->u.src_ring.tp_addr = |
| 656 | &(hal->shadow_rdptr_mem_vaddr[ring_id]); |
Karunakar Dasineni | 335bbd1 | 2017-06-13 19:23:33 -0700 | [diff] [blame] | 657 | srng->u.src_ring.low_threshold = |
| 658 | ring_params->low_threshold * srng->entry_size; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 659 | if (ring_config->lmac_ring) { |
| 660 | /* For LMAC rings, head pointer updates will be done |
| 661 | * through FW by writing to a shared memory location |
| 662 | */ |
| 663 | srng->u.src_ring.hp_addr = |
| 664 | &(hal->shadow_wrptr_mem_vaddr[ring_id - |
| 665 | HAL_SRNG_LMAC1_ID_START]); |
| 666 | srng->flags |= HAL_SRNG_LMAC_RING; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 667 | } else if (ignore_shadow || (srng->u.src_ring.hp_addr == 0)) { |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 668 | srng->u.src_ring.hp_addr = SRNG_SRC_ADDR(srng, HP); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 669 | |
| 670 | if (CHECK_SHADOW_REGISTERS) { |
| 671 | QDF_TRACE(QDF_MODULE_ID_TXRX, |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 672 | QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 673 | "%s: Ring (%d, %d) missing shadow config", |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 674 | __func__, ring_type, ring_num); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 675 | } |
| 676 | } else { |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 677 | hal_validate_shadow_register(hal, |
| 678 | SRNG_SRC_ADDR(srng, HP), |
| 679 | srng->u.src_ring.hp_addr); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 680 | } |
| 681 | } else { |
| 682 | /* During initialization loop count in all the descriptors |
| 683 | * will be set to zero, and HW will set it to 1 on completing |
| 684 | * descriptor update in first loop, and increments it by 1 on |
| 685 | * subsequent loops (loop count wraps around after reaching |
| 686 | * 0xffff). The 'loop_cnt' in SW ring state is the expected |
| 687 | * loop count in descriptors updated by HW (to be processed |
| 688 | * by SW). |
| 689 | */ |
| 690 | srng->u.dst_ring.loop_cnt = 1; |
| 691 | srng->u.dst_ring.tp = 0; |
| 692 | srng->u.dst_ring.hp_addr = |
| 693 | &(hal->shadow_rdptr_mem_vaddr[ring_id]); |
| 694 | if (ring_config->lmac_ring) { |
| 695 | /* For LMAC rings, tail pointer updates will be done |
| 696 | * through FW by writing to a shared memory location |
| 697 | */ |
| 698 | srng->u.dst_ring.tp_addr = |
| 699 | &(hal->shadow_wrptr_mem_vaddr[ring_id - |
| 700 | HAL_SRNG_LMAC1_ID_START]); |
| 701 | srng->flags |= HAL_SRNG_LMAC_RING; |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 702 | } else if (ignore_shadow || srng->u.dst_ring.tp_addr == 0) { |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 703 | srng->u.dst_ring.tp_addr = SRNG_DST_ADDR(srng, TP); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 704 | |
| 705 | if (CHECK_SHADOW_REGISTERS) { |
| 706 | QDF_TRACE(QDF_MODULE_ID_TXRX, |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 707 | QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 708 | "%s: Ring (%d, %d) missing shadow config", |
Yun Park | fde6b9e | 2017-06-26 17:13:11 -0700 | [diff] [blame] | 709 | __func__, ring_type, ring_num); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 710 | } |
| 711 | } else { |
Houston Hoffman | e3c1a37 | 2017-01-25 11:09:26 -0800 | [diff] [blame] | 712 | hal_validate_shadow_register(hal, |
| 713 | SRNG_DST_ADDR(srng, TP), |
| 714 | srng->u.dst_ring.tp_addr); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 715 | } |
| 716 | } |
| 717 | |
Houston Hoffman | 7410912 | 2016-10-21 14:58:34 -0700 | [diff] [blame] | 718 | if (!(ring_config->lmac_ring)) { |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 719 | hal_srng_hw_init(hal, srng); |
| 720 | |
Houston Hoffman | 7410912 | 2016-10-21 14:58:34 -0700 | [diff] [blame] | 721 | if (ring_type == CE_DST) { |
| 722 | srng->u.dst_ring.max_buffer_length = ring_params->max_buffer_length; |
| 723 | hal_ce_dst_setup(hal, srng, ring_num); |
| 724 | } |
| 725 | } |
| 726 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 727 | SRNG_LOCK_INIT(&srng->lock); |
| 728 | |
Houston Hoffman | 648a918 | 2017-05-21 23:27:50 -0700 | [diff] [blame] | 729 | srng->initialized = true; |
| 730 | |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 731 | return (void *)srng; |
| 732 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 733 | qdf_export_symbol(hal_srng_setup); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 734 | |
| 735 | /** |
| 736 | * hal_srng_cleanup - Deinitialize HW SRNG ring. |
| 737 | * @hal_soc: Opaque HAL SOC handle |
| 738 | * @hal_srng: Opaque HAL SRNG pointer |
| 739 | */ |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 740 | void hal_srng_cleanup(void *hal_soc, hal_ring_handle_t hal_ring_hdl) |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 741 | { |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 742 | struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 743 | SRNG_LOCK_DESTROY(&srng->lock); |
| 744 | srng->initialized = 0; |
| 745 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 746 | qdf_export_symbol(hal_srng_cleanup); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 747 | |
| 748 | /** |
| 749 | * hal_srng_get_entrysize - Returns size of ring entry in bytes |
| 750 | * @hal_soc: Opaque HAL SOC handle |
| 751 | * @ring_type: one of the types from hal_ring_type |
| 752 | * |
| 753 | */ |
| 754 | uint32_t hal_srng_get_entrysize(void *hal_soc, int ring_type) |
| 755 | { |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 756 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 757 | struct hal_hw_srng_config *ring_config = |
| 758 | HAL_SRNG_CONFIG(hal, ring_type); |
| 759 | return ring_config->entry_size << 2; |
| 760 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 761 | qdf_export_symbol(hal_srng_get_entrysize); |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 762 | |
| 763 | /** |
Karunakar Dasineni | d0ea21f | 2017-01-31 22:58:15 -0800 | [diff] [blame] | 764 | * hal_srng_max_entries - Returns maximum possible number of ring entries |
| 765 | * @hal_soc: Opaque HAL SOC handle |
| 766 | * @ring_type: one of the types from hal_ring_type |
| 767 | * |
| 768 | * Return: Maximum number of entries for the given ring_type |
| 769 | */ |
| 770 | uint32_t hal_srng_max_entries(void *hal_soc, int ring_type) |
| 771 | { |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 772 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
Venkata Sharath Chandra Manchala | 9a59bd6 | 2018-06-14 16:53:29 -0700 | [diff] [blame] | 773 | struct hal_hw_srng_config *ring_config = |
| 774 | HAL_SRNG_CONFIG(hal, ring_type); |
| 775 | |
| 776 | return ring_config->max_size / ring_config->entry_size; |
Karunakar Dasineni | d0ea21f | 2017-01-31 22:58:15 -0800 | [diff] [blame] | 777 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 778 | qdf_export_symbol(hal_srng_max_entries); |
Karunakar Dasineni | d0ea21f | 2017-01-31 22:58:15 -0800 | [diff] [blame] | 779 | |
Houston Hoffman | 648a918 | 2017-05-21 23:27:50 -0700 | [diff] [blame] | 780 | enum hal_srng_dir hal_srng_get_dir(void *hal_soc, int ring_type) |
| 781 | { |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 782 | struct hal_soc *hal = (struct hal_soc *)hal_soc; |
Houston Hoffman | 648a918 | 2017-05-21 23:27:50 -0700 | [diff] [blame] | 783 | struct hal_hw_srng_config *ring_config = |
| 784 | HAL_SRNG_CONFIG(hal, ring_type); |
| 785 | |
| 786 | return ring_config->ring_dir; |
| 787 | } |
| 788 | |
Karunakar Dasineni | d0ea21f | 2017-01-31 22:58:15 -0800 | [diff] [blame] | 789 | /** |
Kai Liu | b8e1241 | 2018-01-12 16:52:26 +0800 | [diff] [blame] | 790 | * hal_srng_dump - Dump ring status |
| 791 | * @srng: hal srng pointer |
| 792 | */ |
| 793 | void hal_srng_dump(struct hal_srng *srng) |
| 794 | { |
| 795 | if (srng->ring_dir == HAL_SRNG_SRC_RING) { |
| 796 | qdf_print("=== SRC RING %d ===", srng->ring_id); |
| 797 | qdf_print("hp %u, reap_hp %u, tp %u, cached tp %u", |
| 798 | srng->u.src_ring.hp, |
| 799 | srng->u.src_ring.reap_hp, |
| 800 | *srng->u.src_ring.tp_addr, |
| 801 | srng->u.src_ring.cached_tp); |
| 802 | } else { |
| 803 | qdf_print("=== DST RING %d ===", srng->ring_id); |
| 804 | qdf_print("tp %u, hp %u, cached tp %u, loop_cnt %u", |
| 805 | srng->u.dst_ring.tp, |
| 806 | *srng->u.dst_ring.hp_addr, |
| 807 | srng->u.dst_ring.cached_hp, |
| 808 | srng->u.dst_ring.loop_cnt); |
| 809 | } |
| 810 | } |
| 811 | |
| 812 | /** |
Jeff Johnson | f7aed49 | 2018-05-12 11:14:55 -0700 | [diff] [blame] | 813 | * hal_get_srng_params - Retrieve SRNG parameters for a given ring from HAL |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 814 | * |
| 815 | * @hal_soc: Opaque HAL SOC handle |
| 816 | * @hal_ring: Ring pointer (Source or Destination ring) |
| 817 | * @ring_params: SRNG parameters will be returned through this structure |
| 818 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 819 | extern void hal_get_srng_params(hal_soc_handle_t hal_soc_hdl, |
| 820 | hal_ring_handle_t hal_ring_hdl, |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 821 | struct hal_srng_params *ring_params) |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 822 | { |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 823 | struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl; |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 824 | int i =0; |
| 825 | ring_params->ring_id = srng->ring_id; |
| 826 | ring_params->ring_dir = srng->ring_dir; |
| 827 | ring_params->entry_size = srng->entry_size; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 828 | |
| 829 | ring_params->ring_base_paddr = srng->ring_base_paddr; |
| 830 | ring_params->ring_base_vaddr = srng->ring_base_vaddr; |
| 831 | ring_params->num_entries = srng->num_entries; |
| 832 | ring_params->msi_addr = srng->msi_addr; |
| 833 | ring_params->msi_data = srng->msi_data; |
| 834 | ring_params->intr_timer_thres_us = srng->intr_timer_thres_us; |
| 835 | ring_params->intr_batch_cntr_thres_entries = |
| 836 | srng->intr_batch_cntr_thres_entries; |
| 837 | ring_params->low_threshold = srng->u.src_ring.low_threshold; |
| 838 | ring_params->flags = srng->flags; |
Dhanashri Atre | 7351d17 | 2016-10-12 13:08:09 -0700 | [diff] [blame] | 839 | ring_params->ring_id = srng->ring_id; |
Bharat Kumar M | 9e22d3d | 2017-05-08 16:09:32 +0530 | [diff] [blame] | 840 | for (i = 0 ; i < MAX_SRNG_REG_GROUPS; i++) |
| 841 | ring_params->hwreg_base[i] = srng->hwreg_base[i]; |
Karunakar Dasineni | 8fbfeea | 2016-08-31 14:43:27 -0700 | [diff] [blame] | 842 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 843 | qdf_export_symbol(hal_get_srng_params); |