Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 1 | /* |
Naman Padhiar | 7c8bfae | 2019-06-23 12:25:23 +0530 | [diff] [blame] | 2 | * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
| 19 | #ifndef _HAL_REO_H_ |
| 20 | #define _HAL_REO_H_ |
| 21 | |
Venkata Sharath Chandra Manchala | 8e8d8f1 | 2017-01-13 00:00:58 -0800 | [diff] [blame] | 22 | #include <qdf_types.h> |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 23 | /* HW headers */ |
| 24 | #include <reo_descriptor_threshold_reached_status.h> |
| 25 | #include <reo_flush_queue.h> |
| 26 | #include <reo_flush_timeout_list_status.h> |
| 27 | #include <reo_unblock_cache.h> |
| 28 | #include <reo_flush_cache.h> |
| 29 | #include <reo_flush_queue_status.h> |
| 30 | #include <reo_get_queue_stats.h> |
| 31 | #include <reo_unblock_cache_status.h> |
| 32 | #include <reo_flush_cache_status.h> |
| 33 | #include <reo_flush_timeout_list.h> |
| 34 | #include <reo_get_queue_stats_status.h> |
| 35 | #include <reo_update_rx_reo_queue.h> |
| 36 | #include <reo_update_rx_reo_queue_status.h> |
| 37 | #include <tlv_tag_def.h> |
| 38 | |
| 39 | /* SW headers */ |
| 40 | #include "hal_api.h" |
| 41 | |
| 42 | /*--------------------------------------------------------------------------- |
| 43 | Preprocessor definitions and constants |
| 44 | ---------------------------------------------------------------------------*/ |
| 45 | |
| 46 | /* TLV values */ |
| 47 | #define HAL_REO_GET_QUEUE_STATS_TLV WIFIREO_GET_QUEUE_STATS_E |
| 48 | #define HAL_REO_FLUSH_QUEUE_TLV WIFIREO_FLUSH_QUEUE_E |
| 49 | #define HAL_REO_FLUSH_CACHE_TLV WIFIREO_FLUSH_CACHE_E |
| 50 | #define HAL_REO_UNBLOCK_CACHE_TLV WIFIREO_UNBLOCK_CACHE_E |
| 51 | #define HAL_REO_FLUSH_TIMEOUT_LIST_TLV WIFIREO_FLUSH_TIMEOUT_LIST_E |
| 52 | #define HAL_REO_RX_UPDATE_QUEUE_TLV WIFIREO_UPDATE_RX_REO_QUEUE_E |
| 53 | |
| 54 | #define HAL_REO_QUEUE_STATS_STATUS_TLV WIFIREO_GET_QUEUE_STATS_STATUS_E |
| 55 | #define HAL_REO_FLUSH_QUEUE_STATUS_TLV WIFIREO_FLUSH_QUEUE_STATUS_E |
| 56 | #define HAL_REO_FLUSH_CACHE_STATUS_TLV WIFIREO_FLUSH_CACHE_STATUS_E |
| 57 | #define HAL_REO_UNBLK_CACHE_STATUS_TLV WIFIREO_UNBLOCK_CACHE_STATUS_E |
| 58 | #define HAL_REO_TIMOUT_LIST_STATUS_TLV WIFIREO_FLUSH_TIMEOUT_LIST_STATUS_E |
| 59 | #define HAL_REO_DESC_THRES_STATUS_TLV \ |
| 60 | WIFIREO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_E |
| 61 | #define HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV WIFIREO_UPDATE_RX_REO_QUEUE_STATUS_E |
| 62 | |
| 63 | #define HAL_SET_FIELD(block, field, value) \ |
| 64 | ((value << (block ## _ ## field ## _LSB)) & \ |
| 65 | (block ## _ ## field ## _MASK)) |
| 66 | |
| 67 | #define HAL_GET_FIELD(block, field, value) \ |
| 68 | ((value & (block ## _ ## field ## _MASK)) >> \ |
| 69 | (block ## _ ## field ## _LSB)) |
| 70 | |
| 71 | #define HAL_SET_TLV_HDR(desc, tag, len) \ |
| 72 | do { \ |
| 73 | ((struct tlv_32_hdr *) desc)->tlv_tag = tag; \ |
| 74 | ((struct tlv_32_hdr *) desc)->tlv_len = len; \ |
| 75 | } while (0) |
| 76 | |
| 77 | #define HAL_GET_TLV(desc) (((struct tlv_32_hdr *) desc)->tlv_tag) |
| 78 | |
| 79 | #define HAL_OFFSET_DW(_block, _field) (HAL_OFFSET(_block, _field) >> 2) |
| 80 | /* dword offsets in REO cmd TLV */ |
| 81 | #define CMD_HEADER_DW_OFFSET 0 |
| 82 | |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 83 | /** |
| 84 | * enum reo_unblock_cache_type: Enum for unblock type in REO unblock command |
| 85 | * @UNBLOCK_RES_INDEX: Unblock a block resource |
| 86 | * @UNBLOCK_CACHE: Unblock cache |
| 87 | */ |
| 88 | enum reo_unblock_cache_type { |
| 89 | UNBLOCK_RES_INDEX = 0, |
| 90 | UNBLOCK_CACHE = 1 |
| 91 | }; |
| 92 | |
| 93 | /** |
| 94 | * enum reo_thres_index_reg: Enum for reo descriptor usage counter for |
| 95 | * which threshold status is being indicated. |
| 96 | * @reo_desc_counter0_threshold: counter0 reached threshold |
| 97 | * @reo_desc_counter1_threshold: counter1 reached threshold |
| 98 | * @reo_desc_counter2_threshold: counter2 reached threshold |
| 99 | * @reo_desc_counter_sum_threshold: Total count reached threshold |
| 100 | */ |
| 101 | enum reo_thres_index_reg { |
| 102 | reo_desc_counter0_threshold = 0, |
| 103 | reo_desc_counter1_threshold = 1, |
| 104 | reo_desc_counter2_threshold = 2, |
| 105 | reo_desc_counter_sum_threshold = 3 |
| 106 | }; |
| 107 | |
| 108 | /** |
| 109 | * enum reo_cmd_exec_status: Enum for execution status of REO command |
| 110 | * |
| 111 | * @HAL_REO_CMD_SUCCESS: Command has successfully be executed |
| 112 | * @HAL_REO_CMD_BLOCKED: Command could not be executed as the queue or cache |
| 113 | * was blocked |
| 114 | * @HAL_REO_CMD_FAILED: Command has encountered problems when executing, like |
| 115 | * the queue descriptor not being valid |
| 116 | */ |
| 117 | enum reo_cmd_exec_status { |
| 118 | HAL_REO_CMD_SUCCESS = 0, |
| 119 | HAL_REO_CMD_BLOCKED = 1, |
Karunakar Dasineni | 93f633c | 2017-06-02 19:04:46 -0700 | [diff] [blame] | 120 | HAL_REO_CMD_FAILED = 2, |
Karunakar Dasineni | 31b98d4 | 2018-02-27 23:05:08 -0800 | [diff] [blame] | 121 | HAL_REO_CMD_RESOURCE_BLOCKED = 3, |
| 122 | HAL_REO_CMD_DRAIN = 0xff |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 123 | }; |
| 124 | |
| 125 | /** |
| 126 | * enum hal_reo_cmd_type: Enum for REO command type |
| 127 | * @CMD_GET_QUEUE_STATS: Get REO queue status/stats |
| 128 | * @CMD_FLUSH_QUEUE: Flush all frames in REO queue |
| 129 | * @CMD_FLUSH_CACHE: Flush descriptor entries in the cache |
| 130 | * @CMD_UNBLOCK_CACHE: Unblock a descriptor’s address that was blocked |
| 131 | * earlier with a ‘REO_FLUSH_CACHE’ command |
| 132 | * @CMD_FLUSH_TIMEOUT_LIST: Flush buffers/descriptors from timeout list |
| 133 | * @CMD_UPDATE_RX_REO_QUEUE: Update REO queue settings |
| 134 | */ |
| 135 | enum hal_reo_cmd_type { |
| 136 | CMD_GET_QUEUE_STATS = 0, |
| 137 | CMD_FLUSH_QUEUE = 1, |
| 138 | CMD_FLUSH_CACHE = 2, |
| 139 | CMD_UNBLOCK_CACHE = 3, |
| 140 | CMD_FLUSH_TIMEOUT_LIST = 4, |
| 141 | CMD_UPDATE_RX_REO_QUEUE = 5 |
| 142 | }; |
| 143 | |
| 144 | /** |
| 145 | * struct hal_reo_cmd_params_std: Standard REO command parameters |
| 146 | * @need_status: Status required for the command |
| 147 | * @addr_lo: Lower 32 bits of REO queue descriptor address |
| 148 | * @addr_hi: Upper 8 bits of REO queue descriptor address |
| 149 | */ |
| 150 | struct hal_reo_cmd_params_std { |
| 151 | bool need_status; |
| 152 | uint32_t addr_lo; |
| 153 | uint8_t addr_hi; |
| 154 | }; |
| 155 | |
| 156 | /** |
| 157 | * struct hal_reo_cmd_get_queue_stats_params: Parameters to |
| 158 | * CMD_GET_QUEUE_STATScommand |
| 159 | * @clear: Clear stats after retreiving |
| 160 | */ |
| 161 | struct hal_reo_cmd_get_queue_stats_params { |
| 162 | bool clear; |
| 163 | }; |
| 164 | |
| 165 | /** |
| 166 | * struct hal_reo_cmd_flush_queue_params: Parameters to CMD_FLUSH_QUEUE |
| 167 | * @use_after_flush: Block usage after flush till unblock command |
| 168 | * @index: Blocking resource to be used |
| 169 | */ |
| 170 | struct hal_reo_cmd_flush_queue_params { |
Karunakar Dasineni | 4f886f3 | 2017-05-31 22:39:39 -0700 | [diff] [blame] | 171 | bool block_use_after_flush; |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 172 | uint8_t index; |
| 173 | }; |
| 174 | |
| 175 | /** |
| 176 | * struct hal_reo_cmd_flush_cache_params: Parameters to CMD_FLUSH_CACHE |
| 177 | * @fwd_mpdus_in_queue: Forward MPDUs before flushing descriptor |
| 178 | * @rel_block_index: Release blocking resource used earlier |
| 179 | * @cache_block_res_index: Blocking resource to be used |
| 180 | * @flush_no_inval: Flush without invalidatig descriptor |
| 181 | * @use_after_flush: Block usage after flush till unblock command |
| 182 | * @flush_all: Flush entire REO cache |
| 183 | */ |
| 184 | struct hal_reo_cmd_flush_cache_params { |
| 185 | bool fwd_mpdus_in_queue; |
| 186 | bool rel_block_index; |
| 187 | uint8_t cache_block_res_index; |
| 188 | bool flush_no_inval; |
Karunakar Dasineni | 4f886f3 | 2017-05-31 22:39:39 -0700 | [diff] [blame] | 189 | bool block_use_after_flush; |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 190 | bool flush_all; |
| 191 | }; |
| 192 | |
| 193 | /** |
| 194 | * struct hal_reo_cmd_unblock_cache_params: Parameters to CMD_UNBLOCK_CACHE |
| 195 | * @type: Unblock type (enum reo_unblock_cache_type) |
| 196 | * @index: Blocking index to be released |
| 197 | */ |
| 198 | struct hal_reo_cmd_unblock_cache_params { |
| 199 | enum reo_unblock_cache_type type; |
| 200 | uint8_t index; |
| 201 | }; |
| 202 | |
| 203 | /** |
| 204 | * struct hal_reo_cmd_flush_timeout_list_params: Parameters to |
| 205 | * CMD_FLUSH_TIMEOUT_LIST |
| 206 | * @ac_list: AC timeout list to be flushed |
| 207 | * @min_rel_desc: Min. number of link descriptors to be release |
| 208 | * @min_fwd_buf: Min. number of buffers to be forwarded |
| 209 | */ |
| 210 | struct hal_reo_cmd_flush_timeout_list_params { |
| 211 | uint8_t ac_list; |
| 212 | uint16_t min_rel_desc; |
| 213 | uint16_t min_fwd_buf; |
| 214 | }; |
| 215 | |
| 216 | /** |
| 217 | * struct hal_reo_cmd_update_queue_params: Parameters to CMD_UPDATE_RX_REO_QUEUE |
| 218 | * @update_rx_queue_num: Update receive queue number |
| 219 | * @update_vld: Update valid bit |
| 220 | * @update_assoc_link_desc: Update associated link descriptor |
| 221 | * @update_disable_dup_detect: Update duplicate detection |
| 222 | * @update_soft_reorder_enab: Update soft reorder enable |
| 223 | * @update_ac: Update access category |
| 224 | * @update_bar: Update BAR received bit |
| 225 | * @update_rty: Update retry bit |
| 226 | * @update_chk_2k_mode: Update chk_2k_mode setting |
Jeff Johnson | f7aed49 | 2018-05-12 11:14:55 -0700 | [diff] [blame] | 227 | * @update_oor_mode: Update OOR mode setting |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 228 | * @update_ba_window_size: Update BA window size |
| 229 | * @update_pn_check_needed: Update pn_check_needed |
| 230 | * @update_pn_even: Update pn_even |
| 231 | * @update_pn_uneven: Update pn_uneven |
| 232 | * @update_pn_hand_enab: Update pn_handling_enable |
| 233 | * @update_pn_size: Update pn_size |
| 234 | * @update_ignore_ampdu: Update ignore_ampdu |
| 235 | * @update_svld: update svld |
| 236 | * @update_ssn: Update SSN |
| 237 | * @update_seq_2k_err_detect: Update seq_2k_err_detected flag |
| 238 | * @update_pn_err_detect: Update pn_err_detected flag |
| 239 | * @update_pn_valid: Update pn_valid |
| 240 | * @update_pn: Update PN |
| 241 | * @rx_queue_num: rx_queue_num to be updated |
| 242 | * @vld: valid bit to be updated |
| 243 | * @assoc_link_desc: assoc_link_desc counter |
| 244 | * @disable_dup_detect: disable_dup_detect to be updated |
| 245 | * @soft_reorder_enab: soft_reorder_enab to be updated |
| 246 | * @ac: AC to be updated |
| 247 | * @bar: BAR flag to be updated |
| 248 | * @rty: RTY flag to be updated |
| 249 | * @chk_2k_mode: check_2k_mode setting to be updated |
| 250 | * @oor_mode: oor_mode to be updated |
| 251 | * @pn_check_needed: pn_check_needed to be updated |
| 252 | * @pn_even: pn_even to be updated |
| 253 | * @pn_uneven: pn_uneven to be updated |
| 254 | * @pn_hand_enab: pn_handling_enable to be updated |
| 255 | * @ignore_ampdu: ignore_ampdu to be updated |
| 256 | * @ba_window_size: BA window size to be updated |
| 257 | * @pn_size: pn_size to be updated |
| 258 | * @svld: svld flag to be updated |
| 259 | * @ssn: SSN to be updated |
| 260 | * @seq_2k_err_detect: seq_2k_err_detected flag to be updated |
| 261 | * @pn_err_detect: pn_err_detected flag to be updated |
| 262 | * @pn_31_0: PN bits 31-0 |
| 263 | * @pn_63_32: PN bits 63-32 |
| 264 | * @pn_95_64: PN bits 95-64 |
| 265 | * @pn_127_96: PN bits 127-96 |
| 266 | */ |
| 267 | struct hal_reo_cmd_update_queue_params { |
| 268 | uint32_t update_rx_queue_num:1, |
| 269 | update_vld:1, |
| 270 | update_assoc_link_desc:1, |
| 271 | update_disable_dup_detect:1, |
| 272 | update_soft_reorder_enab:1, |
| 273 | update_ac:1, |
| 274 | update_bar:1, |
| 275 | update_rty:1, |
| 276 | update_chk_2k_mode:1, |
| 277 | update_oor_mode:1, |
| 278 | update_ba_window_size:1, |
| 279 | update_pn_check_needed:1, |
| 280 | update_pn_even:1, |
| 281 | update_pn_uneven:1, |
| 282 | update_pn_hand_enab:1, |
| 283 | update_pn_size:1, |
| 284 | update_ignore_ampdu:1, |
| 285 | update_svld:1, |
| 286 | update_ssn:1, |
| 287 | update_seq_2k_err_detect:1, |
| 288 | update_pn_err_detect:1, |
| 289 | update_pn_valid:1, |
| 290 | update_pn:1; |
| 291 | uint32_t rx_queue_num:16, |
| 292 | vld:1, |
| 293 | assoc_link_desc:2, |
| 294 | disable_dup_detect:1, |
| 295 | soft_reorder_enab:1, |
| 296 | ac:2, |
| 297 | bar:1, |
| 298 | rty:1, |
| 299 | chk_2k_mode:1, |
| 300 | oor_mode:1, |
| 301 | pn_check_needed:1, |
| 302 | pn_even:1, |
| 303 | pn_uneven:1, |
| 304 | pn_hand_enab:1, |
| 305 | ignore_ampdu:1; |
Gyanranjan Hazarika | 7f9c050 | 2018-07-25 23:26:16 -0700 | [diff] [blame] | 306 | uint32_t ba_window_size:9, |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 307 | pn_size:8, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 308 | svld:1, |
| 309 | ssn:12, |
| 310 | seq_2k_err_detect:1, |
| 311 | pn_err_detect:1; |
| 312 | uint32_t pn_31_0:32; |
| 313 | uint32_t pn_63_32:32; |
| 314 | uint32_t pn_95_64:32; |
| 315 | uint32_t pn_127_96:32; |
| 316 | }; |
| 317 | |
| 318 | /** |
| 319 | * struct hal_reo_cmd_params: Common structure to pass REO command parameters |
| 320 | * @hal_reo_cmd_params_std: Standard parameters |
| 321 | * @u: Union of various REO command parameters |
| 322 | */ |
| 323 | struct hal_reo_cmd_params { |
| 324 | struct hal_reo_cmd_params_std std; |
| 325 | union { |
| 326 | struct hal_reo_cmd_get_queue_stats_params stats_params; |
| 327 | struct hal_reo_cmd_flush_queue_params fl_queue_params; |
| 328 | struct hal_reo_cmd_flush_cache_params fl_cache_params; |
| 329 | struct hal_reo_cmd_unblock_cache_params unblk_cache_params; |
| 330 | struct hal_reo_cmd_flush_timeout_list_params fl_tim_list_params; |
| 331 | struct hal_reo_cmd_update_queue_params upd_queue_params; |
| 332 | } u; |
| 333 | }; |
| 334 | |
| 335 | /** |
| 336 | * struct hal_reo_status_header: Common REO status header |
| 337 | * @cmd_num: Command number |
| 338 | * @exec_time: execution time |
| 339 | * @status: command execution status |
| 340 | * @tstamp: Timestamp of status updated |
| 341 | */ |
| 342 | struct hal_reo_status_header { |
| 343 | uint16_t cmd_num; |
| 344 | uint16_t exec_time; |
| 345 | enum reo_cmd_exec_status status; |
| 346 | uint32_t tstamp; |
| 347 | }; |
| 348 | |
| 349 | /** |
| 350 | * struct hal_reo_queue_status: REO queue status structure |
| 351 | * @header: Common REO status header |
| 352 | * @ssn: SSN of current BA window |
| 353 | * @curr_idx: last forwarded pkt |
| 354 | * @pn_31_0, pn_63_32, pn_95_64, pn_127_96: |
| 355 | * PN number bits extracted from IV field |
| 356 | * @last_rx_enq_tstamp: Last enqueue timestamp |
| 357 | * @last_rx_deq_tstamp: Last dequeue timestamp |
| 358 | * @rx_bitmap_31_0, rx_bitmap_63_32, rx_bitmap_95_64 |
| 359 | * @rx_bitmap_127_96, rx_bitmap_159_128, rx_bitmap_191_160 |
| 360 | * @rx_bitmap_223_192, rx_bitmap_255_224: Each bit corresonds to a frame |
| 361 | * held in re-order queue |
| 362 | * @curr_mpdu_cnt, curr_msdu_cnt: Number of MPDUs and MSDUs in the queue |
| 363 | * @fwd_timeout_cnt: Frames forwarded due to timeout |
| 364 | * @fwd_bar_cnt: Frames forwarded BAR frame |
| 365 | * @dup_cnt: duplicate frames detected |
| 366 | * @frms_in_order_cnt: Frames received in order |
| 367 | * @bar_rcvd_cnt: BAR frame count |
| 368 | * @mpdu_frms_cnt, msdu_frms_cnt, total_cnt: MPDU, MSDU, total frames |
| 369 | processed by REO |
| 370 | * @late_recv_mpdu_cnt; received after window had moved on |
| 371 | * @win_jump_2k: 2K jump count |
| 372 | * @hole_cnt: sequence hole count |
| 373 | */ |
| 374 | struct hal_reo_queue_status { |
| 375 | struct hal_reo_status_header header; |
| 376 | uint16_t ssn; |
| 377 | uint8_t curr_idx; |
| 378 | uint32_t pn_31_0, pn_63_32, pn_95_64, pn_127_96; |
| 379 | uint32_t last_rx_enq_tstamp, last_rx_deq_tstamp; |
| 380 | uint32_t rx_bitmap_31_0, rx_bitmap_63_32, rx_bitmap_95_64; |
| 381 | uint32_t rx_bitmap_127_96, rx_bitmap_159_128, rx_bitmap_191_160; |
| 382 | uint32_t rx_bitmap_223_192, rx_bitmap_255_224; |
| 383 | uint8_t curr_mpdu_cnt, curr_msdu_cnt; |
| 384 | uint8_t fwd_timeout_cnt, fwd_bar_cnt; |
| 385 | uint16_t dup_cnt; |
| 386 | uint32_t frms_in_order_cnt; |
| 387 | uint8_t bar_rcvd_cnt; |
| 388 | uint32_t mpdu_frms_cnt, msdu_frms_cnt, total_cnt; |
| 389 | uint16_t late_recv_mpdu_cnt; |
| 390 | uint8_t win_jump_2k; |
| 391 | uint16_t hole_cnt; |
| 392 | }; |
| 393 | |
| 394 | /** |
| 395 | * struct hal_reo_flush_queue_status: FLUSH_QUEUE status structure |
| 396 | * @header: Common REO status header |
| 397 | * @error: Error detected |
| 398 | */ |
| 399 | struct hal_reo_flush_queue_status { |
| 400 | struct hal_reo_status_header header; |
| 401 | bool error; |
| 402 | }; |
| 403 | |
| 404 | /** |
| 405 | * struct hal_reo_flush_cache_status: FLUSH_CACHE status structure |
| 406 | * @header: Common REO status header |
| 407 | * @error: Error detected |
| 408 | * @block_error: Blocking related error |
| 409 | * @cache_flush_status: Cache hit/miss |
| 410 | * @cache_flush_status_desc_type: type of descriptor flushed |
| 411 | * @cache_flush_cnt: number of lines actually flushed |
| 412 | */ |
| 413 | struct hal_reo_flush_cache_status { |
| 414 | struct hal_reo_status_header header; |
| 415 | bool error; |
| 416 | uint8_t block_error; |
| 417 | bool cache_flush_status; |
| 418 | uint8_t cache_flush_status_desc_type; |
| 419 | uint8_t cache_flush_cnt; |
| 420 | }; |
| 421 | |
| 422 | /** |
| 423 | * struct hal_reo_unblk_cache_status: UNBLOCK_CACHE status structure |
| 424 | * @header: Common REO status header |
| 425 | * @error: error detected |
| 426 | * unblock_type: resoure or cache |
| 427 | */ |
| 428 | struct hal_reo_unblk_cache_status { |
| 429 | struct hal_reo_status_header header; |
| 430 | bool error; |
| 431 | enum reo_unblock_cache_type unblock_type; |
| 432 | }; |
| 433 | |
| 434 | /** |
| 435 | * struct hal_reo_flush_timeout_list_status: FLUSH_TIMEOUT_LIST status structure |
| 436 | * @header: Common REO status header |
| 437 | * @error: error detected |
| 438 | * @list_empty: timeout list empty |
| 439 | * @rel_desc_cnt: number of link descriptors released |
| 440 | * @fwd_buf_cnt: number of buffers forwarded to REO destination ring |
| 441 | */ |
| 442 | struct hal_reo_flush_timeout_list_status { |
| 443 | struct hal_reo_status_header header; |
| 444 | bool error; |
| 445 | bool list_empty; |
| 446 | uint16_t rel_desc_cnt; |
| 447 | uint16_t fwd_buf_cnt; |
| 448 | }; |
| 449 | |
| 450 | /** |
| 451 | * struct hal_reo_desc_thres_reached_status: desc_thres_reached status structure |
| 452 | * @header: Common REO status header |
| 453 | * @thres_index: Index of descriptor threshold counter |
| 454 | * @link_desc_counter0, link_desc_counter1, link_desc_counter2: descriptor |
| 455 | * counter values |
| 456 | * @link_desc_counter_sum: overall descriptor count |
| 457 | */ |
| 458 | struct hal_reo_desc_thres_reached_status { |
| 459 | struct hal_reo_status_header header; |
| 460 | enum reo_thres_index_reg thres_index; |
| 461 | uint32_t link_desc_counter0, link_desc_counter1, link_desc_counter2; |
| 462 | uint32_t link_desc_counter_sum; |
| 463 | }; |
| 464 | |
| 465 | /** |
| 466 | * struct hal_reo_update_rx_queue_status: UPDATE_RX_QUEUE status structure |
| 467 | * @header: Common REO status header |
| 468 | */ |
| 469 | struct hal_reo_update_rx_queue_status { |
| 470 | struct hal_reo_status_header header; |
| 471 | }; |
| 472 | |
| 473 | /** |
| 474 | * union hal_reo_status: Union to pass REO status to callbacks |
| 475 | * @queue_status: Refer to struct hal_reo_queue_status |
| 476 | * @fl_cache_status: Refer to struct hal_reo_flush_cache_status |
| 477 | * @fl_queue_status: Refer to struct hal_reo_flush_queue_status |
| 478 | * @fl_timeout_status: Refer to struct hal_reo_flush_timeout_list_status |
| 479 | * @unblk_cache_status: Refer to struct hal_reo_unblk_cache_status |
| 480 | * @thres_status: struct hal_reo_desc_thres_reached_status |
| 481 | * @rx_queue_status: struct hal_reo_update_rx_queue_status |
| 482 | */ |
| 483 | union hal_reo_status { |
| 484 | struct hal_reo_queue_status queue_status; |
| 485 | struct hal_reo_flush_cache_status fl_cache_status; |
| 486 | struct hal_reo_flush_queue_status fl_queue_status; |
| 487 | struct hal_reo_flush_timeout_list_status fl_timeout_status; |
| 488 | struct hal_reo_unblk_cache_status unblk_cache_status; |
| 489 | struct hal_reo_desc_thres_reached_status thres_status; |
| 490 | struct hal_reo_update_rx_queue_status rx_queue_status; |
| 491 | }; |
| 492 | |
| 493 | /* Prototypes */ |
| 494 | /* REO command ring routines */ |
Naman Padhiar | 7c8bfae | 2019-06-23 12:25:23 +0530 | [diff] [blame] | 495 | void hal_reo_cmd_set_descr_addr(uint32_t *reo_desc, |
| 496 | enum hal_reo_cmd_type type, |
| 497 | uint32_t paddr_lo, |
| 498 | uint8_t paddr_hi); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 499 | int hal_reo_cmd_queue_stats(hal_ring_handle_t hal_ring_hdl, |
| 500 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 501 | struct hal_reo_cmd_params *cmd); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 502 | int hal_reo_cmd_flush_queue(hal_ring_handle_t hal_ring_hdl, |
| 503 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 504 | struct hal_reo_cmd_params *cmd); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 505 | int hal_reo_cmd_flush_cache(hal_ring_handle_t hal_ring_hdl, |
| 506 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 507 | struct hal_reo_cmd_params *cmd); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 508 | int hal_reo_cmd_unblock_cache(hal_ring_handle_t hal_ring_hdl, |
| 509 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 510 | struct hal_reo_cmd_params *cmd); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 511 | int hal_reo_cmd_flush_timeout_list(hal_ring_handle_t hal_ring_hdl, |
| 512 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 513 | struct hal_reo_cmd_params *cmd); |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 514 | int hal_reo_cmd_update_rx_queue(hal_ring_handle_t hal_ring_hdl, |
| 515 | hal_soc_handle_t hal_soc_hdl, |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 516 | struct hal_reo_cmd_params *cmd); |
| 517 | |
| 518 | /* REO status ring routines */ |
| 519 | void hal_reo_queue_stats_status(uint32_t *reo_desc, |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 520 | struct hal_reo_queue_status *st, |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 521 | hal_soc_handle_t hal_soc_hdl); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 522 | void hal_reo_flush_queue_status(uint32_t *reo_desc, |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 523 | struct hal_reo_flush_queue_status *st, |
| 524 | hal_soc_handle_t hal_soc_hdl); |
| 525 | void hal_reo_flush_cache_status(uint32_t *reo_desc, |
| 526 | struct hal_reo_flush_cache_status *st, |
| 527 | hal_soc_handle_t hal_soc_hdl); |
| 528 | void hal_reo_unblock_cache_status(uint32_t *reo_desc, |
| 529 | hal_soc_handle_t hal_soc_hdl, |
| 530 | struct hal_reo_unblk_cache_status *st); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 531 | void hal_reo_flush_timeout_list_status( |
| 532 | uint32_t *reo_desc, |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 533 | struct hal_reo_flush_timeout_list_status *st, |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 534 | hal_soc_handle_t hal_soc_hdl); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 535 | void hal_reo_desc_thres_reached_status( |
| 536 | uint32_t *reo_desc, |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 537 | struct hal_reo_desc_thres_reached_status *st, |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 538 | hal_soc_handle_t hal_soc_hdl); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 539 | void hal_reo_rx_update_queue_status(uint32_t *reo_desc, |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 540 | struct hal_reo_update_rx_queue_status *st, |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 541 | hal_soc_handle_t hal_soc_hdl); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 542 | |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 543 | void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl, |
| 544 | hal_ring_handle_t hal_ring_hdl); |
Manoj Ekbote | 4f0c6b1 | 2016-10-30 16:01:38 -0700 | [diff] [blame] | 545 | |
| 546 | #endif /* _HAL_REO_H */ |