qcacld-3.0: Initial snapshot of ihelium wlan driver

qcacld-3.0: Initial snapshot of ihelium wlan driver
to match code-scanned SU Release 5.0.0.139. This is
open-source version of wlan for next Android release.

Change-Id: Icf598ca97da74f84bea607e4e902d1889806f507
diff --git a/target/inc/a_osapi.h b/target/inc/a_osapi.h
new file mode 100644
index 0000000..0eabec0
--- /dev/null
+++ b/target/inc/a_osapi.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/* ============================================================================== */
+/* This file contains the definitions of the basic atheros data types. */
+/* It is used to map the data types in atheros files to a platform specific */
+/* type. */
+/* */
+/* Author(s): ="Atheros" */
+/* ============================================================================== */
+#ifndef _A_OSAPI_H_
+#define _A_OSAPI_H_
+
+#if defined(__linux__) && !defined(LINUX_EMULATION)
+#include "osapi_linux.h"
+#endif
+
+/*=== the following primitives have the same definition for all platforms ===*/
+
+#define A_COMPILE_TIME_ASSERT(assertion_name, predicate) \
+	typedef char assertion_name[(predicate) ? 1 : -1]
+
+/*
+ * If N is a power of 2, then N and N-1 are orthogonal
+ * (N-1 has all the least-significant bits set which are zero in N)
+ * so  N ^ (N-1) = (N << 1) - 1
+ */
+#define A_COMPILE_TIME_ASSERT_IS_PWR2(assertion_name, value) \
+	A_COMPILE_TIME_ASSERT (assertion_name,			  \
+			       (((value) ^ ((value)-1)) == ((value) << 1) - 1))
+
+#ifndef __ubicom32__
+#define HIF_MALLOC_DIAGMEM(osdev, size, pa, context, retry) \
+	os_malloc_CONSISTENT(osdev, size, pa, context, retry)
+#define HIF_FREE_DIAGMEM(osdev, size, vaddr, pa, context) \
+	OS_FREE_CONSISTENT(osdev, size, vaddr, pa, context)
+#define HIF_DIAGMEM_SYNC(osdev, pa, size, dir, context)
+#else
+#define HIF_MALLOC_DIAGMEM(osdev, size, pa, context, retry) \
+	os_malloc_NONCONSISTENT(osdev, size, pa, context, retry)
+#define HIF_FREE_DIAGMEM(osdev, size, vaddr, pa, context) \
+	OS_FREE_NONCONSISTENT(osdev, size, vaddr, pa, context)
+#define HIF_DIAGMEM_SYNC(osdev, pa, size, dir, context)	\
+	OS_SYNC_SINGLE(osdev, pa, size, dir, context)
+#endif /* ubicom32 */
+
+#endif /* _OSAPI_H_ */
diff --git a/target/inc/a_usb_defs.h b/target/inc/a_usb_defs.h
new file mode 100644
index 0000000..1664a0a
--- /dev/null
+++ b/target/inc/a_usb_defs.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+/*
+ *  Shared USB definitions
+ *
+ *
+ *
+ *
+ */
+
+#ifndef __A_USB_DEFS_H__
+#define __A_USB_DEFS_H__
+
+#ifndef ATH_TARGET
+#include "athstartpack.h"
+#endif
+
+/* USB endpoint definitions */
+
+#define USB_EP_ADDR_APP_CTRL_IN          0x81
+#define USB_EP_ADDR_APP_DATA_IN          0x82
+#define USB_EP_ADDR_APP_DATA2_IN         0x83
+#define USB_EP_ADDR_APP_INT_IN           0x84
+
+#define USB_EP_ADDR_APP_CTRL_OUT         0x01
+#define USB_EP_ADDR_APP_DATA_LP_OUT      0x02
+#define USB_EP_ADDR_APP_DATA_MP_OUT      0x03
+#define USB_EP_ADDR_APP_DATA_HP_OUT      0x04
+
+#define USB_CONTROL_REQ_SEND_BMI_CMD        1
+#define USB_CONTROL_REQ_RECV_BMI_RESP       2
+#define USB_CONTROL_REQ_DIAG_CMD            3
+#define USB_CONTROL_REQ_DIAG_RESP           4
+
+/* #define USB_CONTROL_MAX_BMI_TRANSFER_SIZE   64 */
+#define USB_CONTROL_MAX_BMI_TRANSFER_SIZE   252
+
+#define HIF_BMI_MAX_TRANSFER_SIZE           USB_CONTROL_MAX_BMI_TRANSFER_SIZE
+
+/* 512 Bytes Maxp for High Speed for BULK EP */
+#define USB_HS_BULK_MAXP_SIZE   0x200
+/* 64 Bytes Maxp for Full Speed for BULK EP */
+#define USB_FS_BULK_MAXP_SIZE   0x40
+
+/* diagnostic command defnitions */
+#define USB_CTRL_DIAG_CC_READ       0
+#define USB_CTRL_DIAG_CC_WRITE      1
+#define USB_CTRL_DIAG_CC_WARM_RESET 2
+
+typedef PREPACK struct {
+	A_UINT32 Cmd;
+	A_UINT32 Address;
+	A_UINT32 Value;
+	A_UINT32 _pad[1];
+} POSTPACK USB_CTRL_DIAG_CMD_WRITE;
+
+typedef PREPACK struct {
+	A_UINT32 Cmd;
+	A_UINT32 Address;
+} POSTPACK USB_CTRL_DIAG_CMD_READ;
+
+typedef PREPACK struct {
+	A_UINT32 ReadValue;
+} POSTPACK USB_CTRL_DIAG_RESP_READ;
+
+#define USB_CTRL_MAX_DIAG_CMD_SIZE  (sizeof(USB_CTRL_DIAG_CMD_WRITE))
+#define USB_CTRL_MAX_DIAG_RESP_SIZE (sizeof(USB_CTRL_DIAG_RESP_READ))
+
+#ifndef ATH_TARGET
+#include "athendpack.h"
+#endif
+
+#endif
diff --git a/target/inc/apb_athr_wlan_map.h b/target/inc/apb_athr_wlan_map.h
new file mode 100644
index 0000000..3e48543
--- /dev/null
+++ b/target/inc/apb_athr_wlan_map.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _APB_ATHR_WLAN_MAP_H_
+#define _APB_ATHR_WLAN_MAP_H_
+
+#define RTC_SOC_BASE_ADDRESS                     0x00004000
+#define RTC_WMAC_BASE_ADDRESS                    0x00005000
+#define MAC_COEX_BASE_ADDRESS                    0x00006000
+#define BT_COEX_BASE_ADDRESS                     0x00007000
+#define SOC_PCIE_BASE_ADDRESS                    0x00008000
+#define SOC_CORE_BASE_ADDRESS                    0x00009000
+#define WLAN_UART_BASE_ADDRESS                   0x0000c000
+#define WLAN_SI_BASE_ADDRESS                     0x00010000
+#define WLAN_GPIO_BASE_ADDRESS                   0x00014000
+#define WLAN_ANALOG_INTF_BASE_ADDRESS            0x0001c000
+#define WLAN_MAC_BASE_ADDRESS                    0x00020000
+#define EFUSE_BASE_ADDRESS                       0x00030000
+#define FPGA_REG_BASE_ADDRESS                    0x00039000
+#define WLAN_UART2_BASE_ADDRESS                  0x00054c00
+#define CE_WRAPPER_BASE_ADDRESS                  0x00057000
+#define CE0_BASE_ADDRESS                         0x00057400
+#define CE1_BASE_ADDRESS                         0x00057800
+#define CE2_BASE_ADDRESS                         0x00057c00
+#define CE3_BASE_ADDRESS                         0x00058000
+#define CE4_BASE_ADDRESS                         0x00058400
+#define CE5_BASE_ADDRESS                         0x00058800
+#define CE6_BASE_ADDRESS                         0x00058c00
+#define CE7_BASE_ADDRESS                         0x00059000
+#define DBI_BASE_ADDRESS                         0x00060000
+#define WLAN_MBOX_BASE_ADDRESS                   0x00068000
+#define WLAN_DBG_UART_BASE_ADDRESS               0x00069000
+#define USB_DMA_BASE_ADDRESS                     0x0006a000
+
+#endif /* _APB_ATHR_WLAN_MAP_REG_H_ */
diff --git a/target/inc/athdefs.h b/target/inc/athdefs.h
new file mode 100644
index 0000000..d1ee6cb
--- /dev/null
+++ b/target/inc/athdefs.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __ATHDEFS_H__
+#define __ATHDEFS_H__
+
+/*
+ * This file contains definitions that may be used across both
+ * Host and Target software.  Nothing here is module-dependent
+ * or platform-dependent.
+ */
+
+/*
+ * Generic error codes that can be used by hw, sta, ap, sim, dk
+ * and any other environments. Since these are enums, feel free to
+ * add any more codes that you need.
+ */
+
+typedef enum {
+	A_ERROR = -1,           /* Generic error return */
+	A_OK = 0,               /* success */
+	/* Following values start at 1 */
+	A_DEVICE_NOT_FOUND,     /* not able to find PCI device */
+	A_NO_MEMORY,            /* not able to allocate memory, not available */
+	A_MEMORY_NOT_AVAIL,     /* memory region is not free for mapping */
+	A_NO_FREE_DESC,         /* no free descriptors available */
+	A_BAD_ADDRESS,          /* address does not match descriptor */
+	A_WIN_DRIVER_ERROR,     /* used in NT_HW version, if problem at init */
+	A_REGS_NOT_MAPPED,      /* registers not correctly mapped */
+	A_EPERM,                /* Not superuser */
+	A_EACCES,               /* Access denied */
+	A_ENOENT,               /* No such entry, search failed, etc. */
+	A_EEXIST,               /* The object already exists (can't create) */
+	A_EFAULT,               /* Bad address fault */
+	A_EBUSY,                /* Object is busy */
+	A_EINVAL,               /* Invalid parameter */
+	A_EMSGSIZE,             /* Inappropriate message buffer length */
+	A_ECANCELED,            /* Operation canceled */
+	A_ENOTSUP,              /* Operation not supported */
+	A_ECOMM,                /* Communication error on send */
+	A_EPROTO,               /* Protocol error */
+	A_ENODEV,               /* No such device */
+	A_EDEVNOTUP,            /* device is not UP */
+	A_NO_RESOURCE,          /* No resources for requested operation */
+	A_HARDWARE,             /* Hardware failure */
+	A_PENDING,              /* Asynchronous routine; will send up results la
+	                           ter (typically in callback) */
+	A_EBADCHANNEL,          /* The channel cannot be used */
+	A_DECRYPT_ERROR,        /* Decryption error */
+	A_PHY_ERROR,            /* RX PHY error */
+	A_CONSUMED,             /* Object was consumed */
+	A_CLONE,                /* The buffer is cloned */
+	A_USB_ERROR,            /* Rome USB Target error */
+} A_STATUS;
+
+#define A_SUCCESS(x)        (x == A_OK)
+#define A_FAILED(x)         (!A_SUCCESS(x))
+
+#endif /* __ATHDEFS_H__ */
diff --git a/target/inc/athendpack.h b/target/inc/athendpack.h
new file mode 100644
index 0000000..977909e
--- /dev/null
+++ b/target/inc/athendpack.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifdef VXWORKS
+#endif /* VXWORKS */
+
+#if defined(LINUX) || defined(__linux__)
+#endif /* LINUX */
+
+#ifdef QNX
+#endif /* QNX */
diff --git a/target/inc/bin_sig.h b/target/inc/bin_sig.h
new file mode 100644
index 0000000..b723acc
--- /dev/null
+++ b/target/inc/bin_sig.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2012,2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef BIN_SIGN_H_
+#define BIN_SIGN_H_
+
+#define SIGN_HEADER_MAGIC 0x454D4F52
+
+/* Signed binary MetaData */
+typedef struct {
+	unsigned int magic_num;
+	unsigned int total_len;
+	unsigned int rampatch_len;
+	unsigned int product_id;
+	unsigned int patch_ver;
+	unsigned short sign_format_ver;
+	unsigned short sign_algorithm;
+	unsigned char reserved[8];
+} SIGN_HEADER_T;
+
+#endif /*  BIN_SIGN_H_ */
diff --git a/target/inc/bmi_msg.h b/target/inc/bmi_msg.h
new file mode 100644
index 0000000..11982cf
--- /dev/null
+++ b/target/inc/bmi_msg.h
@@ -0,0 +1,364 @@
+/*
+ * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __BMI_MSG_H__
+#define __BMI_MSG_H__
+
+#ifndef ATH_TARGET
+#include "athstartpack.h"
+#endif
+
+/*
+ * Bootloader Messaging Interface (BMI)
+ *
+ * BMI is a very simple messaging interface used during initialization
+ * to read memory, write memory, execute code, and to define an
+ * application entry PC.
+ *
+ * It is used to download an application to AR6K, to provide
+ * patches to code that is already resident on AR6K, and generally
+ * to examine and modify state.  The Host has an opportunity to use
+ * BMI only once during bootup.  Once the Host issues a BMI_DONE
+ * command, this opportunity ends.
+ *
+ * The Host writes BMI requests to mailbox0, and reads BMI responses
+ * from mailbox0.   BMI requests all begin with a command
+ * (see below for specific commands), and are followed by
+ * command-specific data.
+ *
+ * Flow control:
+ * The Host can only issue a command once the Target gives it a
+ * "BMI Command Credit", using AR6K Counter #4.  As soon as the
+ * Target has completed a command, it issues another BMI Command
+ * Credit (so the Host can issue the next command).
+ *
+ * BMI handles all required Target-side cache flushing.
+ */
+
+/* Maximum data size used for BMI transfers */
+#define BMI_DATASZ_MAX                      256
+
+/* BMI Commands */
+
+#define BMI_NO_COMMAND                      0
+
+#define BMI_DONE                            1
+/*
+ * Semantics: Host is done using BMI
+ * Request format:
+ *    A_UINT32      command (BMI_DONE)
+ * Response format: none
+ */
+
+#define BMI_READ_MEMORY                     2
+/*
+ * Semantics: Host reads AR6K memory
+ * Request format:
+ *    A_UINT32      command (BMI_READ_MEMORY)
+ *    A_UINT32      address
+ *    A_UINT32      length, at most BMI_DATASZ_MAX
+ * Response format:
+ *    A_UINT8       data[length]
+ */
+
+#define BMI_WRITE_MEMORY                    3
+/*
+ * Semantics: Host writes AR6K memory
+ * Request format:
+ *    A_UINT32      command (BMI_WRITE_MEMORY)
+ *    A_UINT32      address
+ *    A_UINT32      length, at most BMI_DATASZ_MAX
+ *    A_UINT8       data[length]
+ * Response format: none
+ */
+/*
+ * Capbility to write "segmented files" is provided for two reasons
+ * 1) backwards compatibility for certain situations where Hosts
+ *    have limited flexibility
+ * 2) because it's darn convenient.
+ *
+ * A segmented file consists of a file header followed by an arbitrary number
+ * of segments.  Each segment contains segment metadata -- a Target address and
+ * a length -- followed by "length" bytes of data. A segmented file ends with
+ * a segment that specifies length=BMI_SGMTFILE_DONE. When a segmented file
+ * is sent to the Target, firmware writes each segment to the specified address.
+ *
+ * Special cases:
+ * 1) If a segment's metadata indicates length=BMI_SGMTFILE_EXEC, then the
+ * specified address is used as a function entry point for a brief function
+ * with prototype "(void *)(void)". That function is called immediately.
+ * After execution of the function completes, firmware continues with the
+ * next segment. No data is expected when length=BMI_SGMTFILE_EXEC.
+ *
+ * 2) If a segment's metadata indicates length=BMI_SGMTFILE_BEGINADDR, then
+ * the specified address is established as the application start address
+ * so that a subsequent BMI_DONE jumps there.
+ *
+ * 3) If a segment's metadata indicates length=BMI_SGMTFILE_BDDATA, then
+ * the specified address is used as the (possibly compressed) length of board
+ * data, which is loaded into the proper Target address as specified by
+ * hi_board_data. In addition, the hi_board_data_initialized flag is set.
+ *
+ * A segmented file is sent to the Target using a sequence of 1 or more
+ * BMI_WRITE_MEMORY commands.  The first such command must have
+ * address=BMI_SEGMENTED_WRITE_ADDR.  Subsequent BMI_WRITE_MEMORY commands
+ * can use an arbitrary address.  In each BMI_WRITE_MEMORY command, the
+ * length specifies the number of data bytes transmitted (except for the
+ * special cases listed above).
+ *
+ * Alternatively, a segmented file may be sent to the Target using a
+ * BMI_LZ_STREAM_START command with address=BMI_SEGMENTED_WRITE_ADDR
+ * followed by a series of BMI_LZ_DATA commands that each send the next portion
+ * of the segmented file.
+ *
+ * The data segments may be lz77 compressed.  In this case, the segmented file
+ * header flag, BMI_SGMTFILE_FLAG_COMPRESS, must be set.  Note that segmented
+ * file METAdata is never compressed; only the data segments themselves are
+ * compressed. There is no way to mix compressed and uncompressed data segments
+ * in a single segmented file. Compressed (or uncompressed) segments are handled
+ * by both BMI_WRITE_MEMORY and by BMI_LZ_DATA commands.  (Compression is an
+ * attribute of the segmented file rather than of the command used to transmit
+ * it.)
+ */
+#define BMI_SEGMENTED_WRITE_ADDR 0x1234
+
+/* File header for a segmented file */
+struct bmi_segmented_file_header {
+	A_UINT32 magic_num;
+	A_UINT32 file_flags;
+};
+#define BMI_SGMTFILE_MAGIC_NUM          0x544d4753      /* "SGMT" */
+#define BMI_SGMTFILE_FLAG_COMPRESS      1
+
+/* Metadata for a segmented file segment */
+struct bmi_segmented_metadata {
+	A_UINT32 addr;
+	A_UINT32 length;
+};
+/* Special values for bmi_segmented_metadata.length (all have high bit set) */
+#define BMI_SGMTFILE_DONE               0xffffffff      /* end of segmented data */
+#define BMI_SGMTFILE_BDDATA             0xfffffffe      /* Board Data segment */
+#define BMI_SGMTFILE_BEGINADDR          0xfffffffd      /* set beginning address */
+#define BMI_SGMTFILE_EXEC               0xfffffffc      /* immediate function execution */
+
+#define BMI_EXECUTE                         4
+/*
+ * Semantics: Causes AR6K to execute code
+ * Request format:
+ *    A_UINT32      command (BMI_EXECUTE)
+ *    A_UINT32      address
+ *    A_UINT32      parameter
+ * Response format:
+ *    A_UINT32      return value
+ */
+/*
+ * Note: In order to support the segmented file feature
+ * (see BMI_WRITE_MEMORY), when the address specified in a
+ * BMI_EXECUTE command matches (same physical address)
+ * BMI_SEGMENTED_WRITE_ADDR, it is ignored. Instead, execution
+ * begins at the address specified by hi_app_start.
+ */
+
+#define BMI_SET_APP_START                   5
+/*
+ * Semantics: Set Target application starting address
+ * Request format:
+ *    A_UINT32      command (BMI_SET_APP_START)
+ *    A_UINT32      address
+ * Response format: none
+ */
+
+#define BMI_READ_SOC_REGISTER               6
+#define BMI_READ_SOC_WORD                   6
+/*
+ * Semantics: Read a 32-bit Target SOC word.
+ * Request format:
+ *    A_UINT32      command (BMI_READ_REGISTER)
+ *    A_UINT32      address
+ * Response format:
+ *    A_UINT32      value
+ */
+
+#define BMI_WRITE_SOC_REGISTER              7
+#define BMI_WRITE_SOC_WORD                  7
+/*
+ * Semantics: Write a 32-bit Target SOC word.
+ * Request format:
+ *    A_UINT32      command (BMI_WRITE_REGISTER)
+ *    A_UINT32      address
+ *    A_UINT32      value
+ *
+ * Response format: none
+ */
+
+#define BMI_GET_TARGET_ID                  8
+#define BMI_GET_TARGET_INFO                8
+/*
+ * Semantics: Fetch the 4-byte Target information
+ * Request format:
+ *    A_UINT32      command (BMI_GET_TARGET_ID/INFO)
+ *
+ * Response format1 (old firmware):
+ *    A_UINT32      TargetVersionID
+ *
+ * Response format2 (intermediate firmware, during transition):
+ *    A_UINT32      TARGET_VERSION_SENTINAL
+ *    struct bmi_target_info;
+ *
+ * Response format3 (newest firmware)
+ *    struct bmi_target_info;
+ */
+#ifdef FEATURE_BMI_2
+PREPACK struct bmi_target_info {
+	/* size of this structure */
+	A_UINT32 target_info_byte_count;
+	A_UINT32 target_ver;
+	A_UINT32 target_type;
+	A_UINT32 flags;
+} POSTPACK;
+#else
+PREPACK struct bmi_target_info {
+	/* size of this structure */
+	A_UINT32 target_info_byte_count;
+	A_UINT32 target_ver;
+	A_UINT32 target_type;
+} POSTPACK;
+#endif
+#define TARGET_VERSION_SENTINAL 0xffffffff
+#define BMI_ROMPATCH_INSTALL               9
+/*
+ * Semantics: Install a ROM Patch.
+ * Request format:
+ *    A_UINT32      command (BMI_ROMPATCH_INSTALL)
+ *    A_UINT32      Target ROM Address
+ *    A_UINT32      Target RAM Address or Value (depending on Target Type)
+ *    A_UINT32      Size, in bytes
+ *    A_UINT32      Activate? 1-->activate;
+ *                            0-->install but do not activate
+ * Response format:
+ *    A_UINT32      PatchID
+ */
+
+#define BMI_ROMPATCH_UNINSTALL             10
+/*
+ * Semantics: Uninstall a previously-installed ROM Patch,
+ * automatically deactivating, if necessary.
+ * Request format:
+ *    A_UINT32      command (BMI_ROMPATCH_UNINSTALL)
+ *    A_UINT32      PatchID
+ *
+ * Response format: none
+ */
+
+#define BMI_ROMPATCH_ACTIVATE              11
+/*
+ * Semantics: Activate a list of previously-installed ROM Patches.
+ * Request format:
+ *    A_UINT32      command (BMI_ROMPATCH_ACTIVATE)
+ *    A_UINT32      rompatch_count
+ *    A_UINT32      PatchID[rompatch_count]
+ *
+ * Response format: none
+ */
+
+#define BMI_ROMPATCH_DEACTIVATE            12
+/*
+ * Semantics: Deactivate a list of active ROM Patches.
+ * Request format:
+ *    A_UINT32      command (BMI_ROMPATCH_DEACTIVATE)
+ *    A_UINT32      rompatch_count
+ *    A_UINT32      PatchID[rompatch_count]
+ *
+ * Response format: none
+ */
+
+#define BMI_LZ_STREAM_START                13
+/*
+ * Semantics: Begin an LZ-compressed stream of input
+ * which is to be uncompressed by the Target to an
+ * output buffer at address.  The output buffer must
+ * be sufficiently large to hold the uncompressed
+ * output from the compressed input stream.  This BMI
+ * command should be followed by a series of 1 or more
+ * BMI_LZ_DATA commands.
+ *    A_UINT32      command (BMI_LZ_STREAM_START)
+ *    A_UINT32      address
+ * Note: Not supported on all versions of ROM firmware.
+ */
+
+#define BMI_LZ_DATA                        14
+/*
+ * Semantics: Host writes AR6K memory with LZ-compressed
+ * data which is uncompressed by the Target.  This command
+ * must be preceded by a BMI_LZ_STREAM_START command. A series
+ * of BMI_LZ_DATA commands are considered part of a single
+ * input stream until another BMI_LZ_STREAM_START is issued.
+ * Request format:
+ *    A_UINT32      command (BMI_LZ_DATA)
+ *    A_UINT32      length (of compressed data),
+ *                  at most BMI_DATASZ_MAX
+ *    A_UINT8       CompressedData[length]
+ * Response format: none
+ * Note: Not supported on all versions of ROM firmware.
+ */
+
+#define BMI_NVRAM_PROCESS                  15
+#define BMI_NVRAM_SEG_NAME_SZ 16
+/*
+ * Semantics: Cause Target to search NVRAM (if any) for a
+ * segment with the specified name and process it according
+ * to NVRAM metadata.
+ * Request format:
+ *    A_UINT32      command (BMI_NVRAM_PROCESS)
+ *    A_UCHAR       name[BMI_NVRAM_SEG_NAME_SZ] name (LE format)
+ * Response format:
+ *    A_UINT32      0, if nothing was executed;
+ *                  otherwise the value returned from the
+ *                  last NVRAM segment that was executed
+ */
+
+#define BMI_SIGN_STREAM_START               17
+/*
+ * Semantics: Trigger target start/end binary signature verification
+ * flow.
+ * Request format:
+ *    A_UINT32      command (BMI_SIGN_STREAM_START)
+ *    A_UINT32      address
+ *    A_UINT32      length, at most BMI_DATASZ_MAX
+ *    A_UINT8       data[length]
+ * Response format: none
+ */
+
+#ifndef ATH_TARGET
+#include "athendpack.h"
+#endif
+
+/* TBDXXX: Need a better place for these */
+#define BMI_CE_NUM_TO_TARG 0
+#define BMI_CE_NUM_TO_HOST 1
+
+#endif /* __BMI_MSG_H__ */
diff --git a/target/inc/cepci.h b/target/inc/cepci.h
new file mode 100644
index 0000000..9cebbc5
--- /dev/null
+++ b/target/inc/cepci.h
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __CEPCI_H__
+#define __CEPCI_H__
+
+/*
+ * Support for Copy Engine over PCI.
+ * Structures shared between Host software and Target firmware.
+ */
+
+/*
+ * Total number of PCIe MSI interrupts requested for all interrupt sources.
+ * PCIe standard forces this to be a power of 2.
+ * Some Host OS's limit MSI requests that can be granted to 8
+ * so for now we abide by this limit and avoid requesting more
+ * than that.
+ */
+#define MSI_NUM_REQUEST_LOG2  4
+#define MSI_NUM_REQUEST       1 /* (1<<MSI_NUM_REQUEST_LOG2) */
+
+/*
+ * Granted MSIs are assigned as follows:
+ *  Firmware uses the first
+ *  Remaining MSIs, if any, are used by Copy Engines
+ * This mapping is known to both Target firmware and Host software.
+ * It may be changed as long as Host and Target are kept in sync.
+ */
+#define MSI_ASSIGN_FW         0 /* 1 MSI for firmware (errors, etc.) */
+#define MSI_ASSIGN_CE_INITIAL 1 /* 7 MSIs for Copy Engines */
+#define MSI_ASSIGN_CE_MAX     7
+
+/*
+ * PCI-specific Target state.  Much of this may be of interest
+ * to the Host so HOST_INTEREST->hi_interconnect_state points
+ * here (and all members are 32-bit quantities in order to
+ * facilitate Host access). In particular, Host software is
+ * required to initialize pipe_cfg_addr and svc_to_pipe_map.
+ */
+struct pcie_state_s {
+	A_UINT32 pipe_cfg_addr; /* Pipe configuration Target address */
+	/* NB: CE_pipe_config[CE_COUNT] */
+
+	A_UINT32 svc_to_pipe_map;       /* Service to pipe map Target address */
+	/* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */
+
+	A_UINT32 MSI_requested; /* number of MSI interrupts requested */
+	A_UINT32 MSI_granted;   /* number of MSI interrupts granted */
+	A_UINT32 MSI_addr;      /* Message Signalled Interrupt address */
+	A_UINT32 MSI_data;      /* Base data */
+	A_UINT32 MSI_fw_intr_data;      /* Data for firmware interrupt;
+	                                   MSI data for other interrupts are
+	                                   in various SoC registers */
+
+	A_UINT32 power_mgmt_method;     /* PCIE_PWR_METHOD_* */
+	A_UINT32 config_flags;  /* PCIE_CONFIG_FLAG_* */
+};
+
+/*
+ * PCIE_CONFIG_FLAG definitions
+ */
+#define PCIE_CONFIG_FLAG_ENABLE_L1          0x0000001
+#define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT    0x0000002
+#define PCIE_CONFIG_FLAG_AXI_CLK_GATE       0x0000004
+
+#define PIPE_TO_CE_MAP_CNT 32   /* simple implementation constant */
+
+/*
+ * Configuration information for a Copy Engine pipe.
+ * Passed from Host to Target during startup (one per CE).
+ */
+struct CE_pipe_config {
+	A_UINT32 pipenum;
+	A_UINT32 pipedir;
+	A_UINT32 nentries;
+	A_UINT32 nbytes_max;
+	A_UINT32 flags;
+	A_UINT32 reserved;
+};
+
+/*
+ * HIA Map Definition
+ */
+struct host_interest_area_t {
+	uint32_t hi_interconnect_state;
+	uint32_t hi_early_alloc;
+	uint32_t hi_option_flag2;
+	uint32_t hi_board_data;
+	uint32_t hi_board_data_initialized;
+	uint32_t hi_failure_state;
+	uint32_t hi_rddi_msi_num;
+	uint32_t hi_pcie_perst_couple_en;
+	uint32_t hi_sw_protocol_version;
+};
+
+struct shadow_reg_cfg {
+	A_UINT16 ce_id;
+	A_UINT16 reg_offset;
+};
+
+#endif /* __CEPCI_H__ */
diff --git a/target/inc/dbglog.h b/target/inc/dbglog.h
new file mode 100644
index 0000000..94cf154
--- /dev/null
+++ b/target/inc/dbglog.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2012, 2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _DBGLOG_H_
+#define _DBGLOG_H_
+
+#ifndef ATH_TARGET
+#include "athstartpack.h"
+#endif
+
+#include "wlan_module_ids.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define DBGLOG_TIMESTAMP_OFFSET          0
+#define DBGLOG_TIMESTAMP_MASK            0xFFFFFFFF     /* Bit 0-15. Contains bit
+	                                                   8-23 of the LF0 timer */
+#define DBGLOG_DBGID_OFFSET              0
+#define DBGLOG_DBGID_MASK                0x000003FF     /* Bit 0-9 */
+#define DBGLOG_DBGID_NUM_MAX             256    /* Upper limit is width of mask */
+
+#define DBGLOG_MODULEID_OFFSET           10
+#define DBGLOG_MODULEID_MASK             0x0003FC00     /* Bit 10-17 */
+#define DBGLOG_MODULEID_NUM_MAX          32     /* Upper limit is width of mask */
+
+#define DBGLOG_VDEVID_OFFSET              18
+#define DBGLOG_VDEVID_MASK                0x03FC0000    /* Bit 20-25 */
+#define DBGLOG_VDEVID_NUM_MAX             16
+
+#define DBGLOG_NUM_ARGS_OFFSET            26
+#define DBGLOG_NUM_ARGS_MASK              0xFC000000    /* Bit 26-31 */
+/* it is limited bcoz of limitations of corebsp MSG*() to accept max 9 arg */
+#define DBGLOG_NUM_ARGS_MAX               9
+
+#define DBGLOG_LOG_BUFFER_SIZE            1500
+#define DBGLOG_DBGID_DEFINITION_LEN_MAX   90
+
+#define DBGLOG_HOST_LOG_BUFFER_SIZE            DBGLOG_LOG_BUFFER_SIZE
+
+#define DBGLOG_GET_DBGID(arg) \
+	((arg & DBGLOG_DBGID_MASK) >> DBGLOG_DBGID_OFFSET)
+
+#define DBGLOG_GET_MODULEID(arg) \
+	((arg & DBGLOG_MODULEID_MASK) >> DBGLOG_MODULEID_OFFSET)
+
+#define DBGLOG_GET_VDEVID(arg) \
+	((arg & DBGLOG_VDEVID_MASK) >> DBGLOG_VDEVID_OFFSET)
+
+#define DBGLOG_GET_NUMARGS(arg)	\
+	((arg & DBGLOG_NUM_ARGS_MASK) >> DBGLOG_NUM_ARGS_OFFSET)
+
+#define DBGLOG_GET_TIME_STAMP(arg) \
+	((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET)
+
+#define DIAG_FWID_OFFSET            24
+#define DIAG_FWID_MASK              0xFF000000  /* Bit 24-31 */
+
+#define DIAG_TIMESTAMP_OFFSET       0
+#define DIAG_TIMESTAMP_MASK         0x00FFFFFF  /* Bit 0-23 */
+
+#define DIAG_ID_OFFSET              16
+#define DIAG_ID_MASK                0xFFFF0000  /* Bit 16-31 */
+
+#define DIAG_VDEVID_OFFSET          11
+#define DIAG_VDEVID_MASK            0x0000F800  /* Bit 11-15 */
+#define DIAG_VDEVID_NUM_MAX         16
+
+#define DIAG_VDEVLEVEL_OFFSET       8
+#define DIAG_VDEVLEVEL_MASK         0x00000700  /* Bit 8-10 */
+
+#define DIAG_PAYLEN_OFFSET          0
+#define DIAG_PAYLEN_MASK            0x000000FF  /* Bit 0-7 */
+
+#define DIAG_PAYLEN_OFFSET16        0
+#define DIAG_PAYLEN_MASK16          0x0000FFFF  /* Bit 0-16 */
+
+#define DIAG_GET_TYPE(arg) \
+	((arg & DIAG_FWID_MASK) >> DIAG_FWID_OFFSET)
+
+#define DIAG_GET_TIME_STAMP(arg) \
+	((arg & DIAG_TIMESTAMP_MASK) >> DIAG_TIMESTAMP_OFFSET)
+
+#define DIAG_GET_ID(arg) \
+	((arg & DIAG_ID_MASK) >> DIAG_ID_OFFSET)
+
+#define DIAG_GET_VDEVID(arg) \
+	((arg & DIAG_VDEVID_MASK) >> DIAG_VDEVID_OFFSET)
+
+#define DIAG_GET_VDEVLEVEL(arg)	\
+	((arg & DIAG_VDEVLEVEL_MASK) >> DIAG_VDEVLEVEL_OFFSET)
+
+#define DIAG_GET_PAYLEN(arg) \
+	((arg & DIAG_PAYLEN_MASK) >> DIAG_PAYLEN_OFFSET)
+
+#define DIAG_GET_PAYLEN16(arg) \
+	((arg & DIAG_PAYLEN_MASK16) >> DIAG_PAYLEN_OFFSET16)
+
+/* Debug Log levels*/
+
+typedef enum {
+	DBGLOG_VERBOSE = 0,
+	DBGLOG_INFO,
+	DBGLOG_INFO_LVL_1,
+	DBGLOG_INFO_LVL_2,
+	DBGLOG_WARN,
+	DBGLOG_ERR,
+	DBGLOG_LVL_MAX
+} DBGLOG_LOG_LVL;
+
+PREPACK struct dbglog_buf_s {
+	struct dbglog_buf_s *next;
+	A_UINT8 *buffer;
+	A_UINT32 bufsize;
+	A_UINT32 length;
+	A_UINT32 count;
+	A_UINT32 free;
+} POSTPACK;
+
+PREPACK struct dbglog_hdr_s {
+	struct dbglog_buf_s *dbuf;
+	A_UINT32 dropped;
+} POSTPACK;
+
+PREPACK struct dbglog_buf_host {
+	A_UINT32 next;
+	A_UINT32 buffer;
+	A_UINT32 bufsize;
+	A_UINT32 length;
+	A_UINT32 count;
+	A_UINT32 free;
+} POSTPACK;
+
+PREPACK struct dbglog_hdr_host {
+	A_UINT32 dbuf;
+	A_UINT32 dropped;
+} POSTPACK;
+
+#define DBGLOG_MAX_VDEVID 15    /* 0-15 */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _DBGLOG_H_ */
diff --git a/target/inc/dbglog_id.h b/target/inc/dbglog_id.h
new file mode 100644
index 0000000..7ddea2d
--- /dev/null
+++ b/target/inc/dbglog_id.h
@@ -0,0 +1,1586 @@
+/*
+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _DBGLOG_ID_H_
+#define _DBGLOG_ID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * The target state machine framework will send dbglog messages on behalf on
+ * other modules. We do this do avoid each target module adding identical
+ * dbglog code for state transitions and event processing. We also don't want
+ * to force each module to define the the same XXX_DBGID_SM_MSG with the same
+ * value below. Instead we use a special ID that the host dbglog code
+ * recognizes as a message sent by the SM on behalf on another module.
+ */
+#define DBGLOG_DBGID_SM_FRAMEWORK_PROXY_DBGLOG_MSG 1000
+
+/*
+ * The nomenclature for the debug identifiers is MODULE_DESCRIPTION.
+ * Please ensure that the definition of any new debugid introduced is captured
+ * between the <MODULE>_DBGID_DEFINITION_START and
+ * <MODULE>_DBGID_DEFINITION_END defines. The structure is required for the
+ * parser to correctly pick up the values for different debug identifiers.
+ */
+
+/*
+ * The target state machine framework will send dbglog messages on behalf on
+ * other modules. We do this do avoid each module adding identical dbglog code
+ * for state transitions and event processing. We also don't want to force each
+ * module to define the the same XXX_DBGID_SM_MSG with the same value below.
+ * Instead we use a special ID that the host dbglog code recognizes as a
+ * message sent by the SM on behalf on another module.
+ */
+#define DBGLOG_DBGID_SM_FRAMEWORK_PROXY_DBGLOG_MSG 1000
+
+/* INF debug identifier definitions */
+#define INF_DBGID_DEFINITION_START                    0
+#define INF_ASSERTION_FAILED                          1
+#define INF_TARGET_ID                                 2
+#define INF_TARGET_MEM_REMAING                                3
+#define INF_TARGET_MEM_EXT_REMAING                    4
+#define INF_TARGET_MEM_ALLOC_TRACK                    5
+#define INF_TARGET_MEM_ALLOC_RAM                      6
+#define INF_DBGID_DEFINITION_END                      7
+
+/* WMI debug identifier definitions */
+#define WMI_DBGID_DEFINITION_START                    0
+#define WMI_CMD_RX_XTND_PKT_TOO_SHORT                 1
+#define WMI_EXTENDED_CMD_NOT_HANDLED                  2
+#define WMI_CMD_RX_PKT_TOO_SHORT                      3
+#define WMI_CALLING_WMI_EXTENSION_FN                  4
+#define WMI_CMD_NOT_HANDLED                           5
+#define WMI_IN_SYNC                                   6
+#define WMI_TARGET_WMI_SYNC_CMD                       7
+#define WMI_SET_SNR_THRESHOLD_PARAMS                  8
+#define WMI_SET_RSSI_THRESHOLD_PARAMS                 9
+#define WMI_SET_LQ_TRESHOLD_PARAMS                   10
+#define WMI_TARGET_CREATE_PSTREAM_CMD                11
+#define WMI_WI_DTM_INUSE                             12
+#define WMI_TARGET_DELETE_PSTREAM_CMD                13
+#define WMI_TARGET_IMPLICIT_DELETE_PSTREAM_CMD       14
+#define WMI_TARGET_GET_BIT_RATE_CMD                  15
+#define WMI_GET_RATE_MASK_CMD_FIX_RATE_MASK_IS       16
+#define WMI_TARGET_GET_AVAILABLE_CHANNELS_CMD        17
+#define WMI_TARGET_GET_TX_PWR_CMD                    18
+#define WMI_FREE_EVBUF_WMIBUF                        19
+#define WMI_FREE_EVBUF_DATABUF                       20
+#define WMI_FREE_EVBUF_BADFLAG                       21
+#define WMI_HTC_RX_ERROR_DATA_PACKET                 22
+#define WMI_HTC_RX_SYNC_PAUSING_FOR_MBOX             23
+#define WMI_INCORRECT_WMI_DATA_HDR_DROPPING_PKT      24
+#define WMI_SENDING_READY_EVENT                      25
+#define WMI_SETPOWER_MDOE_TO_MAXPERF                 26
+#define WMI_SETPOWER_MDOE_TO_REC                     27
+#define WMI_BSSINFO_EVENT_FROM                       28
+#define WMI_TARGET_GET_STATS_CMD                     29
+#define WMI_SENDING_SCAN_COMPLETE_EVENT              30
+#define WMI_SENDING_RSSI_INDB_THRESHOLD_EVENT        31
+#define WMI_SENDING_RSSI_INDBM_THRESHOLD_EVENT       32
+#define WMI_SENDING_LINK_QUALITY_THRESHOLD_EVENT     33
+#define WMI_SENDING_ERROR_REPORT_EVENT               34
+#define WMI_SENDING_CAC_EVENT                        35
+#define WMI_TARGET_GET_ROAM_TABLE_CMD                36
+#define WMI_TARGET_GET_ROAM_DATA_CMD                 37
+#define WMI_SENDING_GPIO_INTR_EVENT                  38
+#define WMI_SENDING_GPIO_ACK_EVENT                   39
+#define WMI_SENDING_GPIO_DATA_EVENT                  40
+#define WMI_CMD_RX                                   41
+#define WMI_CMD_RX_XTND                              42
+#define WMI_EVENT_SEND                               43
+#define WMI_EVENT_SEND_XTND                          44
+#define WMI_CMD_PARAMS_DUMP_START                    45
+#define WMI_CMD_PARAMS_DUMP_END                      46
+#define WMI_CMD_PARAMS                               47
+#define WMI_EVENT_ALLOC_FAILURE                      48
+#define WMI_DBGID_DCS_PARAM_CMD                      49
+#define WMI_SEND_EVENT_WRONG_TLV                     50
+#define WMI_SEND_EVENT_NO_TLV_DEF                    51
+#define WMI_DBGID_DEFINITION_END                     52
+
+/*  PM Message definition*/
+#define PS_STA_DEFINITION_START                     0
+#define PS_STA_PM_ARB_REQUEST                       1
+#define PS_STA_DELIVER_EVENT                        2
+#define PS_STA_PSPOLL_SEQ_DONE                      3
+#define PS_STA_COEX_MODE                            4
+#define PS_STA_PSPOLL_ALLOW                         5
+#define PS_STA_SET_PARAM                            6
+#define PS_STA_SPECPOLL_TIMER_STARTED               7
+#define PS_STA_SPECPOLL_TIMER_STOPPED               8
+#define PS_STA_AVG_CHANNEL_CONGESTION               9
+#define PS_STA_DEFINITION_END                       10
+
+/** RESMGR dbg ids */
+/* TODO: 1. Segregate IDs as per sub-module. (Give 100 per sub-module?)
+ *       2. Add chmgr IDs over here.
+ *       3. Update prints in dbglog_host.c
+ *       4. Deprecate WLAN_MODULE_RESMGR_CHAN_MANAGER */
+#define RESMGR_DEFINITION_START                     0
+#define RESMGR_OCS_ALLOCRAM_SIZE                    1
+#define RESMGR_OCS_RESOURCES                        2
+#define RESMGR_LINK_CREATE                          3
+#define RESMGR_LINK_DELETE                          4
+#define RESMGR_OCS_CHREQ_CREATE                     5
+#define RESMGR_OCS_CHREQ_DELETE                     6
+#define RESMGR_OCS_CHREQ_START                      7
+#define RESMGR_OCS_CHREQ_STOP                       8
+#define RESMGR_OCS_SCHEDULER_INVOKED                9
+#define RESMGR_OCS_CHREQ_GRANT                      10
+#define RESMGR_OCS_CHREQ_COMPLETE                   11
+#define RESMGR_OCS_NEXT_TSFTIME                     12
+#define RESMGR_OCS_TSF_TIMEOUT_US                   13
+#define RESMGR_OCS_CURR_CAT_WINDOW                  14
+#define RESMGR_OCS_CURR_CAT_WINDOW_REQ              15
+#define RESMGR_OCS_CURR_CAT_WINDOW_TIMESLOT         16
+#define RESMGR_OCS_CHREQ_RESTART                    17
+#define RESMGR_OCS_CLEANUP_CH_ALLOCATORS            18
+#define RESMGR_OCS_PURGE_CHREQ                      19
+#define RESMGR_OCS_CH_ALLOCATOR_FREE                20
+#define RESMGR_OCS_RECOMPUTE_SCHEDULE               21
+#define RESMGR_OCS_NEW_CAT_WINDOW_REQ               22
+#define RESMGR_OCS_NEW_CAT_WINDOW_TIMESLOT          23
+#define RESMGR_OCS_CUR_CH_ALLOC                     24
+#define RESMGR_OCS_WIN_CH_ALLOC                     25
+#define RESMGR_OCS_SCHED_CH_CHANGE                  26
+#define RESMGR_OCS_CONSTRUCT_CAT_WIN                27
+#define RESMGR_OCS_CHREQ_PREEMPTED                  28
+#define RESMGR_OCS_CH_SWITCH_REQ                    29
+#define RESMGR_OCS_CHANNEL_SWITCHED                 30
+#define RESMGR_OCS_CLEANUP_STALE_REQS               31
+#define RESMGR_OCS_CHREQ_UPDATE                     32
+#define RESMGR_OCS_REG_NOA_NOTIF                    33
+#define RESMGR_OCS_DEREG_NOA_NOTIF                  34
+#define RESMGR_OCS_GEN_PERIODIC_NOA                 35
+#define RESMGR_OCS_RECAL_QUOTAS                     36
+#define RESMGR_OCS_GRANTED_QUOTA_STATS              37
+#define RESMGR_OCS_ALLOCATED_QUOTA_STATS            38
+#define RESMGR_OCS_REQ_QUOTA_STATS                  39
+#define RESMGR_OCS_TRACKING_TIME_FIRED              40
+#define RESMGR_VC_ARBITRATE_ATTRIBUTES              41
+#define RESMGR_OCS_LATENCY_STRICT_TIME_SLOT         42
+#define RESMGR_OCS_CURR_TSF                         43
+#define RESMGR_OCS_QUOTA_REM                        44
+#define RESMGR_OCS_LATENCY_CASE_NO                  45
+#define RESMGR_OCS_WIN_CAT_DUR                      46
+#define RESMGR_VC_UPDATE_CUR_VC                     47
+#define RESMGR_VC_REG_UNREG_LINK                    48
+#define RESMGR_VC_PRINT_LINK                        49
+#define RESMGR_OCS_MISS_TOLERANCE                   50
+#define RESMGR_DYN_SCH_ALLOCRAM_SIZE                51
+#define RESMGR_DYN_SCH_ENABLE                       52
+#define RESMGR_DYN_SCH_ACTIVE                       53
+#define RESMGR_DYN_SCH_CH_STATS_START               54
+#define RESMGR_DYN_SCH_CH_SX_STATS                  55
+#define RESMGR_DYN_SCH_TOT_UTIL_PER                 56
+#define RESMGR_DYN_SCH_HOME_CH_QUOTA                57
+#define RESMGR_OCS_REG_RECAL_QUOTA_NOTIF            58
+#define RESMGR_OCS_DEREG_RECAL_QUOTA_NOTIF          59
+#define RESMGR_DYN_SCH_CH_STATS_END                 60
+#define RESMGR_DEFINITION_END                       61
+
+/* RESMGR CHNMGR debug ids */
+#define RESMGR_CHMGR_DEFINITION_START               0
+#define RESMGR_CHMGR_PAUSE_COMPLETE                 1
+#define RESMGR_CHMGR_CHANNEL_CHANGE                 2
+#define RESMGR_CHMGR_RESUME_COMPLETE                3
+#define RESMGR_CHMGR_VDEV_PAUSE                     4
+#define RESMGR_CHMGR_VDEV_UNPAUSE                   5
+#define RESMGR_CHMGR_CTS2S_TX_COMP                  6
+#define RESMGR_CHMGR_CFEND_TX_COMP                  7
+#define RESMGR_CHMGR_DEFINITION_END                 8
+
+/* VDEV manager debug ids */
+#define VDEV_MGR_DEFINITION_START                   0
+#define VDEV_MGR_FIRST_BMISS_DETECTED               1
+#define VDEV_MGR_FINAL_BMISS_DETECTED               2
+#define VDEV_MGR_BCN_IN_SYNC                        3
+#define VDEV_MGR_AP_KEEPALIVE_IDLE                  4
+#define VDEV_MGR_AP_KEEPALIVE_INACTIVE              5
+#define VDEV_MGR_AP_KEEPALIVE_UNRESPONSIVE          6
+#define VDEV_MGR_AP_TBTT_CONFIG                     7
+#define VDEV_MGR_FIRST_BCN_RECEIVED                 8
+#define VDEV_MGR_VDEV_START                         9
+#define VDEV_MGR_VDEV_UP                            10
+#define VDEV_MGR_PEER_AUTHORIZED                    11
+#define VDEV_MGR_OCS_HP_LP_REQ_POSTED               12
+#define VDEV_MGR_VDEV_START_OCS_HP_REQ_COMPLETE     13
+#define VDEV_MGR_VDEV_START_OCS_HP_REQ_STOP         14
+#define VDEV_MGR_HP_START_TIME                      15
+#define VDEV_MGR_VDEV_PAUSE_DELAY_UPDATE            16
+#define VDEV_MGR_VDEV_PAUSE_FAIL                    17
+#define VDEV_MGR_GEN_PERIODIC_NOA                   18
+#define VDEV_MGR_OFF_CHAN_GO_CH_REQ_SETUP           19
+#define VDEV_MGR_DEFINITION_END                     20
+
+/* WHAL debug identifier definitions */
+#define WHAL_DBGID_DEFINITION_START                 0
+#define WHAL_ERROR_ANI_CONTROL                      1
+#define WHAL_ERROR_CHIP_TEST1                       2
+#define WHAL_ERROR_CHIP_TEST2                       3
+#define WHAL_ERROR_EEPROM_CHECKSUM                  4
+#define WHAL_ERROR_EEPROM_MACADDR                   5
+#define WHAL_ERROR_INTERRUPT_HIU                    6
+#define WHAL_ERROR_KEYCACHE_RESET                   7
+#define WHAL_ERROR_KEYCACHE_SET                     8
+#define WHAL_ERROR_KEYCACHE_TYPE                    9
+#define WHAL_ERROR_KEYCACHE_TKIPENTRY              10
+#define WHAL_ERROR_KEYCACHE_WEPLENGTH              11
+#define WHAL_ERROR_PHY_INVALID_CHANNEL             12
+#define WHAL_ERROR_POWER_AWAKE                     13
+#define WHAL_ERROR_POWER_SET                       14
+#define WHAL_ERROR_RECV_STOPDMA                    15
+#define WHAL_ERROR_RECV_STOPPCU                    16
+#define WHAL_ERROR_RESET_CHANNF1                   17
+#define WHAL_ERROR_RESET_CHANNF2                   18
+#define WHAL_ERROR_RESET_PM                        19
+#define WHAL_ERROR_RESET_OFFSETCAL                 20
+#define WHAL_ERROR_RESET_RFGRANT                   21
+#define WHAL_ERROR_RESET_RXFRAME                   22
+#define WHAL_ERROR_RESET_STOPDMA                   23
+#define WHAL_ERROR_RESET_ERRID                     24
+#define WHAL_ERROR_RESET_ADCDCCAL1                 25
+#define WHAL_ERROR_RESET_ADCDCCAL2                 26
+#define WHAL_ERROR_RESET_TXIQCAL                   27
+#define WHAL_ERROR_RESET_RXIQCAL                   28
+#define WHAL_ERROR_RESET_CARRIERLEAK               29
+#define WHAL_ERROR_XMIT_COMPUTE                    30
+#define WHAL_ERROR_XMIT_NOQUEUE                    31
+#define WHAL_ERROR_XMIT_ACTIVEQUEUE                32
+#define WHAL_ERROR_XMIT_BADTYPE                    33
+#define WHAL_ERROR_XMIT_STOPDMA                    34
+#define WHAL_ERROR_INTERRUPT_BB_PANIC              35
+#define WHAL_ERROR_PAPRD_MAXGAIN_ABOVE_WINDOW      36
+#define WHAL_ERROR_QCU_HW_PAUSE_MISMATCH           37
+#define WHAL_ERROR_POWER_RFLP_CONFIG               38
+#define WHAL_ERROR_POWER_RFLP_SYNTHBYPASS_CONFIG   39
+#define WHAL_ERROR_POWER_RFLP_BIAS2X_CONFIG        40
+#define WHAL_ERROR_POWER_RFLP_PLLBYPASS_CONFIG     41
+#define WHAL_ERROR_POWER_RFLP_OFF1CHAN_CONFIG      42
+#define WHAL_ERROR_POWER_ANTENNA_LMIT              43
+#define WHAL_ERROR_POWER_REGDMN_TX_LMIT            44
+#define WHAL_ERROR_POWER_MODE_SCALED_PWR           45
+#define WHAL_ERROR_POWER_EDGE_PWR_TPSCALE          46
+#define WHAL_ERROR_POWER_CHAN_REGALLOW             47
+#define WHAL_ERROR_WAIT_REG_TIMEOUT                48
+#define WHAL_ERROR_XTAL_SET                        49
+#define WHAL_DBGID_DEFINITION_END                  50
+
+#define COEX_DEBUGID_START              0
+#define BTCOEX_DBG_MCI_1                            1
+#define BTCOEX_DBG_MCI_2                            2
+#define BTCOEX_DBG_MCI_3                            3
+#define BTCOEX_DBG_MCI_4                            4
+#define BTCOEX_DBG_MCI_5                            5
+#define BTCOEX_DBG_MCI_6                            6
+#define BTCOEX_DBG_MCI_7                            7
+#define BTCOEX_DBG_MCI_8                            8
+#define BTCOEX_DBG_MCI_9                            9
+#define BTCOEX_DBG_MCI_10                           10
+#define COEX_WAL_BTCOEX_INIT                        11
+#define COEX_WAL_PAUSE                              12
+#define COEX_WAL_RESUME                             13
+#define COEX_UPDATE_AFH                             14
+#define COEX_HWQ_EMPTY_CB                           15
+#define COEX_MCI_TIMER_HANDLER                      16
+#define COEX_MCI_RECOVER                            17
+#define ERROR_COEX_MCI_ISR                          18
+#define ERROR_COEX_MCI_GPM                          19
+#define COEX_ProfileType                            20
+#define COEX_LinkID                                 21
+#define COEX_LinkState                              22
+#define COEX_LinkRole                               23
+#define COEX_LinkRate                               24
+#define COEX_VoiceType                              25
+#define COEX_TInterval                              26
+#define COEX_WRetrx                                 27
+#define COEX_Attempts                               28
+#define COEX_PerformanceState                       29
+#define COEX_LinkType                               30
+#define COEX_RX_MCI_GPM_VERSION_QUERY               31
+#define COEX_RX_MCI_GPM_VERSION_RESPONSE            32
+#define COEX_RX_MCI_GPM_STATUS_QUERY                33
+#define COEX_STATE_WLAN_VDEV_DOWN                   34
+#define COEX_STATE_WLAN_VDEV_START                  35
+#define COEX_STATE_WLAN_VDEV_CONNECTED              36
+#define COEX_STATE_WLAN_VDEV_SCAN_STARTED           37
+#define COEX_STATE_WLAN_VDEV_SCAN_END               38
+#define COEX_STATE_WLAN_DEFAULT                     39
+#define COEX_CHANNEL_CHANGE                         40
+#define COEX_POWER_CHANGE                           41
+#define COEX_CONFIG_MGR                             42
+#define COEX_TX_MCI_GPM_BT_CAL_REQ                  43
+#define COEX_TX_MCI_GPM_BT_CAL_GRANT                44
+#define COEX_TX_MCI_GPM_BT_CAL_DONE                 45
+#define COEX_TX_MCI_GPM_WLAN_CAL_REQ                46
+#define COEX_TX_MCI_GPM_WLAN_CAL_GRANT              47
+#define COEX_TX_MCI_GPM_WLAN_CAL_DONE               48
+#define COEX_TX_MCI_GPM_BT_DEBUG                    49
+#define COEX_TX_MCI_GPM_VERSION_QUERY               50
+#define COEX_TX_MCI_GPM_VERSION_RESPONSE            51
+#define COEX_TX_MCI_GPM_STATUS_QUERY                52
+#define COEX_TX_MCI_GPM_HALT_BT_GPM                 53
+#define COEX_TX_MCI_GPM_WLAN_CHANNELS               54
+#define COEX_TX_MCI_GPM_BT_PROFILE_INFO             55
+#define COEX_TX_MCI_GPM_BT_STATUS_UPDATE            56
+#define COEX_TX_MCI_GPM_BT_UPDATE_FLAGS             57
+#define COEX_TX_MCI_GPM_UNKNOWN                     58
+#define COEX_TX_MCI_SYS_WAKING                      59
+#define COEX_TX_MCI_LNA_TAKE                        60
+#define COEX_TX_MCI_LNA_TRANS                       61
+#define COEX_TX_MCI_SYS_SLEEPING                    62
+#define COEX_TX_MCI_REQ_WAKE                        63
+#define COEX_TX_MCI_REMOTE_RESET                    64
+#define COEX_TX_MCI_TYPE_UNKNOWN                    65
+#define COEX_WHAL_MCI_RESET                         66
+#define COEX_POLL_BT_CAL_DONE_TIMEOUT               67
+#define COEX_WHAL_PAUSE                             68
+#define COEX_RX_MCI_GPM_BT_CAL_REQ                  69
+#define COEX_RX_MCI_GPM_BT_CAL_DONE                 70
+#define COEX_RX_MCI_GPM_BT_CAL_GRANT                71
+#define COEX_WLAN_CAL_START                         72
+#define COEX_WLAN_CAL_RESULT                        73
+#define COEX_BtMciState                             74
+#define COEX_BtCalState                             75
+#define COEX_WlanCalState                           76
+#define COEX_RxReqWakeCount                         77
+#define COEX_RxRemoteResetCount                     78
+#define COEX_RESTART_CAL                            79
+#define COEX_SENDMSG_QUEUE                          80
+#define COEX_RESETSEQ_LNAINFO_TIMEOUT               81
+#define COEX_MCI_ISR_IntRaw                         82
+#define COEX_MCI_ISR_Int1Raw                        83
+#define COEX_MCI_ISR_RxMsgRaw                       84
+#define COEX_WHAL_COEX_RESET                        85
+#define COEX_WAL_COEX_INIT                          86
+#define COEX_TXRX_CNT_LIMIT_ISR                     87
+#define COEX_CH_BUSY                                88
+#define COEX_REASSESS_WLAN_STATE                    89
+#define COEX_BTCOEX_WLAN_STATE_UPDATE               90
+#define COEX_BT_NUM_OF_PROFILES                     91
+#define COEX_BT_NUM_OF_HID_PROFILES                 92
+#define COEX_BT_NUM_OF_ACL_PROFILES                 93
+#define COEX_BT_NUM_OF_HI_ACL_PROFILES              94
+#define COEX_BT_NUM_OF_VOICE_PROFILES               95
+#define COEX_WLAN_AGGR_LIMIT                        96
+#define COEX_BT_LOW_PRIO_BUDGET                     97
+#define COEX_BT_HI_PRIO_BUDGET                      98
+#define COEX_BT_IDLE_TIME                           99
+#define COEX_SET_COEX_WEIGHT                        100
+#define COEX_WLAN_WEIGHT_GROUP                      101
+#define COEX_BT_WEIGHT_GROUP                        102
+#define COEX_BT_INTERVAL_ALLOC                      103
+#define COEX_BT_SCHEME                              104
+#define COEX_BT_MGR                                 105
+#define COEX_BT_SM_ERROR                            106
+#define COEX_SYSTEM_UPDATE                          107
+#define COEX_LOW_PRIO_LIMIT                         108
+#define COEX_HI_PRIO_LIMIT                          109
+#define COEX_BT_INTERVAL_START                      110
+#define COEX_WLAN_INTERVAL_START                    111
+#define COEX_NON_LINK_BUDGET                        112
+#define COEX_CONTENTION_MSG                         113
+#define COEX_SET_NSS                                114
+#define COEX_SELF_GEN_MASK                          115
+#define COEX_PROFILE_ERROR                          116
+#define COEX_WLAN_INIT                              117
+#define COEX_BEACON_MISS                            118
+#define COEX_BEACON_OK                              119
+#define COEX_BTCOEX_SCAN_ACTIVITY                   120
+#define COEX_SCAN_ACTIVITY                          121
+#define COEX_FORCE_QUIETTIME                        122
+#define COEX_BT_MGR_QUIETTIME                       123
+#define COEX_BT_INACTIVITY_TRIGGER                  124
+#define COEX_BT_INACTIVITY_REPORTED                 125
+#define COEX_TX_MCI_GPM_WLAN_PRIO                   126
+#define COEX_TX_MCI_GPM_BT_PAUSE_PROFILE            127
+#define COEX_TX_MCI_GPM_WLAN_SET_ACL_INACTIVITY     128
+#define COEX_RX_MCI_GPM_BT_ACL_INACTIVITY_REPORT    129
+#define COEX_GENERIC_ERROR                          130
+#define COEX_RX_RATE_THRESHOLD                      131
+#define COEX_RSSI                                   132
+
+#define COEX_WLAN_VDEV_NOTIF_START                  133
+#define COEX_WLAN_VDEV_NOTIF_UP                     134
+#define COEX_WLAN_VDEV_NOTIF_DOWN                   135
+#define COEX_WLAN_VDEV_NOTIF_STOP                   136
+#define COEX_WLAN_VDEV_NOTIF_ADD_PEER               137
+#define COEX_WLAN_VDEV_NOTIF_DELETE_PEER            138
+#define COEX_WLAN_VDEV_NOTIF_CONNECTED_PEER         139
+#define COEX_WLAN_VDEV_NOTIF_PAUSE                  140
+#define COEX_WLAN_VDEV_NOTIF_UNPAUSED               141
+#define COEX_STATE_WLAN_VDEV_PEER_ADD               142
+#define COEX_STATE_WLAN_VDEV_CONNECTED_PEER         143
+#define COEX_STATE_WLAN_VDEV_DELETE_PEER            144
+#define COEX_STATE_WLAN_VDEV_PAUSE                  145
+#define COEX_STATE_WLAN_VDEV_UNPAUSED               146
+#define COEX_SCAN_CALLBACK                          147
+#define COEX_RC_SET_CHAINMASK                       148
+#define COEX_TX_MCI_GPM_WLAN_SET_BT_RXSS_THRES      149
+#define COEX_TX_MCI_GPM_BT_RXSS_THRES_QUERY         150
+#define COEX_BT_RXSS_THRES                          151
+#define COEX_BT_PROFILE_ADD_RMV                     152
+#define COEX_BT_SCHED_INFO                          153
+#define COEX_TRF_MGMT                               154
+#define COEX_SCHED_START                            155
+#define COEX_SCHED_RESULT                           156
+#define COEX_SCHED_ERROR                            157
+#define COEX_SCHED_PRE_OP                           158
+#define COEX_SCHED_POST_OP                          159
+#define COEX_RX_RATE                                160
+#define COEX_ACK_PRIORITY                           161
+#define COEX_STATE_WLAN_VDEV_UP                     162
+#define COEX_STATE_WLAN_VDEV_PEER_UPDATE            163
+#define COEX_STATE_WLAN_VDEV_STOP                   164
+#define COEX_WLAN_PAUSE_PEER                        165
+#define COEX_WLAN_UNPAUSE_PEER                      166
+#define COEX_WLAN_PAUSE_INTERVAL_START              167
+#define COEX_WLAN_POSTPAUSE_INTERVAL_START          168
+#define COEX_TRF_FREERUN                            169
+#define COEX_TRF_SHAPE_PM                           170
+#define COEX_TRF_SHAPE_PSP                          171
+#define COEX_TRF_SHAPE_S_CTS                        172
+#define COEX_CHAIN_CONFIG                           173
+#define COEX_SYSTEM_MONITOR                         174
+#define COEX_SINGLECHAIN_INIT                       175
+#define COEX_MULTICHAIN_INIT                        176
+#define COEX_SINGLECHAIN_DBG_1                      177
+#define COEX_SINGLECHAIN_DBG_2                      178
+#define COEX_SINGLECHAIN_DBG_3                      179
+#define COEX_MULTICHAIN_DBG_1                       180
+#define COEX_MULTICHAIN_DBG_2                       181
+#define COEX_MULTICHAIN_DBG_3                       182
+#define COEX_PSP_TX_CB                              183
+#define COEX_PSP_RX_CB                              184
+#define COEX_PSP_STAT_1                             185
+#define COEX_PSP_SPEC_POLL                          186
+#define COEX_PSP_READY_STATE                        187
+#define COEX_PSP_TX_STATUS_STATE                    188
+#define COEX_PSP_RX_STATUS_STATE_1                  189
+#define COEX_PSP_NOT_READY_STATE                    190
+#define COEX_PSP_DISABLED_STATE                     191
+#define COEX_PSP_ENABLED_STATE                      192
+#define COEX_PSP_SEND_PSPOLL                        193
+#define COEX_PSP_MGR_ENTER                          194
+#define COEX_PSP_MGR_RESULT                         195
+#define COEX_PSP_NONWLAN_INTERVAL                   196
+#define COEX_PSP_STAT_2                             197
+#define COEX_PSP_RX_STATUS_STATE_2                  198
+#define COEX_PSP_ERROR                              199
+#define COEX_T2BT                                   200
+#define COEX_BT_DURATION                            201
+#define COEX_TX_MCI_GPM_WLAN_SCHED_INFO_TRIG        202
+#define COEX_TX_MCI_GPM_WLAN_SCHED_INFO_TRIG_RSP    203
+#define COEX_TX_MCI_GPM_SCAN_OP                     204
+#define COEX_TX_MCI_GPM_BT_PAUSE_GPM_TX             205
+#define COEX_CTS2S_SEND                             206
+#define COEX_CTS2S_RESULT                           207
+#define COEX_ENTER_OCS                              208
+#define COEX_EXIT_OCS                               209
+#define COEX_UPDATE_OCS                             210
+#define COEX_STATUS_OCS                             211
+#define COEX_STATS_BT                               212
+
+#define COEX_MWS_WLAN_INIT                          213
+#define COEX_MWS_WBTMR_SYNC                         214
+#define COEX_MWS_TYPE2_RX                           215
+#define COEX_MWS_TYPE2_TX                           216
+#define COEX_MWS_WLAN_CHAVD                         217
+#define COEX_MWS_WLAN_CHAVD_INSERT                  218
+#define COEX_MWS_WLAN_CHAVD_MERGE                   219
+#define COEX_MWS_WLAN_CHAVD_RPT                     220
+#define COEX_MWS_CP_MSG_SEND                        221
+#define COEX_MWS_CP_ESCAPE                          222
+#define COEX_MWS_CP_UNFRAME                         223
+#define COEX_MWS_CP_SYNC_UPDATE                     224
+#define COEX_MWS_CP_SYNC                            225
+#define COEX_MWS_CP_WLAN_STATE_IND                  226
+#define COEX_MWS_CP_SYNCRESP_TIMEOUT                227
+#define COEX_MWS_SCHEME_UPDATE                      228
+#define COEX_MWS_WLAN_EVENT                         229
+#define COEX_MWS_UART_UNESCAPE                      230
+#define COEX_MWS_UART_ENCODE_SEND                   231
+#define COEX_MWS_UART_RECV_DECODE                   232
+#define COEX_MWS_UL_HDL                             233
+#define COEX_MWS_REMOTE_EVENT                       234
+#define COEX_MWS_OTHER                              235
+#define COEX_MWS_ERROR                              236
+#define COEX_MWS_ANT_DIVERSITY                      237
+
+#define COEX_P2P_GO                                 238
+#define COEX_P2P_CLIENT                             239
+#define COEX_SCC_1                                  240
+#define COEX_SCC_2                                  241
+#define COEX_MCC_1                                  242
+#define COEX_MCC_2                                  243
+#define COEX_TRF_SHAPE_NOA                          244
+#define COEX_NOA_ONESHOT                            245
+#define COEX_NOA_PERIODIC                           246
+#define COEX_LE_1                                   247
+#define COEX_LE_2                                   248
+#define COEX_ANT_1                                  249
+#define COEX_ANT_2                                  250
+#define COEX_ENTER_NOA                              251
+#define COEX_EXIT_NOA                               252
+#define COEX_BT_SCAN_PROTECT                        253
+
+#define COEX_DEBUG_ID_END                           254
+
+#define SCAN_START_COMMAND_FAILED                   0
+#define SCAN_STOP_COMMAND_FAILED                    1
+#define SCAN_EVENT_SEND_FAILED                      2
+#define SCAN_ENGINE_START                           3
+#define SCAN_ENGINE_CANCEL_COMMAND                  4
+#define SCAN_ENGINE_STOP_DUE_TO_TIMEOUT             5
+#define SCAN_EVENT_SEND_TO_HOST                     6
+#define SCAN_FWLOG_EVENT_ADD                        7
+#define SCAN_FWLOG_EVENT_REM                        8
+#define SCAN_FWLOG_EVENT_PREEMPTED                  9
+#define SCAN_FWLOG_EVENT_RESTARTED                  10
+#define SCAN_FWLOG_EVENT_COMPLETED                  11
+#define SCAN_SM_REQ_NEXT_CH                         12
+#define SCAN_DBGID_DEFINITION_END                   13
+
+#define BEACON_EVENT_SWBA_SEND_FAILED               0
+#define BEACON_EVENT_EARLY_RX_BMISS_STATUS          1
+#define BEACON_EVENT_EARLY_RX_SLEEP_SLOP            2
+#define BEACON_EVENT_EARLY_RX_CONT_BMISS_TIMEOUT    3
+#define BEACON_EVENT_EARLY_RX_PAUSE_SKIP_BCN_NUM    4
+#define BEACON_EVENT_EARLY_RX_CLK_DRIFT             5
+#define BEACON_EVENT_EARLY_RX_AP_DRIFT              6
+#define BEACON_EVENT_EARLY_RX_BCN_TYPE              7
+
+#define RATECTRL_DBGID_DEFINITION_START             0
+#define RATECTRL_DBGID_ASSOC                        1
+#define RATECTRL_DBGID_NSS_CHANGE                   2
+#define RATECTRL_DBGID_CHAINMASK_ERR                3
+#define RATECTRL_DBGID_UNEXPECTED_FRAME             4
+#define RATECTRL_DBGID_WAL_RCQUERY                  5
+#define RATECTRL_DBGID_WAL_RCUPDATE                 6
+#define RATECTRL_DBGID_GTX_UPDATE                   7
+#define RATECTRL_DBGID_DEFINITION_END               8
+
+#define AP_PS_DBGID_DEFINITION_START                0
+#define AP_PS_DBGID_UPDATE_TIM                      1
+#define AP_PS_DBGID_PEER_STATE_CHANGE               2
+#define AP_PS_DBGID_PSPOLL                          3
+#define AP_PS_DBGID_PEER_CREATE                     4
+#define AP_PS_DBGID_PEER_DELETE                     5
+#define AP_PS_DBGID_VDEV_CREATE                     6
+#define AP_PS_DBGID_VDEV_DELETE                     7
+#define AP_PS_DBGID_SYNC_TIM                        8
+#define AP_PS_DBGID_NEXT_RESPONSE                   9
+#define AP_PS_DBGID_START_SP                        10
+#define AP_PS_DBGID_COMPLETED_EOSP                  11
+#define AP_PS_DBGID_TRIGGER                         12
+#define AP_PS_DBGID_DUPLICATE_TRIGGER               13
+#define AP_PS_DBGID_UAPSD_RESPONSE                  14
+#define AP_PS_DBGID_SEND_COMPLETE                   15
+#define AP_PS_DBGID_SEND_N_COMPLETE                 16
+#define AP_PS_DBGID_DETECT_OUT_OF_SYNC_STA          17
+#define AP_PS_DBGID_DELIVER_CAB                     18
+#define AP_PS_DBGID_NO_CLIENT                       27
+#define AP_PS_DBGID_CLIENT_IN_PS_ACTIVE             28
+#define AP_PS_DBGID_CLIENT_IN_PS_NON_ACTIVE         29
+#define AP_PS_DBGID_CLIENT_IN_AWAKE                 30
+
+/* WLAN_MODULE_MGMT_TXRX Debugids*/
+#define MGMT_TXRX_DBGID_DEFINITION_START            0
+#define MGMT_TXRX_FORWARD_TO_HOST                   1
+#define MGMT_TXRX_MGMT_FRAME_BUFFER_FULL            2
+#define MGMT_TXRX_VDEV_USED_TO_SEND_FRAME_IS_FREE   3
+#define MGMT_TXRX_LOCAL_FRAME_SEND_FAILED           4
+#define MGMT_TXRX_DBGID_DEFINITION_END              5
+
+#define WAL_DBGID_DEFINITION_START                  0
+#define WAL_DBGID_FAST_WAKE_REQUEST                 1
+#define WAL_DBGID_FAST_WAKE_RELEASE                 2
+#define WAL_DBGID_SET_POWER_STATE                   3
+#define WAL_DBGID_CHANNEL_CHANGE_FORCE_RESET        5
+#define WAL_DBGID_CHANNEL_CHANGE                    6
+#define WAL_DBGID_VDEV_START                        7
+#define WAL_DBGID_VDEV_STOP                         8
+#define WAL_DBGID_VDEV_UP                           9
+#define WAL_DBGID_VDEV_DOWN                         10
+#define WAL_DBGID_SW_WDOG_RESET                     11
+#define WAL_DBGID_TX_SCH_REGISTER_TIDQ              12
+#define WAL_DBGID_TX_SCH_UNREGISTER_TIDQ            13
+#define WAL_DBGID_TX_SCH_TICKLE_TIDQ                14
+
+#define WAL_DBGID_XCESS_FAILURES                    15
+#define WAL_DBGID_AST_ADD_WDS_ENTRY                 16
+#define WAL_DBGID_AST_DEL_WDS_ENTRY                 17
+#define WAL_DBGID_AST_WDS_ENTRY_PEER_CHG            18
+#define WAL_DBGID_AST_WDS_SRC_LEARN_FAIL            19
+#define WAL_DBGID_STA_KICKOUT                       20
+#define WAL_DBGID_BAR_TX_FAIL                       21
+#define WAL_DBGID_BAR_ALLOC_FAIL                    22
+#define WAL_DBGID_LOCAL_DATA_TX_FAIL                23
+#define WAL_DBGID_SECURITY_PM4_QUEUED               24
+#define WAL_DBGID_SECURITY_GM1_QUEUED               25
+#define WAL_DBGID_SECURITY_PM4_SENT                 26
+#define WAL_DBGID_SECURITY_ALLOW_DATA               27
+#define WAL_DBGID_SECURITY_UCAST_KEY_SET            28
+#define WAL_DBGID_SECURITY_MCAST_KEY_SET            29
+#define WAL_DBGID_SECURITY_ENCR_EN                  30
+#define WAL_DBGID_BB_WDOG_TRIGGERED                 31
+#define WAL_DBGID_RX_LOCAL_BUFS_LWM                 32
+#define WAL_DBGID_RX_LOCAL_DROP_LARGE_MGMT          33
+#define WAL_DBGID_VHT_ILLEGAL_RATE_PHY_ERR_DETECTED 34
+#define WAL_DBGID_DEV_RESET                         35
+#define WAL_DBGID_TX_BA_SETUP                       36
+#define WAL_DBGID_RX_BA_SETUP                       37
+#define WAL_DBGID_DEV_TX_TIMEOUT                    38
+#define WAL_DBGID_DEV_RX_TIMEOUT                    39
+#define WAL_DBGID_STA_VDEV_XRETRY                   40
+#define WAL_DBGID_DCS                               41
+#define WAL_DBGID_MGMT_TX_FAIL                      42
+#define WAL_DBGID_SET_M4_SENT_MANUALLY              43
+#define WAL_DBGID_PROCESS_4_WAY_HANDSHAKE           44
+#define WAL_DBGID_WAL_CHANNEL_CHANGE_START          45
+#define WAL_DBGID_WAL_CHANNEL_CHANGE_COMPLETE       46
+#define WAL_DBGID_WHAL_CHANNEL_CHANGE_START         47
+#define WAL_DBGID_WHAL_CHANNEL_CHANGE_COMPLETE      48
+#define WAL_DBGID_TX_MGMT_DESCID_SEQ_TYPE_LEN       49
+#define WAL_DBGID_TX_DATA_MSDUID_SEQ_TYPE_LEN       50
+#define WAL_DBGID_TX_DISCARD                        51
+#define WAL_DBGID_TX_MGMT_COMP_DESCID_STATUS        52
+#define WAL_DBGID_TX_DATA_COMP_MSDUID_STATUS        53
+#define WAL_DBGID_RESET_PCU_CYCLE_CNT               54
+#define WAL_DBGID_SETUP_RSSI_INTERRUPTS             55
+#define WAL_DBGID_BRSSI_CONFIG                      56
+#define WAL_DBGID_CURRENT_BRSSI_AVE                 57
+#define WAL_DBGID_BCN_TX_COMP                       58
+#define WAL_DBGID_RX_REENTRY                        59
+#define WAL_DBGID_SET_HW_CHAINMASK                  60
+#define WAL_DBGID_SET_HW_CHAINMASK_TXRX_STOP_FAIL   61
+#define WAL_DBGID_GET_HW_CHAINMASK                  62
+#define WAL_DBGID_SMPS_DISABLE                      63
+#define WAL_DBGID_SMPS_ENABLE_HW_CNTRL              64
+#define WAL_DBGID_SMPS_SWSEL_CHAINMASK              65
+#define WAL_DBGID_SUSPEND                           66
+#define WAL_DBGID_RESUME                            67
+#define WAL_DBGID_PEER_TX_FAIL_CNT_THRES_EXCEEDED   68
+#define WAL_DBGID_RX_FULL_REORDER_SUPPORT           69
+#define WAL_DBGID_HCM_BIN                           70
+#define WAL_DBGID_HCM_BIN_PENALIZE                  71
+#define WAL_DBGID_HCM_BIN_DEPENALIZE                72
+#define WAL_DBGID_AST_UPDATE_WDS_ENTRY              73
+#define WAL_DBGID_PEER_EXT_STATS                    74
+#define WAL_DBGID_TX_AC_BUFFER_SET                  75
+#define WAL_DBGID_AST_ENTRY_EXIST                   76
+#define WAL_DBGID_AST_ENTRY_FULL                    77
+#define WAL_DBGID_WMMAC_TXQ_STATUS                  78
+#define WAL_DBGID_PROLONGED_TX_PPDU_TOTAL_US        79
+#define WAL_DBGID_UPDATE_USED_TIME                  80
+#define WAL_DBGID_PAST_WB_ACK_TIMESTAMP             81
+#define WAL_DBGID_WMMAC_ADD_DEL_TSPEC               82
+#define WAL_DBGID_WMMAC_TIMER_EXPIRY                83
+#define WAL_DBGID_WMMAC_PARAMS                      84
+#define WAL_DBGID_TX_MGMT_WAL_PEER_DOES_NOT_EXIST   85
+#define WAL_DBGID_TX_MGMT_WAL_PEER_DELETE_IN_PROGRESS 86
+#define WAL_DBGID_TX_MGMT_FRAME_DESC_ALLOC_FAILED   87
+#define WAL_DBGID_TX_MGMT_TID_STRUCT_NOT_FOUND      88
+#define WAL_DBGID_TX_MGMT_ENQUEUE_FAILED            89
+#define WAL_DBGID_DEFINITION_END                    90
+
+#define ANI_DBGID_POLL                               0
+#define ANI_DBGID_CONTROL                            1
+#define ANI_DBGID_OFDM_PARAMS                        2
+#define ANI_DBGID_CCK_PARAMS                         3
+#define ANI_DBGID_RESET                              4
+#define ANI_DBGID_RESTART                            5
+#define ANI_DBGID_OFDM_LEVEL                         6
+#define ANI_DBGID_CCK_LEVEL                          7
+#define ANI_DBGID_FIRSTEP                            8
+#define ANI_DBGID_CYCPWR                             9
+#define ANI_DBGID_MRC_CCK                           10
+#define ANI_DBGID_SELF_CORR_LOW                     11
+#define ANI_DBGID_ENABLE                            12
+
+#define ANI_DBGID_CURRENT_LEVEL                     13
+#define ANI_DBGID_POLL_PERIOD                       14
+#define ANI_DBGID_LISTEN_PERIOD                     15
+#define ANI_DBGID_OFDM_LEVEL_CFG                    16
+#define ANI_DBGID_CCK_LEVEL_CFG                     17
+
+/* OFFLOAD Manager Debugids*/
+#define OFFLOAD_MGR_DBGID_DEFINITION_START             0
+#define OFFLOADMGR_REGISTER_OFFLOAD                    1
+#define OFFLOADMGR_DEREGISTER_OFFLOAD                  2
+#define OFFLOADMGR_NO_REG_DATA_HANDLERS                3
+#define OFFLOADMGR_NO_REG_EVENT_HANDLERS               4
+#define OFFLOADMGR_REG_OFFLOAD_FAILED                  5
+#define OFFLOADMGR_DEREG_OFFLOAD_FAILED                6
+#define OFFLOADMGR_ENTER_FAILED                        7
+#define OFFLOADMGR_EXIT_FAILED                         8
+#define OFFLOADMGR_DBGID_DEFINITION_END                9
+
+/*Resource Debug IDs*/
+#define RESOURCE_DBGID_DEFINITION_START             0
+#define RESOURCE_PEER_ALLOC                         1
+#define RESOURCE_PEER_FREE                          2
+#define RESOURCE_PEER_ALLOC_WAL_PEER                3
+#define RESOURCE_PEER_NBRHOOD_MGMT_ALLOC            4
+#define RESOURCE_PEER_NBRHOOD_MGMT_INFO             5
+#define RESOURCE_SMALL_MGMT_BUF_FULL                6
+#define RESOURCE_MGMT_AVAIL_BUF_CNT_NOT_ENOUGH      7
+#define RESOURCE_MGMT_BUF_FULL                      8
+#define RESOURCE_MGMT_BUF_INC                       9
+#define RESOURCE_MGMT_BUF_DEC                       10
+#define RESOURCE_DBGID_DEFINITION_END               11
+
+/* DCS debug IDs*/
+#define WLAN_DCS_DBGID_INIT                         0
+#define WLAN_DCS_DBGID_WMI_CWINT                    1
+#define WLAN_DCS_DBGID_TIMER                        2
+#define WLAN_DCS_DBGID_CMDG                         3
+#define WLAN_DCS_DBGID_CMDS                         4
+#define WLAN_DCS_DBGID_DINIT                        5
+
+/*P2P Module ids*/
+#define P2P_DBGID_DEFINITION_START                          0
+#define P2P_DEV_REGISTER                                    1
+#define P2P_HANDLE_NOA                                      2
+#define P2P_UPDATE_SCHEDULE_OPPS                            3
+#define P2P_UPDATE_SCHEDULE                                 4
+#define P2P_UPDATE_START_TIME                               5
+#define P2P_UPDATE_START_TIME_DIFF_TSF32                    6
+#define P2P_UPDATE_START_TIME_FINAL                         7
+#define P2P_SETUP_SCHEDULE_TIMER                            8
+#define P2P_PROCESS_SCHEDULE_AFTER_CALC                     9
+#define P2P_PROCESS_SCHEDULE_STARTED_TIMER                  10
+#define P2P_CALC_SCHEDULES_FIRST_CALL_ALL_NEXT_EVENT        11
+#define P2P_CALC_SCHEDULES_FIRST_VALUE                      12
+#define P2P_CALC_SCHEDULES_EARLIEST_NEXT_EVENT              13
+#define P2P_CALC_SCHEDULES_SANITY_COUNT                     14
+#define P2P_CALC_SCHEDULES_CALL_ALL_NEXT_EVENT_FROM_WHILE_LOOP 15
+#define P2P_CALC_SCHEDULES_TIMEOUT_1                        16
+#define P2P_CALC_SCHEDULES_TIMEOUT_2                        17
+#define P2P_FIND_ALL_NEXT_EVENTS_REQ_EXPIRED                18
+#define P2P_FIND_ALL_NEXT_EVENTS_REQ_ACTIVE                 19
+#define P2P_FIND_NEXT_EVENT_REQ_NOT_STARTED                 20
+#define P2P_FIND_NEXT_EVENT_REQ_COMPLETE_NON_PERIODIC       21
+#define P2P_FIND_NEXT_EVENT_IN_MID_OF_NOA                   22
+#define P2P_FIND_NEXT_EVENT_REQ_COMPLETE                    23
+#define P2P_SCHEDULE_TIMEOUT                                24
+#define P2P_CALC_SCHEDULES_ENTER                            25
+#define P2P_PROCESS_SCHEDULE_ENTER                          26
+#define P2P_FIND_ALL_NEXT_EVENTS_INDIVIDUAL_REQ_AFTER_CHANGE    27
+#define P2P_FIND_ALL_NEXT_EVENTS_INDIVIDUAL_REQ_BEFORE_CHANGE   28
+#define P2P_FIND_ALL_NEXT_EVENTS_ENTER                      29
+#define P2P_FIND_NEXT_EVENT_ENTER                           30
+#define P2P_NOA_GO_PRESENT                                  31
+#define P2P_NOA_GO_ABSENT                                   32
+#define P2P_GO_NOA_NOTIF                                    33
+#define P2P_GO_TBTT_OFFSET                                  34
+#define P2P_GO_GET_NOA_INFO                                 35
+#define P2P_GO_ADD_ONE_SHOT_NOA                             36
+#define P2P_GO_GET_NOA_IE                                   37
+#define P2P_GO_BCN_TX_COMP                                  38
+#define P2P_DBGID_DEFINITION_END                            39
+
+/* CSA modules DBGIDs */
+#define CSA_DBGID_DEFINITION_START 0
+#define CSA_OFFLOAD_POOL_INIT 1
+#define CSA_OFFLOAD_REGISTER_VDEV 2
+#define CSA_OFFLOAD_DEREGISTER_VDEV 3
+#define CSA_DEREGISTER_VDEV_ERROR 4
+#define CSA_OFFLOAD_BEACON_RECEIVED 5
+#define CSA_OFFLOAD_BEACON_CSA_RECV 6
+#define CSA_OFFLOAD_CSA_RECV_ERROR_IE 7
+#define CSA_OFFLOAD_CSA_TIMER_ERROR 8
+#define CSA_OFFLOAD_CSA_TIMER_EXP 9
+#define CSA_OFFLOAD_WMI_EVENT_ERROR 10
+#define CSA_OFFLOAD_WMI_EVENT_SENT 11
+#define CSA_OFFLOAD_WMI_CHANSWITCH_RECV 12
+#define CSA_DBGID_DEFINITION_END 13
+
+/* Chatter module DBGIDs */
+#define WLAN_CHATTER_DBGID_DEFINITION_START 0
+#define WLAN_CHATTER_ENTER 1
+#define WLAN_CHATTER_EXIT 2
+#define WLAN_CHATTER_FILTER_HIT 3
+#define WLAN_CHATTER_FILTER_MISS 4
+#define WLAN_CHATTER_FILTER_FULL 5
+#define WLAN_CHATTER_FILTER_TM_ADJ  6
+#define WLAN_CHATTER_BUFFER_FULL    7
+#define WLAN_CHATTER_TIMEOUT        8
+#define WLAN_CHATTER_MC_FILTER_ADD  9
+#define WLAN_CHATTER_MC_FILTER_DEL  10
+#define WLAN_CHATTER_MC_FILTER_ALLOW  11
+#define WLAN_CHATTER_MC_FILTER_DROP  12
+#define WLAN_CHATTER_COALESCING_FILTER_ADD      13
+#define WLAN_CHATTER_COALESCING_FILTER_DEL      14
+#define WLAN_CHATTER_DBGID_DEFINITION_END       15
+
+#define WOW_DBGID_DEFINITION_START 0
+#define WOW_ENABLE_CMDID 1
+#define WOW_RECV_DATA_PKT 2
+#define WOW_WAKE_HOST_DATA 3
+#define WOW_RECV_MGMT 4
+#define WOW_WAKE_HOST_MGMT 5
+#define WOW_RECV_EVENT 6
+#define WOW_WAKE_HOST_EVENT 7
+#define WOW_INIT 8
+#define WOW_RECV_MAGIC_PKT 9
+#define WOW_RECV_BITMAP_PATTERN 10
+#define WOW_AP_VDEV_DISALLOW    11
+#define WOW_STA_VDEV_DISALLOW   12
+#define WOW_P2PGO_VDEV_DISALLOW 13
+#define WOW_NS_OFLD_ENABLE       14
+#define WOW_ARP_OFLD_ENABLE      15
+#define WOW_NS_ARP_OFLD_DISABLE  16
+#define WOW_NS_RECEIVED          17
+#define WOW_NS_REPLIED           18
+#define WOW_ARP_RECEIVED         19
+#define WOW_ARP_REPLIED          20
+#define WOW_BEACON_OFFLOAD_TX    21
+#define WOW_BEACON_OFFLOAD_CFG   22
+#define WOW_IBSS_VDEV_ALLOW      23
+#define WOW_DBGID_DEFINITION_END 24
+
+/* SWBMISS module DBGIDs */
+#define SWBMISS_DBGID_DEFINITION_START  0
+#define SWBMISS_ENABLED                 1
+#define SWBMISS_DISABLED                2
+#define SWBMISS_UPDATE_BEACON_RSSI      3
+#define SWBMISS_DBGID_DEFINITION_END    4
+
+/* WLAN module DBGIDS */
+#define ROAM_DBGID_DEFINITION_START 0
+#define ROAM_MODULE_INIT           1
+#define ROAM_DEV_START             2
+#define ROAM_CONFIG_RSSI_THRESH    3
+#define ROAM_CONFIG_SCAN_PERIOD    4
+#define ROAM_CONFIG_AP_PROFILE     5
+#define ROAM_CONFIG_CHAN_LIST      6
+#define ROAM_CONFIG_SCAN_PARAMS    7
+#define ROAM_CONFIG_RSSI_CHANGE    8
+#define ROAM_SCAN_TIMER_START      9
+#define ROAM_SCAN_TIMER_EXPIRE    10
+#define ROAM_SCAN_TIMER_STOP      11
+#define ROAM_SCAN_STARTED         12
+#define ROAM_SCAN_COMPLETE        13
+#define ROAM_SCAN_CANCELLED       14
+#define ROAM_CANDIDATE_FOUND      15
+#define ROAM_RSSI_ACTIVE_SCAN     16
+#define ROAM_RSSI_ACTIVE_ROAM     17
+#define ROAM_RSSI_GOOD            18
+#define ROAM_BMISS_FIRST_RECV     19
+#define ROAM_DEV_STOP             20
+#define ROAM_FW_OFFLOAD_ENABLE    21
+#define ROAM_CANDIDATE_SSID_MATCH 22
+#define ROAM_CANDIDATE_SECURITY_MATCH 23
+#define ROAM_LOW_RSSI_INTERRUPT   24
+#define ROAM_HIGH_RSSI_INTERRUPT  25
+#define ROAM_SCAN_REQUESTED       26
+#define ROAM_BETTER_CANDIDATE_FOUND 27
+#define ROAM_BETTER_AP_EVENT 28
+#define ROAM_CANCEL_LOW_PRIO_SCAN 29
+#define ROAM_FINAL_BMISS_RECVD    30
+#define ROAM_CONFIG_SCAN_MODE     31
+#define ROAM_BMISS_FINAL_SCAN_ENABLE 32
+#define ROAM_SUITABLE_AP_EVENT    33
+#define ROAM_RSN_IE_PARSE_ERROR   34
+#define ROAM_WPA_IE_PARSE_ERROR   35
+#define ROAM_SCAN_CMD_FROM_HOST   36
+#define ROAM_HO_SORT_CANDIDATE    37
+#define ROAM_HO_SAVE_CANDIDATE    38
+#define ROAM_HO_GET_CANDIDATE     39
+#define ROAM_HO_OFFLOAD_SET_PARAM 40
+#define ROAM_HO_SM                41
+#define ROAM_HO_HTT_SAVED         42
+#define ROAM_HO_SYNC_START        43
+#define ROAM_HO_START             44
+#define ROAM_HO_SYNC_COMPLETE     45
+#define ROAM_HO_STOP              46
+#define ROAM_HO_HTT_FORWARD       47
+#define ROAM_CONFIG_SCAN_PARAMS_1 48
+#define ROAM_SCAN_COMPLETE_1      49
+#define ROAM_SWBMISS_BCN_RECV_VAL 50
+#define ROAM_SWBMISS_BCN_RECV_THRE2 51
+#define ROAM_SCAN_REQUESTED_1     52
+#define ROAM_HO_SORT_CANDIDATE_CUR  53
+#define ROAM_HO_SAVE_CANDIDATE_DUP  54
+#define ROAM_HO_SM_EVENT          55
+#define ROAM_HO_ENTER_CH          56
+#define ROAM_HO_MGMT_RX           57
+#define ROAM_HO_CANDIDATE_INFO    58
+#define ROAM_HO_OFFLD_DATA_STORE  59
+#define ROAM_HO_HTT_DATA_STORE    60
+#define ROAM_HO_UPDATE_STATUS     61
+#define ROAM_HO_OCS_CH_CB         62
+#define ROAM_RSSI_INTERRUPT_STATE 63
+#define ROAM_INVOKE_PARAM_CHECK   64
+#define ROAM_INVOKE_PARAM_CHAN    65
+#define ROAM_INVOKE_PARAM_BSSID   66
+#define ROAM_INVOKE_STATE_CHECK   67
+#define ROAM_INVOKE_START_SUCCESS 68
+#define ROAM_INVOKE_START_FAILURE 69
+#define ROAM_INVOKE_BSSID_CHECK   70
+#define ROAM_CANDIDATE_INFO       71
+#define ROAM_CANDIDATE_FILTER_MATCH 72
+#define ROAM_CANDIDATE_RSSI_ADJUST  73
+#define ROAM_CONFIG_ROAM_FILTER     74
+#define ROAM_EXTENDED_RSSI_TRESHOLD_1 75
+#define ROAM_EXTENDED_RSSI_TRESHOLD_2 76
+#define ROAM_BLACKLIST_BSSID        77
+#define ROAM_WHITELIST_SSID         78
+#define ROAM_WHITELIST_SSID_2       79
+#define ROAM_PREFERRED_BSSID        80
+#define ROAM_PREFERRED_FACTOR       81
+#define ROAM_SCAN_HIRSSI_THRESHOLD      82
+#define ROAM_SCAN_HIRSSI_CHECK          83
+#define ROAM_SCAN_HIRSSI_TIMER_EXPIRED  84
+#define ROAM_SCAN_EXTSCAN_CHECK         85
+#define ROAM_DBGID_DEFINITION_END   86
+
+/* DATA_TXRX module DBGIDs*/
+#define DATA_TXRX_DBGID_DEFINITION_START         0
+#define DATA_TXRX_DBGID_RX_DATA_SEQ_LEN_INFO     1
+#define DATA_TXRX_DBGID_REPLAY_CHECK             2
+#define DATA_TXRX_DBGID_DUP_CHECK                3
+#define DATA_TXRX_INVALID_PEER_AST_STA           4
+#define DATA_TXRX_INVALID_PEER_AST_P2P           5
+#define DATA_TXRX_INVALID_ADDR1_STA              6
+#define DATA_TXRX_INVALID_ADDR1_P2P              7
+#define DATA_TXRX_MULTICAST_BROADCAST_FRAME      8
+#define DATA_TXRX_INVALID_FRAME_CTRL_OR_ADDR     9
+#define DATA_TXRX_DBGID_DEFINITION_END          10
+
+/* HTT module DBGIDs */
+#define HTT_DBGID_DEFINITION_START               0
+#define HTT_DBGID_INVALID_VDEVID_OR_GROUP        1
+#define HTT_DBGID_DISCARD_INTERNAL_PKTS          2
+#define HTT_DBGID_DISCARD_TX_PKTS                3
+#define HTT_DBGID_GROUP_CHANGE                   4
+#define HTT_DBGID_GROUP_CREDIT_STATS             5
+#define HTT_DBGID_DISCARD_INTERNAL_PKTS_NUM      6
+#define HTT_DBGID_DEFINITION_END                 7
+
+/* TDLS module DBGIDs*/
+#define TDLS_DBGID_DEFINITION_START             0
+#define TDLS_DBGID_VDEV_CREATE                  1
+#define TDLS_DBGID_VDEV_DELETE                  2
+#define TDLS_DBGID_ENABLED_PASSIVE              3
+#define TDLS_DBGID_ENABLED_ACTIVE               4
+#define TDLS_DBGID_DISABLED                     5
+#define TDLS_DBGID_CONNTRACK_TIMER              6
+#define TDLS_DBGID_WAL_SET                      7
+#define TDLS_DBGID_WAL_GET                      8
+#define TDLS_DBGID_WAL_PEER_UPDATE_SET          9
+#define TDLS_DBGID_WAL_PEER_UPDATE_EVT         10
+#define TDLS_DBGID_WAL_VDEV_CREATE             11
+#define TDLS_DBGID_WAL_VDEV_DELETE             12
+#define TDLS_DBGID_WLAN_EVENT                  13
+#define TDLS_DBGID_WLAN_PEER_UPDATE_SET        14
+#define TDLS_DBGID_PEER_EVT_DRP_THRESH         15
+#define TDLS_DBGID_PEER_EVT_DRP_RATE           16
+#define TDLS_DBGID_PEER_EVT_DRP_RSSI           17
+#define TDLS_DBGID_PEER_EVT_DISCOVER           18
+#define TDLS_DBGID_PEER_EVT_DELETE             19
+#define TDLS_DBGID_PEER_CAP_UPDATE             20
+#define TDLS_DBGID_UAPSD_SEND_PTI_FRAME        21
+#define TDLS_DBGID_UAPSD_SEND_PTI_FRAME2PEER   22
+#define TDLS_DBGID_UAPSD_START_PTR_TIMER       23
+#define TDLS_DBGID_UAPSD_CANCEL_PTR_TIMER      24
+#define TDLS_DBGID_UAPSD_PTR_TIMER_TIMEOUT     25
+#define TDLS_DBGID_UAPSD_STA_PS_EVENT_HANDLER  26
+#define TDLS_DBGID_UAPSD_PEER_EVENT_HANDLER    27
+#define TDLS_DBGID_UAPSD_PS_DEFAULT_SETTINGS   28
+#define TDLS_DBGID_UAPSD_GENERIC               29
+
+/* TXBF Module IDs */
+#define TXBFEE_DBGID_START                      0
+#define TXBFEE_DBGID_NDPA_RECEIVED              1
+#define TXBFEE_DBGID_HOST_CONFIG_TXBFEE_TYPE    2
+#define TXBFER_DBGID_SEND_NDPA                  3
+#define TXBFER_DBGID_GET_NDPA_BUF_FAIL          4
+#define TXBFER_DBGID_SEND_NDPA_FAIL             5
+#define TXBFER_DBGID_GET_NDP_BUF_FAIL           6
+#define TXBFER_DBGID_SEND_NDP_FAIL              7
+#define TXBFER_DBGID_GET_BRPOLL_BUF_FAIL        8
+#define TXBFER_DBGID_SEND_BRPOLL_FAIL           9
+#define TXBFER_DBGID_HOST_CONFIG_CMDID         10
+#define TXBFEE_DBGID_HOST_CONFIG_CMDID         11
+#define TXBFEE_DBGID_ENABLE_UPLOAD_H           12
+#define TXBFEE_DBGID_UPLOADH_CV_TAG            13
+#define TXBFEE_DBGID_UPLOADH_H_TAG             14
+#define TXBFEE_DBGID_CAPTUREH_RECEIVED         15
+#define TXBFEE_DBGID_PACKET_IS_STEERED         16
+#define TXBFEE_UPLOADH_EVENT_ALLOC_MEM_FAIL    17
+#define TXBFEE_DBGID_SW_WAR_AID_ZERO           18
+#define TXBFEE_DBGID_BRPOLL_RECEIVED           19
+#define TXBFEE_DBGID_GID_RECEIVED              20
+#define TXBFEE_DBGID_END                       21
+
+/* SMPS module DBGIDs */
+#define STA_SMPS_DBGID_DEFINITION_START                 0
+#define STA_SMPS_DBGID_CREATE_PDEV_INSTANCE             1
+#define STA_SMPS_DBGID_CREATE_VIRTUAL_CHAN_INSTANCE     2
+#define STA_SMPS_DBGID_DELETE_VIRTUAL_CHAN_INSTANCE     3
+#define STA_SMPS_DBGID_CREATE_STA_INSTANCE              4
+#define STA_SMPS_DBGID_DELETE_STA_INSTANCE              5
+#define STA_SMPS_DBGID_VIRTUAL_CHAN_SMPS_START          6
+#define STA_SMPS_DBGID_VIRTUAL_CHAN_SMPS_STOP           7
+#define STA_SMPS_DBGID_SEND_SMPS_ACTION_FRAME           8
+#define STA_SMPS_DBGID_HOST_FORCED_MODE                 9
+#define STA_SMPS_DBGID_FW_FORCED_MODE                   10
+#define STA_SMPS_DBGID_RSSI_THRESHOLD_CROSSED           11
+#define STA_SMPS_DBGID_SMPS_ACTION_FRAME_COMPLETION     12
+#define STA_SMPS_DBGID_DTIM_EBT_EVENT_CHMASK_UPDATE     13
+#define STA_SMPS_DBGID_DTIM_CHMASK_UPDATE               14
+#define STA_SMPS_DBGID_DTIM_BEACON_EVENT_CHMASK_UPDATE  15
+#define STA_SMPS_DBGID_DTIM_POWER_STATE_CHANGE          16
+#define STA_SMPS_DBGID_DTIM_CHMASK_UPDATE_SLEEP         17
+#define STA_SMPS_DBGID_DTIM_CHMASK_UPDATE_AWAKE         18
+
+#define STA_SMPS_DBGID_DEFINITION_END                   18
+
+/* RTT module DBGIDs*/
+#define RTT_CALL_FLOW                 0
+#define RTT_REQ_SUB_TYPE              1
+#define RTT_MEAS_REQ_HEAD             2
+#define RTT_MEAS_REQ_BODY             3
+#define RTT_INIT_GLOBAL_STATE         6
+#define RTT_REPORT                    8
+#define RTT_ERROR_REPORT              10
+#define RTT_TIMER_STOP                11
+#define RTT_SEND_TM_FRAME             12
+#define RTT_V3_RESP_CNT               13
+#define RTT_V3_RESP_FINISH            14
+#define RTT_CHANNEL_SWITCH_REQ        15
+#define RTT_CHANNEL_SWITCH_GRANT      16
+#define RTT_CHANNEL_SWITCH_COMPLETE   17
+#define RTT_CHANNEL_SWITCH_PREEMPT    18
+#define RTT_CHANNEL_SWITCH_STOP       19
+#define RTT_TIMER_START               20
+
+#define RTT_FTM_PARAM_INFO            21
+#define RTT_RX_TM_FRAME               22
+#define RTT_INITR_TSTAMP              23
+#define RTT_RSPDR_TSTAMP              24
+#define RTT_TX_COMP_STATUS            25
+#define RTT_ERROR_WMI_EVENT           26
+#define RTT_MEASUREMENT_VALUES        27
+
+/* WLAN HB module DBGIDs */
+#define WLAN_HB_DBGID_DEFINITION_START                  0
+#define WLAN_HB_DBGID_INIT                              1
+#define WLAN_HB_DBGID_TCP_GET_TXBUF_FAIL                2
+#define WLAN_HB_DBGID_TCP_SEND_FAIL                     3
+#define WLAN_HB_DBGID_BSS_PEER_NULL                     4
+#define WLAN_HB_DBGID_UDP_GET_TXBUF_FAIL                5
+#define WLAN_HB_DBGID_UDP_SEND_FAIL                     6
+#define WLAN_HB_DBGID_WMI_CMD_INVALID_PARAM             7
+#define WLAN_HB_DBGID_WMI_CMD_INVALID_OP                8
+#define WLAN_HB_DBGID_WOW_NOT_ENTERED                   9
+#define WLAN_HB_DBGID_ALLOC_SESS_FAIL                   10
+#define WLAN_HB_DBGID_CTX_NULL                          11
+#define WLAN_HB_DBGID_CHKSUM_ERR                        12
+#define WLAN_HB_DBGID_UDP_TX                            13
+#define WLAN_HB_DBGID_TCP_TX                            14
+#define WLAN_HB_DBGID_DEFINITION_END                    15
+
+/* Thermal Manager DBGIDs*/
+#define THERMAL_MGR_DBGID_DEFINITION_START   0
+#define THERMAL_MGR_NEW_THRESH               1
+#define THERMAL_MGR_THRESH_CROSSED           2
+#define THERMAL_MGR_DBGID_DEFINITION_END     3
+
+/* WLAN PHYERR DFS(parse/filter) DBGIDs */
+#define WLAN_PHYERR_DFS_DBGID_DEFINITION_START    0
+#define WLAN_PHYERR_DFS_PHYERR_INFO_CHAN_BUFLEN   1
+#define WLAN_PHYERR_DFS_PHYERR_INFO_PPDU          2
+#define WLAN_PHYERR_DFS_DBDID_RADAR_SUMMARY       3
+#define WLAN_PHYERR_DFS_DBDID_SEARCH_FFT          4
+#define WLAN_PHTERR_DFS_DBDID_FILTER_STATUS       5
+#define WLAN_PHYERR_DFS_DBGID_DEFINITION_END      6
+
+/* RMC DBGIDs */
+#define RMC_DBGID_DEFINITION_START             0
+#define RMC_SM_INIT_ERR                        1
+#define RMC_VDEV_ALLOC_ERR                     2
+#define RMC_CREATE_INSTANCE                    3
+#define RMC_DELETE_INSTANCE                    4
+#define RMC_NEW_PRI_LEADER                     5
+#define RMC_NEW_SEC_LEADER                     6
+#define RMC_NO_LDR_CHANGE                      7
+#define RMC_LDR_INFORM_SENT                    8
+#define RMC_PEER_ADD                           9
+#define RMC_PEER_DELETE                        10
+#define RMC_PEER_UNKNOWN                       11
+#define RMC_PRI_LDR_RSSI_UPDATE                12
+#define RMC_SEC_LDR_RSSI_UPDATE                13
+#define RMC_SET_MODE                           14
+#define RMC_SET_ACTION_PERIOD                  15
+#define RMC_DBGID_DEFINITION_END               16
+
+/* UNIT_TEST module DBGIDs */
+#define UNIT_TEST_GEN                 0
+
+/* MLME module DBGIDs */
+#define MLME_DEBUG_CMN                0
+#define MLME_DEBUG_IF                 1
+#define MLME_DEBUG_AUTH               2
+#define MLME_DEBUG_REASSOC            3
+#define MLME_DEBUG_DEAUTH             4
+#define MLME_DEBUG_DISASSOC           5
+#define MLME_DEBUG_ROAM               6
+#define MLME_DEBUG_RETRY              7
+#define MLME_DEBUG_TIMER              8
+#define MLME_DEBUG_FRAMEPARSE         9
+
+/* SUPPL module DBGIDs */
+#define SUPPL_DBGID_INIT                        0
+#define SUPPL_DBGID_RECV_EAPOL                  1
+#define SUPPL_DBGID_RECV_EAPOL_TIMEOUT          2
+#define SUPPL_DBGID_SEND_EAPOL                  3
+#define SUPPL_DBGID_MIC_MISMATCH                4
+#define SUPPL_DBGID_FINISH                      5
+#define SUPPL_DBGID_GET_FRM_INFO                6
+#define SUPPL_DBGID_DUMP_TYPE                   7
+#define SUPPL_DBGID_DUMP_HEX                    8
+#define SUPPL_DBGID_NODE_NOT_FOUND              9
+#define SUPPL_DBGID_GET_EAPOL_BUF               10
+#define SUPPL_DBGID_GET_BUF_FAIL                11
+#define SUPPL_DBGID_RECV_EAPOL_ERROR            12
+
+/* Stats Module DBGIDs */
+#define WLAN_STATS_DBGID_DEFINITION_START                0
+#define WLAN_STATS_DBGID_EST_LINKSPEED_VDEV_EN_DIS       1
+#define WLAN_STATS_DBGID_EST_LINKSPEED_CHAN_TIME_START   2
+#define WLAN_STATS_DBGID_EST_LINKSPEED_CHAN_TIME_END     3
+#define WLAN_STATS_DBGID_EST_LINKSPEED_CALC              4
+#define WLAN_STATS_DBGID_EST_LINKSPEED_UPDATE_HOME_CHAN  5
+#define WLAN_STATS_DBGID_DEFINITION_END                  6
+/* NAN DBGIDs */
+#define NAN_DBGID_START                             0
+
+/* Debug IDs for debug logs. 3 args max, not fixed. */
+#define NAN_DBGID_DBG_LOG_FIRST                     1
+#define NAN_DBGID_FUNC_BEGIN                        NAN_DBGID_DBG_LOG_FIRST
+#define NAN_DBGID_FUNC_END                          2
+#define NAN_DBGID_MAIN_DEBUG                        3
+#define NAN_DBGID_MAC_DEBUG                         4
+#define NAN_DBGID_BLOOM_FILTER_DEBUG                5
+#define NAN_DBGID_MAC_ADDR                          6
+#define NAN_DBGID_PARAM_UPDATED                     7
+#define NAN_DBGID_NULL_PTR                          8
+#define NAN_DBGID_INVALID_FUNC_ARG                  9
+#define NAN_DBGID_INVALID_MSG_PARAM                 10
+#define NAN_DBGID_MISSING_MSG_PARAM                 11
+#define NAN_DBGID_DEPRECATED_MSG_PARAM              12
+#define NAN_DBGID_UNSUPPORTED_MSG_PARAM             13
+#define NAN_DBGID_INVALID_PKT_DATA                  14
+#define NAN_DBGID_LOG_PKT_DATA                      15
+#define NAN_DBGID_INVALID_VALUE                     16
+#define NAN_DBGID_INVALID_OPERATION                 17
+#define NAN_DBGID_INVALID_STATE                     18
+#define NAN_DBGID_FUNCTION_ENABLED                  19
+#define NAN_DBGID_FUNCTION_DISABLED                 20
+#define NAN_DBGID_INVALID_FUNCTION_STATE            21
+#define NAN_DBGID_READ_ERROR                        22
+#define NAN_DBGID_WRITE_ERROR                       23
+#define NAN_DBGID_RECEIVE_ERROR                     24
+#define NAN_DBGID_TRANSMIT_ERROR                    25
+#define NAN_DBGID_PARSE_ERROR                       26
+#define NAN_DBGID_RES_ALLOC_ERROR                   27
+/* PLEASE KEEP THIS ONE AT THE END */
+#define NAN_DBGID_DBG_LOG_LAST                      28
+
+/* Debug IDs for event logs. */
+
+#define NAN_DBGID_EVT_BASE                          NAN_DBGID_DBG_LOG_LAST
+/* args: <none> */
+#define NAN_DBGID_NAN_ENABLED                       (NAN_DBGID_EVT_BASE + 0)
+/* args: <none> */
+#define NAN_DBGID_NAN_DISABLED                      (NAN_DBGID_EVT_BASE + 1)
+/* args: <none> */
+#define NAN_DBGID_CONFIG_RESTORED                   (NAN_DBGID_EVT_BASE + 2)
+/* args: framesQueued */
+#define NAN_DBGID_SDF_QUEUED                        (NAN_DBGID_EVT_BASE + 3)
+/* args: old, new */
+#define NAN_DBGID_TW_CHANGED                        (NAN_DBGID_EVT_BASE + 4)
+/* args: <none> */
+#define NAN_DBGID_DW_START                          (NAN_DBGID_EVT_BASE + 5)
+/* args: busyDiff */
+#define NAN_DBGID_DW_END                            (NAN_DBGID_EVT_BASE + 6)
+/* args: oldClusterId, newClusterId */
+#define NAN_DBGID_CLUSTER_ID_CHANGED                (NAN_DBGID_EVT_BASE + 7)
+/* args: cmd, buffer, length */
+#define NAN_DBGID_WMI_CMD_RECEIVED                  (NAN_DBGID_EVT_BASE + 8)
+/* args: pEventPkt, pEventBuf, eventSize, dataSize */
+#define NAN_DBGID_WMI_EVT_SENT                      (NAN_DBGID_EVT_BASE + 9)
+/* args: type length, readLen */
+#define NAN_DBGID_TLV_READ                          (NAN_DBGID_EVT_BASE + 10)
+/* args: type length, writeLen */
+#define NAN_DBGID_TLV_WRITE                         (NAN_DBGID_EVT_BASE + 11)
+/* args: handle */
+#define NAN_DBGID_PUBSUB_UPDATED                    (NAN_DBGID_EVT_BASE + 12)
+/* args: handle */
+#define NAN_DBGID_PUBSUB_REMOVE_DEFERED             (NAN_DBGID_EVT_BASE + 13)
+/* args: handle */
+#define NAN_DBGID_PUBSUB_REMOVE_PENDING             (NAN_DBGID_EVT_BASE + 14)
+/* args: handle */
+#define NAN_DBGID_PUBSUB_REMOVED                    (NAN_DBGID_EVT_BASE + 15)
+/* args: handle */
+#define NAN_DBGID_PUBSUB_PROCESSED                  (NAN_DBGID_EVT_BASE + 16)
+/* args: handle, sid1, sid2, svcCtrl, length */
+#define NAN_DBGID_PUBSUB_MATCHED                    (NAN_DBGID_EVT_BASE + 17)
+/* args: handle, flags */
+#define NAN_DBGID_PUBSUB_PREPARED                   (NAN_DBGID_EVT_BASE + 18)
+/* args: handle, mac1, mac2 */
+#define NAN_DBGID_PUBSUB_FOLLOWUP_TRANSMIT          (NAN_DBGID_EVT_BASE + 19)
+/* args: handle, mac1, mac2 */
+#define NAN_DBGID_PUBSUB_FOLLOWUP_RECEIVED          (NAN_DBGID_EVT_BASE + 20)
+/* args: subscribeHandle, matchHandle, oldTimeout, newTimeout */
+#define NAN_DBGID_SUBSCRIBE_UNMATCH_TIMEOUT_UPDATE  (NAN_DBGID_EVT_BASE + 21)
+/* args: subscribeHandle, matchHandle, timestamp*/
+#define NAN_DBGID_SUBSCRIBE_MATCH_NEW               (NAN_DBGID_EVT_BASE + 22)
+/* args: subscribeHandle, matchHandle, timestamp*/
+#define NAN_DBGID_SUBSCRIBE_MATCH_REPEAT            (NAN_DBGID_EVT_BASE + 23)
+/* args: subscribeHandle, matchHandle, matchTimestamp, timestamp*/
+#define NAN_DBGID_SUBSCRIBE_MATCH_EXPIRED           (NAN_DBGID_EVT_BASE + 24)
+/* args: subscribeHandle, matchHandle, matchTimestamp, timestamp */
+#define NAN_DBGID_SUBSCRIBE_MATCH_LOG               (NAN_DBGID_EVT_BASE + 25)
+/* args: sid1, sid2 */
+#define NAN_DBGID_SERVICE_ID_CREATED                (NAN_DBGID_EVT_BASE + 26)
+/* args: size */
+#define NAN_DBGID_SD_ATTR_BUILT                     (NAN_DBGID_EVT_BASE + 27)
+/* args: offset */
+#define NAN_DBGID_SERVICE_RSP_OFFSET                (NAN_DBGID_EVT_BASE + 28)
+/* args: offset */
+#define NAN_DBGID_SERVICE_INFO_OFFSET               (NAN_DBGID_EVT_BASE + 29)
+/* args: chan, interval, start_time */
+#define NAN_DBGID_CHREQ_CREATE                      (NAN_DBGID_EVT_BASE + 30)
+/* args: start_time, status */
+#define NAN_DBGID_CHREQ_UPDATE                      (NAN_DBGID_EVT_BASE + 31)
+/* args: chan, interval, status */
+#define NAN_DBGID_CHREQ_REMOVE                      (NAN_DBGID_EVT_BASE + 32)
+/* args: type, timestamp */
+#define NAN_DBGID_CHREQ_GRANT                       (NAN_DBGID_EVT_BASE + 33)
+/* args: type, timestamp */
+#define NAN_DBGID_CHREQ_END                         (NAN_DBGID_EVT_BASE + 34)
+/* args: type, timestamp */
+#define NAN_DBGID_CHREQ_ERROR                       (NAN_DBGID_EVT_BASE + 35)
+/* args: type, length, timestamp, rssi */
+#define NAN_DBGID_RX_CALLBACK                       (NAN_DBGID_EVT_BASE + 36)
+/* args: type, handle, bufp, status, timestamp  */
+#define NAN_DBGID_TX_COMPLETE                       (NAN_DBGID_EVT_BASE + 37)
+/* args: tsf, tsf */
+#define NAN_DBGID_TSF_TIMEOUT                       (NAN_DBGID_EVT_BASE + 38)
+/* args: clusterId, clusterStart */
+#define NAN_DBGID_SYNC_START                        (NAN_DBGID_EVT_BASE + 39)
+/* args: clusterId */
+#define NAN_DBGID_SYNC_STOP                         (NAN_DBGID_EVT_BASE + 40)
+/* args: enable, scanType, rval */
+#define NAN_DBGID_NAN_SCAN                          (NAN_DBGID_EVT_BASE + 41)
+/* args: scanType */
+#define NAN_DBGID_NAN_SCAN_COMPLETE                 (NAN_DBGID_EVT_BASE + 42)
+/* args: masterPref */
+#define NAN_DBGID_MPREF_CHANGE                      (NAN_DBGID_EVT_BASE + 43)
+/* args: masterPref, randFactor */
+#define NAN_DBGID_WARMUP_EXPIRE                     (NAN_DBGID_EVT_BASE + 44)
+/* args: randFactor */
+#define NAN_DBGID_RANDOM_FACTOR_EXPIRE              (NAN_DBGID_EVT_BASE + 45)
+/* args: tsf, tsf */
+#define NAN_DBGID_DW_SKIP                           (NAN_DBGID_EVT_BASE + 46)
+/* args: type, tsfDiff */
+#define NAN_DBGID_DB_SKIP                           (NAN_DBGID_EVT_BASE + 47)
+/* args: TBD */
+#define NAN_DBGID_BEACON_RX                         (NAN_DBGID_EVT_BASE + 48)
+/* args: TBD */
+#define NAN_DBGID_BEACON_TX                         (NAN_DBGID_EVT_BASE + 49)
+/* args: clusterId */
+#define NAN_DBGID_CLUSTER_MERGE                     (NAN_DBGID_EVT_BASE + 50)
+/* args: cmd, status, value */
+#define NAN_DBGID_TEST_CMD_EXEC                     (NAN_DBGID_EVT_BASE + 51)
+/* args: tsfHi, tsfLo, age */
+#define NAN_DBGID_APPLY_BEACON_TSF                  (NAN_DBGID_EVT_BASE + 52)
+/* args: behindFlag, diff */
+#define NAN_DBGID_TSF_UPDATE                        (NAN_DBGID_EVT_BASE + 53)
+/* args: argc==4 (rawTsfHi, rawTsfLo, nanTsfHi, nanTsfLo), argc==2(offsetHi, offsetLo) */
+#define NAN_DBGID_SET_TSF                           (NAN_DBGID_EVT_BASE + 54)
+/* args: rankHi, rankLo, mp, rf */
+#define NAN_DBGID_NEW_MASTERRANK                    (NAN_DBGID_EVT_BASE + 55)
+/* args: amRankHi, amRankLo, mp, rf */
+#define NAN_DBGID_NEW_ANCHORMASTER                  (NAN_DBGID_EVT_BASE + 56)
+/* args: amRankHi, amRankLo, HC, BTT */
+#define NAN_DBGID_ANCHORMASTER_RECORD_UPDATE        (NAN_DBGID_EVT_BASE + 57)
+/* args: amRankHi, amRankLo, HC, BTT */
+#define NAN_DBGID_ANCHORMASTER_RECORD_EXPIRED       (NAN_DBGID_EVT_BASE + 58)
+/* args: reason, transitionsToAM */
+#define NAN_DBGID_BECOMING_ANCHORMASTER             (NAN_DBGID_EVT_BASE + 59)
+/* args: oldRole, newRole */
+#define NAN_DBGID_ROLE_CHANGE                       (NAN_DBGID_EVT_BASE + 60)
+/* args: TBD */
+#define NAN_DBGID_SYNC_BEACON_DW_STATS              (NAN_DBGID_EVT_BASE + 61)
+/* args: attrId */
+#define NAN_DBGID_RX_UNSUPPORTED_SDF_ATTR_ID        (NAN_DBGID_EVT_BASE + 62)
+/* args: handle, sid1, sid2, svcCtrl, length */
+#define NAN_DBGID_PUBSUB_MATCHED_SKIPPED_SSI        (NAN_DBGID_EVT_BASE + 63)
+/* args: offset */
+#define NAN_DBGID_MATCH_FILTER_OFFSET               (NAN_DBGID_EVT_BASE + 64)
+/* args: twSize, n, twIndex */
+#define NAN_DBGID_TW_PARAMS                         (NAN_DBGID_EVT_BASE + 65)
+/* args: */
+#define NAN_DBGID_BEACON_SENDER                     (NAN_DBGID_EVT_BASE + 66)
+/* args: currTsf, nextDwTsf */
+#define NAN_DBGID_TSF_DUMP                          (NAN_DBGID_EVT_BASE + 67)
+/* args: chan, startSlot, numSlots, repeat */
+#define NAN_DBGID_FAW_CONFIG                        (NAN_DBGID_EVT_BASE + 68)
+/* args: */
+#define NAN_DBGID_FAW_START                         (NAN_DBGID_EVT_BASE + 69)
+/* args: */
+#define NAN_DBGID_FAW_END                           (NAN_DBGID_EVT_BASE + 70)
+/* args: offset, oldval, newval */
+#define NAN_DBGID_CONFIG_PARAM_CHANGED              (NAN_DBGID_EVT_BASE + 71)
+/* args: <none> */
+#define NAN_DBGID_CONN_CAP_ATTR_CLEARED             (NAN_DBGID_EVT_BASE + 72)
+/* args: connType */
+#define NAN_DBGID_POST_DISC_ATTR_CLEARED            (NAN_DBGID_EVT_BASE + 73)
+/* args: <none> */
+#define NAN_DBGID_VENDOR_SPECIFIC_ATTR_CLEARED      (NAN_DBGID_EVT_BASE + 74)
+/* args: offset */
+#define NAN_DBGID_WLAN_INFRA_MAP_CTRL_OFFSET        (NAN_DBGID_EVT_BASE + 75)
+/* args: offset */
+#define NAN_DBGID_WLAN_INFRA_AI_BITMAP_OFFSET       (NAN_DBGID_EVT_BASE + 76)
+/* args: offset */
+#define NAN_DBGID_WLAN_INFRA_DEVICE_ROLE_OFFSET     (NAN_DBGID_EVT_BASE + 77)
+/* args: offset */
+#define NAN_DBGID_MESH_ID_OFFSET                    (NAN_DBGID_EVT_BASE + 78)
+/* args: */
+#define NAN_DBGID_SPARE_79                          (NAN_DBGID_EVT_BASE + 79)
+/* args: */
+#define NAN_DBGID_SPARE_80                          (NAN_DBGID_EVT_BASE + 80)
+/* args: */
+#define NAN_DBGID_SPARE_81                          (NAN_DBGID_EVT_BASE + 81)
+/* args: */
+#define NAN_DBGID_SPARE_82                          (NAN_DBGID_EVT_BASE + 82)
+/* args: */
+#define NAN_DBGID_SPARE_83                          (NAN_DBGID_EVT_BASE + 83)
+/* PLEASE KEEP THIS ONE AT THE END */
+#define NAN_DBGID_EVT_LOG_LAST                      (NAN_DBGID_EVT_BASE + 84)
+
+/* Debug IDs for message logs. */
+#define NAN_DBGID_API_MSG_BASE                      NAN_DBGID_EVT_LOG_LAST
+#define NAN_DBGID_API_MSG_HEADER                    (NAN_DBGID_API_MSG_BASE + 0)
+#define NAN_DBGID_API_MSG_DATA                      (NAN_DBGID_API_MSG_BASE + 1)
+#define NAN_DBGID_API_MSG_LAST                      (NAN_DBGID_API_MSG_BASE + 2)
+
+/* Debug IDs for packet logs. */
+#define NAN_DBGID_OTA_PKT_BASE                      NAN_DBGID_API_MSG_LAST
+#define NAN_DBGID_OTA_PKT_HEADER                    (NAN_DBGID_OTA_PKT_BASE + 0)
+#define NAN_DBGID_OTA_PKT_DATA                      (NAN_DBGID_OTA_PKT_BASE + 1)
+#define NAN_DBGID_OTA_PKT_LAST                      (NAN_DBGID_OTA_PKT_BASE + 2) /*  not really the last! */
+
+#define NAN_DBGID_BEACON_RX_TIMES               (NAN_DBGID_OTA_PKT_LAST + 0)
+#define NAN_DBGID_BEACON_RX_MANDATORY_ATTRS     (NAN_DBGID_OTA_PKT_LAST + 1)
+#define NAN_DBGID_BEACON_RX_SID_ATTR            (NAN_DBGID_OTA_PKT_LAST + 2)
+#define NAN_DBGID_BEACON_RX_VSA_ATTR            (NAN_DBGID_OTA_PKT_LAST + 3)
+#define NAN_DBGID_BEACON_RX_AVG_RSSI            (NAN_DBGID_OTA_PKT_LAST + 4)
+#define NAN_DBGID_CANDIDATE_BEACONS             (NAN_DBGID_OTA_PKT_LAST + 5)
+#define NAN_DBGID_TSF_OFFSET                    (NAN_DBGID_OTA_PKT_LAST + 6)
+#define NAN_DBGID_ANCHORMASTER_RECORD_UPDATE_LAST       (NAN_DBGID_OTA_PKT_LAST + 7)
+#define NAN_DBGID_ANCHORMASTER_RECORD_EXPIRED2  (NAN_DBGID_OTA_PKT_LAST + 8)
+#define NAN_DBGID_BEACON_TX_SEND                (NAN_DBGID_OTA_PKT_LAST + 9)
+#define NAN_DBGID_BEACON_TX_CANCEL              (NAN_DBGID_OTA_PKT_LAST + 10)
+#define NAN_DBGID_NAN_SCAN_EVENT                (NAN_DBGID_OTA_PKT_LAST + 11)
+#define NAN_DBGID_NAN_SDF_QUEUED                (NAN_DBGID_OTA_PKT_LAST + 12)
+#define NAN_DBGID_NAN_BEACON_QUEUED             (NAN_DBGID_OTA_PKT_LAST + 13)
+#define NAN_DBGID_NAN_NOT_ALLOWED               (NAN_DBGID_OTA_PKT_LAST + 14)
+
+#define NAN_DBGID_END                           (NAN_DBGID_NAN_NOT_ALLOWED + 1)
+
+/* IBSS PS module DBGIDs*/
+#define IBSS_PS_DBGID_DEFINITION_START           0
+#define IBSS_PS_DBGID_PEER_CREATE                1
+#define IBSS_PS_DBGID_PEER_DELETE                2
+#define IBSS_PS_DBGID_VDEV_CREATE                3
+#define IBSS_PS_DBGID_VDEV_DELETE                4
+#define IBSS_PS_DBGID_VDEV_EVENT                 5
+#define IBSS_PS_DBGID_PEER_EVENT                 6
+#define IBSS_PS_DBGID_DELIVER_CAB                7
+#define IBSS_PS_DBGID_DELIVER_UC_DATA            8
+#define IBSS_PS_DBGID_DELIVER_UC_DATA_ERROR      9
+#define IBSS_PS_DBGID_UC_INACTIVITY_TMR_RESTART 10
+#define IBSS_PS_DBGID_MC_INACTIVITY_TMR_RESTART 11
+#define IBSS_PS_DBGID_NULL_TX_COMPLETION        12
+#define IBSS_PS_DBGID_ATIM_TIMER_START          13
+#define IBSS_PS_DBGID_UC_ATIM_SEND              14
+#define IBSS_PS_DBGID_BC_ATIM_SEND              15
+#define IBSS_PS_DBGID_UC_TIMEOUT                16
+#define IBSS_PS_DBGID_PWR_COLLAPSE_ALLOWED      17
+#define IBSS_PS_DBGID_PWR_COLLAPSE_NOT_ALLOWED  18
+#define IBSS_PS_DBGID_SET_PARAM                 19
+#define IBSS_PS_DBGID_HOST_TX_PAUSE             20
+#define IBSS_PS_DBGID_HOST_TX_UNPAUSE           21
+#define IBSS_PS_DBGID_PS_DESC_BIN_HWM           22
+#define IBSS_PS_DBGID_PS_DESC_BIN_LWM           23
+#define IBSS_PS_DBGID_PS_KICKOUT_PEER           24
+#define IBSS_PS_DBGID_SET_PEER_PARAM            25
+#define IBSS_PS_DBGID_BCN_ATIM_WIN_MISMATCH     26
+#define IBSS_PS_DBGID_RX_CHAINMASK_CHANGE       27
+
+/* HIF UART Interface DBGIDs */
+#define HIF_UART_DBGID_START               0
+#define HIF_UART_DBGID_POWER_STATE         1
+#define HIF_UART_DBGID_TXRX_FLOW           2
+#define HIF_UART_DBGID_TXRX_CTRL_CHAR      3
+#define HIF_UART_DBGID_TXRX_BUF_DUMP       4
+
+/* EXTSCAN DBGIDs */
+#define EXTSCAN_START                                    0
+#define EXTSCAN_STOP                                     1
+#define EXTSCAN_CLEAR_ENTRY_CONTENT                      2
+#define EXTSCAN_GET_FREE_ENTRY_SUCCESS                   3
+#define EXTSCAN_GET_FREE_ENTRY_INCONSISTENT              4
+#define EXTSCAN_GET_FREE_ENTRY_NO_MORE_ENTRIES           5
+#define EXTSCAN_CREATE_ENTRY_SUCCESS                     6
+#define EXTSCAN_CREATE_ENTRY_ERROR                       7
+#define EXTSCAN_SEARCH_SCAN_ENTRY_QUEUE                  8
+#define EXTSCAN_SEARCH_SCAN_ENTRY_KEY_FOUND              9
+#define EXTSCAN_SEARCH_SCAN_ENTRY_KEY_NOT_FOUND         10
+#define EXTSCAN_ADD_ENTRY                               11
+#define EXTSCAN_BUCKET_SEND_OPERATION_EVENT             12
+#define EXTSCAN_BUCKET_SEND_OPERATION_EVENT_FAILED      13
+#define EXTSCAN_BUCKET_START_SCAN_CYCLE                 14
+#define EXTSCAN_BUCKET_PERIODIC_TIMER                   15
+#define EXTSCAN_SEND_START_STOP_EVENT                   16
+#define EXTSCAN_NOTIFY_WLAN_CHANGE                      17
+#define EXTSCAN_NOTIFY_WLAN_HOTLIST_MATCH               18
+#define EXTSCAN_MAIN_RECEIVED_FRAME                     19
+#define EXTSCAN_MAIN_NO_SSID_IE                         20
+#define EXTSCAN_MAIN_MALFORMED_FRAME                    21
+#define EXTSCAN_FIND_BSSID_BY_REFERENCE                 22
+#define EXTSCAN_FIND_BSSID_BY_REFERENCE_ERROR           23
+#define EXTSCAN_NOTIFY_TABLE_USAGE                      24
+#define EXTSCAN_FOUND_RSSI_ENTRY                        25
+#define EXTSCAN_BSSID_FOUND_RSSI_SAMPLE                 26
+#define EXTSCAN_BSSID_ADDED_RSSI_SAMPLE                 27
+#define EXTSCAN_BSSID_REPLACED_RSSI_SAMPLE              28
+#define EXTSCAN_BSSID_TRANSFER_CURRENT_SAMPLES          29
+#define EXTSCAN_BUCKET_PROCESS_SCAN_EVENT               30
+#define EXTSCAN_BUCKET_CANNOT_FIND_BUCKET               31
+#define EXTSCAN_START_SCAN_REQUEST_FAILED               32
+#define EXTSCAN_BUCKET_STOP_CURRENT_SCANS               33
+#define EXTSCAN_BUCKET_SCAN_STOP_REQUEST                34
+#define EXTSCAN_BUCKET_PERIODIC_TIMER_ERROR             35
+#define EXTSCAN_BUCKET_START_OPERATION                  36
+#define EXTSCAN_START_INTERNAL_ERROR                    37
+#define EXTSCAN_NOTIFY_HOTLIST_MATCH                    38
+#define EXTSCAN_CONFIG_HOTLIST_TABLE                    39
+#define EXTSCAN_CONFIG_WLAN_CHANGE_TABLE                40
+
+/* NLO DBGIDs */
+#define NLO_DBGID_SSID_TO_BE_SCANNED_LIST 0
+#define NLO_DBGID_SSID_TO_BE_SKIPPED_LIST 1
+
+/* Channel prediction/reduction DBGIDs */
+#define SCAN_CH_PREDICT_DBGID_DEFINITION_START          0
+#define SCAN_CH_PREDICT_CALCULATE                       1
+#define SCAN_CH_PREDICT_CALCULATE_SAMPLE                2
+#define SCAN_CH_PREDICT_CALCULATE_RESULT                3
+#define SCAN_CH_PREDICT_FOUND_BSS                       4
+#define SCAN_CH_PREDICT_SCAN_START                      5
+#define SCAN_CH_PREDICT_START                           6
+#define SCAN_CH_PREDICT_STOP                            7
+#define SCAN_CH_PREDICT_DBGID_DEFINITION_END            8
+
+/* DSRC DBGIDs */
+#define  OCB_DBGID_VDEV_CREATE                          0
+#define  OCB_DBGID_VDEV_DELETE                          1
+#define  OCB_DBGID_CHAN_PAUSE                           2
+#define  OCB_DBGID_CHAN_UNPAUSE                         3
+#define  OCB_DBGID_PEER_CREATE                          4
+#define  OCB_DBGID_PEER_DELETE                          5
+#define  OCB_DBGID_DCC_START                            6
+#define  OCB_DBGID_DCC_STOP                             7
+#define  OCB_DBGID_SET_CONFIG_CMD                       8
+#define  OCB_DBGID_SET_UTC_TIME_CMD                     9
+#define  OCB_DBGID_START_TIMING_ADVERT_CMD              10
+#define  OCB_DBGID_STOP_TIMING_ADVERT_CMD               11
+#define  OCB_DBGID_GET_TSF_TIMER_CMD                    12
+#define  OCB_DBGID_GET_DCC_STATS_CMD                    13
+#define  OCB_DBGID_UPDATE_DCC_NDL_CMD                   14
+#define  OCB_DBGID_SET_CONFIG_RESP_EVENT                15
+#define  OCB_DBGID_GET_TSF_TIMER_RESP_EVENT             16
+#define  OCB_DBGID_GET_DCC_STATS_RESP_EVENT             17
+#define  OCB_DBGID_DCC_STATS_EVENT                      18
+#define  OCB_UPDATE_DCC_NDL_RESP_EVENT                  19
+#define  OCB_DBGID_GENERIC                              20
+#define  OCB_DBGID_VDEV_START                           21
+#define  OCB_DBGID_CHANNEL_SCHED_EVENT                  22
+#define  OCB_DBGID_GPS_EVENT_START                      23
+#define  OCB_DBGID_GPS_EVENT_END                        24
+#define  OCB_DBGID_TX_TA_FRAME                          25
+#define  OCB_DBGID_RX_TA_FRAME                          26
+
+/* Up to 255 reserved for OCB debug IDs */
+
+#define  DCC_DBGID_START                                256
+#define  DCC_DBGID_STOP                                 257
+#define  DCC_DBGID_DCC_STATS_EVENT                      258
+#define  DCC_DBGID_SM_INIT                              259
+#define  DCC_DBGID_SM_EVENT                             260
+#define  DCC_DBGID_SM_CHANGE                            261
+#define  DCC_DBGID_GET_TX_ALLOWED                       262
+#define  DCC_DBGID_NOTIFY_TX_COMPLETION                 263
+#define  DCC_DBGID_NOTIFY_RX                            264
+#define  DCC_DBGID_GET_TX_POWER                         265
+#define  DCC_DBGID_GET_TX_RATE                          266
+#define  DCC_DBGID_TICKLE_SCHED                         267
+#define  DCC_DBGID_GENERIC                              268
+#define  DCC_DBGID_RX_PATH                              269
+#define  DCC_DBGID_TX_PATH                              270
+
+/* RSSI Threshold Monitor DBGIDs*/
+#define RSSI_MONITOR_DBGID_DEFINITION_START               0
+#define RSSI_MONITOR_VDEV_INIT                            1
+#define RSSI_MONITOR_VDEV_FREE                            2
+#define RSSI_MONITOR_VDEV_EVENT                           3
+#define RSSI_MONITOR_HW_EVENT                             4
+#define RSSI_MONITOR_ENABLE_THRESHOLDS_CLIENT_REQ         5
+#define RSSI_MONITOR_ENABLE_THRESHOLDS_CLIENT_REQ_ERR     6
+#define RSSI_MONITOR_DISABLE_THRESHOLDS_CLIENT_REQ        7
+#define RSSI_MONITOR_DISABLE_THRESHOLDS_CLIENT_REQ_ERR    8
+#define RSSI_MONITOR_ARBITER                              9
+#define RSSI_MONITOR_ARBITER_CONFIG_HW                   10
+#define RSSI_MONITOR_CHECK_AND_DELIVER_EVENT             11
+#define RSSI_MONITOR_DELIVER_EVENT                       12
+#define RSSI_MONITOR_UPDATE_BEACON_RSSI                  13
+#define RSSI_MONITOR_DBGID_DEFINITION_END                14
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _DBGLOG_ID_H_ */
diff --git a/target/inc/efuse_reg.h b/target/inc/efuse_reg.h
new file mode 100644
index 0000000..2bff9f8
--- /dev/null
+++ b/target/inc/efuse_reg.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _EFUSE_REG_REG_H_
+#define _EFUSE_REG_REG_H_
+
+#define EFUSE_WR_ENABLE_REG_ADDRESS              0x00000000
+#define EFUSE_WR_ENABLE_REG_OFFSET               0x00000000
+#define EFUSE_WR_ENABLE_REG_V_MSB                0
+#define EFUSE_WR_ENABLE_REG_V_LSB                0
+#define EFUSE_WR_ENABLE_REG_V_MASK               0x00000001
+#define EFUSE_WR_ENABLE_REG_V_GET(x)             (((x) & EFUSE_WR_ENABLE_REG_V_MASK) >> EFUSE_WR_ENABLE_REG_V_LSB)
+#define EFUSE_WR_ENABLE_REG_V_SET(x)             (((x) << EFUSE_WR_ENABLE_REG_V_LSB) & EFUSE_WR_ENABLE_REG_V_MASK)
+
+#define EFUSE_INT_ENABLE_REG_ADDRESS             0x00000004
+#define EFUSE_INT_ENABLE_REG_OFFSET              0x00000004
+#define EFUSE_INT_ENABLE_REG_V_MSB               0
+#define EFUSE_INT_ENABLE_REG_V_LSB               0
+#define EFUSE_INT_ENABLE_REG_V_MASK              0x00000001
+#define EFUSE_INT_ENABLE_REG_V_GET(x)            (((x) & EFUSE_INT_ENABLE_REG_V_MASK) >> EFUSE_INT_ENABLE_REG_V_LSB)
+#define EFUSE_INT_ENABLE_REG_V_SET(x)            (((x) << EFUSE_INT_ENABLE_REG_V_LSB) & EFUSE_INT_ENABLE_REG_V_MASK)
+
+#define EFUSE_INT_STATUS_REG_ADDRESS             0x00000008
+#define EFUSE_INT_STATUS_REG_OFFSET              0x00000008
+#define EFUSE_INT_STATUS_REG_V_MSB               0
+#define EFUSE_INT_STATUS_REG_V_LSB               0
+#define EFUSE_INT_STATUS_REG_V_MASK              0x00000001
+#define EFUSE_INT_STATUS_REG_V_GET(x)            (((x) & EFUSE_INT_STATUS_REG_V_MASK) >> EFUSE_INT_STATUS_REG_V_LSB)
+#define EFUSE_INT_STATUS_REG_V_SET(x)            (((x) << EFUSE_INT_STATUS_REG_V_LSB) & EFUSE_INT_STATUS_REG_V_MASK)
+
+#define BITMASK_WR_REG_ADDRESS                   0x0000000c
+#define BITMASK_WR_REG_OFFSET                    0x0000000c
+#define BITMASK_WR_REG_V_MSB                     31
+#define BITMASK_WR_REG_V_LSB                     0
+#define BITMASK_WR_REG_V_MASK                    0xffffffff
+#define BITMASK_WR_REG_V_GET(x)                  (((x) & BITMASK_WR_REG_V_MASK) >> BITMASK_WR_REG_V_LSB)
+#define BITMASK_WR_REG_V_SET(x)                  (((x) << BITMASK_WR_REG_V_LSB) & BITMASK_WR_REG_V_MASK)
+
+#define VDDQ_SETTLE_TIME_REG_ADDRESS             0x00000010
+#define VDDQ_SETTLE_TIME_REG_OFFSET              0x00000010
+#define VDDQ_SETTLE_TIME_REG_V_MSB               31
+#define VDDQ_SETTLE_TIME_REG_V_LSB               0
+#define VDDQ_SETTLE_TIME_REG_V_MASK              0xffffffff
+#define VDDQ_SETTLE_TIME_REG_V_GET(x)            (((x) & VDDQ_SETTLE_TIME_REG_V_MASK) >> VDDQ_SETTLE_TIME_REG_V_LSB)
+#define VDDQ_SETTLE_TIME_REG_V_SET(x)            (((x) << VDDQ_SETTLE_TIME_REG_V_LSB) & VDDQ_SETTLE_TIME_REG_V_MASK)
+
+#define VDDQ_HOLD_TIME_REG_ADDRESS               0x00000014
+#define VDDQ_HOLD_TIME_REG_OFFSET                0x00000014
+#define VDDQ_HOLD_TIME_REG_V_MSB                 31
+#define VDDQ_HOLD_TIME_REG_V_LSB                 0
+#define VDDQ_HOLD_TIME_REG_V_MASK                0xffffffff
+#define VDDQ_HOLD_TIME_REG_V_GET(x)              (((x) & VDDQ_HOLD_TIME_REG_V_MASK) >> VDDQ_HOLD_TIME_REG_V_LSB)
+#define VDDQ_HOLD_TIME_REG_V_SET(x)              (((x) << VDDQ_HOLD_TIME_REG_V_LSB) & VDDQ_HOLD_TIME_REG_V_MASK)
+
+#define RD_STROBE_PW_REG_ADDRESS                 0x00000018
+#define RD_STROBE_PW_REG_OFFSET                  0x00000018
+#define RD_STROBE_PW_REG_V_MSB                   31
+#define RD_STROBE_PW_REG_V_LSB                   0
+#define RD_STROBE_PW_REG_V_MASK                  0xffffffff
+#define RD_STROBE_PW_REG_V_GET(x)                (((x) & RD_STROBE_PW_REG_V_MASK) >> RD_STROBE_PW_REG_V_LSB)
+#define RD_STROBE_PW_REG_V_SET(x)                (((x) << RD_STROBE_PW_REG_V_LSB) & RD_STROBE_PW_REG_V_MASK)
+
+#define PG_STROBE_PW_REG_ADDRESS                 0x0000001c
+#define PG_STROBE_PW_REG_OFFSET                  0x0000001c
+#define PG_STROBE_PW_REG_V_MSB                   31
+#define PG_STROBE_PW_REG_V_LSB                   0
+#define PG_STROBE_PW_REG_V_MASK                  0xffffffff
+#define PG_STROBE_PW_REG_V_GET(x)                (((x) & PG_STROBE_PW_REG_V_MASK) >> PG_STROBE_PW_REG_V_LSB)
+#define PG_STROBE_PW_REG_V_SET(x)                (((x) << PG_STROBE_PW_REG_V_LSB) & PG_STROBE_PW_REG_V_MASK)
+
+#define PGENB_SETUP_HOLD_TIME_REG_ADDRESS        0x00000020
+#define PGENB_SETUP_HOLD_TIME_REG_OFFSET         0x00000020
+#define PGENB_SETUP_HOLD_TIME_REG_V_MSB          31
+#define PGENB_SETUP_HOLD_TIME_REG_V_LSB          0
+#define PGENB_SETUP_HOLD_TIME_REG_V_MASK         0xffffffff
+#define PGENB_SETUP_HOLD_TIME_REG_V_GET(x)       (((x) & PGENB_SETUP_HOLD_TIME_REG_V_MASK) >> PGENB_SETUP_HOLD_TIME_REG_V_LSB)
+#define PGENB_SETUP_HOLD_TIME_REG_V_SET(x)       (((x) << PGENB_SETUP_HOLD_TIME_REG_V_LSB) & PGENB_SETUP_HOLD_TIME_REG_V_MASK)
+
+#define STROBE_PULSE_INTERVAL_REG_ADDRESS        0x00000024
+#define STROBE_PULSE_INTERVAL_REG_OFFSET         0x00000024
+#define STROBE_PULSE_INTERVAL_REG_V_MSB          31
+#define STROBE_PULSE_INTERVAL_REG_V_LSB          0
+#define STROBE_PULSE_INTERVAL_REG_V_MASK         0xffffffff
+#define STROBE_PULSE_INTERVAL_REG_V_GET(x)       (((x) & STROBE_PULSE_INTERVAL_REG_V_MASK) >> STROBE_PULSE_INTERVAL_REG_V_LSB)
+#define STROBE_PULSE_INTERVAL_REG_V_SET(x)       (((x) << STROBE_PULSE_INTERVAL_REG_V_LSB) & STROBE_PULSE_INTERVAL_REG_V_MASK)
+
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_ADDRESS     0x00000028
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_OFFSET      0x00000028
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_V_MSB       31
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_V_LSB       0
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_V_MASK      0xffffffff
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_V_GET(x)    (((x) & CSB_ADDR_LOAD_SETUP_HOLD_REG_V_MASK) >> CSB_ADDR_LOAD_SETUP_HOLD_REG_V_LSB)
+#define CSB_ADDR_LOAD_SETUP_HOLD_REG_V_SET(x)    (((x) << CSB_ADDR_LOAD_SETUP_HOLD_REG_V_LSB) & CSB_ADDR_LOAD_SETUP_HOLD_REG_V_MASK)
+
+#define EFUSE_INTF0_ADDRESS                      0x00000800
+#define EFUSE_INTF0_OFFSET                       0x00000800
+#define EFUSE_INTF0_R_MSB                        31
+#define EFUSE_INTF0_R_LSB                        0
+#define EFUSE_INTF0_R_MASK                       0xffffffff
+#define EFUSE_INTF0_R_GET(x)                     (((x) & EFUSE_INTF0_R_MASK) >> EFUSE_INTF0_R_LSB)
+#define EFUSE_INTF0_R_SET(x)                     (((x) << EFUSE_INTF0_R_LSB) & EFUSE_INTF0_R_MASK)
+
+#define EFUSE_INTF1_ADDRESS                      0x00001000
+#define EFUSE_INTF1_OFFSET                       0x00001000
+#define EFUSE_INTF1_R_MSB                        31
+#define EFUSE_INTF1_R_LSB                        0
+#define EFUSE_INTF1_R_MASK                       0xffffffff
+#define EFUSE_INTF1_R_GET(x)                     (((x) & EFUSE_INTF1_R_MASK) >> EFUSE_INTF1_R_LSB)
+#define EFUSE_INTF1_R_SET(x)                     (((x) << EFUSE_INTF1_R_LSB) & EFUSE_INTF1_R_MASK)
+
+#ifndef __ASSEMBLER__
+typedef struct efuse_reg_reg_s {
+	volatile unsigned int efuse_wr_enable_reg;
+	volatile unsigned int efuse_int_enable_reg;
+	volatile unsigned int efuse_int_status_reg;
+	volatile unsigned int bitmask_wr_reg;
+	volatile unsigned int vddq_settle_time_reg;
+	volatile unsigned int vddq_hold_time_reg;
+	volatile unsigned int rd_strobe_pw_reg;
+	volatile unsigned int pg_strobe_pw_reg;
+	volatile unsigned int pgenb_setup_hold_time_reg;
+	volatile unsigned int strobe_pulse_interval_reg;
+	volatile unsigned int csb_addr_load_setup_hold_reg;
+	unsigned char pad0[2004];       /* pad to 0x800 */
+	volatile unsigned int efuse_intf0[512];
+	volatile unsigned int efuse_intf1[512];
+} efuse_reg_reg_t;
+#endif /* __ASSEMBLER__ */
+
+#endif /* _EFUSE_REG_H_ */
diff --git a/target/inc/enet.h b/target/inc/enet.h
new file mode 100644
index 0000000..c3f0cd6
--- /dev/null
+++ b/target/inc/enet.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _ENET__H_
+#define _ENET__H_
+
+#if defined(ATH_TARGET)
+#include <osapi.h>              /* A_UINT8 */
+#else
+#include <a_types.h>            /* A_UINT8 */
+#endif
+
+#define ETHERNET_ADDR_LEN 6     /* bytes */
+#define ETHERNET_TYPE_LEN 2     /* bytes - length of the Ethernet type field */
+
+struct ethernet_hdr_t {
+	A_UINT8 dest_addr[ETHERNET_ADDR_LEN];
+	A_UINT8 src_addr[ETHERNET_ADDR_LEN];
+	A_UINT8 ethertype[ETHERNET_TYPE_LEN];
+};
+
+#define ETHERNET_HDR_LEN (sizeof(struct ethernet_hdr_t))
+
+#define ETHERNET_CRC_LEN  4     /* bytes - length of the Ethernet CRC */
+#define ETHERNET_MAX_LEN  1518  /* bytes */
+
+#define ETHERNET_MTU          (ETHERNET_MAX_LEN - (ETHERNET_HDR_LEN + ETHER_CRC_LEN))
+
+struct llc_snap_hdr_t {
+	A_UINT8 dsap;
+	A_UINT8 ssap;
+	A_UINT8 cntl;
+	A_UINT8 org_code[3];
+	A_UINT8 ethertype[2];
+};
+
+#define LLC_SNAP_HDR_LEN (sizeof(struct llc_snap_hdr_t))
+#define LLC_SNAP_HDR_OFFSET_ETHERTYPE \
+	(offsetof(struct llc_snap_hdr_t, ethertype[0]))
+
+#define ETHERTYPE_VLAN_LEN  4
+
+struct ethernet_vlan_hdr_t {
+	A_UINT8 dest_addr[ETHERNET_ADDR_LEN];
+	A_UINT8 src_addr[ETHERNET_ADDR_LEN];
+	A_UINT8 vlan_tpid[2];
+	A_UINT8 vlan_tci[2];
+	A_UINT8 ethertype[2];
+};
+
+#define ETHERTYPE_IS_EAPOL_WAPI(typeorlen)	     \
+	((typeorlen) == ETHERTYPE_PAE ||  \
+	 (typeorlen) == ETHERTYPE_WAI)
+
+#define IS_ETHERTYPE(_typeOrLen) ((_typeOrLen) >= 0x0600)
+
+#ifndef ETHERTYPE_IPV4
+#define ETHERTYPE_IPV4  0x0800  /* Internet Protocol, Version 4 (IPv4) */
+#endif
+
+#ifndef ETHERTYPE_AARP
+#define ETHERTYPE_AARP  0x80f3  /* Internal QCA AARP protocol */
+#endif
+
+#ifndef ETHERTYPE_IPX
+#define ETHERTYPE_IPX    0x8137 /* IPX over DIX protocol */
+#endif
+
+#ifndef ETHERTYPE_ARP
+#define ETHERTYPE_ARP   0x0806  /* Address Resolution Protocol (ARP) */
+#endif
+
+#ifndef ETHERTYPE_RARP
+#define ETHERTYPE_RARP  0x8035  /* Reverse Address Resolution Protocol (RARP) */
+#endif
+
+#ifndef ETHERTYPE_VLAN
+#define ETHERTYPE_VLAN  0x8100  /* VLAN TAG protocol */
+#endif
+
+#ifndef ETHERTYPE_SNMP
+#define ETHERTYPE_SNMP  0x814C  /* Simple Network Management Protocol (SNMP) */
+#endif
+
+#ifndef ETHERTYPE_IPV6
+#define ETHERTYPE_IPV6  0x86DD  /* Internet Protocol, Version 6 (IPv6) */
+#endif
+
+#ifndef ETHERTYPE_PAE
+#define ETHERTYPE_PAE   0x888E  /* EAP over LAN (EAPOL) */
+#endif
+
+#ifndef ETHERTYPE_WAI
+#define ETHERTYPE_WAI   0x88B4  /* WAPI */
+#endif
+
+#ifndef ETHERTYPE_TDLS
+#define ETHERTYPE_TDLS  0x890D  /* TDLS */
+#endif
+
+#define LLC_SNAP_LSAP 0xaa
+#define LLC_UI 0x3
+
+#define RFC1042_SNAP_ORGCODE_0 0x00
+#define RFC1042_SNAP_ORGCODE_1 0x00
+#define RFC1042_SNAP_ORGCODE_2 0x00
+
+#define BTEP_SNAP_ORGCODE_0 0x00
+#define BTEP_SNAP_ORGCODE_1 0x00
+#define BTEP_SNAP_ORGCODE_2 0xf8
+
+#define IS_SNAP(_llc) ((_llc)->dsap == LLC_SNAP_LSAP &&	\
+		       (_llc)->ssap == LLC_SNAP_LSAP &&	\
+		       (_llc)->cntl == LLC_UI)
+
+#define IS_RFC1042(_llc) ((_llc)->org_code[0] == RFC1042_SNAP_ORGCODE_0 && \
+			  (_llc)->org_code[1] == RFC1042_SNAP_ORGCODE_1 && \
+			  (_llc)->org_code[2] == RFC1042_SNAP_ORGCODE_2)
+
+#define IS_BTEP(_llc) ((_llc)->org_code[0] == BTEP_SNAP_ORGCODE_0 && \
+		       (_llc)->org_code[1] == BTEP_SNAP_ORGCODE_1 && \
+		       (_llc)->org_code[2] == BTEP_SNAP_ORGCODE_2)
+
+#endif /* _ENET__H_ */
diff --git a/target/inc/epping_test.h b/target/inc/epping_test.h
new file mode 100644
index 0000000..b8e6d01
--- /dev/null
+++ b/target/inc/epping_test.h
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/* This file contains shared definitions for the host/target endpoint ping test */
+
+#ifndef EPPING_TEST_H
+#define EPPING_TEST_H
+
+#ifndef ATH_TARGET
+#include "athstartpack.h"
+#endif
+
+/* alignment to 4-bytes */
+#define EPPING_ALIGNMENT_PAD  (((sizeof(HTC_FRAME_HDR) + 3) & (~0x3)) - sizeof(HTC_FRAME_HDR))
+
+#ifndef A_OFFSETOF
+#define A_OFFSETOF(type,field) (int)(&(((type *)NULL)->field))
+#endif
+
+#define EPPING_RSVD_FILL                  0xCC
+
+#define HCI_RSVD_EXPECTED_PKT_TYPE_RECV_OFFSET  7
+
+typedef PREPACK struct {
+	A_UINT8 _HCIRsvd[8];    /* reserved for HCI packet header (GMBOX) testing */
+	A_UINT8 StreamEcho_h;   /* stream no. to echo this packet on (filled by host) */
+	A_UINT8 StreamEchoSent_t;       /* stream no. packet was echoed to (filled by target)
+	                                   When echoed: StreamEchoSent_t == StreamEcho_h */
+	A_UINT8 StreamRecv_t;   /* stream no. that target received this packet on (filled by target) */
+	A_UINT8 StreamNo_h;     /* stream number to send on (filled by host) */
+	A_UINT8 Magic_h[4];     /* magic number to filter for this packet on the host */
+	A_UINT8 _rsvd[6];       /* reserved fields that must be set to a "reserved" value
+	                           since this packet maps to a 14-byte ethernet frame we want
+	                           to make sure ethertype field is set to something unknown */
+
+	A_UINT8 _pad[2];        /* padding for alignment */
+	A_UINT8 TimeStamp[8];   /* timestamp of packet (host or target) */
+	A_UINT32 HostContext_h; /* 4 byte host context, target echos this back */
+	A_UINT32 SeqNo;         /* sequence number (set by host or target) */
+	A_UINT16 Cmd_h;         /* ping command (filled by host) */
+	A_UINT16 CmdFlags_h;    /* optional flags */
+	A_UINT8 CmdBuffer_h[8]; /* buffer for command (host -> target) */
+	A_UINT8 CmdBuffer_t[8]; /* buffer for command (target -> host) */
+	A_UINT16 DataLength;    /* length of data */
+	A_UINT16 DataCRC;       /* 16 bit CRC of data */
+	A_UINT16 HeaderCRC;     /* header CRC (fields : StreamNo_h to end, minus HeaderCRC) */
+} POSTPACK EPPING_HEADER;
+
+#define EPPING_PING_MAGIC_0           0xAA
+#define EPPING_PING_MAGIC_1           0x55
+#define EPPING_PING_MAGIC_2           0xCE
+#define EPPING_PING_MAGIC_3           0xEC
+
+#define IS_EPPING_PACKET(pPkt)   (((pPkt)->Magic_h[0] == EPPING_PING_MAGIC_0) && \
+				  ((pPkt)->Magic_h[1] == EPPING_PING_MAGIC_1) && \
+				  ((pPkt)->Magic_h[2] == EPPING_PING_MAGIC_2) && \
+				  ((pPkt)->Magic_h[3] == EPPING_PING_MAGIC_3))
+
+#define SET_EPPING_PACKET_MAGIC(pPkt) { (pPkt)->Magic_h[0] = EPPING_PING_MAGIC_0; \
+					(pPkt)->Magic_h[1] = EPPING_PING_MAGIC_1; \
+					(pPkt)->Magic_h[2] = EPPING_PING_MAGIC_2; \
+					(pPkt)->Magic_h[3] = EPPING_PING_MAGIC_3; }
+
+#define CMD_FLAGS_DATA_CRC            (1 << 0)  /* DataCRC field is valid */
+#define CMD_FLAGS_DELAY_ECHO          (1 << 1)  /* delay the echo of the packet */
+#define CMD_FLAGS_NO_DROP             (1 << 2)  /* do not drop at HTC layer no matter what the stream is */
+
+#define IS_EPING_PACKET_NO_DROP(pPkt)  ((pPkt)->CmdFlags_h & CMD_FLAGS_NO_DROP)
+
+#define EPPING_CMD_ECHO_PACKET          1       /* echo packet test */
+#define EPPING_CMD_RESET_RECV_CNT       2       /* reset recv count */
+#define EPPING_CMD_CAPTURE_RECV_CNT     3       /* fetch recv count, 4-byte count returned in CmdBuffer_t */
+#define EPPING_CMD_NO_ECHO              4       /* non-echo packet test (tx-only) */
+#define EPPING_CMD_CONT_RX_START        5       /* continous RX packets, parameters are in CmdBuffer_h */
+#define EPPING_CMD_CONT_RX_STOP         6       /* stop continuous RX packet transmission */
+
+/* test command parameters may be no more than 8 bytes */
+typedef PREPACK struct {
+	A_UINT16 BurstCnt;      /* number of packets to burst together (for HTC 2.1 testing) */
+	A_UINT16 PacketLength;  /* length of packet to generate including header */
+	A_UINT16 Flags;         /* flags */
+
+#define EPPING_CONT_RX_DATA_CRC     (1 << 0)    /* Add CRC to all data */
+#define EPPING_CONT_RX_RANDOM_DATA  (1 << 1)    /* randomize the data pattern */
+#define EPPING_CONT_RX_RANDOM_LEN   (1 << 2)    /* randomize the packet lengths */
+#define EPPING_CONT_RX_NO_DATA_FILL (1 << 3)    /* target will not fill buffers */
+	A_UINT16 Context;       /* flags */
+
+} POSTPACK EPPING_CONT_RX_PARAMS;
+
+#define EPPING_HDR_CRC_OFFSET    A_OFFSETOF(EPPING_HEADER,StreamNo_h)
+#define EPPING_HDR_BYTES_CRC     (sizeof(EPPING_HEADER) - EPPING_HDR_CRC_OFFSET - (sizeof(A_UINT16)))
+
+#define HCI_TRANSPORT_STREAM_NUM  16    /* this number is higher than the define WMM AC classes so we
+	                                   can use this to distinguish packets */
+
+#ifndef ATH_TARGET
+#include "athendpack.h"
+#endif
+
+#endif /* EPPING_TEST_H */
diff --git a/target/inc/htc.h b/target/inc/htc.h
new file mode 100644
index 0000000..19239ab
--- /dev/null
+++ b/target/inc/htc.h
@@ -0,0 +1,405 @@
+/*
+ * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __HTC_H__
+#define __HTC_H__
+
+#ifndef ATH_TARGET
+#include "athstartpack.h"
+#endif
+#undef MS
+#define MS(_v, _f) (((_v) & _f ## _MASK) >> _f ## _LSB)
+#undef SM
+#define SM(_v, _f) (((_v) << _f ## _LSB) & _f ## _MASK)
+#undef WO
+#define WO(_f)      ((_f ## _OFFSET) >> 2)
+
+#undef GET_FIELD
+#define GET_FIELD(_addr, _f) MS(*((A_UINT32 *)(_addr) + WO(_f)), _f)
+#undef SET_FIELD
+#define SET_FIELD(_addr, _f, _val)  \
+	(*((A_UINT32 *)(_addr) + WO(_f)) = \
+		 (*((A_UINT32 *)(_addr) + WO(_f)) & ~_f ## _MASK) | SM(_val, _f))
+
+#define HTC_GET_FIELD(_msg_buf, _msg_type, _f) \
+	GET_FIELD(_msg_buf, _msg_type ## _ ## _f)
+
+#define HTC_SET_FIELD(_msg_buf, _msg_type, _f, _val) \
+	SET_FIELD(_msg_buf, _msg_type ## _ ## _f, _val)
+
+#define HTC_WRITE32(_addr, _val) \
+	(*(A_UINT32 *)(_addr) = (_val))
+
+#ifndef A_OFFSETOF
+#define A_OFFSETOF(type,field) (unsigned long)(&(((type *)NULL)->field))
+#endif
+
+#define ASSEMBLE_UNALIGNED_UINT16(p,highbyte,lowbyte) \
+	(((A_UINT16)(((A_UINT8 *)(p))[(highbyte)])) << 8 | (A_UINT16)(((A_UINT8 *)(p))[(lowbyte)]))
+
+/****** DANGER DANGER ***************
+ *
+ *   The frame header length and message formats defined herein were
+ *   selected to accommodate optimal alignment for target processing.  This reduces code
+ *   size and improves performance.
+ *
+ *   Any changes to the header length may alter the alignment and cause exceptions
+ *   on the target. When adding to the message structures insure that fields are
+ *   properly aligned.
+ *
+ */
+
+/* HTC frame header */
+typedef PREPACK struct _HTC_FRAME_HDR {
+	/* do not remove or re-arrange these fields, these are minimally required
+	 * to take advantage of 4-byte lookaheads in some hardware implementations */
+	A_UINT32 EndpointID : 8, Flags : 8, PayloadLen : 16;  /* length of data (including trailer) that follows the header */
+
+	/***** end of 4-byte lookahead ****/
+
+	A_UINT32 ControlBytes0 : 8,/*used for CRC check if CRC_CHECK flag set*/
+		 ControlBytes1 : 8, /*used for seq check if SEQ_CHECK flag set*/
+		 reserved : 16; /*used by bundle processing in SDIO systems*/
+
+	/* message payload starts after the header */
+
+} POSTPACK HTC_FRAME_HDR;
+
+#define HTC_FRAME_HDR_ENDPOINTID_LSB                0
+#define HTC_FRAME_HDR_ENDPOINTID_MASK               0x000000ff
+#define HTC_FRAME_HDR_ENDPOINTID_OFFSET             0x00000000
+#define HTC_FRAME_HDR_FLAGS_LSB                     8
+#define HTC_FRAME_HDR_FLAGS_MASK                    0x0000ff00
+#define HTC_FRAME_HDR_FLAGS_OFFSET                  0x00000000
+#define HTC_FRAME_HDR_PAYLOADLEN_LSB                16
+#define HTC_FRAME_HDR_PAYLOADLEN_MASK               0xffff0000
+#define HTC_FRAME_HDR_PAYLOADLEN_OFFSET             0x00000000
+#define HTC_FRAME_HDR_CONTROLBYTES0_LSB             0
+#define HTC_FRAME_HDR_CONTROLBYTES0_MASK            0x000000ff
+#define HTC_FRAME_HDR_CONTROLBYTES0_OFFSET          0x00000004
+#define HTC_FRAME_HDR_CONTROLBYTES1_LSB             8
+#define HTC_FRAME_HDR_CONTROLBYTES1_MASK            0x0000ff00
+#define HTC_FRAME_HDR_CONTROLBYTES1_OFFSET          0x00000004
+#define HTC_FRAME_HDR_RESERVED_LSB                  16
+#define HTC_FRAME_HDR_RESERVED_MASK                 0xffff0000
+#define HTC_FRAME_HDR_RESERVED_OFFSET               0x00000004
+
+/* frame header flags */
+
+/* send direction */
+#define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0)
+#define HTC_FLAGS_SEND_BUNDLE        (1 << 1)   /* start or part of bundle */
+#define HTC_FLAGS_SEQ_CHECK          (1 << 2) /* seq check on rx side */
+#define HTC_FLAGS_CRC CHECK          (1 << 3) /* CRC check on rx side */
+
+/* receive direction */
+#define HTC_FLAGS_RECV_UNUSED_0      (1 << 0)   /* bit 0 unused */
+#define HTC_FLAGS_RECV_TRAILER       (1 << 1)   /* bit 1 trailer data present */
+#define HTC_FLAGS_RECV_UNUSED_2      (1 << 0)   /* bit 2 unused */
+#define HTC_FLAGS_RECV_UNUSED_3      (1 << 0)   /* bit 3 unused */
+#define HTC_FLAGS_RECV_BUNDLE_CNT_MASK (0xF0)   /* bits 7..4  */
+#define HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT 4
+
+#define HTC_HDR_LENGTH  (sizeof(HTC_FRAME_HDR))
+#define HTC_HDR_ALIGNMENT_PADDING	    \
+	(((sizeof(HTC_FRAME_HDR) + 3) & (~0x3)) - sizeof(HTC_FRAME_HDR))
+#define HTC_MAX_TRAILER_LENGTH   255
+#define HTC_MAX_PAYLOAD_LENGTH   (4096 - sizeof(HTC_FRAME_HDR))
+
+/* HTC control message IDs */
+
+#define HTC_MSG_READY_ID                    1
+#define HTC_MSG_CONNECT_SERVICE_ID          2
+#define HTC_MSG_CONNECT_SERVICE_RESPONSE_ID 3
+#define HTC_MSG_SETUP_COMPLETE_ID           4
+#define HTC_MSG_SETUP_COMPLETE_EX_ID        5
+#define HTC_MSG_SEND_SUSPEND_COMPLETE       6
+#define HTC_MSG_NACK_SUSPEND                7
+
+#define HTC_MAX_CONTROL_MESSAGE_LENGTH  256
+
+/* base message ID header */
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16, reserved : 16;
+} POSTPACK HTC_UNKNOWN_MSG;
+
+#define HTC_UNKNOWN_MSG_MESSAGEID_LSB                 0
+#define HTC_UNKNOWN_MSG_MESSAGEID_MASK                0x0000ffff
+#define HTC_UNKNOWN_MSG_MESSAGEID_OFFSET              0x00000000
+
+/* HTC ready message
+ * direction : target-to-host  */
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16,  /* ID */
+		 CreditCount : 16; /* number of credits the target can offer */
+	A_UINT32 CreditSize : 16, /* size of each credit */
+		 MaxEndpoints : 8, /* maximum number of endpoints the target has resources for */
+		 _Pad1 : 8;
+} POSTPACK HTC_READY_MSG;
+
+#define HTC_READY_MSG_MESSAGEID_LSB                   0
+#define HTC_READY_MSG_MESSAGEID_MASK                  0x0000ffff
+#define HTC_READY_MSG_MESSAGEID_OFFSET                0x00000000
+#define HTC_READY_MSG_CREDITCOUNT_LSB                 16
+#define HTC_READY_MSG_CREDITCOUNT_MASK                0xffff0000
+#define HTC_READY_MSG_CREDITCOUNT_OFFSET              0x00000000
+#define HTC_READY_MSG_CREDITSIZE_LSB                  0
+#define HTC_READY_MSG_CREDITSIZE_MASK                 0x0000ffff
+#define HTC_READY_MSG_CREDITSIZE_OFFSET               0x00000004
+#define HTC_READY_MSG_MAXENDPOINTS_LSB                16
+#define HTC_READY_MSG_MAXENDPOINTS_MASK               0x00ff0000
+#define HTC_READY_MSG_MAXENDPOINTS_OFFSET             0x00000004
+
+/* extended HTC ready message */
+typedef PREPACK struct {
+	HTC_READY_MSG Version2_0_Info;  /* legacy version 2.0 information at the front... */
+	/* extended information */
+	A_UINT32 HTCVersion : 8, MaxMsgsPerHTCBundle : 8, reserved : 16;
+} POSTPACK HTC_READY_EX_MSG;
+
+#define HTC_READY_EX_MSG_HTCVERSION_LSB               0
+#define HTC_READY_EX_MSG_HTCVERSION_MASK              0x000000ff
+#define HTC_READY_EX_MSG_HTCVERSION_OFFSET            sizeof(HTC_READY_MSG)
+#define HTC_READY_EX_MSG_MAXMSGSPERHTCBUNDLE_LSB      8
+#define HTC_READY_EX_MSG_MAXMSGSPERHTCBUNDLE_MASK     0x0000ff00
+#define HTC_READY_EX_MSG_MAXMSGSPERHTCBUNDLE_OFFSET   sizeof(HTC_READY_MSG)
+
+#define HTC_VERSION_2P0  0x00
+#define HTC_VERSION_2P1  0x01   /* HTC 2.1 */
+
+#define HTC_SERVICE_META_DATA_MAX_LENGTH 128
+
+/* connect service
+ * direction : host-to-target */
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16, ServiceID : 16;    /* service ID of the service to connect to */
+	A_UINT32 ConnectionFlags : 16,    /* connection flags */
+#define HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE (1 << 2)
+	/* reduce credit dribbling when
+	   the host needs credits */
+#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK             (0x3)
+#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_FOURTH        0x0
+#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF          0x1
+#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS     0x2
+#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_UNITY             0x3
+	/* disable credit flow control on a specific service */
+#define HTC_CONNECT_FLAGS_DISABLE_CREDIT_FLOW_CTRL          (1 << 3)
+	/* enable htc schedule on a specific service */
+#define HTC_CONNECT_FLAGS_ENABLE_HTC_SCHEDULE               (1 << 4)
+	ServiceMetaLength : 8,  /* length of meta data that follows */
+	_Pad1 : 8;
+
+	/* service-specific meta data starts after the header */
+
+} POSTPACK HTC_CONNECT_SERVICE_MSG;
+
+#define HTC_CONNECT_SERVICE_MSG_MESSAGEID_LSB             0
+#define HTC_CONNECT_SERVICE_MSG_MESSAGEID_MASK            0x0000ffff
+#define HTC_CONNECT_SERVICE_MSG_MESSAGEID_OFFSET          0x00000000
+#define HTC_CONNECT_SERVICE_MSG_SERVICE_ID_LSB            16
+#define HTC_CONNECT_SERVICE_MSG_SERVICE_ID_MASK           0xffff0000
+#define HTC_CONNECT_SERVICE_MSG_SERVICE_ID_OFFSET         0x00000000
+#define HTC_CONNECT_SERVICE_MSG_CONNECTIONFLAGS_LSB       0
+#define HTC_CONNECT_SERVICE_MSG_CONNECTIONFLAGS_MASK      0x0000ffff
+#define HTC_CONNECT_SERVICE_MSG_CONNECTIONFLAGS_OFFSET    0x00000004
+#define HTC_CONNECT_SERVICE_MSG_SERVICEMETALENGTH_LSB     16
+#define HTC_CONNECT_SERVICE_MSG_SERVICEMETALENGTH_MASK    0x00ff0000
+#define HTC_CONNECT_SERVICE_MSG_SERVICEMETALENGTH_OFFSET  0x00000004
+
+#define HTC_SET_RECV_ALLOC_SHIFT    8
+#define HTC_SET_RECV_ALLOC_MASK     0xFF00
+#define HTC_CONNECT_FLAGS_SET_RECV_ALLOCATION(value) (((A_UINT8)value) << HTC_SET_RECV_ALLOC_SHIFT)
+#define HTC_CONNECT_FLAGS_GET_RECV_ALLOCATION(value) (A_UINT8)(((value) & HTC_SET_RECV_ALLOC_MASK) >> HTC_SET_RECV_ALLOC_SHIFT)
+
+/* connect response
+ * direction : target-to-host */
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16, ServiceID : 16;    /* service ID that the connection request was made */
+	A_UINT32 Status : 8,      /* service connection status */
+		 EndpointID : 8, /* assigned endpoint ID */
+		 MaxMsgSize : 16; /* maximum expected message size on this endpoint */
+	A_UINT32 ServiceMetaLength : 8,   /* length of meta data that follows */
+		 _Pad1 : 8, reserved : 16;
+
+	/* service-specific meta data starts after the header */
+
+} POSTPACK HTC_CONNECT_SERVICE_RESPONSE_MSG;
+
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MESSAGEID_LSB            0
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MESSAGEID_MASK           0x0000ffff
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MESSAGEID_OFFSET         0x00000000
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEID_LSB            16
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEID_MASK           0xffff0000
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEID_OFFSET         0x00000000
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_STATUS_LSB               0
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_STATUS_MASK              0x000000ff
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_STATUS_OFFSET            0x00000004
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_ENDPOINTID_LSB           8
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_ENDPOINTID_MASK          0x0000ff00
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_ENDPOINTID_OFFSET        0x00000004
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MAXMSGSIZE_LSB           16
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MAXMSGSIZE_MASK          0xffff0000
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_MAXMSGSIZE_OFFSET        0x00000004
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEMETALENGTH_LSB    0
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEMETALENGTH_MASK   0x000000ff
+#define HTC_CONNECT_SERVICE_RESPONSE_MSG_SERVICEMETALENGTH_OFFSET 0x00000008
+
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16, reserved : 16;
+	/* currently, no other fields */
+} POSTPACK HTC_SETUP_COMPLETE_MSG;
+
+#define HTC_SETUP_COMPLETE_MSG_MESSAGEID_LSB          0
+#define HTC_SETUP_COMPLETE_MSG_MESSAGEID_MASK         0x0000ffff
+#define HTC_SETUP_COMPLETE_MSG_MESSAGEID_OFFSET       0x00000000
+
+/* extended setup completion message */
+typedef PREPACK struct {
+	A_UINT32 MessageID : 16, reserved : 16;
+	A_UINT32 SetupFlags : 32;
+	A_UINT32 MaxMsgsPerBundledRecv : 8, Rsvd0 : 8, Rsvd1 : 8, Rsvd2 : 8;
+} POSTPACK HTC_SETUP_COMPLETE_EX_MSG;
+
+#define HTC_SETUP_COMPLETE_EX_MSG_MESSAGEID_LSB               0
+#define HTC_SETUP_COMPLETE_EX_MSG_MESSAGEID_MASK              0x0000ffff
+#define HTC_SETUP_COMPLETE_EX_MSG_MESSAGEID_OFFSET            0x00000000
+#define HTC_SETUP_COMPLETE_EX_MSG_SETUPFLAGS_LSB              0
+#define HTC_SETUP_COMPLETE_EX_MSG_SETUPFLAGS_MASK             0xffffffff
+#define HTC_SETUP_COMPLETE_EX_MSG_SETUPFLAGS_OFFSET           0x00000004
+#define HTC_SETUP_COMPLETE_EX_MSG_MAXMSGSPERBUNDLEDRECV_LSB       0
+#define HTC_SETUP_COMPLETE_EX_MSG_MAXMSGSPERBUNDLEDRECV_MASK      0x000000ff
+#define HTC_SETUP_COMPLETE_EX_MSG_MAXMSGSPERBUNDLEDRECV_OFFSET    0x00000008
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD0_LSB                   8
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD0_MASK                  0x0000ff00
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD0_OFFSET                0x00000008
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD1_LSB                   16
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD1_MASK                  0x00ff0000
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD1_OFFSET                0x00000008
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD2_LSB                   24
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD2_MASK                  0xff000000
+#define HTC_SETUP_COMPLETE_EX_MSG_RSVD2_OFFSET                0x00000008
+
+#define HTC_SETUP_COMPLETE_FLAGS_ENABLE_BUNDLE_RECV     (1 << 0)        /* enable recv bundling from target */
+#define HTC_SETUP_COMPLETE_FLAGS_DISABLE_TX_CREDIT_FLOW (1 << 1)        /* disable credit based flow control,
+	                                                                   only supported on some interconnects */
+
+/* connect response status codes */
+#define HTC_SERVICE_SUCCESS      0      /* success */
+#define HTC_SERVICE_NOT_FOUND    1      /* service could not be found */
+#define HTC_SERVICE_FAILED       2      /* specific service failed the connect */
+#define HTC_SERVICE_NO_RESOURCES 3      /* no resources (i.e. no more endpoints) */
+#define HTC_SERVICE_NO_MORE_EP   4      /* specific service is not allowing any more
+	                                   endpoints */
+
+/* report record IDs */
+
+#define HTC_RECORD_NULL             0
+#define HTC_RECORD_CREDITS          1
+#define HTC_RECORD_LOOKAHEAD        2
+#define HTC_RECORD_LOOKAHEAD_BUNDLE 3
+
+typedef PREPACK struct {
+	A_UINT32 RecordID : 8,    /* Record ID */
+		 Length : 8,    /* Length of record */
+		 reserved : 16;
+} POSTPACK HTC_RECORD_HDR;
+
+#define HTC_RECORD_HDR_RECORDID_LSB           0
+#define HTC_RECORD_HDR_RECORDID_MASK          0x000000ff
+#define HTC_RECORD_HDR_RECORDID_OFFSET        0x00000000
+#define HTC_RECORD_HDR_LENGTH_LSB             8
+#define HTC_RECORD_HDR_LENGTH_MASK            0x0000ff00
+#define HTC_RECORD_HDR_LENGTH_OFFSET          0x00000000
+
+typedef PREPACK struct {
+	A_UINT32 EndpointID : 8,  /* Endpoint that owns these credits */
+		 Credits : 8,   /* credits to report since last report */
+		 reserved : 16;
+} POSTPACK HTC_CREDIT_REPORT;
+
+#define HTC_CREDIT_REPORT_ENDPOINTID_LSB      0
+#define HTC_CREDIT_REPORT_ENDPOINTID_MASK     0x000000ff
+#define HTC_CREDIT_REPORT_ENDPOINTID_OFFSET   0x00000000
+#define HTC_CREDIT_REPORT_CREDITS_LSB         8
+#define HTC_CREDIT_REPORT_CREDITS_MASK        0x0000ff00
+#define HTC_CREDIT_REPORT_CREDITS_OFFSET      0x00000000
+
+typedef PREPACK struct {
+	A_UINT32 PreValid : 8,    /* pre valid guard */
+		 reserved0 : 24;
+	A_UINT32 LookAhead0 : 8,  /* 4 byte lookahead */
+		 LookAhead1 : 8, LookAhead2 : 8, LookAhead3 : 8;
+	A_UINT32 PostValid : 8,   /* post valid guard */
+		 reserved1 : 24;
+
+	/* NOTE: the LookAhead array is guarded by a PreValid and Post Valid guard bytes.
+	 * The PreValid bytes must equal the inverse of the PostValid byte */
+
+} POSTPACK HTC_LOOKAHEAD_REPORT;
+
+#define HTC_LOOKAHEAD_REPORT_PREVALID_LSB         0
+#define HTC_LOOKAHEAD_REPORT_PREVALID_MASK        0x000000ff
+#define HTC_LOOKAHEAD_REPORT_PREVALID_OFFSET      0x00000000
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD0_LSB       0
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD0_MASK      0x000000ff
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD0_OFFSET    0x00000004
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD1_LSB       8
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD1_MASK      0x0000ff00
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD1_OFFSET    0x00000004
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD2_LSB       16
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD2_MASK      0x00ff0000
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD2_OFFSET    0x00000004
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD3_LSB       24
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD3_MASK      0xff000000
+#define HTC_LOOKAHEAD_REPORT_LOOKAHEAD3_OFFSET    0x00000004
+#define HTC_LOOKAHEAD_REPORT_POSTVALID_LSB        0
+#define HTC_LOOKAHEAD_REPORT_POSTVALID_MASK       0x000000ff
+#define HTC_LOOKAHEAD_REPORT_POSTVALID_OFFSET     0x00000008
+
+typedef PREPACK struct {
+	A_UINT32 LookAhead0 : 8,  /* 4 byte lookahead */
+		 LookAhead1 : 8, LookAhead2 : 8, LookAhead3 : 8;
+} POSTPACK HTC_BUNDLED_LOOKAHEAD_REPORT;
+
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD0_LSB           0
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD0_MASK          0x000000ff
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD0_OFFSET        0x00000000
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD1_LSB           8
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD1_MASK          0x0000ff00
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD1_OFFSET        0x00000000
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD2_LSB           16
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD2_MASK          0x00ff0000
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD2_OFFSET        0x00000000
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD3_LSB           24
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD3_MASK          0xff000000
+#define HTC_BUNDLED_LOOKAHEAD_REPORT_LOOKAHEAD3_OFFSET        0x00000000
+
+#ifndef ATH_TARGET
+#include "athendpack.h"
+#endif
+
+#endif /* __HTC_H__ */
diff --git a/target/inc/htc_services.h b/target/inc/htc_services.h
new file mode 100644
index 0000000..bd43772
--- /dev/null
+++ b/target/inc/htc_services.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __HTC_SERVICES_H__
+#define __HTC_SERVICES_H__
+
+/* Current service IDs */
+
+typedef enum {
+	RSVD_SERVICE_GROUP = 0,
+	WMI_SERVICE_GROUP = 1,
+	NMI_SERVICE_GROUP = 2,
+	HTT_SERVICE_GROUP = 3,
+	CFG_NV_SERVICE_GROUP = 4,
+	WDI_IPA_SERVICE_GROUP = 5,
+	HTC_TEST_GROUP = 254,
+	HTC_SERVICE_GROUP_LAST = 255
+} HTC_SERVICE_GROUP_IDS;
+
+#define MAKE_SERVICE_ID(group,index) \
+	(int)(((int)group << 8) | (int)(index))
+
+/* NOTE: service ID of 0x0000 is reserved and should never be used */
+#define HTC_CTRL_RSVD_SVC MAKE_SERVICE_ID(RSVD_SERVICE_GROUP,1)
+#define WMI_CONTROL_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,0)
+#define WMI_DATA_BE_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,1)
+#define WMI_DATA_BK_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,2)
+#define WMI_DATA_VI_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,3)
+#define WMI_DATA_VO_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,4)
+#define WMI_MAX_SERVICES  5
+
+#define NMI_CONTROL_SVC   MAKE_SERVICE_ID(NMI_SERVICE_GROUP,0)
+#define NMI_DATA_SVC      MAKE_SERVICE_ID(NMI_SERVICE_GROUP,1)
+
+#define HTT_DATA_MSG_SVC  MAKE_SERVICE_ID(HTT_SERVICE_GROUP,0)
+#define HTT_DATA2_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP,1)
+
+/* raw stream service (i.e. flash, tcmd, calibration apps) */
+#define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0)
+
+#define CFG_NV_SVC  MAKE_SERVICE_ID(CFG_NV_SERVICE_GROUP,0)
+#define WDI_IPA_TX_SVC MAKE_SERVICE_ID(WDI_IPA_SERVICE_GROUP,0)
+
+/*
+ * Directions for interconnect pipe configuration.
+ * These definitions may be used during configuration and are shared
+ * between Host and Target.
+ *
+ * Pipe Directions are relative to the Host, so PIPEDIR_IN means
+ * "coming IN over air through Target to Host" as with a WiFi Rx operation.
+ * Conversely, PIPEDIR_OUT means "going OUT from Host through Target over air"
+ * as with a WiFi Tx operation. This is somewhat awkward for the "middle-man"
+ * Target since things that are "PIPEDIR_OUT" are coming IN to the Target
+ * over the interconnect.
+ */
+typedef A_UINT32 PIPEDIR;
+#define PIPEDIR_NONE		0
+#define PIPEDIR_IN		1   /* Target-->Host, WiFi Rx direction */
+#define PIPEDIR_OUT		2   /* Host->Target, WiFi Tx direction */
+#define PIPEDIR_INOUT 		3   /* bidirectional - target to target */
+#define PIPEDIR_INOUT_H2H	4   /* bidirectional - host to host */
+#define PIPEDIR_MATCH(d1, d2) (((PIPEDIR)(d1) & (PIPEDIR)(d2)) != 0)
+
+/* Establish a mapping between a service/direction and a pipe. */
+struct service_to_pipe {
+	A_UINT32 service_id;
+	A_UINT32 pipedir;
+	A_UINT32 pipenum;
+};
+
+#endif /*HTC_SERVICES_H_ */
diff --git a/target/inc/htt.h b/target/inc/htt.h
new file mode 100644
index 0000000..d9a081e
--- /dev/null
+++ b/target/inc/htt.h
@@ -0,0 +1,7034 @@
+/*
+ * Copyright (c) 2011-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * @file htt.h
+ *
+ * @details the public header file of HTT layer
+ */
+
+#ifndef _HTT_H_
+#define _HTT_H_
+
+#include <a_types.h>		/* A_UINT32 */
+#include <a_osapi.h>		/* PREPACK, POSTPACK */
+#ifdef ATHR_WIN_NWF
+#pragma warning(disable:4214)	/*bit field types other than int */
+#endif
+#include "wlan_defs.h"
+#include <htt_common.h>
+
+/*
+ * Unless explicitly specified to use 64 bits to represent physical addresses
+ * (or more precisely, bus addresses), default to 32 bits.
+ */
+#ifndef HTT_PADDR64
+#define HTT_PADDR64 0
+#endif
+
+#ifndef offsetof
+#define offsetof(type, field)   ((unsigned int)(&((type *)0)->field))
+#endif
+
+/*
+ * HTT version history:
+ * 1.0  initial numbered version
+ * 1.1  modifications to STATS messages.
+ *      These modifications are not backwards compatible, but since the
+ *      STATS messages themselves are non-essential (they are for debugging),
+ *      the 1.1 version of the HTT message library as a whole is compatible
+ *      with the 1.0 version.
+ * 1.2  reset mask IE added to STATS_REQ message
+ * 1.3  stat config IE added to STATS_REQ message
+ *----
+ * 2.0  FW rx PPDU desc added to RX_IND message
+ * 2.1  Enable msdu_ext/frag_desc banking change for WIFI2.0
+ *----
+ * 3.0  Remove HTT_H2T_MSG_TYPE_MGMT_TX message
+ * 3.1  Added HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND message
+ * 3.2  Added HTT_H2T_MSG_TYPE_WDI_IPA_CFG,
+ *            HTT_H2T_MSG_TYPE_WDI_IPA_OP_REQUEST messages
+ * 3.3  Added HTT_H2T_MSG_TYPE_AGGR_CFG_EX message
+ * 3.4  Added tx_compl_req flag in HTT tx descriptor
+ * 3.5  Added flush and fail stats in rx_reorder stats structure
+ * 3.6  Added frag flag in HTT RX INORDER PADDR IND header
+ * 3.7  Made changes to support EOS Mac_core 3.0
+ * 3.8  Added txq_group information element definition;
+ *      added optional txq_group suffix to TX_CREDIT_UPDATE_IND message
+ * 3.9  Added HTT_T2H CHAN_CHANGE message;
+ *      Allow buffer addresses in bus-address format to be stored as
+ *      either 32 bits or 64 bits.
+ * 3.10 Add optional TLV extensions to the VERSION_REQ and VERSION_CONF
+ *      messages to specify which HTT options to use.
+ *      Initial TLV options cover:
+ *        - whether to use 32 or 64 bits to represent LL bus addresses
+ *        - whether to use TX_COMPL_IND or TX_CREDIT_UPDATE_IND in HL systems
+ *        - how many tx queue groups to use
+ * 3.11 Expand rx debug stats:
+ *        - Expand the rx_reorder_stats struct with stats about successful and
+ *          failed rx buffer allcoations.
+ *        - Add a new rx_remote_buffer_mgmt_stats struct with stats about
+ *          the supply, allocation, use, and recycling of rx buffers for the
+ *          "remote ring" of rx buffers in host member in LL systems.
+ *          Add RX_REMOTE_RING_BUFFER_INFO stats type for uploading these stats.
+ * 3.12 Add "rx offload packet error" message with initial "MIC error" subtype
+ * 3.13 Add constants + macros to support 64-bit address format for the
+ *      tx fragments descriptor, the rx ring buffer, and the rx ring
+ *      index shadow register.
+ * 3.14 Add a method for the host to provide detailed per-frame tx specs:
+ *        - Add htt_tx_msdu_desc_ext_t struct def.
+ *        - Add TLV to specify whether the target supports the HTT tx MSDU
+ *          extension descriptor.
+ *        - Change a reserved bit in the HTT tx MSDU descriptor to an
+ *          "extension" bit, to specify whether a HTT tx MSDU extension
+ *          descriptor is present.
+ * 3.15 Add HW rx desc info to per-MSDU info elems in RX_IN_ORD_PADDR_IND msg.
+ *      (This allows the host to obtain key information about the MSDU
+ *      from a memory location already in the cache, rather than taking a
+ *      cache miss for each MSDU by reading the HW rx descs.)
+ * 3.16 Add htt_pkt_type_eth2 and define pkt_subtype flags to indicate
+ *      whether a copy-engine classification result is appended to TX_FRM.
+ * 3.17 Add a version of the WDI_IPA_CFG message; add RX_RING2 to WDI_IPA_CFG
+ * 3.18 Add a PEER_DEL tx completion indication status, for HL cleanup of
+ *      tx frames in the target after the peer has already been deleted.
+ * 3.19 Add HTT_DBG_STATS_RX_RATE_INFO_V2 and HTT_DBG_STATS_TX_RATE_INFO_V2
+ * 3.20 Expand rx_reorder_stats.
+ * 3.21 Add optional rx channel spec to HL RX_IND.
+ * 3.22 Expand rx_reorder_stats
+ *      (distinguish duplicates within vs. outside block ack window)
+ * 3.23 Add HTT_T2H_MSG_TYPE_RATE_REPORT to report peer justified rate.
+ *      The justified rate is calculated by two steps. The first is to multiply
+ *      user-rate by (1 - PER) and the other is to smooth the step 1's result
+ *      by a low pass filter.
+ *      This change allows HL download scheduling to consider the WLAN rate
+ *      that will be used for transmitting the downloaded frames.
+ * 3.24 Expand rx_reorder_stats
+ *      (add counter for decrypt / MIC errors)
+ * 3.25 Expand rx_reorder_stats
+ *      (add counter of frames received into both local + remote rings)
+ * 3.26 Add stats struct for counting rx of tx BF, MU, SU, and NDPA frames
+ *      (HTT_DBG_STATS_TXBF_MUSU_NDPA_PKT, rx_txbf_musu_ndpa_pkts_stats)
+ * 3.27 Add a new interface for flow-control. The following t2h messages have
+ *      been included: HTT_T2H_MSG_TYPE_FLOW_POOL_MAP and
+ *      HTT_T2H_MSG_TYPE_FLOW_POOL_UNMAP
+ */
+#define HTT_CURRENT_VERSION_MAJOR 3
+#define HTT_CURRENT_VERSION_MINOR 27
+
+#define HTT_NUM_TX_FRAG_DESC  1024
+
+#define HTT_WIFI_IP_VERSION(x, y) ((x) == (y))
+
+#define HTT_CHECK_SET_VAL(field, val)				\
+	A_ASSERT(!((val) & ~((field ## _M) >> (field ## _S))))
+
+/* macros to assist in sign-extending fields from HTT messages */
+#define HTT_SIGN_BIT_MASK(field) \
+	((field ## _M + (1 << field ## _S)) >> 1)
+	#define HTT_SIGN_BIT(_val, field) \
+	(_val & HTT_SIGN_BIT_MASK(field))
+	#define HTT_SIGN_BIT_UNSHIFTED(_val, field) \
+	(HTT_SIGN_BIT(_val, field) >> field ## _S)
+	#define HTT_SIGN_BIT_UNSHIFTED_MINUS_ONE(_val, field) \
+	(HTT_SIGN_BIT_UNSHIFTED(_val, field) - 1)
+	#define HTT_SIGN_BIT_EXTENSION(_val, field) \
+	(~(HTT_SIGN_BIT_UNSHIFTED(_val, field) | \
+	HTT_SIGN_BIT_UNSHIFTED_MINUS_ONE(_val, field)))
+	#define HTT_SIGN_BIT_EXTENSION_MASK(_val, field) \
+	(HTT_SIGN_BIT_EXTENSION(_val, field) & ~(field ## _M >> field ## _S))
+
+
+/*
+ * TEMPORARY:
+ * Provide HTT_H2T_MSG_TYPE_MGMT_TX as an alias for
+ * DEPRECATED_HTT_H2T_MSG_TYPE_MGMT_TX until all code
+ * that refers to HTT_H2T_MSG_TYPE_MGMT_TX has been
+ * updated.
+ */
+#define HTT_H2T_MSG_TYPE_MGMT_TX DEPRECATED_HTT_H2T_MSG_TYPE_MGMT_TX
+
+/*
+ * TEMPORARY:
+ * Provide HTT_T2H_MSG_TYPE_RC_UPDATE_IND as an alias for
+ * DEPRECATED_HTT_T2H_MSG_TYPE_RC_UPDATE_IND until all code
+ * that refers to HTT_T2H_MSG_TYPE_RC_UPDATE_IND has been
+ * updated.
+ */
+#define HTT_T2H_MSG_TYPE_RC_UPDATE_IND DEPRECATED_HTT_T2H_MSG_TYPE_RC_UPDATE_IND
+
+/* HTT Access Category values */
+enum HTT_AC_WMM {
+	/* WMM Access Categories */
+	HTT_AC_WMM_BE = 0x0,
+	HTT_AC_WMM_BK = 0x1,
+	HTT_AC_WMM_VI = 0x2,
+	HTT_AC_WMM_VO = 0x3,
+	/* extension Access Categories */
+	HTT_AC_EXT_NON_QOS = 0x4,
+	HTT_AC_EXT_UCAST_MGMT = 0x5,
+	HTT_AC_EXT_MCAST_DATA = 0x6,
+	HTT_AC_EXT_MCAST_MGMT = 0x7,
+};
+enum HTT_AC_WMM_MASK {
+	/* WMM Access Categories */
+	HTT_AC_WMM_BE_MASK = (1 << HTT_AC_WMM_BE),
+	HTT_AC_WMM_BK_MASK = (1 << HTT_AC_WMM_BK),
+	HTT_AC_WMM_VI_MASK = (1 << HTT_AC_WMM_VI),
+	HTT_AC_WMM_VO_MASK = (1 << HTT_AC_WMM_VO),
+	/* extension Access Categories */
+	HTT_AC_EXT_NON_QOS_MASK = (1 << HTT_AC_EXT_NON_QOS),
+	HTT_AC_EXT_UCAST_MGMT_MASK = (1 << HTT_AC_EXT_UCAST_MGMT),
+	HTT_AC_EXT_MCAST_DATA_MASK = (1 << HTT_AC_EXT_MCAST_DATA),
+	HTT_AC_EXT_MCAST_MGMT_MASK = (1 << HTT_AC_EXT_MCAST_MGMT),
+};
+#define HTT_AC_MASK_WMM					\
+	(HTT_AC_WMM_BE_MASK | HTT_AC_WMM_BK_MASK |	\
+	 HTT_AC_WMM_VI_MASK | HTT_AC_WMM_VO_MASK)
+#define HTT_AC_MASK_EXT							\
+	(HTT_AC_EXT_NON_QOS_MASK | HTT_AC_EXT_UCAST_MGMT_MASK |		\
+	 HTT_AC_EXT_MCAST_DATA_MASK | HTT_AC_EXT_MCAST_MGMT_MASK)
+#define HTT_AC_MASK_ALL (HTT_AC_MASK_WMM | HTT_AC_MASK_EXT)
+
+/*
+ * htt_dbg_stats_type -
+ * bit positions for each stats type within a stats type bitmask
+ * The bitmask contains 24 bits.
+ */
+enum htt_dbg_stats_type {
+	HTT_DBG_STATS_WAL_PDEV_TXRX              =  0, /* bit 0  ->    0x1 */
+	HTT_DBG_STATS_RX_REORDER                 =  1, /* bit 1  ->    0x2 */
+	HTT_DBG_STATS_RX_RATE_INFO               =  2, /* bit 2  ->    0x4 */
+	HTT_DBG_STATS_TX_PPDU_LOG                =  3, /* bit 3  ->    0x8 */
+	HTT_DBG_STATS_TX_RATE_INFO               =  4, /* bit 4  ->   0x10 */
+	HTT_DBG_STATS_TIDQ                       =  5, /* bit 5  ->   0x20 */
+	HTT_DBG_STATS_TXBF_INFO                  =  6, /* bit 6  ->   0x40 */
+	HTT_DBG_STATS_SND_INFO                   =  7, /* bit 7  ->   0x80 */
+	HTT_DBG_STATS_ERROR_INFO                 =  8, /* bit 8  ->  0x100 */
+	HTT_DBG_STATS_TX_SELFGEN_INFO            =  9, /* bit 9  ->  0x200 */
+	HTT_DBG_STATS_TX_MU_INFO                 = 10, /* bit 10 ->  0x400 */
+	HTT_DBG_STATS_SIFS_RESP_INFO             = 11, /* bit 11 ->  0x800 */
+	HTT_DBG_STATS_RX_REMOTE_RING_BUFFER_INFO = 12, /* bit 12 -> 0x1000 */
+	HTT_DBG_STATS_RX_RATE_INFO_V2            = 13, /* bit 13 -> 0x2000 */
+	HTT_DBG_STATS_TX_RATE_INFO_V2            = 14, /* bit 14 -> 0x4000 */
+	HTT_DBG_STATS_TXBF_MUSU_NDPA_PKT         = 15, /* bit 15 -> 0x8000 */
+	/* bits 16-23 currently reserved */
+
+	/* keep this last */
+	HTT_DBG_NUM_STATS
+};
+
+/*=== HTT option selection TLVs ===
+ * Certain HTT messages have alternatives or options.
+ * For such cases, the host and target need to agree on which option to use.
+ * Option specification TLVs can be appended to the VERSION_REQ and
+ * VERSION_CONF messages to select options other than the default.
+ * These TLVs are entirely optional - if they are not provided, there is a
+ * well-defined default for each option.  If they are provided, they can be
+ * provided in any order.  Each TLV can be present or absent independent of
+ * the presence / absence of other TLVs.
+ *
+ * The HTT option selection TLVs use the following format:
+ *     |31                             16|15             8|7              0|
+ *     |---------------------------------+----------------+----------------|
+ *     |        value (payload)          |     length     |       tag      |
+ *     |-------------------------------------------------------------------|
+ * The value portion need not be only 2 bytes; it can be extended by any
+ * integer number of 4-byte units.  The total length of the TLV, including
+ * the tag and length fields, must be a multiple of 4 bytes.  The length
+ * field specifies the total TLV size in 4-byte units.  Thus, the typical
+ * TLV, with a 1-byte tag field, a 1-byte length field, and a 2-byte value
+ * field, would store 0x1 in its length field, to show that the TLV occupies
+ * a single 4-byte unit.
+ */
+
+/*--- TLV header format - applies to all HTT option TLVs ---*/
+
+enum HTT_OPTION_TLV_TAGS {
+	HTT_OPTION_TLV_TAG_RESERVED0 = 0x0,
+	HTT_OPTION_TLV_TAG_LL_BUS_ADDR_SIZE = 0x1,
+	HTT_OPTION_TLV_TAG_HL_SUPPRESS_TX_COMPL_IND = 0x2,
+	HTT_OPTION_TLV_TAG_MAX_TX_QUEUE_GROUPS = 0x3,
+	HTT_OPTION_TLV_TAG_SUPPORT_TX_MSDU_DESC_EXT = 0x4,
+};
+
+PREPACK struct htt_option_tlv_header_t {
+	A_UINT8 tag;
+	A_UINT8 length;
+} POSTPACK;
+
+#define HTT_OPTION_TLV_TAG_M      0x000000ff
+#define HTT_OPTION_TLV_TAG_S      0
+#define HTT_OPTION_TLV_LENGTH_M   0x0000ff00
+#define HTT_OPTION_TLV_LENGTH_S   8
+/*
+ * value0 - 16 bit value field stored in word0
+ * The TLV's value field may be longer than 2 bytes, in which case
+ * the remainder of the value is stored in word1, word2, etc.
+ */
+#define HTT_OPTION_TLV_VALUE0_M   0xffff0000
+#define HTT_OPTION_TLV_VALUE0_S   16
+
+#define HTT_OPTION_TLV_TAG_SET(word, tag)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_OPTION_TLV_TAG, tag);	\
+		(word) |= ((tag) << HTT_OPTION_TLV_TAG_S);	\
+	} while (0)
+#define HTT_OPTION_TLV_TAG_GET(word)					\
+	(((word) & HTT_OPTION_TLV_TAG_M) >> HTT_OPTION_TLV_TAG_S)
+
+#define HTT_OPTION_TLV_LENGTH_SET(word, tag)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_OPTION_TLV_LENGTH, tag);	\
+		(word) |= ((tag) << HTT_OPTION_TLV_LENGTH_S);	\
+	} while (0)
+#define HTT_OPTION_TLV_LENGTH_GET(word)					\
+	(((word) & HTT_OPTION_TLV_LENGTH_M) >> HTT_OPTION_TLV_LENGTH_S)
+
+#define HTT_OPTION_TLV_VALUE0_SET(word, tag)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_OPTION_TLV_VALUE0, tag);	\
+		(word) |= ((tag) << HTT_OPTION_TLV_VALUE0_S);	\
+	} while (0)
+#define HTT_OPTION_TLV_VALUE0_GET(word)					\
+	(((word) & HTT_OPTION_TLV_VALUE0_M) >> HTT_OPTION_TLV_VALUE0_S)
+
+/*--- format of specific HTT option TLVs ---*/
+
+/*
+ * HTT option TLV for specifying LL bus address size
+ * Some chips require bus addresses used by the target to access buffers
+ * within the host's memory to be 32 bits; others require bus addresses
+ * used by the target to access buffers within the host's memory to be
+ * 64 bits.
+ * The LL_BUS_ADDR_SIZE TLV can be sent from the target to the host as
+ * a suffix to the VERSION_CONF message to specify which bus address format
+ * the target requires.
+ * If this LL_BUS_ADDR_SIZE TLV is not sent by the target, the host should
+ * default to providing bus addresses to the target in 32-bit format.
+ */
+enum HTT_OPTION_TLV_LL_BUS_ADDR_SIZE_VALUES {
+	HTT_OPTION_TLV_LL_BUS_ADDR_SIZE32 = 0x0,
+	HTT_OPTION_TLV_LL_BUS_ADDR_SIZE64 = 0x1,
+};
+PREPACK struct htt_option_tlv_ll_bus_addr_size_t {
+	struct htt_option_tlv_header_t hdr;
+	A_UINT16 ll_bus_addr_size;	/* LL_BUS_ADDR_SIZE_VALUES enum */
+} POSTPACK;
+
+/*
+ * HTT option TLV for specifying whether HL systems should indicate
+ * over-the-air tx completion for individual frames, or should instead
+ * send a bulk TX_CREDIT_UPDATE_IND except when the host explicitly
+ * requests an OTA tx completion for a particular tx frame.
+ * This option does not apply to LL systems, where the TX_COMPL_IND
+ * is mandatory.
+ * This option is primarily intended for HL systems in which the tx frame
+ * downloads over the host --> target bus are as slow as or slower than
+ * the transmissions over the WLAN PHY.  For cases where the bus is faster
+ * than the WLAN PHY, the target will transmit relatively large A-MPDUs,
+ * and consquently will send one TX_COMPL_IND message that covers several
+ * tx frames.  For cases where the WLAN PHY is faster than the bus,
+ * the target will end up transmitting very short A-MPDUs, and consequently
+ * sending many TX_COMPL_IND messages, which each cover a very small number
+ * of tx frames.
+ * The HL_SUPPRESS_TX_COMPL_IND TLV can be sent by the host to the target as
+ * a suffix to the VERSION_REQ message to request whether the host desires to
+ * use TX_CREDIT_UPDATE_IND rather than TX_COMPL_IND.  The target can then
+ * send a HTT_SUPPRESS_TX_COMPL_IND TLV to the host as a suffix to the
+ * VERSION_CONF message to confirm whether TX_CREDIT_UPDATE_IND will be used
+ * rather than TX_COMPL_IND.  TX_CREDIT_UPDATE_IND shall only be used if the
+ * host sends a HL_SUPPRESS_TX_COMPL_IND TLV requesting use of
+ * TX_CREDIT_UPDATE_IND, and the target sends a HL_SUPPRESS_TX_COMPLE_IND TLV
+ * back to the host confirming use of TX_CREDIT_UPDATE_IND.
+ * Lack of a HL_SUPPRESS_TX_COMPL_IND TLV from either host --> target or
+ * target --> host is equivalent to a HL_SUPPRESS_TX_COMPL_IND that
+ * explicitly specifies HL_ALLOW_TX_COMPL_IND in the value payload of the
+ * TLV.
+ */
+enum HTT_OPTION_TLV_HL_SUPPRESS_TX_COMPL_IND_VALUES {
+	HTT_OPTION_TLV_HL_ALLOW_TX_COMPL_IND = 0x0,
+	HTT_OPTION_TLV_HL_SUPPRESS_TX_COMPL_IND = 0x1,
+};
+PREPACK struct htt_option_tlv_hl_suppress_tx_compl_ind_t {
+	struct htt_option_tlv_header_t hdr;
+	A_UINT16 hl_suppress_tx_compl_ind;/*HL_SUPPRESS_TX_COMPL_IND enum*/
+} POSTPACK;
+
+/*
+ * HTT option TLV for specifying how many tx queue groups the target
+ * may establish.
+ * This TLV specifies the maximum value the target may send in the
+ * txq_group_id field of any TXQ_GROUP information elements sent by
+ * the target to the host.  This allows the host to pre-allocate an
+ * appropriate number of tx queue group structs.
+ *
+ * The MAX_TX_QUEUE_GROUPS_TLV can be sent from the host to the target as
+ * a suffix to the VERSION_REQ message to specify whether the host supports
+ * tx queue groups at all, and if so if there is any limit on the number of
+ * tx queue groups that the host supports.
+ * The MAX_TX_QUEUE_GROUPS TLV can be sent from the target to the host as
+ * a suffix to the VERSION_CONF message.  If the host has specified in the
+ * VER_REQ message a limit on the number of tx queue groups the host can
+ * supprt, the target shall limit its specification of the maximum tx groups
+ * to be no larger than this host-specified limit.
+ *
+ * If the target does not provide a MAX_TX_QUEUE_GROUPS TLV, then the host
+ * shall preallocate 4 tx queue group structs, and the target shall not
+ * specify a txq_group_id larger than 3.
+ */
+enum HTT_OPTION_TLV_MAX_TX_QUEUE_GROUPS_VALUES {
+	HTT_OPTION_TLV_TX_QUEUE_GROUPS_UNSUPPORTED = 0,
+	/*
+	 * values 1 through N specify the max number of tx queue groups
+	 * the sender supports
+	 */
+	HTT_OPTION_TLV_TX_QUEUE_GROUPS_UNLIMITED = 0xffff,
+};
+/* TEMPORARY backwards-compatibility alias for a typo fix -
+ * The htt_option_tlv_mac_tx_queue_groups_t typo has been corrected
+ * to  htt_option_tlv_max_tx_queue_groups_t, but an alias is provided
+ * to support the old name (with the typo) until all references to the
+ * old name are replaced with the new name.
+ */
+#define htt_option_tlv_mac_tx_queue_groups_t	\
+	htt_option_tlv_max_tx_queue_groups_t
+PREPACK struct htt_option_tlv_max_tx_queue_groups_t {
+	struct htt_option_tlv_header_t hdr;
+	A_UINT16 max_tx_queue_groups;	/* max txq_group_id + 1 */
+} POSTPACK;
+
+/*
+ * HTT option TLV for specifying whether the target supports an extended
+ * version of the HTT tx descriptor.  If the target provides this TLV
+ * and specifies in the TLV that the target supports an extended version
+ * of the HTT tx descriptor, the target must check the "extension" bit in
+ * the HTT tx descriptor, and if the extension bit is set, to expect a
+ * HTT tx MSDU extension descriptor immediately following the HTT tx MSDU
+ * descriptor.  Furthermore, the target must provide room for the HTT
+ * tx MSDU extension descriptor in the target's TX_FRM buffer.
+ * This option is intended for systems where the host needs to explicitly
+ * control the transmission parameters such as tx power for individual
+ * tx frames.
+ * The SUPPORT_TX_MSDU_DESC_EXT TLB can be sent by the target to the host
+ * as a suffix to the VERSION_CONF message to explicitly specify whether
+ * the target supports the HTT tx MSDU extension descriptor.
+ * Lack of a SUPPORT_TX_MSDU_DESC_EXT from the target shall be interpreted
+ * by the host as lack of target support for the HTT tx MSDU extension
+ * descriptor; the host shall provide HTT tx MSDU extension descriptors in
+ * the HTT_H2T TX_FRM messages only if the target indicates it supports
+ * the HTT tx MSDU extension descriptor.
+ * The host is not required to provide the HTT tx MSDU extension descriptor
+ * just because the target supports it; the target must check the
+ * "extension" bit in the HTT tx MSDU descriptor to determine whether an
+ * extension descriptor is present.
+ */
+enum HTT_OPTION_TLV_SUPPORT_TX_MSDU_DESC_EXT_VALUES {
+	HTT_OPTION_TLV_TX_MSDU_DESC_EXT_NO_SUPPORT = 0x0,
+	HTT_OPTION_TLV_TX_MSDU_DESC_EXT_SUPPORT = 0x1,
+};
+PREPACK struct htt_option_tlv_support_tx_msdu_desc_ext_t {
+	struct htt_option_tlv_header_t hdr;
+	A_UINT16 tx_msdu_desc_ext_support;/*SUPPORT_TX_MSDU_DESC_EXT enum*/
+} POSTPACK;
+
+
+/*=== host -> target messages ===============================================*/
+
+enum htt_h2t_msg_type {
+	HTT_H2T_MSG_TYPE_VERSION_REQ = 0x0,
+	HTT_H2T_MSG_TYPE_TX_FRM = 0x1,
+	HTT_H2T_MSG_TYPE_RX_RING_CFG = 0x2,
+	HTT_H2T_MSG_TYPE_STATS_REQ = 0x3,
+	HTT_H2T_MSG_TYPE_SYNC = 0x4,
+	HTT_H2T_MSG_TYPE_AGGR_CFG = 0x5,
+	HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG = 0x6,
+	DEPRECATED_HTT_H2T_MSG_TYPE_MGMT_TX = 0x7,	/* no longer used */
+	HTT_H2T_MSG_TYPE_WDI_IPA_CFG = 0x8,
+	HTT_H2T_MSG_TYPE_WDI_IPA_OP_REQ = 0x9,
+	HTT_H2T_MSG_TYPE_AGGR_CFG_EX = 0xa,	/*per vdev amsdu subfrm limit*/
+	/* keep this last */
+	HTT_H2T_NUM_MSGS
+};
+
+/*
+ * HTT host to target message type -
+ * stored in bits 7:0 of the first word of the message
+ */
+#define HTT_H2T_MSG_TYPE_M      0xff
+#define HTT_H2T_MSG_TYPE_S      0
+
+#define HTT_H2T_MSG_TYPE_SET(word, msg_type)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE, msg_type);	\
+		(word) |= ((msg_type) << HTT_H2T_MSG_TYPE_S);	\
+	} while (0)
+#define HTT_H2T_MSG_TYPE_GET(word)				\
+	(((word) & HTT_H2T_MSG_TYPE_M) >> HTT_H2T_MSG_TYPE_S)
+
+/**
+ * @brief target -> host version number request message definition
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |                     reserved                     |    msg type    |
+ *     |-------------------------------------------------------------------|
+ *     :                    option request TLV (optional)                  |
+ *     :...................................................................:
+ *
+ * The VER_REQ message may consist of a single 4-byte word, or may be
+ * extended with TLVs that specify which HTT options the host is requesting
+ * from the target.
+ * The following option TLVs may be appended to the VER_REQ message:
+ *   - HL_SUPPRESS_TX_COMPL_IND
+ *   - HL_MAX_TX_QUEUE_GROUPS
+ * These TLVs may appear in an arbitrary order.  Any number of these TLVs
+ * may be appended to the VER_REQ message (but only one TLV of each type).
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a version number request message
+ *     Value: 0x0
+ */
+
+#define HTT_VER_REQ_BYTES 4
+
+/* TBDXXX: figure out a reasonable number */
+#define HTT_HL_DATA_SVC_PIPE_DEPTH         24
+#define HTT_LL_DATA_SVC_PIPE_DEPTH         64
+
+/**
+ * @brief HTT tx MSDU descriptor
+ *
+ * @details
+ *  The HTT tx MSDU descriptor is created by the host HTT SW for each
+ *  tx MSDU.  The HTT tx MSDU descriptor contains the information that
+ *  the target firmware needs for the FW's tx processing, particularly
+ *  for creating the HW msdu descriptor.
+ *  The same HTT tx descriptor is used for HL and LL systems, though
+ *  a few fields within the tx descriptor are used only by LL or
+ *  only by HL.
+ *  The HTT tx descriptor is defined in two manners: by a struct with
+ *  bitfields, and by a series of [dword offset, bit mask, bit shift]
+ *  definitions.
+ *  The target should use the struct def, for simplicitly and clarity,
+ *  but the host shall use the bit-mast + bit-shift defs, to be endian-
+ *  neutral.  Specifically, the host shall use the get/set macros built
+ *  around the mask + shift defs.
+ */
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_80211_HDR_S   0
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_80211_HDR_M   0x1
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_AGGR_S     1
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_AGGR_M     0x2
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_ENCRYPT_S  2
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_ENCRYPT_M  0x4
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_CLASSIFY_S 3
+#define HTT_TX_MSDU_DESC_RAW_SUBTYPE_NO_CLASSIFY_M 0x8
+
+#define HTT_TX_VDEV_ID_WORD 0
+#define HTT_TX_VDEV_ID_MASK 0x3f
+#define HTT_TX_VDEV_ID_SHIFT 16
+
+#define HTT_TX_L3_CKSUM_OFFLOAD      1
+#define HTT_TX_L4_CKSUM_OFFLOAD      2
+
+#define HTT_TX_MSDU_LEN_DWORD 1
+#define HTT_TX_MSDU_LEN_MASK 0xffff;
+
+/*
+ * HTT_VAR_PADDR macros
+ * Allow physical / bus addresses to be either a single 32-bit value,
+ * or a 64-bit value, stored as a little-endian lo,hi pair of 32-bit parts
+ */
+
+/*
+ * Note that in this macro A_UINT32 has been converted to
+ * uint32_t only to address checkpath errors caused by declaring
+ * var_name as A_UINT32.
+ */
+#define HTT_VAR_PADDR32(var_name) uint32_t (var_name)
+
+#define HTT_VAR_PADDR64_LE(var_name)			\
+	struct {					\
+		/* little-endian: lo precedes hi */	\
+		A_UINT32 lo;				\
+		A_UINT32 hi;				\
+	} var_name
+
+/*
+ * TEMPLATE_HTT_TX_MSDU_DESC_T:
+ * This macro defines a htt_tx_msdu_descXXX_t in which any physical
+ * addresses are stored in a XXX-bit field.
+ * This macro is used to define both htt_tx_msdu_desc32_t and
+ * htt_tx_msdu_desc64_t structs.
+ */
+#define TEMPLATE_HTT_TX_MSDU_DESC_T(_paddr_bits_, _paddr__frags_desc_ptr_) \
+PREPACK struct htt_tx_msdu_desc ## _paddr_bits_ ## _t		\
+{								\
+	/* DWORD 0: flags and meta-data */			\
+	A_UINT32						\
+		msg_type:8, /* HTT_H2T_MSG_TYPE_TX_FRM */	\
+							\
+	/* pkt_subtype -				\
+	 * Detailed specification of the tx frame contents, extending the \
+	 * general specification provided by pkt_type.	\
+	 * FIX THIS: ADD COMPLETE SPECS FOR THIS FIELDS VALUE, e.g. \
+	 *pkt_type    | pkt_subtype		\
+	 *============================================================== \
+	 *802.3       | bit 0:3    - Reserved                             \
+	 *            | bit 4: 0x0 - Copy-Engine Classification Results   \
+	 *            |              not appended to the HTT message      \
+	 *            |        0x1 - Copy-Engine Classification Results   \
+	 *            |              appended to the HTT message in the   \
+	 *            |              format:                              \
+	 *            |              [HTT tx desc, frame header,          \
+	 *            |              CE classification results]           \
+	 *            |              The CE classification results begin  \
+	 *            |              at the next 4-byte boundary after    \
+	 *            |              the frame header.                    \
+	 *------------+-------------------------------------------------  \
+	 *Eth2        | bit 0:3    - Reserved                             \
+	 *            | bit 4: 0x0 - Copy-Engine Classification Results   \
+	 *            |              not appended to the HTT message      \
+	 *            |        0x1 - Copy-Engine Classification Results   \
+	 *            |              appended to the HTT message.         \
+	 *            |              See the above specification of the   \
+	 *            |              CE classification results location.  \
+	 *------------+-------------------------------------------------  \
+	 *native WiFi | bit 0:3    - Reserved                             \
+	 *            | bit 4: 0x0 - Copy-Engine Classification Results   \
+	 *            |              not appended to the HTT message      \
+	 *            |        0x1 - Copy-Engine Classification Results   \
+	 *            |              appended to the HTT message.         \
+	 *            |              See the above specification of the   \
+	 *            |              CE classification results location.  \
+	 *------------+-------------------------------------------------  \
+	 *mgmt        | 0x0 - 802.11 MAC header absent		\
+	 *            | 0x1 - 802.11 MAC header present	\
+	 *------------+-------------------------------------------------  \
+	 *raw         | bit 0: 0x0 - 802.11 MAC header absent \
+	 *            |        0x1 - 802.11 MAC header present		   \
+	 *            | bit 1: 0x0 - allow aggregation		\
+	 *            |        0x1 - don't allow aggregation   \
+	 *            | bit 2: 0x0 - perform encryption		   \
+	 *            |        0x1 - don't perform encryption	\
+	 *            | bit 3: 0x0 - perform tx classification / queuing  \
+	 *            |        0x1 - don't perform tx classification;     \
+	 *            |              insert the frame into the "misc"     \
+	 *            |              tx queue		\
+	 *            | bit 4: 0x0 - Copy-Engine Classification Results   \
+	 *            |              not appended to the HTT message      \
+	 *            |        0x1 - Copy-Engine Classification Results   \
+	 *            |              appended to the HTT message.         \
+	 *            |              See the above specification of the   \
+	 *            |              CE classification results location.  \
+	 */							\
+		pkt_subtype:5,			\
+								\
+	/* pkt_type -					\
+	 * General specification of the tx frame contents. \
+	 * The htt_pkt_type enum should be used to specify \
+	 * and check the value of this field.		\
+	 */						\
+		pkt_type:3,				\
+								\
+	/* vdev_id -			\
+	 * ID for the vdev that is sending this tx frame. \
+	 * For certain non-standard packet types, e.g. pkt_type == raw \
+	 * and (pkt_subtype >> 3) == 1, this field is not relevant/valid. \
+	 * This field is used primarily for determining where to queue \
+	 * broadcast and multicast frames.		\
+	 */						\
+		vdev_id:6,					\
+	/* ext_tid -					\
+	 * The extended traffic ID.			\
+	 * If the TID is unknown, the extended TID is set to \
+	 * HTT_TX_EXT_TID_INVALID.			\
+	 * If the tx frame is QoS data, then the extended TID has the 0-15 \
+	 * value of the QoS TID.			\
+	 * If the tx frame is non-QoS data, then the extended TID is set to \
+	 * HTT_TX_EXT_TID_NON_QOS.			\
+	 * If the tx frame is multicast or broadcast, then the extended TID \
+	 * is set to HTT_TX_EXT_TID_MCAST_BCAST.	\
+	 */						\
+		ext_tid:5,					\
+							\
+	/* postponed -					\
+	 * This flag indicates whether the tx frame has been downloaded to \
+	 * the target before but discarded by the target, and now is being \
+	 * downloaded again; or if this is a new frame that is being \
+	 * downloaded for the first time.		\
+	 * This flag allows the target to determine the correct order for \
+	 * transmitting new vs. old frames.		\
+	 * value: 0 -> new frame, 1 -> re-send of a previously
+	 * sent frame \
+	 * This flag only applies to HL systems, since in LL systems, \
+	 * the tx flow control is handled entirely within the target. \
+	 */						\
+		postponed:1,					\
+								\
+	/* extension -				\
+	 * This flag indicates whether a HTT tx MSDU extension descriptor\
+	 * (htt_tx_msdu_desc_ext_t) follows this HTT tx MSDU descriptor.\
+	 *				\
+	 * 0x0 - no extension MSDU descriptor is present	\
+	 * 0x1 - an extension MSDU descriptor immediately follows the	\
+	 *       regular MSDU descriptor	\
+	 */				\
+		extension:1,			\
+								\
+	/* cksum_offload -				\
+	 * This flag indicates whether checksum offload is enabled or not \
+	 * for this frame. Target FW use this flag to turn on HW checksumming \
+	 *  0x0 - No checksum offload			\
+	 *  0x1 - L3 header checksum only		\
+	 *  0x2 - L4 checksum only			\
+	 *  0x3 - L3 header checksum + L4 checksum	\
+	 */						\
+		cksum_offload:2,				\
+							\
+	/* tx_comp_req -				\
+	 * This flag indicates whether Tx Completion	\
+	 * from fw is required or not.			\
+	 * This  flag is only relevant if tx completion is not \
+	 * universally enabled.				\
+	 * For all LL systems, tx completion is mandatory, \
+	 * so this flag will be irrelevant.		\
+	 * For HL systems tx completion is optional, but HL systems in which \
+	 * the bus throughput exceeds the WLAN throughput will \
+	 * probably want to always use tx completion, and thus \
+	 * would not check this flag.			\
+	 * This flag is required when tx completions are not used universally, \
+	 * but are still required for certain tx frames for which \
+	 * an OTA delivery acknowledgment is needed by the host. \
+	 * In practice, this would be for HL systems in which the \
+	 * bus throughput is less than the WLAN throughput. \
+	 *						\
+	 * 0x0 - Tx Completion Indication from Fw not required \
+	 * 0x1 - Tx Completion Indication from Fw is required \
+	 */						\
+		tx_compl_req:1;				\
+									\
+									\
+	/* DWORD 1: MSDU length and ID */			\
+	A_UINT32						\
+		len:16, /* MSDU length, in bytes */		\
+		id:16; /* MSDU ID used to identify the MSDU to the host, \
+			  * and this id is used to calculate fragmentation \
+			  * descriptor pointer inside the target based on \
+			  * the base address, configured inside the target. \
+			  */					\
+								\
+	/* DWORD 2 (or 2-3): fragmentation descriptor bus address */ \
+	/* frags_desc_ptr -					\
+	 * The fragmentation descriptor pointer tells the HW's MAC DMA \
+	 * where the tx frame's fragments reside in memory.	\
+	 * This field only applies to LL systems, since in HL systems the \
+	 * (degenerate single-fragment) fragmentation descriptor is created \
+	 * within the target.					\
+	 */							\
+	_paddr__frags_desc_ptr_;				\
+								\
+	/* DWORD 3 (or 4): peerid, chanfreq */			\
+	/*							\
+	 * Peer ID : Target can use this value to know which peer-id packet \
+	 *           destined to.				\
+	 *           It's intended to be specified by host in case of NAWDS. \
+	 */							\
+	A_UINT16 peerid;					\
+								\
+	/*							\
+	 * Channel frequency: This identifies the desired channel \
+	 * frequency (in mhz) for tx frames. This is used by FW to help	\
+	 * determine when it is safe to transmit or drop frames for \
+	 * off-channel operation.				\
+	 * The default value of zero indicates to FW that the	\
+	 * corresponding VDEV's home channel (if there is one) is \
+	 * the desired channel frequency.			\
+	 */							\
+	A_UINT16 chanfreq;					\
+								\
+	/* Reason reserved is commented is increasing the htt
+	 * structure size leads to some wierd issues.
+	 * A_UINT32 reserved_dword3_bits0_31;			\
+	 */							\
+} POSTPACK
+/* define a htt_tx_msdu_desc32_t type */
+TEMPLATE_HTT_TX_MSDU_DESC_T(32, HTT_VAR_PADDR32(frags_desc_ptr));
+/* define a htt_tx_msdu_desc64_t type */
+TEMPLATE_HTT_TX_MSDU_DESC_T(64, HTT_VAR_PADDR64_LE(frags_desc_ptr));
+/*
+ * Make htt_tx_msdu_desc_t be an alias for either
+ * htt_tx_msdu_desc32_t or htt_tx_msdu_desc64_t
+ */
+#if HTT_PADDR64
+#define htt_tx_msdu_desc_t htt_tx_msdu_desc64_t
+#else
+#define htt_tx_msdu_desc_t htt_tx_msdu_desc32_t
+#endif
+
+/* decriptor information for Management frame*/
+/*
+ * THIS htt_mgmt_tx_desc_t STRUCT IS DEPRECATED - DON'T USE IT.
+ * BOTH MANAGEMENT AND DATA FRAMES SHOULD USE htt_tx_msdu_desc_t.
+ */
+#define HTT_MGMT_FRM_HDR_DOWNLOAD_LEN    32
+extern A_UINT32 mgmt_hdr_len;
+PREPACK struct htt_mgmt_tx_desc_t {
+	A_UINT32 msg_type;
+#if HTT_PADDR64
+	A_UINT64 frag_paddr;	/* DMAble address of the data */
+#else
+	A_UINT32 frag_paddr;	/* DMAble address of the data */
+#endif
+	A_UINT32 desc_id;	/* returned to host during completion
+						 * to free the meory*/
+	A_UINT32 len;		/* Fragment length */
+	A_UINT32 vdev_id;	/* virtual device ID */
+	A_UINT8 hdr[HTT_MGMT_FRM_HDR_DOWNLOAD_LEN];	/* frm header */
+} POSTPACK;
+
+PREPACK struct htt_mgmt_tx_compl_ind {
+	A_UINT32 desc_id;
+	A_UINT32 status;
+} POSTPACK;
+
+/*
+ * This SDU header size comes from the summation of the following:
+ *  1. Max of:
+ *     a.  Native WiFi header, for native WiFi frames: 24 bytes
+ *         (frame control, duration / ID, addr1, addr2, addr3, seq ctrl, addr4)
+ *     b.  802.11 header, for raw frames: 36 bytes
+ *         (frame control, duration / ID, addr1, addr2, addr3, seq ctrl, addr4,
+ *         QoS header, HT header)
+ *     c.  802.3 header, for ethernet frames: 14 bytes
+ *         (destination address, source address, ethertype / length)
+ *  2. Max of:
+ *     a.  IPv4 header, up through the DiffServ Code Point: 2 bytes
+ *     b.  IPv6 header, up through the Traffic Class: 2 bytes
+ *  3. 802.1Q VLAN header: 4 bytes
+ *  4. LLC/SNAP header: 8 bytes
+ */
+#define HTT_TX_HDR_SIZE_NATIVE_WIFI 30
+#define HTT_TX_HDR_SIZE_802_11_RAW 36
+#define HTT_TX_HDR_SIZE_ETHERNET 14
+
+#define HTT_TX_HDR_SIZE_OUTER_HDR_MAX HTT_TX_HDR_SIZE_802_11_RAW
+A_COMPILE_TIME_ASSERT(htt_encap_hdr_size_max_check_nwifi,
+		      HTT_TX_HDR_SIZE_OUTER_HDR_MAX >=
+		      HTT_TX_HDR_SIZE_NATIVE_WIFI);
+A_COMPILE_TIME_ASSERT(htt_encap_hdr_size_max_check_enet,
+		      HTT_TX_HDR_SIZE_OUTER_HDR_MAX >=
+		      HTT_TX_HDR_SIZE_ETHERNET);
+
+#define HTT_HL_TX_HDR_SIZE_IP 1600	/* also include payload */
+#define HTT_LL_TX_HDR_SIZE_IP 16 /*up to the end of UDP hdr for v4*/
+
+#define HTT_TX_HDR_SIZE_802_1Q 4
+#define HTT_TX_HDR_SIZE_LLC_SNAP 8
+
+
+#define HTT_COMMON_TX_FRM_HDR_LEN		\
+	(HTT_TX_HDR_SIZE_OUTER_HDR_MAX +	\
+	 HTT_TX_HDR_SIZE_802_1Q +		\
+	 HTT_TX_HDR_SIZE_LLC_SNAP)
+
+#define HTT_HL_TX_FRM_HDR_LEN					\
+	(HTT_COMMON_TX_FRM_HDR_LEN + HTT_HL_TX_HDR_SIZE_IP)
+
+#define HTT_LL_TX_FRM_HDR_LEN					\
+	(HTT_COMMON_TX_FRM_HDR_LEN + HTT_LL_TX_HDR_SIZE_IP)
+
+#define HTT_TX_DESC_LEN  sizeof(struct htt_tx_msdu_desc_t)
+
+/* dword 0 */
+#define HTT_TX_DESC_PKT_SUBTYPE_OFFSET_BYTES 0
+#define HTT_TX_DESC_PKT_SUBTYPE_OFFSET_DWORD 0
+#define HTT_TX_DESC_PKT_SUBTYPE_M      0x00001f00
+#define HTT_TX_DESC_PKT_SUBTYPE_S      8
+
+#define HTT_TX_DESC_NO_ENCRYPT_OFFSET_BYTES 0
+#define HTT_TX_DESC_NO_ENCRYPT_OFFSET_DWORD 0
+#define HTT_TX_DESC_NO_ENCRYPT_M      0x00000400
+#define HTT_TX_DESC_NO_ENCRYPT_S      10
+
+#define HTT_TX_DESC_PKT_TYPE_OFFSET_BYTES 0
+#define HTT_TX_DESC_PKT_TYPE_OFFSET_DWORD 0
+#define HTT_TX_DESC_PKT_TYPE_M         0x0000e000
+#define HTT_TX_DESC_PKT_TYPE_S         13
+
+#define HTT_TX_DESC_VDEV_ID_OFFSET_BYTES 0
+#define HTT_TX_DESC_VDEV_ID_OFFSET_DWORD 0
+#define HTT_TX_DESC_VDEV_ID_M          0x003f0000
+#define HTT_TX_DESC_VDEV_ID_S          16
+
+#define HTT_TX_DESC_EXT_TID_OFFSET_BYTES 0
+#define HTT_TX_DESC_EXT_TID_OFFSET_DWORD 0
+#define HTT_TX_DESC_EXT_TID_M          0x07c00000
+#define HTT_TX_DESC_EXT_TID_S          22
+
+#define HTT_TX_DESC_POSTPONED_OFFSET_BYTES 0
+#define HTT_TX_DESC_POSTPONED_OFFSET_DWORD 0
+#define HTT_TX_DESC_POSTPONED_M        0x08000000
+#define HTT_TX_DESC_POSTPONED_S        27
+
+#define HTT_TX_DESC_CKSUM_OFFLOAD_OFFSET_BYTES 0
+#define HTT_TX_DESC_CKSUM_OFFLOAD_OFFSET_DWORD 0
+#define HTT_TX_DESC_CKSUM_OFFLOAD_M 0x60000000
+#define HTT_TX_DESC_CKSUM_OFFLOAD_S 29
+
+#define HTT_TX_DESC_TX_COMP_OFFSET_BYTES 0
+#define HTT_TX_DESC_TX_COMP_OFFSET_DWORD 0
+#define HTT_TX_DESC_TX_COMP_M 0x80000000
+#define HTT_TX_DESC_TX_COMP_S 31
+
+/* dword 1 */
+#define HTT_TX_DESC_FRM_LEN_OFFSET_BYTES 4
+#define HTT_TX_DESC_FRM_LEN_OFFSET_DWORD 1
+#define HTT_TX_DESC_FRM_LEN_M          0x0000ffff
+#define HTT_TX_DESC_FRM_LEN_S          0
+
+#define HTT_TX_DESC_FRM_ID_OFFSET_BYTES 4
+#define HTT_TX_DESC_FRM_ID_OFFSET_DWORD 1
+#define HTT_TX_DESC_FRM_ID_M           0xffff0000
+#define HTT_TX_DESC_FRM_ID_S           16
+
+/* dword 2 */
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_OFFSET_BYTES 8
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_OFFSET_DWORD 2
+/* for systems using 64-bit format for bus addresses */
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_HI_M 0xffffffff
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_HI_S 0
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_LO_M 0xffffffff
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_LO_S 0
+/* for systems using 32-bit format for bus addresses */
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_M    0xffffffff
+#define HTT_TX_DESC_FRAGS_DESC_PADDR_S    0
+
+/* dword 3 */
+#define HTT_TX_DESC_PEER_ID_OFFSET_BYTES_64 16
+#define HTT_TX_DESC_PEER_ID_OFFSET_BYTES_32 12
+#define HTT_TX_DESC_PEER_ID_OFFSET_DWORD_64		\
+	(HTT_TX_DESC_PEER_ID_OFFSET_BYTES_64 >> 2)
+#define HTT_TX_DESC_PEER_ID_OFFSET_DWORD_32		\
+	(HTT_TX_DESC_PEER_ID_OFFSET_BYTES_32 >> 2)
+
+#if HTT_PADDR64
+#define HTT_TX_DESC_PEER_ID_OFFSET_BYTES HTT_TX_DESC_PEER_ID_OFFSET_BYTES_64
+#define HTT_TX_DESC_PEER_ID_OFFSET_DWORD HTT_TX_DESC_PEER_ID_OFFSET_DWORD_64
+#else
+#define HTT_TX_DESC_PEER_ID_OFFSET_BYTES HTT_TX_DESC_PEER_ID_OFFSET_BYTES_32
+#define HTT_TX_DESC_PEER_ID_OFFSET_DWORD HTT_TX_DESC_PEER_ID_OFFSET_DWORD_32
+#endif
+
+#define HTT_TX_DESC_PEER_ID_M 0x0000ffff
+#define HTT_TX_DESC_PEER_ID_S 0
+/*
+ * TEMPORARY:
+ * The original definitions for the PEER_ID fields contained typos
+ * (with _DESC_PADDR appended to this PEER_ID field name).
+ * Retain deprecated original names for PEER_ID fields until all code that
+ * refers to them has been updated.
+ */
+#define HTT_TX_DESC_PEERID_DESC_PADDR_OFFSET_BYTES	\
+	HTT_TX_DESC_PEER_ID_OFFSET_BYTES
+#define HTT_TX_DESC_PEERID_DESC_PADDR_OFFSET_DWORD	\
+	HTT_TX_DESC_PEER_ID_OFFSET_DWORD
+#define HTT_TX_DESC_PEERID_DESC_PADDR_M		\
+	HTT_TX_DESC_PEER_ID_M
+#define HTT_TX_DESC_PEERID_DESC_PADDR_S		\
+	HTT_TX_DESC_PEER_ID_S
+
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_64 16 /* to dword with chan freq */
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_32 12 /* to dword with chan freq */
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD_64		\
+	(HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_64 >> 2)
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD_32		\
+	(HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_32 >> 2)
+
+#if HTT_PADDR64
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_64
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD_64
+#else
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES HTT_TX_DESC_CHAN_FREQ_OFFSET_BYTES_32
+#define HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD HTT_TX_DESC_CHAN_FREQ_OFFSET_DWORD_32
+#endif
+
+#define HTT_TX_DESC_CHAN_FREQ_M 0xffff0000
+#define HTT_TX_DESC_CHAN_FREQ_S 16
+
+#define HTT_TX_DESC_PKT_SUBTYPE_GET(_var)				\
+	(((_var) & HTT_TX_DESC_PKT_SUBTYPE_M) >> HTT_TX_DESC_PKT_SUBTYPE_S)
+#define HTT_TX_DESC_PKT_SUBTYPE_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_PKT_SUBTYPE, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_PKT_SUBTYPE_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_NO_ENCRYPT_GET(_var)				\
+	(((_var) & HTT_TX_DESC_NO_ENCRYPT_M) >> HTT_TX_DESC_NO_ENCRYPT_S)
+#define HTT_TX_DESC_NO_ENCRYPT_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_NO_ENCRYPT, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_NO_ENCRYPT_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_PKT_TYPE_GET(_var)					\
+	(((_var) & HTT_TX_DESC_PKT_TYPE_M) >> HTT_TX_DESC_PKT_TYPE_S)
+#define HTT_TX_DESC_PKT_TYPE_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_PKT_TYPE, _val);  \
+		((_var) |= ((_val) << HTT_TX_DESC_PKT_TYPE_S)); \
+	} while (0)
+
+#define HTT_TX_DESC_VDEV_ID_GET(_var)					\
+	(((_var) & HTT_TX_DESC_VDEV_ID_M) >> HTT_TX_DESC_VDEV_ID_S)
+#define HTT_TX_DESC_VDEV_ID_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_VDEV_ID, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_VDEV_ID_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_EXT_TID_GET(_var)					\
+	(((_var) & HTT_TX_DESC_EXT_TID_M) >> HTT_TX_DESC_EXT_TID_S)
+#define HTT_TX_DESC_EXT_TID_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_EXT_TID, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_EXT_TID_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_POSTPONED_GET(_var)					\
+	(((_var) & HTT_TX_DESC_POSTPONED_M) >> HTT_TX_DESC_POSTPONED_S)
+#define HTT_TX_DESC_POSTPONED_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_POSTPONED, _val);		\
+		((_var) |= ((_val) << HTT_TX_DESC_POSTPONED_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_FRM_LEN_GET(_var)					\
+	(((_var) & HTT_TX_DESC_FRM_LEN_M) >> HTT_TX_DESC_FRM_LEN_S)
+#define HTT_TX_DESC_FRM_LEN_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_FRM_LEN, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_FRM_LEN_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_FRM_ID_GET(_var)					\
+	(((_var) & HTT_TX_DESC_FRM_ID_M) >> HTT_TX_DESC_FRM_ID_S)
+#define HTT_TX_DESC_FRM_ID_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_FRM_ID, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_FRM_ID_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_CKSUM_OFFLOAD_GET(_var)				\
+	(((_var) & HTT_TX_DESC_CKSUM_OFFLOAD_M) >> HTT_TX_DESC_CKSUM_OFFLOAD_S)
+#define HTT_TX_DESC_CKSUM_OFFLOAD_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_CKSUM_OFFLOAD, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_CKSUM_OFFLOAD_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_TX_COMP_GET(_var)					\
+	(((_var) & HTT_TX_DESC_TX_COMP_M) >> HTT_TX_DESC_TX_COMP_S)
+#define HTT_TX_DESC_TX_COMP_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_TX_COMP, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_TX_COMP_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_PEER_ID_GET(_var)					\
+	(((_var) & HTT_TX_DESC_PEER_ID_M) >> HTT_TX_DESC_PEER_ID_S)
+#define HTT_TX_DESC_PEER_ID_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_PEER_ID, _val);	\
+		((_var) |= ((_val) << HTT_TX_DESC_PEER_ID_S));	\
+	} while (0)
+
+#define HTT_TX_DESC_CHAN_FREQ_GET(_var)					\
+	(((_var) & HTT_TX_DESC_CHAN_FREQ_M) >> HTT_TX_DESC_CHAN_FREQ_S)
+#define HTT_TX_DESC_CHAN_FREQ_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_DESC_CHAN_FREQ, _val);		\
+		((_var) |= ((_val) << HTT_TX_DESC_CHAN_FREQ_S));	\
+	} while (0)
+
+
+/* enums used in the HTT tx MSDU extension descriptor */
+enum {
+	htt_tx_guard_interval_regular = 0,
+	htt_tx_guard_interval_short = 1,
+};
+
+enum {
+	htt_tx_preamble_type_ofdm = 0,
+	htt_tx_preamble_type_cck = 1,
+	htt_tx_preamble_type_ht = 2,
+	htt_tx_preamble_type_vht = 3,
+};
+
+enum {
+	htt_tx_bandwidth_5MHz = 0,
+	htt_tx_bandwidth_10MHz = 1,
+	htt_tx_bandwidth_20MHz = 2,
+	htt_tx_bandwidth_40MHz = 3,
+	htt_tx_bandwidth_80MHz = 4,
+	htt_tx_bandwidth_160MHz = 5,	/* includes 80+80 */
+};
+
+/**
+ * @brief HTT tx MSDU extension descriptor
+ * @details
+ *  If the target supports HTT tx MSDU extension descriptors, the host has
+ *  the option of appending the following struct following the regular
+ *  HTT tx MSDU descriptor (and setting the "extension" flag in the regular
+ *  HTT tx MSDU descriptor, to show that the extension descriptor is present).
+ *  The HTT tx MSDU extension descriptors allows the host to provide detailed
+ *  tx specs for each frame.
+ */
+PREPACK struct htt_tx_msdu_desc_ext_t {
+	/* DWORD 0: flags */
+	A_UINT32 valid_pwr:1,/* bit 0:if set, tx pwr spec is valid */
+	valid_mcs_mask:1,/* bit 1:if set, tx MCS mask spec is valid */
+	valid_nss_mask:1,/* bit 2:if set, tx Nss mask spec is valid */
+	valid_guard_interval:1,/* bit 3:if set, tx guard intv spec is valid */
+	valid_preamble_type_mask:1,/* 4:if set, tx preamble mask is valid */
+	valid_chainmask:1,/* bit 5:if set, tx chainmask spec is valid */
+	valid_retries:1,/* bit 6:if set, tx retries spec is valid */
+	valid_bandwidth:1,/* bit 7:if set, tx bandwidth spec is valid */
+	valid_expire_tsf:1,/* bit 8:if set, tx expire TSF spec is valid */
+	is_dsrc:1,	/* bit 9:if set, MSDU is a DSRC frame */
+	reserved0_31_7:22;	/* bits 31:10 - unused, set to 0x0 */
+
+	/* DWORD 1:tx power, tx rate, tx BW */
+	A_UINT32
+	/* pwr -
+	 * Specify what power the tx frame needs to be transmitted at.
+	 * The power a signed (two's complement) value is in units of 0.5 dBm.
+	 * The value needs to be appropriately sign-extended when extracting
+	 * the value from the message and storing it in a variable that is
+	 * larger than A_INT8.  (The HTT_TX_MSDU_EXT_DESC_FLAG_PWR_GET macro
+	 * automatically handles this sign-extension.)
+	 * If the transmission uses multiple tx chains, this power spec is
+	 * the total transmit power, assuming incoherent combination of
+	 * per-chain power to produce the total power.
+	 */
+	pwr:8,
+	/* mcs_mask -
+	 * Specify the allowable values for MCS index (modulation and coding)
+	 * to use for transmitting the frame.
+	 *
+	 * For HT / VHT preamble types, this mask directly corresponds to
+	 * the HT or VHT MCS indices that are allowed.  For each bit N set
+	 * within the mask, MCS index N is allowed for transmitting the frame.
+	 * For legacy CCK and OFDM rates, separate bits are provided for CCK
+	 * rates versus OFDM rates, so the host has the option of specifying
+	 * that the target must transmit the frame with CCK or OFDM rates
+	 * (not HT or VHT), but leaving the decision to the target whether
+	 * to use CCK or OFDM.
+	 *
+	 * For CCK and OFDM, the bits within this mask are interpreted as
+	 * follows:
+	 *     bit  0 -> CCK 1 Mbps rate is allowed
+	 *     bit  1 -> CCK 2 Mbps rate is allowed
+	 *     bit  2 -> CCK 5.5 Mbps rate is allowed
+	 *     bit  3 -> CCK 11 Mbps rate is allowed
+	 *     bit  4 -> OFDM BPSK modulation, 1/2 coding rate is allowed
+	 *     bit  5 -> OFDM BPSK modulation, 3/4 coding rate is allowed
+	 *     bit  6 -> OFDM QPSK modulation, 1/2 coding rate is allowed
+	 *     bit  7 -> OFDM QPSK modulation, 3/4 coding rate is allowed
+	 *     bit  8 -> OFDM 16-QAM modulation, 1/2 coding rate is allowed
+	 *     bit  9 -> OFDM 16-QAM modulation, 3/4 coding rate is allowed
+	 *     bit 10 -> OFDM 64-QAM modulation, 2/3 coding rate is allowed
+	 *     bit 11 -> OFDM 64-QAM modulation, 3/4 coding rate is allowed
+	 *
+	 * The MCS index specification needs to be compatible with the
+	 * bandwidth mask specification.  For example, a MCS index == 9
+	 * specification is inconsistent with a preamble type == VHT,
+	 * Nss == 1, and channel bandwidth == 20 MHz.
+	 *
+	 * Furthermore, the host has only a limited ability to specify to
+	 * the target to select from HT + legacy rates, or VHT + legacy rates,
+	 * since this mcs_mask can specify either HT/VHT rates or legacy rates.
+	 */
+	mcs_mask:12,
+	/* nss_mask -
+	 * Specify which numbers of spatial streams (MIMO factor) are permitted.
+	 * Each bit in this mask corresponds to a Nss value:
+	 *     bit 0: if set, Nss = 1 (non-MIMO) is permitted
+	 *     bit 1: if set, Nss = 2 (2x2 MIMO) is permitted
+	 *     bit 2: if set, Nss = 3 (3x3 MIMO) is permitted
+	 *     bit 3: if set, Nss = 4 (4x4 MIMO) is permitted
+	 * The values in the Nss mask must be suitable for the recipient, e.g.
+	 * a value of 0x4 (Nss = 3) cannot be specified for a tx frame to a
+	 * recipient which only supports 2x2 MIMO.
+	 */
+	nss_mask:4,
+	/* guard_interval -
+	 * Specify a htt_tx_guard_interval enum value to indicate whether
+	 * the transmission should use a regular guard interval or a
+	 * short guard interval.
+	 */
+	guard_interval:1,
+	/* preamble_type_mask -
+	 * Specify which preamble types (CCK, OFDM, HT, VHT) the target
+	 * may choose from for transmitting this frame.
+	 * The bits in this mask correspond to the values in the
+	 * htt_tx_preamble_type enum.  For example, to allow the target
+	 * to transmit the frame as either CCK or OFDM, this field would
+	 * be set to
+	 *     (1 << htt_tx_preamble_type_ofdm) |
+	 *     (1 << htt_tx_preamble_type_cck)
+	 */
+	preamble_type_mask:4,
+
+	reserved1_31_29:3;	/* unused, set to 0x0 */
+
+	/* DWORD 2: tx chain mask, tx retries */
+	A_UINT32
+	/* chain_mask - specify which chains to transmit from */
+	chain_mask:4,
+	/* retry_limit -
+	 * Specify the maximum number of transmissions, including the
+	 * initial transmission, to attempt before giving up if no ack
+	 * is received.
+	 * If the tx rate is specified, then all retries shall use the
+	 * same rate as the initial transmission.
+	 * If no tx rate is specified, the target can choose whether to
+	 * retain the original rate during the retransmissions, or to
+	 * fall back to a more robust rate.
+	 */
+	retry_limit:4,
+	/* bandwidth_mask -
+	 * Specify what channel widths may be used for the transmission.
+	 * A value of zero indicates "don't care" - the target may choose
+	 * the transmission bandwidth.
+	 * The bits within this mask correspond to the htt_tx_bandwidth
+	 * enum values - bit 0 is for 5 MHz, bit 1 is for 10 MHz, etc.
+	 * The bandwidth_mask must be consistent with the
+	 * preamble_type_mask * and mcs_mask specs, if they are
+	 * provided.  For example,
+	 * 80 MHz and 160 MHz can only be enabled in the mask
+	 * if preamble_type == VHT.
+	 */
+	bandwidth_mask:6,
+
+	reserved2_31_14:18;	/* unused, set to 0x0 */
+
+	/* DWORD 3: tx expiry time (TSF) LSBs */
+	A_UINT32 expire_tsf_lo;
+
+	/* DWORD 4: tx expiry time (TSF) MSBs */
+	A_UINT32 expire_tsf_hi;
+
+	A_UINT32 reserved_for_future_expansion_set_to_zero[3];
+} POSTPACK;
+
+/* DWORD 0 */
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_M                0x00000001
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_S                0
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_M           0x00000002
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_S           1
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_NSS_MASK_M           0x00000004
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_NSS_MASK_S           2
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_M     0x00000008
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_S     3
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_M 0x00000010
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_S 4
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_M         0x00000020
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_S         5
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_M            0x00000040
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_S            6
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_M          0x00000080
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_S          7
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_M        0x00000100
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_S        8
+#define HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_M                  0x00000200
+#define HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_S                  9
+
+/* DWORD 1 */
+#define HTT_TX_MSDU_EXT_DESC_PWR_M                           0x000000ff
+#define HTT_TX_MSDU_EXT_DESC_PWR_S                           0
+#define HTT_TX_MSDU_EXT_DESC_MCS_MASK_M                      0x000fff00
+#define HTT_TX_MSDU_EXT_DESC_MCS_MASK_S                      8
+#define HTT_TX_MSDU_EXT_DESC_NSS_MASK_M                      0x00f00000
+#define HTT_TX_MSDU_EXT_DESC_NSS_MASK_S                      20
+#define HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_M                0x01000000
+#define HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_S                24
+#define HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_M            0x1c000000
+#define HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_S            25
+
+/* DWORD 2 */
+#define HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_M                    0x0000000f
+#define HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_S                    0
+#define HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_M                   0x000000f0
+#define HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_S                   4
+#define HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_M                0x00003f00
+#define HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_S                8
+
+
+/* DWORD 0 */
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR, _val); \
+	((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PWR_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK, _val); \
+	((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_VALID_MCS_MASK_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL( \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL, _val); \
+	((_var) |= ((_val) \
+	<< HTT_TX_MSDU_EXT_DESC_FLAG_VALID_GUARD_INTERVAL_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_M) >>\
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL( \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK, _val); \
+	((_var) |= ((_val) \
+	<< HTT_TX_MSDU_EXT_DESC_FLAG_VALID_PREAMBLE_TYPE_MASK_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK, _val); \
+	((_var) |= ((_val) <<		\
+		HTT_TX_MSDU_EXT_DESC_FLAG_VALID_CHAIN_MASK_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES, _val); \
+	((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_VALID_RETRIES_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH, _val); \
+	((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_VALID_BANDWIDTH_S)); \
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_GET(_var) \
+	(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_M) >> \
+	HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_SET(_var, _val) \
+do { \
+	HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME, _val); \
+	((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_VALID_EXPIRE_TIME_S));\
+} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_M) >> \
+		HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_S)
+#define HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_SET(_var, _val) \
+do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_FLAG_IS_DSRC_S)); \
+} while (0)
+
+
+/* DWORD 1 */
+#define HTT_TX_MSDU_EXT_DESC_PWR_GET_BASE(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_PWR_M) >> \
+		HTT_TX_MSDU_EXT_DESC_PWR_S)
+#define HTT_TX_MSDU_EXT_DESC_PWR_GET(_var) \
+		(HTT_TX_MSDU_EXT_DESC_PWR_GET_BASE(_var)  | \
+		HTT_SIGN_BIT_EXTENSION_MASK(_var, HTT_TX_MSDU_EXT_DESC_PWR))
+#define HTT_TX_MSDU_EXT_DESC_PWR_SET(_var, _val) \
+		((_var) |= (((_val) << HTT_TX_MSDU_EXT_DESC_PWR_S)) & \
+		HTT_TX_MSDU_EXT_DESC_PWR_M)
+
+#define HTT_TX_MSDU_EXT_DESC_MCS_MASK_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_MCS_MASK_M) >> \
+		HTT_TX_MSDU_EXT_DESC_MCS_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_MCS_MASK_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_MCS_MASK, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_MCS_MASK_S)); \
+	} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_NSS_MASK_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_NSS_MASK_M) >> \
+		HTT_TX_MSDU_EXT_DESC_NSS_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_NSS_MASK_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_NSS_MASK, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_NSS_MASK_S)); \
+	} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_M) >> \
+		HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_S)
+#define HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_GUARD_INTERVAL_S)); \
+	} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_M) >> \
+		HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK,\
+				_val);				\
+		((_var) |= ((_val) <<		\
+				HTT_TX_MSDU_EXT_DESC_PREAMBLE_TYPE_MASK_S)); \
+	} while (0)
+
+
+/* DWORD 2 */
+#define HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_M) >> \
+		HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_CHAIN_MASK, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_CHAIN_MASK_S)); \
+	} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_M) >> \
+		HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_S)
+#define HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_RETRY_LIMIT_S)); \
+	} while (0)
+
+#define HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_GET(_var) \
+		(((_var) & HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_M) >> \
+		HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_S)
+#define HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_SET(_var, _val) \
+	do { \
+		HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK, _val); \
+		((_var) |= ((_val) << HTT_TX_MSDU_EXT_DESC_BANDWIDTH_MASK_S)); \
+	} while (0)
+
+
+/**
+ * @brief MAC DMA rx ring setup specification
+ * @details
+ *  To allow for dynamic rx ring reconfiguration and to avoid race
+ *  conditions, the host SW never directly programs the MAC DMA rx ring(s)
+ *  it uses.  Instead, it sends this message to the target, indicating how
+ *  the rx ring used by the host should be set up and maintained.
+ *  The message consists of a 4-octet header followed by 1 or 2 rx ring setup
+ *  specifications.
+ *
+ *            |31                           16|15            8|7             0|
+ *            |---------------------------------------------------------------|
+ * header:    |            reserved           |   num rings   |    msg type   |
+ *            |---------------------------------------------------------------|
+ * payload 1: |       FW_IDX shadow register physical address (bits 31:0)     |
+ #if HTT_PADDR64
+ *            |       FW_IDX shadow register physical address (bits 63:32)    |
+ #endif
+ *            |---------------------------------------------------------------|
+ *            |                 rx ring base physical address (bits 31:0)     |
+ #if HTT_PADDR64
+ *            |                 rx ring base physical address (bits 63:32)    |
+ #endif
+ *            |---------------------------------------------------------------|
+ *            |      rx ring buffer size      |        rx ring length         |
+ *            |---------------------------------------------------------------|
+ *            |      FW_IDX initial value     |         enabled flags         |
+ *            |---------------------------------------------------------------|
+ *            |      MSDU payload offset      |     802.11 header offset      |
+ *            |---------------------------------------------------------------|
+ *            |        PPDU end offset        |       PPDU start offset       |
+ *            |---------------------------------------------------------------|
+ *            |        MPDU end offset        |       MPDU start offset       |
+ *            |---------------------------------------------------------------|
+ *            |        MSDU end offset        |       MSDU start offset       |
+ *            |---------------------------------------------------------------|
+ *            |        frag info offset       |      rx attention offset      |
+ *            |---------------------------------------------------------------|
+ * payload 2, if present, has the same format as payload 1
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx ring configuration message
+ *     Value: 0x2
+ *   - NUM_RINGS
+ *     Bits 15:8
+ *     Purpose: indicates whether the host is setting up one rx ring or two
+ *     Value: 1 or 2
+ * Payload:
+ *     for systems using 64-bit format for bus addresses:
+ *       - IDX_SHADOW_REG_PADDR_LO
+ *         Bits 31:0
+ *         Value: lower 4 bytes of physical address of the host's
+ *                FW_IDX shadow register
+ *       - IDX_SHADOW_REG_PADDR_HI
+ *         Bits 31:0
+ *         Value: upper 4 bytes of physical address of the host's
+ *                FW_IDX shadow register
+ *       - RING_BASE_PADDR_LO
+ *         Bits 31:0
+ *         Value: lower 4 bytes of physical address of the host's rx ring
+ *       - RING_BASE_PADDR_HI
+ *         Bits 31:0
+ *         Value: uppper 4 bytes of physical address of the host's rx ring
+ *     for systems using 32-bit format for bus addresses:
+ *       - IDX_SHADOW_REG_PADDR
+ *         Bits 31:0
+ *         Value: physical address of the host's FW_IDX shadow register
+ *       - RING_BASE_PADDR
+ *         Bits 31:0
+ *         Value: physical address of the host's rx ring
+ *   - RING_LEN
+ *     Bits 15:0
+ *     Value: number of elements in the rx ring
+ *   - RING_BUF_SZ
+ *     Bits 31:16
+ *     Value: size of the buffers referenced by the rx ring, in byte units
+ *   - ENABLED_FLAGS
+ *     Bits 15:0
+ *     Value: 1-bit flags to show whether different rx fields are enabled
+ *         bit  0: 802.11 header enabled (1) or disabled (0)
+ *         bit  1: MSDU payload  enabled (1) or disabled (0)
+ *         bit  2: PPDU start    enabled (1) or disabled (0)
+ *         bit  3: PPDU end      enabled (1) or disabled (0)
+ *         bit  4: MPDU start    enabled (1) or disabled (0)
+ *         bit  5: MPDU end      enabled (1) or disabled (0)
+ *         bit  6: MSDU start    enabled (1) or disabled (0)
+ *         bit  7: MSDU end      enabled (1) or disabled (0)
+ *         bit  8: rx attention  enabled (1) or disabled (0)
+ *         bit  9: frag info     enabled (1) or disabled (0)
+ *         bit 10: unicast rx    enabled (1) or disabled (0)
+ *         bit 11: multicast rx  enabled (1) or disabled (0)
+ *         bit 12: ctrl rx       enabled (1) or disabled (0)
+ *         bit 13: mgmt rx       enabled (1) or disabled (0)
+ *         bit 14: null rx       enabled (1) or disabled (0)
+ *         bit 15: phy data rx   enabled (1) or disabled (0)
+ *   - IDX_INIT_VAL
+ *     Bits 31:16
+ *     Purpose: Specify the initial value for the FW_IDX.
+ *     Value: the number of buffers initially present in the host's rx ring
+ *   - OFFSET_802_11_HDR
+ *     Bits 15:0
+ *     Value: offset in QUAD-bytes of 802.11 header from the buffer start
+ *   - OFFSET_MSDU_PAYLOAD
+ *     Bits 31:16
+ *     Value: offset in QUAD-bytes of MSDU payload from the buffer start
+ *   - OFFSET_PPDU_START
+ *     Bits 15:0
+ *     Value: offset in QUAD-bytes of PPDU start rx desc from the buffer start
+ *   - OFFSET_PPDU_END
+ *     Bits 31:16
+ *     Value: offset in QUAD-bytes of PPDU end rx desc from the buffer start
+ *   - OFFSET_MPDU_START
+ *     Bits 15:0
+ *     Value: offset in QUAD-bytes of MPDU start rx desc from the buffer start
+ *   - OFFSET_MPDU_END
+ *     Bits 31:16
+ *     Value: offset in QUAD-bytes of MPDU end rx desc from the buffer start
+ *   - OFFSET_MSDU_START
+ *     Bits 15:0
+ *     Value: offset in QUAD-bytes of MSDU start rx desc from the buffer start
+ *   - OFFSET_MSDU_END
+ *     Bits 31:16
+ *     Value: offset in QUAD-bytes of MSDU end rx desc from the buffer start
+ *   - OFFSET_RX_ATTN
+ *     Bits 15:0
+ *     Value: offset in QUAD-bytes of rx attention word from the buffer start
+ *   - OFFSET_FRAG_INFO
+ *     Bits 31:16
+ *     Value: offset in QUAD-bytes of frag info table
+ */
+/* header fields */
+#define HTT_RX_RING_CFG_NUM_RINGS_M      0xff00
+#define HTT_RX_RING_CFG_NUM_RINGS_S      8
+
+/* payload fields */
+/* for systems using a 64-bit format for bus addresses */
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_HI_M 0xffffffff
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_HI_S 0
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_LO_M 0xffffffff
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_LO_S 0
+#define HTT_RX_RING_CFG_BASE_PADDR_HI_M           0xffffffff
+#define HTT_RX_RING_CFG_BASE_PADDR_HI_S           0
+#define HTT_RX_RING_CFG_BASE_PADDR_LO_M           0xffffffff
+#define HTT_RX_RING_CFG_BASE_PADDR_LO_S           0
+
+/* for systems using a 32-bit format for bus addresses */
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_M    0xffffffff
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_S    0
+#define HTT_RX_RING_CFG_BASE_PADDR_M              0xffffffff
+#define HTT_RX_RING_CFG_BASE_PADDR_S              0
+
+#define HTT_RX_RING_CFG_LEN_M             0xffff
+#define HTT_RX_RING_CFG_LEN_S             0
+#define HTT_RX_RING_CFG_BUF_SZ_M          0xffff0000
+#define HTT_RX_RING_CFG_BUF_SZ_S          16
+#define HTT_RX_RING_CFG_ENABLED_802_11_HDR_M   0x1
+#define HTT_RX_RING_CFG_ENABLED_802_11_HDR_S   0
+#define HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_M   0x2
+#define HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_S   1
+#define HTT_RX_RING_CFG_ENABLED_PPDU_START_M   0x4
+#define HTT_RX_RING_CFG_ENABLED_PPDU_START_S   2
+#define HTT_RX_RING_CFG_ENABLED_PPDU_END_M     0x8
+#define HTT_RX_RING_CFG_ENABLED_PPDU_END_S     3
+#define HTT_RX_RING_CFG_ENABLED_MPDU_START_M   0x10
+#define HTT_RX_RING_CFG_ENABLED_MPDU_START_S   4
+#define HTT_RX_RING_CFG_ENABLED_MPDU_END_M     0x20
+#define HTT_RX_RING_CFG_ENABLED_MPDU_END_S     5
+#define HTT_RX_RING_CFG_ENABLED_MSDU_START_M   0x40
+#define HTT_RX_RING_CFG_ENABLED_MSDU_START_S   6
+#define HTT_RX_RING_CFG_ENABLED_MSDU_END_M     0x80
+#define HTT_RX_RING_CFG_ENABLED_MSDU_END_S     7
+#define HTT_RX_RING_CFG_ENABLED_RX_ATTN_M      0x100
+#define HTT_RX_RING_CFG_ENABLED_RX_ATTN_S      8
+#define HTT_RX_RING_CFG_ENABLED_FRAG_INFO_M    0x200
+#define HTT_RX_RING_CFG_ENABLED_FRAG_INFO_S    9
+#define HTT_RX_RING_CFG_ENABLED_UCAST_M        0x400
+#define HTT_RX_RING_CFG_ENABLED_UCAST_S        10
+#define HTT_RX_RING_CFG_ENABLED_MCAST_M        0x800
+#define HTT_RX_RING_CFG_ENABLED_MCAST_S        11
+#define HTT_RX_RING_CFG_ENABLED_CTRL_M         0x1000
+#define HTT_RX_RING_CFG_ENABLED_CTRL_S         12
+#define HTT_RX_RING_CFG_ENABLED_MGMT_M         0x2000
+#define HTT_RX_RING_CFG_ENABLED_MGMT_S         13
+#define HTT_RX_RING_CFG_ENABLED_NULL_M         0x4000
+#define HTT_RX_RING_CFG_ENABLED_NULL_S         14
+#define HTT_RX_RING_CFG_ENABLED_PHY_M          0x8000
+#define HTT_RX_RING_CFG_ENABLED_PHY_S          15
+#define HTT_RX_RING_CFG_IDX_INIT_VAL_M         0xffff0000
+#define HTT_RX_RING_CFG_IDX_INIT_VAL_S         16
+#define HTT_RX_RING_CFG_OFFSET_802_11_HDR_M    0xffff
+#define HTT_RX_RING_CFG_OFFSET_802_11_HDR_S    0
+#define HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_M    0xffff0000
+#define HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_S    16
+#define HTT_RX_RING_CFG_OFFSET_PPDU_START_M    0xffff
+#define HTT_RX_RING_CFG_OFFSET_PPDU_START_S    0
+#define HTT_RX_RING_CFG_OFFSET_PPDU_END_M      0xffff0000
+#define HTT_RX_RING_CFG_OFFSET_PPDU_END_S      16
+#define HTT_RX_RING_CFG_OFFSET_MPDU_START_M    0xffff
+#define HTT_RX_RING_CFG_OFFSET_MPDU_START_S    0
+#define HTT_RX_RING_CFG_OFFSET_MPDU_END_M      0xffff0000
+#define HTT_RX_RING_CFG_OFFSET_MPDU_END_S      16
+#define HTT_RX_RING_CFG_OFFSET_MSDU_START_M    0xffff
+#define HTT_RX_RING_CFG_OFFSET_MSDU_START_S    0
+#define HTT_RX_RING_CFG_OFFSET_MSDU_END_M      0xffff0000
+#define HTT_RX_RING_CFG_OFFSET_MSDU_END_S      16
+#define HTT_RX_RING_CFG_OFFSET_RX_ATTN_M       0xffff
+#define HTT_RX_RING_CFG_OFFSET_RX_ATTN_S       0
+#define HTT_RX_RING_CFG_OFFSET_FRAG_INFO_M     0xffff0000
+#define HTT_RX_RING_CFG_OFFSET_FRAG_INFO_S     16
+
+#define HTT_RX_RING_CFG_HDR_BYTES 4
+#define HTT_RX_RING_CFG_PAYLD_BYTES_64 44
+#define HTT_RX_RING_CFG_PAYLD_BYTES_32 36
+#if HTT_PADDR64
+#define HTT_RX_RING_CFG_PAYLD_BYTES HTT_RX_RING_CFG_PAYLD_BYTES_64
+#else
+#define HTT_RX_RING_CFG_PAYLD_BYTES HTT_RX_RING_CFG_PAYLD_BYTES_32
+#endif
+#define HTT_RX_RING_CFG_BYTES(num_rings)				\
+	(HTT_RX_RING_CFG_HDR_BYTES + (num_rings) * HTT_RX_RING_CFG_PAYLD_BYTES)
+
+
+#define HTT_RX_RING_CFG_NUM_RINGS_GET(_var)				\
+	(((_var) & HTT_RX_RING_CFG_NUM_RINGS_M) >> HTT_RX_RING_CFG_NUM_RINGS_S)
+#define HTT_RX_RING_CFG_NUM_RINGS_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_NUM_RINGS, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_NUM_RINGS_S));	\
+	} while (0)
+
+/* degenerate case for 32-bit fields */
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_HI_GET(_var) (_var)
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_HI_SET(_var, _val)		\
+		((_var) = (_val))
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_LO_GET(_var) (_var)
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_LO_SET(_var, _val)		\
+		((_var) = (_val))
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_GET(_var) (_var)
+#define HTT_RX_RING_CFG_IDX_SHADOW_REG_PADDR_SET(_var, _val)		\
+		((_var) = (_val))
+
+/* degenerate case for 32-bit fields */
+#define HTT_RX_RING_CFG_BASE_PADDR_HI_GET(_var) (_var)
+#define HTT_RX_RING_CFG_BASE_PADDR_HI_SET(_var, _val) ((_var) = (_val))
+#define HTT_RX_RING_CFG_BASE_PADDR_LO_GET(_var) (_var)
+#define HTT_RX_RING_CFG_BASE_PADDR_LO_SET(_var, _val) ((_var) = (_val))
+#define HTT_RX_RING_CFG_BASE_PADDR_GET(_var) (_var)
+#define HTT_RX_RING_CFG_BASE_PADDR_SET(_var, _val) ((_var) = (_val))
+
+#define HTT_RX_RING_CFG_LEN_GET(_var)					\
+	(((_var) & HTT_RX_RING_CFG_LEN_M) >> HTT_RX_RING_CFG_LEN_S)
+#define HTT_RX_RING_CFG_LEN_SET(_var, _val)			\
+	do {                                                    \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_LEN, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_LEN_S));	\
+	} while (0)
+
+#define HTT_RX_RING_CFG_BUF_SZ_GET(_var)				\
+	(((_var) & HTT_RX_RING_CFG_BUF_SZ_M) >> HTT_RX_RING_CFG_BUF_SZ_S)
+#define HTT_RX_RING_CFG_BUF_SZ_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_BUF_SZ, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_BUF_SZ_S));	\
+	} while (0)
+
+#define HTT_RX_RING_CFG_IDX_INIT_VAL_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_IDX_INIT_VAL_M) >>	\
+	 HTT_RX_RING_CFG_IDX_INIT_VAL_S)
+#define HTT_RX_RING_CFG_IDX_INIT_VAL_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_IDX_INIT_VAL, _val);  \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_IDX_INIT_VAL_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_802_11_HDR_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_802_11_HDR_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_802_11_HDR_S)
+#define HTT_RX_RING_CFG_ENABLED_802_11_HDR_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_802_11_HDR, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_802_11_HDR_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_S)
+#define HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MSDU_PAYLD_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_PPDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_PPDU_START_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_PPDU_START_S)
+#define HTT_RX_RING_CFG_ENABLED_PPDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_PPDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_PPDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_PPDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_PPDU_END_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_PPDU_END_S)
+#define HTT_RX_RING_CFG_ENABLED_PPDU_END_SET(_var, _val)		\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_PPDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_PPDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MPDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MPDU_START_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MPDU_START_S)
+#define HTT_RX_RING_CFG_ENABLED_MPDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MPDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MPDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MPDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MPDU_END_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MPDU_END_S)
+#define HTT_RX_RING_CFG_ENABLED_MPDU_END_SET(_var, _val)		\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MPDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MPDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MSDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MSDU_START_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MSDU_START_S)
+#define HTT_RX_RING_CFG_ENABLED_MSDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MSDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MSDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MSDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MSDU_END_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MSDU_END_S)
+#define HTT_RX_RING_CFG_ENABLED_MSDU_END_SET(_var, _val)		\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MSDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MSDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_RX_ATTN_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_RX_ATTN_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_RX_ATTN_S)
+#define HTT_RX_RING_CFG_ENABLED_RX_ATTN_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_RX_ATTN, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_RX_ATTN_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_FRAG_INFO_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_FRAG_INFO_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_FRAG_INFO_S)
+#define HTT_RX_RING_CFG_ENABLED_FRAG_INFO_SET(_var, _val)		\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_FRAG_INFO, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_FRAG_INFO_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_UCAST_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_UCAST_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_UCAST_S)
+#define HTT_RX_RING_CFG_ENABLED_UCAST_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_UCAST, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_UCAST_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_ENABLED_MCAST_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MCAST_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MCAST_S)
+#define HTT_RX_RING_CFG_ENABLED_MCAST_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MCAST, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MCAST_S)); \
+	} while (0)
+#define HTT_RX_RING_CFG_ENABLED_CTRL_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_CTRL_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_CTRL_S)
+#define HTT_RX_RING_CFG_ENABLED_CTRL_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_CTRL, _val);  \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_CTRL_S)); \
+	} while (0)
+#define HTT_RX_RING_CFG_ENABLED_MGMT_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_MGMT_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_MGMT_S)
+#define HTT_RX_RING_CFG_ENABLED_MGMT_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_MGMT, _val);  \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_MGMT_S)); \
+	} while (0)
+#define HTT_RX_RING_CFG_ENABLED_NULL_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_NULL_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_NULL_S)
+#define HTT_RX_RING_CFG_ENABLED_NULL_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_NULL, _val);  \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_NULL_S)); \
+	} while (0)
+#define HTT_RX_RING_CFG_ENABLED_PHY_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_ENABLED_PHY_M) >>	\
+	 HTT_RX_RING_CFG_ENABLED_PHY_S)
+#define HTT_RX_RING_CFG_ENABLED_PHY_SET(_var, _val)			\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_ENABLED_PHY, _val);	\
+		((_var) |= ((_val) << HTT_RX_RING_CFG_ENABLED_PHY_S));	\
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_802_11_HDR_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_802_11_HDR_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_802_11_HDR_S)
+#define HTT_RX_RING_CFG_OFFSET_802_11_HDR_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_802_11_HDR, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_802_11_HDR_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_S)
+#define HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_MSDU_PAYLD_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_PPDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_PPDU_START_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_PPDU_START_S)
+#define HTT_RX_RING_CFG_OFFSET_PPDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_PPDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_PPDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_PPDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_PPDU_END_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_PPDU_END_S)
+#define HTT_RX_RING_CFG_OFFSET_PPDU_END_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_PPDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_PPDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_MPDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_MPDU_START_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_MPDU_START_S)
+#define HTT_RX_RING_CFG_OFFSET_MPDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_MPDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_MPDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_MPDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_MPDU_END_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_MPDU_END_S)
+#define HTT_RX_RING_CFG_OFFSET_MPDU_END_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_MPDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_MPDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_MSDU_START_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_MSDU_START_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_MSDU_START_S)
+#define HTT_RX_RING_CFG_OFFSET_MSDU_START_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_MSDU_START, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_MSDU_START_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_MSDU_END_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_MSDU_END_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_MSDU_END_S)
+#define HTT_RX_RING_CFG_OFFSET_MSDU_END_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_MSDU_END, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_MSDU_END_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_RX_ATTN_GET(_var)	\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_RX_ATTN_M) >> \
+	 HTT_RX_RING_CFG_OFFSET_RX_ATTN_S)
+#define HTT_RX_RING_CFG_OFFSET_RX_ATTN_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_RX_ATTN, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_RX_ATTN_S)); \
+	} while (0)
+
+#define HTT_RX_RING_CFG_OFFSET_FRAG_INFO_GET(_var)		\
+	(((_var) & HTT_RX_RING_CFG_OFFSET_FRAG_INFO_M) >>	\
+	 HTT_RX_RING_CFG_OFFSET_FRAG_INFO_S)
+#define HTT_RX_RING_CFG_OFFSET_FRAG_INFO_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_RING_CFG_OFFSET_FRAG_INFO, _val); \
+		((_var) |= ((_val) << HTT_RX_RING_CFG_OFFSET_FRAG_INFO_S)); \
+	} while (0)
+
+/**
+ * @brief host -> target FW statistics retrieve
+ *
+ * @details
+ * The following field definitions describe the format of the HTT host
+ * to target FW stats retrieve message. The message specifies the type of
+ * stats host wants to retrieve.
+ *
+ * |31          24|23          16|15           8|7            0|
+ * |-----------------------------------------------------------|
+ * |        stats types request bitmask         |   msg type   |
+ * |-----------------------------------------------------------|
+ * |         stats types reset bitmask          |   reserved   |
+ * |-----------------------------------------------------------|
+ * |  stats type  |               config value                 |
+ * |-----------------------------------------------------------|
+ * |                        cookie LSBs                        |
+ * |-----------------------------------------------------------|
+ * |                        cookie MSBs                        |
+ * |-----------------------------------------------------------|
+ * Header fields:
+ *  - MSG_TYPE
+ *    Bits 7:0
+ *    Purpose: identifies this is a stats upload request message
+ *    Value: 0x3
+ *  - UPLOAD_TYPES
+ *    Bits 31:8
+ *    Purpose: identifies which types of FW statistics to upload
+ *    Value: mask with bits set in positions defined by htt_dbg_stats_type
+ *  - RESET_TYPES
+ *    Bits 31:8
+ *    Purpose: identifies which types of FW statistics to reset
+ *    Value: mask with bits set in positions defined by htt_dbg_stats_type
+ *  - CFG_VAL
+ *    Bits 23:0
+ *    Purpose: give an opaque configuration value to the specified stats type
+ *    Value: stats-type specific configuration value
+ *        if stats type == tx PPDU log, then CONFIG_VAL has the format:
+ *            bits  7:0  - how many per-MPDU byte counts to include in a record
+ *            bits 15:8  - how many per-MPDU MSDU counts to include in a record
+ *            bits 23:16 - how many per-MSDU byte counts to include in a record
+ *  - CFG_STAT_TYPE
+ *    Bits 31:24
+ *    Purpose: specify which stats type (if any) the config value applies to
+ *    Value: htt_dbg_stats_type value, or 0xff if the message doesn't have
+ *        a valid configuration specification
+ *  - COOKIE_LSBS
+ *    Bits 31:0
+ *    Purpose: Provide a mechanism to match a target->host stats confirmation
+ *        message with its preceding host->target stats request message.
+ *    Value: LSBs of the opaque cookie specified by the host-side requestor
+ *  - COOKIE_MSBS
+ *    Bits 31:0
+ *    Purpose: Provide a mechanism to match a target->host stats confirmation
+ *        message with its preceding host->target stats request message.
+ *    Value: MSBs of the opaque cookie specified by the host-side requestor
+ */
+
+#define HTT_H2T_STATS_REQ_MSG_SZ                    20	/* bytes */
+
+#define HTT_H2T_STATS_REQ_CFG_STAT_TYPE_INVALID     0xff
+
+#define HTT_H2T_STATS_REQ_UPLOAD_TYPES_M            0xffffff00
+#define HTT_H2T_STATS_REQ_UPLOAD_TYPES_S            8
+
+#define HTT_H2T_STATS_REQ_RESET_TYPES_M             0xffffff00
+#define HTT_H2T_STATS_REQ_RESET_TYPES_S             8
+
+#define HTT_H2T_STATS_REQ_CFG_VAL_M                 0x00ffffff
+#define HTT_H2T_STATS_REQ_CFG_VAL_S                 0
+
+#define HTT_H2T_STATS_REQ_CFG_STAT_TYPE_M           0xff000000
+#define HTT_H2T_STATS_REQ_CFG_STAT_TYPE_S           24
+
+#define HTT_H2T_STATS_REQ_UPLOAD_TYPES_GET(_var)	\
+	(((_var) & HTT_H2T_STATS_REQ_UPLOAD_TYPES_M) >>	\
+	 HTT_H2T_STATS_REQ_UPLOAD_TYPES_S)
+#define HTT_H2T_STATS_REQ_UPLOAD_TYPES_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_STATS_REQ_UPLOAD_TYPES, _val); \
+		((_var) |= ((_val) << HTT_H2T_STATS_REQ_UPLOAD_TYPES_S)); \
+	} while (0)
+
+#define HTT_H2T_STATS_REQ_RESET_TYPES_GET(_var)		\
+	(((_var) & HTT_H2T_STATS_REQ_RESET_TYPES_M) >>  \
+	 HTT_H2T_STATS_REQ_RESET_TYPES_S)
+#define HTT_H2T_STATS_REQ_RESET_TYPES_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_STATS_REQ_RESET_TYPES, _val);	\
+		((_var) |= ((_val) << HTT_H2T_STATS_REQ_RESET_TYPES_S)); \
+	} while (0)
+
+#define HTT_H2T_STATS_REQ_CFG_VAL_GET(_var)		\
+	(((_var) & HTT_H2T_STATS_REQ_CFG_VAL_M) >>	\
+	 HTT_H2T_STATS_REQ_CFG_VAL_S)
+#define HTT_H2T_STATS_REQ_CFG_VAL_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_STATS_REQ_CFG_VAL, _val);	\
+		((_var) |= ((_val) << HTT_H2T_STATS_REQ_CFG_VAL_S));	\
+	} while (0)
+
+#define HTT_H2T_STATS_REQ_CFG_STAT_TYPE_GET(_var)		\
+	(((_var) & HTT_H2T_STATS_REQ_CFG_STAT_TYPE_M) >>	\
+	 HTT_H2T_STATS_REQ_CFG_STAT_TYPE_S)
+#define HTT_H2T_STATS_REQ_CFG_STAT_TYPE_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_STATS_REQ_CFG_STAT_TYPE, _val); \
+		((_var) |= ((_val) << HTT_H2T_STATS_REQ_CFG_STAT_TYPE_S)); \
+	} while (0)
+
+/**
+ * @brief host -> target HTT out-of-band sync request
+ *
+ * @details
+ *  The HTT SYNC tells the target to suspend processing of subsequent
+ *  HTT host-to-target messages until some other target agent locally
+ *  informs the target HTT FW that the current sync counter is equal to
+ *  or greater than (in a modulo sense) the sync counter specified in
+ *  the SYNC message.
+ *  This allows other host-target components to synchronize their operation
+ *  with HTT, e.g. to ensure that tx frames don't get transmitted until a
+ *  security key has been downloaded to and activated by the target.
+ *  In the absence of any explicit synchronization counter value
+ *  specification, the target HTT FW will use zero as the default current
+ *  sync value.
+ *
+ * |31          24|23          16|15           8|7            0|
+ * |-----------------------------------------------------------|
+ * |          reserved           |  sync count  |   msg type   |
+ * |-----------------------------------------------------------|
+ * Header fields:
+ *  - MSG_TYPE
+ *    Bits 7:0
+ *    Purpose: identifies this as a sync message
+ *    Value: 0x4
+ *  - SYNC_COUNT
+ *    Bits 15:8
+ *    Purpose: specifies what sync value the HTT FW will wait for from
+ *        an out-of-band specification to resume its operation
+ *    Value: in-band sync counter value to compare against the out-of-band
+ *        counter spec.
+ *        The HTT target FW will suspend its host->target message processing
+ *        as long as
+ *        0 < (in-band sync counter - out-of-band sync counter) & 0xff < 128
+ */
+
+#define HTT_H2T_SYNC_MSG_SZ                 4
+
+#define HTT_H2T_SYNC_COUNT_M                0x0000ff00
+#define HTT_H2T_SYNC_COUNT_S                8
+
+#define HTT_H2T_SYNC_COUNT_GET(_var)		\
+	(((_var) & HTT_H2T_SYNC_COUNT_M) >>     \
+	 HTT_H2T_SYNC_COUNT_S)
+#define HTT_H2T_SYNC_COUNT_SET(_var, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_H2T_SYNC_COUNT, _val);	\
+		((_var) |= ((_val) << HTT_H2T_SYNC_COUNT_S));	\
+	} while (0)
+
+
+/**
+ * @brief HTT aggregation configuration
+ */
+#define HTT_AGGR_CFG_MSG_SZ                     4
+
+#define HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_M     0xff00
+#define HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_S     8
+#define HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_M     0x1f0000
+#define HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_S     16
+
+#define HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_GET(_var)		\
+	(((_var) & HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_M) >>	\
+	 HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_S)
+#define HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM, _val); \
+		((_var) |= ((_val) << HTT_AGGR_CFG_MAX_NUM_AMPDU_SUBFRM_S)); \
+	} while (0)
+
+#define HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_GET(_var)		\
+	(((_var) & HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_M) >>	\
+	 HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_S)
+#define HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM, _val); \
+		((_var) |= ((_val) << HTT_AGGR_CFG_MAX_NUM_AMSDU_SUBFRM_S)); \
+	} while (0)
+
+
+/**
+ * @brief host -> target HTT configure max amsdu info per vdev
+ *
+ * @details
+ *  The HTT AGGR CFG EX tells the target to configure max_amsdu info per vdev
+ *
+ * |31             21|20       16|15           8|7            0|
+ * |-----------------------------------------------------------|
+ * |       reserved  | vdev id   |   max amsdu  |   msg type   |
+ * |-----------------------------------------------------------|
+ * Header fields:
+ *  - MSG_TYPE
+ *    Bits 7:0
+ *    Purpose: identifies this as a aggr cfg ex message
+ *    Value: 0xa
+ *  - MAX_NUM_AMSDU_SUBFRM
+ *    Bits 15:8
+ *    Purpose: max MSDUs per A-MSDU
+ *  - VDEV_ID
+ *    Bits 20:16
+ *    Purpose: ID of the vdev to which this limit is applied
+ */
+#define HTT_AGGR_CFG_EX_MSG_SZ                     4
+
+#define HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_M     0xff00
+#define HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_S     8
+#define HTT_AGGR_CFG_EX_VDEV_ID_M                  0x1f0000
+#define HTT_AGGR_CFG_EX_VDEV_ID_S                  16
+
+#define HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_GET(_var)		\
+	(((_var) & HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_M) >>	\
+	 HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_S)
+#define HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM, _val); \
+	((_var) |= ((_val) << HTT_AGGR_CFG_EX_MAX_NUM_AMSDU_SUBFRM_S)); \
+} while (0)
+
+#define HTT_AGGR_CFG_EX_VDEV_ID_GET(_var)		\
+	(((_var) & HTT_AGGR_CFG_EX_VDEV_ID_M) >>	\
+	 HTT_AGGR_CFG_EX_VDEV_ID_S)
+#define HTT_AGGR_CFG_EX_VDEV_ID_SET(_var, _val)				\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_AGGR_CFG_EX_VDEV_ID, _val);	\
+	((_var) |= ((_val) << HTT_AGGR_CFG_EX_VDEV_ID_S));	\
+} while (0)
+
+/**
+ * @brief HTT WDI_IPA Config Message
+ *
+ * @details
+ *  The HTT WDI_IPA config message is created/sent by host at driver
+ *  init time. It contains information about data structures used on
+ *  WDI_IPA TX and RX path.
+ *  TX CE ring is used for pushing packet metadata from IPA uC
+ *  to WLAN FW
+ *  TX Completion ring is used for generating TX completions from
+ *  WLAN FW to IPA uC
+ *  RX Indication ring is used for indicating RX packets from FW
+ *  to IPA uC
+ *  RX Ring2 is used as either completion ring or as second
+ *  indication ring. when Ring2 is used as completion ring, IPA uC
+ *  puts completed RX packet meta data to Ring2. when Ring2 is used
+ *  as second indication ring, RX packets for LTE-WLAN aggregation are
+ *  indicated in Ring2, other RX packets (e.g. hotspot related) are
+ *  indicated in RX Indication ring. Please see WDI_IPA specification
+ *  for more details.
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |        tx pkt pool size         |      Rsvd      |     msg_type   |
+ *     |-------------------------------------------------------------------|
+ *     |                 tx comp ring base (bits 31:0)                     |
+#if HTT_PADDR64
+ *     |                 tx comp ring base (bits 63:32)                    |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |                         tx comp ring size                         |
+ *     |-------------------------------------------------------------------|
+ *     |            tx comp WR_IDX physical address (bits 31:0)            |
+#if HTT_PADDR64
+ *     |            tx comp WR_IDX physical address (bits 63:32)           |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |            tx CE WR_IDX physical address (bits 31:0)              |
+#if HTT_PADDR64
+ *     |            tx CE WR_IDX physical address (bits 63:32)             |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |             rx indication ring base (bits 31:0)                   |
+#if HTT_PADDR64
+ *     |             rx indication ring base (bits 63:32)                  |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |                      rx indication ring size                      |
+ *     |-------------------------------------------------------------------|
+ *     |             rx ind RD_IDX physical address (bits 31:0)            |
+#if HTT_PADDR64
+ *     |             rx ind RD_IDX physical address (bits 63:32)           |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |             rx ind WR_IDX physical address (bits 31:0)            |
+#if HTT_PADDR64
+ *     |             rx ind WR_IDX physical address (bits 63:32)           |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |-------------------------------------------------------------------|
+ *     |                    rx ring2 base (bits 31:0)                      |
+#if HTT_PADDR64
+ *     |                    rx ring2 base (bits 63:32)                     |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |                        rx ring2 size                              |
+ *     |-------------------------------------------------------------------|
+ *     |             rx ring2 RD_IDX physical address (bits 31:0)          |
+#if HTT_PADDR64
+ *     |             rx ring2 RD_IDX physical address (bits 63:32)         |
+#endif
+ *     |-------------------------------------------------------------------|
+ *     |             rx ring2 WR_IDX physical address (bits 31:0)          |
+#if HTT_PADDR64
+ *     |             rx ring2 WR_IDX physical address (bits 63:32)         |
+#endif
+ *     |-------------------------------------------------------------------|
+ *
+ * Header fields:
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: Identifies this as WDI_IPA config message
+ *     value: = 0x8
+ *   - TX_PKT_POOL_SIZE
+ *     Bits 15:0
+ *     Purpose: Total number of TX packet buffer pool allocated by Host for
+ *              WDI_IPA TX path
+ *   For systems using 32-bit format for bus addresses:
+ *   - TX_COMP_RING_BASE_ADDR
+ *     Bits 31:0
+ *     Purpose: TX Completion Ring base address in DDR
+ *   - TX_COMP_RING_SIZE
+ *     Bits 31:0
+ *     Purpose: TX Completion Ring size (must be power of 2)
+ *   - TX_COMP_WR_IDX_ADDR
+ *     Bits 31:0
+ *     Purpose: IPA doorbell register address OR DDR address where WIFI FW
+ *              updates the Write Index for WDI_IPA TX completion ring
+ *   - TX_CE_WR_IDX_ADDR
+ *     Bits 31:0
+ *     Purpose: DDR address where IPA uC
+ *              updates the WR Index for TX CE ring
+ *              (needed for fusion platforms)
+ *   - RX_IND_RING_BASE_ADDR
+ *     Bits 31:0
+ *     Purpose: RX Indication Ring base address in DDR
+ *   - RX_IND_RING_SIZE
+ *     Bits 31:0
+ *     Purpose: RX Indication Ring size
+ *   - RX_IND_RD_IDX_ADDR
+ *     Bits 31:0
+ *     Purpose: DDR address where IPA uC updates the Read Index for WDI_IPA
+ *              RX indication ring
+ *   - RX_IND_WR_IDX_ADDR
+ *     Bits 31:0
+ *     Purpose: IPA doorbell register address OR DDR address where WIFI FW
+ *              updates the Write Index for WDI_IPA RX indication ring
+ *     - RX_RING2_BASE_ADDR
+ *       Bits 31:0
+ *       Purpose: Second RX Ring(Indication or completion)base address in DDR
+ *     - RX_RING2_SIZE
+ *       Bits 31:0
+ *       Purpose: Second RX  Ring size (must be >= RX_IND_RING_SIZE)
+ *     - RX_RING2_RD_IDX_ADDR
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring, DDR address where
+ *                IPA uC updates the Read Index for Ring2.
+ *                If Second RX ring is completion ring, this is NOT used
+ *     - RX_RING2_WR_IDX_ADDR
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring,  DDR address where
+ *                WIFI FW updates the Write Index for WDI_IPA RX ring2
+ *                If second RX ring is completion ring, DDR address where
+ *                IPA uC updates the Write Index for Ring 2.
+ *   For systems using 64-bit format for bus addresses:
+ *     - TX_COMP_RING_BASE_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of TX Completion Ring base physical
+ *       address in DDR
+ *     - TX_COMP_RING_BASE_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of TX Completion Ring base physical
+ *       address in DDR
+ *     - TX_COMP_RING_SIZE
+ *       Bits 31:0
+ *       Purpose: TX Completion Ring size (must be power of 2)
+ *     - TX_COMP_WR_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of IPA doorbell register address OR
+ *                Lower 4 bytes of DDR address where WIFI FW
+ *                updates the Write Index for WDI_IPA TX completion ring
+ *     - TX_COMP_WR_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of IPA doorbell register address OR
+ *                Higher 4 bytes of DDR address where WIFI FW
+ *                updates the Write Index for WDI_IPA TX completion ring
+ *     - TX_CE_WR_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of DDR address where IPA uC
+ *                updates the WR Index for TX CE ring
+ *                (needed for fusion platforms)
+ *     - TX_CE_WR_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of DDR address where IPA uC
+ *                updates the WR Index for TX CE ring
+ *                (needed for fusion platforms)
+ *     - RX_IND_RING_BASE_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of RX Indication Ring base address in DDR
+ *     - RX_IND_RING_BASE_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of RX Indication Ring base address in DDR
+ *     - RX_IND_RING_SIZE
+ *       Bits 31:0
+ *       Purpose: RX Indication Ring size
+ *     - RX_IND_RD_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of DDR address where IPA uC updates the
+ *       Read Index for WDI_IPA RX indication ring
+ *     - RX_IND_RD_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of DDR address where IPA uC updates the
+ *       Read Index for WDI_IPA RX indication ring
+ *     - RX_IND_WR_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of IPA doorbell register address OR
+ *                Lower 4 bytes of DDR address where WIFI FW
+ *                updates the Write Index for WDI_IPA RX indication ring
+ *     - RX_IND_WR_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of IPA doorbell register address OR
+ *                Higher 4 bytes of DDR address where WIFI FW
+ *                updates the Write Index for WDI_IPA RX indication ring
+ *     - RX_RING2_BASE_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: Lower 4 bytes of Second RX Ring(Indication OR completion)
+ *       base address in DDR
+ *     - RX_RING2_BASE_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: Higher 4 bytes of Second RX Ring(Indication OR completion)
+ *       base address in DDR
+ *     - RX_RING2_SIZE
+ *       Bits 31:0
+ *       Purpose: Second RX  Ring size (must be >= RX_IND_RING_SIZE)
+ *     - RX_RING2_RD_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring, lower 4 bytes of
+ *                DDR address where IPA uC updates the Read Index for Ring2.
+ *                If Second RX ring is completion ring, this is NOT used
+ *     - RX_RING2_RD_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring, higher 4 bytes of
+ *                DDR address where IPA uC updates the Read Index for Ring2.
+ *                If Second RX ring is completion ring, this is NOT used
+ *     - RX_RING2_WR_IDX_ADDR_LO
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring, lower 4 bytes of
+ *                DDR address where WIFI FW updates the Write Index
+ *                for WDI_IPA RX ring2
+ *                If second RX ring is completion ring, lower 4 bytes of
+ *                DDR address where IPA uC updates the Write Index for Ring 2.
+ *     - RX_RING2_WR_IDX_ADDR_HI
+ *       Bits 31:0
+ *       Purpose: If Second RX ring is Indication ring, higher 4 bytes of
+ *                DDR address where WIFI FW updates the Write Index
+ *                for WDI_IPA RX ring2
+ *                If second RX ring is completion ring, higher 4 bytes of
+ *                DDR address where IPA uC updates the Write Index for Ring 2.
+ */
+
+#if HTT_PADDR64
+#define HTT_WDI_IPA_CFG_SZ                           88	/* bytes */
+#else
+#define HTT_WDI_IPA_CFG_SZ                           52	/* bytes */
+#endif
+
+#define HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_M           0xffff0000
+#define HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_S           16
+
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_M     0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_S     0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_M  0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_S  0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_M  0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_S  0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_M          0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_S          0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_M        0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_S        0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_M     0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_S     0
+
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_M     0xffffffff
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_S     0
+
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_M          0xffffffff
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_S          0
+
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_M       0xffffffff
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_S       0
+
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_M       0xffffffff
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_S       0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_S      0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_M   0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_S   0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_M   0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_S   0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_M           0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_S           0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_M         0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_S         0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_S      0
+
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_S      0
+
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_M         0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_S         0
+
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_S      0
+
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_S      0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_M         0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_S         0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_S      0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_M      0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_S      0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_SIZE_M              0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_SIZE_S              0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_M       0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_S       0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_M    0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_S    0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_M    0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_S    0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_M       0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_S       0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_M    0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_S    0
+
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_M    0xffffffff
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_S    0
+
+#define HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_M) >>		\
+	HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_S)
+#define HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_S)); \
+	} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_GET(_var)		\
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_M) >>		\
+	HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(				\
+			HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR, _val);\
+		((_var) |=						\
+			((_val) << HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_S)); \
+	} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_SET(_var, _val) \
+	do {                                                     \
+		HTT_CHECK_SET_VAL(				\
+		HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI, _val);\
+		((_var) |=				\
+			((_val) <<			\
+			HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_S)); \
+	} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_M) >> \
+	HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_S)); \
+} while (0)
+
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_M) >>		\
+	HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_S)); \
+	} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_M) >>		\
+	HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_S)); \
+	} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_M) >>	\
+		HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_M) >>	\
+		HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_LO_S)); \
+} while (0)
+
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_M) >>		\
+		HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_S)); \
+	} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_M) >>\
+	HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_LO_S)); \
+} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_M) >>		\
+	HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_SET(_var, _val)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_SET(_var, _val) \
+do {                                                    \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_LO_S)); \
+} while (0)
+
+#define HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_M) >>		\
+	HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_SET(_var, _val)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RING_SIZE, _val); \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_S)); \
+} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_GET(_var)		\
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_M) >>		\
+	HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_SET(_var, _val)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR, _val); \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_LO_S)); \
+} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_GET(_var)		\
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_M) >>		\
+	HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_SET(_var, _val)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR, _val); \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_LO_S)); \
+	} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_LO_S)); \
+} while (0)
+
+#define HTT_WDI_IPA_CFG_RX_RING2_SIZE_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_SIZE_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_SIZE_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_SIZE_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_SIZE, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_SIZE_S)); \
+} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_LO_S)); \
+} while (0)
+
+/* for systems using 32-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_S)); \
+} while (0)
+
+/* for systems using 64-bit format for bus addr */
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_GET(_var) \
+	(((_var) & HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_M) >>	\
+	HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_S)
+#define HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_SET(_var, _val) \
+do {                                                     \
+	HTT_CHECK_SET_VAL(HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO, _val);  \
+	((_var) |= ((_val) << HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_LO_S)); \
+} while (0)
+
+/*
+ * TEMPLATE_HTT_WDI_IPA_CONFIG_T:
+ * This macro defines a htt_wdi_ipa_configXXX_t in which any physical
+ * addresses are stored in a XXX-bit field.
+ * This macro is used to define both htt_wdi_ipa_config32_t and
+ * htt_wdi_ipa_config64_t structs.
+ */
+#define TEMPLATE_HTT_WDI_IPA_CONFIG_T(_paddr_bits_, \
+	_paddr__tx_comp_ring_base_addr_, \
+	_paddr__tx_comp_wr_idx_addr_, \
+	_paddr__tx_ce_wr_idx_addr_, \
+	_paddr__rx_ind_ring_base_addr_, \
+	_paddr__rx_ind_rd_idx_addr_, \
+	_paddr__rx_ind_wr_idx_addr_, \
+	_paddr__rx_ring2_base_addr_,\
+	_paddr__rx_ring2_rd_idx_addr_,\
+	_paddr__rx_ring2_wr_idx_addr_)      \
+PREPACK struct htt_wdi_ipa_cfg ## _paddr_bits_ ## _t \
+{ \
+  /* DWORD 0: flags and meta-data */ \
+	A_UINT32 \
+	msg_type:8, /* HTT_H2T_MSG_TYPE_WDI_IPA_CFG */ \
+	reserved:8, \
+	tx_pkt_pool_size:16;\
+	/* DWORD 1  */\
+	_paddr__tx_comp_ring_base_addr_;\
+	/* DWORD 2 (or 3)*/\
+	A_UINT32 tx_comp_ring_size;\
+	/* DWORD 3 (or 4)*/\
+	_paddr__tx_comp_wr_idx_addr_;\
+	/* DWORD 4 (or 6)*/\
+	_paddr__tx_ce_wr_idx_addr_;\
+	/* DWORD 5 (or 8)*/\
+	_paddr__rx_ind_ring_base_addr_;\
+	/* DWORD 6 (or 10)*/\
+	A_UINT32 rx_ind_ring_size;\
+	/* DWORD 7 (or 11)*/\
+	_paddr__rx_ind_rd_idx_addr_;\
+	/* DWORD 8 (or 13)*/\
+	_paddr__rx_ind_wr_idx_addr_;\
+	/* DWORD 9 (or 15)*/\
+	_paddr__rx_ring2_base_addr_;\
+	/* DWORD 10 (or 17) */\
+	A_UINT32 rx_ring2_size;\
+	/* DWORD 11 (or 18) */\
+	_paddr__rx_ring2_rd_idx_addr_;\
+	/* DWORD 12 (or 20) */\
+	_paddr__rx_ring2_wr_idx_addr_;\
+} POSTPACK
+
+/* define a htt_wdi_ipa_config32_t type */
+TEMPLATE_HTT_WDI_IPA_CONFIG_T(32, HTT_VAR_PADDR32(tx_comp_ring_base_addr),
+			      HTT_VAR_PADDR32(tx_comp_wr_idx_addr),
+			      HTT_VAR_PADDR32(tx_ce_wr_idx_addr),
+			      HTT_VAR_PADDR32(rx_ind_ring_base_addr),
+			      HTT_VAR_PADDR32(rx_ind_rd_idx_addr),
+			      HTT_VAR_PADDR32(rx_ind_wr_idx_addr),
+			      HTT_VAR_PADDR32(rx_ring2_base_addr),
+			      HTT_VAR_PADDR32(rx_ring2_rd_idx_addr),
+			      HTT_VAR_PADDR32(rx_ring2_wr_idx_addr));
+
+/* define a htt_wdi_ipa_config64_t type */
+TEMPLATE_HTT_WDI_IPA_CONFIG_T(64, HTT_VAR_PADDR64_LE(tx_comp_ring_base_addr),
+			      HTT_VAR_PADDR64_LE(tx_comp_wr_idx_addr),
+			      HTT_VAR_PADDR64_LE(tx_ce_wr_idx_addr),
+			      HTT_VAR_PADDR64_LE(rx_ind_ring_base_addr),
+			      HTT_VAR_PADDR64_LE(rx_ind_rd_idx_addr),
+			      HTT_VAR_PADDR64_LE(rx_ind_wr_idx_addr),
+			      HTT_VAR_PADDR64_LE(rx_ring2_base_addr),
+			      HTT_VAR_PADDR64_LE(rx_ring2_rd_idx_addr),
+			      HTT_VAR_PADDR64_LE(rx_ring2_wr_idx_addr));
+
+#if HTT_PADDR64
+#define htt_wdi_ipa_cfg_t htt_wdi_ipa_cfg64_t
+#else
+#define htt_wdi_ipa_cfg_t htt_wdi_ipa_cfg32_t
+#endif
+
+enum htt_wdi_ipa_op_code {
+	HTT_WDI_IPA_OPCODE_TX_SUSPEND = 0,
+	HTT_WDI_IPA_OPCODE_TX_RESUME = 1,
+	HTT_WDI_IPA_OPCODE_RX_SUSPEND = 2,
+	HTT_WDI_IPA_OPCODE_RX_RESUME = 3,
+	HTT_WDI_IPA_OPCODE_DBG_STATS = 4,
+	/* keep this last */
+	HTT_WDI_IPA_OPCODE_MAX
+};
+
+/**
+ * @brief HTT WDI_IPA Operation Request Message
+ *
+ * @details
+ *  HTT WDI_IPA Operation Request message is sent by host
+ *  to either suspend or resume WDI_IPA TX or RX path.
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |             op_code             |      Rsvd      |     msg_type   |
+ *     |-------------------------------------------------------------------|
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: Identifies this as WDI_IPA Operation Request message
+ *     value: = 0x9
+ *   - OP_CODE
+ *     Bits 31:16
+ *     Purpose: Identifies operation host is requesting (e.g. TX suspend)
+ *     value: = enum htt_wdi_ipa_op_code
+ */
+
+PREPACK struct htt_wdi_ipa_op_request_t {
+	/* DWORD 0: flags and meta-data */
+	A_UINT32
+		msg_type:8,	/* HTT_H2T_MSG_TYPE_WDI_IPA_OP_REQUEST */
+		reserved:8,
+		op_code:16;
+} POSTPACK;
+
+#define HTT_WDI_IPA_OP_REQUEST_SZ                    4	/* bytes */
+
+#define HTT_WDI_IPA_OP_REQUEST_OP_CODE_M             0xffff0000
+#define HTT_WDI_IPA_OP_REQUEST_OP_CODE_S             16
+
+#define HTT_WDI_IPA_OP_REQUEST_OP_CODE_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_OP_REQUEST_OP_CODE_M) >>			\
+	HTT_WDI_IPA_OP_REQUEST_OP_CODE_S)
+#define HTT_WDI_IPA_OP_REQUEST_OP_CODE_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_OP_REQUEST_OP_CODE, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_OP_REQUEST_OP_CODE_S)); \
+	} while (0)
+
+
+
+
+/*=== target -> host messages ===============================================*/
+
+
+enum htt_t2h_msg_type {
+	HTT_T2H_MSG_TYPE_VERSION_CONF = 0x0,
+	HTT_T2H_MSG_TYPE_RX_IND = 0x1,
+	HTT_T2H_MSG_TYPE_RX_FLUSH = 0x2,
+	HTT_T2H_MSG_TYPE_PEER_MAP = 0x3,
+	HTT_T2H_MSG_TYPE_PEER_UNMAP = 0x4,
+	HTT_T2H_MSG_TYPE_RX_ADDBA = 0x5,
+	HTT_T2H_MSG_TYPE_RX_DELBA = 0x6,
+	HTT_T2H_MSG_TYPE_TX_COMPL_IND = 0x7,
+	HTT_T2H_MSG_TYPE_PKTLOG = 0x8,
+	HTT_T2H_MSG_TYPE_STATS_CONF = 0x9,
+	HTT_T2H_MSG_TYPE_RX_FRAG_IND = 0xa,
+	HTT_T2H_MSG_TYPE_SEC_IND = 0xb,
+	DEPRECATED_HTT_T2H_MSG_TYPE_RC_UPDATE_IND = 0xc,/* no longer used */
+	HTT_T2H_MSG_TYPE_TX_INSPECT_IND = 0xd,
+	HTT_T2H_MSG_TYPE_MGMT_TX_COMPL_IND = 0xe,
+	/* only used for HL, add HTT MSG for HTT CREDIT update */
+	HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND = 0xf,
+	HTT_T2H_MSG_TYPE_RX_PN_IND = 0x10,
+	HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND = 0x11,
+	HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND = 0x12,
+	/* 0x13 is reserved for RX_RING_LOW_IND (RX Full reordering related) */
+	HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE = 0x14,
+	HTT_T2H_MSG_TYPE_CHAN_CHANGE = 0x15,
+	HTT_T2H_MSG_TYPE_RX_OFLD_PKT_ERR = 0x16,
+	HTT_T2H_MSG_TYPE_RATE_REPORT = 0x17,
+	HTT_T2H_MSG_TYPE_FLOW_POOL_MAP = 0x18,
+	HTT_T2H_MSG_TYPE_FLOW_POOL_UNMAP = 0x19,
+
+	HTT_T2H_MSG_TYPE_TEST,
+	/* keep this last */
+	HTT_T2H_NUM_MSGS
+};
+
+/*
+ * HTT target to host message type -
+ * stored in bits 7:0 of the first word of the message
+ */
+#define HTT_T2H_MSG_TYPE_M      0xff
+#define HTT_T2H_MSG_TYPE_S      0
+
+#define HTT_T2H_MSG_TYPE_SET(word, msg_type)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE, msg_type);	\
+		(word) |= ((msg_type) << HTT_T2H_MSG_TYPE_S);	\
+	} while (0)
+#define HTT_T2H_MSG_TYPE_GET(word)				\
+	(((word) & HTT_T2H_MSG_TYPE_M) >> HTT_T2H_MSG_TYPE_S)
+
+/**
+ * @brief target -> host version number confirmation message definition
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |    reserved    |  major number  |  minor number  |    msg type    |
+ *     |-------------------------------------------------------------------|
+ *     :                    option request TLV (optional)                  |
+ *     :...................................................................:
+ *
+ * The VER_CONF message may consist of a single 4-byte word, or may be
+ * extended with TLVs that specify HTT options selected by the target.
+ * The following option TLVs may be appended to the VER_CONF message:
+ *   - LL_BUS_ADDR_SIZE
+ *   - HL_SUPPRESS_TX_COMPL_IND
+ *   - MAX_TX_QUEUE_GROUPS
+ * These TLVs may appear in an arbitrary order.  Any number of these TLVs
+ * may be appended to the VER_CONF message (but only one TLV of each type).
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a version number confirmation message
+ *     Value: 0x0
+ *   - VER_MINOR
+ *     Bits 15:8
+ *     Purpose: Specify the minor number of the HTT message library version
+ *         in use by the target firmware.
+ *         The minor number specifies the specific revision within a range
+ *         of fundamentally compatible HTT message definition revisions.
+ *         Compatible revisions involve adding new messages or perhaps
+ *         adding new fields to existing messages, in a backwards-compatible
+ *         manner.
+ *         Incompatible revisions involve changing the message type values,
+ *         or redefining existing messages.
+ *     Value: minor number
+ *   - VER_MAJOR
+ *     Bits 15:8
+ *     Purpose: Specify the major number of the HTT message library version
+ *         in use by the target firmware.
+ *         The major number specifies the family of minor revisions that are
+ *         fundamentally compatible with each other, but not with prior or
+ *         later families.
+ *     Value: major number
+ */
+
+#define HTT_VER_CONF_MINOR_M      0x0000ff00
+#define HTT_VER_CONF_MINOR_S      8
+#define HTT_VER_CONF_MAJOR_M      0x00ff0000
+#define HTT_VER_CONF_MAJOR_S      16
+
+
+#define HTT_VER_CONF_MINOR_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_VER_CONF_MINOR, value);	\
+		(word) |= (value)  << HTT_VER_CONF_MINOR_S;	\
+	} while (0)
+#define HTT_VER_CONF_MINOR_GET(word)					\
+	(((word) & HTT_VER_CONF_MINOR_M) >> HTT_VER_CONF_MINOR_S)
+
+#define HTT_VER_CONF_MAJOR_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_VER_CONF_MAJOR, value);	\
+		(word) |= (value)  << HTT_VER_CONF_MAJOR_S;	\
+	} while (0)
+#define HTT_VER_CONF_MAJOR_GET(word)					\
+	(((word) & HTT_VER_CONF_MAJOR_M) >> HTT_VER_CONF_MAJOR_S)
+
+
+#define HTT_VER_CONF_BYTES 4
+
+
+/**
+ * @brief - target -> host HTT Rx In order indication message
+ *
+ * @details
+ *
+ * |31            24|23                 |15|14|13|12|11|10|9|8|7|6|5|4       0|
+ * |----------------+-------------------+---------------------+---------------|
+ * |                  peer ID           |  | F| O| ext TID    |   msg type    |
+ * |--------------------------------------------------------------------------|
+ * |                  MSDU count        |        Reserved     |   vdev id     |
+ * |--------------------------------------------------------------------------|
+ * |                        MSDU 0 bus address (bits 31:0)                    |
+ #if HTT_PADDR64
+ * |                        MSDU 0 bus address (bits 63:32)                   |
+ #endif
+ * |--------------------------------------------------------------------------|
+ * |    MSDU info   | MSDU 0 FW Desc    |         MSDU 0 Length               |
+ * |--------------------------------------------------------------------------|
+ * |                        MSDU 1 bus address (bits 31:0)                    |
+ #if HTT_PADDR64
+ * |                        MSDU 1 bus address (bits 63:32)                   |
+ #endif
+ * |--------------------------------------------------------------------------|
+ * |    MSDU info   | MSDU 1 FW Desc    |         MSDU 1 Length               |
+ * |--------------------------------------------------------------------------|
+ */
+
+
+/** @brief - MSDU info byte for TCP_CHECKSUM_OFFLOAD use
+ *
+ * @details
+ *                            bits
+ * |  7  | 6  |   5   |    4   |   3    |    2    |    1    |     0     |
+ * |-----+----+-------+--------+--------+---------+---------+-----------|
+ * | reserved | is IP | is UDP | is TCP | is IPv6 |IP chksum|  TCP/UDP  |
+ * |          | frag  |        |        |         | fail    |chksum fail|
+ * |-----+----+-------+--------+--------+---------+---------+-----------|
+ * (see fw_rx_msdu_info def in wal_rx_desc.h)
+ */
+
+struct htt_rx_in_ord_paddr_ind_hdr_t {
+	A_UINT32		/* word 0 */
+		msg_type:8,
+		ext_tid:5,
+		offload:1,
+		frag:1,
+		reserved_0:1,
+		peer_id:16;
+
+	A_UINT32		/* word 1 */
+		vap_id:8,
+		reserved_1:8,
+		msdu_cnt:16;
+};
+
+struct htt_rx_in_ord_paddr_ind_msdu32_t {
+	A_UINT32 dma_addr;
+	A_UINT32
+		length:16,
+		fw_desc:8,
+		msdu_info:8;
+};
+struct htt_rx_in_ord_paddr_ind_msdu64_t {
+	A_UINT32 dma_addr_lo;
+	A_UINT32 dma_addr_hi;
+	A_UINT32
+		length:16,
+		fw_desc:8,
+		msdu_info:8;
+};
+#if HTT_PADDR64
+#define htt_rx_in_ord_paddr_ind_msdu_t htt_rx_in_ord_paddr_ind_msdu64_t
+#else
+#define htt_rx_in_ord_paddr_ind_msdu_t htt_rx_in_ord_paddr_ind_msdu32_t
+#endif
+
+
+#define HTT_RX_IN_ORD_PADDR_IND_HDR_BYTES	\
+	(sizeof(struct htt_rx_in_ord_paddr_ind_hdr_t))
+#define HTT_RX_IN_ORD_PADDR_IND_HDR_DWORDS	\
+	(HTT_RX_IN_ORD_PADDR_IND_HDR_BYTES >> 2)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTE_OFFSET	\
+		HTT_RX_IN_ORD_PADDR_IND_HDR_BYTES
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_DWORD_OFFSET	\
+		HTT_RX_IN_ORD_PADDR_IND_HDR_DWORDS
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES_64	\
+	(sizeof(struct htt_rx_in_ord_paddr_ind_msdu64_t))
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_DWORDS_64	\
+	(HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES_64 >> 2)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES_32	\
+	(sizeof(struct htt_rx_in_ord_paddr_ind_msdu32_t))
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_DWORDS_32	\
+	(HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES_32 >> 2)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES	\
+	(sizeof(struct htt_rx_in_ord_paddr_ind_msdu_t))
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_DWORDS		\
+	(HTT_RX_IN_ORD_PADDR_IND_MSDU_BYTES >> 2)
+
+#define HTT_RX_IN_ORD_PADDR_IND_EXT_TID_M      0x00001f00
+#define HTT_RX_IN_ORD_PADDR_IND_EXT_TID_S      8
+#define HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_M      0x00002000
+#define HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_S      13
+#define HTT_RX_IN_ORD_PADDR_IND_FRAG_M         0x00004000
+#define HTT_RX_IN_ORD_PADDR_IND_FRAG_S         14
+#define HTT_RX_IN_ORD_PADDR_IND_PEER_ID_M      0xffff0000
+#define HTT_RX_IN_ORD_PADDR_IND_PEER_ID_S      16
+#define HTT_RX_IN_ORD_PADDR_IND_VAP_ID_M       0x000000ff
+#define HTT_RX_IN_ORD_PADDR_IND_VAP_ID_S       0
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_M     0xffff0000
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_S     16
+/* for systems using 64-bit format for bus addresses */
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_M     0xffffffff
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_S     0
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_M     0xffffffff
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_S     0
+/* for systems using 32-bit format for bus addresses */
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_M        0xffffffff
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_S        0
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_M     0x0000ffff
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_S     0
+#define HTT_RX_IN_ORD_PADDR_IND_FW_DESC_M      0x00ff0000
+#define HTT_RX_IN_ORD_PADDR_IND_FW_DESC_S      16
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_M    0xff000000
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_S    24
+
+
+#define HTT_RX_IN_ORD_PADDR_IND_EXT_TID_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_EXT_TID, value); \
+		(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_EXT_TID_S; \
+	} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_EXT_TID_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_EXT_TID_M) >>	\
+	HTT_RX_IN_ORD_PADDR_IND_EXT_TID_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_PEER_ID_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_PEER_ID, value); \
+		(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_PEER_ID_S; \
+	} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_PEER_ID_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_PEER_ID_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_PEER_ID_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_VAP_ID_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_VAP_ID, value); \
+		(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_VAP_ID_S;	\
+	} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_VAP_ID_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_VAP_ID_M) >>			\
+	HTT_RX_IN_ORD_PADDR_IND_VAP_ID_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT, value); \
+		(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_S; \
+	} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_MSDU_CNT_S)
+
+/* for systems using 64-bit format for bus addresses */
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_PADDR_HI, value); \
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_S; \
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_PADDR_HI_S)
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_PADDR_LO, value); \
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_S; \
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_PADDR_LO_S)
+
+/* for systems using 32-bit format for bus addresses */
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_PADDR, value); \
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_PADDR_S;	\
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_PADDR_GET(word)				\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_PADDR_M) >>			\
+	HTT_RX_IN_ORD_PADDR_IND_PADDR_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_SET(word, value)	\
+do {                                                       \
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN, value);\
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_S;  \
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_GET(word) \
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_M) >>	\
+	HTT_RX_IN_ORD_PADDR_IND_MSDU_LEN_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_FW_DESC_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_FW_DESC, value); \
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_FW_DESC_S; \
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_FW_DESC_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_FW_DESC_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_FW_DESC_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO, value);\
+	(word) |= (value)  << HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_S;\
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_GET(word) \
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_M) >>	\
+	 HTT_RX_IN_ORD_PADDR_IND_MSDU_INFO_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_IND_OFFLOAD, value);\
+	(word) |= (value)  << HTT_RX_IN_ORD_IND_OFFLOAD_S;	\
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_M) >>	\
+	HTT_RX_IN_ORD_PADDR_IND_OFFLOAD_S)
+
+#define HTT_RX_IN_ORD_PADDR_IND_FRAG_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_IN_ORD_IND_FRAG, value);	\
+	(word) |= (value)  << HTT_RX_IN_ORD_IND_FRAG_S;		\
+} while (0)
+#define HTT_RX_IN_ORD_PADDR_IND_FRAG_GET(word)			\
+	(((word) & HTT_RX_IN_ORD_PADDR_IND_FRAG_M) >>		\
+	HTT_RX_IN_ORD_PADDR_IND_FRAG_S)
+
+/* definitions used within target -> host rx indication message */
+
+PREPACK struct htt_rx_ind_hdr_prefix_t {
+	A_UINT32		/* word 0 */
+		msg_type:8,
+	    ext_tid:5,
+		release_valid:1,
+		flush_valid:1,
+		reserved0:1,
+		peer_id:16;
+
+	A_UINT32		/* word 1 */
+		flush_start_seq_num:6,
+	    flush_end_seq_num:6,
+		release_start_seq_num:6,
+		release_end_seq_num:6,
+		num_mpdu_ranges:8;
+} POSTPACK;
+
+#define HTT_RX_IND_HDR_PREFIX_BYTES (sizeof(struct htt_rx_ind_hdr_prefix_t))
+#define HTT_RX_IND_HDR_PREFIX_SIZE32 (HTT_RX_IND_HDR_PREFIX_BYTES >> 2)
+
+#define HTT_TGT_RSSI_INVALID 0x80
+
+PREPACK struct htt_rx_ppdu_desc_t {
+#define HTT_RX_IND_PPDU_OFFSET_WORD_RSSI_CMB              0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_TIMESTAMP_SUBMICROSEC 0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_PHY_ERR_CODE          0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_PHY_ERR               0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_LEGACY_RATE           0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_LEGACY_RATE_SEL       0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_END_VALID             0
+#define HTT_RX_IND_PPDU_OFFSET_WORD_START_VALID           0
+	A_UINT32		/* word 0 */
+		rssi_cmb:8,
+		timestamp_submicrosec:8,
+	    phy_err_code:8,
+	    phy_err:1,
+		legacy_rate:4,
+		legacy_rate_sel:1,
+		end_valid:1,
+		start_valid:1;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_RSSI0 1
+	union {
+		A_UINT32	/* word 1 */
+			rssi0_pri20:8,
+			rssi0_ext20:8,
+			rssi0_ext40:8,
+			rssi0_ext80:8;
+		A_UINT32 rssi0;	/* access all 20/40/80 per-b/w RSSIs together */
+	} u0;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_RSSI1 2
+	union {
+		A_UINT32	/* word 2 */
+			rssi1_pri20:8,
+			rssi1_ext20:8,
+			rssi1_ext40:8,
+			rssi1_ext80:8;
+		A_UINT32 rssi1;	/* access all 20/40/80 per-b/w RSSIs together */
+	} u1;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_RSSI2 3
+	union {
+		A_UINT32	/* word 3 */
+			rssi2_pri20:8,
+			rssi2_ext20:8,
+			rssi2_ext40:8,
+			rssi2_ext80:8;
+		A_UINT32 rssi2;	/* access all 20/40/80 per-b/w RSSIs together */
+	} u2;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_RSSI3 4
+	union {
+		A_UINT32	/* word 4 */
+			rssi3_pri20:8,
+			rssi3_ext20:8,
+			rssi3_ext40:8,
+			rssi3_ext80:8;
+		A_UINT32 rssi3;	/* access all 20/40/80 per-b/w RSSIs together */
+	} u3;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_TSF32 5
+	A_UINT32 tsf32;		/* word 5 */
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_TIMESTAMP_MICROSEC 6
+	A_UINT32 timestamp_microsec;	/* word 6 */
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_PREAMBLE_TYPE 7
+#define HTT_RX_IND_PPDU_OFFSET_WORD_VHT_SIG_A1    7
+	A_UINT32		/* word 7 */
+		vht_sig_a1:24,
+		preamble_type:8;
+
+#define HTT_RX_IND_PPDU_OFFSET_WORD_VHT_SIG_A2    8
+	 A_UINT32		/* word 8 */
+		vht_sig_a2:24,
+		reserved0:8;
+} POSTPACK;
+
+#define HTT_RX_PPDU_DESC_BYTES (sizeof(struct htt_rx_ppdu_desc_t))
+#define HTT_RX_PPDU_DESC_SIZE32 (HTT_RX_PPDU_DESC_BYTES >> 2)
+
+PREPACK struct htt_rx_ind_hdr_suffix_t {
+	A_UINT32		/* word 0 */
+		fw_rx_desc_bytes:16,
+		reserved0:16;
+} POSTPACK;
+
+#define HTT_RX_IND_HDR_SUFFIX_BYTES (sizeof(struct htt_rx_ind_hdr_suffix_t))
+#define HTT_RX_IND_HDR_SUFFIX_SIZE32 (HTT_RX_IND_HDR_SUFFIX_BYTES >> 2)
+
+PREPACK struct htt_rx_ind_hdr_t {
+	struct htt_rx_ind_hdr_prefix_t prefix;
+	struct htt_rx_ppdu_desc_t rx_ppdu_desc;
+	struct htt_rx_ind_hdr_suffix_t suffix;
+} POSTPACK;
+
+#define HTT_RX_IND_HDR_BYTES (sizeof(struct htt_rx_ind_hdr_t))
+#define HTT_RX_IND_HDR_SIZE32 (HTT_RX_IND_HDR_BYTES >> 2)
+
+/* confirm that HTT_RX_IND_HDR_BYTES is a multiple of 4 */
+A_COMPILE_TIME_ASSERT(HTT_RX_IND_hdr_size_quantum,
+		      (HTT_RX_IND_HDR_BYTES & 0x3) == 0);
+
+/*
+ * HTT_RX_IND_FW_RX_PPDU_DESC_BYTE_OFFSET:
+ * the offset into the HTT rx indication message at which the
+ * FW rx PPDU descriptor resides
+ */
+#define HTT_RX_IND_FW_RX_PPDU_DESC_BYTE_OFFSET HTT_RX_IND_HDR_PREFIX_BYTES
+
+/*
+ * HTT_RX_IND_HDR_SUFFIX_BYTE_OFFSET:
+ * the offset into the HTT rx indication message at which the
+ * header suffix (FW rx MSDU byte count) resides
+ */
+#define HTT_RX_IND_HDR_SUFFIX_BYTE_OFFSET				\
+	(HTT_RX_IND_FW_RX_PPDU_DESC_BYTE_OFFSET + HTT_RX_PPDU_DESC_BYTES)
+
+/*
+ * HTT_RX_IND_FW_RX_DESC_BYTE_OFFSET:
+ * the offset into the HTT rx indication message at which the per-MSDU
+ * information starts
+ * Bytes 0-7 are the message header; bytes 8-11 contain the length of the
+ * per-MSDU information portion of the message.  The per-MSDU info itself
+ * starts at byte 12.
+ */
+#define HTT_RX_IND_FW_RX_DESC_BYTE_OFFSET HTT_RX_IND_HDR_BYTES
+
+
+/**
+ * @brief target -> host rx indication message definition
+ *
+ * @details
+ * The following field definitions describe the format of the rx indication
+ * message sent from the target to the host.
+ * The message consists of three major sections:
+ * 1.  a fixed-length header
+ * 2.  a variable-length list of firmware rx MSDU descriptors
+ * 3.  one or more 4-octet MPDU range information elements
+ * The fixed length header itself has two sub-sections
+ * 1.  the message meta-information, including identification of the
+ *     sender and type of the received data, and a 4-octet flush/release IE
+ * 2.  the firmware rx PPDU descriptor
+ *
+ * The format of the message is depicted below.
+ * in this depiction, the following abbreviations are used for information
+ * elements within the message:
+ *   - SV - start valid: this flag is set if the FW rx PPDU descriptor
+ *          elements associated with the PPDU start are valid.
+ *          Specifically, the following fields are valid only if SV is set:
+ *              RSSI (all variants), L, legacy rate, preamble type, service,
+ *              VHT-SIG-A
+ *   - EV - end valid: this flag is set if the FW rx PPDU descriptor
+ *          elements associated with the PPDU end are valid.
+ *          Specifically, the following fields are valid only if EV is set:
+ *              P, PHY err code, TSF, microsec / sub-microsec timestamp
+ *   - L  - Legacy rate selector - if legacy rates are used, this flag
+ *          indicates whether the rate is from a CCK (L == 1) or OFDM
+ *          (L == 0) PHY.
+ *   - P  - PHY error flag - boolean indication of whether the rx frame had
+ *          a PHY error
+ *
+ * |31            24|23         18|17|16|15|14|13|12|11|10|9|8|7|6|5|4       0|
+ * |----------------+-------------------+---------------------+---------------|
+ * |                  peer ID           |  |RV|FV| ext TID    |   msg type    |
+ * |--------------------------------------------------------------------------|
+ * |      num       |   release   |     release     |    flush    |   flush   |
+ * |      MPDU      |     end     |      start      |     end     |   start   |
+ * |     ranges     |   seq num   |     seq num     |   seq num   |  seq num  |
+ * |==========================================================================|
+ * |S|E|L| legacy |P|   PHY err code    |     sub-microsec    |    combined   |
+ * |V|V| |  rate  | |                   |       timestamp     |       RSSI    |
+ * |--------------------------------------------------------------------------|
+ * | RSSI rx0 ext80 |  RSSI rx0 ext40   |    RSSI rx0  ext20  | RSSI rx0 pri20|
+ * |--------------------------------------------------------------------------|
+ * | RSSI rx1 ext80 |  RSSI rx1 ext40   |    RSSI rx1  ext20  | RSSI rx1 pri20|
+ * |--------------------------------------------------------------------------|
+ * | RSSI rx2 ext80 |  RSSI rx2 ext40   |    RSSI rx2  ext20  | RSSI rx2 pri20|
+ * |--------------------------------------------------------------------------|
+ * | RSSI rx3 ext80 |  RSSI rx3 ext40   |    RSSI rx3  ext20  | RSSI rx3 pri20|
+ * |--------------------------------------------------------------------------|
+ * |                                  TSF LSBs                                |
+ * |--------------------------------------------------------------------------|
+ * |                             microsec timestamp                           |
+ * |--------------------------------------------------------------------------|
+ * | preamble type  |                    HT-SIG / VHT-SIG-A1                  |
+ * |--------------------------------------------------------------------------|
+ * |    service     |                    HT-SIG / VHT-SIG-A2                  |
+ * |==========================================================================|
+ * |             reserved               |          FW rx desc bytes           |
+ * |--------------------------------------------------------------------------|
+ * |     MSDU Rx    |      MSDU Rx      |        MSDU Rx      |    MSDU Rx    |
+ * |     desc B3    |      desc B2      |        desc B1      |    desc B0    |
+ * |--------------------------------------------------------------------------|
+ * :                                    :                                     :
+ * |--------------------------------------------------------------------------|
+ * |                          alignment                       |    MSDU Rx    |
+ * |                           padding                        |    desc Bn    |
+ * |--------------------------------------------------------------------------|
+ * |              reserved              |  MPDU range status  |   MPDU count  |
+ * |--------------------------------------------------------------------------|
+ * :              reserved              :  MPDU range status  :   MPDU count  :
+ * :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - :
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx indication message
+ *     Value: 0x1
+ *   - EXT_TID
+ *     Bits 12:8
+ *     Purpose: identify the traffic ID of the rx data, including
+ *         special "extended" TID values for multicast, broadcast, and
+ *         non-QoS data frames
+ *     Value: 0-15 for regular TIDs, or >= 16 for bcast/mcast/non-QoS
+ *   - FLUSH_VALID (FV)
+ *     Bit 13
+ *     Purpose: indicate whether the flush IE (start/end sequence numbers)
+ *         is valid
+ *     Value:
+ *         1 -> flush IE is valid and needs to be processed
+ *         0 -> flush IE is not valid and should be ignored
+ *   - REL_VALID (RV)
+ *     Bit 13
+ *     Purpose: indicate whether the release IE (start/end sequence numbers)
+ *         is valid
+ *     Value:
+ *         1 -> release IE is valid and needs to be processed
+ *         0 -> release IE is not valid and should be ignored
+ *   - PEER_ID
+ *     Bits 31:16
+ *     Purpose: Identify, by ID, which peer sent the rx data
+ *     Value: ID of the peer who sent the rx data
+ *   - FLUSH_SEQ_NUM_START
+ *     Bits 5:0
+ *     Purpose: Indicate the start of a series of MPDUs to flush
+ *         Not all MPDUs within this series are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ *         This field is only valid if the FV bit is set.
+ *     Value:
+ *         The sequence number for the first MPDUs to check to flush.
+ *         The sequence number is masked by 0x3f.
+ *   - FLUSH_SEQ_NUM_END
+ *     Bits 11:6
+ *     Purpose: Indicate the end of a series of MPDUs to flush
+ *     Value:
+ *         The sequence number one larger than the sequence number of the
+ *         last MPDU to check to flush.
+ *         The sequence number is masked by 0x3f.
+ *         Not all MPDUs within this series are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ *         This field is only valid if the FV bit is set.
+ *   - REL_SEQ_NUM_START
+ *     Bits 17:12
+ *     Purpose: Indicate the start of a series of MPDUs to release.
+ *         All MPDUs within this series are present and valid - the host
+ *         need not check each sequence number within this range to see if
+ *         the corresponding MPDU is actually present.
+ *         This field is only valid if the RV bit is set.
+ *     Value:
+ *         The sequence number for the first MPDUs to check to release.
+ *         The sequence number is masked by 0x3f.
+ *   - REL_SEQ_NUM_END
+ *     Bits 23:18
+ *     Purpose: Indicate the end of a series of MPDUs to release.
+ *     Value:
+ *         The sequence number one larger than the sequence number of the
+ *         last MPDU to check to release.
+ *         The sequence number is masked by 0x3f.
+ *         All MPDUs within this series are present and valid - the host
+ *         need not check each sequence number within this range to see if
+ *         the corresponding MPDU is actually present.
+ *         This field is only valid if the RV bit is set.
+ *   - NUM_MPDU_RANGES
+ *     Bits 31:24
+ *     Purpose: Indicate how many ranges of MPDUs are present.
+ *         Each MPDU range consists of a series of contiguous MPDUs within the
+ *         rx frame sequence which all have the same MPDU status.
+ *     Value: 1-63 (typically a small number, like 1-3)
+ *
+ * Rx PPDU descriptor fields:
+ *   - RSSI_CMB
+ *     Bits 7:0
+ *     Purpose: Combined RSSI from all active rx chains, across the active
+ *         bandwidth.
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - TIMESTAMP_SUBMICROSEC
+ *     Bits 15:8
+ *     Purpose: high-resolution timestamp
+ *     Value:
+ *         Sub-microsecond time of PPDU reception.
+ *         This timestamp ranges from [0,MAC clock MHz).
+ *         This timestamp can be used in conjunction with TIMESTAMP_MICROSEC
+ *         to form a high-resolution, large range rx timestamp.
+ *   - PHY_ERR_CODE
+ *     Bits 23:16
+ *     Purpose:
+ *         If the rx frame processing resulted in a PHY error, indicate what
+ *         type of rx PHY error occurred.
+ *     Value:
+ *         This field is valid if the "P" (PHY_ERR) flag is set.
+ *         TBD: document/specify the values for this field
+ *   - PHY_ERR
+ *     Bit 24
+ *     Purpose: indicate whether the rx PPDU had a PHY error
+ *     Value: 0 -> no rx PHY error, 1 -> rx PHY error encountered
+ *   - LEGACY_RATE
+ *     Bits 28:25
+ *     Purpose:
+ *         If the rx frame used a legacy rate rather than a HT or VHT rate,
+ *         specify which rate was used.
+ *     Value:
+ *         The LEGACY_RATE field's value depends on the "L" (LEGACY_RATE_SEL)
+ *         flag.
+ *         If LEGACY_RATE_SEL is 0:
+ *             0x8: OFDM 48 Mbps
+ *             0x9: OFDM 24 Mbps
+ *             0xA: OFDM 12 Mbps
+ *             0xB: OFDM 6 Mbps
+ *             0xC: OFDM 54 Mbps
+ *             0xD: OFDM 36 Mbps
+ *             0xE: OFDM 18 Mbps
+ *             0xF: OFDM 9 Mbps
+ *         If LEGACY_RATE_SEL is 1:
+ *             0x8: CCK 11 Mbps long preamble
+ *             0x9: CCK 5.5 Mbps long preamble
+ *             0xA: CCK 2 Mbps long preamble
+ *             0xB: CCK 1 Mbps long preamble
+ *             0xC: CCK 11 Mbps short preamble
+ *             0xD: CCK 5.5 Mbps short preamble
+ *             0xE: CCK 2 Mbps short preamble
+ *   - LEGACY_RATE_SEL
+ *     Bit 29
+ *     Purpose: if rx used a legacy rate, specify whether it was OFDM or CCK
+ *     Value:
+ *         This field is valid if the PREAMBLE_TYPE field indicates the rx
+ *         used a legacy rate.
+ *         0 -> OFDM, 1 -> CCK
+ *   - END_VALID
+ *     Bit 30
+ *     Purpose: Indicate whether the FW rx PPDU desc fields associated with
+ *         the start of the PPDU are valid.  Specifically, the following
+ *         fields are only valid if END_VALID is set:
+ *         PHY_ERR, PHY_ERR_CODE, TSF32, TIMESTAMP_MICROSEC,
+ *         TIMESTAMP_SUBMICROSEC
+ *     Value:
+ *         0 -> rx PPDU desc end fields are not valid
+ *         1 -> rx PPDU desc end fields are valid
+ *   - START_VALID
+ *     Bit 31
+ *     Purpose: Indicate whether the FW rx PPDU desc fields associated with
+ *         the end of the PPDU are valid.  Specifically, the following
+ *         fields are only valid if START_VALID is set:
+ *         RSSI, LEGACY_RATE_SEL, LEGACY_RATE, PREAMBLE_TYPE, SERVICE,
+ *         VHT-SIG-A
+ *     Value:
+ *         0 -> rx PPDU desc start fields are not valid
+ *         1 -> rx PPDU desc start fields are valid
+ *   - RSSI0_PRI20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 0 on the primary 20 MHz channel
+ *     Value: RSSI dB units w.r.t. noise floor
+ *
+ *   - RSSI0_EXT20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 0 on the bonded extension 20 MHz channel
+ *         (if the rx bandwidth was >= 40 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI0_EXT40
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 0 on the bonded extension 40 MHz channel
+ *         (if the rx bandwidth was >= 80 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI0_EXT80
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 0 on the bonded extension 80 MHz channel
+ *         (if the rx bandwidth was >= 160 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *
+ *   - RSSI1_PRI20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 1 on the primary 20 MHz channel
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI1_EXT20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 1 on the bonded extension 20 MHz channel
+ *         (if the rx bandwidth was >= 40 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI1_EXT40
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 1 on the bonded extension 40 MHz channel
+ *         (if the rx bandwidth was >= 80 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI1_EXT80
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 1 on the bonded extension 80 MHz channel
+ *         (if the rx bandwidth was >= 160 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *
+ *   - RSSI2_PRI20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 2 on the primary 20 MHz channel
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI2_EXT20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 2 on the bonded extension 20 MHz channel
+ *         (if the rx bandwidth was >= 40 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI2_EXT40
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 2 on the bonded extension 40 MHz channel
+ *         (if the rx bandwidth was >= 80 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI2_EXT80
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 2 on the bonded extension 80 MHz channel
+ *         (if the rx bandwidth was >= 160 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *
+ *   - RSSI3_PRI20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 3 on the primary 20 MHz channel
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI3_EXT20
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 3 on the bonded extension 20 MHz channel
+ *         (if the rx bandwidth was >= 40 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI3_EXT40
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 3 on the bonded extension 40 MHz channel
+ *         (if the rx bandwidth was >= 80 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *   - RSSI3_EXT80
+ *     Bits 7:0
+ *     Purpose: RSSI from chain 3 on the bonded extension 80 MHz channel
+ *         (if the rx bandwidth was >= 160 MHz)
+ *     Value: RSSI dB units w.r.t. noise floor
+ *
+ *   - TSF32
+ *     Bits 31:0
+ *     Purpose: specify the time the rx PPDU was received, in TSF units
+ *     Value: 32 LSBs of the TSF
+ *   - TIMESTAMP_MICROSEC
+ *     Bits 31:0
+ *     Purpose: specify the time the rx PPDU was received, in microsecond units
+ *     Value: PPDU rx time, in microseconds
+ *   - VHT_SIG_A1
+ *     Bits 23:0
+ *     Purpose: Provide the HT-SIG (initial 24 bits) or VHT-SIG-A1 field
+ *         from the rx PPDU
+ *     Value:
+ *         If PREAMBLE_TYPE specifies VHT, then this field contains the
+ *         VHT-SIG-A1 data.
+ *         If PREAMBLE_TYPE specifies HT, then this field contains the
+ *         first 24 bits of the HT-SIG data.
+ *         Otherwise, this field is invalid.
+ *         Refer to the the 802.11 protocol for the definition of the
+ *         HT-SIG and VHT-SIG-A1 fields
+ *   - VHT_SIG_A2
+ *     Bits 23:0
+ *     Purpose: Provide the HT-SIG (final 24 bits) or VHT-SIG-A2 field
+ *         from the rx PPDU
+ *     Value:
+ *         If PREAMBLE_TYPE specifies VHT, then this field contains the
+ *         VHT-SIG-A2 data.
+ *         If PREAMBLE_TYPE specifies HT, then this field contains the
+ *         last 24 bits of the HT-SIG data.
+ *         Otherwise, this field is invalid.
+ *         Refer to the the 802.11 protocol for the definition of the
+ *         HT-SIG and VHT-SIG-A2 fields
+ *   - PREAMBLE_TYPE
+ *     Bits 31:24
+ *     Purpose: indicate the PHY format of the received burst
+ *     Value:
+ *         0x4: Legacy (OFDM/CCK)
+ *         0x8: HT
+ *         0x9: HT with TxBF
+ *         0xC: VHT
+ *         0xD: VHT with TxBF
+ *   - SERVICE
+ *     Bits 31:24
+ *     Purpose: TBD
+ *     Value: TBD
+ *
+ * Rx MSDU descriptor fields:
+ *   - FW_RX_DESC_BYTES
+ *     Bits 15:0
+ *     Purpose: Indicate how many bytes in the Rx indication are used for
+ *         FW Rx descriptors
+ *
+ * Payload fields:
+ *   - MPDU_COUNT
+ *     Bits 7:0
+ *     Purpose: Indicate how many sequential MPDUs share the same status.
+ *         All MPDUs within the indicated list are from the same RA-TA-TID.
+ *   - MPDU_STATUS
+ *     Bits 15:8
+ *     Purpose: Indicate whether the (group of sequential) MPDU(s) were
+ *         received successfully.
+ *     Value:
+ *         0x1: success
+ *         0x2: FCS error
+ *         0x3: duplicate error
+ *         0x4: replay error
+ *         0x5: invalid peer
+ */
+/* header fields */
+#define HTT_RX_IND_EXT_TID_M      0x1f00
+#define HTT_RX_IND_EXT_TID_S      8
+#define HTT_RX_IND_FLUSH_VALID_M  0x2000
+#define HTT_RX_IND_FLUSH_VALID_S  13
+#define HTT_RX_IND_REL_VALID_M    0x4000
+#define HTT_RX_IND_REL_VALID_S    14
+#define HTT_RX_IND_PEER_ID_M      0xffff0000
+#define HTT_RX_IND_PEER_ID_S      16
+
+#define HTT_RX_IND_FLUSH_SEQ_NUM_START_M 0x3f
+#define HTT_RX_IND_FLUSH_SEQ_NUM_START_S 0
+#define HTT_RX_IND_FLUSH_SEQ_NUM_END_M   0xfc0
+#define HTT_RX_IND_FLUSH_SEQ_NUM_END_S   6
+#define HTT_RX_IND_REL_SEQ_NUM_START_M   0x3f000
+#define HTT_RX_IND_REL_SEQ_NUM_START_S   12
+#define HTT_RX_IND_REL_SEQ_NUM_END_M     0xfc0000
+#define HTT_RX_IND_REL_SEQ_NUM_END_S     18
+#define HTT_RX_IND_NUM_MPDU_RANGES_M     0xff000000
+#define HTT_RX_IND_NUM_MPDU_RANGES_S     24
+
+/* rx PPDU descriptor fields */
+#define HTT_RX_IND_RSSI_CMB_M              0x000000ff
+#define HTT_RX_IND_RSSI_CMB_S              0
+#define HTT_RX_IND_TIMESTAMP_SUBMICROSEC_M 0x0000ff00
+#define HTT_RX_IND_TIMESTAMP_SUBMICROSEC_S 8
+#define HTT_RX_IND_PHY_ERR_CODE_M          0x00ff0000
+#define HTT_RX_IND_PHY_ERR_CODE_S          16
+#define HTT_RX_IND_PHY_ERR_M               0x01000000
+#define HTT_RX_IND_PHY_ERR_S               24
+#define HTT_RX_IND_LEGACY_RATE_M           0x1e000000
+#define HTT_RX_IND_LEGACY_RATE_S           25
+#define HTT_RX_IND_LEGACY_RATE_SEL_M       0x20000000
+#define HTT_RX_IND_LEGACY_RATE_SEL_S       29
+#define HTT_RX_IND_END_VALID_M             0x40000000
+#define HTT_RX_IND_END_VALID_S             30
+#define HTT_RX_IND_START_VALID_M           0x80000000
+#define HTT_RX_IND_START_VALID_S           31
+
+#define HTT_RX_IND_RSSI_PRI20_M            0x000000ff
+#define HTT_RX_IND_RSSI_PRI20_S            0
+#define HTT_RX_IND_RSSI_EXT20_M            0x0000ff00
+#define HTT_RX_IND_RSSI_EXT20_S            8
+#define HTT_RX_IND_RSSI_EXT40_M            0x00ff0000
+#define HTT_RX_IND_RSSI_EXT40_S            16
+#define HTT_RX_IND_RSSI_EXT80_M            0xff000000
+#define HTT_RX_IND_RSSI_EXT80_S            24
+
+#define HTT_RX_IND_VHT_SIG_A1_M            0x00ffffff
+#define HTT_RX_IND_VHT_SIG_A1_S            0
+#define HTT_RX_IND_VHT_SIG_A2_M            0x00ffffff
+#define HTT_RX_IND_VHT_SIG_A2_S            0
+#define HTT_RX_IND_PREAMBLE_TYPE_M         0xff000000
+#define HTT_RX_IND_PREAMBLE_TYPE_S         24
+#define HTT_RX_IND_SERVICE_M               0xff000000
+#define HTT_RX_IND_SERVICE_S               24
+
+/* rx MSDU descriptor fields */
+#define HTT_RX_IND_FW_RX_DESC_BYTES_M   0xffff
+#define HTT_RX_IND_FW_RX_DESC_BYTES_S   0
+
+/* payload fields */
+#define HTT_RX_IND_MPDU_COUNT_M    0xff
+#define HTT_RX_IND_MPDU_COUNT_S    0
+#define HTT_RX_IND_MPDU_STATUS_M   0xff00
+#define HTT_RX_IND_MPDU_STATUS_S   8
+
+
+#define HTT_RX_IND_EXT_TID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_EXT_TID, value);	\
+		(word) |= (value)  << HTT_RX_IND_EXT_TID_S;	\
+	} while (0)
+#define HTT_RX_IND_EXT_TID_GET(word)					\
+	(((word) & HTT_RX_IND_EXT_TID_M) >> HTT_RX_IND_EXT_TID_S)
+
+#define HTT_RX_IND_FLUSH_VALID_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_FLUSH_VALID, value);	\
+		(word) |= (value)  << HTT_RX_IND_FLUSH_VALID_S;		\
+	} while (0)
+#define HTT_RX_IND_FLUSH_VALID_GET(word)				\
+	(((word) & HTT_RX_IND_FLUSH_VALID_M) >> HTT_RX_IND_FLUSH_VALID_S)
+
+#define HTT_RX_IND_REL_VALID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_REL_VALID, value);	\
+		(word) |= (value)  << HTT_RX_IND_REL_VALID_S;	\
+	} while (0)
+#define HTT_RX_IND_REL_VALID_GET(word)					\
+	(((word) & HTT_RX_IND_REL_VALID_M) >> HTT_RX_IND_REL_VALID_S)
+
+#define HTT_RX_IND_PEER_ID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_PEER_ID, value);	\
+		(word) |= (value)  << HTT_RX_IND_PEER_ID_S;	\
+	} while (0)
+#define HTT_RX_IND_PEER_ID_GET(word)					\
+	(((word) & HTT_RX_IND_PEER_ID_M) >> HTT_RX_IND_PEER_ID_S)
+
+
+#define HTT_RX_IND_FW_RX_DESC_BYTES_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_FW_RX_DESC_BYTES, value);	\
+		(word) |= (value)  << HTT_RX_IND_FW_RX_DESC_BYTES_S;	\
+	} while (0)
+#define HTT_RX_IND_FW_RX_DESC_BYTES_GET(word)				\
+	(((word) & HTT_RX_IND_FW_RX_DESC_BYTES_M) >>			\
+	HTT_RX_IND_FW_RX_DESC_BYTES_S)
+
+
+#define HTT_RX_IND_FLUSH_SEQ_NUM_START_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_FLUSH_SEQ_NUM_START, value); \
+		(word) |= (value)  << HTT_RX_IND_FLUSH_SEQ_NUM_START_S;	\
+	} while (0)
+#define HTT_RX_IND_FLUSH_SEQ_NUM_START_GET(word)	\
+	(((word) & HTT_RX_IND_FLUSH_SEQ_NUM_START_M) >>	\
+	 HTT_RX_IND_FLUSH_SEQ_NUM_START_S)
+
+#define HTT_RX_IND_FLUSH_SEQ_NUM_END_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_FLUSH_SEQ_NUM_END, value);	\
+		(word) |= (value)  << HTT_RX_IND_FLUSH_SEQ_NUM_END_S;	\
+	} while (0)
+#define HTT_RX_IND_FLUSH_SEQ_NUM_END_GET(word)		\
+	(((word) & HTT_RX_IND_FLUSH_SEQ_NUM_END_M) >>	\
+	 HTT_RX_IND_FLUSH_SEQ_NUM_END_S)
+
+#define HTT_RX_IND_REL_SEQ_NUM_START_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_REL_SEQ_NUM_START, value);	\
+		(word) |= (value)  << HTT_RX_IND_REL_SEQ_NUM_START_S;	\
+	} while (0)
+#define HTT_RX_IND_REL_SEQ_NUM_START_GET(word)		\
+	(((word) & HTT_RX_IND_REL_SEQ_NUM_START_M) >>	\
+	 HTT_RX_IND_REL_SEQ_NUM_START_S)
+
+#define HTT_RX_IND_REL_SEQ_NUM_END_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_REL_SEQ_NUM_END, value);	\
+		(word) |= (value)  << HTT_RX_IND_REL_SEQ_NUM_END_S;	\
+	} while (0)
+#define HTT_RX_IND_REL_SEQ_NUM_END_GET(word)		\
+	(((word) & HTT_RX_IND_REL_SEQ_NUM_END_M) >>	\
+	 HTT_RX_IND_REL_SEQ_NUM_END_S)
+
+#define HTT_RX_IND_NUM_MPDU_RANGES_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_NUM_MPDU_RANGES, value);	\
+		(word) |= (value)  << HTT_RX_IND_NUM_MPDU_RANGES_S;	\
+	} while (0)
+#define HTT_RX_IND_NUM_MPDU_RANGES_GET(word)		\
+	(((word) & HTT_RX_IND_NUM_MPDU_RANGES_M) >>	\
+	 HTT_RX_IND_NUM_MPDU_RANGES_S)
+
+/* FW rx PPDU descriptor fields */
+#define HTT_RX_IND_RSSI_CMB_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_RSSI_CMB, value);	\
+		(word) |= (value)  << HTT_RX_IND_RSSI_CMB_S;	\
+	} while (0)
+#define HTT_RX_IND_RSSI_CMB_GET(word)		\
+	(((word) & HTT_RX_IND_RSSI_CMB_M) >>	\
+	 HTT_RX_IND_RSSI_CMB_S)
+
+#define HTT_RX_IND_TIMESTAMP_SUBMICROSEC_SET(word, value)		\
+	do {                                                            \
+		HTT_CHECK_SET_VAL(HTT_RX_IND_TIMESTAMP_SUBMICROSEC, value); \
+		(word) |= (value)  << HTT_RX_IND_TIMESTAMP_SUBMICROSEC_S; \
+	} while (0)
+#define HTT_RX_IND_TIMESTAMP_SUBMICROSEC_GET(word)		\
+	(((word) & HTT_RX_IND_TIMESTAMP_SUBMICROSEC_M) >>	\
+	 HTT_RX_IND_TIMESTAMP_SUBMICROSEC_S)
+
+#define HTT_RX_IND_PHY_ERR_CODE_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_PHY_ERR_CODE, value);	\
+		(word) |= (value)  << HTT_RX_IND_PHY_ERR_CODE_S;	\
+	} while (0)
+#define HTT_RX_IND_PHY_ERR_CODE_GET(word)		\
+	(((word) & HTT_RX_IND_PHY_ERR_CODE_M) >>	\
+	 HTT_RX_IND_PHY_ERR_CODE_S)
+
+#define HTT_RX_IND_PHY_ERR_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_PHY_ERR, value);	\
+		(word) |= (value)  << HTT_RX_IND_PHY_ERR_S;	\
+	} while (0)
+#define HTT_RX_IND_PHY_ERR_GET(word)		\
+	(((word) & HTT_RX_IND_PHY_ERR_M) >>	\
+	 HTT_RX_IND_PHY_ERR_S)
+
+#define HTT_RX_IND_LEGACY_RATE_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_LEGACY_RATE, value);	\
+		(word) |= (value)  << HTT_RX_IND_LEGACY_RATE_S;		\
+	} while (0)
+#define HTT_RX_IND_LEGACY_RATE_GET(word)	\
+	(((word) & HTT_RX_IND_LEGACY_RATE_M) >> \
+	 HTT_RX_IND_LEGACY_RATE_S)
+
+#define HTT_RX_IND_LEGACY_RATE_SEL_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_LEGACY_RATE_SEL, value);	\
+		(word) |= (value)  << HTT_RX_IND_LEGACY_RATE_SEL_S;	\
+	} while (0)
+#define HTT_RX_IND_LEGACY_RATE_SEL_GET(word)		\
+	(((word) & HTT_RX_IND_LEGACY_RATE_SEL_M) >>	\
+	 HTT_RX_IND_LEGACY_RATE_SEL_S)
+
+#define HTT_RX_IND_END_VALID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_END_VALID, value); \
+		(word) |= (value)  << HTT_RX_IND_END_VALID_S;   \
+	} while (0)
+#define HTT_RX_IND_END_VALID_GET(word)		\
+	(((word) & HTT_RX_IND_END_VALID_M) >>	\
+	 HTT_RX_IND_END_VALID_S)
+
+#define HTT_RX_IND_START_VALID_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_START_VALID, value);	\
+		(word) |= (value)  << HTT_RX_IND_START_VALID_S;		\
+	} while (0)
+#define HTT_RX_IND_START_VALID_GET(word)	\
+	(((word) & HTT_RX_IND_START_VALID_M) >> \
+	 HTT_RX_IND_START_VALID_S)
+
+#define HTT_RX_IND_RSSI_PRI20_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_RSSI_PRI20, value);	\
+		(word) |= (value)  << HTT_RX_IND_RSSI_PRI20_S;		\
+	} while (0)
+#define HTT_RX_IND_RSSI_PRI20_GET(word)		\
+	(((word) & HTT_RX_IND_RSSI_PRI20_M) >>	\
+	 HTT_RX_IND_RSSI_PRI20_S)
+
+#define HTT_RX_IND_RSSI_EXT20_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_RSSI_EXT20, value);	\
+		(word) |= (value)  << HTT_RX_IND_RSSI_EXT20_S;		\
+	} while (0)
+#define HTT_RX_IND_RSSI_EXT20_GET(word)		\
+	(((word) & HTT_RX_IND_RSSI_EXT20_M) >>	\
+	 HTT_RX_IND_RSSI_EXT20_S)
+
+#define HTT_RX_IND_RSSI_EXT40_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_RSSI_EXT40, value);	\
+		(word) |= (value)  << HTT_RX_IND_RSSI_EXT40_S;		\
+	} while (0)
+#define HTT_RX_IND_RSSI_EXT40_GET(word)		\
+	(((word) & HTT_RX_IND_RSSI_EXT40_M) >>	\
+	 HTT_RX_IND_RSSI_EXT40_S)
+
+#define HTT_RX_IND_RSSI_EXT80_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_RSSI_EXT80, value);	\
+		(word) |= (value)  << HTT_RX_IND_RSSI_EXT80_S;		\
+	} while (0)
+#define HTT_RX_IND_RSSI_EXT80_GET(word)		\
+	(((word) & HTT_RX_IND_RSSI_EXT80_M) >>	\
+	 HTT_RX_IND_RSSI_EXT80_S)
+
+#define HTT_RX_IND_VHT_SIG_A1_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_VHT_SIG_A1, value);	\
+		(word) |= (value)  << HTT_RX_IND_VHT_SIG_A1_S;		\
+	} while (0)
+#define HTT_RX_IND_VHT_SIG_A1_GET(word)		\
+	(((word) & HTT_RX_IND_VHT_SIG_A1_M) >>	\
+	 HTT_RX_IND_VHT_SIG_A1_S)
+
+#define HTT_RX_IND_VHT_SIG_A2_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_VHT_SIG_A2, value);	\
+		(word) |= (value)  << HTT_RX_IND_VHT_SIG_A2_S;		\
+	} while (0)
+#define HTT_RX_IND_VHT_SIG_A2_GET(word)		\
+	(((word) & HTT_RX_IND_VHT_SIG_A2_M) >>	\
+	 HTT_RX_IND_VHT_SIG_A2_S)
+
+#define HTT_RX_IND_PREAMBLE_TYPE_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_PREAMBLE_TYPE, value);	\
+		(word) |= (value)  << HTT_RX_IND_PREAMBLE_TYPE_S;	\
+	} while (0)
+#define HTT_RX_IND_PREAMBLE_TYPE_GET(word)		\
+	(((word) & HTT_RX_IND_PREAMBLE_TYPE_M) >>	\
+	 HTT_RX_IND_PREAMBLE_TYPE_S)
+
+#define HTT_RX_IND_SERVICE_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_SERVICE, value);	\
+		(word) |= (value)  << HTT_RX_IND_SERVICE_S;	\
+	} while (0)
+#define HTT_RX_IND_SERVICE_GET(word)		\
+	(((word) & HTT_RX_IND_SERVICE_M) >>	\
+	 HTT_RX_IND_SERVICE_S)
+
+
+#define HTT_RX_IND_MPDU_COUNT_SET(word, value)                          \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_MPDU_COUNT, value);	\
+		(word) |= (value)  << HTT_RX_IND_MPDU_COUNT_S;		\
+	} while (0)
+#define HTT_RX_IND_MPDU_COUNT_GET(word)					\
+	(((word) & HTT_RX_IND_MPDU_COUNT_M) >> HTT_RX_IND_MPDU_COUNT_S)
+
+#define HTT_RX_IND_MPDU_STATUS_SET(word, value)                         \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_IND_MPDU_STATUS, value);	\
+		(word) |= (value)  << HTT_RX_IND_MPDU_STATUS_S;		\
+	} while (0)
+#define HTT_RX_IND_MPDU_STATUS_GET(word)				\
+	(((word) & HTT_RX_IND_MPDU_STATUS_M) >> HTT_RX_IND_MPDU_STATUS_S)
+
+
+#define HTT_RX_IND_HL_BYTES					\
+	(HTT_RX_IND_HDR_BYTES +					\
+	 4 /* single FW rx MSDU descriptor, plus padding */ +	\
+	 4 /* single MPDU range information element */)
+#define HTT_RX_IND_HL_SIZE32 (HTT_RX_IND_HL_BYTES >> 2)
+
+/* Could we use one macro entry? */
+#define HTT_WORD_SET(word, field, value)		\
+	do {						\
+		HTT_CHECK_SET_VAL(field, value);	\
+		(word) |= ((value) << field ## _S);	\
+	} while (0)
+#define HTT_WORD_GET(word, field)		\
+	(((word) & field ## _M) >> field ## _S)
+
+PREPACK struct hl_htt_rx_ind_base {
+	/*
+	 * align with LL case rx indication message,but
+	 * reduced to 5 words
+	 */
+	A_UINT32 rx_ind_msg[HTT_RX_IND_HL_SIZE32];
+} POSTPACK;
+
+/*
+ * HTT_RX_IND_HL_RX_DESC_BASE_OFFSET
+ * Currently, we use a resv field in hl_htt_rx_ind_base to store some
+ * HL host needed info. The field is just after the msdu fw rx desc.
+ */
+#define HTT_RX_IND_HL_RX_DESC_BASE_OFFSET		\
+		(HTT_RX_IND_FW_RX_DESC_BYTE_OFFSET + 1)
+struct htt_rx_ind_hl_rx_desc_t {
+	A_UINT8 ver;
+	A_UINT8 len;
+	struct {
+		A_UINT8
+		    first_msdu:1,
+		    last_msdu:1,
+		    c3_failed:1,
+			c4_failed:1,
+			ipv6:1,
+			tcp:1,
+			udp:1,
+			reserved:1;
+	} flags;
+};
+
+#define HTT_RX_IND_HL_RX_DESC_VER_OFFSET			\
+	(HTT_RX_IND_HL_RX_DESC_BASE_OFFSET			\
+	 + offsetof(struct htt_rx_ind_hl_rx_desc_t, ver))
+#define HTT_RX_IND_HL_RX_DESC_VER 0
+
+#define HTT_RX_IND_HL_RX_DESC_LEN_OFFSET			\
+	(HTT_RX_IND_HL_RX_DESC_BASE_OFFSET			\
+	 + offsetof(struct htt_rx_ind_hl_rx_desc_t, len))
+
+#define HTT_RX_IND_HL_FLAG_OFFSET				\
+	(HTT_RX_IND_HL_RX_DESC_BASE_OFFSET			\
+	 + offsetof(struct htt_rx_ind_hl_rx_desc_t, flags))
+
+#define HTT_RX_IND_HL_FLAG_FIRST_MSDU   (0x01 << 0)
+#define HTT_RX_IND_HL_FLAG_LAST_MSDU    (0x01 << 1)
+#define HTT_RX_IND_HL_FLAG_C3_FAILED    (0x01 << 2)	/* L3 checksum failed */
+#define HTT_RX_IND_HL_FLAG_C4_FAILED    (0x01 << 3)	/* L4 checksum failed */
+#define HTT_RX_IND_HL_FLAG_IPV6         (0x01 << 4)	/* is ipv6, or ipv4 */
+#define HTT_RX_IND_HL_FLAG_TCP          (0x01 << 5)	/* is tcp */
+#define HTT_RX_IND_HL_FLAG_UDP          (0x01 << 6)	/* is udp */
+/* This structure is used in HL, the basic descriptor information
+ * used by host. the structure is translated by FW from HW desc
+ * or generated by FW. But in HL monitor mode, the host would use
+ * the same structure with LL.
+ */
+PREPACK struct hl_htt_rx_desc_base {
+	A_UINT32
+		seq_num:12,
+		encrypted:1,
+		chan_info_present:1,
+		resv0:2,
+		mcast_bcast:1,
+		fragment:1,
+		key_id_oct:8,
+		resv1:6;
+	A_UINT32 pn_31_0;
+	union {
+		struct {
+			A_UINT16 pn_47_32;
+			A_UINT16 pn_63_48;
+		} pn16;
+		A_UINT32 pn_63_32;
+	} u0;
+	A_UINT32  pn_95_64;
+	A_UINT32  pn_127_96;
+} POSTPACK;
+
+/*
+ * Channel information can optionally be appended after hl_htt_rx_desc_base.
+ * If so, the len field in htt_rx_ind_hl_rx_desc_t will be updated accordingly,
+ * and the chan_info_present flag in hl_htt_rx_desc_base will be set.
+ * Please see htt_chan_change_t for description of the fields.
+ */
+PREPACK struct htt_chan_info_t
+{
+	A_UINT32
+		primary_chan_center_freq_mhz:16,
+		contig_chan1_center_freq_mhz:16;
+	A_UINT32
+		contig_chan2_center_freq_mhz:16,
+		phy_mode:8,
+		reserved:8;
+} POSTPACK;
+
+#define HTT_CHAN_INFO_SIZE      sizeof(struct htt_chan_info_t)
+
+#define HL_RX_DESC_SIZE         (sizeof(struct hl_htt_rx_desc_base))
+#define HL_RX_DESC_SIZE_DWORD   (HL_RX_STD_DESC_SIZE >> 2)
+
+#define HTT_HL_RX_DESC_MPDU_SEQ_NUM_M       0xfff
+#define HTT_HL_RX_DESC_MPDU_SEQ_NUM_S       0
+#define HTT_HL_RX_DESC_MPDU_ENC_M           0x1000
+#define HTT_HL_RX_DESC_MPDU_ENC_S           12
+#define HTT_HL_RX_DESC_CHAN_INFO_PRESENT_M  0x2000
+#define HTT_HL_RX_DESC_CHAN_INFO_PRESENT_S  13
+#define HTT_HL_RX_DESC_MCAST_BCAST_M        0x10000
+#define HTT_HL_RX_DESC_MCAST_BCAST_S        16
+#define HTT_HL_RX_DESC_FRAGMENT_M           0x20000
+#define HTT_HL_RX_DESC_FRAGMENT_S           17
+#define HTT_HL_RX_DESC_KEY_ID_OCT_M         0x3fc0000
+#define HTT_HL_RX_DESC_KEY_ID_OCT_S         18
+
+#define HTT_HL_RX_DESC_PN_OFFSET		\
+	offsetof(struct hl_htt_rx_desc_base, pn_31_0)
+#define HTT_HL_RX_DESC_PN_WORD_OFFSET	\
+	(HTT_HL_RX_DESC_PN_OFFSET >> 2)
+
+/* Channel information */
+#define HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_M   0x0000ffff
+#define HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_S   0
+#define HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_M   0xffff0000
+#define HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_S   16
+#define HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_M   0x0000ffff
+#define HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_S   0
+#define HTT_CHAN_INFO_PHY_MODE_M                   0x00ff0000
+#define HTT_CHAN_INFO_PHY_MODE_S                   16
+
+
+#define HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ, value);	\
+		(word) |= (value)  << HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_S;		\
+	} while (0)
+#define HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_GET(word)			\
+	(((word) & HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_M)			\
+				>> HTT_CHAN_INFO_PRIMARY_CHAN_CENTER_FREQ_S)
+
+
+#define HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ, value);	\
+		(word) |= (value)  << HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_S;		\
+	} while (0)
+#define HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_GET(word)			\
+	(((word) & HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_M)			\
+			>> HTT_CHAN_INFO_CONTIG_CHAN1_CENTER_FREQ_S)
+
+
+#define HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ, value);	\
+		(word) |= (value)  << HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_S;		\
+	} while (0)
+#define HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_GET(word)			\
+		(((word) & HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_M)		\
+			>> HTT_CHAN_INFO_CONTIG_CHAN2_CENTER_FREQ_S)
+
+
+#define HTT_CHAN_INFO_PHY_MODE_SET(word, value)					\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_CHAN_INFO_PHY_MODE, value);			\
+		(word) |= (value)  << HTT_CHAN_INFO_PHY_MODE_S;				\
+	} while (0)
+#define HTT_CHAN_INFO_PHY_MODE_GET(word)				\
+		(((word) & HTT_CHAN_INFO_PHY_MODE_M)			\
+		>> HTT_CHAN_INFO_PHY_MODE_S)
+
+/*
+ * @brief target -> host rx reorder flush message definition
+ *
+ * @details
+ * The following field definitions describe the format of the rx flush
+ * message sent from the target to the host.
+ * The message consists of a 4-octet header, followed by one or more
+ * 4-octet payload information elements.
+ *
+ *     |31           24|23                            8|7            0|
+ *     |--------------------------------------------------------------|
+ *     |       TID     |          peer ID              |   msg type   |
+ *     |--------------------------------------------------------------|
+ *     |  seq num end  | seq num start |  MPDU status  |   reserved   |
+ *     |--------------------------------------------------------------|
+ * First DWORD:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx flush message
+ *     Value: 0x2
+ *   - PEER_ID
+ *     Bits 23:8 (only bits 18:8 actually used)
+ *     Purpose: identify which peer's rx data is being flushed
+ *     Value: (rx) peer ID
+ *   - TID
+ *     Bits 31:24 (only bits 27:24 actually used)
+ *     Purpose: Specifies which traffic identifier's rx data is being flushed
+ *     Value: traffic identifier
+ * Second DWORD:
+ *   - MPDU_STATUS
+ *     Bits 15:8
+ *     Purpose:
+ *         Indicate whether the flushed MPDUs should be discarded or processed.
+ *     Value:
+ *         0x1:   send the MPDUs from the rx reorder buffer to subsequent
+ *                stages of rx processing
+ *         other: discard the MPDUs
+ *         It is anticipated that flush messages will always have
+ *         MPDU status == 1, but the status flag is included for
+ *         flexibility.
+ *   - SEQ_NUM_START
+ *     Bits 23:16
+ *     Purpose:
+ *         Indicate the start of a series of consecutive MPDUs being flushed.
+ *         Not all MPDUs within this range are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ *     Value:
+ *         The sequence number for the first MPDU in the sequence.
+ *         This sequence number is the 6 LSBs of the 802.11 sequence number.
+ *   - SEQ_NUM_END
+ *     Bits 30:24
+ *     Purpose:
+ *         Indicate the end of a series of consecutive MPDUs being flushed.
+ *     Value:
+ *         The sequence number one larger than the sequence number of the
+ *         last MPDU being flushed.
+ *         This sequence number is the 6 LSBs of the 802.11 sequence number.
+ *         The range of MPDUs from [SEQ_NUM_START,SEQ_NUM_END-1] inclusive
+ *         are to be released for further rx processing.
+ *         Not all MPDUs within this range are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ */
+/* first DWORD */
+#define HTT_RX_FLUSH_PEER_ID_M  0xffff00
+#define HTT_RX_FLUSH_PEER_ID_S  8
+#define HTT_RX_FLUSH_TID_M      0xff000000
+#define HTT_RX_FLUSH_TID_S      24
+/* second DWORD */
+#define HTT_RX_FLUSH_MPDU_STATUS_M   0x0000ff00
+#define HTT_RX_FLUSH_MPDU_STATUS_S   8
+#define HTT_RX_FLUSH_SEQ_NUM_START_M 0x00ff0000
+#define HTT_RX_FLUSH_SEQ_NUM_START_S 16
+#define HTT_RX_FLUSH_SEQ_NUM_END_M   0xff000000
+#define HTT_RX_FLUSH_SEQ_NUM_END_S   24
+
+#define HTT_RX_FLUSH_BYTES 8
+
+#define HTT_RX_FLUSH_PEER_ID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_FLUSH_PEER_ID, value);	\
+		(word) |= (value)  << HTT_RX_FLUSH_PEER_ID_S;	\
+	} while (0)
+#define HTT_RX_FLUSH_PEER_ID_GET(word)					\
+	(((word) & HTT_RX_FLUSH_PEER_ID_M) >> HTT_RX_FLUSH_PEER_ID_S)
+
+#define HTT_RX_FLUSH_TID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_FLUSH_TID, value);	\
+		(word) |= (value)  << HTT_RX_FLUSH_TID_S;	\
+	} while (0)
+#define HTT_RX_FLUSH_TID_GET(word)				\
+	(((word) & HTT_RX_FLUSH_TID_M) >> HTT_RX_FLUSH_TID_S)
+
+#define HTT_RX_FLUSH_MPDU_STATUS_SET(word, value)	\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_FLUSH_MPDU_STATUS, value);	\
+		(word) |= (value)  << HTT_RX_FLUSH_MPDU_STATUS_S;	\
+	} while (0)
+#define HTT_RX_FLUSH_MPDU_STATUS_GET(word)				\
+	(((word) & HTT_RX_FLUSH_MPDU_STATUS_M) >> HTT_RX_FLUSH_MPDU_STATUS_S)
+
+#define HTT_RX_FLUSH_SEQ_NUM_START_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_FLUSH_SEQ_NUM_START, value);	\
+		(word) |= (value)  << HTT_RX_FLUSH_SEQ_NUM_START_S;	\
+	} while (0)
+#define HTT_RX_FLUSH_SEQ_NUM_START_GET(word)				\
+	(((word) & HTT_RX_FLUSH_SEQ_NUM_START_M) >>		\
+	HTT_RX_FLUSH_SEQ_NUM_START_S)
+
+#define HTT_RX_FLUSH_SEQ_NUM_END_SET(word, value)	\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_FLUSH_SEQ_NUM_END, value);	\
+		(word) |= (value)  << HTT_RX_FLUSH_SEQ_NUM_END_S;	\
+	} while (0)
+#define HTT_RX_FLUSH_SEQ_NUM_END_GET(word)				\
+	(((word) & HTT_RX_FLUSH_SEQ_NUM_END_M) >> HTT_RX_FLUSH_SEQ_NUM_END_S)
+
+/*
+ * @brief target -> host rx pn check indication message
+ *
+ * @details
+ * The following field definitions describe the format of the Rx PN check
+ * indication message sent from the target to the host.
+ * The message consists of a 4-octet header, followed by the start and
+ * end sequence numbers to be released, followed by the PN IEs. Each PN
+ * IE is one octet containing the sequence number that failed the PN
+ * check.
+ *
+ *     |31           24|23                            8|7            0|
+ *     |--------------------------------------------------------------|
+ *     |       TID     |          peer ID              |   msg type   |
+ *     |--------------------------------------------------------------|
+ *     |  Reserved     | PN IE count   | seq num end   | seq num start|
+ *     |--------------------------------------------------------------|
+ *     l               :    PN IE 2    |    PN IE 1    |   PN IE 0    |
+ *     |--------------------------------------------------------------|
+
+ * First DWORD:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: Identifies this as an rx pn check indication message
+ *     Value: 0x2
+ *   - PEER_ID
+ *     Bits 23:8 (only bits 18:8 actually used)
+ *     Purpose: identify which peer
+ *     Value: (rx) peer ID
+ *   - TID
+ *     Bits 31:24 (only bits 27:24 actually used)
+ *     Purpose: identify traffic identifier
+ *     Value: traffic identifier
+ * Second DWORD:
+ *   - SEQ_NUM_START
+ *     Bits 7:0
+ *     Purpose:
+ *        Indicates the starting sequence number of the MPDU in this
+ *        series of MPDUs that went though PN check.
+ *     Value:
+ *        The sequence number for the first MPDU in the sequence.
+ *        This sequence number is the 6 LSBs of the 802.11 sequence number.
+ *   - SEQ_NUM_END
+ *     Bits 15:8
+ *     Purpose:
+ *        Indicates the ending sequence number of the MPDU in this
+ *        series of MPDUs that went though PN check.
+ *     Value:
+ *        The sequence number one larger then the sequence number of the last
+ *        MPDU being flushed.
+ *        This sequence number is the 6 LSBs of the 802.11 sequence number.
+ *        The range of MPDUs from [SEQ_NUM_START,SEQ_NUM_END-1]
+ *        have been checked for invalid PN numbers and are ready
+ *        to be released for further processing.
+ *        Not all MPDUs within this range are necessarily valid - the host
+ *        must check each sequence number within this range to see if the
+ *        corresponding MPDU is actually present.
+ *   - PN_IE_COUNT
+ *     Bits 23:16
+ *     Purpose:
+ *        Used to determine the variable number of PN information
+ *        elements in this message
+ *
+ * PN information elements:
+ *  - PN_IE_x-
+ *      Purpose:
+ *          Each PN information element contains the sequence number
+ *          of the MPDU that has failed the target PN check.
+ *      Value:
+ *          Contains the 6 LSBs of the 802.11 sequence number
+ *          corresponding to the MPDU that failed the PN check.
+ */
+/* first DWORD */
+#define HTT_RX_PN_IND_PEER_ID_M  0xffff00
+#define HTT_RX_PN_IND_PEER_ID_S  8
+#define HTT_RX_PN_IND_TID_M      0xff000000
+#define HTT_RX_PN_IND_TID_S      24
+/* second DWORD */
+#define HTT_RX_PN_IND_SEQ_NUM_START_M 0x000000ff
+#define HTT_RX_PN_IND_SEQ_NUM_START_S 0
+#define HTT_RX_PN_IND_SEQ_NUM_END_M   0x0000ff00
+#define HTT_RX_PN_IND_SEQ_NUM_END_S   8
+#define HTT_RX_PN_IND_PN_IE_CNT_M     0x00ff0000
+#define HTT_RX_PN_IND_PN_IE_CNT_S     16
+
+#define HTT_RX_PN_IND_BYTES 8
+
+#define HTT_RX_PN_IND_PEER_ID_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PN_IND_PEER_ID, value);	\
+		(word) |= (value)  << HTT_RX_PN_IND_PEER_ID_S;		\
+	} while (0)
+#define HTT_RX_PN_IND_PEER_ID_GET(word)					\
+	(((word) & HTT_RX_PN_IND_PEER_ID_M) >> HTT_RX_PN_IND_PEER_ID_S)
+
+#define HTT_RX_PN_IND_EXT_TID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_PN_IND_TID, value);	\
+		(word) |= (value)  << HTT_RX_PN_IND_TID_S;	\
+	} while (0)
+#define HTT_RX_PN_IND_EXT_TID_GET(word)				\
+	(((word) & HTT_RX_PN_IND_TID_M) >> HTT_RX_PN_IND_TID_S)
+
+#define HTT_RX_PN_IND_SEQ_NUM_START_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PN_IND_SEQ_NUM_START, value);	\
+		(word) |= (value)  << HTT_RX_PN_IND_SEQ_NUM_START_S;	\
+	} while (0)
+#define HTT_RX_PN_IND_SEQ_NUM_START_GET(word)			\
+	(((word) & HTT_RX_PN_IND_SEQ_NUM_START_M) >>		\
+	HTT_RX_PN_IND_SEQ_NUM_START_S)
+
+#define HTT_RX_PN_IND_SEQ_NUM_END_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PN_IND_SEQ_NUM_END, value);	\
+		(word) |= (value)  << HTT_RX_PN_IND_SEQ_NUM_END_S;	\
+	} while (0)
+#define HTT_RX_PN_IND_SEQ_NUM_END_GET(word)				\
+	(((word) & HTT_RX_PN_IND_SEQ_NUM_END_M) >> HTT_RX_PN_IND_SEQ_NUM_END_S)
+
+#define HTT_RX_PN_IND_PN_IE_CNT_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PN_IND_PN_IE_CNT, value);	\
+		(word) |= (value) << HTT_RX_PN_IND_PN_IE_CNT_S;		\
+	} while (0)
+#define HTT_RX_PN_IND_PN_IE_CNT_GET(word)				\
+	(((word) & HTT_RX_PN_IND_PN_IE_CNT_M) >> HTT_RX_PN_IND_PN_IE_CNT_S)
+
+/*
+ * @brief target -> host rx offload deliver message for LL system
+ *
+ * @details
+ * In a low latency system this message is sent whenever the offload
+ * manager flushes out the packets it has coalesced in its coalescing buffer.
+ * The DMA of the actual packets into host memory is done before sending out
+ * this message. This message indicates only how many MSDUs to reap. The
+ * peer ID, vdev ID, tid and MSDU length are copied inline into the header
+ * portion of the MSDU while DMA'ing into the host memory. Unlike the packets
+ * DMA'd by the MAC directly into host memory these packets do not contain
+ * the MAC descriptors in the header portion of the packet. Instead they contain
+ * the peer ID, vdev ID, tid and MSDU length. Also when the host receives this
+ * message, the packets are delivered directly to the NW stack without going
+ * through the regular reorder buffering and PN checking path since it has
+ * already been done in target.
+ *
+ * |31             24|23             16|15              8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |         Total MSDU count          |     reserved    |     msg type    |
+ * |-----------------------------------------------------------------------|
+ *
+ * @brief target -> host rx offload deliver message for HL system
+ *
+ * @details
+ * In a high latency system this message is sent whenever the offload manager
+ * flushes out the packets it has coalesced in its coalescing buffer. The
+ * actual packets are also carried along with this message. When the host
+ * receives this message, it is expected to deliver these packets to the NW
+ * stack directly instead of routing them through the reorder buffering and
+ * PN checking path since it has already been done in target.
+ *
+ * |31             24|23             16|15              8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |         Total MSDU count          |    reserved     |     msg type    |
+ * |-----------------------------------------------------------------------|
+ * |            peer ID                |              MSDU length          |
+ * |-----------------------------------------------------------------------|
+ * |  MSDU payload   |     FW Desc     |       tid       |   vdev ID       |
+ * |-----------------------------------------------------------------------|
+ * |                           MSDU payload contd.                         |
+ * |-----------------------------------------------------------------------|
+ * |            peer ID                |              MSDU length          |
+ * |-----------------------------------------------------------------------|
+ * |  MSDU payload   |    FW Desc      |       tid       |   vdev ID       |
+ * |-----------------------------------------------------------------------|
+ * |                           MSDU payload contd.                         |
+ * |-----------------------------------------------------------------------|
+ *
+ */
+/* first DWORD */
+#define HTT_RX_OFFLOAD_DELIVER_IND_HDR_BYTES          4
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_HDR_BYTES     7
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_M         0xffff0000
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_S         16
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_M         0x0000ffff
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_S         0
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_M     0xffff0000
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_S     16
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_M     0x000000ff
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_S     0
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_M         0x0000ff00
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_S         8
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_M        0x00ff0000
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_S        16
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_GET(word)			\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_M) >>		\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT, value); \
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_CNT_S; \
+} while (0)							\
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_GET(word)			\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_M) >>		\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN, value); \
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_LEN_S; \
+} while (0)							\
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_GET(word)		\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_M) >>	\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID, value); \
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_PEER_ID_S;	\
+} while (0)							\
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_GET(word)		\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_M) >>	\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID, value); \
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_VDEV_ID_S;	\
+} while (0)							\
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_GET(word)			\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_M) >>		\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID, value); \
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_TID_S; \
+} while (0)							\
+
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_GET(word)			\
+	(((word) & HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_M) >>		\
+	HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_S)
+#define HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_SET(word, value)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC, value);	\
+	(word) |= (value) << HTT_RX_OFFLOAD_DELIVER_IND_MSDU_DESC_S; \
+} while (0)							\
+
+/**
+ * @brief target -> host rx peer map/unmap message definition
+ *
+ * @details
+ * The following diagram shows the format of the rx peer map message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31             24|23             16|15              8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |              peer ID              |     VDEV ID     |     msg type    |
+ * |-----------------------------------------------------------------------|
+ * |    MAC addr 3   |    MAC addr 2   |    MAC addr 1   |    MAC addr 0   |
+ * |-----------------------------------------------------------------------|
+ * |              reserved             |    MAC addr 5   |    MAC addr 4   |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following diagram shows the format of the rx peer unmap message sent
+ * from the target to the host.
+ *
+ * |31             24|23             16|15              8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |              peer ID              |     VDEV ID     |     msg type    |
+ * |-----------------------------------------------------------------------|
+ *
+ * The following field definitions describe the format of the rx peer map
+ * and peer unmap messages sent from the target to the host.
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx peer map or peer unmap message
+ *     Value: peer map -> 0x3, peer unmap -> 0x4
+ *   - VDEV_ID
+ *     Bits 15:8
+ *     Purpose: Indicates which virtual device the peer is associated
+ *         with.
+ *     Value: vdev ID (used in the host to look up the vdev object)
+ *   - PEER_ID
+ *     Bits 31:16
+ *     Purpose: The peer ID (index) that WAL is allocating (map) or
+ *         freeing (unmap)
+ *     Value: (rx) peer ID
+ *   - MAC_ADDR_L32 (peer map only)
+ *     Bits 31:0
+ *     Purpose: Identifies which peer node the peer ID is for.
+ *     Value: lower 4 bytes of peer node's MAC address
+ *   - MAC_ADDR_U16 (peer map only)
+ *     Bits 15:0
+ *     Purpose: Identifies which peer node the peer ID is for.
+ *     Value: upper 2 bytes of peer node's MAC address
+ */
+#define HTT_RX_PEER_MAP_VDEV_ID_M       0xff00
+#define HTT_RX_PEER_MAP_VDEV_ID_S       8
+#define HTT_RX_PEER_MAP_PEER_ID_M      0xffff0000
+#define HTT_RX_PEER_MAP_PEER_ID_S      16
+#define HTT_RX_PEER_MAP_MAC_ADDR_L32_M 0xffffffff
+#define HTT_RX_PEER_MAP_MAC_ADDR_L32_S 0
+#define HTT_RX_PEER_MAP_MAC_ADDR_U16_M 0xffff
+#define HTT_RX_PEER_MAP_MAC_ADDR_U16_S 0
+
+#define HTT_RX_PEER_MAP_VAP_ID_SET HTT_RX_PEER_MAP_VDEV_ID_SET	/* deprecated */
+#define HTT_RX_PEER_MAP_VDEV_ID_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_VDEV_ID, value);	\
+		(word) |= (value)  << HTT_RX_PEER_MAP_VDEV_ID_S;	\
+	} while (0)
+#define HTT_RX_PEER_MAP_VAP_ID_GET HTT_RX_PEER_MAP_VDEV_ID_GET	/* deprecated */
+#define HTT_RX_PEER_MAP_VDEV_ID_GET(word)				\
+	(((word) & HTT_RX_PEER_MAP_VDEV_ID_M) >> HTT_RX_PEER_MAP_VDEV_ID_S)
+
+#define HTT_RX_PEER_MAP_PEER_ID_SET(word, value)                        \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_PEER_ID, value);	\
+		(word) |= (value)  << HTT_RX_PEER_MAP_PEER_ID_S;	\
+	} while (0)
+#define HTT_RX_PEER_MAP_PEER_ID_GET(word)				\
+	(((word) & HTT_RX_PEER_MAP_PEER_ID_M) >> HTT_RX_PEER_MAP_PEER_ID_S)
+
+#define HTT_RX_PEER_MAP_MAC_ADDR_OFFSET 4	/* bytes */
+
+#define HTT_RX_PEER_MAP_BYTES 12
+
+
+#define HTT_RX_PEER_UNMAP_PEER_ID_M   HTT_RX_PEER_MAP_PEER_ID_M
+#define HTT_RX_PEER_UNMAP_PEER_ID_S   HTT_RX_PEER_MAP_PEER_ID_S
+
+#define HTT_RX_PEER_UNMAP_PEER_ID_SET HTT_RX_PEER_MAP_PEER_ID_SET
+#define HTT_RX_PEER_UNMAP_PEER_ID_GET HTT_RX_PEER_MAP_PEER_ID_GET
+
+#define HTT_RX_PEER_UNMAP_VDEV_ID_SET HTT_RX_PEER_MAP_VDEV_ID_SET
+#define HTT_RX_PEER_UNMAP_VDEV_ID_GET HTT_RX_PEER_MAP_VDEV_ID_GET
+
+#define HTT_RX_PEER_UNMAP_BYTES 4
+
+
+/**
+ * @brief target -> host message specifying security parameters
+ *
+ * @details
+ *  The following diagram shows the format of the security specification
+ *  message sent from the target to the host.
+ *  This security specification message tells the host whether a PN check is
+ *  necessary on rx data frames, and if so, how large the PN counter is.
+ *  This message also tells the host about the security processing to apply
+ *  to defragmented rx frames - specifically, whether a Message Integrity
+ *  Check is required, and the Michael key to use.
+ *
+ * |31             24|23          16|15|14              8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |              peer ID           | U|  security type  |     msg type    |
+ * |-----------------------------------------------------------------------|
+ * |                           Michael Key K0                              |
+ * |-----------------------------------------------------------------------|
+ * |                           Michael Key K1                              |
+ * |-----------------------------------------------------------------------|
+ * |                           WAPI RSC Low0                               |
+ * |-----------------------------------------------------------------------|
+ * |                           WAPI RSC Low1                               |
+ * |-----------------------------------------------------------------------|
+ * |                           WAPI RSC Hi0                                |
+ * |-----------------------------------------------------------------------|
+ * |                           WAPI RSC Hi1                                |
+ * |-----------------------------------------------------------------------|
+ *
+ * The following field definitions describe the format of the security
+ * indication message sent from the target to the host.
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a security specification message
+ *     Value: 0xb
+ *   - SEC_TYPE
+ *     Bits 14:8
+ *     Purpose: specifies which type of security applies to the peer
+ *     Value: htt_sec_type enum value
+ *   - UNICAST
+ *     Bit 15
+ *     Purpose: whether this security is applied to unicast or multicast data
+ *     Value: 1 -> unicast, 0 -> multicast
+ *   - PEER_ID
+ *     Bits 31:16
+ *     Purpose: The ID number for the peer the security specification is for
+ *     Value: peer ID
+ *   - MICHAEL_KEY_K0
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 1st half of the TKIP Michael key
+ *     Value: Michael Key K0 (if security type is TKIP)
+ *   - MICHAEL_KEY_K1
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 2nd half of the TKIP Michael key
+ *     Value: Michael Key K1 (if security type is TKIP)
+ *   - WAPI_RSC_LOW0
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 1st quarter of the 16 byte WAPI RSC
+ *     Value: WAPI RSC Low0 (if security type is WAPI)
+ *   - WAPI_RSC_LOW1
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 2nd quarter of the 16 byte WAPI RSC
+ *     Value: WAPI RSC Low1 (if security type is WAPI)
+ *   - WAPI_RSC_HI0
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 3rd quarter of the 16 byte WAPI RSC
+ *     Value: WAPI RSC Hi0 (if security type is WAPI)
+ *   - WAPI_RSC_HI1
+ *     Bits 31:0
+ *     Purpose: 4-byte word that forms the 4th quarter of the 16 byte WAPI RSC
+ *     Value: WAPI RSC Hi1 (if security type is WAPI)
+ */
+
+#define HTT_SEC_IND_SEC_TYPE_M     0x00007f00
+#define HTT_SEC_IND_SEC_TYPE_S     8
+#define HTT_SEC_IND_UNICAST_M      0x00008000
+#define HTT_SEC_IND_UNICAST_S      15
+#define HTT_SEC_IND_PEER_ID_M      0xffff0000
+#define HTT_SEC_IND_PEER_ID_S      16
+
+#define HTT_SEC_IND_SEC_TYPE_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_SEC_IND_SEC_TYPE, value);	\
+		(word) |= (value)  << HTT_SEC_IND_SEC_TYPE_S;	\
+	} while (0)
+#define HTT_SEC_IND_SEC_TYPE_GET(word)					\
+	(((word) & HTT_SEC_IND_SEC_TYPE_M) >> HTT_SEC_IND_SEC_TYPE_S)
+
+#define HTT_SEC_IND_UNICAST_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_SEC_IND_UNICAST, value);	\
+		(word) |= (value)  << HTT_SEC_IND_UNICAST_S;	\
+	} while (0)
+#define HTT_SEC_IND_UNICAST_GET(word)					\
+	(((word) & HTT_SEC_IND_UNICAST_M) >> HTT_SEC_IND_UNICAST_S)
+
+#define HTT_SEC_IND_PEER_ID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_SEC_IND_PEER_ID, value);	\
+		(word) |= (value)  << HTT_SEC_IND_PEER_ID_S;	\
+	} while (0)
+#define HTT_SEC_IND_PEER_ID_GET(word)					\
+	(((word) & HTT_SEC_IND_PEER_ID_M) >> HTT_SEC_IND_PEER_ID_S)
+
+
+#define HTT_SEC_IND_BYTES 28
+
+
+/**
+ * @brief target -> host rx ADDBA / DELBA message definitions
+ *
+ * @details
+ * The following diagram shows the format of the rx ADDBA message sent
+ * from the target to the host:
+ *
+ * |31                      20|19  16|15              8|7               0|
+ * |---------------------------------------------------------------------|
+ * |          peer ID         |  TID |   window size   |     msg type    |
+ * |---------------------------------------------------------------------|
+ *
+ * The following diagram shows the format of the rx DELBA message sent
+ * from the target to the host:
+ *
+ * |31                      20|19  16|15              8|7               0|
+ * |---------------------------------------------------------------------|
+ * |          peer ID         |  TID |     reserved    |     msg type    |
+ * |---------------------------------------------------------------------|
+ *
+ * The following field definitions describe the format of the rx ADDBA
+ * and DELBA messages sent from the target to the host.
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx ADDBA or DELBA message
+ *     Value: ADDBA -> 0x5, DELBA -> 0x6
+ *   - WIN_SIZE
+ *     Bits 15:8 (ADDBA only)
+ *     Purpose: Specifies the length of the block ack window (max = 64).
+ *     Value:
+ *         block ack window length specified by the received ADDBA
+ *         management message.
+ *   - TID
+ *     Bits 19:16
+ *     Purpose: Specifies which traffic identifier the ADDBA / DELBA is for.
+ *     Value:
+ *         TID specified by the received ADDBA or DELBA management message.
+ *   - PEER_ID
+ *     Bits 31:20
+ *     Purpose: Identifies which peer sent the ADDBA / DELBA.
+ *     Value:
+ *         ID (hash value) used by the host for fast,  direct lookup of
+ *         host SW peer info, including rx reorder states.
+ */
+#define HTT_RX_ADDBA_WIN_SIZE_M  0xff00
+#define HTT_RX_ADDBA_WIN_SIZE_S  8
+#define HTT_RX_ADDBA_TID_M       0xf0000
+#define HTT_RX_ADDBA_TID_S       16
+#define HTT_RX_ADDBA_PEER_ID_M   0xfff00000
+#define HTT_RX_ADDBA_PEER_ID_S   20
+
+#define HTT_RX_ADDBA_WIN_SIZE_SET(word, value)                          \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_ADDBA_WIN_SIZE, value);	\
+		(word) |= (value)  << HTT_RX_ADDBA_WIN_SIZE_S;		\
+	} while (0)
+#define HTT_RX_ADDBA_WIN_SIZE_GET(word)					\
+	(((word) & HTT_RX_ADDBA_WIN_SIZE_M) >> HTT_RX_ADDBA_WIN_SIZE_S)
+
+#define HTT_RX_ADDBA_TID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_ADDBA_TID, value);	\
+		(word) |= (value)  << HTT_RX_ADDBA_TID_S;	\
+	} while (0)
+#define HTT_RX_ADDBA_TID_GET(word)				\
+	(((word) & HTT_RX_ADDBA_TID_M) >> HTT_RX_ADDBA_TID_S)
+
+#define HTT_RX_ADDBA_PEER_ID_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_ADDBA_PEER_ID, value);	\
+		(word) |= (value)  << HTT_RX_ADDBA_PEER_ID_S;	\
+	} while (0)
+#define HTT_RX_ADDBA_PEER_ID_GET(word)					\
+	(((word) & HTT_RX_ADDBA_PEER_ID_M) >> HTT_RX_ADDBA_PEER_ID_S)
+
+#define HTT_RX_ADDBA_BYTES 4
+
+
+#define HTT_RX_DELBA_TID_M         HTT_RX_ADDBA_TID_M
+#define HTT_RX_DELBA_TID_S         HTT_RX_ADDBA_TID_S
+#define HTT_RX_DELBA_PEER_ID_M     HTT_RX_ADDBA_PEER_ID_M
+#define HTT_RX_DELBA_PEER_ID_S     HTT_RX_ADDBA_PEER_ID_S
+
+#define HTT_RX_DELBA_TID_SET       HTT_RX_ADDBA_TID_SET
+#define HTT_RX_DELBA_TID_GET       HTT_RX_ADDBA_TID_GET
+#define HTT_RX_DELBA_PEER_ID_SET   HTT_RX_ADDBA_PEER_ID_SET
+#define HTT_RX_DELBA_PEER_ID_GET   HTT_RX_ADDBA_PEER_ID_GET
+
+#define HTT_RX_DELBA_BYTES 4
+
+/**
+ * @brief tx queue group information element definition
+ *
+ * @details
+ * The following diagram shows the format of the tx queue group
+ * information element, which can be included in target --> host
+ * messages to specify the number of tx "credits" (tx descriptors
+ * for LL, or tx buffers for HL) available to a particular group
+ * of host-side tx queues, and which host-side tx queues belong to
+ * the group.
+ *
+ * |31|30          24|23             16|15|14|13                           0|
+ * |------------------------------------------------------------------------|
+ * | X|   reserved   | tx queue grp ID | A| S|     credit count             |
+ * |------------------------------------------------------------------------|
+ * |            vdev ID mask           |               AC mask              |
+ * |------------------------------------------------------------------------|
+ *
+ * The following definitions describe the fields within the tx queue group
+ * information element:
+ * - credit_count
+ *   Bits 13:1
+ *   Purpose: specify how many tx credits are available to the tx queue group
+ *   Value: An absolute or relative, positive or negative credit value
+ *       The 'A' bit specifies whether the value is absolute or relative.
+ *       The 'S' bit specifies whether the value is positive or negative.
+ *       A negative value can only be relative, not absolute.
+ *       An absolute value replaces any prior credit value the host has for
+ *       the tx queue group in question.
+ *       A relative value is added to the prior credit value the host has for
+ *       the tx queue group in question.
+ * - sign
+ *   Bit 14
+ *   Purpose: specify whether the credit count is positive or negative
+ *   Value: 0 -> positive, 1 -> negative
+ * - absolute
+ *   Bit 15
+ *   Purpose: specify whether the credit count is absolute or relative
+ *   Value: 0 -> relative, 1 -> absolute
+ * - txq_group_id
+ *   Bits 23:16
+ *   Purpose: indicate which tx queue group's credit and/or membership are
+ *       being specified
+ *   Value: 0 to max_tx_queue_groups-1
+ * - reserved
+ *   Bits 30:16
+ *   Value: 0x0
+ * - eXtension
+ *   Bit 31
+ *   Purpose: specify whether another tx queue group info element follows
+ *   Value: 0 -> no more tx queue group information elements
+ *          1 -> another tx queue group information element immediately follows
+ * - ac_mask
+ *   Bits 15:0
+ *   Purpose: specify which Access Categories belong to the tx queue group
+ *   Value: bit-OR of masks for the ACs (WMM and extension) that belong to
+ *       the tx queue group.
+ *       The AC bit-mask values are obtained by left-shifting by the
+ *       corresponding HTT_AC_WMM enum values, e.g. (1 << HTT_AC_WMM_BE) == 0x1
+ * - vdev_id_mask
+ *   Bits 31:16
+ *   Purpose: specify which vdev's tx queues belong to the tx queue group
+ *   Value: bit-OR of masks based on the IDs of the vdevs whose tx queues
+ *       belong to the tx queue group.
+ *       For example, if vdev IDs 1 and 4 belong to a tx queue group, the
+ *       vdev_id_mask would be (1 << 1) | (1 << 4) = 0x12
+ */
+PREPACK struct htt_txq_group {
+	A_UINT32
+	    credit_count:14,
+	    sign:1,
+		absolute:1,
+		tx_queue_group_id:8,
+		reserved0:7,
+		extension:1;
+	A_UINT32
+		ac_mask:16,
+		vdev_id_mask:16;
+} POSTPACK;
+
+/* first word */
+#define HTT_TXQ_GROUP_CREDIT_COUNT_S 0
+#define HTT_TXQ_GROUP_CREDIT_COUNT_M 0x00003fff
+#define HTT_TXQ_GROUP_SIGN_S         14
+#define HTT_TXQ_GROUP_SIGN_M         0x00004000
+#define HTT_TXQ_GROUP_ABS_S          15
+#define HTT_TXQ_GROUP_ABS_M          0x00008000
+#define HTT_TXQ_GROUP_ID_S           16
+#define HTT_TXQ_GROUP_ID_M           0x00ff0000
+#define HTT_TXQ_GROUP_EXT_S          31
+#define HTT_TXQ_GROUP_EXT_M          0x80000000
+/* second word */
+#define HTT_TXQ_GROUP_AC_MASK_S      0
+#define HTT_TXQ_GROUP_AC_MASK_M      0x0000ffff
+#define HTT_TXQ_GROUP_VDEV_ID_MASK_S 16
+#define HTT_TXQ_GROUP_VDEV_ID_MASK_M 0xffff0000
+
+#define HTT_TXQ_GROUP_CREDIT_COUNT_SET(_info, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_CREDIT_COUNT, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_CREDIT_COUNT_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_CREDIT_COUNT_GET(_info)				\
+	(((_info) & HTT_TXQ_GROUP_CREDIT_COUNT_M) >>	\
+	HTT_TXQ_GROUP_CREDIT_COUNT_S)
+
+#define HTT_TXQ_GROUP_SIGN_SET(_info, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_SIGN, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_SIGN_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_SIGN_GET(_info)					\
+	(((_info) & HTT_TXQ_GROUP_SIGN_M) >> HTT_TXQ_GROUP_SIGN_S)
+
+#define HTT_TXQ_GROUP_ABS_SET(_info, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_ABS, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_ABS_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_ABS_GET(_info)					\
+	(((_info) & HTT_TXQ_GROUP_ABS_M) >> HTT_TXQ_GROUP_ABS_S)
+
+#define HTT_TXQ_GROUP_ID_SET(_info, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_ID, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_ID_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_ID_GET(_info)				\
+	(((_info) & HTT_TXQ_GROUP_ID_M) >> HTT_TXQ_GROUP_ID_S)
+
+#define HTT_TXQ_GROUP_EXT_SET(_info, _val)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_EXT, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_EXT_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_EXT_GET(_info)					\
+	(((_info) & HTT_TXQ_GROUP_EXT_M) >> HTT_TXQ_GROUP_EXT_S)
+
+#define HTT_TXQ_GROUP_AC_MASK_SET(_info, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_AC_MASK, _val);		\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_AC_MASK_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_AC_MASK_GET(_info)				\
+	(((_info) & HTT_TXQ_GROUP_AC_MASK_M) >> HTT_TXQ_GROUP_AC_MASK_S)
+
+#define HTT_TXQ_GROUP_VDEV_ID_MASK_SET(_info, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TXQ_GROUP_VDEV_ID_MASK, _val);	\
+		((_info) |= ((_val) << HTT_TXQ_GROUP_VDEV_ID_MASK_S));	\
+	} while (0)
+#define HTT_TXQ_GROUP_VDEV_ID_MASK_GET(_info)				\
+	(((_info) & HTT_TXQ_GROUP_VDEV_ID_MASK_M) >>			\
+	HTT_TXQ_GROUP_VDEV_ID_MASK_S)
+
+/**
+ * @brief target -> host TX completion indication message definition
+ *
+ * @details
+ * The following diagram shows the format of the TX completion indication sent
+ * from the target to the host
+ *
+ *          |31      25|    24|23        16| 15 |14 11|10   8|7          0|
+ *          |-------------------------------------------------------------|
+ * header:  | reserved |append|     num    | t_i| tid |status|  msg_type  |
+ *          |-------------------------------------------------------------|
+ * payload: |            MSDU1 ID          |         MSDU0 ID             |
+ *          |-------------------------------------------------------------|
+ *          :            MSDU3 ID          :         MSDU2 ID             :
+ *          |-------------------------------------------------------------|
+ *          |          struct htt_tx_compl_ind_append_retries             |
+ *          - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ *
+ * The following field definitions describe the format of the TX completion
+ * indication sent from the target to the host
+ * Header fields:
+ * - msg_type
+ *   Bits 7:0
+ *   Purpose: identifies this as HTT TX completion indication
+ *   Value: 0x7
+ * - status
+ *   Bits 10:8
+ *   Purpose: the TX completion status of payload fragmentations descriptors
+ *   Value: could be HTT_TX_COMPL_IND_STAT_OK or HTT_TX_COMPL_IND_STAT_DISCARD
+ * - tid
+ *   Bits 14:11
+ *   Purpose: the tid associated with those fragmentation descriptors. It is
+ *            valid or not, depending on the tid_invalid bit.
+ *   Value: 0 to 15
+ * - tid_invalid
+ *   Bits 15:15
+ *   Purpose: this bit indicates whether the tid field is valid or not
+ *   Value: 0 indicates valid; 1 indicates invalid
+ * - num
+ *   Bits 23:16
+ *   Purpose: the number of payload in this indication
+ *   Value: 1 to 255
+ * - append
+ *   Bits 24:24
+ *   Purpose: append the struct htt_tx_compl_ind_append_retries which contains
+ *            the number of tx retries for one MSDU at the end of this message
+ *   Value: 0 indicates no appending; 1 indicates appending
+ * Payload fields:
+ * - hmsdu_id
+ *   Bits 15:0
+ *   Purpose: this ID is used to track the Tx buffer in host
+ *   Value: 0 to "size of host MSDU descriptor pool - 1"
+ */
+
+#define HTT_TX_COMPL_IND_STATUS_S      8
+#define HTT_TX_COMPL_IND_STATUS_M      0x00000700
+#define HTT_TX_COMPL_IND_TID_S         11
+#define HTT_TX_COMPL_IND_TID_M         0x00007800
+#define HTT_TX_COMPL_IND_TID_INV_S     15
+#define HTT_TX_COMPL_IND_TID_INV_M     0x00008000
+#define HTT_TX_COMPL_IND_NUM_S         16
+#define HTT_TX_COMPL_IND_NUM_M         0x00ff0000
+#define HTT_TX_COMPL_IND_APPEND_S      24
+#define HTT_TX_COMPL_IND_APPEND_M      0x01000000
+
+#define HTT_TX_COMPL_IND_STATUS_SET(_info, _val)                        \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_STATUS, _val);	\
+		((_info) |= ((_val) << HTT_TX_COMPL_IND_STATUS_S));	\
+	} while (0)
+#define HTT_TX_COMPL_IND_STATUS_GET(_info)                              \
+	(((_info) & HTT_TX_COMPL_IND_STATUS_M) >> HTT_TX_COMPL_IND_STATUS_S)
+#define HTT_TX_COMPL_IND_NUM_SET(_info, _val)                           \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_NUM, _val);		\
+		((_info) |= ((_val) << HTT_TX_COMPL_IND_NUM_S));	\
+	} while (0)
+#define HTT_TX_COMPL_IND_NUM_GET(_info)					\
+	(((_info) & HTT_TX_COMPL_IND_NUM_M) >> HTT_TX_COMPL_IND_NUM_S)
+#define HTT_TX_COMPL_IND_TID_SET(_info, _val)                           \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_TID, _val);		\
+		((_info) |= ((_val) << HTT_TX_COMPL_IND_TID_S));	\
+	} while (0)
+#define HTT_TX_COMPL_IND_TID_GET(_info)					\
+	(((_info) & HTT_TX_COMPL_IND_TID_M) >> HTT_TX_COMPL_IND_TID_S)
+#define HTT_TX_COMPL_IND_TID_INV_SET(_info, _val)                       \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_TID_INV, _val);	\
+		((_info) |= ((_val) << HTT_TX_COMPL_IND_TID_INV_S));	\
+	} while (0)
+#define HTT_TX_COMPL_IND_TID_INV_GET(_info)		\
+	(((_info) & HTT_TX_COMPL_IND_TID_INV_M) >>	\
+	 HTT_TX_COMPL_IND_TID_INV_S)
+#define HTT_TX_COMPL_IND_APPEND_SET(_info, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_APPEND, _val);	\
+		((_info) |= ((_val) << HTT_TX_COMPL_IND_APPEND_S));	\
+	} while (0)
+#define HTT_TX_COMPL_IND_APPEND_GET(_info)				\
+	(((_info) & HTT_TX_COMPL_IND_APPEND_M) >> HTT_TX_COMPL_IND_APPEND_S)
+
+#define HTT_TX_COMPL_CTXT_SZ                sizeof(A_UINT16)
+#define HTT_TX_COMPL_CTXT_NUM(_bytes)       ((_bytes) >> 1)
+
+#define HTT_TX_COMPL_INV_MSDU_ID            0xffff
+
+#define HTT_TX_COMPL_IND_STAT_OK          0
+#define HTT_TX_COMPL_IND_STAT_DISCARD     1
+#define HTT_TX_COMPL_IND_STAT_NO_ACK      2
+#define HTT_TX_COMPL_IND_STAT_POSTPONE    3
+/*
+ * The PEER_DEL tx completion status is used for HL cases
+ * where the peer the frame is for has been deleted.
+ * The host has already discarded its copy of the frame, but
+ * it still needs the tx completion to restore its credit.
+ */
+#define HTT_TX_COMPL_IND_STAT_PEER_DEL    4
+
+
+#define HTT_TX_COMPL_IND_APPEND_SET_MORE_RETRY(f)  ((f) |= 0x1)
+#define HTT_TX_COMPL_IND_APPEND_CLR_MORE_RETRY(f)  ((f) &= (~0x1))
+
+PREPACK struct htt_tx_compl_ind_base {
+	A_UINT32 hdr;
+	A_UINT16 payload[1 /*or more */];
+} POSTPACK;
+
+PREPACK struct htt_tx_compl_ind_append_retries {
+	A_UINT16 msdu_id;
+	A_UINT8 tx_retries;
+	A_UINT8 flag;/* Bit 0, 1: another append_retries struct is appended
+				  0: this is the last append_retries struct */
+} POSTPACK;
+
+/**
+ * @brief target -> host rate-control update indication message
+ *
+ * @details
+ * The following diagram shows the format of the RC Update message
+ * sent from the target to the host, while processing the tx-completion
+ * of a transmitted PPDU.
+ *
+ *          |31          24|23           16|15            8|7            0|
+ *          |-------------------------------------------------------------|
+ *          |            peer ID           |    vdev ID    |    msg_type  |
+ *          |-------------------------------------------------------------|
+ *          |  MAC addr 3  |  MAC addr 2   |   MAC addr 1  |  MAC addr 0  |
+ *          |-------------------------------------------------------------|
+ *          |   reserved   |   num elems   |   MAC addr 5  |  MAC addr 4  |
+ *          |-------------------------------------------------------------|
+ *          |                              :                              |
+ *          :         HTT_RC_TX_DONE_PARAMS (DWORD-aligned)               :
+ *          |                              :                              |
+ *          |-------------------------------------------------------------|
+ *          |                              :                              |
+ *          :         HTT_RC_TX_DONE_PARAMS (DWORD-aligned)               :
+ *          |                              :                              |
+ *          |-------------------------------------------------------------|
+ *          :                                                             :
+ *          - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ *
+ */
+
+typedef struct {
+	A_UINT32 rate_code;	/* rate code, bw, chain mask sgi */
+	A_UINT32 rate_code_flags;
+	A_UINT32 flags;		/* Encodes information such as excessive
+				   retransmission, aggregate, some info
+				   from .11 frame control,
+				   STBC, LDPC, (SGI and Tx Chain Mask
+				   are encoded in ptx_rc->flags field),
+				   AMPDU truncation (BT/time based etc.),
+				   RTS/CTS attempt  */
+
+	A_UINT32 num_enqued;/* # of MPDUs (for non-AMPDU 1) for this rate */
+	A_UINT32 num_retries;/* Total # of transmission attempt for this rate */
+	A_UINT32 num_failed;/* # of failed MPDUs in A-MPDU, 0 otherwise */
+	A_UINT32 ack_rssi;/* ACK RSSI: b'7..b'0 avg RSSI across all chain */
+	A_UINT32 time_stamp;	/* ACK timestamp (helps determine age) */
+	A_UINT32 is_probe;	/* Valid if probing. Else, 0 */
+} HTT_RC_TX_DONE_PARAMS;
+
+#define HTT_RC_UPDATE_CTXT_SZ (sizeof(HTT_RC_TX_DONE_PARAMS))/* bytes */
+#define HTT_RC_UPDATE_HDR_SZ      (12)	/* bytes */
+
+#define HTT_RC_UPDATE_MAC_ADDR_OFFSET   (4)	/* bytes */
+#define HTT_RC_UPDATE_MAC_ADDR_LENGTH   IEEE80211_ADDR_LEN	/* bytes */
+
+#define HTT_RC_UPDATE_VDEVID_S    8
+#define HTT_RC_UPDATE_VDEVID_M    0xff00
+#define HTT_RC_UPDATE_PEERID_S    16
+#define HTT_RC_UPDATE_PEERID_M    0xffff0000
+
+#define HTT_RC_UPDATE_NUM_ELEMS_S   16
+#define HTT_RC_UPDATE_NUM_ELEMS_M   0x00ff0000
+
+#define HTT_RC_UPDATE_VDEVID_SET(_info, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RC_UPDATE_VDEVID, _val);		\
+		((_info) |= ((_val) << HTT_RC_UPDATE_VDEVID_S));	\
+	} while (0)
+
+#define HTT_RC_UPDATE_VDEVID_GET(_info)					\
+	(((_info) & HTT_RC_UPDATE_VDEVID_M) >> HTT_RC_UPDATE_VDEVID_S)
+
+#define HTT_RC_UPDATE_PEERID_SET(_info, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RC_UPDATE_PEERID, _val);		\
+		((_info) |= ((_val) << HTT_RC_UPDATE_PEERID_S));	\
+	} while (0)
+
+#define HTT_RC_UPDATE_PEERID_GET(_info)					\
+	(((_info) & HTT_RC_UPDATE_PEERID_M) >> HTT_RC_UPDATE_PEERID_S)
+
+#define HTT_RC_UPDATE_NUM_ELEMS_SET(_info, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RC_UPDATE_NUM_ELEMS, _val);	\
+		((_info) |= ((_val) << HTT_RC_UPDATE_NUM_ELEMS_S));	\
+	} while (0)
+
+#define HTT_RC_UPDATE_NUM_ELEMS_GET(_info)				\
+	(((_info) & HTT_RC_UPDATE_NUM_ELEMS_M) >> HTT_RC_UPDATE_NUM_ELEMS_S)
+
+/**
+ * @brief target -> host rx fragment indication message definition
+ *
+ * @details
+ * The following field definitions describe the format of the rx fragment
+ * indication message sent from the target to the host.
+ * The rx fragment indication message shares the format of the
+ * rx indication message, but not all fields from the rx indication message
+ * are relevant to the rx fragment indication message.
+ *
+ *
+ *     |31       24|23         18|17|16|15|14|13|12|11|10|9|8|7|6|5|4     0|
+ *     |-----------+-------------------+---------------------+-------------|
+ *     |             peer ID           |     |FV| ext TID    |  msg type   |
+ *     |-------------------------------------------------------------------|
+ *     |                                           |    flush    |  flush  |
+ *     |                                           |     end     |  start  |
+ *     |                                           |   seq num   | seq num |
+ *     |-------------------------------------------------------------------|
+ *     |           reserved            |         FW rx desc bytes          |
+ *     |-------------------------------------------------------------------|
+ *     |                                                     | FW MSDU Rx  |
+ *     |                                                     |   desc B0   |
+ *     |-------------------------------------------------------------------|
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx fragment indication message
+ *     Value: 0xa
+ *   - EXT_TID
+ *     Bits 12:8
+ *     Purpose: identify the traffic ID of the rx data, including
+ *         special "extended" TID values for multicast, broadcast, and
+ *         non-QoS data frames
+ *     Value: 0-15 for regular TIDs, or >= 16 for bcast/mcast/non-QoS
+ *   - FLUSH_VALID (FV)
+ *     Bit 13
+ *     Purpose: indicate whether the flush IE (start/end sequence numbers)
+ *         is valid
+ *     Value:
+ *         1 -> flush IE is valid and needs to be processed
+ *         0 -> flush IE is not valid and should be ignored
+ *   - PEER_ID
+ *     Bits 31:16
+ *     Purpose: Identify, by ID, which peer sent the rx data
+ *     Value: ID of the peer who sent the rx data
+ *   - FLUSH_SEQ_NUM_START
+ *     Bits 5:0
+ *     Purpose: Indicate the start of a series of MPDUs to flush
+ *         Not all MPDUs within this series are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ *         This field is only valid if the FV bit is set.
+ *     Value:
+ *         The sequence number for the first MPDUs to check to flush.
+ *         The sequence number is masked by 0x3f.
+ *   - FLUSH_SEQ_NUM_END
+ *     Bits 11:6
+ *     Purpose: Indicate the end of a series of MPDUs to flush
+ *     Value:
+ *         The sequence number one larger than the sequence number of the
+ *         last MPDU to check to flush.
+ *         The sequence number is masked by 0x3f.
+ *         Not all MPDUs within this series are necessarily valid - the host
+ *         must check each sequence number within this range to see if the
+ *         corresponding MPDU is actually present.
+ *         This field is only valid if the FV bit is set.
+ * Rx descriptor fields:
+ *   - FW_RX_DESC_BYTES
+ *     Bits 15:0
+ *     Purpose: Indicate how many bytes in the Rx indication are used for
+ *         FW Rx descriptors
+ *     Value: 1
+ */
+#define HTT_RX_FRAG_IND_HDR_PREFIX_SIZE32         2
+
+#define HTT_RX_FRAG_IND_FW_DESC_BYTE_OFFSET       12
+
+#define HTT_RX_FRAG_IND_EXT_TID_SET     HTT_RX_IND_EXT_TID_SET
+#define HTT_RX_FRAG_IND_EXT_TID_GET     HTT_RX_IND_EXT_TID_GET
+
+#define HTT_RX_FRAG_IND_PEER_ID_SET     HTT_RX_IND_PEER_ID_SET
+#define HTT_RX_FRAG_IND_PEER_ID_GET     HTT_RX_IND_PEER_ID_GET
+
+#define HTT_RX_FRAG_IND_FLUSH_VALID_SET HTT_RX_IND_FLUSH_VALID_SET
+#define HTT_RX_FRAG_IND_FLUSH_VALID_GET HTT_RX_IND_FLUSH_VALID_GET
+
+#define HTT_RX_FRAG_IND_FLUSH_SEQ_NUM_START_SET \
+	HTT_RX_IND_FLUSH_SEQ_NUM_START_SET
+#define HTT_RX_FRAG_IND_FLUSH_SEQ_NUM_START_GET \
+	HTT_RX_IND_FLUSH_SEQ_NUM_START_GET
+
+#define HTT_RX_FRAG_IND_FLUSH_SEQ_NUM_END_SET	\
+	HTT_RX_IND_FLUSH_SEQ_NUM_END_SET
+#define HTT_RX_FRAG_IND_FLUSH_SEQ_NUM_END_GET	\
+	HTT_RX_IND_FLUSH_SEQ_NUM_END_GET
+
+#define HTT_RX_FRAG_IND_FW_RX_DESC_BYTES_GET  HTT_RX_IND_FW_RX_DESC_BYTES_GET
+
+#define HTT_RX_FRAG_IND_BYTES				\
+	(4 /* msg hdr */ +				\
+	 4 /* flush spec */ +				\
+	 4 /* (unused) FW rx desc bytes spec */ +	\
+	 4 /* FW rx desc */)
+
+/**
+ * @brief target -> host test message definition
+ *
+ * @details
+ * The following field definitions describe the format of the test
+ * message sent from the target to the host.
+ * The message consists of a 4-octet header, followed by a variable
+ * number of 32-bit integer values, followed by a variable number
+ * of 8-bit character values.
+ *
+ * |31                         16|15           8|7            0|
+ * |-----------------------------------------------------------|
+ * |          num chars          |   num ints   |   msg type   |
+ * |-----------------------------------------------------------|
+ * |                           int 0                           |
+ * |-----------------------------------------------------------|
+ * |                           int 1                           |
+ * |-----------------------------------------------------------|
+ * |                            ...                            |
+ * |-----------------------------------------------------------|
+ * |    char 3    |    char 2    |    char 1    |    char 0    |
+ * |-----------------------------------------------------------|
+ * |              |              |      ...     |    char 4    |
+ * |-----------------------------------------------------------|
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a test message
+ *     Value: HTT_MSG_TYPE_TEST
+ *   - NUM_INTS
+ *     Bits 15:8
+ *     Purpose: indicate how many 32-bit integers follow the message header
+ *   - NUM_CHARS
+ *     Bits 31:16
+ *     Purpose: indicate how many 8-bit charaters follow the series of integers
+ */
+#define HTT_RX_TEST_NUM_INTS_M   0xff00
+#define HTT_RX_TEST_NUM_INTS_S   8
+#define HTT_RX_TEST_NUM_CHARS_M  0xffff0000
+#define HTT_RX_TEST_NUM_CHARS_S  16
+
+#define HTT_RX_TEST_NUM_INTS_SET(word, value)			\
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_RX_TEST_NUM_INTS, value);	\
+		(word) |= (value)  << HTT_RX_TEST_NUM_INTS_S;	\
+	} while (0)
+#define HTT_RX_TEST_NUM_INTS_GET(word)					\
+	(((word) & HTT_RX_TEST_NUM_INTS_M) >> HTT_RX_TEST_NUM_INTS_S)
+
+#define HTT_RX_TEST_NUM_CHARS_SET(word, value)                          \
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_TEST_NUM_CHARS, value);	\
+		(word) |= (value)  << HTT_RX_TEST_NUM_CHARS_S;		\
+	} while (0)
+#define HTT_RX_TEST_NUM_CHARS_GET(word)					\
+	(((word) & HTT_RX_TEST_NUM_CHARS_M) >> HTT_RX_TEST_NUM_CHARS_S)
+
+/**
+ * @brief target -> host packet log message
+ *
+ * @details
+ * The following field definitions describe the format of the packet log
+ * message sent from the target to the host.
+ * The message consists of a 4-octet header,followed by a variable number
+ * of 32-bit character values.
+ *
+ * |31          24|23          16|15           8|7            0|
+ * |-----------------------------------------------------------|
+ * |              |              |              |   msg type   |
+ * |-----------------------------------------------------------|
+ * |                        payload                            |
+ * |-----------------------------------------------------------|
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a test message
+ *     Value: HTT_MSG_TYPE_PACKETLOG
+ */
+PREPACK struct htt_pktlog_msg {
+	A_UINT32 header;
+	A_UINT32 payload[1 /* or more */];
+} POSTPACK;
+
+
+/*
+ * Rx reorder statistics
+ * NB: all the fields must be defined in 4 octets size.
+ */
+struct rx_reorder_stats {
+	/* Non QoS MPDUs received */
+	A_UINT32 deliver_non_qos;
+	/* MPDUs received in-order */
+	A_UINT32 deliver_in_order;
+	/* Flush due to reorder timer expired */
+	A_UINT32 deliver_flush_timeout;
+	/* Flush due to move out of window */
+	A_UINT32 deliver_flush_oow;
+	/* Flush due to DELBA */
+	A_UINT32 deliver_flush_delba;
+	/* MPDUs dropped due to FCS error */
+	A_UINT32 fcs_error;
+	/* MPDUs dropped due to monitor mode non-data packet */
+	A_UINT32 mgmt_ctrl;
+	/* Unicast-data MPDUs dropped due to invalid peer */
+	A_UINT32 invalid_peer;
+	/* MPDUs dropped due to duplication (non aggregation) */
+	A_UINT32 dup_non_aggr;
+	/* MPDUs dropped due to processed before */
+	A_UINT32 dup_past;
+	/* MPDUs dropped due to duplicate in reorder queue */
+	A_UINT32 dup_in_reorder;
+	/* Reorder timeout happened */
+	A_UINT32 reorder_timeout;
+	/* invalid bar ssn */
+	A_UINT32 invalid_bar_ssn;
+	/* reorder reset due to bar ssn */
+	A_UINT32 ssn_reset;
+	/* Flush due to delete peer */
+	A_UINT32 deliver_flush_delpeer;
+	/* Flush due to offload */
+	A_UINT32 deliver_flush_offload;
+	/* Flush due to out of buffer */
+	A_UINT32 deliver_flush_oob;
+	/* MPDUs dropped due to PN check fail */
+	A_UINT32 pn_fail;
+	/* MPDUs dropped due to unable to allocate memory  */
+	A_UINT32 store_fail;
+	/* Number of times the tid pool alloc succeeded */
+	A_UINT32 tid_pool_alloc_succ;
+	/* Number of times the MPDU pool alloc succeeded */
+	A_UINT32 mpdu_pool_alloc_succ;
+	/* Number of times the MSDU pool alloc succeeded */
+	A_UINT32 msdu_pool_alloc_succ;
+	/* Number of times the tid pool alloc failed */
+	A_UINT32 tid_pool_alloc_fail;
+	/* Number of times the MPDU pool alloc failed */
+	A_UINT32 mpdu_pool_alloc_fail;
+	/* Number of times the MSDU pool alloc failed */
+	A_UINT32 msdu_pool_alloc_fail;
+	/* Number of times the tid pool freed */
+	A_UINT32 tid_pool_free;
+	/* Number of times the MPDU pool freed */
+	A_UINT32 mpdu_pool_free;
+	/* Number of times the MSDU pool freed */
+	A_UINT32 msdu_pool_free;
+	/* number of MSDUs undelivered to HTT and queued
+	 * to Data Rx MSDU free list */
+	A_UINT32 msdu_queued;
+	/* Number of MSDUs released from Data Rx MSDU list to MAC ring */
+	A_UINT32 msdu_recycled;
+	/* Number of MPDUs with invalid peer but A2 found in AST */
+	A_UINT32 invalid_peer_a2_in_ast;
+	/* Number of MPDUs with invalid peer but A3 found in AST */
+	A_UINT32 invalid_peer_a3_in_ast;
+	/* Number of MPDUs with invalid peer, Broadcast or Multicast frame */
+	A_UINT32 invalid_peer_bmc_mpdus;
+	/* Number of MSDUs with err attention word */
+	A_UINT32 rxdesc_err_att;
+	/* Number of MSDUs with flag of peer_idx_invalid */
+	A_UINT32 rxdesc_err_peer_idx_inv;
+	/* Number of MSDUs with flag of peer_idx_timeout */
+	A_UINT32 rxdesc_err_peer_idx_to;
+	/* Number of MSDUs with flag of overflow */
+	A_UINT32 rxdesc_err_ov;
+	/* Number of MSDUs with flag of msdu_length_err */
+	A_UINT32 rxdesc_err_msdu_len;
+	/* Number of MSDUs with flag of mpdu_length_err */
+	A_UINT32 rxdesc_err_mpdu_len;
+	/* Number of MSDUs with flag of tkip_mic_err */
+	A_UINT32 rxdesc_err_tkip_mic;
+	/* Number of MSDUs with flag of decrypt_err */
+	A_UINT32 rxdesc_err_decrypt;
+	/* Number of MSDUs with flag of fcs_err */
+	A_UINT32 rxdesc_err_fcs;
+	/* Number of Unicast (bc_mc bit is not set in attention word)
+	* frames with invalid peer handler
+	*/
+	A_UINT32 rxdesc_uc_msdus_inv_peer;
+	/* Number of unicast frame directly (direct bit is set in attention word)
+	* to DUT with invalid peer handler
+	*/
+	A_UINT32 rxdesc_direct_msdus_inv_peer;
+	/* Number of Broadcast/Multicast (bc_mc bit set in attention word)
+	* frames with invalid peer handler
+	*/
+	A_UINT32 rxdesc_bmc_msdus_inv_peer;
+	/* Number of MSDUs dropped due to no first MSDU flag */
+	A_UINT32 rxdesc_no_1st_msdu;
+	/* Number of MSDUs droped due to ring overflow */
+	A_UINT32 msdu_drop_ring_ov;
+	/* Number of MSDUs dropped due to FC mismatch */
+	A_UINT32 msdu_drop_fc_mismatch;
+	/* Number of MSDUs dropped due to mgt frame in Remote ring */
+	A_UINT32 msdu_drop_mgmt_remote_ring;
+	/* Number of MSDUs dropped due to errors not reported in attention word */
+	A_UINT32 msdu_drop_misc;
+	/* Number of MSDUs go to offload before reorder */
+	A_UINT32 offload_msdu_wal;
+	/* Number of data frame dropped by offload after reorder */
+	A_UINT32 offload_msdu_reorder;
+	/* Number of MPDUs with sequence number in the past and within
+	the BA window */
+	A_UINT32 dup_past_within_window;
+	/* Number of MPDUs with sequence number in the past and
+	* outside the BA window */
+	A_UINT32 dup_past_outside_window;
+	/* Number of MSDUs with decrypt/MIC error */
+	A_UINT32 rxdesc_err_decrypt_mic;
+	/* Number of data MSDUs received on both local and remote rings */
+	A_UINT32 data_msdus_on_both_rings;
+};
+
+
+/*
+ * Rx Remote buffer statistics
+ * NB: all the fields must be defined in 4 octets size.
+ */
+struct rx_remote_buffer_mgmt_stats {
+	/* Total number of MSDUs reaped for Rx processing */
+	A_UINT32 remote_reaped;
+	/* MSDUs recycled within firmware */
+	A_UINT32 remote_recycled;
+	/* MSDUs stored by Data Rx */
+	A_UINT32 data_rx_msdus_stored;
+	/* Number of HTT indications from WAL Rx MSDU */
+	A_UINT32 wal_rx_ind;
+	/* Number of unconsumed HTT indications from WAL Rx MSDU */
+	A_UINT32 wal_rx_ind_unconsumed;
+	/* Number of HTT indications from Data Rx MSDU */
+	A_UINT32 data_rx_ind;
+	/* Number of unconsumed HTT indications from Data Rx MSDU */
+	A_UINT32 data_rx_ind_unconsumed;
+	/* Number of HTT indications from ATHBUF */
+	A_UINT32 athbuf_rx_ind;
+	/* Number of remote buffers requested for refill */
+	A_UINT32 refill_buf_req;
+	/* Number of remote buffers filled by the host */
+	A_UINT32 refill_buf_rsp;
+	/* Number of times MAC hw_index = f/w write_index */
+	A_INT32 mac_no_bufs;
+	/* Number of times f/w write_index = f/w read_index for MAC Rx ring */
+	A_INT32 fw_indices_equal;
+	/* Number of times f/w finds no buffers to post */
+	A_INT32 host_no_bufs;
+};
+
+/*
+ * TXBF MU/SU packets and NDPA statistics
+ * NB: all the fields must be defined in 4 octets size.
+ */
+struct rx_txbf_musu_ndpa_pkts_stats {
+	/* number of TXBF MU packets received */
+	A_UINT32 number_mu_pkts;
+	/* number of TXBF SU packets received */
+	A_UINT32 number_su_pkts;
+	/* number of TXBF directed NDPA */
+	A_UINT32 txbf_directed_ndpa_count;
+	/* number of TXBF retried NDPA */
+	A_UINT32 txbf_ndpa_retry_count;
+	/* total number of TXBF NDPA */
+	A_UINT32 txbf_total_ndpa_count;
+	/* must be set to 0x0 */
+	A_UINT32 reserved[3];
+};
+
+/*
+ * htt_dbg_stats_status -
+ * present -     The requested stats have been delivered in full.
+ *               This indicates that either the stats information was contained
+ *               in its entirety within this message, or else this message
+ *               completes the delivery of the requested stats info that was
+ *               partially delivered through earlier STATS_CONF messages.
+ * partial -     The requested stats have been delivered in part.
+ *               One or more subsequent STATS_CONF messages with the same
+ *               cookie value will be sent to deliver the remainder of the
+ *               information.
+ * error -       The requested stats could not be delivered, for example due
+ *               to a shortage of memory to construct a message holding the
+ *               requested stats.
+ * invalid -     The requested stat type is either not recognized, or the
+ *               target is configured to not gather the stats type in question.
+ * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ * series_done - This special value indicates that no further stats info
+ *               elements are present within a series of stats info elems
+ *               (within a stats upload confirmation message).
+ */
+enum htt_dbg_stats_status {
+	HTT_DBG_STATS_STATUS_PRESENT = 0,
+	HTT_DBG_STATS_STATUS_PARTIAL = 1,
+	HTT_DBG_STATS_STATUS_ERROR = 2,
+	HTT_DBG_STATS_STATUS_INVALID = 3,
+
+
+	HTT_DBG_STATS_STATUS_SERIES_DONE = 7
+};
+
+/**
+ * @brief target -> host statistics upload
+ *
+ * @details
+ * The following field definitions describe the format of the HTT target
+ * to host stats upload confirmation message.
+ * The message contains a cookie echoed from the HTT host->target stats
+ * upload request, which identifies which request the confirmation is
+ * for, and a series of tag-length-value stats information elements.
+ * The tag-length header for each stats info element also includes a
+ * status field, to indicate whether the request for the stat type in
+ * question was fully met, partially met, unable to be met, or invalid
+ * (if the stat type in question is disabled in the target).
+ * A special value of all 1's in this status field is used to indicate
+ * the end of the series of stats info elements.
+ *
+ *
+ * |31                         16|15           8|7   5|4       0|
+ * |------------------------------------------------------------|
+ * |                  reserved                  |    msg type   |
+ * |------------------------------------------------------------|
+ * |                        cookie LSBs                         |
+ * |------------------------------------------------------------|
+ * |                        cookie MSBs                         |
+ * |------------------------------------------------------------|
+ * |      stats entry length     |   reserved   |  S  |stat type|
+ * |------------------------------------------------------------|
+ * |                                                            |
+ * |                  type-specific stats info                  |
+ * |                                                            |
+ * |------------------------------------------------------------|
+ * |      stats entry length     |   reserved   |  S  |stat type|
+ * |------------------------------------------------------------|
+ * |                                                            |
+ * |                  type-specific stats info                  |
+ * |                                                            |
+ * |------------------------------------------------------------|
+ * |              n/a            |   reserved   | 111 |   n/a   |
+ * |------------------------------------------------------------|
+ * Header fields:
+ *  - MSG_TYPE
+ *    Bits 7:0
+ *    Purpose: identifies this is a statistics upload confirmation message
+ *    Value: 0x9
+ *  - COOKIE_LSBS
+ *    Bits 31:0
+ *    Purpose: Provide a mechanism to match a target->host stats confirmation
+ *        message with its preceding host->target stats request message.
+ *    Value: LSBs of the opaque cookie specified by the host-side requestor
+ *  - COOKIE_MSBS
+ *    Bits 31:0
+ *    Purpose: Provide a mechanism to match a target->host stats confirmation
+ *        message with its preceding host->target stats request message.
+ *    Value: MSBs of the opaque cookie specified by the host-side requestor
+ *
+ * Stats Information Element tag-length header fields:
+ *  - STAT_TYPE
+ *    Bits 4:0
+ *    Purpose: identifies the type of statistics info held in the
+ *        following information element
+ *    Value: htt_dbg_stats_type
+ *  - STATUS
+ *    Bits 7:5
+ *    Purpose: indicate whether the requested stats are present
+ *    Value: htt_dbg_stats_status, including a special value (0x7) to mark
+ *        the completion of the stats entry series
+ *  - LENGTH
+ *    Bits 31:16
+ *    Purpose: indicate the stats information size
+ *    Value: This field specifies the number of bytes of stats information
+ *       that follows the element tag-length header.
+ *       It is expected but not required that this length is a multiple of
+ *       4 bytes.  Even if the length is not an integer multiple of 4, the
+ *       subsequent stats entry header will begin on a 4-byte aligned
+ *       boundary.
+ */
+#define HTT_T2H_STATS_COOKIE_SIZE         8
+
+#define HTT_T2H_STATS_CONF_TAIL_SIZE      4
+
+#define HTT_T2H_STATS_CONF_HDR_SIZE       4
+
+#define HTT_T2H_STATS_CONF_TLV_HDR_SIZE   4
+
+#define HTT_T2H_STATS_CONF_TLV_TYPE_M     0x0000001f
+#define HTT_T2H_STATS_CONF_TLV_TYPE_S     0
+#define HTT_T2H_STATS_CONF_TLV_STATUS_M   0x000000e0
+#define HTT_T2H_STATS_CONF_TLV_STATUS_S   5
+#define HTT_T2H_STATS_CONF_TLV_LENGTH_M   0xffff0000
+#define HTT_T2H_STATS_CONF_TLV_LENGTH_S   16
+
+#define HTT_T2H_STATS_CONF_TLV_TYPE_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_T2H_STATS_CONF_TLV_TYPE, value);	\
+		(word) |= (value)  << HTT_T2H_STATS_CONF_TLV_TYPE_S;	\
+	} while (0)
+#define HTT_T2H_STATS_CONF_TLV_TYPE_GET(word)		\
+	(((word) & HTT_T2H_STATS_CONF_TLV_TYPE_M) >>	\
+	 HTT_T2H_STATS_CONF_TLV_TYPE_S)
+
+#define HTT_T2H_STATS_CONF_TLV_STATUS_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_T2H_STATS_CONF_TLV_STATUS, value); \
+		(word) |= (value)  << HTT_T2H_STATS_CONF_TLV_STATUS_S;	\
+	} while (0)
+#define HTT_T2H_STATS_CONF_TLV_STATUS_GET(word)		\
+	(((word) & HTT_T2H_STATS_CONF_TLV_STATUS_M) >>	\
+	 HTT_T2H_STATS_CONF_TLV_STATUS_S)
+
+#define HTT_T2H_STATS_CONF_TLV_LENGTH_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_T2H_STATS_CONF_TLV_LENGTH, value); \
+		(word) |= (value)  << HTT_T2H_STATS_CONF_TLV_LENGTH_S;	\
+	} while (0)
+#define HTT_T2H_STATS_CONF_TLV_LENGTH_GET(word)		\
+	(((word) & HTT_T2H_STATS_CONF_TLV_LENGTH_M) >>	\
+	 HTT_T2H_STATS_CONF_TLV_LENGTH_S)
+
+#define HL_HTT_FW_RX_DESC_RSVD_SIZE 18
+#define HTT_MAX_AGGR 64
+#define HTT_HL_MAX_AGGR 18
+
+/**
+ * @brief host -> target FRAG DESCRIPTOR/MSDU_EXT DESC bank
+ *
+ * @details
+ * The following field definitions describe the format of the HTT host
+ * to target frag_desc/msdu_ext bank configuration message.
+ * The message contains the based address and the min and max id of the
+ * MSDU_EXT/FRAG_DESC that will be used by the HTT to map MSDU DESC and
+ * MSDU_EXT/FRAG_DESC.
+ * HTT will use id in HTT descriptor instead sending the frag_desc_ptr.
+ * In peregrine the firmware will use fragment_desc_ptr but in WIFI2.0
+ * the hardware does the mapping/translation.
+ *
+ * Total banks that can be configured is configured to 16.
+ *
+ * This should be called before any TX has be initiated by the HTT
+ *
+ * |31                         16|15           8|7   5|4       0|
+ * |------------------------------------------------------------|
+ * | DESC_SIZE    |  NUM_BANKS   | RES |SWP|pdev|    msg type   |
+ * |------------------------------------------------------------|
+ * |                 BANK0_BASE_ADDRESS (bits 31:0)             |
+ #if HTT_PADDR64
+ * |                 BANK0_BASE_ADDRESS (bits 63:32)            |
+ #endif
+ * |------------------------------------------------------------|
+ * |                            ...                             |
+ * |------------------------------------------------------------|
+ * |                 BANK15_BASE_ADDRESS (bits 31:0)            |
+ #if HTT_PADDR64
+ * |                 BANK15_BASE_ADDRESS (bits 63:32)           |
+ #endif
+ * |------------------------------------------------------------|
+ * |       BANK0_MAX_ID          |       BANK0_MIN_ID           |
+ * |------------------------------------------------------------|
+ * |                            ...                             |
+ * |------------------------------------------------------------|
+ * |       BANK15_MAX_ID         |       BANK15_MIN_ID          |
+ * |------------------------------------------------------------|
+ * Header fields:
+ *  - MSG_TYPE
+ *    Bits 7:0
+ *    Value: 0x6
+ *  for systems with 64-bit format for bus addresses:
+ *      - BANKx_BASE_ADDRESS_LO
+ *        Bits 31:0
+ *        Purpose: Provide a mechanism to specify the base address of the
+ *             MSDU_EXT bank physical/bus address.
+ *        Value: lower 4 bytes of MSDU_EXT bank physical / bus address
+ *      - BANKx_BASE_ADDRESS_HI
+ *        Bits 31:0
+ *        Purpose: Provide a mechanism to specify the base address of the
+ *             MSDU_EXT bank physical/bus address.
+ *        Value: higher 4 bytes of MSDU_EXT bank physical / bus address
+ *  for systems with 32-bit format for bus addresses:
+ *      - BANKx_BASE_ADDRESS
+ *        Bits 31:0
+ *        Purpose: Provide a mechanism to specify the base address of the
+ *             MSDU_EXT bank physical/bus address.
+ *        Value: MSDU_EXT bank physical / bus address
+ *  - BANKx_MIN_ID
+ *    Bits 15:0
+ *    Purpose: Provide a mechanism to specify the min index that needs to
+ *          mapped.
+ *  - BANKx_MAX_ID
+ *    Bits 31:16
+ *    Purpose: Provide a mechanism to specify the max index that needs to
+ *          mapped.
+ *
+ */
+
+/** @todo Compress the fields to fit MAX HTT Message size, until then
+ *        configure to a safe value.
+ *  @note MAX supported banks is 16.
+ */
+#define HTT_TX_MSDU_EXT_BANK_MAX 4
+
+#define HTT_H2T_FRAG_DESC_BANK_PDEVID_M       0x300
+#define HTT_H2T_FRAG_DESC_BANK_PDEVID_S       8
+
+#define HTT_H2T_FRAG_DESC_BANK_SWAP_M         0x400
+#define HTT_H2T_FRAG_DESC_BANK_SWAP_S         10
+
+#define HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_M    0xff0000
+#define HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_S    16
+
+#define HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_M    0xff000000
+#define HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_S    24
+
+#define HTT_H2T_FRAG_DESC_BANK_MIN_IDX_M      0xffff
+#define HTT_H2T_FRAG_DESC_BANK_MIN_IDX_S      0
+
+#define HTT_H2T_FRAG_DESC_BANK_MAX_IDX_M      0xffff0000
+#define HTT_H2T_FRAG_DESC_BANK_MAX_IDX_S      16
+
+#define HTT_H2T_FRAG_DESC_BANK_PDEVID_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_PDEVID, value); \
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_PDEVID_S);	\
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_PDEVID_GET(word)				\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_PDEVID_M) >>			\
+	HTT_H2T_FRAG_DESC_BANK_PDEVID_S)
+
+#define HTT_H2T_FRAG_DESC_BANK_SWAP_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_SWAP, value);\
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_SWAP_S);\
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_SWAP_GET(word)			\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_SWAP_M) >>		\
+	HTT_H2T_FRAG_DESC_BANK_SWAP_S)
+
+#define HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_NUM_BANKS, value); \
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_S); \
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_GET(word)			\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_M) >>		\
+	HTT_H2T_FRAG_DESC_BANK_NUM_BANKS_S)
+
+#define HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_SET(word, value)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_DESC_SIZE, value); \
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_S); \
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_GET(word)			\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_M) >>		\
+	HTT_H2T_FRAG_DESC_BANK_DESC_SIZE_S)
+
+#define HTT_H2T_FRAG_DESC_BANK_MIN_IDX_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_MIN_IDX, value); \
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_MIN_IDX_S); \
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_MIN_IDX_GET(word)			\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_MIN_IDX_M) >>			\
+	HTT_H2T_FRAG_DESC_BANK_MIN_IDX_S)
+
+#define HTT_H2T_FRAG_DESC_BANK_MAX_IDX_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_H2T_FRAG_DESC_BANK_MAX_IDX, value); \
+		(word) |= ((value) << HTT_H2T_FRAG_DESC_BANK_MAX_IDX_S); \
+	} while (0)
+#define HTT_H2T_FRAG_DESC_BANK_MAX_IDX_GET(word)			\
+	(((word) & HTT_H2T_FRAG_DESC_BANK_MAX_IDX_M) >>			\
+	HTT_H2T_FRAG_DESC_BANK_MAX_IDX_S)
+
+
+/*
+ * TEMPLATE_HTT_TX_FRAG_DESC_BANK_CFG_T:
+ * This macro defines a htt_tx_frag_descXXX_bank_cfg_t in which any physical
+ * addresses are stored in a XXX-bit field.
+ * This macro is used to define both htt_tx_frag_desc32_bank_cfg_t and
+ * htt_tx_frag_desc64_bank_cfg_t structs.
+ */
+#define TEMPLATE_HTT_TX_FRAG_DESC_BANK_CFG_T(				\
+	_paddr_bits_,							\
+	_paddr__bank_base_address_)					\
+	PREPACK struct htt_tx_frag_desc ## _paddr_bits_ ## _bank_cfg_t { \
+		/** word 0						\
+		 * msg_type:    8,					\
+		 * pdev_id:     2,					\
+		 * swap:        1,					\
+		 * reserved0:   5,					\
+		 * num_banks:   8,					\
+		 * desc_size:    8;					\
+		 */							\
+		A_UINT32 word0;						\
+		/*							\
+		 * If bank_base_address is 64 bits, the upper / lower
+		 * halves are stored	\
+		 * in little-endian order (bytes 0-3 in the first A_UINT32,
+		 * bytes 4-7 in the second A_UINT32).		\
+		 */							\
+		_paddr__bank_base_address_[HTT_TX_MSDU_EXT_BANK_MAX];	\
+		A_UINT32 bank_info[HTT_TX_MSDU_EXT_BANK_MAX];		\
+	} POSTPACK
+/* define htt_tx_frag_desc32_bank_cfg_t */
+TEMPLATE_HTT_TX_FRAG_DESC_BANK_CFG_T(32, HTT_VAR_PADDR32(bank_base_address));
+/* define htt_tx_frag_desc64_bank_cfg_t */
+TEMPLATE_HTT_TX_FRAG_DESC_BANK_CFG_T(64, HTT_VAR_PADDR64_LE(bank_base_address));
+/*
+ * Make htt_tx_frag_desc_bank_cfg_t be an alias for either
+ * htt_tx_frag_desc32_bank_cfg_t or htt_tx_frag_desc64_bank_cfg_t
+ */
+#if HTT_PADDR64
+#define htt_tx_frag_desc_bank_cfg_t htt_tx_frag_desc64_bank_cfg_t
+#else
+#define htt_tx_frag_desc_bank_cfg_t htt_tx_frag_desc32_bank_cfg_t
+#endif
+
+
+/**
+ * @brief target -> host HTT TX Credit total count update message definition
+ *
+ *|31                 16|15|14       9|  8    |7       0 |
+ *|---------------------+--+----------+-------+----------|
+ *|cur htt credit delta | Q| reserved | sign  | msg type |
+ *|------------------------------------------------------|
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a htt tx credit delta update message
+ *     Value: 0xe
+ *   - SIGN
+ *     Bits 8
+ *      identifies whether credit delta is positive or negative
+ *     Value:
+ *       - 0x0: credit delta is positive, rebalance in some buffers
+ *       - 0x1: credit delta is negative, rebalance out some buffers
+ *   - reserved
+ *     Bits 14:9
+ *     Value: 0x0
+ *   - TXQ_GRP
+ *     Bit 15
+ *     Purpose: indicates whether any tx queue group information elements
+ *         are appended to the tx credit update message
+ *     Value: 0 -> no tx queue group information element is present
+ *            1 -> a tx queue group information element immediately follows
+ *   - DELTA_COUNT
+ *     Bits 31:16
+ *     Purpose: Specify current htt credit delta absolute count
+ */
+
+#define HTT_TX_CREDIT_SIGN_BIT_M       0x00000100
+#define HTT_TX_CREDIT_SIGN_BIT_S       8
+#define HTT_TX_CREDIT_TXQ_GRP_M        0x00008000
+#define HTT_TX_CREDIT_TXQ_GRP_S        15
+#define HTT_TX_CREDIT_DELTA_ABS_M      0xffff0000
+#define HTT_TX_CREDIT_DELTA_ABS_S      16
+
+
+#define HTT_TX_CREDIT_SIGN_BIT_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_CREDIT_SIGN_BIT, value);	\
+		(word) |= (value)  << HTT_TX_CREDIT_SIGN_BIT_S;		\
+	} while (0)
+
+#define HTT_TX_CREDIT_SIGN_BIT_GET(word)				\
+	(((word) & HTT_TX_CREDIT_SIGN_BIT_M) >> HTT_TX_CREDIT_SIGN_BIT_S)
+
+#define HTT_TX_CREDIT_TXQ_GRP_SET(word, value)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_CREDIT_TXQ_GRP, value);	\
+		(word) |= (value)  << HTT_TX_CREDIT_TXQ_GRP_S;		\
+	} while (0)
+
+#define HTT_TX_CREDIT_TXQ_GRP_GET(word)					\
+	(((word) & HTT_TX_CREDIT_TXQ_GRP_M) >> HTT_TX_CREDIT_TXQ_GRP_S)
+
+#define HTT_TX_CREDIT_DELTA_ABS_SET(word, value)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_TX_CREDIT_DELTA_ABS, value);	\
+		(word) |= (value)  << HTT_TX_CREDIT_DELTA_ABS_S;	\
+	} while (0)
+
+#define HTT_TX_CREDIT_DELTA_ABS_GET(word)				\
+	(((word) & HTT_TX_CREDIT_DELTA_ABS_M) >> HTT_TX_CREDIT_DELTA_ABS_S)
+
+
+#define HTT_TX_CREDIT_MSG_BYTES 4
+
+#define HTT_TX_CREDIT_SIGN_BIT_POSITIVE  0x0
+#define HTT_TX_CREDIT_SIGN_BIT_NEGATIVE  0x1
+
+
+/**
+ * @brief HTT WDI_IPA Operation Response Message
+ *
+ * @details
+ *  HTT WDI_IPA Operation Response message is sent by target
+ *  to host confirming suspend or resume operation.
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |             op_code             |      Rsvd      |     msg_type   |
+ *     |-------------------------------------------------------------------|
+ *     |             Rsvd                |          Response len           |
+ *     |-------------------------------------------------------------------|
+ *     |                                                                   |
+ *     |                  Response-type specific info                      |
+ *     |                                                                   |
+ *     |                                                                   |
+ *     |-------------------------------------------------------------------|
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: Identifies this as WDI_IPA Operation Response message
+ *     value: = 0x13
+ *   - OP_CODE
+ *     Bits 31:16
+ *     Purpose: Identifies the operation target is responding to
+ *     (e.g. TX suspend)
+ *     value: = enum htt_wdi_ipa_op_code
+ *   - RSP_LEN
+ *     Bits 16:0
+ *     Purpose: length for the response-type specific info
+ *     value: = length in bytes for response-type specific info
+ *              For example, if OP_CODE == HTT_WDI_IPA_OPCODE_DBG_STATS, the
+ *              length value will be sizeof(struct wlan_wdi_ipa_dbg_stats_t).
+ */
+
+PREPACK struct htt_wdi_ipa_op_response_t {
+	/* DWORD 0: flags and meta-data */
+	A_UINT32
+		msg_type:8,	/* HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE */
+		reserved1:8,
+		op_code:16;
+	A_UINT32
+		rsp_len:16,
+		reserved2:16;
+} POSTPACK;
+
+#define HTT_WDI_IPA_OP_RESPONSE_SZ                    8	/* bytes */
+
+#define HTT_WDI_IPA_OP_RESPONSE_OP_CODE_M             0xffff0000
+#define HTT_WDI_IPA_OP_RESPONSE_OP_CODE_S             16
+
+#define HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_M             0x0000ffff
+#define HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_S             0
+
+#define HTT_WDI_IPA_OP_RESPONSE_OP_CODE_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_OP_RESPONSE_OP_CODE_M) >>		\
+	HTT_WDI_IPA_OP_RESPONSE_OP_CODE_S)
+#define HTT_WDI_IPA_OP_RESPONSE_OP_CODE_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_OP_RESPONSE_OP_CODE, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_OP_RESPONSE_OP_CODE_S)); \
+	} while (0)
+
+#define HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_GET(_var)			\
+	(((_var) & HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_M) >>		\
+	HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_S)
+#define HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_SET(_var, _val)			\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_WDI_IPA_OP_RESPONSE_RSP_LEN, _val); \
+		((_var) |= ((_val) << HTT_WDI_IPA_OP_RESPONSE_RSP_LEN_S)); \
+	} while (0)
+
+
+enum htt_phy_mode {
+	htt_phy_mode_11a = 0,
+	htt_phy_mode_11g = 1,
+	htt_phy_mode_11b = 2,
+	htt_phy_mode_11g_only = 3,
+	htt_phy_mode_11na_ht20 = 4,
+	htt_phy_mode_11ng_ht20 = 5,
+	htt_phy_mode_11na_ht40 = 6,
+	htt_phy_mode_11ng_ht40 = 7,
+	htt_phy_mode_11ac_vht20 = 8,
+	htt_phy_mode_11ac_vht40 = 9,
+	htt_phy_mode_11ac_vht80 = 10,
+	htt_phy_mode_11ac_vht20_2g = 11,
+	htt_phy_mode_11ac_vht40_2g = 12,
+	htt_phy_mode_11ac_vht80_2g = 13,
+	htt_phy_mode_11ac_vht80_80 = 14,	/* 80+80 */
+	htt_phy_mode_11ac_vht160 = 15,
+
+	htt_phy_mode_max,
+};
+
+/**
+ * @brief target -> host HTT channel change indication
+ * @details
+ *  Specify when a channel change occurs.
+ *  This allows the host to precisely determine which rx frames arrived
+ *  on the old channel and which rx frames arrived on the new channel.
+ *
+ *|31                                         |7       0 |
+ *|-------------------------------------------+----------|
+ *|                  reserved                 | msg type |
+ *|------------------------------------------------------|
+ *|              primary_chan_center_freq_mhz            |
+ *|------------------------------------------------------|
+ *|            contiguous_chan1_center_freq_mhz          |
+ *|------------------------------------------------------|
+ *|            contiguous_chan2_center_freq_mhz          |
+ *|------------------------------------------------------|
+ *|                        phy_mode                      |
+ *|------------------------------------------------------|
+ *
+ * Header fields:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as a htt channel change indication message
+ *     Value: 0x15
+ *   - PRIMARY_CHAN_CENTER_FREQ_MHZ
+ *     Bits 31:0
+ *     Purpose: identify the (center of the) new 20 MHz primary channel
+ *     Value: center frequency of the 20 MHz primary channel, in MHz units
+ *   - CONTIG_CHAN1_CENTER_FREQ_MHZ
+ *     Bits 31:0
+ *     Purpose: identify the (center of the) contiguous frequency range
+ *         comprising the new channel.
+ *         For example, if the new channel is a 80 MHz channel extending
+ *         60 MHz beyond the primary channel, this field would be 30 larger
+ *         than the primary channel center frequency field.
+ *     Value: center frequency of the contiguous frequency range comprising
+ *         the full channel in MHz units
+ *         (80+80 channels also use the CONTIG_CHAN2 field)
+ *   - CONTIG_CHAN2_CENTER_FREQ_MHZ
+ *     Bits 31:0
+ *     Purpose: Identify the (center of the) 80 MHz extension frequency range
+ *         within a VHT 80+80 channel.
+ *         This field is only relevant for VHT 80+80 channels.
+ *     Value: center frequency of the 80 MHz extension channel in a VHT 80+80
+ *         channel (arbitrary value for cases besides VHT 80+80)
+ *   - PHY_MODE
+ *     Bits 31:0
+ *     Purpose: specify the PHY channel's type (legacy vs. HT vs. VHT), width,
+ *         and band
+ *     Value: htt_phy_mode enum value
+ */
+
+PREPACK struct htt_chan_change_t {
+	/* DWORD 0: flags and meta-data */
+	A_UINT32 msg_type:8,	/* HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE */
+	reserved1:24;
+	A_UINT32 primary_chan_center_freq_mhz;
+	A_UINT32 contig_chan1_center_freq_mhz;
+	A_UINT32 contig_chan2_center_freq_mhz;
+	A_UINT32 phy_mode;
+} POSTPACK;
+
+#define HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_M  0xffffffff
+#define HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_S  0
+#define HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_M  0xffffffff
+#define HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_S  0
+#define HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_M  0xffffffff
+#define HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_S  0
+#define HTT_CHAN_CHANGE_PHY_MODE_M                      0xffffffff
+#define HTT_CHAN_CHANGE_PHY_MODE_S                      0
+
+
+#define HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(				\
+	HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ, value);	\
+	(word) |= (value)  <<			\
+	HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_S; \
+} while (0)
+#define HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_GET(word)		\
+	(((word) & HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_M)	\
+	 >> HTT_CHAN_CHANGE_PRIMARY_CHAN_CENTER_FREQ_MHZ_S)
+
+#define HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(				\
+	HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ, value);	\
+	(word) |= (value)  <<			\
+	HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_S; \
+} while (0)
+#define HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_GET(word)		\
+	(((word) & HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_M)	\
+	 >> HTT_CHAN_CHANGE_CONTIG_CHAN1_CENTER_FREQ_MHZ_S)
+
+#define HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_SET(word, value)	\
+do {								\
+	HTT_CHECK_SET_VAL(				\
+	HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ, value);	\
+	(word) |= (value)  <<			\
+	HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_S; \
+} while (0)
+#define HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_GET(word)		\
+	(((word) & HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_M)	\
+	 >> HTT_CHAN_CHANGE_CONTIG_CHAN2_CENTER_FREQ_MHZ_S)
+
+#define HTT_CHAN_CHANGE_PHY_MODE_SET(word, value)			\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_CHAN_CHANGE_PHY_MODE, value);	\
+	(word) |= (value)  << HTT_CHAN_CHANGE_PHY_MODE_S;	\
+} while (0)
+#define HTT_CHAN_CHANGE_PHY_MODE_GET(word)	\
+	(((word) & HTT_CHAN_CHANGE_PHY_MODE_M)	\
+	 >> HTT_CHAN_CHANGE_PHY_MODE_S)
+
+#define HTT_CHAN_CHANGE_BYTES sizeof(struct htt_chan_change_t)
+
+
+/**
+ * @brief rx offload packet error message
+ *
+ * @details
+ *  HTT_RX_OFLD_PKT_ERR message is sent by target to host to indicate err
+ *  of target payload like mic err.
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |      tid       |     vdev_id    |  msg_sub_type  |    msg_type    |
+ *     |-------------------------------------------------------------------|
+ *     :                    (sub-type dependent content)                   :
+ *     :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -:
+ * Header fields:
+ *   - msg_type
+ *     Bits 7:0
+ *     Purpose: Identifies this as HTT_RX_OFLD_PKT_ERR message
+ *     value: 0x16 (HTT_T2H_MSG_TYPE_RX_OFLD_PKT_ERR)
+ *   - msg_sub_type
+ *     Bits 15:8
+ *     Purpose: Identifies which type of rx error is reported by this message
+ *     value: htt_rx_ofld_pkt_err_type
+ *   - vdev_id
+ *     Bits 23:16
+ *     Purpose: Identifies which vdev received the erroneous rx frame
+ *     value:
+ *   - tid
+ *     Bits 31:24
+ *     Purpose: Identifies the traffic type of the rx frame
+ *     value:
+ *
+ *   - The payload fields used if the sub-type == MIC error are shown below.
+ *     Note - MIC err is per MSDU, while PN is per MPDU.
+ *     The FW will discard the whole MPDU if any MSDU within the MPDU is marked
+ *     with MIC err in A-MSDU case, so FW will send only one HTT message
+ *     with the PN of this MPDU attached to indicate MIC err for one MPDU
+ *     instead of sending separate HTT messages for each wrong MSDU within
+ *     the MPDU.
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |     Rsvd       |     key_id     |             peer_id             |
+ *     |-------------------------------------------------------------------|
+ *     |                        receiver MAC addr 31:0                     |
+ *     |-------------------------------------------------------------------|
+ *     |              Rsvd               |    receiver MAC addr 47:32      |
+ *     |-------------------------------------------------------------------|
+ *     |                     transmitter MAC addr 31:0                     |
+ *     |-------------------------------------------------------------------|
+ *     |              Rsvd               |    transmitter MAC addr 47:32   |
+ *     |-------------------------------------------------------------------|
+ *     |                              PN 31:0                              |
+ *     |-------------------------------------------------------------------|
+ *     |              Rsvd               |              PN 47:32           |
+ *     |-------------------------------------------------------------------|
+ *   - peer_id
+ *     Bits 15:0
+ *     Purpose: identifies which peer is frame is from
+ *     value:
+ *   - key_id
+ *     Bits 23:16
+ *     Purpose: identifies key_id of rx frame
+ *     value:
+ *   - RA_31_0 (receiver MAC addr 31:0)
+ *     Bits 31:0
+ *     Purpose: identifies by MAC address which vdev received the frame
+ *     value: MAC address lower 4 bytes
+ *   - RA_47_32 (receiver MAC addr 47:32)
+ *     Bits 15:0
+ *     Purpose: identifies by MAC address which vdev received the frame
+ *     value: MAC address upper 2 bytes
+ *   - TA_31_0 (transmitter MAC addr 31:0)
+ *     Bits 31:0
+ *     Purpose: identifies by MAC address which peer transmitted the frame
+ *     value: MAC address lower 4 bytes
+ *   - TA_47_32 (transmitter MAC addr 47:32)
+ *     Bits 15:0
+ *     Purpose: identifies by MAC address which peer transmitted the frame
+ *     value: MAC address upper 2 bytes
+ *   - PN_31_0
+ *     Bits 31:0
+ *     Purpose: Identifies pn of rx frame
+ *     value: PN lower 4 bytes
+ *   - PN_47_32
+ *     Bits 15:0
+ *     Purpose: Identifies pn of rx frame
+ *     value:
+ *         TKIP or CCMP: PN upper 2 bytes
+ *         WAPI: PN bytes 6:5 (bytes 15:7 not included in this message)
+ */
+
+enum htt_rx_ofld_pkt_err_type {
+	HTT_RX_OFLD_PKT_ERR_TYPE_NONE = 0,
+	HTT_RX_OFLD_PKT_ERR_TYPE_MIC_ERR,
+};
+
+/* definition for HTT_RX_OFLD_PKT_ERR msg hdr */
+#define HTT_RX_OFLD_PKT_ERR_HDR_BYTES 4
+
+#define HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_M     0x0000ff00
+#define HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_S     8
+
+#define HTT_RX_OFLD_PKT_ERR_VDEV_ID_M          0x00ff0000
+#define HTT_RX_OFLD_PKT_ERR_VDEV_ID_S          16
+
+#define HTT_RX_OFLD_PKT_ERR_TID_M              0xff000000
+#define HTT_RX_OFLD_PKT_ERR_TID_S              24
+
+#define HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_GET(_var)	\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_M)	\
+	 >> HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_S)
+#define HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE, _val); \
+		((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MSG_SUB_TYPE_S)); \
+	} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_VDEV_ID_GET(_var)			\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_VDEV_ID_M) >>		\
+	HTT_RX_OFLD_PKT_ERR_VDEV_ID_S)
+#define HTT_RX_OFLD_PKT_ERR_VDEV_ID_SET(_var, _val)		\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_VDEV_ID, _val);	\
+		((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_VDEV_ID_S));	\
+	} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_TID_GET(_var)				\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_TID_M) >> HTT_RX_OFLD_PKT_ERR_TID_S)
+#define HTT_RX_OFLD_PKT_ERR_TID_SET(_var, _val)				\
+	do {								\
+		HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_TID, _val);	\
+		((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_TID_S));	\
+	} while (0)
+
+/* definition for HTT_RX_OFLD_PKT_ERR_MIC_ERR msg sub-type payload */
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_BYTES   28
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_M          0x0000ffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_S          0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_M            0x00ff0000
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_S            16
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_M          0xffffffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_S          0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_M         0x0000ffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_S         0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_M          0xffffffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_S          0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_M         0x0000ffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_S         0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_M          0xffffffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_S          0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_M         0x0000ffff
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_S         0
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_PEER_ID_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_KEYID_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_31_0_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_RA_47_32_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_31_0_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_TA_47_32_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_31_0_S)); \
+} while (0)
+
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_GET(_var)		\
+	(((_var) & HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_M) >>	\
+	 HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_S)
+#define HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_SET(_var, _val)		\
+do {								\
+	HTT_CHECK_SET_VAL(HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32, _val); \
+	((_var) |= ((_val) << HTT_RX_OFLD_PKT_ERR_MIC_ERR_PN_47_32_S)); \
+} while (0)
+
+/**
+ * @brief peer rate report message
+ *
+ * @details
+ *  HTT_T2H_MSG_TYPE_RATE_REPORT message is sent by target to host to indicate the
+ *  justified rate of all the peers.
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |           peer_count            |                |    msg_type    |
+ *     |-------------------------------------------------------------------|
+ *     :            Payload (variant number of peer rate report)           :
+ *     :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -:
+ * Header fields:
+ *   - msg_type
+ *     Bits 7:0
+ *     Purpose: Identifies this as HTT_T2H_MSG_TYPE_RATE_REPORT message.
+ *     value: 0x17 (HTT_T2H_MSG_TYPE_RATE_REPORT)
+ *   - reserved
+ *     Bits 15:8
+ *     Purpose:
+ *     value:
+ *   - peer_count
+ *     Bits 31:16
+ *     Purpose: Specify how many peer rate report elements are present in the payload.
+ *     value:
+ *
+  * Payload:
+ *     There are variant number of peer rate report follow the first 32 bits.
+ *     The peer rate report is defined as follows.
+ *
+ *     |31                   20|19     16|15                              0|
+ *     |-----------------------+---------+---------------------------------|-
+ *     |        reserved       |   phy   |             peer_id             | \
+ *     |-------------------------------------------------------------------|  -> report #0
+ *     |                               rate                                | /
+ *     |-----------------------+---------+---------------------------------|-
+ *     |        reserved       |   phy   |             peer_id             | \
+ *     |-------------------------------------------------------------------|  -> report #1
+ *     |                               rate                                | /
+ *     |-----------------------+---------+---------------------------------|-
+ *     |        reserved       |   phy   |             peer_id             | \
+ *     |-------------------------------------------------------------------|  -> report #2
+ *     |                               rate                                | /
+ *     |-------------------------------------------------------------------|-
+ *     :                                                                   :
+ *     :                                                                   :
+ *     :                                                                   :
+ *     :-------------------------------------------------------------------:
+ *
+ *   - peer_id
+ *     Bits 15:0
+ *     Purpose: identify the peer
+ *     value:
+ *   - phy
+ *     Bits 19:16
+ *     Purpose: identify which phy is in use
+ *     value: 0=11b, 1=11a/g, 2=11n, 3=11ac.
+ *         Please see enum htt_peer_report_phy_type for detail.
+ *   - reserved
+ *     Bits 31:20
+ *     Purpose:
+ *     value:
+ *   - rate
+ *     Bits 31:0
+ *     Purpose: represent the justified rate of the peer specified by peer_id
+ *     value:
+ */
+
+enum htt_peer_rate_report_phy_type {
+	HTT_PEER_RATE_REPORT_11B = 0,
+	HTT_PEER_RATE_REPORT_11A_G,
+	HTT_PEER_RATE_REPORT_11N,
+	HTT_PEER_RATE_REPORT_11AC,
+};
+
+#define HTT_PEER_RATE_REPORT_SIZE                8
+
+#define HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_M    0xffff0000
+#define HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_S    16
+
+#define HTT_PEER_RATE_REPORT_MSG_PEER_ID_M       0x0000ffff
+#define HTT_PEER_RATE_REPORT_MSG_PEER_ID_S       0
+
+#define HTT_PEER_RATE_REPORT_MSG_PHY_M           0x000f0000
+#define HTT_PEER_RATE_REPORT_MSG_PHY_S           16
+
+#define HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_GET(_var) \
+	(((_var) & HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_M) \
+	>> HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_S)
+#define HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_SET(_var, _val) \
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_PEER_RATE_REPORT_MSG_PEER_COUNT, _val);  \
+		((_var) |= ((_val) << HTT_PEER_RATE_REPORT_MSG_PEER_COUNT_S)); \
+	} while (0)
+
+#define HTT_PEER_RATE_REPORT_MSG_PEER_ID_GET(_var) \
+	(((_var) & HTT_PEER_RATE_REPORT_MSG_PEER_ID_M) \
+	>> HTT_PEER_RATE_REPORT_MSG_PEER_ID_S)
+#define HTT_PEER_RATE_REPORT_MSG_PEER_ID_SET(_var, _val) \
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_PEER_RATE_REPORT_MSG_PEER_ID, _val);  \
+		((_var) |= ((_val) << HTT_PEER_RATE_REPORT_MSG_PEER_ID_S)); \
+	} while (0)
+
+#define HTT_PEER_RATE_REPORT_MSG_PHY_GET(_var) \
+	(((_var) & HTT_PEER_RATE_REPORT_MSG_PHY_M) \
+	>> HTT_PEER_RATE_REPORT_MSG_PHY_S)
+#define HTT_PEER_RATE_REPORT_MSG_PHY_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_PEER_RATE_REPORT_MSG_PHY, _val);  \
+		((_var) |= ((_val) << HTT_PEER_RATE_REPORT_MSG_PHY_S)); \
+	} while (0)
+
+/**
+ * @brief HTT_T2H_MSG_TYPE_FLOW_POOL_MAP Message
+ *
+ * @details
+ *  HTT_T2H_MSG_TYPE_FLOW_POOL_MAP message is sent by the target when setting up
+ *  a flow of descriptors.
+ *
+ *  This message is in TLV format and indicates the parameters to be setup a
+ *  flow in the host. Each entry indicates that a particular flow ID is ready to
+ *  receive descriptors from a specified pool.
+ *
+ *  The message would appear as follows:
+ *
+ *         |31            24|23            16|15             8|7              0|
+ *         |----------------+----------------+----------------+----------------|
+ * header  |            reserved             |   num_flows    |     msg_type   |
+ *         |-------------------------------------------------------------------|
+ *         |                                                                   |
+ *         :                              payload                              :
+ *         |                                                                   |
+ *         |-------------------------------------------------------------------|
+ *
+ * The header field is one DWORD long and is interpreted as follows:
+ * b'0:7   - msg_type:  This will be set to HTT_T2H_MSG_TYPE_FLOW_POOL_MAP
+ * b'8-15  - num_flows: This will indicate the number of flows being setup in
+ *                      this message
+ * b'16-31 - reserved:  These bits are reserved for future use
+ *
+ * Payload:
+ * The payload would contain multiple objects of the following structure. Each
+ * object represents a flow.
+ *
+ *         |31            24|23            16|15             8|7              0|
+ *         |----------------+----------------+----------------+----------------|
+ * header  |            reserved             |   num_flows    |     msg_type   |
+ *         |-------------------------------------------------------------------|
+ * payload0|                             flow_type                             |
+ *         |-------------------------------------------------------------------|
+ *         |                              flow_id                              |
+ *         |-------------------------------------------------------------------|
+ *         |            reserved0            |          flow_pool_id           |
+ *         |-------------------------------------------------------------------|
+ *         |            reserved1            |         flow_pool_size          |
+ *         |-------------------------------------------------------------------|
+ *         |                             reserved2                             |
+ *         |-------------------------------------------------------------------|
+ * payload1|                             flow_type                             |
+ *         |-------------------------------------------------------------------|
+ *         |                              flow_id                              |
+ *         |-------------------------------------------------------------------|
+ *         |            reserved0            |          flow_pool_id           |
+ *         |-------------------------------------------------------------------|
+ *         |            reserved1            |         flow_pool_size          |
+ *         |-------------------------------------------------------------------|
+ *         |                             reserved2                             |
+ *         |-------------------------------------------------------------------|
+ *         |                                 .                                 |
+ *         |                                 .                                 |
+ *         |                                 .                                 |
+ *         |-------------------------------------------------------------------|
+ *
+ * Each payload is 5 DWORDS long and is interpreted as follows:
+ * dword0 - b'0:31  - flow_type: This indicates the type of the entity to which
+ *                               this flow is associated. It can be VDEV, peer,
+ *                               or tid (AC). Based on enum htt_flow_type.
+ *
+ * dword1 - b'0:31  - flow_id: Identifier for the flow corresponding to this
+ *                             object. For flow_type vdev it is set to the
+ *                             vdevid, for peer it is peerid and for tid, it is
+ *                             tid_num.
+ *
+ * dword2 - b'0:15  - flow_pool_id: Identifier of the descriptor-pool being used
+ *                                  in the host for this flow
+ *          b'16:31 - reserved0: This field in reserved for the future. In case
+ *                               we have a hierarchical implementation (HCM) of
+ *                               pools, it can be used to indicate the ID of the
+ *                               parent-pool.
+ *
+ * dword3 - b'0:15  - flow_pool_size: Size of the pool in number of descriptors.
+ *                                    Descriptors for this flow will be
+ *                                    allocated from this pool in the host.
+ *          b'16:31 - reserved1: This field in reserved for the future. In case
+ *                               we have a hierarchical implementation of pools,
+ *                               it can be used to indicate the max number of
+ *                               descriptors in the pool. The b'0:15 can be used
+ *                               to indicate min number of descriptors in the
+ *                               HCM scheme.
+ *
+ * dword4 - b'0:31  - reserved2: This field in reserved for the future. In case
+ *                               we have a hierarchical implementation of pools,
+ *                               b'0:15 can be used to indicate the
+ *                               priority-based borrowing (PBB) threshold of
+ *                               the flow's pool. The b'16:31 are still left
+ *                               reserved.
+ */
+
+enum htt_flow_type {
+	FLOW_TYPE_VDEV = 0,
+	/* Insert new flow types above this line */
+};
+
+PREPACK struct htt_flow_pool_map_payload_t {
+	A_UINT32 flow_type;
+	A_UINT32 flow_id;
+	A_UINT32 flow_pool_id:16,
+		 reserved0:16;
+	A_UINT32 flow_pool_size:16,
+		 reserved1:16;
+	A_UINT32 reserved2;
+} POSTPACK;
+
+#define HTT_FLOW_POOL_MAP_HEADER_SZ    (sizeof(A_UINT32))
+
+#define HTT_FLOW_POOL_MAP_PAYLOAD_SZ    \
+	(sizeof(struct htt_flow_pool_map_payload_t))
+
+#define HTT_FLOW_POOL_MAP_NUM_FLOWS_M                    0x0000ff00
+#define HTT_FLOW_POOL_MAP_NUM_FLOWS_S                    8
+
+#define HTT_FLOW_POOL_MAP_FLOW_TYPE_M                    0xffffffff
+#define HTT_FLOW_POOL_MAP_FLOW_TYPE_S                    0
+
+#define HTT_FLOW_POOL_MAP_FLOW_ID_M                      0xffffffff
+#define HTT_FLOW_POOL_MAP_FLOW_ID_S                      0
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_ID_M                 0x0000ffff
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_ID_S                 0
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_M               0x0000ffff
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_S               0
+
+#define HTT_FLOW_POOL_MAP_NUM_FLOWS_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_MAP_NUM_FLOWS_M) >> HTT_FLOW_POOL_MAP_NUM_FLOWS_S)
+
+#define HTT_FLOW_POOL_MAP_FLOW_TYPE_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_MAP_FLOW_TYPE_M) >> HTT_FLOW_POOL_MAP_FLOW_TYPE_S)
+
+#define HTT_FLOW_POOL_MAP_FLOW_ID_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_MAP_FLOW_ID_M) >> HTT_FLOW_POOL_MAP_FLOW_ID_S)
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_ID_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_MAP_FLOW_POOL_ID_M) >> \
+		HTT_FLOW_POOL_MAP_FLOW_POOL_ID_S)
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_M) >> \
+		HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_S)
+
+#define HTT_FLOW_POOL_MAP_NUM_FLOWS_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_MAP_NUM_FLOWS, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_MAP_NUM_FLOWS_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_MAP_FLOW_TYPE_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_MAP_FLOW_TYPE, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_MAP_FLOW_TYPE_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_MAP_FLOW_ID_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_MAP_FLOW_ID, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_MAP_FLOW_ID_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_ID_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_MAP_FLOW_POOL_ID, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_MAP_FLOW_POOL_ID_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_MAP_FLOW_POOL_SIZE_S)); \
+	} while (0)
+
+/**
+ * @brief HTT_T2H_MSG_TYPE_FLOW_POOL_UNMAP Message
+ *
+ * @details
+ *  HTT_T2H_MSG_TYPE_FLOW_POOL_UNMAP message is sent by the target when tearing
+ *  down a flow of descriptors.
+ *  This message indicates that for the flow (whose ID is provided) is wanting
+ *  to stop receiving descriptors. This flow ID corresponds to the ID of the
+ *  pool of descriptors from where descriptors are being allocated for this
+ *  flow. When a flow (and its pool) are unmapped, all the child-pools will also
+ *  be unmapped by the host.
+ *
+ *  The message would appear as follows:
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |                     reserved0                    |     msg_type   |
+ *     |-------------------------------------------------------------------|
+ *     |                             flow_type                             |
+ *     |-------------------------------------------------------------------|
+ *     |                              flow_id                              |
+ *     |-------------------------------------------------------------------|
+ *     |             reserved1           |         flow_pool_id            |
+ *     |-------------------------------------------------------------------|
+ *
+ *  The message is interpreted as follows:
+ *  dword0 - b'0:7   - msg_type: This will be set to
+ *                               HTT_T2H_MSG_TYPE_FLOW_POOL_UNMAP
+ *           b'8:31  - reserved0: Reserved for future use
+ *
+ *  dword1 - b'0:31  - flow_type: This indicates the type of the entity to which
+ *                                this flow is associated. It can be VDEV, peer,
+ *                                or tid (AC). Based on enum htt_flow_type.
+ *
+ *  dword2 - b'0:31  - flow_id: Identifier for the flow corresponding to this
+ *                              object. For flow_type vdev it is set to the
+ *                              vdevid, for peer it is peerid and for tid, it is
+ *                              tid_num.
+ *
+ *  dword3 - b'0:15  - flow_pool_id: Identifier of the descriptor-pool being
+ *                                   used in the host for this flow
+ *           b'16:31 - reserved0: This field in reserved for the future.
+ *
+ */
+
+PREPACK struct htt_flow_pool_unmap_t {
+	A_UINT32 msg_type:8,
+		 reserved0:24;
+	A_UINT32 flow_type;
+	A_UINT32 flow_id;
+	A_UINT32 flow_pool_id:16,
+		 reserved1:16;
+} POSTPACK;
+
+#define HTT_FLOW_POOL_UNMAP_SZ  (sizeof(struct htt_flow_pool_unmap_t))
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_TYPE_M         0xffffffff
+#define HTT_FLOW_POOL_UNMAP_FLOW_TYPE_S         0
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_ID_M           0xffffffff
+#define HTT_FLOW_POOL_UNMAP_FLOW_ID_S           0
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_M      0x0000ffff
+#define HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_S      0
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_TYPE_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_UNMAP_FLOW_TYPE_M) >> \
+		HTT_FLOW_POOL_UNMAP_FLOW_TYPE_S)
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_ID_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_UNMAP_FLOW_ID_M) >> HTT_FLOW_POOL_UNMAP_FLOW_ID_S)
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_GET(_var) \
+	(((_var) & HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_M) >> \
+		HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_S)
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_TYPE_SET(_var, _val) \
+	do {						\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_UNMAP_FLOW_TYPE, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_UNMAP_FLOW_TYPE_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_ID_SET(_var, _val) \
+	do {					\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_UNMAP_FLOW_ID, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_UNMAP_FLOW_ID_S)); \
+	} while (0)
+
+#define HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_SET(_var, _val) \
+	do {							\
+		HTT_CHECK_SET_VAL(HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID, _val);  \
+		((_var) |= ((_val) << HTT_FLOW_POOL_UNMAP_FLOW_POOL_ID_S)); \
+	} while (0)
+
+#endif
diff --git a/target/inc/htt_common.h b/target/inc/htt_common.h
new file mode 100644
index 0000000..0e9d7c3
--- /dev/null
+++ b/target/inc/htt_common.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2012-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * @file htt_common.h
+ *
+ * @details the public header file of HTT layer shared between host and firmware
+ */
+
+#ifndef _HTT_COMMON_H_
+#define _HTT_COMMON_H_
+
+enum htt_sec_type {
+	htt_sec_type_none,
+	htt_sec_type_wep128,
+	htt_sec_type_wep104,
+	htt_sec_type_wep40,
+	htt_sec_type_tkip,
+	htt_sec_type_tkip_nomic,
+	htt_sec_type_aes_ccmp,
+	htt_sec_type_wapi,
+	htt_sec_type_aes_ccmp_256,
+	htt_sec_type_aes_gcmp,
+	htt_sec_type_aes_gcmp_256,
+
+	/* keep this last! */
+	htt_num_sec_types
+};
+
+enum htt_rx_ind_mpdu_status {
+	HTT_RX_IND_MPDU_STATUS_UNKNOWN = 0x0,
+	HTT_RX_IND_MPDU_STATUS_OK,
+	HTT_RX_IND_MPDU_STATUS_ERR_FCS,
+	HTT_RX_IND_MPDU_STATUS_ERR_DUP,
+	HTT_RX_IND_MPDU_STATUS_ERR_REPLAY,
+	HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER,
+	HTT_RX_IND_MPDU_STATUS_UNAUTH_PEER,  /* only accept EAPOL frames */
+	HTT_RX_IND_MPDU_STATUS_OUT_OF_SYNC,
+	HTT_RX_IND_MPDU_STATUS_MGMT_CTRL,    /* Non-data in promiscous mode */
+	HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR,
+	HTT_RX_IND_MPDU_STATUS_DECRYPT_ERR,
+	HTT_RX_IND_MPDU_STATUS_MPDU_LENGTH_ERR,
+	HTT_RX_IND_MPDU_STATUS_ENCRYPT_REQUIRED_ERR,
+	HTT_RX_IND_MPDU_STATUS_PRIVACY_ERR,
+
+	/*
+	 * MISC: discard for unspecified reasons.
+	 * Leave this enum value last.
+	 */
+	HTT_RX_IND_MPDU_STATUS_ERR_MISC = 0xFF
+};
+
+#define HTT_INVALID_PEER    0xffff
+#define HTT_INVALID_VDEV    0xff
+
+#define HTT_NON_QOS_TID     16
+#define HTT_INVALID_TID     31
+
+#define HTT_TX_EXT_TID_DEFAULT              0
+#define HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST HTT_NON_QOS_TID
+#define HTT_TX_EXT_TID_MGMT                17
+#define HTT_TX_EXT_TID_INVALID             HTT_INVALID_TID
+#define HTT_TX_EXT_TID_NONPAUSE            19
+
+
+
+#define HTT_TX_L3_CKSUM_OFFLOAD      1
+#define HTT_TX_L4_CKSUM_OFFLOAD      2
+
+
+/**
+ * @brief General specification of the tx frame contents
+ *
+ * @details
+ * For efficiency, the HTT packet type values correspond
+ * to the bit positions of the WAL packet type values, so the
+ * translation is a simple shift operation.
+ * The exception is the "mgmt" type, which specifies frame payload
+ * type rather than L2 header type.
+ */
+enum htt_pkt_type {
+	htt_pkt_type_raw = 0,
+	htt_pkt_type_native_wifi = 1,
+	htt_pkt_type_ethernet = 2,
+	htt_pkt_type_mgmt = 3,
+	htt_pkt_type_eth2 = 4,
+
+	/* keep this last */
+	htt_pkt_num_types
+};
+
+#define HTT_TX_HOST_MSDU_ID_SPACE_BEGIN 0
+#define HTT_TX_IPA_MSDU_ID_SPACE_BEGIN  3000
+#define TGT_RX2TX_MSDU_ID_SPACE_BEGIN 6000
+
+#endif /* _HTT_COMMON_H_ */
diff --git a/target/inc/htt_isoc.h b/target/inc/htt_isoc.h
new file mode 100644
index 0000000..c149192
--- /dev/null
+++ b/target/inc/htt_isoc.h
@@ -0,0 +1,1058 @@
+/*
+ * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * @file htt_isoc.h
+ *
+ * @details
+ *  This file defines the target --> host messages that configure the
+ *  host data-path SW with the information required for data transfers
+ *  to and from the target.
+ */
+
+#ifndef _HTT_ISOC_H_
+#define _HTT_ISOC_H_
+
+#include <a_types.h>            /* A_UINT32, A_UINT8 */
+
+#ifdef ATHR_WIN_NWF
+#pragma warning( disable:4214 ) /* bit field types other than int */
+#endif
+
+#include "htt_common.h"
+
+/*=== definitions that apply to all messages ================================*/
+
+typedef enum htt_isoc_t2h_msg_type {
+	/* 0x0 reserved for VERSION message (probably not needed) */
+
+	/* PEER_INFO - specify ID and parameters of a new peer */
+	HTT_ISOC_T2H_MSG_TYPE_PEER_INFO = 0x1,
+
+	/* PEER_UNMAP - deallocate the ID that refers to a peer */
+	HTT_ISOC_T2H_MSG_TYPE_PEER_UNMAP = 0x2,
+
+	/* ADDBA - start rx aggregation for the specified peer-TID */
+	HTT_ISOC_T2H_MSG_TYPE_RX_ADDBA = 0x3,
+
+	/* DELBA - stop rx aggregation for the specified peer-TID */
+	HTT_ISOC_T2H_MSG_TYPE_RX_DELBA = 0x4,
+
+	/* TX_COMPL_IND - over-the-air tx completion notification for a tx frame */
+	HTT_ISOC_T2H_MSG_TYPE_TX_COMPL_IND = 0x5,
+
+	/* SEC_IND - notification of the type of security used for a new peer */
+	HTT_ISOC_T2H_MSG_TYPE_SEC_IND = 0x6,
+
+	/* PEER_TX_READY - the target is ready to transmit to a new peer */
+	HTT_ISOC_T2H_MSG_TYPE_PEER_TX_READY = 0x7,
+
+	/* RX_ERR - notification that an rx frame was discarded due to errors */
+	HTT_ISOC_T2H_MSG_TYPE_RX_ERR = 0x8,
+
+	/* keep this last */
+	HTT_ISOC_T2H_NUM_MSGS
+} htt_isoc_t2h_msg_type;
+
+/*
+ * HTT ISOC target to host message type -
+ * stored in bits 7:0 of the first word of the message
+ */
+#define HTT_ISOC_T2H_MSG_TYPE_M      0xff
+#define HTT_ISOC_T2H_MSG_TYPE_S      0
+
+#define HTT_ISOC_T2H_MSG_TYPE_SET(msg_addr, msg_type) \
+	(*((A_UINT8 *) msg_addr) = (msg_type))
+#define HTT_ISOC_T2H_MSG_TYPE_GET(msg_addr) \
+	(*((A_UINT8 *) msg_addr))
+
+#ifndef INLINE
+/* target FW */
+#define INLINE __inline
+#define HTT_ISOC_INLINE_DEF
+#endif /* INLINE */
+
+static INLINE void
+htt_isoc_t2h_field_set(A_UINT32 *msg_addr32,
+		       unsigned offset32,
+		       unsigned mask, unsigned shift, unsigned value)
+{
+	/* sanity check: make sure the value fits within the field */
+	/* cdf_assert(value << shift == (value << shift) | mask); */
+
+	msg_addr32 += offset32;
+	/* clear the field */
+	*msg_addr32 &= ~mask;
+	/* write the new value */
+	*msg_addr32 |= (value << shift);
+}
+
+#ifdef HTT_ISOC_INLINE_DEF
+#undef HTT_ISOC_INLINE_DEF
+#undef INLINE
+#endif
+
+#define HTT_ISOC_T2H_FIELD_GET(msg_addr32, offset32, mask, shift) \
+	(((*(msg_addr32 + offset32)) & mask) >> shift)
+
+typedef enum {
+	/* ASSOC - "real" peer from STA-AP association */
+	HTT_ISOC_T2H_PEER_TYPE_ASSOC = 0x0,
+
+	/* SELF - self-peer for unicast tx to unassociated peer */
+	HTT_ISOC_T2H_PEER_TYPE_SELF = 0x1,
+
+	/* BSSID - reserved for FW use for BT-AMP+IBSS */
+	HTT_ISOC_T2H_PEER_TYPE_BSSID = 0x2,
+
+	/* BCAST - self-peer for multicast / broadcast tx */
+	HTT_ISOC_T2H_PEER_TYPE_BCAST = 0x3
+} HTT_ISOC_T2H_PEER_TYPE_ENUM;
+
+enum {
+	HTT_ISOC_NON_QOS = 0,
+	HTT_ISOC_QOS = 1
+};
+
+enum {
+	HTT_ISOC_RMF_DISABLED = 0,
+	HTT_ISOC_RMF_ENABLED = 1
+};
+
+enum {
+	HTT_ISOC_TID_MGMT = 7
+};
+
+/*=== definitions for specific messages =====================================*/
+
+/*=== PEER_INFO message ===*/
+
+/**
+ * @brief target -> host peer info message definition
+ *
+ * @details
+ * The following diagram shows the format of the peer info message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31          25|24|23       18|17|16|15      11|10|9|8|7|6|            0|
+ * |-----------------------------------------------------------------------|
+ * |   mgmt DPU idx  |  bcast DPU idx  |     DPU idx     |     msg type    |
+ * |-----------------------------------------------------------------------|
+ * | mgmt DPU sig |bcast DPU sig |     DPU sig    |       peer ID          |
+ * |-----------------------------------------------------------------------|
+ * |    MAC addr 1   |    MAC addr 0   |     vdev ID     | |R|  peer type  |
+ * |-----------------------------------------------------------------------|
+ * |    MAC addr 5   |    MAC addr 4   |    MAC addr 3   |    MAC addr 2   |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as peer info message
+ *     Value: 0x1
+ *   - DPU_IDX
+ *     Bits 15:8
+ *     Purpose: specify the DPU index (a.k.a. security key ID) to use for
+ *         unicast data frames sent to this peer
+ *     Value: key ID
+ *   - BCAST_DPU_IDX
+ *     Bits 23:16
+ *     Purpose: specify the DPU index (a.k.a. security key ID) to use for
+ *         broadcast data frames sent by this (self) peer
+ *     Value: key ID
+ *   - MGMT_DPU_IDX
+ *     Bits 31:24
+ *     Purpose: specify the DPU index (a.k.a. security key ID) to use for
+ *         unicast management frames sent by this (self) peer
+ *     Value: key ID
+ * WORD 1:
+ *   - PEER_ID
+ *     Bits 10:0
+ *     Purpose: The ID that the target has allocated to refer to the peer
+ *   - DPU_SIG
+ *     Bits 17:11
+ *     Purpose: specify the DPU signature (a.k.a. security key validity
+ *         magic number) to specify for unicast data frames sent to this peer
+ *   - BCAST_DPU_SIG
+ *     Bits 24:18
+ *     Purpose: specify the DPU signature (a.k.a. security key validity
+ *         magic number) to specify for broadcast data frames sent by this
+ *         (self) peer
+ *   - MGMT_DPU_SIG
+ *     Bits 31:25
+ *     Purpose: specify the DPU signature (a.k.a. security key validity
+ *         magic number) to specify for unicast management frames sent by this
+ *         (self) peer
+ * WORD 2:
+ *   - PEER_TYPE
+ *     Bits 5:0
+ *     Purpose: specify whether the peer in question is a real peer or
+ *         one of the types of "self-peer" created for the vdev
+ *     Value: HTT_ISOC_T2H_PEER_TYPE enum
+ *   - RMF_ENABLED (R)
+ *     Bit 6
+ *     Purpose: specify whether the peer in question has enable robust
+ *         management frames, to encrypt certain managment frames
+ *     Value: HTT_ISOC_RMF enum
+ *     Value: HTT_ISOC_NON_QOS or HTT_ISOC_QOS
+ *   - VDEV_ID
+ *     Bits 15:8
+ *     Purpose: For a real peer, the vdev ID indicates which virtual device
+ *         the peer is associated with.  For a self-peer, the vdev ID shows
+ *         which virtual device the self-peer represents.
+ *   - MAC_ADDR_L16
+ *     Bits 31:16
+ *     Purpose: Identifies which peer the peer ID is for.
+ *     Value: lower 2 bytes of the peer's MAC address
+ *         For a self-peer, the peer's MAC address is the MAC address of the
+ *         vdev the self-peer represents.
+ * WORD 3:
+ *   - MAC_ADDR_U32
+ *     Bits 31:0
+ *     Purpose: Identifies which peer the peer ID is for.
+ *     Value: upper 4 bytes of the peer's MAC address
+ *         For a self-peer, the peer's MAC address is the MAC address of the
+ *         vdev the self-peer represents.
+ */
+typedef struct htt_isoc_t2h_peer_info_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_PEER_INFO */
+		 dpu_idx : 8, bcast_dpu_idx : 8, mgmt_dpu_idx : 8;
+	/* word 1 */
+	A_UINT32 peer_id : 11, dpu_sig : 7, bcast_dpu_sig : 7, mgmt_dpu_sig : 7;
+	/* word 2 */
+	A_UINT32
+		peer_type : 6, rmf_enabled : 1, reserved0 : 1, vdev_id : 8, mac_addr_l16 : 16;
+	/* word 3 */
+	A_UINT32 mac_addr_u32;
+} htt_isoc_t2h_peer_info_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_OFFSET32        0
+#define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_M               0x0000ff00
+#define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_S               8
+
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_OFFSET32  0
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_M         0x00ff0000
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_S         16
+
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_OFFSET32   0
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_M          0xff000000
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_S          24
+
+/* word 1 */
+#define HTT_ISOC_T2H_PEER_INFO_PEER_ID_OFFSET32        1
+#define HTT_ISOC_T2H_PEER_INFO_PEER_ID_M               0x000007ff
+#define HTT_ISOC_T2H_PEER_INFO_PEER_ID_S               0
+
+#define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_OFFSET32        1
+#define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_M               0x0003f800
+#define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_S               11
+
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_OFFSET32  1
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_M         0x01fc0000
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_S         18
+
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_OFFSET32   1
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_M          0xfe000000
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_S          25
+
+/* word 2 */
+#define HTT_ISOC_T2H_PEER_INFO_PEER_TYPE_OFFSET32      2
+#define HTT_ISOC_T2H_PEER_INFO_PEER_TYPE_M             0x0000003f
+#define HTT_ISOC_T2H_PEER_INFO_PEER_TYPE_S             0
+
+#define HTT_ISOC_T2H_PEER_INFO_RMF_ENABLED_OFFSET32    2
+#define HTT_ISOC_T2H_PEER_INFO_RMF_ENABLED_M           0x00000040
+#define HTT_ISOC_T2H_PEER_INFO_RMF_ENABLED_S           6
+
+#define HTT_ISOC_T2H_PEER_INFO_VDEV_ID_OFFSET32        2
+#define HTT_ISOC_T2H_PEER_INFO_VDEV_ID_M               0x0000ff00
+#define HTT_ISOC_T2H_PEER_INFO_VDEV_ID_S               8
+
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_L16_OFFSET32   2
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_L16_M          0xffff0000
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_L16_S          16
+
+/* word 3 */
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_U32_OFFSET32   3
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_U32_M          0xffffffff
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_U32_S          0
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_PEER_INFO_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					     \
+		((A_UINT32 *) msg_addr),				 \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _OFFSET32,		 \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _M,			 \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _S,			 \
+		value)
+
+#define HTT_ISOC_T2H_PEER_INFO_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				      \
+		((A_UINT32 *) msg_addr),			  \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _OFFSET32,	  \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _M,		  \
+		HTT_ISOC_T2H_PEER_INFO_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(DPU_IDX, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(DPU_IDX, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(BCAST_DPU_IDX, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_IDX, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MGMT_DPU_IDX, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MGMT_DPU_IDX, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_PEER_ID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(PEER_ID, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(DPU_SIG, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(DPU_SIG, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(BCAST_DPU_SIG, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_SIG, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MGMT_DPU_SIG, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MGMT_DPU_SIG, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_PEER_TYPE_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(PEER_TYPE, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_PEER_TYPE_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(PEER_TYPE, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_QOS_CAPABLE_SET(msg_addr, value)	\
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(QOS_CAPABLE, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_QOS_CAPABLE_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(QOS_CAPABLE, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_RMF_ENABLED_SET(msg_addr, value)	\
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(RMF_ENABLED, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_RMF_ENABLED_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(RMF_ENABLED, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_VDEV_ID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(VDEV_ID, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_VDEV_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(VDEV_ID, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_L16_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MAC_ADDR_L16, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_L16_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MAC_ADDR_L16, msg_addr)
+
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_U32_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MAC_ADDR_U32, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_INFO_MAC_ADDR_U32_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MAC_ADDR_U32, msg_addr)
+
+/*=== PEER_UNMAP message ===*/
+
+/**
+ * @brief target -> host peer unmap message definition
+ *
+ * @details
+ * The following diagram shows the format of the peer unmap message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31                      19|18                       8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |         reserved         |          peer ID         |     msg type    |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as peer unmap message
+ *     Value: 0x2
+ *   - PEER_ID
+ *     Bits 18:8
+ *     Purpose: The ID that the target has allocated to refer to the peer
+ */
+typedef struct htt_isoc_t2h_peer_unmap_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_PEER_UNMAP */
+		 peer_id : 11, reserved0 : 13;
+} htt_isoc_t2h_peer_unmap_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_OFFSET32        0
+#define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_M               0x0007ff00
+#define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_S               8
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_PEER_UNMAP_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					      \
+		((A_UINT32 *) msg_addr),				  \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _OFFSET32,		  \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _M,		  \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _S,		  \
+		value)
+
+#define HTT_ISOC_T2H_PEER_UNMAP_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				       \
+		((A_UINT32 *) msg_addr),			   \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _OFFSET32,	   \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _M,	   \
+		HTT_ISOC_T2H_PEER_UNMAP_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_PEER_UNMAP_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_UNMAP_FIELD_GET(PEER_ID, msg_addr)
+
+/*=== ADDBA message ===*/
+enum {
+	htt_isoc_addba_success = 0,
+	/* TBD: use different failure values to specify failure causes? */
+	htt_isoc_addba_fail = 1,
+};
+
+/**
+ * @brief target -> host ADDBA message definition
+ *
+ * @details
+ * The following diagram shows the format of the rx ADDBA message sent
+ * from the target to the host:
+ *
+ * |31                      20|19  16|15     12|11    8|7               0|
+ * |---------------------------------------------------------------------|
+ * |          peer ID         |  TID |   window size   |     msg type    |
+ * |---------------------------------------------------------------------|
+ * |                  reserved                |S|      start seq num     |
+ * |---------------------------------------------------------------------|
+ *
+ * The following field definitions describe the format of the ADDBA
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an ADDBA message
+ *     Value: 0x3
+ *   - WIN_SIZE
+ *     Bits 15:8
+ *     Purpose: Specifies the length of the block ack window (max = 64).
+ *     Value:
+ *         block ack window length specified by the received ADDBA
+ *         management message.
+ *   - TID
+ *     Bits 19:16
+ *     Purpose: Specifies which traffic identifier the ADDBA is for.
+ *     Value:
+ *         TID specified by the received ADDBA management message.
+ *   - PEER_ID
+ *     Bits 31:20
+ *     Purpose: Identifies which peer sent the ADDBA.
+ *     Value:
+ *         ID (hash value) used by the host for fast, direct lookup of
+ *         host SW peer info, including rx reorder states.
+ *   - START_SEQ_NUM
+ *     Bits 11:0
+ *     Purpose: Specifies the initial location of the block ack window
+ *     Value: start sequence value specified by the ADDBA-request message
+ *   - STATUS
+ *     Bit 12
+ *     Purpose: status of the WMI ADDBA request
+ *     Value: 0 - SUCCESS, 1 - FAILURE
+ */
+typedef struct htt_isoc_t2h_addba_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_ADDBA */
+		 win_size : 8, tid : 4, peer_id : 12;
+	/* word 1 */
+	A_UINT32 start_seq_num : 12, status : 1, reserved0 : 19;
+} htt_isoc_t2h_addba_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_ADDBA_WIN_SIZE_OFFSET32       0
+#define HTT_ISOC_T2H_ADDBA_WIN_SIZE_M              0x0000ff00
+#define HTT_ISOC_T2H_ADDBA_WIN_SIZE_S              8
+
+#define HTT_ISOC_T2H_ADDBA_TID_OFFSET32            0
+#define HTT_ISOC_T2H_ADDBA_TID_M                   0x000f0000
+#define HTT_ISOC_T2H_ADDBA_TID_S                   16
+
+#define HTT_ISOC_T2H_ADDBA_PEER_ID_OFFSET32        0
+#define HTT_ISOC_T2H_ADDBA_PEER_ID_M               0xfff00000
+#define HTT_ISOC_T2H_ADDBA_PEER_ID_S               20
+
+/* word 1 */
+#define HTT_ISOC_T2H_ADDBA_START_SEQ_NUM_OFFSET32  1
+#define HTT_ISOC_T2H_ADDBA_START_SEQ_NUM_M         0x00000fff
+#define HTT_ISOC_T2H_ADDBA_START_SEQ_NUM_S         0
+
+#define HTT_ISOC_T2H_ADDBA_STATUS_OFFSET32         1
+#define HTT_ISOC_T2H_ADDBA_STATUS_M                0x00001000
+#define HTT_ISOC_T2H_ADDBA_STATUS_S                12
+
+/* general field access macros */
+#define HTT_ISOC_T2H_ADDBA_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					      \
+		((A_UINT32 *) msg_addr),				  \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _OFFSET32,	     \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _M,		     \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _S,		     \
+		value)
+
+#define HTT_ISOC_T2H_ADDBA_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				       \
+		((A_UINT32 *) msg_addr),			   \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _OFFSET32,    \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _M,	      \
+		HTT_ISOC_T2H_ADDBA_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_ADDBA_WIN_SIZE_SET(msg_addr, value) \
+	HTT_ISOC_T2H_ADDBA_FIELD_SET(WIN_SIZE, msg_addr, value)
+#define HTT_ISOC_T2H_ADDBA_WIN_SIZE_GET(msg_addr) \
+	HTT_ISOC_T2H_ADDBA_FIELD_GET(WIN_SIZE, msg_addr)
+
+#define HTT_ISOC_T2H_ADDBA_TID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_ADDBA_FIELD_SET(TID, msg_addr, value)
+#define HTT_ISOC_T2H_ADDBA_TID_GET(msg_addr) \
+	HTT_ISOC_T2H_ADDBA_FIELD_GET(TID, msg_addr)
+
+#define HTT_ISOC_T2H_ADDBA_PEER_ID_SET(msg_addr, value)	\
+	HTT_ISOC_T2H_ADDBA_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_ADDBA_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_ADDBA_FIELD_GET(PEER_ID, msg_addr)
+
+#define HTT_ISOC_T2H_ADDBA_START_SEQ_NUM_SET(msg_addr, value) \
+	HTT_ISOC_T2H_ADDBA_FIELD_SET(START_SEQ_NUM, msg_addr, value)
+#define HTT_ISOC_T2H_ADDBA_START_SEQ_NUM_GET(msg_addr) \
+	HTT_ISOC_T2H_ADDBA_FIELD_GET(START_SEQ_NUM, msg_addr)
+
+#define HTT_ISOC_T2H_ADDBA_STATUS_SET(msg_addr, value) \
+	HTT_ISOC_T2H_ADDBA_FIELD_SET(STATUS, msg_addr, value)
+#define HTT_ISOC_T2H_ADDBA_STATUS_GET(msg_addr)	\
+	HTT_ISOC_T2H_ADDBA_FIELD_GET(STATUS, msg_addr)
+
+/*=== DELBA message ===*/
+
+/**
+ * @brief target -> host DELBA message definition
+ *
+ * @details
+ * The following diagram shows the format of the rx DELBA message sent
+ * from the target to the host:
+ *
+ * |31                      20|19  16|15     12|11    8|7               0|
+ * |---------------------------------------------------------------------|
+ * |          peer ID         |  TID |    reserved   |S|     msg type    |
+ * |---------------------------------------------------------------------|
+ *
+ * The following field definitions describe the format of the ADDBA
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an DELBA message
+ *     Value: 0x4
+ *   - TID
+ *     Bits 19:16
+ *     Purpose: Specifies which traffic identifier the DELBA is for.
+ *     Value:
+ *         TID specified by the received DELBA management message.
+ *   - PEER_ID
+ *     Bits 31:20
+ *     Purpose: Identifies which peer sent the DELBA.
+ *     Value:
+ *         ID (hash value) used by the host for fast, direct lookup of
+ *         host SW peer info, including rx reorder states.
+ *   - STATUS
+ *     Bit 8
+ *     Purpose: status of the WMI DELBA request
+ *     Value: 0 - SUCCESS, 1 - FAILURE
+ */
+typedef struct htt_isoc_t2h_delba_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_DELBA */
+		 status : 1, reserved0 : 7, tid : 4, peer_id : 12;
+} htt_isoc_t2h_delba_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_DELBA_TID_OFFSET32            0
+#define HTT_ISOC_T2H_DELBA_TID_M                   0x000f0000
+#define HTT_ISOC_T2H_DELBA_TID_S                   16
+
+#define HTT_ISOC_T2H_DELBA_PEER_ID_OFFSET32        0
+#define HTT_ISOC_T2H_DELBA_PEER_ID_M               0xfff00000
+#define HTT_ISOC_T2H_DELBA_PEER_ID_S               20
+
+#define HTT_ISOC_T2H_DELBA_STATUS_OFFSET32         0
+#define HTT_ISOC_T2H_DELBA_STATUS_M                0x00000100
+#define HTT_ISOC_T2H_DELBA_STATUS_S                8
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_DELBA_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					      \
+		((A_UINT32 *) msg_addr),				  \
+		HTT_ISOC_T2H_DELBA_ ## field ## _OFFSET32,	     \
+		HTT_ISOC_T2H_DELBA_ ## field ## _M,		     \
+		HTT_ISOC_T2H_DELBA_ ## field ## _S,		     \
+		value)
+
+#define HTT_ISOC_T2H_DELBA_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				       \
+		((A_UINT32 *) msg_addr),			   \
+		HTT_ISOC_T2H_DELBA_ ## field ## _OFFSET32,    \
+		HTT_ISOC_T2H_DELBA_ ## field ## _M,	      \
+		HTT_ISOC_T2H_DELBA_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_DELBA_TID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_DELBA_FIELD_SET(TID, msg_addr, value)
+#define HTT_ISOC_T2H_DELBA_TID_GET(msg_addr) \
+	HTT_ISOC_T2H_DELBA_FIELD_GET(TID, msg_addr)
+
+#define HTT_ISOC_T2H_DELBA_PEER_ID_SET(msg_addr, value)	\
+	HTT_ISOC_T2H_DELBA_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_DELBA_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_DELBA_FIELD_GET(PEER_ID, msg_addr)
+
+#define HTT_ISOC_T2H_DELBA_STATUS_SET(msg_addr, value) \
+	HTT_ISOC_T2H_DELBA_FIELD_SET(STATUS, msg_addr, value)
+#define HTT_ISOC_T2H_DELBA_STATUS_GET(msg_addr)	\
+	HTT_ISOC_T2H_DELBA_FIELD_GET(STATUS, msg_addr)
+
+/*=== SEC_IND message ===*/
+
+/**
+ * @brief target -> host Security indication message definition
+ *
+ * @details
+ * The following diagram shows the format of the SEC_IND message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31          25|24|23       18|17|16|15      11|10|9|8|7|6|            0|
+ * |-----------------------------------------------------------------------|
+ * |   is unicast    |  sec type       |     Peer id     |     msg type    |
+ * |-----------------------------------------------------------------------|
+ * |                    mic key1                                           |
+ * |-----------------------------------------------------------------------|
+ * |                    mic key2                                           |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as SEC_IND message
+ *     Value: 0x6
+ *   - PEER_ID
+ *     Bits 15:8
+ *     Purpose: The ID that the target has allocated to refer to the peer
+ *     Value: Peer ID
+ *   - SEC_TYPE
+ *     Bits 23:16
+ *     Purpose: specify the security encryption type
+ *     Value: htt_sec_type
+ *   - is unicast
+ *     Bits 31:24
+ *     Purpose: specify unicast/bcast
+ *     Value: 1-unicast/0-bcast
+ * WORD 1:
+ *   - MIC1
+ *     Bits 31:0
+ *     Purpose: Mickey1
+ * WORD 2:
+ *   - MIC2
+ *     Bits 31:0
+ *     Purpose: Mickey2
+ */
+typedef struct htt_isoc_t2h_sec_ind_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_SEC_IND */
+		 peer_id : 8, sec_type : 8, is_unicast : 8;
+	/* word 1 */
+	A_UINT32 mic_key1;
+	/* word 2 */
+	A_UINT32 mic_key2;
+	/* word 3 */
+	A_UINT32 status;
+} htt_isoc_t2h_sec_ind_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_SEC_IND_PEER_ID_OFFSET32        0
+#define HTT_ISOC_T2H_SEC_IND_PEER_ID_M               0x0000ff00
+#define HTT_ISOC_T2H_SEC_IND_PEER_ID_S               8
+
+#define HTT_ISOC_T2H_SEC_IND_SEC_TYPE_OFFSET32       0
+#define HTT_ISOC_T2H_SEC_IND_SEC_TYPE_M              0x00ff0000
+#define HTT_ISOC_T2H_SEC_IND_SEC_TYPE_S              16
+
+#define HTT_ISOC_T2H_SEC_IND_IS_UNICAST_OFFSET32     0
+#define HTT_ISOC_T2H_SEC_IND_IS_UNICAST_M            0xff000000
+#define HTT_ISOC_T2H_SEC_IND_IS_UNICAST_S            24
+
+/* word 1 */
+#define HTT_ISOC_T2H_SEC_IND_MIC1_OFFSET32           1
+#define HTT_ISOC_T2H_SEC_IND_MIC1_M                  0xffffffff
+#define HTT_ISOC_T2H_SEC_IND_MIC1_S                  0
+
+/* word 2 */
+#define HTT_ISOC_T2H_SEC_IND_MIC2_OFFSET32           2
+#define HTT_ISOC_T2H_SEC_IND_MIC2_M                  0xffffffff
+#define HTT_ISOC_T2H_SEC_IND_MIC2_S                  0
+
+/* general field access macros */
+#define HTT_ISOC_T2H_SEC_IND_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					     \
+		((A_UINT32 *) msg_addr),				 \
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _OFFSET32,	       \
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _M,		       \
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _S,		       \
+		value)
+
+#define HTT_ISOC_T2H_SEC_IND_FIELD_GET(field, msg_addr)	\
+	HTT_ISOC_T2H_FIELD_GET(				      \
+		((A_UINT32 *) msg_addr),			  \
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _OFFSET32,	\
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _M,		\
+		HTT_ISOC_T2H_SEC_IND_ ## field ## _S)
+
+/* access macros for specific fields */
+#define HTT_ISOC_T2H_SEC_IND_PEER_ID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_SEC_IND_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_GET(PEER_ID, msg_addr)
+
+#define HTT_ISOC_T2H_SEC_IND_SEC_TYPE_SET(msg_addr, value) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_SET(SEC_TYPE, msg_addr, value)
+#define HTT_ISOC_T2H_SEC_IND_SEC_TYPE_GET(msg_addr) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_GET(SEC_TYPE, msg_addr)
+
+#define HTT_ISOC_T2H_SEC_IND_IS_UNICAST_SET(msg_addr, value) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_SET(IS_UNICAST, msg_addr, value)
+#define HTT_ISOC_T2H_SEC_IND_IS_UNICAST_GET(msg_addr) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_GET(IS_UNICAST, msg_addr)
+
+#define HTT_ISOC_T2H_SEC_IND_MIC1_SET(msg_addr, value) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_SET(MIC1, msg_addr, value)
+#define HTT_ISOC_T2H_SEC_IND_MIC1_GET(msg_addr)	\
+	HTT_ISOC_T2H_SEC_IND_FIELD_GET(MIC1, msg_addr)
+
+#define HTT_ISOC_T2H_SEC_IND_MIC2_SET(msg_addr, value) \
+	HTT_ISOC_T2H_SEC_IND_FIELD_SET(MIC2, msg_addr, value)
+#define HTT_ISOC_T2H_SEC_IND_MIC2_GET(msg_addr)	\
+	HTT_ISOC_T2H_SEC_IND_FIELD_GET(MIC2, msg_addr)
+
+/*=== PEER_TX_READY message ===*/
+
+/**
+ * @brief target -> host peer tx ready message definition
+ *
+ * @details
+ * The following diagram shows the format of the peer tx ready message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31                      19|18                       8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |         reserved         |          peer ID         |     msg type    |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as peer tx ready message
+ *     Value: 0x7
+ *   - PEER_ID
+ *     Bits 18:8
+ *     Purpose: The ID assigned to the peer by the PEER_INFO message
+ */
+typedef struct htt_isoc_t2h_peer_tx_ready_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_PEER_TX_READY */
+		 peer_id : 11, reserved0 : 13;
+} htt_isoc_t2h_peer_tx_ready_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_OFFSET32        0
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_M               0x0007ff00
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_S               8
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_PEER_TX_READY_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					      \
+		((A_UINT32 *) msg_addr),				  \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _OFFSET32,	     \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _M,		     \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _S,		     \
+		value)
+
+#define HTT_ISOC_T2H_PEER_TX_READY_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				       \
+		((A_UINT32 *) msg_addr),			   \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _OFFSET32,    \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _M,	      \
+		HTT_ISOC_T2H_PEER_TX_READY_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_SET(msg_addr, value)	\
+	HTT_ISOC_T2H_PEER_TX_READY_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_PEER_TX_READY_FIELD_GET(PEER_ID, msg_addr)
+
+/*=== RX_ERR message ===*/
+
+/**
+ * @brief target -> host rx error notification message definition
+ *
+ * @details
+ * The following diagram shows the format of the rx err message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31                               16|15              8|7|6|5|4       0|
+ * |---------------------------------------------------------------------|
+ * |               peer ID             |   rx err type   |    msg type   |
+ * |---------------------------------------------------------------------|
+ * |               reserved            |   rx err count  |M| r | ext TID |
+ * |---------------------------------------------------------------------|
+ * M = multicast
+ * r = reserved
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as an rx err message
+ *     Value: 0x8
+ *   - RX_ERR_TYPE
+ *     Bits 15:8
+ *     Purpose: specifies which type of rx error is being reported
+ *     Value: htt_rx_ind_mpdu_status enum
+ *   - PEER_ID
+ *     Bits 31:16
+ *     Purpose: specify which peer sent the frame that resulted in an error
+ * WORD 1:
+ *   - EXT_TID
+ *     Bits 4:0
+ *     Purpose: specifies which traffic type had the rx error
+ *     Value: 0-15 for a real TID value, 16 for non-QoS data, 31 for unknown
+ *   - MCAST
+ *     Bit 6
+ *     Purpose: specify whether the rx error frame was unicast or multicast
+ *     Value: 0 -> unicast, 1 -> multicast
+ *   - L2_HDR_IS_80211
+ *     Bit 7
+ *     Purpose: specifies whether the included L2 header (if present) is in
+ *         802.3 or 802.11 format
+ *     Value: 0 -> 802.3, 1 -> 802.11
+ *   - L2_HDR_BYTES
+ *     Bits 15:8
+ *     Purpose: Specify the size of the L2 header in this rx error report.
+ *     Value:
+ *         If no L2 header is included, this field shall be 0.
+ *         If a 802.3 + LLC/SNAP header is included, this field shall be
+ *         14 (ethernet header) + 8 (LLC/SNAP).
+ *         If a 802.11 header is included, this field shall be 24 bytes for
+ *         a basic header, or 26 bytes if a QoS control field is included,
+ *         or 30 bytes if a 4th address is included, or 32 bytes if a 4th
+ *         address and a QoS control field are included, etc.
+ *         Though the L2 header included in the message needs to include
+ *         padding up to a 4-byte boundary, this L2 header size field need
+ *         not account for the padding following the L2 header.
+ *   - SEC_HDR_BYTES
+ *     Bits 23:16
+ *     Purpose: Specify the size of the security encapsulation header in
+ *         this rx error report.
+ *     Value:
+ *         If no security header is included, this field shall be 0.
+ *         If a security header is included, this field depends on the
+ *         security type, which can be inferred from the rx error type.
+ *         For TKIP MIC errors, the security header could be any of:
+ *             8  - if IV / KeyID and Extended IV are included
+ *             16 - if MIC is also included
+ *             20 - if ICV is also included
+ *   - RX_ERR_CNT
+ *     Bits 31:24
+ *     Purpose: specifies how many rx errors are reported in this message
+ *     Value:
+ *         Rx error reports that include a L2 header and/or security header
+ *         will set this field to 1, to indicate that the error notification
+ *         is for a single frame.
+ *         Rx error reports that don't include a L2 header or security header
+ *         can use this field to send a single message to report multiple
+ *         erroneous rx frames.
+ */
+typedef struct htt_isoc_t2h_rx_err_s {
+	/* word 0 */
+	A_UINT32 msg_type : 8,    /* HTT_ISOC_T2H_MSG_TYPE_RX_ERR */
+		 rx_err_type : 8, peer_id : 16;
+	/* word 1 */
+	A_UINT32
+		ext_tid : 5,
+		reserved1 : 1,
+		mcast : 1,
+		l2_hdr_is_80211 : 1, l2_hdr_bytes : 8, sec_hdr_bytes : 8, rx_err_cnt : 8;
+	/* words 2 - M-1: L2 header */
+	/* words M - N: security header */
+} htt_isoc_t2h_rx_err_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_RX_ERR_TYPE_OFFSET32             0
+#define HTT_ISOC_T2H_RX_ERR_TYPE_M                    0x0000ff00
+#define HTT_ISOC_T2H_RX_ERR_TYPE_ID_S                 8
+
+#define HTT_ISOC_T2H_RX_ERR_PEER_ID_OFFSET32          0
+#define HTT_ISOC_T2H_RX_ERR_PEER_ID_M                 0xffff0000
+#define HTT_ISOC_T2H_RX_ERR_PEER_ID_S                 16
+
+/* word 1 */
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_OFFSET32          1
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_M                 0x0000001f
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_ID_S              0
+
+#define HTT_ISOC_T2H_RX_ERR_MCAST_OFFSET32            1
+#define HTT_ISOC_T2H_RX_ERR_MCAST_M                   0x00000040
+#define HTT_ISOC_T2H_RX_ERR_MCAST_ID_S                6
+
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_OFFSET32  1
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_M         0x00000080
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_ID_S      7
+
+#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_OFFSET32         1
+#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_M                0x0000ff00
+#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_ID_S             8
+
+#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_OFFSET32        1
+#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_M               0x00ff0000
+#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_ID_S            16
+
+#define HTT_ISOC_T2H_RX_ERR_CNT_OFFSET32              1
+#define HTT_ISOC_T2H_RX_ERR_CNT_M                     0xff000000
+#define HTT_ISOC_T2H_RX_ERR_CNT_ID_S                  24
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_RX_ERR_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(					      \
+		((A_UINT32 *) msg_addr),				  \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _OFFSET32,	      \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _M,		      \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _S,		      \
+		value)
+
+#define HTT_ISOC_T2H_RX_ERR_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(				       \
+		((A_UINT32 *) msg_addr),			   \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _OFFSET32,    \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _M,	       \
+		HTT_ISOC_T2H_RX_ERR_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_RX_ERR_TYPE_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(TYPE, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_TYPE_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(TYPE, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_PEER_ID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(PEER_ID, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_PEER_ID_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(PEER_ID, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(EXT_TID, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(EXT_TID, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_MCAST_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(MCAST, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_MCAST_GET(msg_addr)	\
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(MCAST, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(L2_HDR_IS_80211, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(L2_HDR_IS_80211, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_BYTES_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(L2_HDR_BYTES, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_BYTES_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(L2_HDR_BYTES, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_SEC_HDR_BYTES_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(SEC_HDR_BYTES, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_SEC_HDR_BYTES_GET(msg_addr)	\
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(SEC_HDR_BYTES, msg_addr)
+
+#define HTT_ISOC_T2H_RX_ERR_CNT_SET(msg_addr, value) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_SET(CNT, msg_addr, value)
+#define HTT_ISOC_T2H_RX_ERR_CNT_GET(msg_addr) \
+	HTT_ISOC_T2H_RX_ERR_FIELD_GET(CNT, msg_addr)
+
+#endif /* _HTT_ISOC_H_ */
diff --git a/target/inc/ip_prot.h b/target/inc/ip_prot.h
new file mode 100644
index 0000000..a1722fe
--- /dev/null
+++ b/target/inc/ip_prot.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _IP_PROT__H_
+#define _IP_PROT__H_
+
+#define IP_PROTOCOL_ICMP        0x01    /* Internet Control Message Protocol */
+#define IP_PROTOCOL_IGMP        0x02    /* Internet Group Management Protocol */
+#define IP_PROTOCOL_IPV4        0x04    /* IPv4 (encapsulation) */
+#define IP_PROTOCOL_TCP         0x06    /* Transmission Control Protocol */
+#define IP_PROTOCOL_UDP         0x11    /* User Datagram Protocol */
+#define IP_PROTOCOL_RDP         0x1B    /* Reliable Datagram Protocol */
+#define IP_PROTOCOL_IPV6        0x29    /* IPv6 (encapsulation) */
+#define IP_PROTOCOL_IPV6_ROUTE  0x2B    /* Routing Header for IPv6 */
+#define IP_PROTOCOL_IPV6_FRAG   0x2C    /* Fragment Header for IPv6 */
+#define IP_PROTOCOL_RSVP        0x2E    /* Resource Reservation Protocol */
+#define IP_PROTOCOL_GRE         0x2F    /* Generic Routing Encapsulation */
+#define IP_PROTOCOL_MHRP        0x30    /* Mobile Host Routing Protocol */
+#define IP_PROTOCOL_BNA         0x31    /* BNA */
+#define IP_PROTOCOL_ESP         0x32    /* Encapsulating Security Payload */
+#define IP_PROTOCOL_MOBILE      0x37    /* IP Mobility (Min Encap) */
+#define IP_PROTOCOL_IPV6_ICMP   0x3A    /* ICMP for IPv6 */
+#define IP_PROTOCOL_IPV6_NONXT  0x3B    /* No Next Header for IPv6 */
+#define IP_PROTOCOL_IPV6_OPTS   0x3C    /* Destination Options for IPv6 */
+#define IP_PROTOCOL_IPCOMP      0x6C    /* IP Payload Compression Protocol */
+#define IP_PROTOCOL_L2TP        0x73    /* Layer Two Tunneling Protocol Version 3 */
+#define IP_PROTOCOL_SMP         0x79    /* Simple Message Protocol */
+#define IP_PROTOCOL_SCTP        0x84    /* Stream Control Transmission Protocol */
+#define IP_PROTOCOL_SHIM6       0x8C    /* Site Multihoming by IPv6 Intermediation */
+
+/* IPv6 ICMP types */
+#define IPV6_ICMP_TYPE_MLD 0x8F
+
+#endif /* _IP_PROT__H_ */
diff --git a/target/inc/ipv4.h b/target/inc/ipv4.h
new file mode 100644
index 0000000..67eb337
--- /dev/null
+++ b/target/inc/ipv4.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _IPV4__H_
+#define _IPV4__H_
+
+#if defined(ATH_TARGET)
+#include <osapi.h>              /* A_UINT8 */
+#else
+#include <a_types.h>            /* A_UINT8 */
+#endif
+
+#define IPV4_ADDR_LEN 4         /* bytes */
+struct ipv4_hdr_t {
+	A_UINT8 ver_hdrlen;     /* version and hdr length */
+	A_UINT8 tos;            /* type of service */
+	A_UINT8 len[2];         /* total length */
+	A_UINT8 id[2];
+	A_UINT8 flags_fragoff[2];       /* flags and fragment offset field */
+	A_UINT8 ttl;            /* time to live */
+	A_UINT8 protocol;
+	A_UINT8 hdr_checksum[2];
+	A_UINT8 src_addr[IPV4_ADDR_LEN];
+	A_UINT8 dst_addr[IPV4_ADDR_LEN];
+};
+
+#define IPV4_HDR_LEN (sizeof(struct ipv4_hdr_t))
+#define IPV4_HDR_OFFSET_PROTOCOL (offsetof(struct ipv4_hdr_t, protocol))
+#define IPV4_HDR_OFFSET_DST_ADDR (offsetof(struct ipv4_hdr_t, dst_addr[0]))
+
+#endif /* _IPV4__H_ */
diff --git a/target/inc/ol_fw_tx_dbg.h b/target/inc/ol_fw_tx_dbg.h
new file mode 100644
index 0000000..35303b7
--- /dev/null
+++ b/target/inc/ol_fw_tx_dbg.h
@@ -0,0 +1,184 @@
+/*
+ * Copyright (c) 2012, 2014-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * @file ol_fw_tx_dbg.h
+ *
+ * @details data structs used for uploading summary info about the FW's tx
+ */
+
+#ifndef _OL_FW_TX_DBG__H_
+#define _OL_FW_TX_DBG__H_
+
+/*
+ * Undef ATH_SUPPORT_FW_TX_DBG to remove the FW tx debug feature.
+ * Removing the FW tx debug feature saves a modest amount of program memory.
+ * The data memory allocation for the FW tx debug feature is controlled
+ * by the host --> target resource configuration parameters; even if
+ * ATH_SUPPORT_FW_TX_DBG is defined, no data memory will be allocated for
+ * the FW tx debug log unless the host --> target resource configuration
+ * specifies it.
+ */
+#define ATH_SUPPORT_FW_TX_DBG 1 /* enabled */
+/* #undef ATH_SUPPORT_FW_TX_DBG / * disabled * / */
+
+#if defined(ATH_TARGET)
+#include <osapi.h>              /* A_UINT32 */
+#else
+#include <a_types.h>            /* A_UINT32 */
+#include <osdep.h>              /* PREPACK, POSTPACK */
+#endif
+
+enum ol_fw_tx_dbg_log_mode {
+	ol_fw_tx_dbg_log_mode_wraparound,       /* overwrite old data with new */
+	ol_fw_tx_dbg_log_mode_single,   /* fill log once, then stop */
+};
+
+/*
+ * tx PPDU stats upload message header
+ */
+struct ol_fw_tx_dbg_ppdu_msg_hdr {
+	/* word 0 */
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_BYTES_WORD  0
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_BYTES_S     0
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_BYTES_M     0x000000ff
+	A_UINT8 mpdu_bytes_array_len;   /* length of array of per-MPDU byte counts */
+
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MSDU_BYTES_WORD  0
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MSDU_BYTES_S     8
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MSDU_BYTES_M     0x0000ff00
+	A_UINT8 msdu_bytes_array_len;   /* length of array of per-MSDU byte counts */
+
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_MSDUS_WORD  0
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_MSDUS_S     16
+#define OL_FW_TX_DBG_PPDU_HDR_NUM_MPDU_MSDUS_M     0x00ff0000
+	A_UINT8 mpdu_msdus_array_len;   /* length of array of per-MPDU MSDU counts */
+
+	A_UINT8 reserved;
+
+	/* word 1 */
+#define OL_FW_TX_DBG_PPDU_HDR_MICROSEC_PER_TICK_WORD  1
+#define OL_FW_TX_DBG_PPDU_HDR_MICROSEC_PER_TICK_S     0
+#define OL_FW_TX_DBG_PPDU_HDR_MICROSEC_PER_TICK_M     0xffffffff
+	A_UINT32 microsec_per_tick;     /* conversion for timestamp entries */
+};
+
+/*
+ * tx PPDU log element / stats upload message element
+ */
+struct ol_fw_tx_dbg_ppdu_base {
+	/* word 0 - filled in during tx enqueue */
+#define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_16    0
+#define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_S     0
+#define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_M     0x0000ffff
+	A_UINT16 start_seq_num;
+#define OL_FW_TX_DBG_PPDU_START_PN_LSBS_16    0
+#define OL_FW_TX_DBG_PPDU_START_PN_LSBS_S     16
+#define OL_FW_TX_DBG_PPDU_START_PN_LSBS_M     0xffff0000
+	A_UINT16 start_pn_lsbs;
+
+	/* word 1 - filled in during tx enqueue */
+#define OL_FW_TX_DBG_PPDU_NUM_BYTES_16        1
+#define OL_FW_TX_DBG_PPDU_NUM_BYTES_S         0
+#define OL_FW_TX_DBG_PPDU_NUM_BYTES_M         0xffffffff
+	A_UINT32 num_bytes;
+
+	/* word 2 - filled in during tx enqueue */
+#define OL_FW_TX_DBG_PPDU_NUM_MSDUS_16        2
+#define OL_FW_TX_DBG_PPDU_NUM_MSDUS_S         0
+#define OL_FW_TX_DBG_PPDU_NUM_MSDUS_M         0x000000ff
+	A_UINT8 num_msdus;
+#define OL_FW_TX_DBG_PPDU_NUM_MPDUS_16        2
+#define OL_FW_TX_DBG_PPDU_NUM_MPDUS_S         8
+#define OL_FW_TX_DBG_PPDU_NUM_MPDUS_M         0x0000ff00
+	A_UINT8 num_mpdus;
+	A_UINT16
+#define OL_FW_TX_DBG_PPDU_EXT_TID_16          2
+#define OL_FW_TX_DBG_PPDU_EXT_TID_S           16
+#define OL_FW_TX_DBG_PPDU_EXT_TID_M           0x001f0000
+	ext_tid : 5,
+#define OL_FW_TX_DBG_PPDU_PEER_ID_16          2
+#define OL_FW_TX_DBG_PPDU_PEER_ID_S           21
+#define OL_FW_TX_DBG_PPDU_PEER_ID_M           0xffe00000
+	peer_id : 11;
+
+	/* word 3 - filled in during tx enqueue */
+#define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_16     3
+#define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_S      0
+#define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_M      0xffffffff
+	A_UINT32 timestamp_enqueue;
+
+	/* word 4 - filled in during tx completion */
+#define OL_FW_TX_DBG_PPDU_TIME_COMPL_16       4
+#define OL_FW_TX_DBG_PPDU_TIME_COMPL_S        0
+#define OL_FW_TX_DBG_PPDU_TIME_COMPL_M        0xffffffff
+	A_UINT32 timestamp_completion;
+
+	/* word 5 - filled in during tx completion */
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_16   5
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_S    0
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_M    0xffffffff
+	A_UINT32 block_ack_bitmap_lsbs;
+
+	/* word 6 - filled in during tx completion */
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_16   6
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_S    0
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_M    0xffffffff
+	A_UINT32 block_ack_bitmap_msbs;
+
+	/* word 7 - filled in during tx completion (enqueue would work too) */
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_16    7
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_S     0
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_M     0xffffffff
+	A_UINT32 enqueued_bitmap_lsbs;
+
+	/* word 8 - filled in during tx completion (enqueue would work too) */
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_16    8
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_S     0
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_M     0xffffffff
+	A_UINT32 enqueued_bitmap_msbs;
+
+	/* word 9 - filled in during tx completion */
+#define OL_FW_TX_DBG_PPDU_RATE_CODE_16        9
+#define OL_FW_TX_DBG_PPDU_RATE_CODE_S         0
+#define OL_FW_TX_DBG_PPDU_RATE_CODE_M         0x000000ff
+	A_UINT8 rate_code;
+#define OL_FW_TX_DBG_PPDU_RATEFLAGS_16        9
+#define OL_FW_TX_DBG_PPDU_RATE_FLAGS_S        8
+#define OL_FW_TX_DBG_PPDU_RATE_FLAGS_M        0x0000ff00
+	A_UINT8 rate_flags;     /* includes dynamic bandwidth info */
+#define OL_FW_TX_DBG_PPDU_TRIES_16            9
+#define OL_FW_TX_DBG_PPDU_TRIES_S             16
+#define OL_FW_TX_DBG_PPDU_TRIES_M             0x00ff0000
+	A_UINT8 tries;
+#define OL_FW_TX_DBG_PPDU_COMPLETE_16         9
+#define OL_FW_TX_DBG_PPDU_COMPLETE_S          24
+#define OL_FW_TX_DBG_PPDU_COMPLETE_M          0xff000000
+	A_UINT8 complete;
+};
+
+#endif /* _OL_FW_TX_DBG__H_ */
diff --git a/target/inc/rtc_soc_reg.h b/target/inc/rtc_soc_reg.h
new file mode 100644
index 0000000..11e80b1
--- /dev/null
+++ b/target/inc/rtc_soc_reg.h
@@ -0,0 +1,1966 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _RTC_SOC_REG_REG_H_
+#define _RTC_SOC_REG_REG_H_
+
+#define SOC_RESET_CONTROL_ADDRESS                0x00000000
+#define SOC_RESET_CONTROL_OFFSET                 0x00000000
+#define SOC_RESET_CONTROL_SPI2_RST_MSB           30
+#define SOC_RESET_CONTROL_SPI2_RST_LSB           30
+#define SOC_RESET_CONTROL_SPI2_RST_MASK          0x40000000
+#define SOC_RESET_CONTROL_SPI2_RST_GET(x)        (((x) & SOC_RESET_CONTROL_SPI2_RST_MASK) >> SOC_RESET_CONTROL_SPI2_RST_LSB)
+#define SOC_RESET_CONTROL_SPI2_RST_SET(x)        (((x) << SOC_RESET_CONTROL_SPI2_RST_LSB) & SOC_RESET_CONTROL_SPI2_RST_MASK)
+#define SOC_RESET_CONTROL_I2S_1_RST_MSB          29
+#define SOC_RESET_CONTROL_I2S_1_RST_LSB          29
+#define SOC_RESET_CONTROL_I2S_1_RST_MASK         0x20000000
+#define SOC_RESET_CONTROL_I2S_1_RST_GET(x)       (((x) & SOC_RESET_CONTROL_I2S_1_RST_MASK) >> SOC_RESET_CONTROL_I2S_1_RST_LSB)
+#define SOC_RESET_CONTROL_I2S_1_RST_SET(x)       (((x) << SOC_RESET_CONTROL_I2S_1_RST_LSB) & SOC_RESET_CONTROL_I2S_1_RST_MASK)
+#define SOC_RESET_CONTROL_I2S_1_MBOX_RST_MSB     28
+#define SOC_RESET_CONTROL_I2S_1_MBOX_RST_LSB     28
+#define SOC_RESET_CONTROL_I2S_1_MBOX_RST_MASK    0x10000000
+#define SOC_RESET_CONTROL_I2S_1_MBOX_RST_GET(x)  (((x) & SOC_RESET_CONTROL_I2S_1_MBOX_RST_MASK) >> SOC_RESET_CONTROL_I2S_1_MBOX_RST_LSB)
+#define SOC_RESET_CONTROL_I2S_1_MBOX_RST_SET(x)  (((x) << SOC_RESET_CONTROL_I2S_1_MBOX_RST_LSB) & SOC_RESET_CONTROL_I2S_1_MBOX_RST_MASK)
+#define SOC_RESET_CONTROL_I2C_SLAVE_RST_MSB      27
+#define SOC_RESET_CONTROL_I2C_SLAVE_RST_LSB      27
+#define SOC_RESET_CONTROL_I2C_SLAVE_RST_MASK     0x08000000
+#define SOC_RESET_CONTROL_I2C_SLAVE_RST_GET(x)   (((x) & SOC_RESET_CONTROL_I2C_SLAVE_RST_MASK) >> SOC_RESET_CONTROL_I2C_SLAVE_RST_LSB)
+#define SOC_RESET_CONTROL_I2C_SLAVE_RST_SET(x)   (((x) << SOC_RESET_CONTROL_I2C_SLAVE_RST_LSB) & SOC_RESET_CONTROL_I2C_SLAVE_RST_MASK)
+#define SOC_RESET_CONTROL_USB_PHY_ARST_MSB       26
+#define SOC_RESET_CONTROL_USB_PHY_ARST_LSB       26
+#define SOC_RESET_CONTROL_USB_PHY_ARST_MASK      0x04000000
+#define SOC_RESET_CONTROL_USB_PHY_ARST_GET(x)    (((x) & SOC_RESET_CONTROL_USB_PHY_ARST_MASK) >> SOC_RESET_CONTROL_USB_PHY_ARST_LSB)
+#define SOC_RESET_CONTROL_USB_PHY_ARST_SET(x)    (((x) << SOC_RESET_CONTROL_USB_PHY_ARST_LSB) & SOC_RESET_CONTROL_USB_PHY_ARST_MASK)
+#define SOC_RESET_CONTROL_USB_PHY_RST_MSB        25
+#define SOC_RESET_CONTROL_USB_PHY_RST_LSB        25
+#define SOC_RESET_CONTROL_USB_PHY_RST_MASK       0x02000000
+#define SOC_RESET_CONTROL_USB_PHY_RST_GET(x)     (((x) & SOC_RESET_CONTROL_USB_PHY_RST_MASK) >> SOC_RESET_CONTROL_USB_PHY_RST_LSB)
+#define SOC_RESET_CONTROL_USB_PHY_RST_SET(x)     (((x) << SOC_RESET_CONTROL_USB_PHY_RST_LSB) & SOC_RESET_CONTROL_USB_PHY_RST_MASK)
+#define SOC_RESET_CONTROL_USB_RST_MSB            24
+#define SOC_RESET_CONTROL_USB_RST_LSB            24
+#define SOC_RESET_CONTROL_USB_RST_MASK           0x01000000
+#define SOC_RESET_CONTROL_USB_RST_GET(x)         (((x) & SOC_RESET_CONTROL_USB_RST_MASK) >> SOC_RESET_CONTROL_USB_RST_LSB)
+#define SOC_RESET_CONTROL_USB_RST_SET(x)         (((x) << SOC_RESET_CONTROL_USB_RST_LSB) & SOC_RESET_CONTROL_USB_RST_MASK)
+#define SOC_RESET_CONTROL_MMAC_RST_MSB           23
+#define SOC_RESET_CONTROL_MMAC_RST_LSB           23
+#define SOC_RESET_CONTROL_MMAC_RST_MASK          0x00800000
+#define SOC_RESET_CONTROL_MMAC_RST_GET(x)        (((x) & SOC_RESET_CONTROL_MMAC_RST_MASK) >> SOC_RESET_CONTROL_MMAC_RST_LSB)
+#define SOC_RESET_CONTROL_MMAC_RST_SET(x)        (((x) << SOC_RESET_CONTROL_MMAC_RST_LSB) & SOC_RESET_CONTROL_MMAC_RST_MASK)
+#define SOC_RESET_CONTROL_MDIO_RST_MSB           22
+#define SOC_RESET_CONTROL_MDIO_RST_LSB           22
+#define SOC_RESET_CONTROL_MDIO_RST_MASK          0x00400000
+#define SOC_RESET_CONTROL_MDIO_RST_GET(x)        (((x) & SOC_RESET_CONTROL_MDIO_RST_MASK) >> SOC_RESET_CONTROL_MDIO_RST_LSB)
+#define SOC_RESET_CONTROL_MDIO_RST_SET(x)        (((x) << SOC_RESET_CONTROL_MDIO_RST_LSB) & SOC_RESET_CONTROL_MDIO_RST_MASK)
+#define SOC_RESET_CONTROL_GE0_RST_MSB            21
+#define SOC_RESET_CONTROL_GE0_RST_LSB            21
+#define SOC_RESET_CONTROL_GE0_RST_MASK           0x00200000
+#define SOC_RESET_CONTROL_GE0_RST_GET(x)         (((x) & SOC_RESET_CONTROL_GE0_RST_MASK) >> SOC_RESET_CONTROL_GE0_RST_LSB)
+#define SOC_RESET_CONTROL_GE0_RST_SET(x)         (((x) << SOC_RESET_CONTROL_GE0_RST_LSB) & SOC_RESET_CONTROL_GE0_RST_MASK)
+#define SOC_RESET_CONTROL_I2S_RST_MSB            20
+#define SOC_RESET_CONTROL_I2S_RST_LSB            20
+#define SOC_RESET_CONTROL_I2S_RST_MASK           0x00100000
+#define SOC_RESET_CONTROL_I2S_RST_GET(x)         (((x) & SOC_RESET_CONTROL_I2S_RST_MASK) >> SOC_RESET_CONTROL_I2S_RST_LSB)
+#define SOC_RESET_CONTROL_I2S_RST_SET(x)         (((x) << SOC_RESET_CONTROL_I2S_RST_LSB) & SOC_RESET_CONTROL_I2S_RST_MASK)
+#define SOC_RESET_CONTROL_I2S_MBOX_RST_MSB       19
+#define SOC_RESET_CONTROL_I2S_MBOX_RST_LSB       19
+#define SOC_RESET_CONTROL_I2S_MBOX_RST_MASK      0x00080000
+#define SOC_RESET_CONTROL_I2S_MBOX_RST_GET(x)    (((x) & SOC_RESET_CONTROL_I2S_MBOX_RST_MASK) >> SOC_RESET_CONTROL_I2S_MBOX_RST_LSB)
+#define SOC_RESET_CONTROL_I2S_MBOX_RST_SET(x)    (((x) << SOC_RESET_CONTROL_I2S_MBOX_RST_LSB) & SOC_RESET_CONTROL_I2S_MBOX_RST_MASK)
+/* TODO: */
+#define SOC_RESET_CONTROL_CHECKSUM_ACC_RST_MSB   18
+#define SOC_RESET_CONTROL_CHECKSUM_ACC_RST_LSB   18
+#define SOC_RESET_CONTROL_CHECKSUM_ACC_RST_MASK  0x00040000
+#define SOC_RESET_CONTROL_CHECKSUM_ACC_RST_GET(x) (((x) & SOC_RESET_CONTROL_CHECKSUM_ACC_RST_MASK) >> SOC_RESET_CONTROL_CHECKSUM_ACC_RST_LSB)
+#define SOC_RESET_CONTROL_CHECKSUM_ACC_RST_SET(x) (((x) << SOC_RESET_CONTROL_CHECKSUM_ACC_RST_LSB) & SOC_RESET_CONTROL_CHECKSUM_ACC_RST_MASK)
+#define SOC_RESET_CONTROL_CE_RST_MSB             18
+#define SOC_RESET_CONTROL_CE_RST_LSB             18
+#define SOC_RESET_CONTROL_CE_RST_MASK            0x00040000
+#define SOC_RESET_CONTROL_CE_RST_GET(x)          (((x) & SOC_RESET_CONTROL_CE_RST_MASK) >> SOC_RESET_CONTROL_CE_RST_LSB)
+#define SOC_RESET_CONTROL_CE_RST_SET(x)          (((x) << SOC_RESET_CONTROL_CE_RST_LSB) & SOC_RESET_CONTROL_CE_RST_MASK)
+#define SOC_RESET_CONTROL_UART2_RST_MSB          17
+#define SOC_RESET_CONTROL_UART2_RST_LSB          17
+#define SOC_RESET_CONTROL_UART2_RST_MASK         0x00020000
+#define SOC_RESET_CONTROL_UART2_RST_GET(x)       (((x) & SOC_RESET_CONTROL_UART2_RST_MASK) >> SOC_RESET_CONTROL_UART2_RST_LSB)
+#define SOC_RESET_CONTROL_UART2_RST_SET(x)       (((x) << SOC_RESET_CONTROL_UART2_RST_LSB) & SOC_RESET_CONTROL_UART2_RST_MASK)
+#define SOC_RESET_CONTROL_DEBUG_UART_RST_MSB     16
+#define SOC_RESET_CONTROL_DEBUG_UART_RST_LSB     16
+#define SOC_RESET_CONTROL_DEBUG_UART_RST_MASK    0x00010000
+#define SOC_RESET_CONTROL_DEBUG_UART_RST_GET(x)  (((x) & SOC_RESET_CONTROL_DEBUG_UART_RST_MASK) >> SOC_RESET_CONTROL_DEBUG_UART_RST_LSB)
+#define SOC_RESET_CONTROL_DEBUG_UART_RST_SET(x)  (((x) << SOC_RESET_CONTROL_DEBUG_UART_RST_LSB) & SOC_RESET_CONTROL_DEBUG_UART_RST_MASK)
+#define SOC_RESET_CONTROL_CPU_INIT_RESET_MSB     11
+#define SOC_RESET_CONTROL_CPU_INIT_RESET_LSB     11
+#define SOC_RESET_CONTROL_CPU_INIT_RESET_MASK    0x00000800
+#define SOC_RESET_CONTROL_CPU_INIT_RESET_GET(x)  (((x) & SOC_RESET_CONTROL_CPU_INIT_RESET_MASK) >> SOC_RESET_CONTROL_CPU_INIT_RESET_LSB)
+#define SOC_RESET_CONTROL_CPU_INIT_RESET_SET(x)  (((x) << SOC_RESET_CONTROL_CPU_INIT_RESET_LSB) & SOC_RESET_CONTROL_CPU_INIT_RESET_MASK)
+#define SOC_RESET_CONTROL_RST_OUT_MSB            9
+#define SOC_RESET_CONTROL_RST_OUT_LSB            9
+#define SOC_RESET_CONTROL_RST_OUT_MASK           0x00000200
+#define SOC_RESET_CONTROL_RST_OUT_GET(x)         (((x) & SOC_RESET_CONTROL_RST_OUT_MASK) >> SOC_RESET_CONTROL_RST_OUT_LSB)
+#define SOC_RESET_CONTROL_RST_OUT_SET(x)         (((x) << SOC_RESET_CONTROL_RST_OUT_LSB) & SOC_RESET_CONTROL_RST_OUT_MASK)
+#define SOC_RESET_CONTROL_COLD_RST_MSB           8
+#define SOC_RESET_CONTROL_COLD_RST_LSB           8
+#define SOC_RESET_CONTROL_COLD_RST_MASK          0x00000100
+#define SOC_RESET_CONTROL_COLD_RST_GET(x)        (((x) & SOC_RESET_CONTROL_COLD_RST_MASK) >> SOC_RESET_CONTROL_COLD_RST_LSB)
+#define SOC_RESET_CONTROL_COLD_RST_SET(x)        (((x) << SOC_RESET_CONTROL_COLD_RST_LSB) & SOC_RESET_CONTROL_COLD_RST_MASK)
+#define SOC_RESET_CONTROL_CPU_WARM_RST_MSB       6
+#define SOC_RESET_CONTROL_CPU_WARM_RST_LSB       6
+#define SOC_RESET_CONTROL_CPU_WARM_RST_MASK      0x00000040
+#define SOC_RESET_CONTROL_CPU_WARM_RST_GET(x)    (((x) & SOC_RESET_CONTROL_CPU_WARM_RST_MASK) >> SOC_RESET_CONTROL_CPU_WARM_RST_LSB)
+#define SOC_RESET_CONTROL_CPU_WARM_RST_SET(x)    (((x) << SOC_RESET_CONTROL_CPU_WARM_RST_LSB) & SOC_RESET_CONTROL_CPU_WARM_RST_MASK)
+/* TODO: */
+#define SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_MSB 2
+#define SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_LSB 2
+#define SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_MASK 0x00000004
+#define SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_GET(x) (((x) & SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_MASK) >> SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_LSB)
+#define SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_SET(x) (((x) << SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_LSB) & SOC_RESET_CONTROL_PCIE_RST_SHORT_OVRD_MASK)
+#define SOC_RESET_CONTROL_MBOX_RST_MSB           2
+#define SOC_RESET_CONTROL_MBOX_RST_LSB           2
+#define SOC_RESET_CONTROL_MBOX_RST_MASK          0x00000004
+#define SOC_RESET_CONTROL_MBOX_RST_GET(x)        (((x) & SOC_RESET_CONTROL_MBOX_RST_MASK) >> SOC_RESET_CONTROL_MBOX_RST_LSB)
+#define SOC_RESET_CONTROL_MBOX_RST_SET(x)        (((x) << SOC_RESET_CONTROL_MBOX_RST_LSB) & SOC_RESET_CONTROL_MBOX_RST_MASK)
+#define SOC_RESET_CONTROL_UART_RST_MSB           1
+#define SOC_RESET_CONTROL_UART_RST_LSB           1
+#define SOC_RESET_CONTROL_UART_RST_MASK          0x00000002
+#define SOC_RESET_CONTROL_UART_RST_GET(x)        (((x) & SOC_RESET_CONTROL_UART_RST_MASK) >> SOC_RESET_CONTROL_UART_RST_LSB)
+#define SOC_RESET_CONTROL_UART_RST_SET(x)        (((x) << SOC_RESET_CONTROL_UART_RST_LSB) & SOC_RESET_CONTROL_UART_RST_MASK)
+#define SOC_RESET_CONTROL_SI0_RST_MSB            0
+#define SOC_RESET_CONTROL_SI0_RST_LSB            0
+#define SOC_RESET_CONTROL_SI0_RST_MASK           0x00000001
+#define SOC_RESET_CONTROL_SI0_RST_GET(x)         (((x) & SOC_RESET_CONTROL_SI0_RST_MASK) >> SOC_RESET_CONTROL_SI0_RST_LSB)
+#define SOC_RESET_CONTROL_SI0_RST_SET(x)         (((x) << SOC_RESET_CONTROL_SI0_RST_LSB) & SOC_RESET_CONTROL_SI0_RST_MASK)
+
+#define SOC_TCXO_DETECT_ADDRESS                  0x00000004
+#define SOC_TCXO_DETECT_OFFSET                   0x00000004
+#define SOC_TCXO_DETECT_PRESENT_MSB              0
+#define SOC_TCXO_DETECT_PRESENT_LSB              0
+#define SOC_TCXO_DETECT_PRESENT_MASK             0x00000001
+#define SOC_TCXO_DETECT_PRESENT_GET(x)           (((x) & SOC_TCXO_DETECT_PRESENT_MASK) >> SOC_TCXO_DETECT_PRESENT_LSB)
+#define SOC_TCXO_DETECT_PRESENT_SET(x)           (((x) << SOC_TCXO_DETECT_PRESENT_LSB) & SOC_TCXO_DETECT_PRESENT_MASK)
+
+#define SOC_XTAL_TEST_ADDRESS                    0x00000008
+#define SOC_XTAL_TEST_OFFSET                     0x00000008
+#define SOC_XTAL_TEST_NOTCXODET_MSB              0
+#define SOC_XTAL_TEST_NOTCXODET_LSB              0
+#define SOC_XTAL_TEST_NOTCXODET_MASK             0x00000001
+#define SOC_XTAL_TEST_NOTCXODET_GET(x)           (((x) & SOC_XTAL_TEST_NOTCXODET_MASK) >> SOC_XTAL_TEST_NOTCXODET_LSB)
+#define SOC_XTAL_TEST_NOTCXODET_SET(x)           (((x) << SOC_XTAL_TEST_NOTCXODET_LSB) & SOC_XTAL_TEST_NOTCXODET_MASK)
+
+#define SOC_CPU_CLOCK_ADDRESS                    0x00000020
+#define SOC_CPU_CLOCK_OFFSET                     0x00000020
+#define SOC_CPU_CLOCK_STANDARD_MSB               1
+#define SOC_CPU_CLOCK_STANDARD_LSB               0
+#define SOC_CPU_CLOCK_STANDARD_MASK              0x00000003
+#define SOC_CPU_CLOCK_STANDARD_GET(x)            (((x) & SOC_CPU_CLOCK_STANDARD_MASK) >> SOC_CPU_CLOCK_STANDARD_LSB)
+#define SOC_CPU_CLOCK_STANDARD_SET(x)            (((x) << SOC_CPU_CLOCK_STANDARD_LSB) & SOC_CPU_CLOCK_STANDARD_MASK)
+
+#define SOC_CLOCK_CONTROL_ADDRESS                0x00000028
+#define SOC_CLOCK_CONTROL_OFFSET                 0x00000028
+#define SOC_CLOCK_CONTROL_USB_CLOCK_MSB          3
+#define SOC_CLOCK_CONTROL_USB_CLOCK_LSB          3
+#define SOC_CLOCK_CONTROL_USB_CLOCK_MASK         0x00000008
+#define SOC_CLOCK_CONTROL_USB_CLOCK_GET(x)       (((x) & SOC_CLOCK_CONTROL_USB_CLOCK_MASK) >> SOC_CLOCK_CONTROL_USB_CLOCK_LSB)
+#define SOC_CLOCK_CONTROL_USB_CLOCK_SET(x)       (((x) << SOC_CLOCK_CONTROL_USB_CLOCK_LSB) & SOC_CLOCK_CONTROL_USB_CLOCK_MASK)
+#define SOC_CLOCK_CONTROL_LF_CLK32_MSB           2
+#define SOC_CLOCK_CONTROL_LF_CLK32_LSB           2
+#define SOC_CLOCK_CONTROL_LF_CLK32_MASK          0x00000004
+#define SOC_CLOCK_CONTROL_LF_CLK32_GET(x)        (((x) & SOC_CLOCK_CONTROL_LF_CLK32_MASK) >> SOC_CLOCK_CONTROL_LF_CLK32_LSB)
+#define SOC_CLOCK_CONTROL_LF_CLK32_SET(x)        (((x) << SOC_CLOCK_CONTROL_LF_CLK32_LSB) & SOC_CLOCK_CONTROL_LF_CLK32_MASK)
+#define SOC_CLOCK_CONTROL_SI0_CLK_MSB            0
+#define SOC_CLOCK_CONTROL_SI0_CLK_LSB            0
+#define SOC_CLOCK_CONTROL_SI0_CLK_MASK           0x00000001
+#define SOC_CLOCK_CONTROL_SI0_CLK_GET(x)         (((x) & SOC_CLOCK_CONTROL_SI0_CLK_MASK) >> SOC_CLOCK_CONTROL_SI0_CLK_LSB)
+#define SOC_CLOCK_CONTROL_SI0_CLK_SET(x)         (((x) << SOC_CLOCK_CONTROL_SI0_CLK_LSB) & SOC_CLOCK_CONTROL_SI0_CLK_MASK)
+
+#define SOC_WDT_CONTROL_ADDRESS                  0x00000030
+#define SOC_WDT_CONTROL_OFFSET                   0x00000030
+#define SOC_WDT_CONTROL_ACTION_MSB               2
+#define SOC_WDT_CONTROL_ACTION_LSB               0
+#define SOC_WDT_CONTROL_ACTION_MASK              0x00000007
+#define SOC_WDT_CONTROL_ACTION_GET(x)            (((x) & SOC_WDT_CONTROL_ACTION_MASK) >> SOC_WDT_CONTROL_ACTION_LSB)
+#define SOC_WDT_CONTROL_ACTION_SET(x)            (((x) << SOC_WDT_CONTROL_ACTION_LSB) & SOC_WDT_CONTROL_ACTION_MASK)
+
+#define SOC_WDT_STATUS_ADDRESS                   0x00000034
+#define SOC_WDT_STATUS_OFFSET                    0x00000034
+#define SOC_WDT_STATUS_INTERRUPT_MSB             0
+#define SOC_WDT_STATUS_INTERRUPT_LSB             0
+#define SOC_WDT_STATUS_INTERRUPT_MASK            0x00000001
+#define SOC_WDT_STATUS_INTERRUPT_GET(x)          (((x) & SOC_WDT_STATUS_INTERRUPT_MASK) >> SOC_WDT_STATUS_INTERRUPT_LSB)
+#define SOC_WDT_STATUS_INTERRUPT_SET(x)          (((x) << SOC_WDT_STATUS_INTERRUPT_LSB) & SOC_WDT_STATUS_INTERRUPT_MASK)
+
+#define SOC_WDT_ADDRESS                          0x00000038
+#define SOC_WDT_OFFSET                           0x00000038
+#define SOC_WDT_TARGET_MSB                       21
+#define SOC_WDT_TARGET_LSB                       0
+#define SOC_WDT_TARGET_MASK                      0x003fffff
+#define SOC_WDT_TARGET_GET(x)                    (((x) & SOC_WDT_TARGET_MASK) >> SOC_WDT_TARGET_LSB)
+#define SOC_WDT_TARGET_SET(x)                    (((x) << SOC_WDT_TARGET_LSB) & SOC_WDT_TARGET_MASK)
+
+#define SOC_WDT_COUNT_ADDRESS                    0x0000003c
+#define SOC_WDT_COUNT_OFFSET                     0x0000003c
+#define SOC_WDT_COUNT_VALUE_MSB                  21
+#define SOC_WDT_COUNT_VALUE_LSB                  0
+#define SOC_WDT_COUNT_VALUE_MASK                 0x003fffff
+#define SOC_WDT_COUNT_VALUE_GET(x)               (((x) & SOC_WDT_COUNT_VALUE_MASK) >> SOC_WDT_COUNT_VALUE_LSB)
+#define SOC_WDT_COUNT_VALUE_SET(x)               (((x) << SOC_WDT_COUNT_VALUE_LSB) & SOC_WDT_COUNT_VALUE_MASK)
+
+#define SOC_WDT_RESET_ADDRESS                    0x00000040
+#define SOC_WDT_RESET_OFFSET                     0x00000040
+#define SOC_WDT_RESET_VALUE_MSB                  0
+#define SOC_WDT_RESET_VALUE_LSB                  0
+#define SOC_WDT_RESET_VALUE_MASK                 0x00000001
+#define SOC_WDT_RESET_VALUE_GET(x)               (((x) & SOC_WDT_RESET_VALUE_MASK) >> SOC_WDT_RESET_VALUE_LSB)
+#define SOC_WDT_RESET_VALUE_SET(x)               (((x) << SOC_WDT_RESET_VALUE_LSB) & SOC_WDT_RESET_VALUE_MASK)
+
+#define SOC_INT_STATUS_ADDRESS                   0x00000044
+#define SOC_INT_STATUS_OFFSET                    0x00000044
+#define SOC_INT_STATUS_MAC_4_MSB                 23
+#define SOC_INT_STATUS_MAC_4_LSB                 23
+#define SOC_INT_STATUS_MAC_4_MASK                0x00800000
+#define SOC_INT_STATUS_MAC_4_GET(x)              (((x) & SOC_INT_STATUS_MAC_4_MASK) >> SOC_INT_STATUS_MAC_4_LSB)
+#define SOC_INT_STATUS_MAC_4_SET(x)              (((x) << SOC_INT_STATUS_MAC_4_LSB) & SOC_INT_STATUS_MAC_4_MASK)
+#define SOC_INT_STATUS_MAC_3_MSB                 22
+#define SOC_INT_STATUS_MAC_3_LSB                 22
+#define SOC_INT_STATUS_MAC_3_MASK                0x00400000
+#define SOC_INT_STATUS_MAC_3_GET(x)              (((x) & SOC_INT_STATUS_MAC_3_MASK) >> SOC_INT_STATUS_MAC_3_LSB)
+#define SOC_INT_STATUS_MAC_3_SET(x)              (((x) << SOC_INT_STATUS_MAC_3_LSB) & SOC_INT_STATUS_MAC_3_MASK)
+#define SOC_INT_STATUS_MAC_2_MSB                 21
+#define SOC_INT_STATUS_MAC_2_LSB                 21
+#define SOC_INT_STATUS_MAC_2_MASK                0x00200000
+#define SOC_INT_STATUS_MAC_2_GET(x)              (((x) & SOC_INT_STATUS_MAC_2_MASK) >> SOC_INT_STATUS_MAC_2_LSB)
+#define SOC_INT_STATUS_MAC_2_SET(x)              (((x) << SOC_INT_STATUS_MAC_2_LSB) & SOC_INT_STATUS_MAC_2_MASK)
+#define SOC_INT_STATUS_MAC_1_MSB                 20
+#define SOC_INT_STATUS_MAC_1_LSB                 20
+#define SOC_INT_STATUS_MAC_1_MASK                0x00100000
+#define SOC_INT_STATUS_MAC_1_GET(x)              (((x) & SOC_INT_STATUS_MAC_1_MASK) >> SOC_INT_STATUS_MAC_1_LSB)
+#define SOC_INT_STATUS_MAC_1_SET(x)              (((x) << SOC_INT_STATUS_MAC_1_LSB) & SOC_INT_STATUS_MAC_1_MASK)
+#define SOC_INT_STATUS_USBDMA_MSB                19
+#define SOC_INT_STATUS_USBDMA_LSB                19
+#define SOC_INT_STATUS_USBDMA_MASK               0x00080000
+#define SOC_INT_STATUS_USBDMA_GET(x)             (((x) & SOC_INT_STATUS_USBDMA_MASK) >> SOC_INT_STATUS_USBDMA_LSB)
+#define SOC_INT_STATUS_USBDMA_SET(x)             (((x) << SOC_INT_STATUS_USBDMA_LSB) & SOC_INT_STATUS_USBDMA_MASK)
+#define SOC_INT_STATUS_USBIP_MSB                 18
+#define SOC_INT_STATUS_USBIP_LSB                 18
+#define SOC_INT_STATUS_USBIP_MASK                0x00040000
+#define SOC_INT_STATUS_USBIP_GET(x)              (((x) & SOC_INT_STATUS_USBIP_MASK) >> SOC_INT_STATUS_USBIP_LSB)
+#define SOC_INT_STATUS_USBIP_SET(x)              (((x) << SOC_INT_STATUS_USBIP_LSB) & SOC_INT_STATUS_USBIP_MASK)
+#define SOC_INT_STATUS_THERM_MSB                 17
+#define SOC_INT_STATUS_THERM_LSB                 17
+#define SOC_INT_STATUS_THERM_MASK                0x00020000
+#define SOC_INT_STATUS_THERM_GET(x)              (((x) & SOC_INT_STATUS_THERM_MASK) >> SOC_INT_STATUS_THERM_LSB)
+#define SOC_INT_STATUS_THERM_SET(x)              (((x) << SOC_INT_STATUS_THERM_LSB) & SOC_INT_STATUS_THERM_MASK)
+#define SOC_INT_STATUS_EFUSE_OVERWRITE_MSB       16
+#define SOC_INT_STATUS_EFUSE_OVERWRITE_LSB       16
+#define SOC_INT_STATUS_EFUSE_OVERWRITE_MASK      0x00010000
+#define SOC_INT_STATUS_EFUSE_OVERWRITE_GET(x)    (((x) & SOC_INT_STATUS_EFUSE_OVERWRITE_MASK) >> SOC_INT_STATUS_EFUSE_OVERWRITE_LSB)
+#define SOC_INT_STATUS_EFUSE_OVERWRITE_SET(x)    (((x) << SOC_INT_STATUS_EFUSE_OVERWRITE_LSB) & SOC_INT_STATUS_EFUSE_OVERWRITE_MASK)
+#define SOC_INT_STATUS_RDMA_MSB                  15
+#define SOC_INT_STATUS_RDMA_LSB                  15
+#define SOC_INT_STATUS_RDMA_MASK                 0x00008000
+#define SOC_INT_STATUS_RDMA_GET(x)               (((x) & SOC_INT_STATUS_RDMA_MASK) >> SOC_INT_STATUS_RDMA_LSB)
+#define SOC_INT_STATUS_RDMA_SET(x)               (((x) << SOC_INT_STATUS_RDMA_LSB) & SOC_INT_STATUS_RDMA_MASK)
+#define SOC_INT_STATUS_BTCOEX_MSB                14
+#define SOC_INT_STATUS_BTCOEX_LSB                14
+#define SOC_INT_STATUS_BTCOEX_MASK               0x00004000
+#define SOC_INT_STATUS_BTCOEX_GET(x)             (((x) & SOC_INT_STATUS_BTCOEX_MASK) >> SOC_INT_STATUS_BTCOEX_LSB)
+#define SOC_INT_STATUS_BTCOEX_SET(x)             (((x) << SOC_INT_STATUS_BTCOEX_LSB) & SOC_INT_STATUS_BTCOEX_MASK)
+#define SOC_INT_STATUS_RTC_POWER_MSB             13
+#define SOC_INT_STATUS_RTC_POWER_LSB             13
+#define SOC_INT_STATUS_RTC_POWER_MASK            0x00002000
+#define SOC_INT_STATUS_RTC_POWER_GET(x)          (((x) & SOC_INT_STATUS_RTC_POWER_MASK) >> SOC_INT_STATUS_RTC_POWER_LSB)
+#define SOC_INT_STATUS_RTC_POWER_SET(x)          (((x) << SOC_INT_STATUS_RTC_POWER_LSB) & SOC_INT_STATUS_RTC_POWER_MASK)
+#define SOC_INT_STATUS_MAC_MSB                   12
+#define SOC_INT_STATUS_MAC_LSB                   12
+#define SOC_INT_STATUS_MAC_MASK                  0x00001000
+#define SOC_INT_STATUS_MAC_GET(x)                (((x) & SOC_INT_STATUS_MAC_MASK) >> SOC_INT_STATUS_MAC_LSB)
+#define SOC_INT_STATUS_MAC_SET(x)                (((x) << SOC_INT_STATUS_MAC_LSB) & SOC_INT_STATUS_MAC_MASK)
+#define SOC_INT_STATUS_MAILBOX_MSB               11
+#define SOC_INT_STATUS_MAILBOX_LSB               11
+#define SOC_INT_STATUS_MAILBOX_MASK              0x00000800
+#define SOC_INT_STATUS_MAILBOX_GET(x)            (((x) & SOC_INT_STATUS_MAILBOX_MASK) >> SOC_INT_STATUS_MAILBOX_LSB)
+#define SOC_INT_STATUS_MAILBOX_SET(x)            (((x) << SOC_INT_STATUS_MAILBOX_LSB) & SOC_INT_STATUS_MAILBOX_MASK)
+#define SOC_INT_STATUS_RTC_ALARM_MSB             10
+#define SOC_INT_STATUS_RTC_ALARM_LSB             10
+#define SOC_INT_STATUS_RTC_ALARM_MASK            0x00000400
+#define SOC_INT_STATUS_RTC_ALARM_GET(x)          (((x) & SOC_INT_STATUS_RTC_ALARM_MASK) >> SOC_INT_STATUS_RTC_ALARM_LSB)
+#define SOC_INT_STATUS_RTC_ALARM_SET(x)          (((x) << SOC_INT_STATUS_RTC_ALARM_LSB) & SOC_INT_STATUS_RTC_ALARM_MASK)
+#define SOC_INT_STATUS_HF_TIMER_MSB              9
+#define SOC_INT_STATUS_HF_TIMER_LSB              9
+#define SOC_INT_STATUS_HF_TIMER_MASK             0x00000200
+#define SOC_INT_STATUS_HF_TIMER_GET(x)           (((x) & SOC_INT_STATUS_HF_TIMER_MASK) >> SOC_INT_STATUS_HF_TIMER_LSB)
+#define SOC_INT_STATUS_HF_TIMER_SET(x)           (((x) << SOC_INT_STATUS_HF_TIMER_LSB) & SOC_INT_STATUS_HF_TIMER_MASK)
+#define SOC_INT_STATUS_LF_TIMER3_MSB             8
+#define SOC_INT_STATUS_LF_TIMER3_LSB             8
+#define SOC_INT_STATUS_LF_TIMER3_MASK            0x00000100
+#define SOC_INT_STATUS_LF_TIMER3_GET(x)          (((x) & SOC_INT_STATUS_LF_TIMER3_MASK) >> SOC_INT_STATUS_LF_TIMER3_LSB)
+#define SOC_INT_STATUS_LF_TIMER3_SET(x)          (((x) << SOC_INT_STATUS_LF_TIMER3_LSB) & SOC_INT_STATUS_LF_TIMER3_MASK)
+#define SOC_INT_STATUS_LF_TIMER2_MSB             7
+#define SOC_INT_STATUS_LF_TIMER2_LSB             7
+#define SOC_INT_STATUS_LF_TIMER2_MASK            0x00000080
+#define SOC_INT_STATUS_LF_TIMER2_GET(x)          (((x) & SOC_INT_STATUS_LF_TIMER2_MASK) >> SOC_INT_STATUS_LF_TIMER2_LSB)
+#define SOC_INT_STATUS_LF_TIMER2_SET(x)          (((x) << SOC_INT_STATUS_LF_TIMER2_LSB) & SOC_INT_STATUS_LF_TIMER2_MASK)
+#define SOC_INT_STATUS_LF_TIMER1_MSB             6
+#define SOC_INT_STATUS_LF_TIMER1_LSB             6
+#define SOC_INT_STATUS_LF_TIMER1_MASK            0x00000040
+#define SOC_INT_STATUS_LF_TIMER1_GET(x)          (((x) & SOC_INT_STATUS_LF_TIMER1_MASK) >> SOC_INT_STATUS_LF_TIMER1_LSB)
+#define SOC_INT_STATUS_LF_TIMER1_SET(x)          (((x) << SOC_INT_STATUS_LF_TIMER1_LSB) & SOC_INT_STATUS_LF_TIMER1_MASK)
+#define SOC_INT_STATUS_LF_TIMER0_MSB             5
+#define SOC_INT_STATUS_LF_TIMER0_LSB             5
+#define SOC_INT_STATUS_LF_TIMER0_MASK            0x00000020
+#define SOC_INT_STATUS_LF_TIMER0_GET(x)          (((x) & SOC_INT_STATUS_LF_TIMER0_MASK) >> SOC_INT_STATUS_LF_TIMER0_LSB)
+#define SOC_INT_STATUS_LF_TIMER0_SET(x)          (((x) << SOC_INT_STATUS_LF_TIMER0_LSB) & SOC_INT_STATUS_LF_TIMER0_MASK)
+#define SOC_INT_STATUS_SI_MSB                    4
+#define SOC_INT_STATUS_SI_LSB                    4
+#define SOC_INT_STATUS_SI_MASK                   0x00000010
+#define SOC_INT_STATUS_SI_GET(x)                 (((x) & SOC_INT_STATUS_SI_MASK) >> SOC_INT_STATUS_SI_LSB)
+#define SOC_INT_STATUS_SI_SET(x)                 (((x) << SOC_INT_STATUS_SI_LSB) & SOC_INT_STATUS_SI_MASK)
+#define SOC_INT_STATUS_GPIO_MSB                  3
+#define SOC_INT_STATUS_GPIO_LSB                  3
+#define SOC_INT_STATUS_GPIO_MASK                 0x00000008
+#define SOC_INT_STATUS_GPIO_GET(x)               (((x) & SOC_INT_STATUS_GPIO_MASK) >> SOC_INT_STATUS_GPIO_LSB)
+#define SOC_INT_STATUS_GPIO_SET(x)               (((x) << SOC_INT_STATUS_GPIO_LSB) & SOC_INT_STATUS_GPIO_MASK)
+#define SOC_INT_STATUS_DEBUG_UART_MSB            2
+#define SOC_INT_STATUS_DEBUG_UART_LSB            2
+#define SOC_INT_STATUS_DEBUG_UART_MASK           0x00000004
+#define SOC_INT_STATUS_DEBUG_UART_GET(x)         (((x) & SOC_INT_STATUS_DEBUG_UART_MASK) >> SOC_INT_STATUS_DEBUG_UART_LSB)
+#define SOC_INT_STATUS_DEBUG_UART_SET(x)         (((x) << SOC_INT_STATUS_DEBUG_UART_LSB) & SOC_INT_STATUS_DEBUG_UART_MASK)
+#define SOC_INT_STATUS_ERROR_MSB                 1
+#define SOC_INT_STATUS_ERROR_LSB                 1
+#define SOC_INT_STATUS_ERROR_MASK                0x00000002
+#define SOC_INT_STATUS_ERROR_GET(x)              (((x) & SOC_INT_STATUS_ERROR_MASK) >> SOC_INT_STATUS_ERROR_LSB)
+#define SOC_INT_STATUS_ERROR_SET(x)              (((x) << SOC_INT_STATUS_ERROR_LSB) & SOC_INT_STATUS_ERROR_MASK)
+#define SOC_INT_STATUS_WDT_INT_MSB               0
+#define SOC_INT_STATUS_WDT_INT_LSB               0
+#define SOC_INT_STATUS_WDT_INT_MASK              0x00000001
+#define SOC_INT_STATUS_WDT_INT_GET(x)            (((x) & SOC_INT_STATUS_WDT_INT_MASK) >> SOC_INT_STATUS_WDT_INT_LSB)
+#define SOC_INT_STATUS_WDT_INT_SET(x)            (((x) << SOC_INT_STATUS_WDT_INT_LSB) & SOC_INT_STATUS_WDT_INT_MASK)
+
+#define SOC_LF_TIMER0_ADDRESS                    0x00000048
+#define SOC_LF_TIMER0_OFFSET                     0x00000048
+#define SOC_LF_TIMER0_TARGET_MSB                 31
+#define SOC_LF_TIMER0_TARGET_LSB                 0
+#define SOC_LF_TIMER0_TARGET_MASK                0xffffffff
+#define SOC_LF_TIMER0_TARGET_GET(x)              (((x) & SOC_LF_TIMER0_TARGET_MASK) >> SOC_LF_TIMER0_TARGET_LSB)
+#define SOC_LF_TIMER0_TARGET_SET(x)              (((x) << SOC_LF_TIMER0_TARGET_LSB) & SOC_LF_TIMER0_TARGET_MASK)
+
+#define SOC_LF_TIMER_COUNT0_ADDRESS              0x0000004c
+#define SOC_LF_TIMER_COUNT0_OFFSET               0x0000004c
+#define SOC_LF_TIMER_COUNT0_VALUE_MSB            31
+#define SOC_LF_TIMER_COUNT0_VALUE_LSB            0
+#define SOC_LF_TIMER_COUNT0_VALUE_MASK           0xffffffff
+#define SOC_LF_TIMER_COUNT0_VALUE_GET(x)         (((x) & SOC_LF_TIMER_COUNT0_VALUE_MASK) >> SOC_LF_TIMER_COUNT0_VALUE_LSB)
+#define SOC_LF_TIMER_COUNT0_VALUE_SET(x)         (((x) << SOC_LF_TIMER_COUNT0_VALUE_LSB) & SOC_LF_TIMER_COUNT0_VALUE_MASK)
+
+#define SOC_LF_TIMER_CONTROL0_ADDRESS            0x00000050
+#define SOC_LF_TIMER_CONTROL0_OFFSET             0x00000050
+#define SOC_LF_TIMER_CONTROL0_ENABLE_MSB         2
+#define SOC_LF_TIMER_CONTROL0_ENABLE_LSB         2
+#define SOC_LF_TIMER_CONTROL0_ENABLE_MASK        0x00000004
+#define SOC_LF_TIMER_CONTROL0_ENABLE_GET(x)      (((x) & SOC_LF_TIMER_CONTROL0_ENABLE_MASK) >> SOC_LF_TIMER_CONTROL0_ENABLE_LSB)
+#define SOC_LF_TIMER_CONTROL0_ENABLE_SET(x)      (((x) << SOC_LF_TIMER_CONTROL0_ENABLE_LSB) & SOC_LF_TIMER_CONTROL0_ENABLE_MASK)
+#define SOC_LF_TIMER_CONTROL0_AUTO_RESTART_MSB   1
+#define SOC_LF_TIMER_CONTROL0_AUTO_RESTART_LSB   1
+#define SOC_LF_TIMER_CONTROL0_AUTO_RESTART_MASK  0x00000002
+#define SOC_LF_TIMER_CONTROL0_AUTO_RESTART_GET(x) (((x) & SOC_LF_TIMER_CONTROL0_AUTO_RESTART_MASK) >> SOC_LF_TIMER_CONTROL0_AUTO_RESTART_LSB)
+#define SOC_LF_TIMER_CONTROL0_AUTO_RESTART_SET(x) (((x) << SOC_LF_TIMER_CONTROL0_AUTO_RESTART_LSB) & SOC_LF_TIMER_CONTROL0_AUTO_RESTART_MASK)
+#define SOC_LF_TIMER_CONTROL0_RESET_MSB          0
+#define SOC_LF_TIMER_CONTROL0_RESET_LSB          0
+#define SOC_LF_TIMER_CONTROL0_RESET_MASK         0x00000001
+#define SOC_LF_TIMER_CONTROL0_RESET_GET(x)       (((x) & SOC_LF_TIMER_CONTROL0_RESET_MASK) >> SOC_LF_TIMER_CONTROL0_RESET_LSB)
+#define SOC_LF_TIMER_CONTROL0_RESET_SET(x)       (((x) << SOC_LF_TIMER_CONTROL0_RESET_LSB) & SOC_LF_TIMER_CONTROL0_RESET_MASK)
+
+#define SOC_LF_TIMER_STATUS0_ADDRESS             0x00000054
+#define SOC_LF_TIMER_STATUS0_OFFSET              0x00000054
+#define SOC_LF_TIMER_STATUS0_INTERRUPT_MSB       0
+#define SOC_LF_TIMER_STATUS0_INTERRUPT_LSB       0
+#define SOC_LF_TIMER_STATUS0_INTERRUPT_MASK      0x00000001
+#define SOC_LF_TIMER_STATUS0_INTERRUPT_GET(x)    (((x) & SOC_LF_TIMER_STATUS0_INTERRUPT_MASK) >> SOC_LF_TIMER_STATUS0_INTERRUPT_LSB)
+#define SOC_LF_TIMER_STATUS0_INTERRUPT_SET(x)    (((x) << SOC_LF_TIMER_STATUS0_INTERRUPT_LSB) & SOC_LF_TIMER_STATUS0_INTERRUPT_MASK)
+
+#define SOC_LF_TIMER1_ADDRESS                    0x00000058
+#define SOC_LF_TIMER1_OFFSET                     0x00000058
+#define SOC_LF_TIMER1_TARGET_MSB                 31
+#define SOC_LF_TIMER1_TARGET_LSB                 0
+#define SOC_LF_TIMER1_TARGET_MASK                0xffffffff
+#define SOC_LF_TIMER1_TARGET_GET(x)              (((x) & SOC_LF_TIMER1_TARGET_MASK) >> SOC_LF_TIMER1_TARGET_LSB)
+#define SOC_LF_TIMER1_TARGET_SET(x)              (((x) << SOC_LF_TIMER1_TARGET_LSB) & SOC_LF_TIMER1_TARGET_MASK)
+
+#define SOC_LF_TIMER_COUNT1_ADDRESS              0x0000005c
+#define SOC_LF_TIMER_COUNT1_OFFSET               0x0000005c
+#define SOC_LF_TIMER_COUNT1_VALUE_MSB            31
+#define SOC_LF_TIMER_COUNT1_VALUE_LSB            0
+#define SOC_LF_TIMER_COUNT1_VALUE_MASK           0xffffffff
+#define SOC_LF_TIMER_COUNT1_VALUE_GET(x)         (((x) & SOC_LF_TIMER_COUNT1_VALUE_MASK) >> SOC_LF_TIMER_COUNT1_VALUE_LSB)
+#define SOC_LF_TIMER_COUNT1_VALUE_SET(x)         (((x) << SOC_LF_TIMER_COUNT1_VALUE_LSB) & SOC_LF_TIMER_COUNT1_VALUE_MASK)
+
+#define SOC_LF_TIMER_CONTROL1_ADDRESS            0x00000060
+#define SOC_LF_TIMER_CONTROL1_OFFSET             0x00000060
+#define SOC_LF_TIMER_CONTROL1_ENABLE_MSB         2
+#define SOC_LF_TIMER_CONTROL1_ENABLE_LSB         2
+#define SOC_LF_TIMER_CONTROL1_ENABLE_MASK        0x00000004
+#define SOC_LF_TIMER_CONTROL1_ENABLE_GET(x)      (((x) & SOC_LF_TIMER_CONTROL1_ENABLE_MASK) >> SOC_LF_TIMER_CONTROL1_ENABLE_LSB)
+#define SOC_LF_TIMER_CONTROL1_ENABLE_SET(x)      (((x) << SOC_LF_TIMER_CONTROL1_ENABLE_LSB) & SOC_LF_TIMER_CONTROL1_ENABLE_MASK)
+#define SOC_LF_TIMER_CONTROL1_AUTO_RESTART_MSB   1
+#define SOC_LF_TIMER_CONTROL1_AUTO_RESTART_LSB   1
+#define SOC_LF_TIMER_CONTROL1_AUTO_RESTART_MASK  0x00000002
+#define SOC_LF_TIMER_CONTROL1_AUTO_RESTART_GET(x) (((x) & SOC_LF_TIMER_CONTROL1_AUTO_RESTART_MASK) >> SOC_LF_TIMER_CONTROL1_AUTO_RESTART_LSB)
+#define SOC_LF_TIMER_CONTROL1_AUTO_RESTART_SET(x) (((x) << SOC_LF_TIMER_CONTROL1_AUTO_RESTART_LSB) & SOC_LF_TIMER_CONTROL1_AUTO_RESTART_MASK)
+#define SOC_LF_TIMER_CONTROL1_RESET_MSB          0
+#define SOC_LF_TIMER_CONTROL1_RESET_LSB          0
+#define SOC_LF_TIMER_CONTROL1_RESET_MASK         0x00000001
+#define SOC_LF_TIMER_CONTROL1_RESET_GET(x)       (((x) & SOC_LF_TIMER_CONTROL1_RESET_MASK) >> SOC_LF_TIMER_CONTROL1_RESET_LSB)
+#define SOC_LF_TIMER_CONTROL1_RESET_SET(x)       (((x) << SOC_LF_TIMER_CONTROL1_RESET_LSB) & SOC_LF_TIMER_CONTROL1_RESET_MASK)
+
+#define SOC_LF_TIMER_STATUS1_ADDRESS             0x00000064
+#define SOC_LF_TIMER_STATUS1_OFFSET              0x00000064
+#define SOC_LF_TIMER_STATUS1_INTERRUPT_MSB       0
+#define SOC_LF_TIMER_STATUS1_INTERRUPT_LSB       0
+#define SOC_LF_TIMER_STATUS1_INTERRUPT_MASK      0x00000001
+#define SOC_LF_TIMER_STATUS1_INTERRUPT_GET(x)    (((x) & SOC_LF_TIMER_STATUS1_INTERRUPT_MASK) >> SOC_LF_TIMER_STATUS1_INTERRUPT_LSB)
+#define SOC_LF_TIMER_STATUS1_INTERRUPT_SET(x)    (((x) << SOC_LF_TIMER_STATUS1_INTERRUPT_LSB) & SOC_LF_TIMER_STATUS1_INTERRUPT_MASK)
+
+#define SOC_LF_TIMER2_ADDRESS                    0x00000068
+#define SOC_LF_TIMER2_OFFSET                     0x00000068
+#define SOC_LF_TIMER2_TARGET_MSB                 31
+#define SOC_LF_TIMER2_TARGET_LSB                 0
+#define SOC_LF_TIMER2_TARGET_MASK                0xffffffff
+#define SOC_LF_TIMER2_TARGET_GET(x)              (((x) & SOC_LF_TIMER2_TARGET_MASK) >> SOC_LF_TIMER2_TARGET_LSB)
+#define SOC_LF_TIMER2_TARGET_SET(x)              (((x) << SOC_LF_TIMER2_TARGET_LSB) & SOC_LF_TIMER2_TARGET_MASK)
+
+#define SOC_LF_TIMER_COUNT2_ADDRESS              0x0000006c
+#define SOC_LF_TIMER_COUNT2_OFFSET               0x0000006c
+#define SOC_LF_TIMER_COUNT2_VALUE_MSB            31
+#define SOC_LF_TIMER_COUNT2_VALUE_LSB            0
+#define SOC_LF_TIMER_COUNT2_VALUE_MASK           0xffffffff
+#define SOC_LF_TIMER_COUNT2_VALUE_GET(x)         (((x) & SOC_LF_TIMER_COUNT2_VALUE_MASK) >> SOC_LF_TIMER_COUNT2_VALUE_LSB)
+#define SOC_LF_TIMER_COUNT2_VALUE_SET(x)         (((x) << SOC_LF_TIMER_COUNT2_VALUE_LSB) & SOC_LF_TIMER_COUNT2_VALUE_MASK)
+
+#define SOC_LF_TIMER_CONTROL2_ADDRESS            0x00000070
+#define SOC_LF_TIMER_CONTROL2_OFFSET             0x00000070
+#define SOC_LF_TIMER_CONTROL2_ENABLE_MSB         2
+#define SOC_LF_TIMER_CONTROL2_ENABLE_LSB         2
+#define SOC_LF_TIMER_CONTROL2_ENABLE_MASK        0x00000004
+#define SOC_LF_TIMER_CONTROL2_ENABLE_GET(x)      (((x) & SOC_LF_TIMER_CONTROL2_ENABLE_MASK) >> SOC_LF_TIMER_CONTROL2_ENABLE_LSB)
+#define SOC_LF_TIMER_CONTROL2_ENABLE_SET(x)      (((x) << SOC_LF_TIMER_CONTROL2_ENABLE_LSB) & SOC_LF_TIMER_CONTROL2_ENABLE_MASK)
+#define SOC_LF_TIMER_CONTROL2_AUTO_RESTART_MSB   1
+#define SOC_LF_TIMER_CONTROL2_AUTO_RESTART_LSB   1
+#define SOC_LF_TIMER_CONTROL2_AUTO_RESTART_MASK  0x00000002
+#define SOC_LF_TIMER_CONTROL2_AUTO_RESTART_GET(x) (((x) & SOC_LF_TIMER_CONTROL2_AUTO_RESTART_MASK) >> SOC_LF_TIMER_CONTROL2_AUTO_RESTART_LSB)
+#define SOC_LF_TIMER_CONTROL2_AUTO_RESTART_SET(x) (((x) << SOC_LF_TIMER_CONTROL2_AUTO_RESTART_LSB) & SOC_LF_TIMER_CONTROL2_AUTO_RESTART_MASK)
+#define SOC_LF_TIMER_CONTROL2_RESET_MSB          0
+#define SOC_LF_TIMER_CONTROL2_RESET_LSB          0
+#define SOC_LF_TIMER_CONTROL2_RESET_MASK         0x00000001
+#define SOC_LF_TIMER_CONTROL2_RESET_GET(x)       (((x) & SOC_LF_TIMER_CONTROL2_RESET_MASK) >> SOC_LF_TIMER_CONTROL2_RESET_LSB)
+#define SOC_LF_TIMER_CONTROL2_RESET_SET(x)       (((x) << SOC_LF_TIMER_CONTROL2_RESET_LSB) & SOC_LF_TIMER_CONTROL2_RESET_MASK)
+
+#define SOC_LF_TIMER_STATUS2_ADDRESS             0x00000074
+#define SOC_LF_TIMER_STATUS2_OFFSET              0x00000074
+#define SOC_LF_TIMER_STATUS2_INTERRUPT_MSB       0
+#define SOC_LF_TIMER_STATUS2_INTERRUPT_LSB       0
+#define SOC_LF_TIMER_STATUS2_INTERRUPT_MASK      0x00000001
+#define SOC_LF_TIMER_STATUS2_INTERRUPT_GET(x)    (((x) & SOC_LF_TIMER_STATUS2_INTERRUPT_MASK) >> SOC_LF_TIMER_STATUS2_INTERRUPT_LSB)
+#define SOC_LF_TIMER_STATUS2_INTERRUPT_SET(x)    (((x) << SOC_LF_TIMER_STATUS2_INTERRUPT_LSB) & SOC_LF_TIMER_STATUS2_INTERRUPT_MASK)
+
+#define SOC_LF_TIMER3_ADDRESS                    0x00000078
+#define SOC_LF_TIMER3_OFFSET                     0x00000078
+#define SOC_LF_TIMER3_TARGET_MSB                 31
+#define SOC_LF_TIMER3_TARGET_LSB                 0
+#define SOC_LF_TIMER3_TARGET_MASK                0xffffffff
+#define SOC_LF_TIMER3_TARGET_GET(x)              (((x) & SOC_LF_TIMER3_TARGET_MASK) >> SOC_LF_TIMER3_TARGET_LSB)
+#define SOC_LF_TIMER3_TARGET_SET(x)              (((x) << SOC_LF_TIMER3_TARGET_LSB) & SOC_LF_TIMER3_TARGET_MASK)
+
+#define SOC_LF_TIMER_COUNT3_ADDRESS              0x0000007c
+#define SOC_LF_TIMER_COUNT3_OFFSET               0x0000007c
+#define SOC_LF_TIMER_COUNT3_VALUE_MSB            31
+#define SOC_LF_TIMER_COUNT3_VALUE_LSB            0
+#define SOC_LF_TIMER_COUNT3_VALUE_MASK           0xffffffff
+#define SOC_LF_TIMER_COUNT3_VALUE_GET(x)         (((x) & SOC_LF_TIMER_COUNT3_VALUE_MASK) >> SOC_LF_TIMER_COUNT3_VALUE_LSB)
+#define SOC_LF_TIMER_COUNT3_VALUE_SET(x)         (((x) << SOC_LF_TIMER_COUNT3_VALUE_LSB) & SOC_LF_TIMER_COUNT3_VALUE_MASK)
+
+#define SOC_LF_TIMER_CONTROL3_ADDRESS            0x00000080
+#define SOC_LF_TIMER_CONTROL3_OFFSET             0x00000080
+#define SOC_LF_TIMER_CONTROL3_ENABLE_MSB         2
+#define SOC_LF_TIMER_CONTROL3_ENABLE_LSB         2
+#define SOC_LF_TIMER_CONTROL3_ENABLE_MASK        0x00000004
+#define SOC_LF_TIMER_CONTROL3_ENABLE_GET(x)      (((x) & SOC_LF_TIMER_CONTROL3_ENABLE_MASK) >> SOC_LF_TIMER_CONTROL3_ENABLE_LSB)
+#define SOC_LF_TIMER_CONTROL3_ENABLE_SET(x)      (((x) << SOC_LF_TIMER_CONTROL3_ENABLE_LSB) & SOC_LF_TIMER_CONTROL3_ENABLE_MASK)
+#define SOC_LF_TIMER_CONTROL3_AUTO_RESTART_MSB   1
+#define SOC_LF_TIMER_CONTROL3_AUTO_RESTART_LSB   1
+#define SOC_LF_TIMER_CONTROL3_AUTO_RESTART_MASK  0x00000002
+#define SOC_LF_TIMER_CONTROL3_AUTO_RESTART_GET(x) (((x) & SOC_LF_TIMER_CONTROL3_AUTO_RESTART_MASK) >> SOC_LF_TIMER_CONTROL3_AUTO_RESTART_LSB)
+#define SOC_LF_TIMER_CONTROL3_AUTO_RESTART_SET(x) (((x) << SOC_LF_TIMER_CONTROL3_AUTO_RESTART_LSB) & SOC_LF_TIMER_CONTROL3_AUTO_RESTART_MASK)
+#define SOC_LF_TIMER_CONTROL3_RESET_MSB          0
+#define SOC_LF_TIMER_CONTROL3_RESET_LSB          0
+#define SOC_LF_TIMER_CONTROL3_RESET_MASK         0x00000001
+#define SOC_LF_TIMER_CONTROL3_RESET_GET(x)       (((x) & SOC_LF_TIMER_CONTROL3_RESET_MASK) >> SOC_LF_TIMER_CONTROL3_RESET_LSB)
+#define SOC_LF_TIMER_CONTROL3_RESET_SET(x)       (((x) << SOC_LF_TIMER_CONTROL3_RESET_LSB) & SOC_LF_TIMER_CONTROL3_RESET_MASK)
+
+#define SOC_LF_TIMER_STATUS3_ADDRESS             0x00000084
+#define SOC_LF_TIMER_STATUS3_OFFSET              0x00000084
+#define SOC_LF_TIMER_STATUS3_INTERRUPT_MSB       0
+#define SOC_LF_TIMER_STATUS3_INTERRUPT_LSB       0
+#define SOC_LF_TIMER_STATUS3_INTERRUPT_MASK      0x00000001
+#define SOC_LF_TIMER_STATUS3_INTERRUPT_GET(x)    (((x) & SOC_LF_TIMER_STATUS3_INTERRUPT_MASK) >> SOC_LF_TIMER_STATUS3_INTERRUPT_LSB)
+#define SOC_LF_TIMER_STATUS3_INTERRUPT_SET(x)    (((x) << SOC_LF_TIMER_STATUS3_INTERRUPT_LSB) & SOC_LF_TIMER_STATUS3_INTERRUPT_MASK)
+
+#define SOC_HF_TIMER_ADDRESS                     0x00000088
+#define SOC_HF_TIMER_OFFSET                      0x00000088
+#define SOC_HF_TIMER_TARGET_MSB                  31
+#define SOC_HF_TIMER_TARGET_LSB                  12
+#define SOC_HF_TIMER_TARGET_MASK                 0xfffff000
+#define SOC_HF_TIMER_TARGET_GET(x)               (((x) & SOC_HF_TIMER_TARGET_MASK) >> SOC_HF_TIMER_TARGET_LSB)
+#define SOC_HF_TIMER_TARGET_SET(x)               (((x) << SOC_HF_TIMER_TARGET_LSB) & SOC_HF_TIMER_TARGET_MASK)
+
+#define SOC_HF_TIMER_COUNT_ADDRESS               0x0000008c
+#define SOC_HF_TIMER_COUNT_OFFSET                0x0000008c
+#define SOC_HF_TIMER_COUNT_VALUE_MSB             31
+#define SOC_HF_TIMER_COUNT_VALUE_LSB             12
+#define SOC_HF_TIMER_COUNT_VALUE_MASK            0xfffff000
+#define SOC_HF_TIMER_COUNT_VALUE_GET(x)          (((x) & SOC_HF_TIMER_COUNT_VALUE_MASK) >> SOC_HF_TIMER_COUNT_VALUE_LSB)
+#define SOC_HF_TIMER_COUNT_VALUE_SET(x)          (((x) << SOC_HF_TIMER_COUNT_VALUE_LSB) & SOC_HF_TIMER_COUNT_VALUE_MASK)
+
+#define SOC_HF_LF_COUNT_ADDRESS                  0x00000090
+#define SOC_HF_LF_COUNT_OFFSET                   0x00000090
+#define SOC_HF_LF_COUNT_VALUE_MSB                31
+#define SOC_HF_LF_COUNT_VALUE_LSB                0
+#define SOC_HF_LF_COUNT_VALUE_MASK               0xffffffff
+#define SOC_HF_LF_COUNT_VALUE_GET(x)             (((x) & SOC_HF_LF_COUNT_VALUE_MASK) >> SOC_HF_LF_COUNT_VALUE_LSB)
+#define SOC_HF_LF_COUNT_VALUE_SET(x)             (((x) << SOC_HF_LF_COUNT_VALUE_LSB) & SOC_HF_LF_COUNT_VALUE_MASK)
+
+#define SOC_HF_TIMER_CONTROL_ADDRESS             0x00000094
+#define SOC_HF_TIMER_CONTROL_OFFSET              0x00000094
+#define SOC_HF_TIMER_CONTROL_ENABLE_MSB          3
+#define SOC_HF_TIMER_CONTROL_ENABLE_LSB          3
+#define SOC_HF_TIMER_CONTROL_ENABLE_MASK         0x00000008
+#define SOC_HF_TIMER_CONTROL_ENABLE_GET(x)       (((x) & SOC_HF_TIMER_CONTROL_ENABLE_MASK) >> SOC_HF_TIMER_CONTROL_ENABLE_LSB)
+#define SOC_HF_TIMER_CONTROL_ENABLE_SET(x)       (((x) << SOC_HF_TIMER_CONTROL_ENABLE_LSB) & SOC_HF_TIMER_CONTROL_ENABLE_MASK)
+#define SOC_HF_TIMER_CONTROL_ON_MSB              2
+#define SOC_HF_TIMER_CONTROL_ON_LSB              2
+#define SOC_HF_TIMER_CONTROL_ON_MASK             0x00000004
+#define SOC_HF_TIMER_CONTROL_ON_GET(x)           (((x) & SOC_HF_TIMER_CONTROL_ON_MASK) >> SOC_HF_TIMER_CONTROL_ON_LSB)
+#define SOC_HF_TIMER_CONTROL_ON_SET(x)           (((x) << SOC_HF_TIMER_CONTROL_ON_LSB) & SOC_HF_TIMER_CONTROL_ON_MASK)
+#define SOC_HF_TIMER_CONTROL_AUTO_RESTART_MSB    1
+#define SOC_HF_TIMER_CONTROL_AUTO_RESTART_LSB    1
+#define SOC_HF_TIMER_CONTROL_AUTO_RESTART_MASK   0x00000002
+#define SOC_HF_TIMER_CONTROL_AUTO_RESTART_GET(x) (((x) & SOC_HF_TIMER_CONTROL_AUTO_RESTART_MASK) >> SOC_HF_TIMER_CONTROL_AUTO_RESTART_LSB)
+#define SOC_HF_TIMER_CONTROL_AUTO_RESTART_SET(x) (((x) << SOC_HF_TIMER_CONTROL_AUTO_RESTART_LSB) & SOC_HF_TIMER_CONTROL_AUTO_RESTART_MASK)
+#define SOC_HF_TIMER_CONTROL_RESET_MSB           0
+#define SOC_HF_TIMER_CONTROL_RESET_LSB           0
+#define SOC_HF_TIMER_CONTROL_RESET_MASK          0x00000001
+#define SOC_HF_TIMER_CONTROL_RESET_GET(x)        (((x) & SOC_HF_TIMER_CONTROL_RESET_MASK) >> SOC_HF_TIMER_CONTROL_RESET_LSB)
+#define SOC_HF_TIMER_CONTROL_RESET_SET(x)        (((x) << SOC_HF_TIMER_CONTROL_RESET_LSB) & SOC_HF_TIMER_CONTROL_RESET_MASK)
+
+#define SOC_HF_TIMER_STATUS_ADDRESS              0x00000098
+#define SOC_HF_TIMER_STATUS_OFFSET               0x00000098
+#define SOC_HF_TIMER_STATUS_INTERRUPT_MSB        0
+#define SOC_HF_TIMER_STATUS_INTERRUPT_LSB        0
+#define SOC_HF_TIMER_STATUS_INTERRUPT_MASK       0x00000001
+#define SOC_HF_TIMER_STATUS_INTERRUPT_GET(x)     (((x) & SOC_HF_TIMER_STATUS_INTERRUPT_MASK) >> SOC_HF_TIMER_STATUS_INTERRUPT_LSB)
+#define SOC_HF_TIMER_STATUS_INTERRUPT_SET(x)     (((x) << SOC_HF_TIMER_STATUS_INTERRUPT_LSB) & SOC_HF_TIMER_STATUS_INTERRUPT_MASK)
+
+#define SOC_RTC_CONTROL_ADDRESS                  0x0000009c
+#define SOC_RTC_CONTROL_OFFSET                   0x0000009c
+#define SOC_RTC_CONTROL_ENABLE_MSB               2
+#define SOC_RTC_CONTROL_ENABLE_LSB               2
+#define SOC_RTC_CONTROL_ENABLE_MASK              0x00000004
+#define SOC_RTC_CONTROL_ENABLE_GET(x)            (((x) & SOC_RTC_CONTROL_ENABLE_MASK) >> SOC_RTC_CONTROL_ENABLE_LSB)
+#define SOC_RTC_CONTROL_ENABLE_SET(x)            (((x) << SOC_RTC_CONTROL_ENABLE_LSB) & SOC_RTC_CONTROL_ENABLE_MASK)
+#define SOC_RTC_CONTROL_LOAD_RTC_MSB             1
+#define SOC_RTC_CONTROL_LOAD_RTC_LSB             1
+#define SOC_RTC_CONTROL_LOAD_RTC_MASK            0x00000002
+#define SOC_RTC_CONTROL_LOAD_RTC_GET(x)          (((x) & SOC_RTC_CONTROL_LOAD_RTC_MASK) >> SOC_RTC_CONTROL_LOAD_RTC_LSB)
+#define SOC_RTC_CONTROL_LOAD_RTC_SET(x)          (((x) << SOC_RTC_CONTROL_LOAD_RTC_LSB) & SOC_RTC_CONTROL_LOAD_RTC_MASK)
+#define SOC_RTC_CONTROL_LOAD_ALARM_MSB           0
+#define SOC_RTC_CONTROL_LOAD_ALARM_LSB           0
+#define SOC_RTC_CONTROL_LOAD_ALARM_MASK          0x00000001
+#define SOC_RTC_CONTROL_LOAD_ALARM_GET(x)        (((x) & SOC_RTC_CONTROL_LOAD_ALARM_MASK) >> SOC_RTC_CONTROL_LOAD_ALARM_LSB)
+#define SOC_RTC_CONTROL_LOAD_ALARM_SET(x)        (((x) << SOC_RTC_CONTROL_LOAD_ALARM_LSB) & SOC_RTC_CONTROL_LOAD_ALARM_MASK)
+
+#define SOC_RTC_TIME_ADDRESS                     0x000000a0
+#define SOC_RTC_TIME_OFFSET                      0x000000a0
+#define SOC_RTC_TIME_WEEK_DAY_MSB                26
+#define SOC_RTC_TIME_WEEK_DAY_LSB                24
+#define SOC_RTC_TIME_WEEK_DAY_MASK               0x07000000
+#define SOC_RTC_TIME_WEEK_DAY_GET(x)             (((x) & SOC_RTC_TIME_WEEK_DAY_MASK) >> SOC_RTC_TIME_WEEK_DAY_LSB)
+#define SOC_RTC_TIME_WEEK_DAY_SET(x)             (((x) << SOC_RTC_TIME_WEEK_DAY_LSB) & SOC_RTC_TIME_WEEK_DAY_MASK)
+#define SOC_RTC_TIME_HOUR_MSB                    21
+#define SOC_RTC_TIME_HOUR_LSB                    16
+#define SOC_RTC_TIME_HOUR_MASK                   0x003f0000
+#define SOC_RTC_TIME_HOUR_GET(x)                 (((x) & SOC_RTC_TIME_HOUR_MASK) >> SOC_RTC_TIME_HOUR_LSB)
+#define SOC_RTC_TIME_HOUR_SET(x)                 (((x) << SOC_RTC_TIME_HOUR_LSB) & SOC_RTC_TIME_HOUR_MASK)
+#define SOC_RTC_TIME_MINUTE_MSB                  14
+#define SOC_RTC_TIME_MINUTE_LSB                  8
+#define SOC_RTC_TIME_MINUTE_MASK                 0x00007f00
+#define SOC_RTC_TIME_MINUTE_GET(x)               (((x) & SOC_RTC_TIME_MINUTE_MASK) >> SOC_RTC_TIME_MINUTE_LSB)
+#define SOC_RTC_TIME_MINUTE_SET(x)               (((x) << SOC_RTC_TIME_MINUTE_LSB) & SOC_RTC_TIME_MINUTE_MASK)
+#define SOC_RTC_TIME_SECOND_MSB                  6
+#define SOC_RTC_TIME_SECOND_LSB                  0
+#define SOC_RTC_TIME_SECOND_MASK                 0x0000007f
+#define SOC_RTC_TIME_SECOND_GET(x)               (((x) & SOC_RTC_TIME_SECOND_MASK) >> SOC_RTC_TIME_SECOND_LSB)
+#define SOC_RTC_TIME_SECOND_SET(x)               (((x) << SOC_RTC_TIME_SECOND_LSB) & SOC_RTC_TIME_SECOND_MASK)
+
+#define SOC_RTC_DATE_ADDRESS                     0x000000a4
+#define SOC_RTC_DATE_OFFSET                      0x000000a4
+#define SOC_RTC_DATE_YEAR_MSB                    23
+#define SOC_RTC_DATE_YEAR_LSB                    16
+#define SOC_RTC_DATE_YEAR_MASK                   0x00ff0000
+#define SOC_RTC_DATE_YEAR_GET(x)                 (((x) & SOC_RTC_DATE_YEAR_MASK) >> SOC_RTC_DATE_YEAR_LSB)
+#define SOC_RTC_DATE_YEAR_SET(x)                 (((x) << SOC_RTC_DATE_YEAR_LSB) & SOC_RTC_DATE_YEAR_MASK)
+#define SOC_RTC_DATE_MONTH_MSB                   12
+#define SOC_RTC_DATE_MONTH_LSB                   8
+#define SOC_RTC_DATE_MONTH_MASK                  0x00001f00
+#define SOC_RTC_DATE_MONTH_GET(x)                (((x) & SOC_RTC_DATE_MONTH_MASK) >> SOC_RTC_DATE_MONTH_LSB)
+#define SOC_RTC_DATE_MONTH_SET(x)                (((x) << SOC_RTC_DATE_MONTH_LSB) & SOC_RTC_DATE_MONTH_MASK)
+#define SOC_RTC_DATE_MONTH_DAY_MSB               5
+#define SOC_RTC_DATE_MONTH_DAY_LSB               0
+#define SOC_RTC_DATE_MONTH_DAY_MASK              0x0000003f
+#define SOC_RTC_DATE_MONTH_DAY_GET(x)            (((x) & SOC_RTC_DATE_MONTH_DAY_MASK) >> SOC_RTC_DATE_MONTH_DAY_LSB)
+#define SOC_RTC_DATE_MONTH_DAY_SET(x)            (((x) << SOC_RTC_DATE_MONTH_DAY_LSB) & SOC_RTC_DATE_MONTH_DAY_MASK)
+
+#define SOC_RTC_SET_TIME_ADDRESS                 0x000000a8
+#define SOC_RTC_SET_TIME_OFFSET                  0x000000a8
+#define SOC_RTC_SET_TIME_WEEK_DAY_MSB            26
+#define SOC_RTC_SET_TIME_WEEK_DAY_LSB            24
+#define SOC_RTC_SET_TIME_WEEK_DAY_MASK           0x07000000
+#define SOC_RTC_SET_TIME_WEEK_DAY_GET(x)         (((x) & SOC_RTC_SET_TIME_WEEK_DAY_MASK) >> SOC_RTC_SET_TIME_WEEK_DAY_LSB)
+#define SOC_RTC_SET_TIME_WEEK_DAY_SET(x)         (((x) << SOC_RTC_SET_TIME_WEEK_DAY_LSB) & SOC_RTC_SET_TIME_WEEK_DAY_MASK)
+#define SOC_RTC_SET_TIME_HOUR_MSB                21
+#define SOC_RTC_SET_TIME_HOUR_LSB                16
+#define SOC_RTC_SET_TIME_HOUR_MASK               0x003f0000
+#define SOC_RTC_SET_TIME_HOUR_GET(x)             (((x) & SOC_RTC_SET_TIME_HOUR_MASK) >> SOC_RTC_SET_TIME_HOUR_LSB)
+#define SOC_RTC_SET_TIME_HOUR_SET(x)             (((x) << SOC_RTC_SET_TIME_HOUR_LSB) & SOC_RTC_SET_TIME_HOUR_MASK)
+#define SOC_RTC_SET_TIME_MINUTE_MSB              14
+#define SOC_RTC_SET_TIME_MINUTE_LSB              8
+#define SOC_RTC_SET_TIME_MINUTE_MASK             0x00007f00
+#define SOC_RTC_SET_TIME_MINUTE_GET(x)           (((x) & SOC_RTC_SET_TIME_MINUTE_MASK) >> SOC_RTC_SET_TIME_MINUTE_LSB)
+#define SOC_RTC_SET_TIME_MINUTE_SET(x)           (((x) << SOC_RTC_SET_TIME_MINUTE_LSB) & SOC_RTC_SET_TIME_MINUTE_MASK)
+#define SOC_RTC_SET_TIME_SECOND_MSB              6
+#define SOC_RTC_SET_TIME_SECOND_LSB              0
+#define SOC_RTC_SET_TIME_SECOND_MASK             0x0000007f
+#define SOC_RTC_SET_TIME_SECOND_GET(x)           (((x) & SOC_RTC_SET_TIME_SECOND_MASK) >> SOC_RTC_SET_TIME_SECOND_LSB)
+#define SOC_RTC_SET_TIME_SECOND_SET(x)           (((x) << SOC_RTC_SET_TIME_SECOND_LSB) & SOC_RTC_SET_TIME_SECOND_MASK)
+
+#define SOC_RTC_SET_DATE_ADDRESS                 0x000000ac
+#define SOC_RTC_SET_DATE_OFFSET                  0x000000ac
+#define SOC_RTC_SET_DATE_YEAR_MSB                23
+#define SOC_RTC_SET_DATE_YEAR_LSB                16
+#define SOC_RTC_SET_DATE_YEAR_MASK               0x00ff0000
+#define SOC_RTC_SET_DATE_YEAR_GET(x)             (((x) & SOC_RTC_SET_DATE_YEAR_MASK) >> SOC_RTC_SET_DATE_YEAR_LSB)
+#define SOC_RTC_SET_DATE_YEAR_SET(x)             (((x) << SOC_RTC_SET_DATE_YEAR_LSB) & SOC_RTC_SET_DATE_YEAR_MASK)
+#define SOC_RTC_SET_DATE_MONTH_MSB               12
+#define SOC_RTC_SET_DATE_MONTH_LSB               8
+#define SOC_RTC_SET_DATE_MONTH_MASK              0x00001f00
+#define SOC_RTC_SET_DATE_MONTH_GET(x)            (((x) & SOC_RTC_SET_DATE_MONTH_MASK) >> SOC_RTC_SET_DATE_MONTH_LSB)
+#define SOC_RTC_SET_DATE_MONTH_SET(x)            (((x) << SOC_RTC_SET_DATE_MONTH_LSB) & SOC_RTC_SET_DATE_MONTH_MASK)
+#define SOC_RTC_SET_DATE_MONTH_DAY_MSB           5
+#define SOC_RTC_SET_DATE_MONTH_DAY_LSB           0
+#define SOC_RTC_SET_DATE_MONTH_DAY_MASK          0x0000003f
+#define SOC_RTC_SET_DATE_MONTH_DAY_GET(x)        (((x) & SOC_RTC_SET_DATE_MONTH_DAY_MASK) >> SOC_RTC_SET_DATE_MONTH_DAY_LSB)
+#define SOC_RTC_SET_DATE_MONTH_DAY_SET(x)        (((x) << SOC_RTC_SET_DATE_MONTH_DAY_LSB) & SOC_RTC_SET_DATE_MONTH_DAY_MASK)
+
+#define SOC_RTC_SET_ALARM_ADDRESS                0x000000b0
+#define SOC_RTC_SET_ALARM_OFFSET                 0x000000b0
+#define SOC_RTC_SET_ALARM_HOUR_MSB               21
+#define SOC_RTC_SET_ALARM_HOUR_LSB               16
+#define SOC_RTC_SET_ALARM_HOUR_MASK              0x003f0000
+#define SOC_RTC_SET_ALARM_HOUR_GET(x)            (((x) & SOC_RTC_SET_ALARM_HOUR_MASK) >> SOC_RTC_SET_ALARM_HOUR_LSB)
+#define SOC_RTC_SET_ALARM_HOUR_SET(x)            (((x) << SOC_RTC_SET_ALARM_HOUR_LSB) & SOC_RTC_SET_ALARM_HOUR_MASK)
+#define SOC_RTC_SET_ALARM_MINUTE_MSB             14
+#define SOC_RTC_SET_ALARM_MINUTE_LSB             8
+#define SOC_RTC_SET_ALARM_MINUTE_MASK            0x00007f00
+#define SOC_RTC_SET_ALARM_MINUTE_GET(x)          (((x) & SOC_RTC_SET_ALARM_MINUTE_MASK) >> SOC_RTC_SET_ALARM_MINUTE_LSB)
+#define SOC_RTC_SET_ALARM_MINUTE_SET(x)          (((x) << SOC_RTC_SET_ALARM_MINUTE_LSB) & SOC_RTC_SET_ALARM_MINUTE_MASK)
+#define SOC_RTC_SET_ALARM_SECOND_MSB             6
+#define SOC_RTC_SET_ALARM_SECOND_LSB             0
+#define SOC_RTC_SET_ALARM_SECOND_MASK            0x0000007f
+#define SOC_RTC_SET_ALARM_SECOND_GET(x)          (((x) & SOC_RTC_SET_ALARM_SECOND_MASK) >> SOC_RTC_SET_ALARM_SECOND_LSB)
+#define SOC_RTC_SET_ALARM_SECOND_SET(x)          (((x) << SOC_RTC_SET_ALARM_SECOND_LSB) & SOC_RTC_SET_ALARM_SECOND_MASK)
+
+#define SOC_RTC_CONFIG_ADDRESS                   0x000000b4
+#define SOC_RTC_CONFIG_OFFSET                    0x000000b4
+#define SOC_RTC_CONFIG_BCD_MSB                   2
+#define SOC_RTC_CONFIG_BCD_LSB                   2
+#define SOC_RTC_CONFIG_BCD_MASK                  0x00000004
+#define SOC_RTC_CONFIG_BCD_GET(x)                (((x) & SOC_RTC_CONFIG_BCD_MASK) >> SOC_RTC_CONFIG_BCD_LSB)
+#define SOC_RTC_CONFIG_BCD_SET(x)                (((x) << SOC_RTC_CONFIG_BCD_LSB) & SOC_RTC_CONFIG_BCD_MASK)
+#define SOC_RTC_CONFIG_TWELVE_HOUR_MSB           1
+#define SOC_RTC_CONFIG_TWELVE_HOUR_LSB           1
+#define SOC_RTC_CONFIG_TWELVE_HOUR_MASK          0x00000002
+#define SOC_RTC_CONFIG_TWELVE_HOUR_GET(x)        (((x) & SOC_RTC_CONFIG_TWELVE_HOUR_MASK) >> SOC_RTC_CONFIG_TWELVE_HOUR_LSB)
+#define SOC_RTC_CONFIG_TWELVE_HOUR_SET(x)        (((x) << SOC_RTC_CONFIG_TWELVE_HOUR_LSB) & SOC_RTC_CONFIG_TWELVE_HOUR_MASK)
+#define SOC_RTC_CONFIG_DSE_MSB                   0
+#define SOC_RTC_CONFIG_DSE_LSB                   0
+#define SOC_RTC_CONFIG_DSE_MASK                  0x00000001
+#define SOC_RTC_CONFIG_DSE_GET(x)                (((x) & SOC_RTC_CONFIG_DSE_MASK) >> SOC_RTC_CONFIG_DSE_LSB)
+#define SOC_RTC_CONFIG_DSE_SET(x)                (((x) << SOC_RTC_CONFIG_DSE_LSB) & SOC_RTC_CONFIG_DSE_MASK)
+
+#define SOC_RTC_ALARM_STATUS_ADDRESS             0x000000b8
+#define SOC_RTC_ALARM_STATUS_OFFSET              0x000000b8
+#define SOC_RTC_ALARM_STATUS_ENABLE_MSB          1
+#define SOC_RTC_ALARM_STATUS_ENABLE_LSB          1
+#define SOC_RTC_ALARM_STATUS_ENABLE_MASK         0x00000002
+#define SOC_RTC_ALARM_STATUS_ENABLE_GET(x)       (((x) & SOC_RTC_ALARM_STATUS_ENABLE_MASK) >> SOC_RTC_ALARM_STATUS_ENABLE_LSB)
+#define SOC_RTC_ALARM_STATUS_ENABLE_SET(x)       (((x) << SOC_RTC_ALARM_STATUS_ENABLE_LSB) & SOC_RTC_ALARM_STATUS_ENABLE_MASK)
+#define SOC_RTC_ALARM_STATUS_INTERRUPT_MSB       0
+#define SOC_RTC_ALARM_STATUS_INTERRUPT_LSB       0
+#define SOC_RTC_ALARM_STATUS_INTERRUPT_MASK      0x00000001
+#define SOC_RTC_ALARM_STATUS_INTERRUPT_GET(x)    (((x) & SOC_RTC_ALARM_STATUS_INTERRUPT_MASK) >> SOC_RTC_ALARM_STATUS_INTERRUPT_LSB)
+#define SOC_RTC_ALARM_STATUS_INTERRUPT_SET(x)    (((x) << SOC_RTC_ALARM_STATUS_INTERRUPT_LSB) & SOC_RTC_ALARM_STATUS_INTERRUPT_MASK)
+
+#define SOC_UART_WAKEUP_ADDRESS                  0x000000bc
+#define SOC_UART_WAKEUP_OFFSET                   0x000000bc
+#define SOC_UART_WAKEUP_ENABLE_MSB               0
+#define SOC_UART_WAKEUP_ENABLE_LSB               0
+#define SOC_UART_WAKEUP_ENABLE_MASK              0x00000001
+#define SOC_UART_WAKEUP_ENABLE_GET(x)            (((x) & SOC_UART_WAKEUP_ENABLE_MASK) >> SOC_UART_WAKEUP_ENABLE_LSB)
+#define SOC_UART_WAKEUP_ENABLE_SET(x)            (((x) << SOC_UART_WAKEUP_ENABLE_LSB) & SOC_UART_WAKEUP_ENABLE_MASK)
+
+#define SOC_RESET_CAUSE_ADDRESS                  0x000000c0
+#define SOC_RESET_CAUSE_OFFSET                   0x000000c0
+#define SOC_RESET_CAUSE_LAST_MSB                 2
+#define SOC_RESET_CAUSE_LAST_LSB                 0
+#define SOC_RESET_CAUSE_LAST_MASK                0x00000007
+#define SOC_RESET_CAUSE_LAST_GET(x)              (((x) & SOC_RESET_CAUSE_LAST_MASK) >> SOC_RESET_CAUSE_LAST_LSB)
+#define SOC_RESET_CAUSE_LAST_SET(x)              (((x) << SOC_RESET_CAUSE_LAST_LSB) & SOC_RESET_CAUSE_LAST_MASK)
+
+#define SOC_SYSTEM_SLEEP_ADDRESS                 0x000000c4
+#define SOC_SYSTEM_SLEEP_OFFSET                  0x000000c4
+#define SOC_SYSTEM_SLEEP_MCI_MSB                 5
+#define SOC_SYSTEM_SLEEP_MCI_LSB                 5
+#define SOC_SYSTEM_SLEEP_MCI_MASK                0x00000020
+#define SOC_SYSTEM_SLEEP_MCI_GET(x)              (((x) & SOC_SYSTEM_SLEEP_MCI_MASK) >> SOC_SYSTEM_SLEEP_MCI_LSB)
+#define SOC_SYSTEM_SLEEP_MCI_SET(x)              (((x) << SOC_SYSTEM_SLEEP_MCI_LSB) & SOC_SYSTEM_SLEEP_MCI_MASK)
+#define SOC_SYSTEM_SLEEP_HOST_IF_MSB             4
+#define SOC_SYSTEM_SLEEP_HOST_IF_LSB             4
+#define SOC_SYSTEM_SLEEP_HOST_IF_MASK            0x00000010
+#define SOC_SYSTEM_SLEEP_HOST_IF_GET(x)          (((x) & SOC_SYSTEM_SLEEP_HOST_IF_MASK) >> SOC_SYSTEM_SLEEP_HOST_IF_LSB)
+#define SOC_SYSTEM_SLEEP_HOST_IF_SET(x)          (((x) << SOC_SYSTEM_SLEEP_HOST_IF_LSB) & SOC_SYSTEM_SLEEP_HOST_IF_MASK)
+#define SOC_SYSTEM_SLEEP_MBOX_MSB                3
+#define SOC_SYSTEM_SLEEP_MBOX_LSB                3
+#define SOC_SYSTEM_SLEEP_MBOX_MASK               0x00000008
+#define SOC_SYSTEM_SLEEP_MBOX_GET(x)             (((x) & SOC_SYSTEM_SLEEP_MBOX_MASK) >> SOC_SYSTEM_SLEEP_MBOX_LSB)
+#define SOC_SYSTEM_SLEEP_MBOX_SET(x)             (((x) << SOC_SYSTEM_SLEEP_MBOX_LSB) & SOC_SYSTEM_SLEEP_MBOX_MASK)
+#define SOC_SYSTEM_SLEEP_MAC_IF_MSB              2
+#define SOC_SYSTEM_SLEEP_MAC_IF_LSB              2
+#define SOC_SYSTEM_SLEEP_MAC_IF_MASK             0x00000004
+#define SOC_SYSTEM_SLEEP_MAC_IF_GET(x)           (((x) & SOC_SYSTEM_SLEEP_MAC_IF_MASK) >> SOC_SYSTEM_SLEEP_MAC_IF_LSB)
+#define SOC_SYSTEM_SLEEP_MAC_IF_SET(x)           (((x) << SOC_SYSTEM_SLEEP_MAC_IF_LSB) & SOC_SYSTEM_SLEEP_MAC_IF_MASK)
+#define SOC_SYSTEM_SLEEP_LIGHT_MSB               1
+#define SOC_SYSTEM_SLEEP_LIGHT_LSB               1
+#define SOC_SYSTEM_SLEEP_LIGHT_MASK              0x00000002
+#define SOC_SYSTEM_SLEEP_LIGHT_GET(x)            (((x) & SOC_SYSTEM_SLEEP_LIGHT_MASK) >> SOC_SYSTEM_SLEEP_LIGHT_LSB)
+#define SOC_SYSTEM_SLEEP_LIGHT_SET(x)            (((x) << SOC_SYSTEM_SLEEP_LIGHT_LSB) & SOC_SYSTEM_SLEEP_LIGHT_MASK)
+#define SOC_SYSTEM_SLEEP_DISABLE_MSB             0
+#define SOC_SYSTEM_SLEEP_DISABLE_LSB             0
+#define SOC_SYSTEM_SLEEP_DISABLE_MASK            0x00000001
+#define SOC_SYSTEM_SLEEP_DISABLE_GET(x)          (((x) & SOC_SYSTEM_SLEEP_DISABLE_MASK) >> SOC_SYSTEM_SLEEP_DISABLE_LSB)
+#define SOC_SYSTEM_SLEEP_DISABLE_SET(x)          (((x) << SOC_SYSTEM_SLEEP_DISABLE_LSB) & SOC_SYSTEM_SLEEP_DISABLE_MASK)
+
+#define SOC_SDIO_WRAPPER_ADDRESS                 0x000000c8
+#define SOC_SDIO_WRAPPER_OFFSET                  0x000000c8
+#define SOC_SDIO_WRAPPER_SLEEP_MSB               3
+#define SOC_SDIO_WRAPPER_SLEEP_LSB               3
+#define SOC_SDIO_WRAPPER_SLEEP_MASK              0x00000008
+#define SOC_SDIO_WRAPPER_SLEEP_GET(x)            (((x) & SOC_SDIO_WRAPPER_SLEEP_MASK) >> SOC_SDIO_WRAPPER_SLEEP_LSB)
+#define SOC_SDIO_WRAPPER_SLEEP_SET(x)            (((x) << SOC_SDIO_WRAPPER_SLEEP_LSB) & SOC_SDIO_WRAPPER_SLEEP_MASK)
+#define SOC_SDIO_WRAPPER_WAKEUP_MSB              2
+#define SOC_SDIO_WRAPPER_WAKEUP_LSB              2
+#define SOC_SDIO_WRAPPER_WAKEUP_MASK             0x00000004
+#define SOC_SDIO_WRAPPER_WAKEUP_GET(x)           (((x) & SOC_SDIO_WRAPPER_WAKEUP_MASK) >> SOC_SDIO_WRAPPER_WAKEUP_LSB)
+#define SOC_SDIO_WRAPPER_WAKEUP_SET(x)           (((x) << SOC_SDIO_WRAPPER_WAKEUP_LSB) & SOC_SDIO_WRAPPER_WAKEUP_MASK)
+#define SOC_SDIO_WRAPPER_SOC_ON_MSB              1
+#define SOC_SDIO_WRAPPER_SOC_ON_LSB              1
+#define SOC_SDIO_WRAPPER_SOC_ON_MASK             0x00000002
+#define SOC_SDIO_WRAPPER_SOC_ON_GET(x)           (((x) & SOC_SDIO_WRAPPER_SOC_ON_MASK) >> SOC_SDIO_WRAPPER_SOC_ON_LSB)
+#define SOC_SDIO_WRAPPER_SOC_ON_SET(x)           (((x) << SOC_SDIO_WRAPPER_SOC_ON_LSB) & SOC_SDIO_WRAPPER_SOC_ON_MASK)
+#define SOC_SDIO_WRAPPER_ON_MSB                  0
+#define SOC_SDIO_WRAPPER_ON_LSB                  0
+#define SOC_SDIO_WRAPPER_ON_MASK                 0x00000001
+#define SOC_SDIO_WRAPPER_ON_GET(x)               (((x) & SOC_SDIO_WRAPPER_ON_MASK) >> SOC_SDIO_WRAPPER_ON_LSB)
+#define SOC_SDIO_WRAPPER_ON_SET(x)               (((x) << SOC_SDIO_WRAPPER_ON_LSB) & SOC_SDIO_WRAPPER_ON_MASK)
+
+#define SOC_INT_SLEEP_MASK_ADDRESS               0x000000cc
+#define SOC_INT_SLEEP_MASK_OFFSET                0x000000cc
+#define SOC_INT_SLEEP_MASK_BITMAP_MSB            31
+#define SOC_INT_SLEEP_MASK_BITMAP_LSB            0
+#define SOC_INT_SLEEP_MASK_BITMAP_MASK           0xffffffff
+#define SOC_INT_SLEEP_MASK_BITMAP_GET(x)         (((x) & SOC_INT_SLEEP_MASK_BITMAP_MASK) >> SOC_INT_SLEEP_MASK_BITMAP_LSB)
+#define SOC_INT_SLEEP_MASK_BITMAP_SET(x)         (((x) << SOC_INT_SLEEP_MASK_BITMAP_LSB) & SOC_INT_SLEEP_MASK_BITMAP_MASK)
+
+#define SOC_LPO_CAL_TIME_ADDRESS                 0x000000d4
+#define SOC_LPO_CAL_TIME_OFFSET                  0x000000d4
+#define SOC_LPO_CAL_TIME_LENGTH_MSB              13
+#define SOC_LPO_CAL_TIME_LENGTH_LSB              0
+#define SOC_LPO_CAL_TIME_LENGTH_MASK             0x00003fff
+#define SOC_LPO_CAL_TIME_LENGTH_GET(x)           (((x) & SOC_LPO_CAL_TIME_LENGTH_MASK) >> SOC_LPO_CAL_TIME_LENGTH_LSB)
+#define SOC_LPO_CAL_TIME_LENGTH_SET(x)           (((x) << SOC_LPO_CAL_TIME_LENGTH_LSB) & SOC_LPO_CAL_TIME_LENGTH_MASK)
+
+#define SOC_LPO_INIT_DIVIDEND_INT_ADDRESS        0x000000d8
+#define SOC_LPO_INIT_DIVIDEND_INT_OFFSET         0x000000d8
+#define SOC_LPO_INIT_DIVIDEND_INT_VALUE_MSB      23
+#define SOC_LPO_INIT_DIVIDEND_INT_VALUE_LSB      0
+#define SOC_LPO_INIT_DIVIDEND_INT_VALUE_MASK     0x00ffffff
+#define SOC_LPO_INIT_DIVIDEND_INT_VALUE_GET(x)   (((x) & SOC_LPO_INIT_DIVIDEND_INT_VALUE_MASK) >> SOC_LPO_INIT_DIVIDEND_INT_VALUE_LSB)
+#define SOC_LPO_INIT_DIVIDEND_INT_VALUE_SET(x)   (((x) << SOC_LPO_INIT_DIVIDEND_INT_VALUE_LSB) & SOC_LPO_INIT_DIVIDEND_INT_VALUE_MASK)
+
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_ADDRESS   0x000000dc
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_OFFSET    0x000000dc
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_MSB 10
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB 0
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK 0x000007ff
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_GET(x) (((x) & SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK) >> SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB)
+#define SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_SET(x) (((x) << SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB) & SOC_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK)
+
+#define SOC_LPO_CAL_ADDRESS                      0x000000e0
+#define SOC_LPO_CAL_OFFSET                       0x000000e0
+#define SOC_LPO_CAL_ENABLE_MSB                   20
+#define SOC_LPO_CAL_ENABLE_LSB                   20
+#define SOC_LPO_CAL_ENABLE_MASK                  0x00100000
+#define SOC_LPO_CAL_ENABLE_GET(x)                (((x) & SOC_LPO_CAL_ENABLE_MASK) >> SOC_LPO_CAL_ENABLE_LSB)
+#define SOC_LPO_CAL_ENABLE_SET(x)                (((x) << SOC_LPO_CAL_ENABLE_LSB) & SOC_LPO_CAL_ENABLE_MASK)
+#define SOC_LPO_CAL_COUNT_MSB                    19
+#define SOC_LPO_CAL_COUNT_LSB                    0
+#define SOC_LPO_CAL_COUNT_MASK                   0x000fffff
+#define SOC_LPO_CAL_COUNT_GET(x)                 (((x) & SOC_LPO_CAL_COUNT_MASK) >> SOC_LPO_CAL_COUNT_LSB)
+#define SOC_LPO_CAL_COUNT_SET(x)                 (((x) << SOC_LPO_CAL_COUNT_LSB) & SOC_LPO_CAL_COUNT_MASK)
+
+#define SOC_LPO_CAL_TEST_CONTROL_ADDRESS         0x000000e4
+#define SOC_LPO_CAL_TEST_CONTROL_OFFSET          0x000000e4
+#define SOC_LPO_CAL_TEST_CONTROL_ENABLE_MSB      16
+#define SOC_LPO_CAL_TEST_CONTROL_ENABLE_LSB      16
+#define SOC_LPO_CAL_TEST_CONTROL_ENABLE_MASK     0x00010000
+#define SOC_LPO_CAL_TEST_CONTROL_ENABLE_GET(x)   (((x) & SOC_LPO_CAL_TEST_CONTROL_ENABLE_MASK) >> SOC_LPO_CAL_TEST_CONTROL_ENABLE_LSB)
+#define SOC_LPO_CAL_TEST_CONTROL_ENABLE_SET(x)   (((x) << SOC_LPO_CAL_TEST_CONTROL_ENABLE_LSB) & SOC_LPO_CAL_TEST_CONTROL_ENABLE_MASK)
+#define SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MSB  15
+#define SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB  0
+#define SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK 0x0000ffff
+#define SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_GET(x) (((x) & SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK) >> SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB)
+#define SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_SET(x) (((x) << SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB) & SOC_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK)
+
+#define SOC_LPO_CAL_TEST_STATUS_ADDRESS          0x000000e8
+#define SOC_LPO_CAL_TEST_STATUS_OFFSET           0x000000e8
+#define SOC_LPO_CAL_TEST_STATUS_READY_MSB        16
+#define SOC_LPO_CAL_TEST_STATUS_READY_LSB        16
+#define SOC_LPO_CAL_TEST_STATUS_READY_MASK       0x00010000
+#define SOC_LPO_CAL_TEST_STATUS_READY_GET(x)     (((x) & SOC_LPO_CAL_TEST_STATUS_READY_MASK) >> SOC_LPO_CAL_TEST_STATUS_READY_LSB)
+#define SOC_LPO_CAL_TEST_STATUS_READY_SET(x)     (((x) << SOC_LPO_CAL_TEST_STATUS_READY_LSB) & SOC_LPO_CAL_TEST_STATUS_READY_MASK)
+#define SOC_LPO_CAL_TEST_STATUS_COUNT_MSB        15
+#define SOC_LPO_CAL_TEST_STATUS_COUNT_LSB        0
+#define SOC_LPO_CAL_TEST_STATUS_COUNT_MASK       0x0000ffff
+#define SOC_LPO_CAL_TEST_STATUS_COUNT_GET(x)     (((x) & SOC_LPO_CAL_TEST_STATUS_COUNT_MASK) >> SOC_LPO_CAL_TEST_STATUS_COUNT_LSB)
+#define SOC_LPO_CAL_TEST_STATUS_COUNT_SET(x)     (((x) << SOC_LPO_CAL_TEST_STATUS_COUNT_LSB) & SOC_LPO_CAL_TEST_STATUS_COUNT_MASK)
+
+#define LEGACY_SOC_CHIP_ID_ADDRESS               0x000000ec
+#define LEGACY_SOC_CHIP_ID_OFFSET                0x000000ec
+#define LEGACY_SOC_CHIP_ID_DEVICE_ID_MSB         31
+#define LEGACY_SOC_CHIP_ID_DEVICE_ID_LSB         16
+#define LEGACY_SOC_CHIP_ID_DEVICE_ID_MASK        0xffff0000
+#define LEGACY_SOC_CHIP_ID_DEVICE_ID_GET(x)      (((x) & LEGACY_SOC_CHIP_ID_DEVICE_ID_MASK) >> LEGACY_SOC_CHIP_ID_DEVICE_ID_LSB)
+#define LEGACY_SOC_CHIP_ID_DEVICE_ID_SET(x)      (((x) << LEGACY_SOC_CHIP_ID_DEVICE_ID_LSB) & LEGACY_SOC_CHIP_ID_DEVICE_ID_MASK)
+#define LEGACY_SOC_CHIP_ID_CONFIG_ID_MSB         15
+#define LEGACY_SOC_CHIP_ID_CONFIG_ID_LSB         4
+#define LEGACY_SOC_CHIP_ID_CONFIG_ID_MASK        0x0000fff0
+#define LEGACY_SOC_CHIP_ID_CONFIG_ID_GET(x)      (((x) & LEGACY_SOC_CHIP_ID_CONFIG_ID_MASK) >> LEGACY_SOC_CHIP_ID_CONFIG_ID_LSB)
+#define LEGACY_SOC_CHIP_ID_CONFIG_ID_SET(x)      (((x) << LEGACY_SOC_CHIP_ID_CONFIG_ID_LSB) & LEGACY_SOC_CHIP_ID_CONFIG_ID_MASK)
+#define LEGACY_SOC_CHIP_ID_VERSION_ID_MSB        3
+#define LEGACY_SOC_CHIP_ID_VERSION_ID_LSB        0
+#define LEGACY_SOC_CHIP_ID_VERSION_ID_MASK       0x0000000f
+#define LEGACY_SOC_CHIP_ID_VERSION_ID_GET(x)     (((x) & LEGACY_SOC_CHIP_ID_VERSION_ID_MASK) >> LEGACY_SOC_CHIP_ID_VERSION_ID_LSB)
+#define LEGACY_SOC_CHIP_ID_VERSION_ID_SET(x)     (((x) << LEGACY_SOC_CHIP_ID_VERSION_ID_LSB) & LEGACY_SOC_CHIP_ID_VERSION_ID_MASK)
+
+#define SOC_CHIP_ID_ADDRESS                      0x000000f0
+#define SOC_CHIP_ID_OFFSET                       0x000000f0
+#define SOC_CHIP_ID_DEVICE_ID_MSB                31
+#define SOC_CHIP_ID_DEVICE_ID_LSB                16
+#define SOC_CHIP_ID_DEVICE_ID_MASK               0xffff0000
+#define SOC_CHIP_ID_DEVICE_ID_GET(x)             (((x) & SOC_CHIP_ID_DEVICE_ID_MASK) >> SOC_CHIP_ID_DEVICE_ID_LSB)
+#define SOC_CHIP_ID_DEVICE_ID_SET(x)             (((x) << SOC_CHIP_ID_DEVICE_ID_LSB) & SOC_CHIP_ID_DEVICE_ID_MASK)
+#define SOC_CHIP_ID_CONFIG_ID_MSB                15
+#define SOC_CHIP_ID_CONFIG_ID_LSB                4
+#define SOC_CHIP_ID_CONFIG_ID_MASK               0x0000fff0
+#define SOC_CHIP_ID_CONFIG_ID_GET(x)             (((x) & SOC_CHIP_ID_CONFIG_ID_MASK) >> SOC_CHIP_ID_CONFIG_ID_LSB)
+#define SOC_CHIP_ID_CONFIG_ID_SET(x)             (((x) << SOC_CHIP_ID_CONFIG_ID_LSB) & SOC_CHIP_ID_CONFIG_ID_MASK)
+#define SOC_CHIP_ID_VERSION_ID_MSB               3
+#define SOC_CHIP_ID_VERSION_ID_LSB               0
+#define SOC_CHIP_ID_VERSION_ID_MASK              0x0000000f
+#define SOC_CHIP_ID_VERSION_ID_GET(x)            (((x) & SOC_CHIP_ID_VERSION_ID_MASK) >> SOC_CHIP_ID_VERSION_ID_LSB)
+#define SOC_CHIP_ID_VERSION_ID_SET(x)            (((x) << SOC_CHIP_ID_VERSION_ID_LSB) & SOC_CHIP_ID_VERSION_ID_MASK)
+
+#define SOC_POWER_REG_ADDRESS                    0x0000010c
+#define SOC_POWER_REG_OFFSET                     0x0000010c
+#define SOC_POWER_REG_DISCON_MODE_EN_MSB         16
+#define SOC_POWER_REG_DISCON_MODE_EN_LSB         16
+#define SOC_POWER_REG_DISCON_MODE_EN_MASK        0x00010000
+#define SOC_POWER_REG_DISCON_MODE_EN_GET(x)      (((x) & SOC_POWER_REG_DISCON_MODE_EN_MASK) >> SOC_POWER_REG_DISCON_MODE_EN_LSB)
+#define SOC_POWER_REG_DISCON_MODE_EN_SET(x)      (((x) << SOC_POWER_REG_DISCON_MODE_EN_LSB) & SOC_POWER_REG_DISCON_MODE_EN_MASK)
+#define SOC_POWER_REG_DEEP_SLEEP_EN_MSB          15
+#define SOC_POWER_REG_DEEP_SLEEP_EN_LSB          15
+#define SOC_POWER_REG_DEEP_SLEEP_EN_MASK         0x00008000
+#define SOC_POWER_REG_DEEP_SLEEP_EN_GET(x)       (((x) & SOC_POWER_REG_DEEP_SLEEP_EN_MASK) >> SOC_POWER_REG_DEEP_SLEEP_EN_LSB)
+#define SOC_POWER_REG_DEEP_SLEEP_EN_SET(x)       (((x) << SOC_POWER_REG_DEEP_SLEEP_EN_LSB) & SOC_POWER_REG_DEEP_SLEEP_EN_MASK)
+#define SOC_POWER_REG_DEBUG_EN_MSB               14
+#define SOC_POWER_REG_DEBUG_EN_LSB               14
+#define SOC_POWER_REG_DEBUG_EN_MASK              0x00004000
+#define SOC_POWER_REG_DEBUG_EN_GET(x)            (((x) & SOC_POWER_REG_DEBUG_EN_MASK) >> SOC_POWER_REG_DEBUG_EN_LSB)
+#define SOC_POWER_REG_DEBUG_EN_SET(x)            (((x) << SOC_POWER_REG_DEBUG_EN_LSB) & SOC_POWER_REG_DEBUG_EN_MASK)
+#define SOC_POWER_REG_WLAN_BB_PWD_EN_MSB         13
+#define SOC_POWER_REG_WLAN_BB_PWD_EN_LSB         13
+#define SOC_POWER_REG_WLAN_BB_PWD_EN_MASK        0x00002000
+#define SOC_POWER_REG_WLAN_BB_PWD_EN_GET(x)      (((x) & SOC_POWER_REG_WLAN_BB_PWD_EN_MASK) >> SOC_POWER_REG_WLAN_BB_PWD_EN_LSB)
+#define SOC_POWER_REG_WLAN_BB_PWD_EN_SET(x)      (((x) << SOC_POWER_REG_WLAN_BB_PWD_EN_LSB) & SOC_POWER_REG_WLAN_BB_PWD_EN_MASK)
+#define SOC_POWER_REG_WLAN_MAC_PWD_EN_MSB        12
+#define SOC_POWER_REG_WLAN_MAC_PWD_EN_LSB        12
+#define SOC_POWER_REG_WLAN_MAC_PWD_EN_MASK       0x00001000
+#define SOC_POWER_REG_WLAN_MAC_PWD_EN_GET(x)     (((x) & SOC_POWER_REG_WLAN_MAC_PWD_EN_MASK) >> SOC_POWER_REG_WLAN_MAC_PWD_EN_LSB)
+#define SOC_POWER_REG_WLAN_MAC_PWD_EN_SET(x)     (((x) << SOC_POWER_REG_WLAN_MAC_PWD_EN_LSB) & SOC_POWER_REG_WLAN_MAC_PWD_EN_MASK)
+#define SOC_POWER_REG_CPU_INT_ENABLE_MSB         7
+#define SOC_POWER_REG_CPU_INT_ENABLE_LSB         7
+#define SOC_POWER_REG_CPU_INT_ENABLE_MASK        0x00000080
+#define SOC_POWER_REG_CPU_INT_ENABLE_GET(x)      (((x) & SOC_POWER_REG_CPU_INT_ENABLE_MASK) >> SOC_POWER_REG_CPU_INT_ENABLE_LSB)
+#define SOC_POWER_REG_CPU_INT_ENABLE_SET(x)      (((x) << SOC_POWER_REG_CPU_INT_ENABLE_LSB) & SOC_POWER_REG_CPU_INT_ENABLE_MASK)
+#define SOC_POWER_REG_WLAN_ISO_DIS_MSB           6
+#define SOC_POWER_REG_WLAN_ISO_DIS_LSB           6
+#define SOC_POWER_REG_WLAN_ISO_DIS_MASK          0x00000040
+#define SOC_POWER_REG_WLAN_ISO_DIS_GET(x)        (((x) & SOC_POWER_REG_WLAN_ISO_DIS_MASK) >> SOC_POWER_REG_WLAN_ISO_DIS_LSB)
+#define SOC_POWER_REG_WLAN_ISO_DIS_SET(x)        (((x) << SOC_POWER_REG_WLAN_ISO_DIS_LSB) & SOC_POWER_REG_WLAN_ISO_DIS_MASK)
+#define SOC_POWER_REG_WLAN_ISO_CNTL_MSB          5
+#define SOC_POWER_REG_WLAN_ISO_CNTL_LSB          5
+#define SOC_POWER_REG_WLAN_ISO_CNTL_MASK         0x00000020
+#define SOC_POWER_REG_WLAN_ISO_CNTL_GET(x)       (((x) & SOC_POWER_REG_WLAN_ISO_CNTL_MASK) >> SOC_POWER_REG_WLAN_ISO_CNTL_LSB)
+#define SOC_POWER_REG_WLAN_ISO_CNTL_SET(x)       (((x) << SOC_POWER_REG_WLAN_ISO_CNTL_LSB) & SOC_POWER_REG_WLAN_ISO_CNTL_MASK)
+#define SOC_POWER_REG_RADIO_PWD_EN_MSB           4
+#define SOC_POWER_REG_RADIO_PWD_EN_LSB           4
+#define SOC_POWER_REG_RADIO_PWD_EN_MASK          0x00000010
+#define SOC_POWER_REG_RADIO_PWD_EN_GET(x)        (((x) & SOC_POWER_REG_RADIO_PWD_EN_MASK) >> SOC_POWER_REG_RADIO_PWD_EN_LSB)
+#define SOC_POWER_REG_RADIO_PWD_EN_SET(x)        (((x) << SOC_POWER_REG_RADIO_PWD_EN_LSB) & SOC_POWER_REG_RADIO_PWD_EN_MASK)
+#define SOC_POWER_REG_SOC_ISO_EN_MSB             3
+#define SOC_POWER_REG_SOC_ISO_EN_LSB             3
+#define SOC_POWER_REG_SOC_ISO_EN_MASK            0x00000008
+#define SOC_POWER_REG_SOC_ISO_EN_GET(x)          (((x) & SOC_POWER_REG_SOC_ISO_EN_MASK) >> SOC_POWER_REG_SOC_ISO_EN_LSB)
+#define SOC_POWER_REG_SOC_ISO_EN_SET(x)          (((x) << SOC_POWER_REG_SOC_ISO_EN_LSB) & SOC_POWER_REG_SOC_ISO_EN_MASK)
+#define SOC_POWER_REG_WLAN_ISO_EN_MSB            2
+#define SOC_POWER_REG_WLAN_ISO_EN_LSB            2
+#define SOC_POWER_REG_WLAN_ISO_EN_MASK           0x00000004
+#define SOC_POWER_REG_WLAN_ISO_EN_GET(x)         (((x) & SOC_POWER_REG_WLAN_ISO_EN_MASK) >> SOC_POWER_REG_WLAN_ISO_EN_LSB)
+#define SOC_POWER_REG_WLAN_ISO_EN_SET(x)         (((x) << SOC_POWER_REG_WLAN_ISO_EN_LSB) & SOC_POWER_REG_WLAN_ISO_EN_MASK)
+#define SOC_POWER_REG_WLAN_PWD_EN_MSB            1
+#define SOC_POWER_REG_WLAN_PWD_EN_LSB            1
+#define SOC_POWER_REG_WLAN_PWD_EN_MASK           0x00000002
+#define SOC_POWER_REG_WLAN_PWD_EN_GET(x)         (((x) & SOC_POWER_REG_WLAN_PWD_EN_MASK) >> SOC_POWER_REG_WLAN_PWD_EN_LSB)
+#define SOC_POWER_REG_WLAN_PWD_EN_SET(x)         (((x) << SOC_POWER_REG_WLAN_PWD_EN_LSB) & SOC_POWER_REG_WLAN_PWD_EN_MASK)
+#define SOC_POWER_REG_POWER_EN_MSB               0
+#define SOC_POWER_REG_POWER_EN_LSB               0
+#define SOC_POWER_REG_POWER_EN_MASK              0x00000001
+#define SOC_POWER_REG_POWER_EN_GET(x)            (((x) & SOC_POWER_REG_POWER_EN_MASK) >> SOC_POWER_REG_POWER_EN_LSB)
+#define SOC_POWER_REG_POWER_EN_SET(x)            (((x) << SOC_POWER_REG_POWER_EN_LSB) & SOC_POWER_REG_POWER_EN_MASK)
+
+#define SOC_CORE_CLK_CTRL_ADDRESS                0x00000110
+#define SOC_CORE_CLK_CTRL_OFFSET                 0x00000110
+#define SOC_CORE_CLK_CTRL_DIV_MSB                2
+#define SOC_CORE_CLK_CTRL_DIV_LSB                0
+#define SOC_CORE_CLK_CTRL_DIV_MASK               0x00000007
+#define SOC_CORE_CLK_CTRL_DIV_GET(x)             (((x) & SOC_CORE_CLK_CTRL_DIV_MASK) >> SOC_CORE_CLK_CTRL_DIV_LSB)
+#define SOC_CORE_CLK_CTRL_DIV_SET(x)             (((x) << SOC_CORE_CLK_CTRL_DIV_LSB) & SOC_CORE_CLK_CTRL_DIV_MASK)
+
+#define SOC_GPIO_WAKEUP_CONTROL_ADDRESS          0x00000114
+#define SOC_GPIO_WAKEUP_CONTROL_OFFSET           0x00000114
+#define SOC_GPIO_WAKEUP_CONTROL_ENABLE_MSB       0
+#define SOC_GPIO_WAKEUP_CONTROL_ENABLE_LSB       0
+#define SOC_GPIO_WAKEUP_CONTROL_ENABLE_MASK      0x00000001
+#define SOC_GPIO_WAKEUP_CONTROL_ENABLE_GET(x)    (((x) & SOC_GPIO_WAKEUP_CONTROL_ENABLE_MASK) >> SOC_GPIO_WAKEUP_CONTROL_ENABLE_LSB)
+#define SOC_GPIO_WAKEUP_CONTROL_ENABLE_SET(x)    (((x) << SOC_GPIO_WAKEUP_CONTROL_ENABLE_LSB) & SOC_GPIO_WAKEUP_CONTROL_ENABLE_MASK)
+
+#define SLEEP_RETENTION_ADDRESS                  0x00000214
+#define SLEEP_RETENTION_OFFSET                   0x00000214
+#define SLEEP_RETENTION_GREEN_SAVE_MSB           10
+#define SLEEP_RETENTION_GREEN_SAVE_LSB           10
+#define SLEEP_RETENTION_GREEN_SAVE_MASK          0x00000400
+#define SLEEP_RETENTION_GREEN_SAVE_GET(x)        (((x) & SLEEP_RETENTION_GREEN_SAVE_MASK) >> SLEEP_RETENTION_GREEN_SAVE_LSB)
+#define SLEEP_RETENTION_GREEN_SAVE_SET(x)        (((x) << SLEEP_RETENTION_GREEN_SAVE_LSB) & SLEEP_RETENTION_GREEN_SAVE_MASK)
+#define SLEEP_RETENTION_TIME_MSB                 9
+#define SLEEP_RETENTION_TIME_LSB                 2
+#define SLEEP_RETENTION_TIME_MASK                0x000003fc
+#define SLEEP_RETENTION_TIME_GET(x)              (((x) & SLEEP_RETENTION_TIME_MASK) >> SLEEP_RETENTION_TIME_LSB)
+#define SLEEP_RETENTION_TIME_SET(x)              (((x) << SLEEP_RETENTION_TIME_LSB) & SLEEP_RETENTION_TIME_MASK)
+#define SLEEP_RETENTION_MODE_MSB                 1
+#define SLEEP_RETENTION_MODE_LSB                 1
+#define SLEEP_RETENTION_MODE_MASK                0x00000002
+#define SLEEP_RETENTION_MODE_GET(x)              (((x) & SLEEP_RETENTION_MODE_MASK) >> SLEEP_RETENTION_MODE_LSB)
+#define SLEEP_RETENTION_MODE_SET(x)              (((x) << SLEEP_RETENTION_MODE_LSB) & SLEEP_RETENTION_MODE_MASK)
+#define SLEEP_RETENTION_ENABLE_MSB               0
+#define SLEEP_RETENTION_ENABLE_LSB               0
+#define SLEEP_RETENTION_ENABLE_MASK              0x00000001
+#define SLEEP_RETENTION_ENABLE_GET(x)            (((x) & SLEEP_RETENTION_ENABLE_MASK) >> SLEEP_RETENTION_ENABLE_LSB)
+#define SLEEP_RETENTION_ENABLE_SET(x)            (((x) << SLEEP_RETENTION_ENABLE_LSB) & SLEEP_RETENTION_ENABLE_MASK)
+
+#define LP_PERF_COUNTER_ADDRESS                  0x00000284
+#define LP_PERF_COUNTER_OFFSET                   0x00000284
+#define LP_PERF_COUNTER_EN_MSB                   0
+#define LP_PERF_COUNTER_EN_LSB                   0
+#define LP_PERF_COUNTER_EN_MASK                  0x00000001
+#define LP_PERF_COUNTER_EN_GET(x)                (((x) & LP_PERF_COUNTER_EN_MASK) >> LP_PERF_COUNTER_EN_LSB)
+#define LP_PERF_COUNTER_EN_SET(x)                (((x) << LP_PERF_COUNTER_EN_LSB) & LP_PERF_COUNTER_EN_MASK)
+
+#define LP_PERF_LIGHT_SLEEP_ADDRESS              0x00000288
+#define LP_PERF_LIGHT_SLEEP_OFFSET               0x00000288
+#define LP_PERF_LIGHT_SLEEP_CNT_MSB              31
+#define LP_PERF_LIGHT_SLEEP_CNT_LSB              0
+#define LP_PERF_LIGHT_SLEEP_CNT_MASK             0xffffffff
+#define LP_PERF_LIGHT_SLEEP_CNT_GET(x)           (((x) & LP_PERF_LIGHT_SLEEP_CNT_MASK) >> LP_PERF_LIGHT_SLEEP_CNT_LSB)
+#define LP_PERF_LIGHT_SLEEP_CNT_SET(x)           (((x) << LP_PERF_LIGHT_SLEEP_CNT_LSB) & LP_PERF_LIGHT_SLEEP_CNT_MASK)
+
+#define LP_PERF_DEEP_SLEEP_ADDRESS               0x0000028c
+#define LP_PERF_DEEP_SLEEP_OFFSET                0x0000028c
+#define LP_PERF_DEEP_SLEEP_CNT_MSB               31
+#define LP_PERF_DEEP_SLEEP_CNT_LSB               0
+#define LP_PERF_DEEP_SLEEP_CNT_MASK              0xffffffff
+#define LP_PERF_DEEP_SLEEP_CNT_GET(x)            (((x) & LP_PERF_DEEP_SLEEP_CNT_MASK) >> LP_PERF_DEEP_SLEEP_CNT_LSB)
+#define LP_PERF_DEEP_SLEEP_CNT_SET(x)            (((x) << LP_PERF_DEEP_SLEEP_CNT_LSB) & LP_PERF_DEEP_SLEEP_CNT_MASK)
+
+#define LP_PERF_ON_ADDRESS                       0x00000290
+#define LP_PERF_ON_OFFSET                        0x00000290
+#define LP_PERF_ON_CNT_MSB                       31
+#define LP_PERF_ON_CNT_LSB                       0
+#define LP_PERF_ON_CNT_MASK                      0xffffffff
+#define LP_PERF_ON_CNT_GET(x)                    (((x) & LP_PERF_ON_CNT_MASK) >> LP_PERF_ON_CNT_LSB)
+#define LP_PERF_ON_CNT_SET(x)                    (((x) << LP_PERF_ON_CNT_LSB) & LP_PERF_ON_CNT_MASK)
+
+#define CHIP_MODE_ADDRESS                        0x000002a8
+#define CHIP_MODE_OFFSET                         0x000002a8
+#define CHIP_MODE_BIT_MSB                        1
+#define CHIP_MODE_BIT_LSB                        0
+#define CHIP_MODE_BIT_MASK                       0x00000003
+#define CHIP_MODE_BIT_GET(x)                     (((x) & CHIP_MODE_BIT_MASK) >> CHIP_MODE_BIT_LSB)
+#define CHIP_MODE_BIT_SET(x)                     (((x) << CHIP_MODE_BIT_LSB) & CHIP_MODE_BIT_MASK)
+
+#define CLK_REQ_FALL_EDGE_ADDRESS                0x000002ac
+#define CLK_REQ_FALL_EDGE_OFFSET                 0x000002ac
+#define CLK_REQ_FALL_EDGE_EN_MSB                 31
+#define CLK_REQ_FALL_EDGE_EN_LSB                 31
+#define CLK_REQ_FALL_EDGE_EN_MASK                0x80000000
+#define CLK_REQ_FALL_EDGE_EN_GET(x)              (((x) & CLK_REQ_FALL_EDGE_EN_MASK) >> CLK_REQ_FALL_EDGE_EN_LSB)
+#define CLK_REQ_FALL_EDGE_EN_SET(x)              (((x) << CLK_REQ_FALL_EDGE_EN_LSB) & CLK_REQ_FALL_EDGE_EN_MASK)
+#define CLK_REQ_FALL_EDGE_DELAY_MSB              7
+#define CLK_REQ_FALL_EDGE_DELAY_LSB              0
+#define CLK_REQ_FALL_EDGE_DELAY_MASK             0x000000ff
+#define CLK_REQ_FALL_EDGE_DELAY_GET(x)           (((x) & CLK_REQ_FALL_EDGE_DELAY_MASK) >> CLK_REQ_FALL_EDGE_DELAY_LSB)
+#define CLK_REQ_FALL_EDGE_DELAY_SET(x)           (((x) << CLK_REQ_FALL_EDGE_DELAY_LSB) & CLK_REQ_FALL_EDGE_DELAY_MASK)
+
+#define OTP_ADDRESS                              0x000002b0
+#define OTP_OFFSET                               0x000002b0
+#define OTP_LDO25_EN_MSB                         1
+#define OTP_LDO25_EN_LSB                         1
+#define OTP_LDO25_EN_MASK                        0x00000002
+#define OTP_LDO25_EN_GET(x)                      (((x) & OTP_LDO25_EN_MASK) >> OTP_LDO25_EN_LSB)
+#define OTP_LDO25_EN_SET(x)                      (((x) << OTP_LDO25_EN_LSB) & OTP_LDO25_EN_MASK)
+#define OTP_VDD12_EN_MSB                         0
+#define OTP_VDD12_EN_LSB                         0
+#define OTP_VDD12_EN_MASK                        0x00000001
+#define OTP_VDD12_EN_GET(x)                      (((x) & OTP_VDD12_EN_MASK) >> OTP_VDD12_EN_LSB)
+#define OTP_VDD12_EN_SET(x)                      (((x) << OTP_VDD12_EN_LSB) & OTP_VDD12_EN_MASK)
+
+#define OTP_STATUS_ADDRESS                       0x000002b4
+#define OTP_STATUS_OFFSET                        0x000002b4
+#define OTP_STATUS_LDO25_EN_READY_MSB            1
+#define OTP_STATUS_LDO25_EN_READY_LSB            1
+#define OTP_STATUS_LDO25_EN_READY_MASK           0x00000002
+#define OTP_STATUS_LDO25_EN_READY_GET(x)         (((x) & OTP_STATUS_LDO25_EN_READY_MASK) >> OTP_STATUS_LDO25_EN_READY_LSB)
+#define OTP_STATUS_LDO25_EN_READY_SET(x)         (((x) << OTP_STATUS_LDO25_EN_READY_LSB) & OTP_STATUS_LDO25_EN_READY_MASK)
+#define OTP_STATUS_VDD12_EN_READY_MSB            0
+#define OTP_STATUS_VDD12_EN_READY_LSB            0
+#define OTP_STATUS_VDD12_EN_READY_MASK           0x00000001
+#define OTP_STATUS_VDD12_EN_READY_GET(x)         (((x) & OTP_STATUS_VDD12_EN_READY_MASK) >> OTP_STATUS_VDD12_EN_READY_LSB)
+#define OTP_STATUS_VDD12_EN_READY_SET(x)         (((x) << OTP_STATUS_VDD12_EN_READY_LSB) & OTP_STATUS_VDD12_EN_READY_MASK)
+
+#define PMU_ADDRESS                              0x000002b8
+#define PMU_OFFSET                               0x000002b8
+#define PMU_REG_WAKEUP_TIME_SEL_MSB              1
+#define PMU_REG_WAKEUP_TIME_SEL_LSB              0
+#define PMU_REG_WAKEUP_TIME_SEL_MASK             0x00000003
+#define PMU_REG_WAKEUP_TIME_SEL_GET(x)           (((x) & PMU_REG_WAKEUP_TIME_SEL_MASK) >> PMU_REG_WAKEUP_TIME_SEL_LSB)
+#define PMU_REG_WAKEUP_TIME_SEL_SET(x)           (((x) << PMU_REG_WAKEUP_TIME_SEL_LSB) & PMU_REG_WAKEUP_TIME_SEL_MASK)
+
+#define PMU_CONFIG_ADDRESS                       0x000002bc
+#define PMU_CONFIG_OFFSET                        0x000002bc
+#define PMU_CONFIG_VALUE_MSB                     4
+#define PMU_CONFIG_VALUE_LSB                     0
+#define PMU_CONFIG_VALUE_MASK                    0x0000001f
+#define PMU_CONFIG_VALUE_GET(x)                  (((x) & PMU_CONFIG_VALUE_MASK) >> PMU_CONFIG_VALUE_LSB)
+#define PMU_CONFIG_VALUE_SET(x)                  (((x) << PMU_CONFIG_VALUE_LSB) & PMU_CONFIG_VALUE_MASK)
+
+#define PMU_PAREG_ADDRESS                        0x000002c0
+#define PMU_PAREG_OFFSET                         0x000002c0
+#define PMU_PAREG_LVL_CTR_MSB                    2
+#define PMU_PAREG_LVL_CTR_LSB                    0
+#define PMU_PAREG_LVL_CTR_MASK                   0x00000007
+#define PMU_PAREG_LVL_CTR_GET(x)                 (((x) & PMU_PAREG_LVL_CTR_MASK) >> PMU_PAREG_LVL_CTR_LSB)
+#define PMU_PAREG_LVL_CTR_SET(x)                 (((x) << PMU_PAREG_LVL_CTR_LSB) & PMU_PAREG_LVL_CTR_MASK)
+
+#define PMU_BYPASS_ADDRESS                       0x000002c4
+#define PMU_BYPASS_OFFSET                        0x000002c4
+#define PMU_BYPASS_SWREG_MSB                     2
+#define PMU_BYPASS_SWREG_LSB                     2
+#define PMU_BYPASS_SWREG_MASK                    0x00000004
+#define PMU_BYPASS_SWREG_GET(x)                  (((x) & PMU_BYPASS_SWREG_MASK) >> PMU_BYPASS_SWREG_LSB)
+#define PMU_BYPASS_SWREG_SET(x)                  (((x) << PMU_BYPASS_SWREG_LSB) & PMU_BYPASS_SWREG_MASK)
+#define PMU_BYPASS_DREG_MSB                      1
+#define PMU_BYPASS_DREG_LSB                      1
+#define PMU_BYPASS_DREG_MASK                     0x00000002
+#define PMU_BYPASS_DREG_GET(x)                   (((x) & PMU_BYPASS_DREG_MASK) >> PMU_BYPASS_DREG_LSB)
+#define PMU_BYPASS_DREG_SET(x)                   (((x) << PMU_BYPASS_DREG_LSB) & PMU_BYPASS_DREG_MASK)
+#define PMU_BYPASS_PAREG_MSB                     0
+#define PMU_BYPASS_PAREG_LSB                     0
+#define PMU_BYPASS_PAREG_MASK                    0x00000001
+#define PMU_BYPASS_PAREG_GET(x)                  (((x) & PMU_BYPASS_PAREG_MASK) >> PMU_BYPASS_PAREG_LSB)
+#define PMU_BYPASS_PAREG_SET(x)                  (((x) << PMU_BYPASS_PAREG_LSB) & PMU_BYPASS_PAREG_MASK)
+
+#define THERM_CTRL1_ADDRESS                      0x000002dc
+#define THERM_CTRL1_OFFSET                       0x000002dc
+#define THERM_CTRL1_BYPASS_MSB                   16
+#define THERM_CTRL1_BYPASS_LSB                   16
+#define THERM_CTRL1_BYPASS_MASK                  0x00010000
+#define THERM_CTRL1_BYPASS_GET(x)                (((x) & THERM_CTRL1_BYPASS_MASK) >> THERM_CTRL1_BYPASS_LSB)
+#define THERM_CTRL1_BYPASS_SET(x)                (((x) << THERM_CTRL1_BYPASS_LSB) & THERM_CTRL1_BYPASS_MASK)
+#define THERM_CTRL1_WIDTH_ARBITOR_MSB            15
+#define THERM_CTRL1_WIDTH_ARBITOR_LSB            12
+#define THERM_CTRL1_WIDTH_ARBITOR_MASK           0x0000f000
+#define THERM_CTRL1_WIDTH_ARBITOR_GET(x)         (((x) & THERM_CTRL1_WIDTH_ARBITOR_MASK) >> THERM_CTRL1_WIDTH_ARBITOR_LSB)
+#define THERM_CTRL1_WIDTH_ARBITOR_SET(x)         (((x) << THERM_CTRL1_WIDTH_ARBITOR_LSB) & THERM_CTRL1_WIDTH_ARBITOR_MASK)
+#define THERM_CTRL1_WIDTH_MSB                    11
+#define THERM_CTRL1_WIDTH_LSB                    5
+#define THERM_CTRL1_WIDTH_MASK                   0x00000fe0
+#define THERM_CTRL1_WIDTH_GET(x)                 (((x) & THERM_CTRL1_WIDTH_MASK) >> THERM_CTRL1_WIDTH_LSB)
+#define THERM_CTRL1_WIDTH_SET(x)                 (((x) << THERM_CTRL1_WIDTH_LSB) & THERM_CTRL1_WIDTH_MASK)
+#define THERM_CTRL1_TYPE_MSB                     4
+#define THERM_CTRL1_TYPE_LSB                     3
+#define THERM_CTRL1_TYPE_MASK                    0x00000018
+#define THERM_CTRL1_TYPE_GET(x)                  (((x) & THERM_CTRL1_TYPE_MASK) >> THERM_CTRL1_TYPE_LSB)
+#define THERM_CTRL1_TYPE_SET(x)                  (((x) << THERM_CTRL1_TYPE_LSB) & THERM_CTRL1_TYPE_MASK)
+#define THERM_CTRL1_MEASURE_MSB                  2
+#define THERM_CTRL1_MEASURE_LSB                  2
+#define THERM_CTRL1_MEASURE_MASK                 0x00000004
+#define THERM_CTRL1_MEASURE_GET(x)               (((x) & THERM_CTRL1_MEASURE_MASK) >> THERM_CTRL1_MEASURE_LSB)
+#define THERM_CTRL1_MEASURE_SET(x)               (((x) << THERM_CTRL1_MEASURE_LSB) & THERM_CTRL1_MEASURE_MASK)
+#define THERM_CTRL1_INT_EN_MSB                   1
+#define THERM_CTRL1_INT_EN_LSB                   1
+#define THERM_CTRL1_INT_EN_MASK                  0x00000002
+#define THERM_CTRL1_INT_EN_GET(x)                (((x) & THERM_CTRL1_INT_EN_MASK) >> THERM_CTRL1_INT_EN_LSB)
+#define THERM_CTRL1_INT_EN_SET(x)                (((x) << THERM_CTRL1_INT_EN_LSB) & THERM_CTRL1_INT_EN_MASK)
+#define THERM_CTRL1_INT_STATUS_MSB               0
+#define THERM_CTRL1_INT_STATUS_LSB               0
+#define THERM_CTRL1_INT_STATUS_MASK              0x00000001
+#define THERM_CTRL1_INT_STATUS_GET(x)            (((x) & THERM_CTRL1_INT_STATUS_MASK) >> THERM_CTRL1_INT_STATUS_LSB)
+#define THERM_CTRL1_INT_STATUS_SET(x)            (((x) << THERM_CTRL1_INT_STATUS_LSB) & THERM_CTRL1_INT_STATUS_MASK)
+
+#define THERM_CTRL2_ADDRESS                      0x000002e0
+#define THERM_CTRL2_OFFSET                       0x000002e0
+#define THERM_CTRL2_ADC_OFF_MSB                  25
+#define THERM_CTRL2_ADC_OFF_LSB                  25
+#define THERM_CTRL2_ADC_OFF_MASK                 0x02000000
+#define THERM_CTRL2_ADC_OFF_GET(x)               (((x) & THERM_CTRL2_ADC_OFF_MASK) >> THERM_CTRL2_ADC_OFF_LSB)
+#define THERM_CTRL2_ADC_OFF_SET(x)               (((x) << THERM_CTRL2_ADC_OFF_LSB) & THERM_CTRL2_ADC_OFF_MASK)
+#define THERM_CTRL2_ADC_ON_MSB                   24
+#define THERM_CTRL2_ADC_ON_LSB                   24
+#define THERM_CTRL2_ADC_ON_MASK                  0x01000000
+#define THERM_CTRL2_ADC_ON_GET(x)                (((x) & THERM_CTRL2_ADC_ON_MASK) >> THERM_CTRL2_ADC_ON_LSB)
+#define THERM_CTRL2_ADC_ON_SET(x)                (((x) << THERM_CTRL2_ADC_ON_LSB) & THERM_CTRL2_ADC_ON_MASK)
+#define THERM_CTRL2_SAMPLE_MSB                   23
+#define THERM_CTRL2_SAMPLE_LSB                   16
+#define THERM_CTRL2_SAMPLE_MASK                  0x00ff0000
+#define THERM_CTRL2_SAMPLE_GET(x)                (((x) & THERM_CTRL2_SAMPLE_MASK) >> THERM_CTRL2_SAMPLE_LSB)
+#define THERM_CTRL2_SAMPLE_SET(x)                (((x) << THERM_CTRL2_SAMPLE_LSB) & THERM_CTRL2_SAMPLE_MASK)
+#define THERM_CTRL2_HIGH_MSB                     15
+#define THERM_CTRL2_HIGH_LSB                     8
+#define THERM_CTRL2_HIGH_MASK                    0x0000ff00
+#define THERM_CTRL2_HIGH_GET(x)                  (((x) & THERM_CTRL2_HIGH_MASK) >> THERM_CTRL2_HIGH_LSB)
+#define THERM_CTRL2_HIGH_SET(x)                  (((x) << THERM_CTRL2_HIGH_LSB) & THERM_CTRL2_HIGH_MASK)
+#define THERM_CTRL2_LOW_MSB                      7
+#define THERM_CTRL2_LOW_LSB                      0
+#define THERM_CTRL2_LOW_MASK                     0x000000ff
+#define THERM_CTRL2_LOW_GET(x)                   (((x) & THERM_CTRL2_LOW_MASK) >> THERM_CTRL2_LOW_LSB)
+#define THERM_CTRL2_LOW_SET(x)                   (((x) << THERM_CTRL2_LOW_LSB) & THERM_CTRL2_LOW_MASK)
+
+#define THERM_CTRL3_ADDRESS                      0x000002e4
+#define THERM_CTRL3_OFFSET                       0x000002e4
+#define THERM_CTRL3_ADC_GAIN_MSB                 16
+#define THERM_CTRL3_ADC_GAIN_LSB                 8
+#define THERM_CTRL3_ADC_GAIN_MASK                0x0001ff00
+#define THERM_CTRL3_ADC_GAIN_GET(x)              (((x) & THERM_CTRL3_ADC_GAIN_MASK) >> THERM_CTRL3_ADC_GAIN_LSB)
+#define THERM_CTRL3_ADC_GAIN_SET(x)              (((x) << THERM_CTRL3_ADC_GAIN_LSB) & THERM_CTRL3_ADC_GAIN_MASK)
+#define THERM_CTRL3_ADC_OFFSET_MSB               7
+#define THERM_CTRL3_ADC_OFFSET_LSB               0
+#define THERM_CTRL3_ADC_OFFSET_MASK              0x000000ff
+#define THERM_CTRL3_ADC_OFFSET_GET(x)            (((x) & THERM_CTRL3_ADC_OFFSET_MASK) >> THERM_CTRL3_ADC_OFFSET_LSB)
+#define THERM_CTRL3_ADC_OFFSET_SET(x)            (((x) << THERM_CTRL3_ADC_OFFSET_LSB) & THERM_CTRL3_ADC_OFFSET_MASK)
+
+#define LISTEN_MODE1_ADDRESS                     0x000002e8
+#define LISTEN_MODE1_OFFSET                      0x000002e8
+#define LISTEN_MODE1_TIMER_CLEAR_MSB             19
+#define LISTEN_MODE1_TIMER_CLEAR_LSB             19
+#define LISTEN_MODE1_TIMER_CLEAR_MASK            0x00080000
+#define LISTEN_MODE1_TIMER_CLEAR_GET(x)          (((x) & LISTEN_MODE1_TIMER_CLEAR_MASK) >> LISTEN_MODE1_TIMER_CLEAR_LSB)
+#define LISTEN_MODE1_TIMER_CLEAR_SET(x)          (((x) << LISTEN_MODE1_TIMER_CLEAR_LSB) & LISTEN_MODE1_TIMER_CLEAR_MASK)
+#define LISTEN_MODE1_TIMER_THRESH_WAKE_MSB       18
+#define LISTEN_MODE1_TIMER_THRESH_WAKE_LSB       3
+#define LISTEN_MODE1_TIMER_THRESH_WAKE_MASK      0x0007fff8
+#define LISTEN_MODE1_TIMER_THRESH_WAKE_GET(x)    (((x) & LISTEN_MODE1_TIMER_THRESH_WAKE_MASK) >> LISTEN_MODE1_TIMER_THRESH_WAKE_LSB)
+#define LISTEN_MODE1_TIMER_THRESH_WAKE_SET(x)    (((x) << LISTEN_MODE1_TIMER_THRESH_WAKE_LSB) & LISTEN_MODE1_TIMER_THRESH_WAKE_MASK)
+#define LISTEN_MODE1_TIMER_OVERFLOW_WAKE_MSB     2
+#define LISTEN_MODE1_TIMER_OVERFLOW_WAKE_LSB     2
+#define LISTEN_MODE1_TIMER_OVERFLOW_WAKE_MASK    0x00000004
+#define LISTEN_MODE1_TIMER_OVERFLOW_WAKE_GET(x)  (((x) & LISTEN_MODE1_TIMER_OVERFLOW_WAKE_MASK) >> LISTEN_MODE1_TIMER_OVERFLOW_WAKE_LSB)
+#define LISTEN_MODE1_TIMER_OVERFLOW_WAKE_SET(x)  (((x) << LISTEN_MODE1_TIMER_OVERFLOW_WAKE_LSB) & LISTEN_MODE1_TIMER_OVERFLOW_WAKE_MASK)
+#define LISTEN_MODE1_CLOCK_GATE_MSB              1
+#define LISTEN_MODE1_CLOCK_GATE_LSB              1
+#define LISTEN_MODE1_CLOCK_GATE_MASK             0x00000002
+#define LISTEN_MODE1_CLOCK_GATE_GET(x)           (((x) & LISTEN_MODE1_CLOCK_GATE_MASK) >> LISTEN_MODE1_CLOCK_GATE_LSB)
+#define LISTEN_MODE1_CLOCK_GATE_SET(x)           (((x) << LISTEN_MODE1_CLOCK_GATE_LSB) & LISTEN_MODE1_CLOCK_GATE_MASK)
+#define LISTEN_MODE1_ENABLE_MSB                  0
+#define LISTEN_MODE1_ENABLE_LSB                  0
+#define LISTEN_MODE1_ENABLE_MASK                 0x00000001
+#define LISTEN_MODE1_ENABLE_GET(x)               (((x) & LISTEN_MODE1_ENABLE_MASK) >> LISTEN_MODE1_ENABLE_LSB)
+#define LISTEN_MODE1_ENABLE_SET(x)               (((x) << LISTEN_MODE1_ENABLE_LSB) & LISTEN_MODE1_ENABLE_MASK)
+
+#define LISTEN_MODE2_ADDRESS                     0x000002ec
+#define LISTEN_MODE2_OFFSET                      0x000002ec
+#define LISTEN_MODE2_TIMER_TRIGGER_WAKE_MSB      15
+#define LISTEN_MODE2_TIMER_TRIGGER_WAKE_LSB      0
+#define LISTEN_MODE2_TIMER_TRIGGER_WAKE_MASK     0x0000ffff
+#define LISTEN_MODE2_TIMER_TRIGGER_WAKE_GET(x)   (((x) & LISTEN_MODE2_TIMER_TRIGGER_WAKE_MASK) >> LISTEN_MODE2_TIMER_TRIGGER_WAKE_LSB)
+#define LISTEN_MODE2_TIMER_TRIGGER_WAKE_SET(x)   (((x) << LISTEN_MODE2_TIMER_TRIGGER_WAKE_LSB) & LISTEN_MODE2_TIMER_TRIGGER_WAKE_MASK)
+
+#define AUDIO_PLL_CONFIG_ADDRESS                 0x000002f0
+#define AUDIO_PLL_CONFIG_OFFSET                  0x000002f0
+#define AUDIO_PLL_CONFIG_UPDATING_MSB            31
+#define AUDIO_PLL_CONFIG_UPDATING_LSB            31
+#define AUDIO_PLL_CONFIG_UPDATING_MASK           0x80000000
+#define AUDIO_PLL_CONFIG_UPDATING_GET(x)         (((x) & AUDIO_PLL_CONFIG_UPDATING_MASK) >> AUDIO_PLL_CONFIG_UPDATING_LSB)
+#define AUDIO_PLL_CONFIG_UPDATING_SET(x)         (((x) << AUDIO_PLL_CONFIG_UPDATING_LSB) & AUDIO_PLL_CONFIG_UPDATING_MASK)
+#define AUDIO_PLL_CONFIG_EXT_DIV_MSB             14
+#define AUDIO_PLL_CONFIG_EXT_DIV_LSB             12
+#define AUDIO_PLL_CONFIG_EXT_DIV_MASK            0x00007000
+#define AUDIO_PLL_CONFIG_EXT_DIV_GET(x)          (((x) & AUDIO_PLL_CONFIG_EXT_DIV_MASK) >> AUDIO_PLL_CONFIG_EXT_DIV_LSB)
+#define AUDIO_PLL_CONFIG_EXT_DIV_SET(x)          (((x) << AUDIO_PLL_CONFIG_EXT_DIV_LSB) & AUDIO_PLL_CONFIG_EXT_DIV_MASK)
+#define AUDIO_PLL_CONFIG_POSTPLLDIV_MSB          9
+#define AUDIO_PLL_CONFIG_POSTPLLDIV_LSB          7
+#define AUDIO_PLL_CONFIG_POSTPLLDIV_MASK         0x00000380
+#define AUDIO_PLL_CONFIG_POSTPLLDIV_GET(x)       (((x) & AUDIO_PLL_CONFIG_POSTPLLDIV_MASK) >> AUDIO_PLL_CONFIG_POSTPLLDIV_LSB)
+#define AUDIO_PLL_CONFIG_POSTPLLDIV_SET(x)       (((x) << AUDIO_PLL_CONFIG_POSTPLLDIV_LSB) & AUDIO_PLL_CONFIG_POSTPLLDIV_MASK)
+#define AUDIO_PLL_CONFIG_PLLPWD_MSB              5
+#define AUDIO_PLL_CONFIG_PLLPWD_LSB              5
+#define AUDIO_PLL_CONFIG_PLLPWD_MASK             0x00000020
+#define AUDIO_PLL_CONFIG_PLLPWD_GET(x)           (((x) & AUDIO_PLL_CONFIG_PLLPWD_MASK) >> AUDIO_PLL_CONFIG_PLLPWD_LSB)
+#define AUDIO_PLL_CONFIG_PLLPWD_SET(x)           (((x) << AUDIO_PLL_CONFIG_PLLPWD_LSB) & AUDIO_PLL_CONFIG_PLLPWD_MASK)
+#define AUDIO_PLL_CONFIG_BYPASS_MSB              4
+#define AUDIO_PLL_CONFIG_BYPASS_LSB              4
+#define AUDIO_PLL_CONFIG_BYPASS_MASK             0x00000010
+#define AUDIO_PLL_CONFIG_BYPASS_GET(x)           (((x) & AUDIO_PLL_CONFIG_BYPASS_MASK) >> AUDIO_PLL_CONFIG_BYPASS_LSB)
+#define AUDIO_PLL_CONFIG_BYPASS_SET(x)           (((x) << AUDIO_PLL_CONFIG_BYPASS_LSB) & AUDIO_PLL_CONFIG_BYPASS_MASK)
+#define AUDIO_PLL_CONFIG_REFDIV_MSB              3
+#define AUDIO_PLL_CONFIG_REFDIV_LSB              0
+#define AUDIO_PLL_CONFIG_REFDIV_MASK             0x0000000f
+#define AUDIO_PLL_CONFIG_REFDIV_GET(x)           (((x) & AUDIO_PLL_CONFIG_REFDIV_MASK) >> AUDIO_PLL_CONFIG_REFDIV_LSB)
+#define AUDIO_PLL_CONFIG_REFDIV_SET(x)           (((x) << AUDIO_PLL_CONFIG_REFDIV_LSB) & AUDIO_PLL_CONFIG_REFDIV_MASK)
+
+#define AUDIO_PLL_MODULATION_ADDRESS             0x000002f4
+#define AUDIO_PLL_MODULATION_OFFSET              0x000002f4
+#define AUDIO_PLL_MODULATION_TGT_DIV_FRAC_MSB    28
+#define AUDIO_PLL_MODULATION_TGT_DIV_FRAC_LSB    11
+#define AUDIO_PLL_MODULATION_TGT_DIV_FRAC_MASK   0x1ffff800
+#define AUDIO_PLL_MODULATION_TGT_DIV_FRAC_GET(x) (((x) & AUDIO_PLL_MODULATION_TGT_DIV_FRAC_MASK) >> AUDIO_PLL_MODULATION_TGT_DIV_FRAC_LSB)
+#define AUDIO_PLL_MODULATION_TGT_DIV_FRAC_SET(x) (((x) << AUDIO_PLL_MODULATION_TGT_DIV_FRAC_LSB) & AUDIO_PLL_MODULATION_TGT_DIV_FRAC_MASK)
+#define AUDIO_PLL_MODULATION_TGT_DIV_INT_MSB     6
+#define AUDIO_PLL_MODULATION_TGT_DIV_INT_LSB     1
+#define AUDIO_PLL_MODULATION_TGT_DIV_INT_MASK    0x0000007e
+#define AUDIO_PLL_MODULATION_TGT_DIV_INT_GET(x)  (((x) & AUDIO_PLL_MODULATION_TGT_DIV_INT_MASK) >> AUDIO_PLL_MODULATION_TGT_DIV_INT_LSB)
+#define AUDIO_PLL_MODULATION_TGT_DIV_INT_SET(x)  (((x) << AUDIO_PLL_MODULATION_TGT_DIV_INT_LSB) & AUDIO_PLL_MODULATION_TGT_DIV_INT_MASK)
+#define AUDIO_PLL_MODULATION_START_MSB           0
+#define AUDIO_PLL_MODULATION_START_LSB           0
+#define AUDIO_PLL_MODULATION_START_MASK          0x00000001
+#define AUDIO_PLL_MODULATION_START_GET(x)        (((x) & AUDIO_PLL_MODULATION_START_MASK) >> AUDIO_PLL_MODULATION_START_LSB)
+#define AUDIO_PLL_MODULATION_START_SET(x)        (((x) << AUDIO_PLL_MODULATION_START_LSB) & AUDIO_PLL_MODULATION_START_MASK)
+
+#define AUDIO_PLL_MOD_STEP_ADDRESS               0x000002f8
+#define AUDIO_PLL_MOD_STEP_OFFSET                0x000002f8
+#define AUDIO_PLL_MOD_STEP_FRAC_MSB              31
+#define AUDIO_PLL_MOD_STEP_FRAC_LSB              14
+#define AUDIO_PLL_MOD_STEP_FRAC_MASK             0xffffc000
+#define AUDIO_PLL_MOD_STEP_FRAC_GET(x)           (((x) & AUDIO_PLL_MOD_STEP_FRAC_MASK) >> AUDIO_PLL_MOD_STEP_FRAC_LSB)
+#define AUDIO_PLL_MOD_STEP_FRAC_SET(x)           (((x) << AUDIO_PLL_MOD_STEP_FRAC_LSB) & AUDIO_PLL_MOD_STEP_FRAC_MASK)
+#define AUDIO_PLL_MOD_STEP_INT_MSB               13
+#define AUDIO_PLL_MOD_STEP_INT_LSB               4
+#define AUDIO_PLL_MOD_STEP_INT_MASK              0x00003ff0
+#define AUDIO_PLL_MOD_STEP_INT_GET(x)            (((x) & AUDIO_PLL_MOD_STEP_INT_MASK) >> AUDIO_PLL_MOD_STEP_INT_LSB)
+#define AUDIO_PLL_MOD_STEP_INT_SET(x)            (((x) << AUDIO_PLL_MOD_STEP_INT_LSB) & AUDIO_PLL_MOD_STEP_INT_MASK)
+#define AUDIO_PLL_MOD_STEP_UPDATE_CNT_MSB        3
+#define AUDIO_PLL_MOD_STEP_UPDATE_CNT_LSB        0
+#define AUDIO_PLL_MOD_STEP_UPDATE_CNT_MASK       0x0000000f
+#define AUDIO_PLL_MOD_STEP_UPDATE_CNT_GET(x)     (((x) & AUDIO_PLL_MOD_STEP_UPDATE_CNT_MASK) >> AUDIO_PLL_MOD_STEP_UPDATE_CNT_LSB)
+#define AUDIO_PLL_MOD_STEP_UPDATE_CNT_SET(x)     (((x) << AUDIO_PLL_MOD_STEP_UPDATE_CNT_LSB) & AUDIO_PLL_MOD_STEP_UPDATE_CNT_MASK)
+
+#define CURRENT_AUDIO_PLL_MODULATION_ADDRESS     0x000002fc
+#define CURRENT_AUDIO_PLL_MODULATION_OFFSET      0x000002fc
+#define CURRENT_AUDIO_PLL_MODULATION_FRAC_MSB    27
+#define CURRENT_AUDIO_PLL_MODULATION_FRAC_LSB    10
+#define CURRENT_AUDIO_PLL_MODULATION_FRAC_MASK   0x0ffffc00
+#define CURRENT_AUDIO_PLL_MODULATION_FRAC_GET(x) (((x) & CURRENT_AUDIO_PLL_MODULATION_FRAC_MASK) >> CURRENT_AUDIO_PLL_MODULATION_FRAC_LSB)
+#define CURRENT_AUDIO_PLL_MODULATION_FRAC_SET(x) (((x) << CURRENT_AUDIO_PLL_MODULATION_FRAC_LSB) & CURRENT_AUDIO_PLL_MODULATION_FRAC_MASK)
+#define CURRENT_AUDIO_PLL_MODULATION_INT_MSB     6
+#define CURRENT_AUDIO_PLL_MODULATION_INT_LSB     1
+#define CURRENT_AUDIO_PLL_MODULATION_INT_MASK    0x0000007e
+#define CURRENT_AUDIO_PLL_MODULATION_INT_GET(x)  (((x) & CURRENT_AUDIO_PLL_MODULATION_INT_MASK) >> CURRENT_AUDIO_PLL_MODULATION_INT_LSB)
+#define CURRENT_AUDIO_PLL_MODULATION_INT_SET(x)  (((x) << CURRENT_AUDIO_PLL_MODULATION_INT_LSB) & CURRENT_AUDIO_PLL_MODULATION_INT_MASK)
+
+#define ETH_PLL_CONFIG_ADDRESS                   0x00000300
+#define ETH_PLL_CONFIG_OFFSET                    0x00000300
+#define ETH_PLL_CONFIG_GE0_MASTER_MSB            30
+#define ETH_PLL_CONFIG_GE0_MASTER_LSB            30
+#define ETH_PLL_CONFIG_GE0_MASTER_MASK           0x40000000
+#define ETH_PLL_CONFIG_GE0_MASTER_GET(x)         (((x) & ETH_PLL_CONFIG_GE0_MASTER_MASK) >> ETH_PLL_CONFIG_GE0_MASTER_LSB)
+#define ETH_PLL_CONFIG_GE0_MASTER_SET(x)         (((x) << ETH_PLL_CONFIG_GE0_MASTER_LSB) & ETH_PLL_CONFIG_GE0_MASTER_MASK)
+#define ETH_PLL_CONFIG_GE0_MSB                   29
+#define ETH_PLL_CONFIG_GE0_LSB                   29
+#define ETH_PLL_CONFIG_GE0_MASK                  0x20000000
+#define ETH_PLL_CONFIG_GE0_GET(x)                (((x) & ETH_PLL_CONFIG_GE0_MASK) >> ETH_PLL_CONFIG_GE0_LSB)
+#define ETH_PLL_CONFIG_GE0_SET(x)                (((x) << ETH_PLL_CONFIG_GE0_LSB) & ETH_PLL_CONFIG_GE0_MASK)
+#define ETH_PLL_CONFIG_RANGE_MSB                 28
+#define ETH_PLL_CONFIG_RANGE_LSB                 28
+#define ETH_PLL_CONFIG_RANGE_MASK                0x10000000
+#define ETH_PLL_CONFIG_RANGE_GET(x)              (((x) & ETH_PLL_CONFIG_RANGE_MASK) >> ETH_PLL_CONFIG_RANGE_LSB)
+#define ETH_PLL_CONFIG_RANGE_SET(x)              (((x) << ETH_PLL_CONFIG_RANGE_LSB) & ETH_PLL_CONFIG_RANGE_MASK)
+#define ETH_PLL_CONFIG_FRAC_MSB                  27
+#define ETH_PLL_CONFIG_FRAC_LSB                  18
+#define ETH_PLL_CONFIG_FRAC_MASK                 0x0ffc0000
+#define ETH_PLL_CONFIG_FRAC_GET(x)               (((x) & ETH_PLL_CONFIG_FRAC_MASK) >> ETH_PLL_CONFIG_FRAC_LSB)
+#define ETH_PLL_CONFIG_FRAC_SET(x)               (((x) << ETH_PLL_CONFIG_FRAC_LSB) & ETH_PLL_CONFIG_FRAC_MASK)
+#define ETH_PLL_CONFIG_INT_MSB                   17
+#define ETH_PLL_CONFIG_INT_LSB                   12
+#define ETH_PLL_CONFIG_INT_MASK                  0x0003f000
+#define ETH_PLL_CONFIG_INT_GET(x)                (((x) & ETH_PLL_CONFIG_INT_MASK) >> ETH_PLL_CONFIG_INT_LSB)
+#define ETH_PLL_CONFIG_INT_SET(x)                (((x) << ETH_PLL_CONFIG_INT_LSB) & ETH_PLL_CONFIG_INT_MASK)
+#define ETH_PLL_CONFIG_OUTDIV_MSB                9
+#define ETH_PLL_CONFIG_OUTDIV_LSB                7
+#define ETH_PLL_CONFIG_OUTDIV_MASK               0x00000380
+#define ETH_PLL_CONFIG_OUTDIV_GET(x)             (((x) & ETH_PLL_CONFIG_OUTDIV_MASK) >> ETH_PLL_CONFIG_OUTDIV_LSB)
+#define ETH_PLL_CONFIG_OUTDIV_SET(x)             (((x) << ETH_PLL_CONFIG_OUTDIV_LSB) & ETH_PLL_CONFIG_OUTDIV_MASK)
+#define ETH_PLL_CONFIG_PLLPWD_MSB                6
+#define ETH_PLL_CONFIG_PLLPWD_LSB                6
+#define ETH_PLL_CONFIG_PLLPWD_MASK               0x00000040
+#define ETH_PLL_CONFIG_PLLPWD_GET(x)             (((x) & ETH_PLL_CONFIG_PLLPWD_MASK) >> ETH_PLL_CONFIG_PLLPWD_LSB)
+#define ETH_PLL_CONFIG_PLLPWD_SET(x)             (((x) << ETH_PLL_CONFIG_PLLPWD_LSB) & ETH_PLL_CONFIG_PLLPWD_MASK)
+#define ETH_PLL_CONFIG_BYPASS_MSB                5
+#define ETH_PLL_CONFIG_BYPASS_LSB                5
+#define ETH_PLL_CONFIG_BYPASS_MASK               0x00000020
+#define ETH_PLL_CONFIG_BYPASS_GET(x)             (((x) & ETH_PLL_CONFIG_BYPASS_MASK) >> ETH_PLL_CONFIG_BYPASS_LSB)
+#define ETH_PLL_CONFIG_BYPASS_SET(x)             (((x) << ETH_PLL_CONFIG_BYPASS_LSB) & ETH_PLL_CONFIG_BYPASS_MASK)
+#define ETH_PLL_CONFIG_REFDIV_MSB                4
+#define ETH_PLL_CONFIG_REFDIV_LSB                0
+#define ETH_PLL_CONFIG_REFDIV_MASK               0x0000001f
+#define ETH_PLL_CONFIG_REFDIV_GET(x)             (((x) & ETH_PLL_CONFIG_REFDIV_MASK) >> ETH_PLL_CONFIG_REFDIV_LSB)
+#define ETH_PLL_CONFIG_REFDIV_SET(x)             (((x) << ETH_PLL_CONFIG_REFDIV_LSB) & ETH_PLL_CONFIG_REFDIV_MASK)
+
+#define CPU_PLL_CONFIG_ADDRESS                   0x00000304
+#define CPU_PLL_CONFIG_OFFSET                    0x00000304
+#define CPU_PLL_CONFIG_RANGE_MSB                 28
+#define CPU_PLL_CONFIG_RANGE_LSB                 28
+#define CPU_PLL_CONFIG_RANGE_MASK                0x10000000
+#define CPU_PLL_CONFIG_RANGE_GET(x)              (((x) & CPU_PLL_CONFIG_RANGE_MASK) >> CPU_PLL_CONFIG_RANGE_LSB)
+#define CPU_PLL_CONFIG_RANGE_SET(x)              (((x) << CPU_PLL_CONFIG_RANGE_LSB) & CPU_PLL_CONFIG_RANGE_MASK)
+#define CPU_PLL_CONFIG_FRAC_MSB                  25
+#define CPU_PLL_CONFIG_FRAC_LSB                  20
+#define CPU_PLL_CONFIG_FRAC_MASK                 0x03f00000
+#define CPU_PLL_CONFIG_FRAC_GET(x)               (((x) & CPU_PLL_CONFIG_FRAC_MASK) >> CPU_PLL_CONFIG_FRAC_LSB)
+#define CPU_PLL_CONFIG_FRAC_SET(x)               (((x) << CPU_PLL_CONFIG_FRAC_LSB) & CPU_PLL_CONFIG_FRAC_MASK)
+#define CPU_PLL_CONFIG_INT_MSB                   17
+#define CPU_PLL_CONFIG_INT_LSB                   12
+#define CPU_PLL_CONFIG_INT_MASK                  0x0003f000
+#define CPU_PLL_CONFIG_INT_GET(x)                (((x) & CPU_PLL_CONFIG_INT_MASK) >> CPU_PLL_CONFIG_INT_LSB)
+#define CPU_PLL_CONFIG_INT_SET(x)                (((x) << CPU_PLL_CONFIG_INT_LSB) & CPU_PLL_CONFIG_INT_MASK)
+#define CPU_PLL_CONFIG_OUTDIV_MSB                9
+#define CPU_PLL_CONFIG_OUTDIV_LSB                7
+#define CPU_PLL_CONFIG_OUTDIV_MASK               0x00000380
+#define CPU_PLL_CONFIG_OUTDIV_GET(x)             (((x) & CPU_PLL_CONFIG_OUTDIV_MASK) >> CPU_PLL_CONFIG_OUTDIV_LSB)
+#define CPU_PLL_CONFIG_OUTDIV_SET(x)             (((x) << CPU_PLL_CONFIG_OUTDIV_LSB) & CPU_PLL_CONFIG_OUTDIV_MASK)
+#define CPU_PLL_CONFIG_PLLPWD_MSB                6
+#define CPU_PLL_CONFIG_PLLPWD_LSB                6
+#define CPU_PLL_CONFIG_PLLPWD_MASK               0x00000040
+#define CPU_PLL_CONFIG_PLLPWD_GET(x)             (((x) & CPU_PLL_CONFIG_PLLPWD_MASK) >> CPU_PLL_CONFIG_PLLPWD_LSB)
+#define CPU_PLL_CONFIG_PLLPWD_SET(x)             (((x) << CPU_PLL_CONFIG_PLLPWD_LSB) & CPU_PLL_CONFIG_PLLPWD_MASK)
+#define CPU_PLL_CONFIG_REFDIV_MSB                4
+#define CPU_PLL_CONFIG_REFDIV_LSB                0
+#define CPU_PLL_CONFIG_REFDIV_MASK               0x0000001f
+#define CPU_PLL_CONFIG_REFDIV_GET(x)             (((x) & CPU_PLL_CONFIG_REFDIV_MASK) >> CPU_PLL_CONFIG_REFDIV_LSB)
+#define CPU_PLL_CONFIG_REFDIV_SET(x)             (((x) << CPU_PLL_CONFIG_REFDIV_LSB) & CPU_PLL_CONFIG_REFDIV_MASK)
+
+#define BB_PLL_CONFIG_ADDRESS                    0x00000308
+#define BB_PLL_CONFIG_OFFSET                     0x00000308
+#define BB_PLL_CONFIG_FRAC_MSB                   17
+#define BB_PLL_CONFIG_FRAC_LSB                   0
+#define BB_PLL_CONFIG_FRAC_MASK                  0x0003ffff
+#define BB_PLL_CONFIG_FRAC_GET(x)                (((x) & BB_PLL_CONFIG_FRAC_MASK) >> BB_PLL_CONFIG_FRAC_LSB)
+#define BB_PLL_CONFIG_FRAC_SET(x)                (((x) << BB_PLL_CONFIG_FRAC_LSB) & BB_PLL_CONFIG_FRAC_MASK)
+
+#define ETH_XMII_ADDRESS                         0x0000030c
+#define ETH_XMII_OFFSET                          0x0000030c
+#define ETH_XMII_TX_INVERT_MSB                   31
+#define ETH_XMII_TX_INVERT_LSB                   31
+#define ETH_XMII_TX_INVERT_MASK                  0x80000000
+#define ETH_XMII_TX_INVERT_GET(x)                (((x) & ETH_XMII_TX_INVERT_MASK) >> ETH_XMII_TX_INVERT_LSB)
+#define ETH_XMII_TX_INVERT_SET(x)                (((x) << ETH_XMII_TX_INVERT_LSB) & ETH_XMII_TX_INVERT_MASK)
+#define ETH_XMII_GIGE_QUAD_MSB                   30
+#define ETH_XMII_GIGE_QUAD_LSB                   30
+#define ETH_XMII_GIGE_QUAD_MASK                  0x40000000
+#define ETH_XMII_GIGE_QUAD_GET(x)                (((x) & ETH_XMII_GIGE_QUAD_MASK) >> ETH_XMII_GIGE_QUAD_LSB)
+#define ETH_XMII_GIGE_QUAD_SET(x)                (((x) << ETH_XMII_GIGE_QUAD_LSB) & ETH_XMII_GIGE_QUAD_MASK)
+#define ETH_XMII_RX_DELAY_MSB                    29
+#define ETH_XMII_RX_DELAY_LSB                    28
+#define ETH_XMII_RX_DELAY_MASK                   0x30000000
+#define ETH_XMII_RX_DELAY_GET(x)                 (((x) & ETH_XMII_RX_DELAY_MASK) >> ETH_XMII_RX_DELAY_LSB)
+#define ETH_XMII_RX_DELAY_SET(x)                 (((x) << ETH_XMII_RX_DELAY_LSB) & ETH_XMII_RX_DELAY_MASK)
+#define ETH_XMII_TX_DELAY_MSB                    27
+#define ETH_XMII_TX_DELAY_LSB                    26
+#define ETH_XMII_TX_DELAY_MASK                   0x0c000000
+#define ETH_XMII_TX_DELAY_GET(x)                 (((x) & ETH_XMII_TX_DELAY_MASK) >> ETH_XMII_TX_DELAY_LSB)
+#define ETH_XMII_TX_DELAY_SET(x)                 (((x) << ETH_XMII_TX_DELAY_LSB) & ETH_XMII_TX_DELAY_MASK)
+#define ETH_XMII_GIGE_MSB                        25
+#define ETH_XMII_GIGE_LSB                        25
+#define ETH_XMII_GIGE_MASK                       0x02000000
+#define ETH_XMII_GIGE_GET(x)                     (((x) & ETH_XMII_GIGE_MASK) >> ETH_XMII_GIGE_LSB)
+#define ETH_XMII_GIGE_SET(x)                     (((x) << ETH_XMII_GIGE_LSB) & ETH_XMII_GIGE_MASK)
+#define ETH_XMII_OFFSET_PHASE_MSB                24
+#define ETH_XMII_OFFSET_PHASE_LSB                24
+#define ETH_XMII_OFFSET_PHASE_MASK               0x01000000
+#define ETH_XMII_OFFSET_PHASE_GET(x)             (((x) & ETH_XMII_OFFSET_PHASE_MASK) >> ETH_XMII_OFFSET_PHASE_LSB)
+#define ETH_XMII_OFFSET_PHASE_SET(x)             (((x) << ETH_XMII_OFFSET_PHASE_LSB) & ETH_XMII_OFFSET_PHASE_MASK)
+#define ETH_XMII_OFFSET_COUNT_MSB                23
+#define ETH_XMII_OFFSET_COUNT_LSB                16
+#define ETH_XMII_OFFSET_COUNT_MASK               0x00ff0000
+#define ETH_XMII_OFFSET_COUNT_GET(x)             (((x) & ETH_XMII_OFFSET_COUNT_MASK) >> ETH_XMII_OFFSET_COUNT_LSB)
+#define ETH_XMII_OFFSET_COUNT_SET(x)             (((x) << ETH_XMII_OFFSET_COUNT_LSB) & ETH_XMII_OFFSET_COUNT_MASK)
+#define ETH_XMII_PHASE1_COUNT_MSB                15
+#define ETH_XMII_PHASE1_COUNT_LSB                8
+#define ETH_XMII_PHASE1_COUNT_MASK               0x0000ff00
+#define ETH_XMII_PHASE1_COUNT_GET(x)             (((x) & ETH_XMII_PHASE1_COUNT_MASK) >> ETH_XMII_PHASE1_COUNT_LSB)
+#define ETH_XMII_PHASE1_COUNT_SET(x)             (((x) << ETH_XMII_PHASE1_COUNT_LSB) & ETH_XMII_PHASE1_COUNT_MASK)
+#define ETH_XMII_PHASE0_COUNT_MSB                7
+#define ETH_XMII_PHASE0_COUNT_LSB                0
+#define ETH_XMII_PHASE0_COUNT_MASK               0x000000ff
+#define ETH_XMII_PHASE0_COUNT_GET(x)             (((x) & ETH_XMII_PHASE0_COUNT_MASK) >> ETH_XMII_PHASE0_COUNT_LSB)
+#define ETH_XMII_PHASE0_COUNT_SET(x)             (((x) << ETH_XMII_PHASE0_COUNT_LSB) & ETH_XMII_PHASE0_COUNT_MASK)
+
+#define USB_PHY_CONFIG_ADDRESS                   0x00000310
+#define USB_PHY_CONFIG_OFFSET                    0x00000310
+#define USB_PHY_CONFIG_REFCLK_SEL_MSB            7
+#define USB_PHY_CONFIG_REFCLK_SEL_LSB            4
+#define USB_PHY_CONFIG_REFCLK_SEL_MASK           0x000000f0
+#define USB_PHY_CONFIG_REFCLK_SEL_GET(x)         (((x) & USB_PHY_CONFIG_REFCLK_SEL_MASK) >> USB_PHY_CONFIG_REFCLK_SEL_LSB)
+#define USB_PHY_CONFIG_REFCLK_SEL_SET(x)         (((x) << USB_PHY_CONFIG_REFCLK_SEL_LSB) & USB_PHY_CONFIG_REFCLK_SEL_MASK)
+#define USB_PHY_CONFIG_REFDIV_MSB                3
+#define USB_PHY_CONFIG_REFDIV_LSB                3
+#define USB_PHY_CONFIG_REFDIV_MASK               0x00000008
+#define USB_PHY_CONFIG_REFDIV_GET(x)             (((x) & USB_PHY_CONFIG_REFDIV_MASK) >> USB_PHY_CONFIG_REFDIV_LSB)
+#define USB_PHY_CONFIG_REFDIV_SET(x)             (((x) << USB_PHY_CONFIG_REFDIV_LSB) & USB_PHY_CONFIG_REFDIV_MASK)
+#define USB_PHY_CONFIG_TESTMODE_MSB              2
+#define USB_PHY_CONFIG_TESTMODE_LSB              2
+#define USB_PHY_CONFIG_TESTMODE_MASK             0x00000004
+#define USB_PHY_CONFIG_TESTMODE_GET(x)           (((x) & USB_PHY_CONFIG_TESTMODE_MASK) >> USB_PHY_CONFIG_TESTMODE_LSB)
+#define USB_PHY_CONFIG_TESTMODE_SET(x)           (((x) << USB_PHY_CONFIG_TESTMODE_LSB) & USB_PHY_CONFIG_TESTMODE_MASK)
+#define USB_PHY_CONFIG_PLL_PWD_MSB               1
+#define USB_PHY_CONFIG_PLL_PWD_LSB               1
+#define USB_PHY_CONFIG_PLL_PWD_MASK              0x00000002
+#define USB_PHY_CONFIG_PLL_PWD_GET(x)            (((x) & USB_PHY_CONFIG_PLL_PWD_MASK) >> USB_PHY_CONFIG_PLL_PWD_LSB)
+#define USB_PHY_CONFIG_PLL_PWD_SET(x)            (((x) << USB_PHY_CONFIG_PLL_PWD_LSB) & USB_PHY_CONFIG_PLL_PWD_MASK)
+#define USB_PHY_CONFIG_HOSTMODE_MSB              0
+#define USB_PHY_CONFIG_HOSTMODE_LSB              0
+#define USB_PHY_CONFIG_HOSTMODE_MASK             0x00000001
+#define USB_PHY_CONFIG_HOSTMODE_GET(x)           (((x) & USB_PHY_CONFIG_HOSTMODE_MASK) >> USB_PHY_CONFIG_HOSTMODE_LSB)
+#define USB_PHY_CONFIG_HOSTMODE_SET(x)           (((x) << USB_PHY_CONFIG_HOSTMODE_LSB) & USB_PHY_CONFIG_HOSTMODE_MASK)
+
+#define USBCORE_CLK60M_ADDRESS                   0x00000314
+#define USBCORE_CLK60M_OFFSET                    0x00000314
+#define USBCORE_CLK60M_SEL_MSB                   0
+#define USBCORE_CLK60M_SEL_LSB                   0
+#define USBCORE_CLK60M_SEL_MASK                  0x00000001
+#define USBCORE_CLK60M_SEL_GET(x)                (((x) & USBCORE_CLK60M_SEL_MASK) >> USBCORE_CLK60M_SEL_LSB)
+#define USBCORE_CLK60M_SEL_SET(x)                (((x) << USBCORE_CLK60M_SEL_LSB) & USBCORE_CLK60M_SEL_MASK)
+
+#define USBPHY_UTMI_CLK_ADDRESS                  0x00000318
+#define USBPHY_UTMI_CLK_OFFSET                   0x00000318
+#define USBPHY_UTMI_CLK_EN_MSB                   0
+#define USBPHY_UTMI_CLK_EN_LSB                   0
+#define USBPHY_UTMI_CLK_EN_MASK                  0x00000001
+#define USBPHY_UTMI_CLK_EN_GET(x)                (((x) & USBPHY_UTMI_CLK_EN_MASK) >> USBPHY_UTMI_CLK_EN_LSB)
+#define USBPHY_UTMI_CLK_EN_SET(x)                (((x) << USBPHY_UTMI_CLK_EN_LSB) & USBPHY_UTMI_CLK_EN_MASK)
+
+#define USB_TXVALID_DLY_CONFIG_ADDRESS           0x0000031c
+#define USB_TXVALID_DLY_CONFIG_OFFSET            0x0000031c
+#define USB_TXVALID_DLY_CONFIG_UTMI16_MSB        7
+#define USB_TXVALID_DLY_CONFIG_UTMI16_LSB        4
+#define USB_TXVALID_DLY_CONFIG_UTMI16_MASK       0x000000f0
+#define USB_TXVALID_DLY_CONFIG_UTMI16_GET(x)     (((x) & USB_TXVALID_DLY_CONFIG_UTMI16_MASK) >> USB_TXVALID_DLY_CONFIG_UTMI16_LSB)
+#define USB_TXVALID_DLY_CONFIG_UTMI16_SET(x)     (((x) << USB_TXVALID_DLY_CONFIG_UTMI16_LSB) & USB_TXVALID_DLY_CONFIG_UTMI16_MASK)
+#define USB_TXVALID_DLY_CONFIG_UTMI8_MSB         3
+#define USB_TXVALID_DLY_CONFIG_UTMI8_LSB         0
+#define USB_TXVALID_DLY_CONFIG_UTMI8_MASK        0x0000000f
+#define USB_TXVALID_DLY_CONFIG_UTMI8_GET(x)      (((x) & USB_TXVALID_DLY_CONFIG_UTMI8_MASK) >> USB_TXVALID_DLY_CONFIG_UTMI8_LSB)
+#define USB_TXVALID_DLY_CONFIG_UTMI8_SET(x)      (((x) << USB_TXVALID_DLY_CONFIG_UTMI8_LSB) & USB_TXVALID_DLY_CONFIG_UTMI8_MASK)
+
+#define SECOND_HOST_INFT_ADDRESS                 0x00000320
+#define SECOND_HOST_INFT_OFFSET                  0x00000320
+#define SECOND_HOST_INFT_SDIO_MODE_MSB           0
+#define SECOND_HOST_INFT_SDIO_MODE_LSB           0
+#define SECOND_HOST_INFT_SDIO_MODE_MASK          0x00000001
+#define SECOND_HOST_INFT_SDIO_MODE_GET(x)        (((x) & SECOND_HOST_INFT_SDIO_MODE_MASK) >> SECOND_HOST_INFT_SDIO_MODE_LSB)
+#define SECOND_HOST_INFT_SDIO_MODE_SET(x)        (((x) << SECOND_HOST_INFT_SDIO_MODE_LSB) & SECOND_HOST_INFT_SDIO_MODE_MASK)
+
+#define SDIO_HOST_ADDRESS                        0x00000324
+#define SDIO_HOST_OFFSET                         0x00000324
+#define SDIO_HOST_RESET_MSB                      0
+#define SDIO_HOST_RESET_LSB                      0
+#define SDIO_HOST_RESET_MASK                     0x00000001
+#define SDIO_HOST_RESET_GET(x)                   (((x) & SDIO_HOST_RESET_MASK) >> SDIO_HOST_RESET_LSB)
+#define SDIO_HOST_RESET_SET(x)                   (((x) << SDIO_HOST_RESET_LSB) & SDIO_HOST_RESET_MASK)
+
+#define ENTERPRISE_CONFIG_ADDRESS                0x00000328
+#define ENTERPRISE_CONFIG_OFFSET                 0x00000328
+#define ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_MSB 12
+#define ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_LSB 12
+#define ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_MASK 0x00001000
+#define ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_GET(x) (((x) & ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_MASK) >> ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_LSB)
+#define ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_SET(x) (((x) << ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_LSB) & ENTERPRISE_CONFIG_TPC_LOWER_PERFORMANCE_MASK)
+#define ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_MSB    11
+#define ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_LSB    11
+#define ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_MASK   0x00000800
+#define ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_GET(x) (((x) & ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_MASK) >> ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_LSB)
+#define ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_SET(x) (((x) << ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_LSB) & ENTERPRISE_CONFIG_SWCOM_IDLE_MODE_MASK)
+#define ENTERPRISE_CONFIG_STBC_DISABLE_MSB       10
+#define ENTERPRISE_CONFIG_STBC_DISABLE_LSB       10
+#define ENTERPRISE_CONFIG_STBC_DISABLE_MASK      0x00000400
+#define ENTERPRISE_CONFIG_STBC_DISABLE_GET(x)    (((x) & ENTERPRISE_CONFIG_STBC_DISABLE_MASK) >> ENTERPRISE_CONFIG_STBC_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_STBC_DISABLE_SET(x)    (((x) << ENTERPRISE_CONFIG_STBC_DISABLE_LSB) & ENTERPRISE_CONFIG_STBC_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_LDPC_DISABLE_MSB       9
+#define ENTERPRISE_CONFIG_LDPC_DISABLE_LSB       9
+#define ENTERPRISE_CONFIG_LDPC_DISABLE_MASK      0x00000200
+#define ENTERPRISE_CONFIG_LDPC_DISABLE_GET(x)    (((x) & ENTERPRISE_CONFIG_LDPC_DISABLE_MASK) >> ENTERPRISE_CONFIG_LDPC_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_LDPC_DISABLE_SET(x)    (((x) << ENTERPRISE_CONFIG_LDPC_DISABLE_LSB) & ENTERPRISE_CONFIG_LDPC_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_GREEN_TX_DISABLE_MSB   8
+#define ENTERPRISE_CONFIG_GREEN_TX_DISABLE_LSB   8
+#define ENTERPRISE_CONFIG_GREEN_TX_DISABLE_MASK  0x00000100
+#define ENTERPRISE_CONFIG_GREEN_TX_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_GREEN_TX_DISABLE_MASK) >> ENTERPRISE_CONFIG_GREEN_TX_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_GREEN_TX_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_GREEN_TX_DISABLE_LSB) & ENTERPRISE_CONFIG_GREEN_TX_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_MSB  7
+#define ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_LSB  7
+#define ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_MASK 0x00000080
+#define ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_MASK) >> ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_LSB) & ENTERPRISE_CONFIG_DUAL_BAND_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_CHAIN1_DISABLE_MSB     6
+#define ENTERPRISE_CONFIG_CHAIN1_DISABLE_LSB     6
+#define ENTERPRISE_CONFIG_CHAIN1_DISABLE_MASK    0x00000040
+#define ENTERPRISE_CONFIG_CHAIN1_DISABLE_GET(x)  (((x) & ENTERPRISE_CONFIG_CHAIN1_DISABLE_MASK) >> ENTERPRISE_CONFIG_CHAIN1_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_CHAIN1_DISABLE_SET(x)  (((x) << ENTERPRISE_CONFIG_CHAIN1_DISABLE_LSB) & ENTERPRISE_CONFIG_CHAIN1_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_MSB    5
+#define ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_LSB    5
+#define ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_MASK   0x00000020
+#define ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_MASK) >> ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_LSB) & ENTERPRISE_CONFIG_CH_5MHZ_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_MSB   4
+#define ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_LSB   4
+#define ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_MASK  0x00000010
+#define ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_MASK) >> ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_LSB) & ENTERPRISE_CONFIG_CH_10MHZ_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_TXBF_DISABLE_MSB       3
+#define ENTERPRISE_CONFIG_TXBF_DISABLE_LSB       3
+#define ENTERPRISE_CONFIG_TXBF_DISABLE_MASK      0x00000008
+#define ENTERPRISE_CONFIG_TXBF_DISABLE_GET(x)    (((x) & ENTERPRISE_CONFIG_TXBF_DISABLE_MASK) >> ENTERPRISE_CONFIG_TXBF_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_TXBF_DISABLE_SET(x)    (((x) << ENTERPRISE_CONFIG_TXBF_DISABLE_LSB) & ENTERPRISE_CONFIG_TXBF_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_MSB 2
+#define ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_LSB 2
+#define ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_MASK 0x00000004
+#define ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_MASK) >> ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_LSB) & ENTERPRISE_CONFIG_MIN_PKT_SIZE_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_LOOPBACK_DISABLE_MSB   1
+#define ENTERPRISE_CONFIG_LOOPBACK_DISABLE_LSB   1
+#define ENTERPRISE_CONFIG_LOOPBACK_DISABLE_MASK  0x00000002
+#define ENTERPRISE_CONFIG_LOOPBACK_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_LOOPBACK_DISABLE_MASK) >> ENTERPRISE_CONFIG_LOOPBACK_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_LOOPBACK_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_LOOPBACK_DISABLE_LSB) & ENTERPRISE_CONFIG_LOOPBACK_DISABLE_MASK)
+#define ENTERPRISE_CONFIG_LOCATION_DISABLE_MSB   0
+#define ENTERPRISE_CONFIG_LOCATION_DISABLE_LSB   0
+#define ENTERPRISE_CONFIG_LOCATION_DISABLE_MASK  0x00000001
+#define ENTERPRISE_CONFIG_LOCATION_DISABLE_GET(x) (((x) & ENTERPRISE_CONFIG_LOCATION_DISABLE_MASK) >> ENTERPRISE_CONFIG_LOCATION_DISABLE_LSB)
+#define ENTERPRISE_CONFIG_LOCATION_DISABLE_SET(x) (((x) << ENTERPRISE_CONFIG_LOCATION_DISABLE_LSB) & ENTERPRISE_CONFIG_LOCATION_DISABLE_MASK)
+
+#define RTC_DEBUG_BUS_ADDRESS                    0x0000032c
+#define RTC_DEBUG_BUS_OFFSET                     0x0000032c
+#define RTC_DEBUG_BUS_SEL_MSB                    0
+#define RTC_DEBUG_BUS_SEL_LSB                    0
+#define RTC_DEBUG_BUS_SEL_MASK                   0x00000001
+#define RTC_DEBUG_BUS_SEL_GET(x)                 (((x) & RTC_DEBUG_BUS_SEL_MASK) >> RTC_DEBUG_BUS_SEL_LSB)
+#define RTC_DEBUG_BUS_SEL_SET(x)                 (((x) << RTC_DEBUG_BUS_SEL_LSB) & RTC_DEBUG_BUS_SEL_MASK)
+
+#define RTC_EXT_CLK_BUF_ADDRESS                  0x00000330
+#define RTC_EXT_CLK_BUF_OFFSET                   0x00000330
+#define RTC_EXT_CLK_BUF_EN_MSB                   0
+#define RTC_EXT_CLK_BUF_EN_LSB                   0
+#define RTC_EXT_CLK_BUF_EN_MASK                  0x00000001
+#define RTC_EXT_CLK_BUF_EN_GET(x)                (((x) & RTC_EXT_CLK_BUF_EN_MASK) >> RTC_EXT_CLK_BUF_EN_LSB)
+#define RTC_EXT_CLK_BUF_EN_SET(x)                (((x) << RTC_EXT_CLK_BUF_EN_LSB) & RTC_EXT_CLK_BUF_EN_MASK)
+
+#define WLAN_AHB_BRIDGE_TIMEOUT_ADDRESS          0x00000334
+#define WLAN_AHB_BRIDGE_TIMEOUT_OFFSET           0x00000334
+#define WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_MSB       13
+#define WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_LSB       0
+#define WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_MASK      0x00003fff
+#define WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_GET(x)    (((x) & WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_MASK) >> WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_LSB)
+#define WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_SET(x)    (((x) << WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_LSB) & WLAN_AHB_BRIDGE_TIMEOUT_CONFIG_MASK)
+
+#define WLAN_AHB_CONFIG_ADDRESS                  0x00000338
+#define WLAN_AHB_CONFIG_OFFSET                   0x00000338
+#define WLAN_AHB_CONFIG_MAX_BURST_16_MSB         2
+#define WLAN_AHB_CONFIG_MAX_BURST_16_LSB         2
+#define WLAN_AHB_CONFIG_MAX_BURST_16_MASK        0x00000004
+#define WLAN_AHB_CONFIG_MAX_BURST_16_GET(x)      (((x) & WLAN_AHB_CONFIG_MAX_BURST_16_MASK) >> WLAN_AHB_CONFIG_MAX_BURST_16_LSB)
+#define WLAN_AHB_CONFIG_MAX_BURST_16_SET(x)      (((x) << WLAN_AHB_CONFIG_MAX_BURST_16_LSB) & WLAN_AHB_CONFIG_MAX_BURST_16_MASK)
+#define WLAN_AHB_CONFIG_MAX_BURST_8_MSB          1
+#define WLAN_AHB_CONFIG_MAX_BURST_8_LSB          1
+#define WLAN_AHB_CONFIG_MAX_BURST_8_MASK         0x00000002
+#define WLAN_AHB_CONFIG_MAX_BURST_8_GET(x)       (((x) & WLAN_AHB_CONFIG_MAX_BURST_8_MASK) >> WLAN_AHB_CONFIG_MAX_BURST_8_LSB)
+#define WLAN_AHB_CONFIG_MAX_BURST_8_SET(x)       (((x) << WLAN_AHB_CONFIG_MAX_BURST_8_LSB) & WLAN_AHB_CONFIG_MAX_BURST_8_MASK)
+#define WLAN_AHB_CONFIG_MAX_BURST_4_MSB          0
+#define WLAN_AHB_CONFIG_MAX_BURST_4_LSB          0
+#define WLAN_AHB_CONFIG_MAX_BURST_4_MASK         0x00000001
+#define WLAN_AHB_CONFIG_MAX_BURST_4_GET(x)       (((x) & WLAN_AHB_CONFIG_MAX_BURST_4_MASK) >> WLAN_AHB_CONFIG_MAX_BURST_4_LSB)
+#define WLAN_AHB_CONFIG_MAX_BURST_4_SET(x)       (((x) << WLAN_AHB_CONFIG_MAX_BURST_4_LSB) & WLAN_AHB_CONFIG_MAX_BURST_4_MASK)
+
+#define RTC_AXI_AHB_BRIDGE_ADDRESS               0x0000033c
+#define RTC_AXI_AHB_BRIDGE_OFFSET                0x0000033c
+#define RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_MSB 3
+#define RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_LSB 3
+#define RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_MASK 0x00000008
+#define RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_GET(x) (((x) & RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_MASK) >> RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_LSB)
+#define RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_SET(x) (((x) << RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_LSB) & RTC_AXI_AHB_BRIDGE_BURST_WR_ALIGN_EN_MASK)
+#define RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_MSB 2
+#define RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_LSB 2
+#define RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_MASK 0x00000004
+#define RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_GET(x) (((x) & RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_MASK) >> RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_LSB)
+#define RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_SET(x) (((x) << RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_LSB) & RTC_AXI_AHB_BRIDGE_BURST_RD_ALIGN_EN_MASK)
+#define RTC_AXI_AHB_BRIDGE_MAX_BEATS_MSB         1
+#define RTC_AXI_AHB_BRIDGE_MAX_BEATS_LSB         0
+#define RTC_AXI_AHB_BRIDGE_MAX_BEATS_MASK        0x00000003
+#define RTC_AXI_AHB_BRIDGE_MAX_BEATS_GET(x)      (((x) & RTC_AXI_AHB_BRIDGE_MAX_BEATS_MASK) >> RTC_AXI_AHB_BRIDGE_MAX_BEATS_LSB)
+#define RTC_AXI_AHB_BRIDGE_MAX_BEATS_SET(x)      (((x) << RTC_AXI_AHB_BRIDGE_MAX_BEATS_LSB) & RTC_AXI_AHB_BRIDGE_MAX_BEATS_MASK)
+
+#define WLAN2BT_CPUCOM_INT_STS_ADDRESS           0x00000400
+#define WLAN2BT_CPUCOM_INT_STS_OFFSET            0x00000400
+#define WLAN2BT_CPUCOM_INT_STS_REG_MSB           31
+#define WLAN2BT_CPUCOM_INT_STS_REG_LSB           0
+#define WLAN2BT_CPUCOM_INT_STS_REG_MASK          0xffffffff
+#define WLAN2BT_CPUCOM_INT_STS_REG_GET(x)        (((x) & WLAN2BT_CPUCOM_INT_STS_REG_MASK) >> WLAN2BT_CPUCOM_INT_STS_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_STS_REG_SET(x)        (((x) << WLAN2BT_CPUCOM_INT_STS_REG_LSB) & WLAN2BT_CPUCOM_INT_STS_REG_MASK)
+
+#define WLAN2BT_CPUCOM_INT_MASK_N_ADDRESS        0x00000404
+#define WLAN2BT_CPUCOM_INT_MASK_N_OFFSET         0x00000404
+#define WLAN2BT_CPUCOM_INT_MASK_N_REG_MSB        31
+#define WLAN2BT_CPUCOM_INT_MASK_N_REG_LSB        0
+#define WLAN2BT_CPUCOM_INT_MASK_N_REG_MASK       0xffffffff
+#define WLAN2BT_CPUCOM_INT_MASK_N_REG_GET(x)     (((x) & WLAN2BT_CPUCOM_INT_MASK_N_REG_MASK) >> WLAN2BT_CPUCOM_INT_MASK_N_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_MASK_N_REG_SET(x)     (((x) << WLAN2BT_CPUCOM_INT_MASK_N_REG_LSB) & WLAN2BT_CPUCOM_INT_MASK_N_REG_MASK)
+
+#define WLAN2BT_CPUCOM_INT_EOI_ADDRESS           0x00000408
+#define WLAN2BT_CPUCOM_INT_EOI_OFFSET            0x00000408
+#define WLAN2BT_CPUCOM_INT_EOI_REG_MSB           31
+#define WLAN2BT_CPUCOM_INT_EOI_REG_LSB           0
+#define WLAN2BT_CPUCOM_INT_EOI_REG_MASK          0xffffffff
+#define WLAN2BT_CPUCOM_INT_EOI_REG_GET(x)        (((x) & WLAN2BT_CPUCOM_INT_EOI_REG_MASK) >> WLAN2BT_CPUCOM_INT_EOI_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_EOI_REG_SET(x)        (((x) << WLAN2BT_CPUCOM_INT_EOI_REG_LSB) & WLAN2BT_CPUCOM_INT_EOI_REG_MASK)
+
+#define WLAN2BT_CPUCOM_INT_ACK_STS_ADDRESS       0x0000040c
+#define WLAN2BT_CPUCOM_INT_ACK_STS_OFFSET        0x0000040c
+#define WLAN2BT_CPUCOM_INT_ACK_STS_REG_MSB       31
+#define WLAN2BT_CPUCOM_INT_ACK_STS_REG_LSB       0
+#define WLAN2BT_CPUCOM_INT_ACK_STS_REG_MASK      0xffffffff
+#define WLAN2BT_CPUCOM_INT_ACK_STS_REG_GET(x)    (((x) & WLAN2BT_CPUCOM_INT_ACK_STS_REG_MASK) >> WLAN2BT_CPUCOM_INT_ACK_STS_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_ACK_STS_REG_SET(x)    (((x) << WLAN2BT_CPUCOM_INT_ACK_STS_REG_LSB) & WLAN2BT_CPUCOM_INT_ACK_STS_REG_MASK)
+
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_ADDRESS    0x00000410
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_OFFSET     0x00000410
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_MSB    31
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_LSB    0
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_MASK   0xffffffff
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_GET(x) (((x) & WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_MASK) >> WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_SET(x) (((x) << WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_LSB) & WLAN2BT_CPUCOM_INT_ACK_MASK_N_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_CNT0_ADDRESS             0x00000414
+#define WLAN_CPUCOM_CRD_CNT0_OFFSET              0x00000414
+#define WLAN_CPUCOM_CRD_CNT0_REG_MSB             15
+#define WLAN_CPUCOM_CRD_CNT0_REG_LSB             0
+#define WLAN_CPUCOM_CRD_CNT0_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_CNT0_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_CNT0_REG_MASK) >> WLAN_CPUCOM_CRD_CNT0_REG_LSB)
+#define WLAN_CPUCOM_CRD_CNT0_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_CNT0_REG_LSB) & WLAN_CPUCOM_CRD_CNT0_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_INC0_ADDRESS             0x00000418
+#define WLAN_CPUCOM_CRD_INC0_OFFSET              0x00000418
+#define WLAN_CPUCOM_CRD_INC0_REG_MSB             15
+#define WLAN_CPUCOM_CRD_INC0_REG_LSB             0
+#define WLAN_CPUCOM_CRD_INC0_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_INC0_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_INC0_REG_MASK) >> WLAN_CPUCOM_CRD_INC0_REG_LSB)
+#define WLAN_CPUCOM_CRD_INC0_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_INC0_REG_LSB) & WLAN_CPUCOM_CRD_INC0_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_DEC0_ADDRESS             0x0000041c
+#define WLAN_CPUCOM_CRD_DEC0_OFFSET              0x0000041c
+#define WLAN_CPUCOM_CRD_DEC0_REG_MSB             15
+#define WLAN_CPUCOM_CRD_DEC0_REG_LSB             0
+#define WLAN_CPUCOM_CRD_DEC0_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_DEC0_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_DEC0_REG_MASK) >> WLAN_CPUCOM_CRD_DEC0_REG_LSB)
+#define WLAN_CPUCOM_CRD_DEC0_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_DEC0_REG_LSB) & WLAN_CPUCOM_CRD_DEC0_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_CNT1_ADDRESS             0x00000420
+#define WLAN_CPUCOM_CRD_CNT1_OFFSET              0x00000420
+#define WLAN_CPUCOM_CRD_CNT1_REG_MSB             15
+#define WLAN_CPUCOM_CRD_CNT1_REG_LSB             0
+#define WLAN_CPUCOM_CRD_CNT1_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_CNT1_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_CNT1_REG_MASK) >> WLAN_CPUCOM_CRD_CNT1_REG_LSB)
+#define WLAN_CPUCOM_CRD_CNT1_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_CNT1_REG_LSB) & WLAN_CPUCOM_CRD_CNT1_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_INC1_ADDRESS             0x00000424
+#define WLAN_CPUCOM_CRD_INC1_OFFSET              0x00000424
+#define WLAN_CPUCOM_CRD_INC1_REG_MSB             15
+#define WLAN_CPUCOM_CRD_INC1_REG_LSB             0
+#define WLAN_CPUCOM_CRD_INC1_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_INC1_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_INC1_REG_MASK) >> WLAN_CPUCOM_CRD_INC1_REG_LSB)
+#define WLAN_CPUCOM_CRD_INC1_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_INC1_REG_LSB) & WLAN_CPUCOM_CRD_INC1_REG_MASK)
+
+#define WLAN_CPUCOM_CRD_DEC1_ADDRESS             0x00000428
+#define WLAN_CPUCOM_CRD_DEC1_OFFSET              0x00000428
+#define WLAN_CPUCOM_CRD_DEC1_REG_MSB             15
+#define WLAN_CPUCOM_CRD_DEC1_REG_LSB             0
+#define WLAN_CPUCOM_CRD_DEC1_REG_MASK            0x0000ffff
+#define WLAN_CPUCOM_CRD_DEC1_REG_GET(x)          (((x) & WLAN_CPUCOM_CRD_DEC1_REG_MASK) >> WLAN_CPUCOM_CRD_DEC1_REG_LSB)
+#define WLAN_CPUCOM_CRD_DEC1_REG_SET(x)          (((x) << WLAN_CPUCOM_CRD_DEC1_REG_LSB) & WLAN_CPUCOM_CRD_DEC1_REG_MASK)
+
+#define WLAN_CPUCOM_SCRATCH0_ADDRESS             0x0000042c
+#define WLAN_CPUCOM_SCRATCH0_OFFSET              0x0000042c
+#define WLAN_CPUCOM_SCRATCH0_REG_MSB             31
+#define WLAN_CPUCOM_SCRATCH0_REG_LSB             0
+#define WLAN_CPUCOM_SCRATCH0_REG_MASK            0xffffffff
+#define WLAN_CPUCOM_SCRATCH0_REG_GET(x)          (((x) & WLAN_CPUCOM_SCRATCH0_REG_MASK) >> WLAN_CPUCOM_SCRATCH0_REG_LSB)
+#define WLAN_CPUCOM_SCRATCH0_REG_SET(x)          (((x) << WLAN_CPUCOM_SCRATCH0_REG_LSB) & WLAN_CPUCOM_SCRATCH0_REG_MASK)
+
+#define WLAN_CPUCOM_SCRATCH1_ADDRESS             0x00000430
+#define WLAN_CPUCOM_SCRATCH1_OFFSET              0x00000430
+#define WLAN_CPUCOM_SCRATCH1_REG_MSB             31
+#define WLAN_CPUCOM_SCRATCH1_REG_LSB             0
+#define WLAN_CPUCOM_SCRATCH1_REG_MASK            0xffffffff
+#define WLAN_CPUCOM_SCRATCH1_REG_GET(x)          (((x) & WLAN_CPUCOM_SCRATCH1_REG_MASK) >> WLAN_CPUCOM_SCRATCH1_REG_LSB)
+#define WLAN_CPUCOM_SCRATCH1_REG_SET(x)          (((x) << WLAN_CPUCOM_SCRATCH1_REG_LSB) & WLAN_CPUCOM_SCRATCH1_REG_MASK)
+
+#define WLAN_CPUCOM_SCRATCH2_ADDRESS             0x00000434
+#define WLAN_CPUCOM_SCRATCH2_OFFSET              0x00000434
+#define WLAN_CPUCOM_SCRATCH2_REG_MSB             31
+#define WLAN_CPUCOM_SCRATCH2_REG_LSB             0
+#define WLAN_CPUCOM_SCRATCH2_REG_MASK            0xffffffff
+#define WLAN_CPUCOM_SCRATCH2_REG_GET(x)          (((x) & WLAN_CPUCOM_SCRATCH2_REG_MASK) >> WLAN_CPUCOM_SCRATCH2_REG_LSB)
+#define WLAN_CPUCOM_SCRATCH2_REG_SET(x)          (((x) << WLAN_CPUCOM_SCRATCH2_REG_LSB) & WLAN_CPUCOM_SCRATCH2_REG_MASK)
+
+#define WLAN_CPUCOM_SCRATCH3_ADDRESS             0x00000438
+#define WLAN_CPUCOM_SCRATCH3_OFFSET              0x00000438
+#define WLAN_CPUCOM_SCRATCH3_REG_MSB             31
+#define WLAN_CPUCOM_SCRATCH3_REG_LSB             0
+#define WLAN_CPUCOM_SCRATCH3_REG_MASK            0xffffffff
+#define WLAN_CPUCOM_SCRATCH3_REG_GET(x)          (((x) & WLAN_CPUCOM_SCRATCH3_REG_MASK) >> WLAN_CPUCOM_SCRATCH3_REG_LSB)
+#define WLAN_CPUCOM_SCRATCH3_REG_SET(x)          (((x) << WLAN_CPUCOM_SCRATCH3_REG_LSB) & WLAN_CPUCOM_SCRATCH3_REG_MASK)
+
+#define WLAN_CPUCOM_DBG_ADDRESS                  0x0000043c
+#define WLAN_CPUCOM_DBG_OFFSET                   0x0000043c
+#define WLAN_CPUCOM_DBG_RESERVE_MSB              7
+#define WLAN_CPUCOM_DBG_RESERVE_LSB              4
+#define WLAN_CPUCOM_DBG_RESERVE_MASK             0x000000f0
+#define WLAN_CPUCOM_DBG_RESERVE_GET(x)           (((x) & WLAN_CPUCOM_DBG_RESERVE_MASK) >> WLAN_CPUCOM_DBG_RESERVE_LSB)
+#define WLAN_CPUCOM_DBG_RESERVE_SET(x)           (((x) << WLAN_CPUCOM_DBG_RESERVE_LSB) & WLAN_CPUCOM_DBG_RESERVE_MASK)
+#define WLAN_CPUCOM_DBG_CRD1_DEC_ERR_MSB         3
+#define WLAN_CPUCOM_DBG_CRD1_DEC_ERR_LSB         3
+#define WLAN_CPUCOM_DBG_CRD1_DEC_ERR_MASK        0x00000008
+#define WLAN_CPUCOM_DBG_CRD1_DEC_ERR_GET(x)      (((x) & WLAN_CPUCOM_DBG_CRD1_DEC_ERR_MASK) >> WLAN_CPUCOM_DBG_CRD1_DEC_ERR_LSB)
+#define WLAN_CPUCOM_DBG_CRD1_DEC_ERR_SET(x)      (((x) << WLAN_CPUCOM_DBG_CRD1_DEC_ERR_LSB) & WLAN_CPUCOM_DBG_CRD1_DEC_ERR_MASK)
+#define WLAN_CPUCOM_DBG_CRD1_INC_ERR_MSB         2
+#define WLAN_CPUCOM_DBG_CRD1_INC_ERR_LSB         2
+#define WLAN_CPUCOM_DBG_CRD1_INC_ERR_MASK        0x00000004
+#define WLAN_CPUCOM_DBG_CRD1_INC_ERR_GET(x)      (((x) & WLAN_CPUCOM_DBG_CRD1_INC_ERR_MASK) >> WLAN_CPUCOM_DBG_CRD1_INC_ERR_LSB)
+#define WLAN_CPUCOM_DBG_CRD1_INC_ERR_SET(x)      (((x) << WLAN_CPUCOM_DBG_CRD1_INC_ERR_LSB) & WLAN_CPUCOM_DBG_CRD1_INC_ERR_MASK)
+#define WLAN_CPUCOM_DBG_CRD0_DEC_ERR_MSB         1
+#define WLAN_CPUCOM_DBG_CRD0_DEC_ERR_LSB         1
+#define WLAN_CPUCOM_DBG_CRD0_DEC_ERR_MASK        0x00000002
+#define WLAN_CPUCOM_DBG_CRD0_DEC_ERR_GET(x)      (((x) & WLAN_CPUCOM_DBG_CRD0_DEC_ERR_MASK) >> WLAN_CPUCOM_DBG_CRD0_DEC_ERR_LSB)
+#define WLAN_CPUCOM_DBG_CRD0_DEC_ERR_SET(x)      (((x) << WLAN_CPUCOM_DBG_CRD0_DEC_ERR_LSB) & WLAN_CPUCOM_DBG_CRD0_DEC_ERR_MASK)
+#define WLAN_CPUCOM_DBG_CRD0_INC_ERR_MSB         0
+#define WLAN_CPUCOM_DBG_CRD0_INC_ERR_LSB         0
+#define WLAN_CPUCOM_DBG_CRD0_INC_ERR_MASK        0x00000001
+#define WLAN_CPUCOM_DBG_CRD0_INC_ERR_GET(x)      (((x) & WLAN_CPUCOM_DBG_CRD0_INC_ERR_MASK) >> WLAN_CPUCOM_DBG_CRD0_INC_ERR_LSB)
+#define WLAN_CPUCOM_DBG_CRD0_INC_ERR_SET(x)      (((x) << WLAN_CPUCOM_DBG_CRD0_INC_ERR_LSB) & WLAN_CPUCOM_DBG_CRD0_INC_ERR_MASK)
+
+#define WLAN2BT_CPUCOM_INT_ACK_EN_ADDRESS        0x00000440
+#define WLAN2BT_CPUCOM_INT_ACK_EN_OFFSET         0x00000440
+#define WLAN2BT_CPUCOM_INT_ACK_EN_REG_MSB        0
+#define WLAN2BT_CPUCOM_INT_ACK_EN_REG_LSB        0
+#define WLAN2BT_CPUCOM_INT_ACK_EN_REG_MASK       0x00000001
+#define WLAN2BT_CPUCOM_INT_ACK_EN_REG_GET(x)     (((x) & WLAN2BT_CPUCOM_INT_ACK_EN_REG_MASK) >> WLAN2BT_CPUCOM_INT_ACK_EN_REG_LSB)
+#define WLAN2BT_CPUCOM_INT_ACK_EN_REG_SET(x)     (((x) << WLAN2BT_CPUCOM_INT_ACK_EN_REG_LSB) & WLAN2BT_CPUCOM_INT_ACK_EN_REG_MASK)
+
+#define BT2WLAN_CPUCOM_INT_EN_ADDRESS            0x00000444
+#define BT2WLAN_CPUCOM_INT_EN_OFFSET             0x00000444
+#define BT2WLAN_CPUCOM_INT_EN_REG_MSB            0
+#define BT2WLAN_CPUCOM_INT_EN_REG_LSB            0
+#define BT2WLAN_CPUCOM_INT_EN_REG_MASK           0x00000001
+#define BT2WLAN_CPUCOM_INT_EN_REG_GET(x)         (((x) & BT2WLAN_CPUCOM_INT_EN_REG_MASK) >> BT2WLAN_CPUCOM_INT_EN_REG_LSB)
+#define BT2WLAN_CPUCOM_INT_EN_REG_SET(x)         (((x) << BT2WLAN_CPUCOM_INT_EN_REG_LSB) & BT2WLAN_CPUCOM_INT_EN_REG_MASK)
+
+#ifndef __ASSEMBLER__
+typedef struct rtc_soc_reg_reg_s {
+	volatile unsigned int soc_reset_control;
+	volatile unsigned int soc_tcxo_detect;
+	volatile unsigned int soc_xtal_test;
+	unsigned char pad0[20]; /* pad to 0x20 */
+	volatile unsigned int soc_cpu_clock;
+	unsigned char pad1[4];  /* pad to 0x28 */
+	volatile unsigned int soc_clock_control;
+	unsigned char pad2[4];  /* pad to 0x30 */
+	volatile unsigned int soc_wdt_control;
+	volatile unsigned int soc_wdt_status;
+	volatile unsigned int soc_wdt;
+	volatile unsigned int soc_wdt_count;
+	volatile unsigned int soc_wdt_reset;
+	volatile unsigned int soc_int_status;
+	volatile unsigned int soc_lf_timer0;
+	volatile unsigned int soc_lf_timer_count0;
+	volatile unsigned int soc_lf_timer_control0;
+	volatile unsigned int soc_lf_timer_status0;
+	volatile unsigned int soc_lf_timer1;
+	volatile unsigned int soc_lf_timer_count1;
+	volatile unsigned int soc_lf_timer_control1;
+	volatile unsigned int soc_lf_timer_status1;
+	volatile unsigned int soc_lf_timer2;
+	volatile unsigned int soc_lf_timer_count2;
+	volatile unsigned int soc_lf_timer_control2;
+	volatile unsigned int soc_lf_timer_status2;
+	volatile unsigned int soc_lf_timer3;
+	volatile unsigned int soc_lf_timer_count3;
+	volatile unsigned int soc_lf_timer_control3;
+	volatile unsigned int soc_lf_timer_status3;
+	volatile unsigned int soc_hf_timer;
+	volatile unsigned int soc_hf_timer_count;
+	volatile unsigned int soc_hf_lf_count;
+	volatile unsigned int soc_hf_timer_control;
+	volatile unsigned int soc_hf_timer_status;
+	volatile unsigned int soc_rtc_control;
+	volatile unsigned int soc_rtc_time;
+	volatile unsigned int soc_rtc_date;
+	volatile unsigned int soc_rtc_set_time;
+	volatile unsigned int soc_rtc_set_date;
+	volatile unsigned int soc_rtc_set_alarm;
+	volatile unsigned int soc_rtc_config;
+	volatile unsigned int soc_rtc_alarm_status;
+	volatile unsigned int soc_uart_wakeup;
+	volatile unsigned int soc_reset_cause;
+	volatile unsigned int soc_system_sleep;
+	volatile unsigned int soc_sdio_wrapper;
+	volatile unsigned int soc_int_sleep_mask;
+	unsigned char pad3[4];  /* pad to 0xd4 */
+	volatile unsigned int soc_lpo_cal_time;
+	volatile unsigned int soc_lpo_init_dividend_int;
+	volatile unsigned int soc_lpo_init_dividend_fraction;
+	volatile unsigned int soc_lpo_cal;
+	volatile unsigned int soc_lpo_cal_test_control;
+	volatile unsigned int soc_lpo_cal_test_status;
+	volatile unsigned int legacy_soc_chip_id;
+	volatile unsigned int soc_chip_id;
+	unsigned char pad4[24]; /* pad to 0x10c */
+	volatile unsigned int soc_power_reg;
+	volatile unsigned int soc_core_clk_ctrl;
+	volatile unsigned int soc_gpio_wakeup_control;
+	unsigned char pad5[252];        /* pad to 0x214 */
+	volatile unsigned int sleep_retention;
+	unsigned char pad6[108];        /* pad to 0x284 */
+	volatile unsigned int lp_perf_counter;
+	volatile unsigned int lp_perf_light_sleep;
+	volatile unsigned int lp_perf_deep_sleep;
+	volatile unsigned int lp_perf_on;
+	unsigned char pad7[20]; /* pad to 0x2a8 */
+	volatile unsigned int chip_mode;
+	volatile unsigned int clk_req_fall_edge;
+	volatile unsigned int otp;
+	volatile unsigned int otp_status;
+	volatile unsigned int pmu;
+	volatile unsigned int pmu_config;
+	volatile unsigned int pmu_pareg;
+	volatile unsigned int pmu_bypass;
+	unsigned char pad8[20]; /* pad to 0x2dc */
+	volatile unsigned int therm_ctrl1;
+	volatile unsigned int therm_ctrl2;
+	volatile unsigned int therm_ctrl3;
+	volatile unsigned int listen_mode1;
+	volatile unsigned int listen_mode2;
+	volatile unsigned int audio_pll_config;
+	volatile unsigned int audio_pll_modulation;
+	volatile unsigned int audio_pll_mod_step;
+	volatile unsigned int current_audio_pll_modulation;
+	volatile unsigned int eth_pll_config;
+	volatile unsigned int cpu_pll_config;
+	volatile unsigned int bb_pll_config;
+	volatile unsigned int eth_xmii;
+	volatile unsigned int usb_phy_config;
+	volatile unsigned int usbcore_clk60m;
+	volatile unsigned int usbphy_utmi_clk;
+	volatile unsigned int usb_txvalid_dly_config;
+	volatile unsigned int second_host_inft;
+	volatile unsigned int sdio_host;
+	volatile unsigned int enterprise_config;
+	volatile unsigned int rtc_debug_bus;
+	volatile unsigned int rtc_ext_clk_buf;
+	volatile unsigned int wlan_ahb_bridge_timeout;
+	volatile unsigned int wlan_ahb_config;
+	volatile unsigned int rtc_axi_ahb_bridge;
+	unsigned char pad9[192];        /* pad to 0x400 */
+	volatile unsigned int wlan2bt_cpucom_int_sts;
+	volatile unsigned int wlan2bt_cpucom_int_mask_n;
+	volatile unsigned int wlan2bt_cpucom_int_eoi;
+	volatile unsigned int wlan2bt_cpucom_int_ack_sts;
+	volatile unsigned int wlan2bt_cpucom_int_ack_mask_n;
+	volatile unsigned int wlan_cpucom_crd_cnt0;
+	volatile unsigned int wlan_cpucom_crd_inc0[1];
+	volatile unsigned int wlan_cpucom_crd_dec0[1];
+	volatile unsigned int wlan_cpucom_crd_cnt1;
+	volatile unsigned int wlan_cpucom_crd_inc1[1];
+	volatile unsigned int wlan_cpucom_crd_dec1[1];
+	volatile unsigned int wlan_cpucom_scratch0;
+	volatile unsigned int wlan_cpucom_scratch1;
+	volatile unsigned int wlan_cpucom_scratch2;
+	volatile unsigned int wlan_cpucom_scratch3;
+	volatile unsigned int wlan_cpucom_dbg;
+	volatile unsigned int wlan2bt_cpucom_int_ack_en;
+	volatile unsigned int bt2wlan_cpucom_int_en;
+} rtc_soc_reg_reg_t;
+#endif /* __ASSEMBLER__ */
+
+#endif /* _RTC_SOC_REG_H_ */
diff --git a/target/inc/targaddrs.h b/target/inc/targaddrs.h
new file mode 100644
index 0000000..7cf64d3
--- /dev/null
+++ b/target/inc/targaddrs.h
@@ -0,0 +1,673 @@
+/*
+ * Copyright (c) 2012-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __TARGADDRS_H__
+#define __TARGADDRS_H__
+
+#if defined(ATH_TARGET)
+#include "soc_addrs.h"
+#endif
+
+#if !defined(ATH_TARGET)
+#include "athstartpack.h"
+#endif
+
+/*
+ * SOC option bits, to enable/disable various features.
+ * By default, all option bits are 0.
+ * AR6004: These bits can be set in LOCAL_SCRATCH register 0.
+ * AR9888: These bits can be set in soc_core register SCRATCH_0.
+ */
+#define SOC_OPTION_BMI_DISABLE      0x01        /* Disable BMI comm with Host */
+#define SOC_OPTION_SERIAL_ENABLE    0x02        /* Enable serial port msgs */
+#define SOC_OPTION_WDT_DISABLE      0x04        /* WatchDog Timer override */
+#define SOC_OPTION_SLEEP_DISABLE    0x08        /* Disable system sleep */
+#define SOC_OPTION_STOP_BOOT        0x10        /* Stop boot processes (for ATE) */
+#define SOC_OPTION_ENABLE_NOANI     0x20        /* Operate without ANI */
+#define SOC_OPTION_DSET_DISABLE     0x40        /* Ignore DataSets */
+#define SOC_OPTION_IGNORE_FLASH     0x80        /* Ignore flash during bootup */
+
+/*
+ * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the
+ * host_interest structure.  It must match the address of the _host_interest
+ * symbol (see linker script).
+ *
+ * Host Interest is shared between Host and Target in order to coordinate
+ * between the two, and is intended to remain constant (with additions only
+ * at the end) across software releases.
+ *
+ * All addresses are available here so that it's possible to
+ * write a single binary that works with all Target Types.
+ * May be used in assembler code as well as C.
+ */
+#define AR6002_HOST_INTEREST_ADDRESS    0x00500400
+#define AR6003_HOST_INTEREST_ADDRESS    0x00540600
+#define AR6004_HOST_INTEREST_ADDRESS    0x00400800
+#define AR9888_HOST_INTEREST_ADDRESS    0x00400800
+#define AR900B_HOST_INTEREST_ADDRESS    0x00400800
+#define AR6320_HOST_INTEREST_ADDRESS    0x00400800
+#define QCA6180_HOST_INTEREST_ADDRESS   0x005d96a0
+#define AR6004_SOC_RESET_ADDRESS        0X00004000
+#define AR6004_SOC_RESET_CPU_INIT_RESET_MASK        0X00000800
+#if defined(AR6006_MEMORY_NEW_ARCH)
+#define AR6006_HOST_INTEREST_ADDRESS                0x00428800
+#else
+#define AR6006_HOST_INTEREST_ADDRESS                0x00400800
+#endif
+#define AR6006_SOC_RESET_ADDRESS                    0X00004000
+#define AR6006_SOC_RESET_CPU_INIT_RESET_MASK        0X00000800
+
+#define HOST_INTEREST_MAX_SIZE          0x200
+
+#if !defined(__ASSEMBLER__)
+struct register_dump_s;
+struct dbglog_hdr_s;
+
+/*
+ * These are items that the Host may need to access
+ * via BMI or via the Diagnostic Window. The position
+ * of items in this structure must remain constant
+ * across firmware revisions!
+ *
+ * Types for each item must be fixed size across
+ * target and host platforms.
+ *
+ * More items may be added at the end.
+ */
+PREPACK64 struct host_interest_s {
+	/*
+	 * Pointer to application-defined area, if any.
+	 * Set by Target application during startup.
+	 */
+	A_UINT32 hi_app_host_interest;  /* 0x00 */
+
+	/* Pointer to register dump area, valid after Target crash. */
+	A_UINT32 hi_failure_state;      /* 0x04 */
+
+	/* Pointer to debug logging header */
+	A_UINT32 hi_dbglog_hdr; /* 0x08 */
+
+	/* Save SW ROM version */
+	A_UINT32 hi_sw_rom_version;     /* 0x0c */
+
+	/*
+	 * General-purpose flag bits, similar to SOC_OPTION_* flags.
+	 * Can be used by application rather than by OS.
+	 */
+	A_UINT32 hi_option_flag;        /* 0x10 */
+
+	/*
+	 * Boolean that determines whether or not to
+	 * display messages on the serial port.
+	 */
+	A_UINT32 hi_serial_enable;      /* 0x14 */
+
+	/* Start address of DataSet index, if any */
+	A_UINT32 hi_dset_list_head;     /* 0x18 */
+
+	/* Override Target application start address */
+	A_UINT32 hi_app_start;  /* 0x1c */
+
+	/* Clock and voltage tuning */
+	A_UINT32 hi_skip_clock_init;    /* 0x20 */
+	A_UINT32 hi_core_clock_setting; /* 0x24 */
+	A_UINT32 hi_cpu_clock_setting;  /* 0x28 */
+	A_UINT32 hi_system_sleep_setting;       /* 0x2c */
+	A_UINT32 hi_xtal_control_setting;       /* 0x30 */
+	A_UINT32 hi_pll_ctrl_setting_24ghz;     /* 0x34 */
+	A_UINT32 hi_pll_ctrl_setting_5ghz;      /* 0x38 */
+	A_UINT32 hi_ref_voltage_trim_setting;   /* 0x3c */
+	A_UINT32 hi_clock_info; /* 0x40 */
+
+	/* Host uses BE CPU or not */
+	A_UINT32 hi_be;         /* 0x44 */
+
+	A_UINT32 hi_stack;      /* normal stack *//* 0x48 */
+	A_UINT32 hi_err_stack;  /* error stack *//* 0x4c */
+	A_UINT32 hi_desired_cpu_speed_hz;       /* 0x50 */
+
+	/* Pointer to Board Data  */
+	A_UINT32 hi_board_data; /* 0x54 */
+
+	/*
+	 * Indication of Board Data state:
+	 *    0: board data is not yet initialized.
+	 *    1: board data is initialized; unknown size
+	 *   >1: number of bytes of initialized board data (varies with board type)
+	 */
+	A_UINT32 hi_board_data_initialized;     /* 0x58 */
+
+	A_UINT32 hi_dset_RAM_index_table;       /* 0x5c */
+
+	A_UINT32 hi_desired_baud_rate;  /* 0x60 */
+	A_UINT32 hi_dbglog_config;      /* 0x64 */
+	A_UINT32 hi_end_RAM_reserve_sz; /* 0x68 */
+	A_UINT32 hi_mbox_io_block_sz;   /* 0x6c */
+
+	A_UINT32 hi_num_bpatch_streams; /* 0x70 -- unused */
+	A_UINT32 hi_mbox_isr_yield_limit;       /* 0x74 */
+
+	A_UINT32 hi_refclk_hz;  /* 0x78 */
+	A_UINT32 hi_ext_clk_detected;   /* 0x7c */
+	A_UINT32 hi_dbg_uart_txpin;     /* 0x80 */
+	A_UINT32 hi_dbg_uart_rxpin;     /* 0x84 */
+	A_UINT32 hi_hci_uart_baud;      /* 0x88 */
+	A_UINT32 hi_hci_uart_pin_assignments;   /* 0x8C */
+	/* NOTE: byte [0] = tx pin, [1] = rx pin, [2] = rts pin, [3] = cts pin */
+	A_UINT32 hi_hci_uart_baud_scale_val;    /* 0x90 */
+	A_UINT32 hi_hci_uart_baud_step_val;     /* 0x94 */
+
+	A_UINT32 hi_allocram_start;     /* 0x98 */
+	A_UINT32 hi_allocram_sz;        /* 0x9c */
+	A_UINT32 hi_hci_bridge_flags;   /* 0xa0 */
+	A_UINT32 hi_hci_uart_support_pins;      /* 0xa4 */
+	/* NOTE: byte [0] = RESET pin (bit 7 is polarity), bytes[1]..bytes[3] are for future use */
+	A_UINT32 hi_hci_uart_pwr_mgmt_params;   /* 0xa8 */
+	/* 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
+	 *        [31:16]: wakeup timeout in ms
+	 */
+	/* Pointer to extended board Data  */
+	A_UINT32 hi_board_ext_data;     /* 0xac */
+	A_UINT32 hi_board_ext_data_config;      /* 0xb0 */
+	/*
+	 * Bit [0]  :   valid
+	 * Bit[31:16:   size
+	 */
+	/*
+	 * hi_reset_flag is used to do some stuff when target reset.
+	 * such as restore app_start after warm reset or
+	 * preserve host Interest area, or preserve ROM data, literals etc.
+	 */
+	A_UINT32 hi_reset_flag; /* 0xb4 */
+	/* indicate hi_reset_flag is valid */
+	A_UINT32 hi_reset_flag_valid;   /* 0xb8 */
+	A_UINT32 hi_hci_uart_pwr_mgmt_params_ext;       /* 0xbc */
+	/* 0xbc - [31:0]: idle timeout in ms
+	 */
+	/* ACS flags */
+	A_UINT32 hi_acs_flags;  /* 0xc0 */
+	A_UINT32 hi_console_flags;      /* 0xc4 */
+	A_UINT32 hi_nvram_state;        /* 0xc8 */
+	A_UINT32 hi_option_flag2;       /* 0xcc */
+
+	/* If non-zero, override values sent to Host in WMI_READY event. */
+	A_UINT32 hi_sw_version_override;        /* 0xd0 */
+	A_UINT32 hi_abi_version_override;       /* 0xd4 */
+
+	/* Percentage of high priority RX traffic to total expected RX traffic -
+	 * applicable only to ar6004 */
+	A_UINT32 hi_hp_rx_traffic_ratio;        /* 0xd8 */
+
+	/* test applications flags */
+	A_UINT32 hi_test_apps_related;  /* 0xdc */
+	/* location of test script */
+	A_UINT32 hi_ota_testscript;     /* 0xe0 */
+	/* location of CAL data */
+	A_UINT32 hi_cal_data;   /* 0xe4 */
+
+	/* Number of packet log buffers */
+	A_UINT32 hi_pktlog_num_buffers; /* 0xe8 */
+
+	/* wow extension configuration */
+	A_UINT32 hi_wow_ext_config;     /* 0xec */
+	A_UINT32 hi_pwr_save_flags;     /* 0xf0 */
+
+	/* Spatial Multiplexing Power Save (SMPS) options */
+	A_UINT32 hi_smps_options;       /* 0xf4 */
+
+	/* Interconnect-specific state */
+	A_UINT32 hi_interconnect_state; /* 0xf8 */
+
+	/* Coex configuration flags */
+	A_UINT32 hi_coex_config;        /* 0xfc */
+
+	/* Early allocation support */
+	A_UINT32 hi_early_alloc;        /* 0x100 */
+
+	/* FW swap field */
+	/* Bits of this 32bit word will be used to pass specific swap
+	   instruction to FW */
+	/* Bit 0 -- AP Nart descriptor no swap. When this bit is set
+	   FW will not swap TX descriptor. Meaning packets are formed
+	   on the target processor. */
+	/* Bit 1 -- TBD */
+
+	A_UINT32 hi_fw_swap;    /* 0x104 */
+
+	/* global arenas pointer address, used by host driver debug */
+	A_UINT32 hi_dynamic_mem_arenas_addr;    /* 0x108 */
+
+	/* allocated bytes of DRAM use by allocated */
+	A_UINT32 hi_dynamic_mem_allocated;      /* 0x10C */
+
+	/* remaining bytes of DRAM */
+	A_UINT32 hi_dynamic_mem_remaining;      /* 0x110 */
+
+	/* memory track count, configured by host */
+	A_UINT32 hi_dynamic_mem_track_max;      /* 0x114 */
+
+	/* minidump buffer */
+	A_UINT32 hi_minidump;   /* 0x118 */
+
+	/* bdata's sig and key addr */
+	A_UINT32 hi_bd_sig_key; /* 0x11c */
+
+} POSTPACK64;
+
+/* bitmap for hi_test_apps_related */
+#define HI_TEST_APPS_TESTSCRIPT_LOADED   0x00000001
+#define HI_TEST_APPS_CAL_DATA_AVAIL      0x00000002
+
+/* Bits defined in hi_option_flag */
+#define HI_OPTION_TIMER_WAR         0x01        /* Enable timer workaround */
+#define HI_OPTION_BMI_CRED_LIMIT    0x02        /* Limit BMI command credits */
+#define HI_OPTION_RELAY_DOT11_HDR   0x04        /* Relay Dot11 hdr to/from host */
+#define HI_OPTION_MAC_ADDR_METHOD   0x08        /* MAC addr method 0-locally administred 1-globally unique addrs */
+#define HI_OPTION_FW_BRIDGE         0x10        /* Firmware Bridging */
+#define HI_OPTION_ENABLE_PROFILE    0x20        /* Enable CPU profiling */
+#define HI_OPTION_DISABLE_DBGLOG    0x40        /* Disable debug logging */
+#define HI_OPTION_SKIP_ERA_TRACKING 0x80        /* Skip Era Tracking */
+#define HI_OPTION_PAPRD_DISABLE     0x100       /* Disable PAPRD (debug) */
+#define HI_OPTION_NUM_DEV_LSB       0x200
+#define HI_OPTION_NUM_DEV_MSB       0x800
+#define HI_OPTION_DEV_MODE_LSB      0x1000
+#define HI_OPTION_DEV_MODE_MSB      0x8000000
+#define HI_OPTION_NO_LFT_STBL       0x10000000  /* Disable LowFreq Timer Stabilization */
+#define HI_OPTION_SKIP_REG_SCAN     0x20000000  /* Skip regulatory scan */
+#define HI_OPTION_INIT_REG_SCAN     0x40000000  /* Do regulatory scan during init before
+	                                         * sending WMI ready event to host */
+#define HI_OPTION_SKIP_MEMMAP       0x80000000  /* REV6: Do not adjust memory map */
+
+#define HI_OPTION_MAC_ADDR_METHOD_SHIFT 3
+
+/* 2 bits of hi_option_flag are used to represent 3 modes */
+#define HI_OPTION_FW_MODE_IBSS    0x0   /* IBSS Mode */
+#define HI_OPTION_FW_MODE_BSS_STA 0x1   /* STA Mode */
+#define HI_OPTION_FW_MODE_AP      0x2   /* AP Mode */
+#define HI_OPTION_FW_MODE_BT30AMP 0x3   /* BT30 AMP Mode */
+
+/* 2 bits of hi_option flag are usedto represent 4 submodes */
+#define HI_OPTION_FW_SUBMODE_NONE    0x0        /* Normal mode */
+#define HI_OPTION_FW_SUBMODE_P2PDEV  0x1        /* p2p device mode */
+#define HI_OPTION_FW_SUBMODE_P2PCLIENT 0x2      /* p2p client mode */
+#define HI_OPTION_FW_SUBMODE_P2PGO   0x3        /* p2p go mode */
+
+/* Num dev Mask */
+#define HI_OPTION_NUM_DEV_MASK    0x7
+#define HI_OPTION_NUM_DEV_SHIFT   0x9
+
+/* firmware bridging */
+#define HI_OPTION_FW_BRIDGE_SHIFT 0x04
+
+/* Fw Mode/SubMode Mask
+   |-------------------------------------------------------------------------------|
+ |   SUB   |   SUB   |   SUB   |  SUB    |         |         |         |         |
+ | MODE[3] | MODE[2] | MODE[1] | MODE[0] | MODE[3] | MODE[2] | MODE[1] | MODE[0] |
+ |   (2)   |   (2)   |   (2)   |   (2)   |   (2)   |   (2)   |   (2)   |   (2)   |
+ |||-------------------------------------------------------------------------------|
+ */
+#define HI_OPTION_FW_MODE_BITS         0x2
+#define HI_OPTION_FW_MODE_MASK         0x3
+#define HI_OPTION_FW_MODE_SHIFT        0xC
+#define HI_OPTION_ALL_FW_MODE_MASK     0xFF
+
+#define HI_OPTION_FW_SUBMODE_BITS      0x2
+#define HI_OPTION_FW_SUBMODE_MASK      0x3
+#define HI_OPTION_FW_SUBMODE_SHIFT     0x14
+#define HI_OPTION_ALL_FW_SUBMODE_MASK  0xFF00
+#define HI_OPTION_ALL_FW_SUBMODE_SHIFT 0x8
+
+/* hi_option_flag2 options */
+#define HI_OPTION_OFFLOAD_AMSDU     0x01
+#define HI_OPTION_DFS_SUPPORT       0x02        /* Enable DFS support */
+#define HI_OPTION_ENABLE_RFKILL     0x04        /* RFKill Enable Feature */
+#define HI_OPTION_RADIO_RETENTION_DISABLE     0x08      /* Disable radio retention */
+#define HI_OPTION_EARLY_CFG_DONE    0x10        /* Early configuration is complete */
+
+#define HI_OPTION_RF_KILL_SHIFT     0x2
+#define HI_OPTION_RF_KILL_MASK      0x1
+
+/* AR9888 1.0 only. Enable/disable CDC max perf support from host */
+#define HI_OPTION_DISABLE_CDC_MAX_PERF_WAR  0x20
+#define CDC_MAX_PERF_WAR_ENABLED()    \
+	(!(HOST_INTEREST->hi_option_flag2 & HI_OPTION_DISABLE_CDC_MAX_PERF_WAR))
+
+#define HI_OPTION_USE_EXT_LDO       0x40        /* use LDO27 for 1.1V instead of PMU */
+#define HI_OPTION_DBUART_SUPPORT    0x80        /* Enable uart debug support */
+#define HT_OPTION_GPIO_WAKEUP_SUPPORT    0x200 /* GPIO wake up support */
+#define GPIO_WAKEUP_ENABLED() \
+			 (HOST_INTEREST->hi_option_flag2 & HT_OPTION_GPIO_WAKEUP_SUPPORT)
+
+/* hi_reset_flag */
+#define HI_RESET_FLAG_PRESERVE_APP_START         0x01   /* preserve App Start address */
+#define HI_RESET_FLAG_PRESERVE_HOST_INTEREST     0x02   /* preserve host interest */
+#define HI_RESET_FLAG_PRESERVE_ROMDATA           0x04   /* preserve ROM data */
+#define HI_RESET_FLAG_PRESERVE_NVRAM_STATE       0x08
+#define HI_RESET_FLAG_PRESERVE_BOOT_INFO         0x10
+#define HI_RESET_FLAG_WARM_RESET        0x20
+
+/* define hi_fw_swap bits */
+#define HI_DESC_IN_FW_BIT       0x01
+
+#define HI_RESET_FLAG_IS_VALID  0x12345678      /* indicate the reset flag is valid */
+
+#define ON_RESET_FLAGS_VALID() \
+	(HOST_INTEREST->hi_reset_flag_valid == HI_RESET_FLAG_IS_VALID)
+
+#define RESET_FLAGS_VALIDATE()	\
+	(HOST_INTEREST->hi_reset_flag_valid = HI_RESET_FLAG_IS_VALID)
+
+#define RESET_FLAGS_INVALIDATE() \
+	(HOST_INTEREST->hi_reset_flag_valid = 0)
+
+#define ON_RESET_PRESERVE_APP_START() \
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_APP_START)
+
+#define ON_RESET_PRESERVE_NVRAM_STATE()	\
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_NVRAM_STATE)
+
+#define ON_RESET_PRESERVE_HOST_INTEREST() \
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_HOST_INTEREST)
+
+#define ON_RESET_PRESERVE_ROMDATA() \
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_ROMDATA)
+
+#define ON_RESET_PRESERVE_BOOT_INFO() \
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_BOOT_INFO)
+
+#define ON_RESET_WARM_RESET() \
+	(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_WARM_RESET)
+
+/* host CPU endianness */
+#define HOST_ON_BE_CPU() \
+	(HOST_INTEREST->hi_be)
+
+/* AP nart no swap descriptor flag. Decsriptors are created on the target processor. */
+#define DESC_IN_FW() \
+	(HOST_INTEREST->hi_fw_swap & HI_DESC_IN_FW_BIT)
+
+#define HI_ACS_FLAGS_ENABLED        (1 << 0)    /* ACS is enabled */
+#define HI_ACS_FLAGS_USE_WWAN       (1 << 1)    /* Use physical WWAN device */
+#define HI_ACS_FLAGS_TEST_VAP       (1 << 2)    /* Use test VAP */
+
+/* CONSOLE FLAGS
+ *
+ * Bit Range  Meaning
+ * ---------  --------------------------------
+ *   2..0     UART ID (0 = Default)
+ *    3       Baud Select (0 = 9600, 1 = 115200)
+ *   30..4    Reserved
+ *    31      Enable Console
+ *
+ * */
+
+#define HI_CONSOLE_FLAGS_ENABLE       (1 << 31)
+#define HI_CONSOLE_FLAGS_UART_MASK    (0x7)
+#define HI_CONSOLE_FLAGS_UART_SHIFT   0
+#define HI_CONSOLE_FLAGS_BAUD_SELECT  (1 << 3)
+
+/* SM power save options */
+#define HI_SMPS_ALLOW_MASK            (0x00000001)
+#define HI_SMPS_MODE_MASK             (0x00000002)
+#define HI_SMPS_MODE_STATIC           (0x00000000)
+#define HI_SMPS_MODE_DYNAMIC          (0x00000002)
+#define HI_SMPS_DISABLE_AUTO_MODE     (0x00000004)
+#define HI_SMPS_DATA_THRESH_MASK      (0x000007f8)
+#define HI_SMPS_DATA_THRESH_SHIFT     (3)
+#define HI_SMPS_RSSI_THRESH_MASK      (0x0007f800)
+#define HI_SMPS_RSSI_THRESH_SHIFT     (11)
+#define HI_SMPS_LOWPWR_CM_MASK        (0x00380000)
+#define HI_SMPS_LOWPWR_CM_SHIFT       (15)
+#define HI_SMPS_HIPWR_CM_MASK         (0x03c00000)
+#define HI_SMPS_HIPWR_CM_SHIFT        (19)
+
+#define HOST_INTEREST_SMPS_GET_MODE()     (HOST_INTEREST->hi_smps_options & HI_SMPS_MODE_MASK)
+#define HOST_INTEREST_SMPS_GET_DATA_THRESH() ((HOST_INTEREST->hi_smps_options & HI_SMPS_DATA_THRESH_MASK) >> HI_SMPS_DATA_THRESH_SHIFT)
+#define HOST_INTEREST_SMPS_SET_DATA_THRESH(x) (((x) << HI_SMPS_DATA_THRESH_SHIFT) & HI_SMPS_DATA_THRESH_MASK)
+#define HOST_INTEREST_SMPS_GET_RSSI_THRESH() ((HOST_INTEREST->hi_smps_options & HI_SMPS_RSSI_THRESH_MASK) >> HI_SMPS_RSSI_THRESH_SHIFT)
+#define HOST_INTEREST_SMPS_SET_RSSI_THRESH(x) (((x) << HI_SMPS_RSSI_THRESH_SHIFT) & HI_SMPS_RSSI_THRESH_MASK)
+#define HOST_INTEREST_SMPS_SET_LOWPWR_CM()   ((HOST_INTEREST->hi_smps_options & HI_SMPS_LOWPWR_CM_MASK) >> HI_SMPS_LOWPWR_CM_SHIFT)
+#define HOST_INTEREST_SMPS_SET_HIPWR_CM() ((HOST_INTEREST->hi_smps_options << HI_SMPS_HIPWR_CM_MASK) & HI_SMPS_HIPWR_CM_SHIFT)
+#define HOST_INTEREST_SMPS_IS_AUTO_MODE_DISABLED() (HOST_INTEREST->hi_smps_options & HI_SMPS_DISABLE_AUTO_MODE)
+
+/* WOW Extension configuration
+ *
+ * Bit Range  Meaning
+ * ---------  --------------------------------
+ *   8..0     Size of each WOW pattern (max 511)
+ *   15..9    Number of patterns per list (max 127)
+ *   17..16   Number of lists (max 4)
+ *   30..18   Reserved
+ *   31       Enabled
+ *
+ *  set values (except enable) to zeros for default settings
+ *
+ * */
+
+#define HI_WOW_EXT_ENABLED_MASK        (1 << 31)
+#define HI_WOW_EXT_NUM_LIST_SHIFT      16
+#define HI_WOW_EXT_NUM_LIST_MASK       (0x3 << HI_WOW_EXT_NUM_LIST_SHIFT)
+#define HI_WOW_EXT_NUM_PATTERNS_SHIFT  9
+#define HI_WOW_EXT_NUM_PATTERNS_MASK   (0x7F << HI_WOW_EXT_NUM_PATTERNS_SHIFT)
+#define HI_WOW_EXT_PATTERN_SIZE_SHIFT  0
+#define HI_WOW_EXT_PATTERN_SIZE_MASK   (0x1FF << HI_WOW_EXT_PATTERN_SIZE_SHIFT)
+
+#define HI_WOW_EXT_MAKE_CONFIG(num_lists,count,size) \
+	((((num_lists) << HI_WOW_EXT_NUM_LIST_SHIFT) & HI_WOW_EXT_NUM_LIST_MASK)     | \
+	 (((count) << HI_WOW_EXT_NUM_PATTERNS_SHIFT) & HI_WOW_EXT_NUM_PATTERNS_MASK)  |	\
+	 (((size) << HI_WOW_EXT_PATTERN_SIZE_SHIFT) & HI_WOW_EXT_PATTERN_SIZE_MASK))
+
+#define HI_WOW_EXT_GET_NUM_LISTS(config)     \
+	(((config) & HI_WOW_EXT_NUM_LIST_MASK) >> HI_WOW_EXT_NUM_LIST_SHIFT)
+#define HI_WOW_EXT_GET_NUM_PATTERNS(config)  \
+	(((config) & HI_WOW_EXT_NUM_PATTERNS_MASK) >> HI_WOW_EXT_NUM_PATTERNS_SHIFT)
+#define HI_WOW_EXT_GET_PATTERN_SIZE(config)  \
+	(((config) & HI_WOW_EXT_PATTERN_SIZE_MASK) >> HI_WOW_EXT_PATTERN_SIZE_SHIFT)
+
+/*
+ * Early allocation configuration
+ * Support RAM bank configuration before BMI done and this eases the memory
+ * allocation at very early stage
+ * Bit Range  Meaning
+ * ---------  ----------------------------------
+ * [0:3]      number of bank assigned to be IRAM
+ * [4:15]     reserved
+ * [16:31]    magic number
+ *
+ * Note:
+ * 1. target firmware would check magic number and if it's a match, firmware
+ *    would consider the bits[0:15] are valid and base on that to calculate
+ *    the end of DRAM. Early allocation would be located at that area and
+ *    may be reclaimed when necesary
+ * 2. if no magic number is found, early allocation would happen at "_end"
+ *    symbol of ROM which is located before the app-data and might NOT be
+ *    re-claimable. If this is adopted, link script should keep this in
+ *    mind to avoid data corruption.
+ */
+#define HI_EARLY_ALLOC_MAGIC                   0x6d8a
+#define HI_EARLY_ALLOC_MAGIC_MASK              0xffff0000
+#define HI_EARLY_ALLOC_MAGIC_SHIFT             16
+#define HI_EARLY_ALLOC_IRAM_BANKS_MASK         0x0000000f
+#define HI_EARLY_ALLOC_IRAM_BANKS_SHIFT        0
+
+#define HI_EARLY_ALLOC_VALID() \
+	((((HOST_INTEREST->hi_early_alloc) & HI_EARLY_ALLOC_MAGIC_MASK) >> HI_EARLY_ALLOC_MAGIC_SHIFT) \
+	 == (HI_EARLY_ALLOC_MAGIC))
+#define HI_EARLY_ALLOC_GET_IRAM_BANKS()	\
+	(((HOST_INTEREST->hi_early_alloc) & HI_EARLY_ALLOC_IRAM_BANKS_MASK) >> HI_EARLY_ALLOC_IRAM_BANKS_SHIFT)
+
+/*
+ * Intended for use by Host software, this macro returns the Target RAM
+ * address of any item in the host_interest structure.
+ * Example: target_addr = AR6002_HOST_INTEREST_ITEM_ADDRESS(hi_board_data);
+ */
+#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR6003_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6003_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR6004_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6004_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR6006_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6006_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR9888_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR9888_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR6320_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6320_HOST_INTEREST_ADDRESS))->item)))
+
+#define AR900B_HOST_INTEREST_ITEM_ADDRESS(item)	\
+	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR900B_HOST_INTEREST_ADDRESS))->item)))
+
+#define HOST_INTEREST_DBGLOG_IS_ENABLED() \
+	(!((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_DISABLE_DBGLOG))
+
+#define HOST_INTEREST_PKTLOG_IS_ENABLED() \
+	(((volatile A_UINT32)HOST_INTEREST->hi_pktlog_num_buffers))
+
+#define HOST_INTEREST_PROFILE_IS_ENABLED() \
+	((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_ENABLE_PROFILE)
+
+#define LF_TIMER_STABILIZATION_IS_ENABLED() \
+	(!((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_NO_LFT_STBL))
+
+#define IS_AMSDU_OFFLAOD_ENABLED() \
+	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_OFFLOAD_AMSDU))
+
+#define HOST_INTEREST_DFS_IS_ENABLED() \
+	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_DFS_SUPPORT))
+
+#define HOST_INTEREST_EARLY_CFG_DONE() \
+	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_EARLY_CFG_DONE))
+
+/*power save flag bit definitions*/
+#define HI_PWR_SAVE_LPL_ENABLED   0x1
+/*b1-b3 reserved*/
+/*b4-b5 : dev0 LPL type : 0 - none
+                          1- Reduce Pwr Search
+                          2- Reduce Pwr Listen*/
+/*b6-b7 : dev1 LPL type and so on for Max 8 devices*/
+#define HI_PWR_SAVE_LPL_DEV0_LSB   4
+#define HI_PWR_SAVE_LPL_DEV_MASK   0x3
+/*power save related utility macros*/
+#define HI_LPL_ENABLED() \
+	((HOST_INTEREST->hi_pwr_save_flags & HI_PWR_SAVE_LPL_ENABLED))
+#define HI_DEV_LPL_TYPE_GET(_devix)   \
+	(HOST_INTEREST->hi_pwr_save_flags & \
+	 ((HI_PWR_SAVE_LPL_DEV_MASK) <<	\
+	  (HI_PWR_SAVE_LPL_DEV0_LSB + \
+	   (_devix)*2)))
+
+#define HOST_INTEREST_SMPS_IS_ALLOWED()	\
+	((HOST_INTEREST->hi_smps_options & HI_SMPS_ALLOW_MASK))
+
+/* Convert a Target virtual address into a Target physical address */
+#define AR6002_VTOP(vaddr) ((vaddr) & 0x001fffff)
+#define AR6003_VTOP(vaddr) ((vaddr) & 0x001fffff)
+#define AR6004_VTOP(vaddr) (vaddr)
+#define AR6006_VTOP(vaddr) (vaddr)
+#define AR9888_VTOP(vaddr) (vaddr)
+#define AR6320_VTOP(vaddr) (vaddr)
+#define AR900B_VTOP(vaddr) (vaddr)
+#define TARG_VTOP(TargetType, vaddr) \
+	(((TargetType) == TARGET_TYPE_AR6002) ? AR6002_VTOP(vaddr) : \
+	 (((TargetType) == TARGET_TYPE_AR6003) ? AR6003_VTOP(vaddr) : \
+	  (((TargetType) == TARGET_TYPE_AR6004) ? AR6004_VTOP(vaddr) : \
+	   (((TargetType) == TARGET_TYPE_AR6006) ? AR6006_VTOP(vaddr) :	\
+	    (((TargetType) == TARGET_TYPE_AR9888) ? AR9888_VTOP(vaddr) : \
+	    (((TargetType) == TARGET_TYPE_AR6320) ? AR6320_VTOP(vaddr) : \
+	    (((TargetType) == TARGET_TYPE_AR900B) ? AR900B_VTOP(vaddr) : \
+	    0)))))))
+
+#define HOST_INTEREST_ITEM_ADDRESS(TargetType, item) \
+	(((TargetType) == TARGET_TYPE_AR6002) ? AR6002_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	 (((TargetType) == TARGET_TYPE_AR6003) ? AR6003_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	  (((TargetType) == TARGET_TYPE_AR6004) ? AR6004_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	   (((TargetType) == TARGET_TYPE_AR6006) ? AR6006_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	    (((TargetType) == TARGET_TYPE_AR9888) ? AR9888_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	    (((TargetType) == TARGET_TYPE_AR6320) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	    (((TargetType) == TARGET_TYPE_AR6320V2) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) :	\
+	    (((TargetType) == TARGET_TYPE_AR900B) ? AR900B_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	    0))))))))
+
+#define AR6002_BOARD_DATA_SZ 768
+#define AR6002_BOARD_EXT_DATA_SZ 0
+#define AR6003_BOARD_DATA_SZ 1024
+/* Reserve 1024 bytes for extended board data */
+#if defined(AR6002_REV43)
+#define AR6003_BOARD_EXT_DATA_SZ 1024
+#else
+#define AR6003_BOARD_EXT_DATA_SZ 768
+#endif
+#define AR6004_BOARD_DATA_SZ     7168
+#define AR6004_BOARD_EXT_DATA_SZ 0
+#define AR9888_BOARD_DATA_SZ     7168
+#define AR9888_BOARD_EXT_DATA_SZ 0
+#define AR6320_BOARD_DATA_SZ     8192
+#define AR6320_BOARD_EXT_DATA_SZ 0
+#define AR900B_BOARD_DATA_SZ     7168
+#define AR900B_BOARD_EXT_DATA_SZ 0
+
+#define AR6003_REV3_APP_START_OVERRIDE          0x946100
+#define AR6003_REV3_APP_LOAD_ADDRESS            0x545000
+#define AR6003_REV3_BOARD_EXT_DATA_ADDRESS      0x542330
+#define AR6003_REV3_DATASET_PATCH_ADDRESS       0x57FF74
+#define AR6003_REV3_RAM_RESERVE_SIZE            4096
+
+#define AR6004_REV1_BOARD_DATA_ADDRESS          0x423900
+#define AR6004_REV1_RAM_RESERVE_SIZE            19456
+#define AR6004_REV1_DATASET_PATCH_ADDRESS       0x425294
+
+#define AR6004_REV2_BOARD_DATA_ADDRESS          0x426400
+#define AR6004_REV2_RAM_RESERVE_SIZE            7168
+#define AR6004_REV2_DATASET_PATCH_ADDRESS       0x435294
+
+#define AR6004_REV5_BOARD_DATA_ADDRESS          0x436400
+#define AR6004_REV5_RAM_RESERVE_SIZE            7168
+#define AR6004_REV5_DATASET_PATCH_ADDRESS       0x437860
+
+/* Reserve 4K for OTA test script */
+#define AR6004_REV1_RAM_RESERVE_SIZE_FOR_TEST_SCRIPT    4096
+#define AR6004_REV1_TEST_SCRIPT_ADDRESS       0x422900
+
+/* # of A_UINT32 entries in targregs, used by DIAG_FETCH_TARG_REGS */
+#define AR6003_FETCH_TARG_REGS_COUNT 64
+#define AR6004_FETCH_TARG_REGS_COUNT 64
+#define AR9888_FETCH_TARG_REGS_COUNT 64
+#define AR6320_FETCH_TARG_REGS_COUNT 64
+#define AR900B_FETCH_TARG_REGS_COUNT 64
+
+#endif /* !__ASSEMBLER__ */
+
+#ifndef ATH_TARGET
+#include "athendpack.h"
+#endif
+
+#endif /* __TARGADDRS_H__ */
diff --git a/target/inc/targcfg.h b/target/inc/targcfg.h
new file mode 100644
index 0000000..52a8d41
--- /dev/null
+++ b/target/inc/targcfg.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __TARGCFG_H__
+#define __TARGCFG_H__
+
+#if defined(ATH_TARGET)
+#include <osapi.h>              /* A_UINT32 */
+#else
+#include <a_types.h>            /* A_UINT32 */
+#endif
+
+typedef struct _targcfg_t {
+	A_UINT32 num_vdev;
+	A_UINT32 num_peers;
+	A_UINT32 num_peer_ast;
+	A_UINT32 num_peer_keys;
+	A_UINT32 num_peer_tid;
+	A_UINT32 num_mcast_keys;
+	A_UINT32 num_tx;
+	A_UINT32 num_rx;
+	A_UINT32 num_mgmt_tx;
+	A_UINT32 num_mgmt_rx;
+	A_UINT32 tx_chain_mask;
+	A_UINT32 rx_chain_mask;
+	A_UINT32 override;      /* Override target with the values supplied above */
+} targcfg_t;
+
+#endif /* __TARGCFG_H__ */
diff --git a/target/inc/wal_rx_desc.h b/target/inc/wal_rx_desc.h
new file mode 100644
index 0000000..04cd50d
--- /dev/null
+++ b/target/inc/wal_rx_desc.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2011-2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _WAL_RX_DESC__H_
+#define _WAL_RX_DESC__H_
+
+#if defined(ATH_TARGET)
+#include <athdefs.h>            /* A_UINT8 */
+#else
+#include <a_types.h>            /* A_UINT8 */
+#endif
+
+/*
+ * As this header is used by host also,
+ * and host will access target registers by target reg tbl,
+ * so disable direct-reference here for host.
+ *
+ */
+#if !defined(ATH_PERF_PWR_OFFLOAD)
+/* HW rx descriptor definitions */
+#include <hw/mac_descriptors/rx_attention.h>
+#include <hw/mac_descriptors/rx_frag_info.h>
+#include <hw/mac_descriptors/rx_msdu_start.h>
+#include <hw/mac_descriptors/rx_msdu_end.h>
+#include <hw/mac_descriptors/rx_mpdu_start.h>
+#include <hw/mac_descriptors/rx_mpdu_end.h>
+#include <hw/mac_descriptors/rx_ppdu_start.h>
+#include <hw/mac_descriptors/rx_ppdu_end.h>
+/*
+ * This struct defines the basic descriptor information, which is
+ * written by the 11ac HW MAC into the WAL's rx status descriptor
+ * ring.
+ */
+struct hw_rx_desc_base {
+	struct rx_attention attention;
+	struct rx_frag_info frag_info;
+	struct rx_mpdu_start mpdu_start;
+	struct rx_msdu_start msdu_start;
+	struct rx_msdu_end msdu_end;
+	struct rx_mpdu_end mpdu_end;
+	struct rx_ppdu_start ppdu_start;
+	struct rx_ppdu_end ppdu_end;
+};
+#endif
+
+/*
+ * This struct defines the basic MSDU rx descriptor created by FW.
+ */
+struct fw_rx_desc_base {
+	union {
+		struct {
+			A_UINT8 discard : 1,
+				forward : 1,
+				any_err : 1,
+				dup_err : 1, reserved : 1, inspect : 1, extension : 2;
+		} bits;
+		A_UINT8 val;
+	} u;
+};
+
+#define FW_RX_DESC_DISCARD_M 0x1
+#define FW_RX_DESC_DISCARD_S 0
+#define FW_RX_DESC_FORWARD_M 0x2
+#define FW_RX_DESC_FORWARD_S 1
+#define FW_RX_DESC_MIC_ERR_M 0x4
+#define FW_RX_DESC_MIC_ERR_S 2
+#define FW_RX_DESC_DUP_ERR_M 0x8
+#define FW_RX_DESC_DUP_ERR_S 3
+#define FW_RX_DESC_INSPECT_M 0x20
+#define FW_RX_DESC_INSPECT_S 5
+#define FW_RX_DESC_EXT_M     0xc0
+#define FW_RX_DESC_EXT_S     6
+
+#define FW_RX_DESC_CNT_2_BYTES(_fw_desc_cnt)    (_fw_desc_cnt)
+
+enum {
+	FW_RX_DESC_EXT_NONE = 0,
+	FW_RX_DESC_EXT_LRO_ONLY,
+	FW_RX_DESC_EXT_LRO_AND_OTHER,
+	FW_RX_DESC_EXT_OTHER
+};
+
+#define FW_RX_DESC_DISCARD_GET(_var) \
+	(((_var) & FW_RX_DESC_DISCARD_M) >> FW_RX_DESC_DISCARD_S)
+#define FW_RX_DESC_DISCARD_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_DESC_DISCARD_S))
+
+#define FW_RX_DESC_FORWARD_GET(_var) \
+	(((_var) & FW_RX_DESC_FORWARD_M) >> FW_RX_DESC_FORWARD_S)
+#define FW_RX_DESC_FORWARD_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_DESC_FORWARD_S))
+
+#define FW_RX_DESC_INSPECT_GET(_var) \
+	(((_var) & FW_RX_DESC_INSPECT_M) >> FW_RX_DESC_INSPECT_S)
+#define FW_RX_DESC_INSPECT_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_DESC_INSPECT_S))
+
+#define FW_RX_DESC_EXT_GET(_var) \
+	(((_var) & FW_RX_DESC_EXT_M) >> FW_RX_DESC_EXT_S)
+#define FW_RX_DESC_EXT_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_DESC_EXT_S))
+
+#endif /* _WAL_RX_DESC__H_ */
diff --git a/target/inc/wlan_defs.h b/target/inc/wlan_defs.h
new file mode 100644
index 0000000..3588a30
--- /dev/null
+++ b/target/inc/wlan_defs.h
@@ -0,0 +1,800 @@
+/*
+ * Copyright (c) 2004-2010, 2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __WLANDEFS_H__
+#define __WLANDEFS_H__
+
+/* A_COMPILE_TIME_ASSERT */
+#include <a_osapi.h>
+#include <osdep.h>
+
+/*
+ * This file contains WLAN definitions that may be used across both
+ * Host and Target software.
+ */
+/*
+ * MAX_SPATIAL_STREAM should be defined in a fwconfig_xxx.h file,
+ * but for now provide a default value here in case it's not defined
+ * in the fwconfig_xxx.h file.
+ */
+#ifndef MAX_SPATIAL_STREAM
+#define MAX_SPATIAL_STREAM 3
+#endif
+
+/*
+ * MAX_SPATIAL_STREAM_ANY -
+ * what is the largest number of spatial streams that any target supports
+ */
+#define MAX_SPATIAL_STREAM_ANY 4
+
+#ifndef CONFIG_160MHZ_SUPPORT
+#define CONFIG_160MHZ_SUPPORT 0
+#endif
+
+typedef enum {
+	MODE_11A = 0,           /* 11a Mode */
+	MODE_11G = 1,           /* 11b/g Mode */
+	MODE_11B = 2,           /* 11b Mode */
+	MODE_11GONLY = 3,       /* 11g only Mode */
+	MODE_11NA_HT20 = 4,     /* 11a HT20 mode */
+	MODE_11NG_HT20 = 5,     /* 11g HT20 mode */
+	MODE_11NA_HT40 = 6,     /* 11a HT40 mode */
+	MODE_11NG_HT40 = 7,     /* 11g HT40 mode */
+	MODE_11AC_VHT20 = 8,
+	MODE_11AC_VHT40 = 9,
+	MODE_11AC_VHT80 = 10,
+	MODE_11AC_VHT20_2G = 11,
+	MODE_11AC_VHT40_2G = 12,
+	MODE_11AC_VHT80_2G = 13,
+#if CONFIG_160MHZ_SUPPORT != 0
+	MODE_11AC_VHT80_80 = 14,
+	MODE_11AC_VHT160   = 15,
+#endif
+
+	MODE_UNKNOWN,
+	MODE_UNKNOWN_NO_160MHZ_SUPPORT = 14,
+	MODE_UNKNOWN_160MHZ_SUPPORT = 16,
+	MODE_MAX        = MODE_UNKNOWN,
+	MODE_MAX_NO_160_MHZ_SUPPORT = MODE_UNKNOWN_NO_160MHZ_SUPPORT,
+	MODE_MAX_160_MHZ_SUPPORT    = MODE_UNKNOWN_160MHZ_SUPPORT,
+} WLAN_PHY_MODE;
+
+#if CONFIG_160MHZ_SUPPORT == 0
+A_COMPILE_TIME_ASSERT(
+	mode_unknown_value_consistency_Check,
+	MODE_UNKNOWN == MODE_UNKNOWN_NO_160MHZ_SUPPORT);
+#else
+A_COMPILE_TIME_ASSERT(
+	mode_unknown_value_consistency_Check,
+	MODE_UNKNOWN == MODE_UNKNOWN_160MHZ_SUPPORT);
+#endif
+
+typedef enum {
+	VHT_MODE_NONE = 0,      /* NON VHT Mode, e.g., HT, DSSS, CCK */
+	VHT_MODE_20M = 1,
+	VHT_MODE_40M = 2,
+	VHT_MODE_80M = 3,
+	VHT_MODE_160M = 4
+} VHT_OPER_MODE;
+
+typedef enum {
+	WLAN_11A_CAPABILITY = 1,
+	WLAN_11G_CAPABILITY = 2,
+	WLAN_11AG_CAPABILITY = 3,
+} WLAN_CAPABILITY;
+
+#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
+#define A_RATEMASK A_UINT64
+#else
+#define A_RATEMASK A_UINT32
+#endif
+
+#define A_RATEMASK_NUM_OCTET (sizeof (A_RATEMASK))
+#define A_RATEMASK_NUM_BITS ((sizeof (A_RATEMASK)) << 3)
+
+#if CONFIG_160MHZ_SUPPORT != 0
+#define IS_MODE_VHT(mode) (((mode) == MODE_11AC_VHT20) || \
+	((mode) == MODE_11AC_VHT40)     || \
+	((mode) == MODE_11AC_VHT80)     || \
+	((mode) == MODE_11AC_VHT80_80) || \
+	((mode) == MODE_11AC_VHT160))
+#else
+#define IS_MODE_VHT(mode) (((mode) == MODE_11AC_VHT20) || \
+			   ((mode) == MODE_11AC_VHT40) || \
+			   ((mode) == MODE_11AC_VHT80))
+#endif
+
+#define IS_MODE_VHT_2G(mode) (((mode) == MODE_11AC_VHT20_2G) ||	\
+			      ((mode) == MODE_11AC_VHT40_2G) ||	\
+			      ((mode) == MODE_11AC_VHT80_2G))
+
+#define IS_MODE_11A(mode)       (((mode) == MODE_11A) || \
+				 ((mode) == MODE_11NA_HT20) || \
+				 ((mode) == MODE_11NA_HT40) || \
+				 (IS_MODE_VHT(mode)))
+
+#define IS_MODE_11B(mode)       ((mode) == MODE_11B)
+#define IS_MODE_11G(mode)       (((mode) == MODE_11G) || \
+				 ((mode) == MODE_11GONLY) || \
+				 ((mode) == MODE_11NG_HT20) || \
+				 ((mode) == MODE_11NG_HT40) || \
+				 (IS_MODE_VHT_2G(mode)))
+#define IS_MODE_11GN(mode)      (((mode) == MODE_11NG_HT20) || \
+				 ((mode) == MODE_11NG_HT40))
+#define IS_MODE_11GONLY(mode)   ((mode) == MODE_11GONLY)
+
+enum {
+	/* 11a channels */
+	REGDMN_MODE_11A              = 0x00000001,
+	/* 11a turbo-only channels */
+	REGDMN_MODE_TURBO            = 0x00000002,
+	/* 11b channels */
+	REGDMN_MODE_11B              = 0x00000004,
+	/* 11g channels (OFDM only) */
+	REGDMN_MODE_PUREG            = 0x00000008,
+	/* XXX historical */
+	REGDMN_MODE_11G              = 0x00000008,
+	/* 11g+Turbo channels */
+	REGDMN_MODE_108G             = 0x00000020,
+	/* 11a+Turbo channels */
+	REGDMN_MODE_108A             = 0x00000040,
+	/* XR channels */
+	REGDMN_MODE_XR               = 0x00000100,
+	/* 11A half rate channels */
+	REGDMN_MODE_11A_HALF_RATE    = 0x00000200,
+	/* 11A quarter rate channels */
+	REGDMN_MODE_11A_QUARTER_RATE = 0x00000400,
+	/* 11N-G HT20 channels */
+	REGDMN_MODE_11NG_HT20        = 0x00000800,
+	/* 11N-A HT20 channels */
+	REGDMN_MODE_11NA_HT20        = 0x00001000,
+	/* 11N-G HT40 + channels */
+	REGDMN_MODE_11NG_HT40PLUS    = 0x00002000,
+	/* 11N-G HT40 - channels */
+	REGDMN_MODE_11NG_HT40MINUS   = 0x00004000,
+	/* 11N-A HT40 + channels */
+	REGDMN_MODE_11NA_HT40PLUS    = 0x00008000,
+	/* 11N-A HT40 - channels */
+	REGDMN_MODE_11NA_HT40MINUS   = 0x00010000,
+	/* 5Ghz, VHT20 */
+	REGDMN_MODE_11AC_VHT20       = 0x00020000,
+	/* 5Ghz, VHT40 + channels */
+	REGDMN_MODE_11AC_VHT40PLUS   = 0x00040000,
+	/* 5Ghz  VHT40 - channels */
+	REGDMN_MODE_11AC_VHT40MINUS  = 0x00080000,
+	/* 5Ghz, VHT80 channels */
+	REGDMN_MODE_11AC_VHT80       = 0x000100000,
+	REGDMN_MODE_11AC_VHT20_2G    = 0x000200000, /* 2Ghz, VHT20 */
+	REGDMN_MODE_11AC_VHT40_2G    = 0x000400000, /* 2Ghz, VHT40 */
+	REGDMN_MODE_11AC_VHT80_2G    = 0x000800000, /* 2Ghz, VHT80 */
+	REGDMN_MODE_11AC_VHT160      = 0x001000000, /* 5Ghz, VHT160 */
+};
+
+#define REGDMN_MODE_ALL (0xFFFFFFFF)	/* REGDMN_MODE_ALL is defined out of the enum
+										 * to prevent the ARM compile "warning #66:
+										 * enumeration value is out of int range"
+										 * Anyway, this is a BIT-OR of all possible values.
+										 */
+
+#define REGDMN_CAP1_CHAN_HALF_RATE        0x00000001
+#define REGDMN_CAP1_CHAN_QUARTER_RATE     0x00000002
+#define REGDMN_CAP1_CHAN_HAL49GHZ         0x00000004
+
+/* regulatory capabilities */
+#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND   0x0040
+#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN    0x0080
+#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2         0x0100
+#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND    0x0200
+#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD     0x0400
+#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A    0x0800
+
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals WMI_TLVTAG_STRUC_HAL_REG_CAPABILITIES */
+	A_UINT32 eeprom_rd;     /* regdomain value specified in EEPROM */
+	A_UINT32 eeprom_rd_ext; /* regdomain */
+	A_UINT32 regcap1;       /* CAP1 capabilities bit map. */
+	A_UINT32 regcap2;       /* REGDMN EEPROM CAP. */
+	A_UINT32 wireless_modes;        /* REGDMN MODE */
+	A_UINT32 low_2ghz_chan;
+	A_UINT32 high_2ghz_chan;
+	A_UINT32 low_5ghz_chan;
+	A_UINT32 high_5ghz_chan;
+} HAL_REG_CAPABILITIES;
+
+typedef enum {
+	WHAL_REG_EXT_FCC_MIDBAND = 0,
+	WHAL_REG_EXT_JAPAN_MIDBAND = 1,
+	WHAL_REG_EXT_FCC_DFS_HT40 = 2,
+	WHAL_REG_EXT_JAPAN_NONDFS_HT40 = 3,
+	WHAL_REG_EXT_JAPAN_DFS_HT40 = 4,
+	WHAL_REG_EXT_FCC_CH_144 = 5,
+} WHAL_REG_EXT_BITMAP;
+
+/*
+ * Used to update rate-control logic with the status of the tx-completion.
+ * In host-based implementation of the rate-control feature, this struture is used to
+ * create the payload for HTT message/s from target to host.
+ */
+
+typedef struct {
+	A_UINT8 rateCode;
+	A_UINT8 flags;
+} RATE_CODE;
+
+typedef struct {
+	RATE_CODE ptx_rc;       /* rate code, bw, chain mask sgi */
+	A_UINT8 reserved[2];
+	A_UINT32 flags;         /* Encodes information such as excessive
+							   retransmission, aggregate, some info
+							   from .11 frame control,
+							   STBC, LDPC, (SGI and Tx Chain Mask
+							   are encoded in ptx_rc->flags field),
+							   AMPDU truncation (BT/time based etc.),
+							   RTS/CTS attempt  */
+	A_UINT32 num_enqued;    /* # of MPDUs (for non-AMPDU 1) for this rate */
+	A_UINT32 num_retries;   /* Total # of transmission attempt for this rate */
+	A_UINT32 num_failed;    /* # of failed MPDUs in A-MPDU, 0 otherwise */
+	A_UINT32 ack_rssi;      /* ACK RSSI: b'7..b'0 avg RSSI across all chain */
+	A_UINT32 time_stamp;    /* ACK timestamp (helps determine age) */
+	A_UINT32 is_probe;      /* Valid if probing. Else, 0 */
+	A_UINT32 ba_win_size;   /* b'7..b0, block Ack Window size, b'31..b8 Resvd */
+	A_UINT32 failed_ba_bmap_0_31;   /* failed BA bitmap 0..31 */
+	A_UINT32 failed_ba_bmap_32_63;  /* failed BA bitmap 32..63 */
+	A_UINT32 bmap_tried_0_31;       /* enqued bitmap 0..31 */
+	A_UINT32 bmap_tried_32_63;      /* enqued bitmap 32..63 */
+} RC_TX_DONE_PARAMS;
+
+#define RC_SET_TX_DONE_INFO(_dst, _rc, _f, _nq, _nr, _nf, _rssi, _ts) \
+	do {								  \
+		(_dst).ptx_rc.rateCode = (_rc).rateCode;		      \
+		(_dst).ptx_rc.flags    = (_rc).flags;			      \
+		(_dst).flags           = (_f);				      \
+		(_dst).num_enqued      = (_nq);				      \
+		(_dst).num_retries     = (_nr);				      \
+		(_dst).num_failed      = (_nf);				      \
+		(_dst).ack_rssi        = (_rssi);			      \
+		(_dst).time_stamp      = (_ts);				      \
+	} while (0)
+
+#define RC_SET_TXBF_DONE_INFO(_dst, _f)					\
+	do {								    \
+		(_dst).flags           |= (_f);					\
+	} while (0)
+
+/* NOTE: NUM_DYN_BW and NUM_SCHED_ENTRIES cannot be changed without breaking WMI Compatibility */
+#define NUM_SCHED_ENTRIES           2
+#define NUM_DYN_BW_MAX              4
+
+/* Some products only use 20/40/80; some use 20/40/80/160 */
+#ifndef NUM_DYN_BW
+/* default: support up through 80 MHz */
+#define NUM_DYN_BW                  3
+#endif
+
+#define NUM_DYN_BW_MASK             0x3
+
+#define PROD_SCHED_BW_ENTRIES       (NUM_SCHED_ENTRIES * NUM_DYN_BW)
+typedef A_UINT8 A_RATE;
+
+#if NUM_DYN_BW  > 4
+/* Extend rate table module first*/
+#error "Extend rate table module first"
+#endif
+
+#define MAX_IBSS_PEERS 32
+
+#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
+typedef struct {
+	A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT16 flags[NUM_SCHED_ENTRIES][NUM_DYN_BW];
+	A_RATE rix[NUM_SCHED_ENTRIES][NUM_DYN_BW];
+	A_UINT8 tpc[NUM_SCHED_ENTRIES][NUM_DYN_BW];
+	A_UINT32 antmask[NUM_SCHED_ENTRIES];
+	A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT16 txbf_cv_len;
+	A_UINT32 txbf_cv_ptr;
+	A_UINT16 txbf_flags;
+	A_UINT16 txbf_cv_size;
+	A_UINT8 txbf_nc_idx;
+	A_UINT8 tries[NUM_SCHED_ENTRIES];
+	A_UINT8 bw_mask[NUM_SCHED_ENTRIES];
+	A_UINT8 max_bw[NUM_SCHED_ENTRIES];
+	A_UINT8 num_sched_entries;
+	A_UINT8 paprd_mask;
+	A_UINT8 rts_rix;
+	A_UINT8 sh_pream;
+	A_UINT8 min_spacing_1_4_us;
+	A_UINT8 fixed_delims;
+	A_UINT8 bw_in_service;
+	A_RATE probe_rix;
+	A_UINT8 num_valid_rates;
+	A_UINT8 rtscts_tpc;
+} RC_TX_RATE_SCHEDULE;
+
+#else
+typedef struct {
+	A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_UINT32 antmask[NUM_SCHED_ENTRIES];
+	A_UINT32 txbf_cv_ptr;
+	A_UINT16 txbf_cv_len;
+	A_UINT8 tries[NUM_SCHED_ENTRIES];
+	A_UINT8 num_valid_rates;
+	A_UINT8 paprd_mask;
+	A_UINT8 rts_rix;
+	A_UINT8 sh_pream;
+	A_UINT8 min_spacing_1_4_us;
+	A_UINT8 fixed_delims;
+	A_UINT8 bw_in_service;
+	A_RATE probe_rix;
+} RC_TX_RATE_SCHEDULE;
+#endif
+
+typedef struct {
+	A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+	A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+#ifdef DYN_TPC_ENABLE
+	A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
+#endif
+#ifdef SECTORED_ANTENNA
+	A_UINT32 antmask[NUM_SCHED_ENTRIES];
+#endif
+	A_UINT8 tries[NUM_SCHED_ENTRIES];
+	A_UINT8 num_valid_rates;
+	A_UINT8 rts_rix;
+	A_UINT8 sh_pream;
+	A_UINT8 bw_in_service;
+	A_RATE probe_rix;
+	A_UINT8 dd_profile;
+} RC_TX_RATE_INFO;
+
+/*
+ * Temporarily continue to provide the WHAL_RC_INIT_RC_MASKS def in wlan_defsh
+ * for older targets.
+ * The WHAL_RX_INIT_RC_MASKS macro def needs to be moved into ratectrl_11ac.h
+ * for all targets, but until this is complete, the WHAL_RC_INIT_RC_MASKS def
+ * will be maintained here in its old location.
+ */
+#if CONFIG_160MHZ_SUPPORT == 0
+
+#define WHAL_RC_INIT_RC_MASKS(_rm) do {				\
+	_rm[WHAL_RC_MASK_IDX_NON_HT] = A_RATEMASK_OFDM_CCK;	\
+	_rm[WHAL_RC_MASK_IDX_HT_20] = A_RATEMASK_HT_20;		\
+	_rm[WHAL_RC_MASK_IDX_HT_40] = A_RATEMASK_HT_40;		\
+	_rm[WHAL_RC_MASK_IDX_VHT_20] = A_RATEMASK_VHT_20;	\
+	_rm[WHAL_RC_MASK_IDX_VHT_40] = A_RATEMASK_VHT_40;	\
+	_rm[WHAL_RC_MASK_IDX_VHT_80] = A_RATEMASK_VHT_80;	\
+} while (0)
+#endif
+
+/**
+ * strucutre describing host memory chunk.
+ */
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wlan_host_memory_chunk */
+	/** id of the request that is passed up in service ready */
+	A_UINT32 req_id;
+	/** the physical address the memory chunk */
+	A_UINT32 ptr;
+	/** size of the chunk */
+	A_UINT32 size;
+} wlan_host_memory_chunk;
+
+#define NUM_UNITS_IS_NUM_VDEVS   0x1
+#define NUM_UNITS_IS_NUM_PEERS   0x2
+
+/**
+ * structure used by FW for requesting host memory
+ */
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals WMI_TLVTAG_STRUC_wlan_host_mem_req */
+
+	/** ID of the request */
+	A_UINT32 req_id;
+	/** size of the  of each unit */
+	A_UINT32 unit_size;
+	/**
+	 * flags to  indicate that
+	 * the number units is dependent
+	 * on number of resources(num vdevs num peers .. etc)
+	 */
+	A_UINT32 num_unit_info;
+	/*
+	 * actual number of units to allocate . if flags in the num_unit_info
+	 * indicate that number of units is tied to number of a particular
+	 * resource to allocate then  num_units filed is set to 0 and host
+	 * will derive the number units from number of the resources it is
+	 * requesting.
+	 */
+	A_UINT32 num_units;
+} wlan_host_mem_req;
+
+typedef enum {
+	IGNORE_DTIM = 0x01,
+	NORMAL_DTIM = 0x02,
+	STICK_DTIM = 0x03,
+	AUTO_DTIM = 0x04,
+} BEACON_DTIM_POLICY;
+
+/* During test it is observed that 6 * 400 = 2400 can
+ * be alloced in addition to CFG_TGT_NUM_MSDU_DESC.
+ * If there is any change memory requirement, this number
+ * needs to be revisited. */
+#define TOTAL_VOW_ALLOCABLE 2400
+#define VOW_DESC_GRAB_MAX 800
+
+#define VOW_GET_NUM_VI_STA(vow_config) (((vow_config) & 0xffff0000) >> 16)
+#define VOW_GET_DESC_PER_VI_STA(vow_config) ((vow_config) & 0x0000ffff)
+
+/***TODO!!! Get these values dynamically in WMI_READY event and use it to calculate the mem req*/
+/* size in bytes required for msdu descriptor. If it changes, this should be updated. LARGE_AP
+ * case is not considered. LARGE_AP is disabled when VoW is enabled.*/
+#define MSDU_DESC_SIZE 20
+
+/* size in bytes required to support a peer in target.
+ * This obtained by considering Two tids per peer.
+ * peer structure = 168 bytes
+ * tid = 96 bytes (per sta 2 means we need 192 bytes)
+ * peer_cb = 16 * 2
+ * key = 52 * 2
+ * AST = 12 * 2
+ * rate, reorder.. = 384
+ * smart antenna = 50
+ */
+#define MEMORY_REQ_FOR_PEER 800
+
+/*
+ * NB: it is important to keep all the fields in the structure dword long
+ * so that it is easy to handle the statistics in BE host.
+ */
+
+struct wlan_dbg_tx_stats {
+	/* Num HTT cookies queued to dispatch list */
+	A_INT32 comp_queued;
+	/* Num HTT cookies dispatched */
+	A_INT32 comp_delivered;
+	/* Num MSDU queued to WAL */
+	A_INT32 msdu_enqued;
+	/* Num MPDU queue to WAL */
+	A_INT32 mpdu_enqued;
+	/* Num MSDUs dropped by WMM limit */
+	A_INT32 wmm_drop;
+	/* Num Local frames queued */
+	A_INT32 local_enqued;
+	/* Num Local frames done */
+	A_INT32 local_freed;
+	/* Num queued to HW */
+	A_INT32 hw_queued;
+	/* Num PPDU reaped from HW */
+	A_INT32 hw_reaped;
+	/* Num underruns */
+	A_INT32 underrun;
+#if defined(AR900B)
+	/* HW Paused. */
+	A_UINT32 hw_paused;
+#endif
+	/* Num PPDUs cleaned up in TX abort */
+	A_INT32 tx_abort;
+	/* Num MPDUs requed by SW */
+	A_INT32 mpdus_requed;
+	/* excessive retries */
+	A_UINT32 tx_ko;
+#if defined(AR900B)
+	A_UINT32 tx_xretry;
+#endif
+	/* data hw rate code */
+	A_UINT32 data_rc;
+	/* Scheduler self triggers */
+	A_UINT32 self_triggers;
+	/* frames dropped due to excessive sw retries */
+	A_UINT32 sw_retry_failure;
+	/* illegal rate phy errors  */
+	A_UINT32 illgl_rate_phy_err;
+	/* wal pdev continous xretry */
+	A_UINT32 pdev_cont_xretry;
+	/* wal pdev continous xretry */
+	A_UINT32 pdev_tx_timeout;
+	/* wal pdev resets  */
+	A_UINT32 pdev_resets;
+	/* frames dropped due to non-availability of stateless TIDs */
+	A_UINT32 stateless_tid_alloc_failure;
+	/* PhY/BB underrun */
+	A_UINT32 phy_underrun;
+	/* MPDU is more than txop limit */
+	A_UINT32 txop_ovf;
+#if defined(AR900B)
+	/* Number of Sequences posted */
+	A_UINT32 seq_posted;
+	/* Number of Sequences failed queueing */
+	A_UINT32 seq_failed_queueing;
+	/* Number of Sequences completed */
+	A_UINT32 seq_completed;
+	/* Number of Sequences restarted */
+	A_UINT32 seq_restarted;
+	/* Number of MU Sequences posted */
+	A_UINT32 mu_seq_posted;
+	/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
+	A_INT32 mpdus_sw_flush;
+	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
+	A_INT32 mpdus_hw_filter;
+	/* Num MPDUs truncated by PDG (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) */
+	A_INT32 mpdus_truncated;
+	/* Num MPDUs that was tried but didn't receive ACK or BA */
+	A_INT32 mpdus_ack_failed;
+	/* Num MPDUs that was dropped du to expiry. */
+	A_INT32 mpdus_expired;
+	/* Num mc drops */
+	/* A_UINT32 mc_drop; */
+#endif
+};
+
+struct wlan_dbg_rx_stats {
+	/* Cnts any change in ring routing mid-ppdu */
+	A_INT32 mid_ppdu_route_change;
+	/* Total number of statuses processed */
+	A_INT32 status_rcvd;
+	/* Extra frags on rings 0-3 */
+	A_INT32 r0_frags;
+	A_INT32 r1_frags;
+	A_INT32 r2_frags;
+	A_INT32 r3_frags;
+	/* MSDUs / MPDUs delivered to HTT */
+	A_INT32 htt_msdus;
+	A_INT32 htt_mpdus;
+	/* MSDUs / MPDUs delivered to local stack */
+	A_INT32 loc_msdus;
+	A_INT32 loc_mpdus;
+	/* AMSDUs that have more MSDUs than the status ring size */
+	A_INT32 oversize_amsdu;
+	/* Number of PHY errors */
+	A_INT32 phy_errs;
+	/* Number of PHY errors drops */
+	A_INT32 phy_err_drop;
+	/* Number of mpdu errors - FCS, MIC, ENC etc. */
+	A_INT32 mpdu_errs;
+#if defined(AR900B)
+	/* Number of rx overflow errors. */
+	A_INT32 rx_ovfl_errs;
+#endif
+};
+
+struct wlan_dbg_mem_stats {
+	A_UINT32 iram_free_size;
+	A_UINT32 dram_free_size;
+};
+
+struct wlan_dbg_peer_stats {
+
+	A_INT32 dummy;          /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
+};
+
+typedef struct {
+	A_UINT32 mcs[10];
+	A_UINT32 sgi[10];
+	A_UINT32 nss[4];
+	A_UINT32 nsts;
+	A_UINT32 stbc[10];
+	A_UINT32 bw[3];
+	A_UINT32 pream[6];
+	A_UINT32 ldpc;
+	A_UINT32 txbf;
+	A_UINT32 mgmt_rssi;
+	A_UINT32 data_rssi;
+	A_UINT32 rssi_chain0;
+	A_UINT32 rssi_chain1;
+	A_UINT32 rssi_chain2;
+#if defined(AR900B)
+	A_UINT32 rssi_chain3;
+#endif
+} wlan_dbg_rx_rate_info_t;
+
+typedef struct {
+	A_UINT32 mcs[10];
+	A_UINT32 sgi[10];
+#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
+	A_UINT32 nss[4];
+#else
+	A_UINT32 nss[3];
+#endif
+	A_UINT32 stbc[10];
+	A_UINT32 bw[3];
+	A_UINT32 pream[4];
+	A_UINT32 ldpc;
+	A_UINT32 rts_cnt;
+	A_UINT32 ack_rssi;
+} wlan_dbg_tx_rate_info_t ;
+
+#define WLAN_MAX_MCS 10
+
+typedef struct {
+    A_UINT32 mcs[WLAN_MAX_MCS];
+    A_UINT32 sgi[WLAN_MAX_MCS];
+    A_UINT32 nss[MAX_SPATIAL_STREAM_ANY];
+    A_UINT32 nsts;
+    A_UINT32 stbc[WLAN_MAX_MCS];
+    A_UINT32 bw[NUM_DYN_BW_MAX];
+    A_UINT32 pream[6];
+    A_UINT32 ldpc;
+    A_UINT32 txbf;
+    A_UINT32 mgmt_rssi;
+    A_UINT32 data_rssi;
+    A_UINT32 rssi_chain0;
+    A_UINT32 rssi_chain1;
+    A_UINT32 rssi_chain2;
+    A_UINT32 rssi_chain3;
+    A_UINT32 reserved[8];
+} wlan_dbg_rx_rate_info_v2_t ;
+
+typedef struct {
+    A_UINT32 mcs[WLAN_MAX_MCS];
+    A_UINT32 sgi[WLAN_MAX_MCS];
+    A_UINT32 nss[MAX_SPATIAL_STREAM_ANY];
+    A_UINT32 stbc[WLAN_MAX_MCS];
+    A_UINT32 bw[NUM_DYN_BW_MAX];
+    A_UINT32 pream[4];
+    A_UINT32 ldpc;
+    A_UINT32 rts_cnt;
+    A_UINT32 ack_rssi;
+    A_UINT32 reserved[8];
+} wlan_dbg_tx_rate_info_v2_t ;
+
+#define WHAL_DBG_PHY_ERR_MAXCNT 18
+#define WHAL_DBG_SIFS_STATUS_MAXCNT 8
+#define WHAL_DBG_SIFS_ERR_MAXCNT 8
+#define WHAL_DBG_CMD_RESULT_MAXCNT 10
+#define WHAL_DBG_CMD_STALL_ERR_MAXCNT 4
+#define WHAL_DBG_FLUSH_REASON_MAXCNT 40
+
+typedef enum {
+	WIFI_URRN_STATS_FIRST_PKT,
+	WIFI_URRN_STATS_BETWEEN_MPDU,
+	WIFI_URRN_STATS_WITHIN_MPDU,
+	WHAL_MAX_URRN_STATS
+} wifi_urrn_type_t;
+
+typedef struct wlan_dbg_txbf_snd_stats {
+	A_UINT32 cbf_20[4];
+	A_UINT32 cbf_40[4];
+	A_UINT32 cbf_80[4];
+	A_UINT32 sounding[9];
+} wlan_dbg_txbf_snd_stats_t;
+
+typedef struct wlan_dbg_wifi2_error_stats {
+	A_UINT32 urrn_stats[WHAL_MAX_URRN_STATS];
+	A_UINT32 flush_errs[WHAL_DBG_FLUSH_REASON_MAXCNT];
+	A_UINT32 schd_stall_errs[WHAL_DBG_CMD_STALL_ERR_MAXCNT];
+	A_UINT32 schd_cmd_result[WHAL_DBG_CMD_RESULT_MAXCNT];
+	A_UINT32 sifs_status[WHAL_DBG_SIFS_STATUS_MAXCNT];
+	A_UINT8 phy_errs[WHAL_DBG_PHY_ERR_MAXCNT];
+	A_UINT32 rx_rate_inval;
+} wlan_dbg_wifi2_error_stats_t;
+
+typedef struct wlan_dbg_wifi2_error2_stats {
+	A_UINT32 schd_errs[WHAL_DBG_CMD_STALL_ERR_MAXCNT];
+	A_UINT32 sifs_errs[WHAL_DBG_SIFS_ERR_MAXCNT];
+} wlan_dbg_wifi2_error2_stats_t;
+
+#define WLAN_DBG_STATS_SIZE_TXBF_VHT 10
+#define WLAN_DBG_STATS_SIZE_TXBF_HT 8
+#define WLAN_DBG_STATS_SIZE_TXBF_OFDM 8
+#define WLAN_DBG_STATS_SIZE_TXBF_CCK 7
+
+typedef struct wlan_dbg_txbf_data_stats {
+	A_UINT32 tx_txbf_vht[WLAN_DBG_STATS_SIZE_TXBF_VHT];
+	A_UINT32 rx_txbf_vht[WLAN_DBG_STATS_SIZE_TXBF_VHT];
+	A_UINT32 tx_txbf_ht[WLAN_DBG_STATS_SIZE_TXBF_HT];
+	A_UINT32 tx_txbf_ofdm[WLAN_DBG_STATS_SIZE_TXBF_OFDM];
+	A_UINT32 tx_txbf_cck[WLAN_DBG_STATS_SIZE_TXBF_CCK];
+} wlan_dbg_txbf_data_stats_t;
+
+struct wlan_dbg_tx_mu_stats {
+	A_UINT32 mu_sch_nusers_2;
+	A_UINT32 mu_sch_nusers_3;
+	A_UINT32 mu_mpdus_queued_usr[4];
+	A_UINT32 mu_mpdus_tried_usr[4];
+	A_UINT32 mu_mpdus_failed_usr[4];
+	A_UINT32 mu_mpdus_requeued_usr[4];
+	A_UINT32 mu_err_no_ba_usr[4];
+	A_UINT32 mu_mpdu_underrun_usr[4];
+	A_UINT32 mu_ampdu_underrun_usr[4];
+};
+
+struct wlan_dbg_tx_selfgen_stats {
+	A_UINT32 su_ndpa;
+	A_UINT32 su_ndp;
+	A_UINT32 mu_ndpa;
+	A_UINT32 mu_ndp;
+	A_UINT32 mu_brpoll_1;
+	A_UINT32 mu_brpoll_2;
+	A_UINT32 mu_bar_1;
+	A_UINT32 mu_bar_2;
+	A_UINT32 cts_burst;
+	A_UINT32 su_ndp_err;
+	A_UINT32 su_ndpa_err;
+	A_UINT32 mu_ndp_err;
+	A_UINT32 mu_brp1_err;
+	A_UINT32 mu_brp2_err;
+};
+
+typedef struct wlan_dbg_sifs_resp_stats {
+	A_UINT32 ps_poll_trigger;       /* num ps-poll trigger frames */
+	A_UINT32 uapsd_trigger; /* num uapsd trigger frames */
+	A_UINT32 qb_data_trigger[2];    /* num data trigger frames; idx 0: explicit and idx 1: implicit */
+	A_UINT32 qb_bar_trigger[2];     /* num bar trigger frames;  idx 0: explicit and idx 1: implicit */
+	A_UINT32 sifs_resp_data;        /* num ppdus transmitted at SIFS interval */
+	A_UINT32 sifs_resp_err; /* num ppdus failed to meet SIFS resp timing */
+} wlan_dgb_sifs_resp_stats_t;
+
+/** wlan_dbg_wifi2_error_stats_t is not grouped with the
+ *  following structure as it is allocated differently and only
+ *  belongs to whal
+ */
+typedef struct wlan_dbg_stats_wifi2 {
+	wlan_dbg_txbf_snd_stats_t txbf_snd_info;
+	wlan_dbg_txbf_data_stats_t txbf_data_info;
+	struct wlan_dbg_tx_selfgen_stats tx_selfgen;
+	struct wlan_dbg_tx_mu_stats tx_mu;
+	wlan_dgb_sifs_resp_stats_t sifs_resp_info;
+} wlan_dbg_wifi2_stats_t;
+
+typedef struct {
+	wlan_dbg_rx_rate_info_t rx_phy_info;
+	wlan_dbg_tx_rate_info_t tx_rate_info;
+} wlan_dbg_rate_info_t;
+
+typedef struct {
+    wlan_dbg_rx_rate_info_v2_t rx_phy_info;
+    wlan_dbg_tx_rate_info_v2_t tx_rate_info;
+} wlan_dbg_rate_info_v2_t;
+
+struct wlan_dbg_stats {
+	struct wlan_dbg_tx_stats tx;
+	struct wlan_dbg_rx_stats rx;
+#if defined(AR900B)
+	struct wlan_dbg_mem_stats mem;
+#endif
+	struct wlan_dbg_peer_stats peer;
+};
+
+#define DBG_STATS_MAX_HWQ_NUM 10
+#define DBG_STATS_MAX_TID_NUM 20
+#define DBG_STATS_MAX_CONG_NUM 16
+struct wlan_dbg_txq_stats {
+	A_UINT16 num_pkts_queued[DBG_STATS_MAX_HWQ_NUM];
+	A_UINT16 tid_hw_qdepth[DBG_STATS_MAX_TID_NUM];  /* WAL_MAX_TID is 20 */
+	A_UINT16 tid_sw_qdepth[DBG_STATS_MAX_TID_NUM];  /* WAL_MAX_TID is 20 */
+};
+
+struct wlan_dbg_tidq_stats {
+	A_UINT32 wlan_dbg_tid_txq_status;
+	struct wlan_dbg_txq_stats txq_st;
+};
+
+#endif /* __WLANDEFS_H__ */
diff --git a/target/inc/wlan_module_ids.h b/target/inc/wlan_module_ids.h
new file mode 100644
index 0000000..c650ef5
--- /dev/null
+++ b/target/inc/wlan_module_ids.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2011, 2014-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _WLAN_MODULE_IDS_H_
+#define _WLAN_MODULE_IDS_H_
+
+/* Wlan module ids , global across all the modules */
+typedef enum {
+	WLAN_MODULE_ID_MIN = 0,
+	WLAN_MODULE_INF = WLAN_MODULE_ID_MIN, /* 0x00 */
+	WLAN_MODULE_WMI,
+	WLAN_MODULE_STA_PWRSAVE,
+	WLAN_MODULE_WHAL,
+	WLAN_MODULE_COEX,
+	WLAN_MODULE_ROAM,
+	WLAN_MODULE_RESMGR_CHAN_MANAGER,
+	WLAN_MODULE_RESMGR,
+	WLAN_MODULE_VDEV_MGR,
+	WLAN_MODULE_SCAN,
+	WLAN_MODULE_RATECTRL,
+	WLAN_MODULE_AP_PWRSAVE,
+	WLAN_MODULE_BLOCKACK,
+	WLAN_MODULE_MGMT_TXRX,
+	WLAN_MODULE_DATA_TXRX,
+	WLAN_MODULE_HTT,
+	WLAN_MODULE_HOST, /* 0x10 */
+	WLAN_MODULE_BEACON,
+	WLAN_MODULE_OFFLOAD,
+	WLAN_MODULE_WAL,
+	WAL_MODULE_DE,
+	WLAN_MODULE_PCIELP,
+	WLAN_MODULE_RTT,
+	WLAN_MODULE_RESOURCE,
+	WLAN_MODULE_DCS,
+	WLAN_MODULE_CACHEMGR,
+	WLAN_MODULE_ANI,
+	WLAN_MODULE_P2P,
+	WLAN_MODULE_CSA,
+	WLAN_MODULE_NLO,
+	WLAN_MODULE_CHATTER,
+	WLAN_MODULE_WOW,
+	WLAN_MODULE_WAL_VDEV, /* 0x20 */
+	WLAN_MODULE_WAL_PDEV,
+	WLAN_MODULE_TEST,
+	WLAN_MODULE_STA_SMPS,
+	WLAN_MODULE_SWBMISS,
+	WLAN_MODULE_WMMAC,
+	WLAN_MODULE_TDLS,
+	WLAN_MODULE_HB,
+	WLAN_MODULE_TXBF,
+	WLAN_MODULE_BATCH_SCAN,
+	WLAN_MODULE_THERMAL_MGR,
+	WLAN_MODULE_PHYERR_DFS,
+	WLAN_MODULE_RMC,
+	WLAN_MODULE_STATS,
+	WLAN_MODULE_NAN,
+	WLAN_MODULE_IBSS_PWRSAVE,
+	WLAN_MODULE_HIF_UART, /* 0x30 */
+	WLAN_MODULE_LPI,
+	WLAN_MODULE_EXTSCAN,
+	WLAN_MODULE_UNIT_TEST,
+	WLAN_MODULE_MLME,
+	WLAN_MODULE_SUPPL,
+	WLAN_MODULE_ERE,
+	WLAN_MODULE_OCB,
+	WLAN_MODULE_RSSI_MONITOR,
+	WLAN_MODULE_WPM,
+	WLAN_MODULE_CSS, /* 0x3a */
+	WLAN_MODULE_PPS, /* 0x3b */
+	WLAN_MODULE_SCAN_CH_PREDICT, /* 0x3c */
+	WLAN_MODULE_MAWC,
+	WLAN_MODULE_CMC_QMIC, /* 0x3e */
+	WLAN_MODULE_EGAP, /* 0x3f */
+
+	WLAN_MODULE_ID_MAX,
+	WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX,
+} WLAN_MODULE_ID;
+
+#endif /* _WLAN_MODULE_IDS_H_ */
diff --git a/target/inc/wlan_tgt_def_config.h b/target/inc/wlan_tgt_def_config.h
new file mode 100644
index 0000000..2bcf796
--- /dev/null
+++ b/target/inc/wlan_tgt_def_config.h
@@ -0,0 +1,259 @@
+/*
+ * Copyright (c) 2011, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef __WLAN_TGT_DEF_CONFIG_H__
+#define __WLAN_TGT_DEF_CONFIG_H__
+
+/*
+ * set of default target config , that can be over written by platform
+ */
+
+/*
+ * default limit of 8 VAPs per device.
+ */
+/* Rome PRD support 3 vdevs */
+#define CFG_TGT_NUM_VDEV                3
+
+/*
+ * We would need 1 AST entry per peer. Scale it by a factor of 2 to minimize hash collisions.
+ * TODO: This scaling factor would be taken care inside the WAL in the future.
+ */
+#define CFG_TGT_NUM_PEER_AST            2
+
+/* # of WDS entries to support.
+ */
+#define CFG_TGT_WDS_ENTRIES             0
+
+/* MAC DMA burst size. 0: 128B - default, 1: 256B, 2: 64B
+ */
+#define CFG_TGT_DEFAULT_DMA_BURST_SIZE   0
+
+/* Fixed delimiters to be inserted after every MPDU
+ */
+#define CFG_TGT_DEFAULT_MAC_AGGR_DELIM   0
+
+/*
+ * This value may need to be fine tuned, but a constant value will
+ * probably always be appropriate; it is probably not necessary to
+ * determine this value dynamically.
+ */
+#define CFG_TGT_AST_SKID_LIMIT          16
+
+/*
+ * total number of peers per device.
+ */
+#define CFG_TGT_NUM_PEERS               14
+
+/*
+ * In offload mode target supports features like WOW, chatter and other
+ * protocol offloads. In order to support them some functionalities like
+ * reorder buffering, PN checking need to be done in target. This determines
+ * maximum number of peers suported by target in offload mode
+ */
+
+/*
+ * The current firmware implementation requires the number of offload peers
+ * should be (number of vdevs + 1).
+
+ * The reason for this is the firmware clubbed the self peer and offload peer
+ * in the same pool. So if the firmware wanted to support n vdevs then the
+ * number of offload peer must be n+1 of which n buffers will be used for
+ * self peer and the remaining 1 is used for offload peer to support chatter
+ * mode for single STA.
+
+ * Technically the macro should be 1 however the current firmware requires n+1.
+
+ * TODO: This MACRO need to be modified in the future, if the firmware modified
+ * to allocate buffers for self peer and offload peer independently.
+ */
+
+#define CFG_TGT_NUM_OFFLOAD_PEERS       (CFG_TGT_NUM_VDEV+1)
+
+/*
+ * Number of reorder buffers used in offload mode
+ */
+#define CFG_TGT_NUM_OFFLOAD_REORDER_BUFFS   4
+
+/*
+ * keys per peer node
+ */
+#define CFG_TGT_NUM_PEER_KEYS           2
+/*
+ * total number of data TX and RX TIDs
+ */
+#define CFG_TGT_NUM_TIDS       (2 * (CFG_TGT_NUM_PEERS + CFG_TGT_NUM_VDEV + 2))
+/*
+ * set this to 0x7 (Peregrine = 3 chains).
+ * need to be set dynamically based on the HW capability.
+ */
+#define CFG_TGT_DEFAULT_TX_CHAIN_MASK   0x7
+/*
+ * set this to 0x7 (Peregrine = 3 chains).
+ * need to be set dynamically based on the HW capability.
+ */
+#define CFG_TGT_DEFAULT_RX_CHAIN_MASK   0x7
+/* 100 ms for video, best-effort, and background */
+#define CFG_TGT_RX_TIMEOUT_LO_PRI       100
+/* 40 ms for voice*/
+#define CFG_TGT_RX_TIMEOUT_HI_PRI       40
+
+/* AR9888 unified is default in ethernet mode */
+#define CFG_TGT_RX_DECAP_MODE (0x2)
+/* Decap to native Wifi header */
+#define CFG_TGT_RX_DECAP_MODE_NWIFI (0x1)
+
+/* maximum number of pending scan requests */
+#define CFG_TGT_DEFAULT_SCAN_MAX_REQS   0x4
+
+/* maximum number of VDEV that could use BMISS offload */
+#define CFG_TGT_DEFAULT_BMISS_OFFLOAD_MAX_VDEV   0x2
+
+/* maximum number of VDEV offload Roaming to support */
+#define CFG_TGT_DEFAULT_ROAM_OFFLOAD_MAX_VDEV   0x2
+
+/* maximum number of AP profiles pushed to offload Roaming */
+#define CFG_TGT_DEFAULT_ROAM_OFFLOAD_MAX_PROFILES   0x8
+
+/* maximum number of VDEV offload GTK to support */
+#define CFG_TGT_DEFAULT_GTK_OFFLOAD_MAX_VDEV   0x2
+
+/* default: mcast->ucast disabled if ATH_SUPPORT_MCAST2UCAST not defined */
+#ifndef ATH_SUPPORT_MCAST2UCAST
+#define CFG_TGT_DEFAULT_NUM_MCAST_GROUPS 0
+#define CFG_TGT_DEFAULT_NUM_MCAST_TABLE_ELEMS 0
+#define CFG_TGT_DEFAULT_MCAST2UCAST_MODE 0      /* disabled */
+#else
+/* (for testing) small multicast group membership table enabled */
+#define CFG_TGT_DEFAULT_NUM_MCAST_GROUPS 4
+#define CFG_TGT_DEFAULT_NUM_MCAST_TABLE_ELEMS 16
+#define CFG_TGT_DEFAULT_MCAST2UCAST_MODE 2
+#endif
+
+#define CFG_TGT_MAX_MULTICAST_FILTER_ENTRIES 5
+/*
+ * Specify how much memory the target should allocate for a debug log of
+ * tx PPDU meta-information (how large the PPDU was, when it was sent,
+ * whether it was successful, etc.)
+ * The size of the log records is configurable, from a minimum of 28 bytes
+ * to a maximum of about 300 bytes.  A typical configuration would result
+ * in each log record being about 124 bytes.
+ * Thus, 1KB of log space can hold about 30 small records, 3 large records,
+ * or about 8 typical-sized records.
+ */
+#define CFG_TGT_DEFAULT_TX_DBG_LOG_SIZE 1024    /* bytes */
+
+/* target based fragment timeout and MPDU duplicate detection */
+#define CFG_TGT_DEFAULT_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK 0
+
+/*  Default VoW configuration
+ */
+#define CFG_TGT_DEFAULT_VOW_CONFIG   0
+
+/*
+ * total number of descriptors to use in the target
+ */
+#define CFG_TGT_NUM_MSDU_DESC    (1024 + 32)
+
+/*
+ * Maximum number of frag table entries
+ */
+#define CFG_TGT_MAX_FRAG_TABLE_ENTRIES 10
+
+/*
+ * Maximum number of VDEV that beacon tx offload will support
+ */
+#define CFG_TGT_DEFAULT_BEACON_TX_OFFLOAD_MAX_VDEV 2
+
+/*
+ * number of vdevs that can support tdls
+ */
+#define CFG_TGT_NUM_TDLS_VDEVS    1
+
+/*
+ * number of peers that each Tdls vdev can track
+ */
+#define CFG_TGT_NUM_TDLS_CONN_TABLE_ENTRIES    32
+
+/*
+ * number of TDLS concurrent sleep STAs
+ */
+#define CFG_TGT_NUM_TDLS_CONC_SLEEP_STAS    1
+
+/*
+ * number of TDLS concurrent buffer STAs
+ */
+#define CFG_TGT_NUM_TDLS_CONC_BUFFER_STAS    1
+
+/*
+ * ht enable highest MCS by default
+ */
+#define CFG_TGT_DEFAULT_GTX_HT_MASK             0x8080
+/*
+ * vht enable highest MCS by default
+ */
+#define CFG_TGT_DEFAULT_GTX_VHT_MASK            0x80200
+/*
+ * resv for furture use, bit 30 is used for fix tpc, bit0-3 for Power save balance
+ */
+#define CFG_TGT_DEFAULT_GTX_USR_CFG             0xa
+/*
+ * threshold to enable GTX
+ */
+#define CFG_TGT_DEFAULT_GTX_PER_THRESHOLD       3
+/*
+ * margin to move back when per > margin + threshold
+ */
+#define CFG_TGT_DEFAULT_GTX_PER_MARGIN          2
+/*
+ * step for every move
+ */
+#define CFG_TGT_DEFAULT_GTX_TPC_STEP            1
+/*
+ * lowest TPC
+ */
+#define CFG_TGT_DEFAULT_GTX_TPC_MIN             0
+/*
+ * enable all BW 20/40/80/160
+ */
+#define CFG_TGT_DEFAULT_GTX_BW_MASK             0xf
+
+/*
+ * number of vdevs that can support OCB
+ */
+#define CFG_TGT_NUM_OCB_VDEVS			1
+
+/*
+ * maximum number of channels that can do OCB
+ */
+#define CFG_TGT_NUM_OCB_CHANNELS		2
+
+/*
+ * maximum number of channels in an OCB schedule
+ */
+#define CFG_TGT_NUM_OCB_SCHEDULES		2
+
+#endif /*__WLAN_TGT_DEF_CONFIG_H__ */
diff --git a/target/inc/wmi.h b/target/inc/wmi.h
new file mode 100644
index 0000000..6645eba
--- /dev/null
+++ b/target/inc/wmi.h
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2004-2010, 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/*
+ * This file contains the definitions of the WMI protocol specified in the
+ * Wireless Module Interface (WMI).  It includes definitions of all the
+ * commands and events. Commands are messages from the host to the WM.
+ * Events and Replies are messages from the WM to the host.
+ *
+ * Ownership of correctness in regards to commands
+ * belongs to the host driver and the WMI is not required to validate
+ * parameters for value, proper range, or any other checking.
+ *
+ */
+
+#ifndef _WMI_H_
+#define _WMI_H_
+
+#include "wlan_defs.h"
+#include "wmix.h"
+#include "wmi_unified.h"
+#include "wmi_tlv_helper.h"
+#include "wmi_tlv_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define HTC_PROTOCOL_VERSION    0x0002
+
+#define WMI_PROTOCOL_VERSION    0x0002
+
+#define WMI_MODE_MAX              8
+#define WMI_MAX_RATE_MASK         6
+
+PREPACK struct host_app_area_s {
+	A_UINT32 wmi_protocol_ver;
+} POSTPACK;
+
+#undef MS
+#define MS(_v, _f) (((_v) & _f ## _MASK) >> _f ## _LSB)
+#undef SM
+#define SM(_v, _f) (((_v) << _f ## _LSB) & _f ## _MASK)
+#undef WO
+#define WO(_f)      ((_f ## _OFFSET) >> 2)
+
+#undef GET_FIELD
+#define GET_FIELD(_addr, _f) MS(*((A_UINT32 *)(_addr) + WO(_f)), _f)
+#undef SET_FIELD
+#define SET_FIELD(_addr, _f, _val)  \
+	(*((A_UINT32 *)(_addr) + WO(_f)) = \
+		 (*((A_UINT32 *)(_addr) + WO(_f)) & ~_f ## _MASK) | SM(_val, _f))
+
+#define WMI_GET_FIELD(_msg_buf, _msg_type, _f) \
+	GET_FIELD(_msg_buf, _msg_type ## _ ## _f)
+
+#define WMI_SET_FIELD(_msg_buf, _msg_type, _f, _val) \
+	SET_FIELD(_msg_buf, _msg_type ## _ ## _f, _val)
+
+#define WMI_EP_APASS           0x0
+#define WMI_EP_LPASS           0x1
+#define WMI_EP_SENSOR          0x2
+
+/*
+ * Control Path
+ */
+typedef PREPACK struct {
+	A_UINT32 commandId : 24, reserved : 2,          /* used for WMI endpoint ID */
+		 plt_priv : 6;    /* platform private */
+} POSTPACK WMI_CMD_HDR;         /* used for commands and events */
+
+#define WMI_CMD_HDR_COMMANDID_LSB           0
+#define WMI_CMD_HDR_COMMANDID_MASK          0x00ffffff
+#define WMI_CMD_HDR_COMMANDID_OFFSET        0x00000000
+#define WMI_CMD_HDR_WMI_ENDPOINTID_MASK     0x03000000
+#define WMI_CMD_HDR_WMI_ENDPOINTID_OFFSET   24
+#define WMI_CMD_HDR_PLT_PRIV_LSB            24
+#define WMI_CMD_HDR_PLT_PRIV_MASK           0xff000000
+#define WMI_CMD_HDR_PLT_PRIV_OFFSET         0x00000000
+
+/*
+ * List of Commnands
+ */
+typedef enum {
+	WMI_EXTENSION_CMDID,            /* used in wmi_svc.c   / * Non-wireless extensions * / */
+	WMI_IGNORE_CMDID,               /* used in wlan_wmi.c */
+} WMI_COMMAND_ID;
+
+typedef enum {
+	NONE_CRYPT = 0x01,
+	WEP_CRYPT = 0x02,
+	TKIP_CRYPT = 0x04,
+	AES_CRYPT = 0x08,
+#ifdef WAPI_ENABLE
+	WAPI_CRYPT = 0x10,
+#endif /*WAPI_ENABLE */
+} CRYPTO_TYPE;
+
+#define WMI_MAX_SSID_LEN    32
+
+/*
+ * WMI_SET_PMK_CMDID
+ */
+#define WMI_PMK_LEN     32
+
+/*
+ * WMI_ADD_CIPHER_KEY_CMDID
+ */
+typedef enum {
+	PAIRWISE_USAGE = 0x00,
+	GROUP_USAGE = 0x01,
+	TX_USAGE = 0x02,                /* default Tx Key - Static WEP only */
+} KEY_USAGE;
+
+/*
+ * List of Events (target to host)
+ */
+typedef enum {
+	WMI_EXTENSION_EVENTID,          /* wmi_profhook.c and umac_wmi_events.c */
+} WMI_EVENT_ID;
+
+typedef enum {
+	WMI_11A_CAPABILITY = 1,
+	WMI_11G_CAPABILITY = 2,
+	WMI_11AG_CAPABILITY = 3,
+	WMI_11NA_CAPABILITY = 4,
+	WMI_11NG_CAPABILITY = 5,
+	WMI_11NAG_CAPABILITY = 6,
+	WMI_11AC_CAPABILITY = 7,
+	/* END CAPABILITY */
+	WMI_11N_CAPABILITY_OFFSET =
+		(WMI_11NA_CAPABILITY - WMI_11A_CAPABILITY),
+} WMI_PHY_CAPABILITY;
+
+/* Deprectated, need clean up */
+#define WMI_MAX_RX_META_SZ  (12)
+
+typedef PREPACK struct {
+	A_INT8 rssi;
+	A_UINT8 info;           /* usage of 'info' field(8-bit):
+	                         *  b1:b0       - WMI_MSG_TYPE
+	                         *  b4:b3:b2    - UP(tid)
+	                         *  b5          - Used in AP mode. More-data in tx dir, PS in rx.
+	                         *  b7:b6       -  Dot3 header(0),
+	                         *                 Dot11 Header(1),
+	                         *                 ACL data(2)
+	                         */
+
+	A_UINT16 info2;         /* usage of 'info2' field(16-bit):
+	                         * b11:b0       - seq_no
+	                         * b12          - A-MSDU?
+	                         * b15:b13      - META_DATA_VERSION 0 - 7
+	                         */
+	A_UINT16 info3;         /* b3:b2:b1:b0  - device id
+	                         * b4           - Used in AP mode. uAPSD trigger in rx, EOSP in tx
+	                         * b7:b5        - unused?
+	                         * b15:b8       - pad before data start(irrespective of meta version)
+	                         */
+} POSTPACK WMI_DATA_HDR;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _WMI_H_ */
diff --git a/target/inc/wmi_services.h b/target/inc/wmi_services.h
new file mode 100644
index 0000000..b2b1dfa
--- /dev/null
+++ b/target/inc/wmi_services.h
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2011-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * This file defines WMI services bitmap and the set of WMI services .
+ * defines macrso to set/clear/get different service bits from the bitmap.
+ * the service bitmap is sent up to the host via WMI_READY command.
+ *
+ */
+
+#ifndef _WMI_SERVICES_H_
+#define _WMI_SERVICES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+	WMI_SERVICE_BEACON_OFFLOAD = 0,         /* beacon offload */
+	WMI_SERVICE_SCAN_OFFLOAD,               /* scan offload */
+	WMI_SERVICE_ROAM_SCAN_OFFLOAD,          /* roam scan offload */
+	WMI_SERVICE_BCN_MISS_OFFLOAD,           /* beacon miss offload */
+	WMI_SERVICE_STA_PWRSAVE,                /* fake sleep + basic power save */
+	WMI_SERVICE_STA_ADVANCED_PWRSAVE,               /* uapsd, pspoll, force sleep */
+	WMI_SERVICE_AP_UAPSD,           /* uapsd on AP */
+	WMI_SERVICE_AP_DFS,             /* DFS on AP */
+	WMI_SERVICE_11AC,               /* supports 11ac */
+	WMI_SERVICE_BLOCKACK,           /* Supports triggering ADDBA/DELBA from host */
+	WMI_SERVICE_PHYERR,             /* PHY error */
+	WMI_SERVICE_BCN_FILTER,         /* Beacon filter support */
+	WMI_SERVICE_RTT,                /* RTT (round trip time) support */
+	WMI_SERVICE_WOW,                /* WOW Support */
+	WMI_SERVICE_RATECTRL_CACHE,             /* Rate-control caching */
+	WMI_SERVICE_IRAM_TIDS,          /* TIDs in IRAM */
+	WMI_SERVICE_ARPNS_OFFLOAD,      /* ARP NS Offload support for STA vdev*/
+	WMI_SERVICE_NLO,                /* Network list offload service */
+	WMI_SERVICE_GTK_OFFLOAD,                /* GTK offload */
+	WMI_SERVICE_SCAN_SCH,           /* Scan Scheduler Service */
+	WMI_SERVICE_CSA_OFFLOAD,                /* CSA offload service */
+	WMI_SERVICE_CHATTER,            /* Chatter service */
+	WMI_SERVICE_COEX_FREQAVOID,             /* FW report freq range to avoid */
+	WMI_SERVICE_PACKET_POWER_SAVE,          /* packet power save service */
+	WMI_SERVICE_FORCE_FW_HANG,              /* Service to test the firmware recovery mechanism */
+	WMI_SERVICE_GPIO,               /* GPIO service */
+	WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,         /* Modulated DTIM support */
+	WMI_STA_UAPSD_BASIC_AUTO_TRIG,          /* Basic version of station UAPSD AC Trigger Generation Method with
+	                                         * variable tigger periods (service, delay, and suspend intervals) */
+	WMI_STA_UAPSD_VAR_AUTO_TRIG,            /* Station UAPSD AC Trigger Generation Method with variable
+	                                         * trigger periods (service, delay, and suspend intervals) */
+	WMI_SERVICE_STA_KEEP_ALIVE,             /* Serivce to support the STA KEEP ALIVE mechanism */
+	WMI_SERVICE_TX_ENCAP,           /* Packet type for TX encapsulation */
+	WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,           /* detect out-of-sync sleeping stations */
+	WMI_SERVICE_EARLY_RX,           /* adaptive early-rx feature */
+	WMI_SERVICE_STA_SMPS,           /* STA MIMO-PS */
+	WMI_SERVICE_FWTEST,             /* Firmware test service */
+	WMI_SERVICE_STA_WMMAC,          /* STA WMMAC */
+	WMI_SERVICE_TDLS,               /* TDLS support */
+	WMI_SERVICE_BURST,              /* SIFS spaced burst support */
+	WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,            /* Dynamic beaocn interval change for SAP/P2p GO in MCC scenario */
+	WMI_SERVICE_ADAPTIVE_OCS,               /* Service to support adaptive off-channel scheduler */
+	WMI_SERVICE_BA_SSN_SUPPORT,             /* target will provide Sequence number for the peer/tid combo */
+	WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
+	WMI_SERVICE_WLAN_HB,            /* wlan HB service */
+	WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,              /* support LTE/WLAN antenna sharing */
+	WMI_SERVICE_BATCH_SCAN,         /*Service to support batch scan */
+	WMI_SERVICE_QPOWER,             /* QPower service */
+	WMI_SERVICE_PLMREQ,
+	WMI_SERVICE_THERMAL_MGMT,
+	WMI_SERVICE_RMC,                /* RMC support */
+	WMI_SERVICE_MHF_OFFLOAD,                /* multi-hop forwarding offload */
+	WMI_SERVICE_COEX_SAR,           /* target support SAR tx limit from WMI_PDEV_PARAM_TXPOWER_LIMITxG */
+	WMI_SERVICE_BCN_TXRATE_OVERRIDE,                /* Will support the bcn/prb rsp rate override */
+	WMI_SERVICE_NAN,                /* Neighbor Awareness Network */
+	WMI_SERVICE_L1SS_STAT,          /* L1SS statistics counter report */
+	WMI_SERVICE_ESTIMATE_LINKSPEED,         /* Linkspeed Estimation per peer */
+	WMI_SERVICE_OBSS_SCAN,          /* Service to support OBSS scan */
+	WMI_SERVICE_TDLS_OFFCHAN,               /* TDLS off channel support */
+	WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,              /* TDLS UAPSD Buffer STA support */
+	WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,               /* TDLS UAPSD Sleep STA support */
+	WMI_SERVICE_IBSS_PWRSAVE,               /* IBSS power save support */
+	WMI_SERVICE_LPASS,              /*Service to support LPASS */
+	WMI_SERVICE_EXTSCAN,            /* Extended Scans */
+	WMI_SERVICE_D0WOW,              /* D0-WOW Support */
+	WMI_SERVICE_HSOFFLOAD,          /* Hotspot offload feature Support */
+	WMI_SERVICE_ROAM_HO_OFFLOAD,            /* roam handover offload */
+	WMI_SERVICE_RX_FULL_REORDER,            /* target-based Rx full reorder */
+	WMI_SERVICE_DHCP_OFFLOAD,               /* DHCP offload support */
+	WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,         /* STA RX DATA offload to IPA support */
+	WMI_SERVICE_MDNS_OFFLOAD,         /* mDNS responder offload support */
+	WMI_SERVICE_SAP_AUTH_OFFLOAD,     /* softap auth offload */
+	WMI_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT, /* Dual Band Simultaneous support */
+	WMI_SERVICE_OCB,                  /* OCB mode support */
+	WMI_SERVICE_AP_ARPNS_OFFLOAD,     /* arp offload support for ap mode vdev */
+	WMI_SERVICE_PER_BAND_CHAINMASK_SUPPORT, /* Per band chainmask support */
+	WMI_SERVICE_PACKET_FILTER_OFFLOAD, /* Per vdev packet filters */
+	WMI_SERVICE_MGMT_TX_HTT,          /* Mgmt Tx via HTT interface */
+	WMI_SERVICE_MGMT_TX_WMI,          /* Mgmt Tx via WMI interface */
+	WMI_SERVICE_EXT_MSG,             /* WMI_SERVICE_READY_EXT msg follows */
+	WMI_SERVICE_MAWC,               /* Motion Aided WiFi Connectivity (MAWC)*/
+
+	/* target will send ASSOC_CONF after ASSOC_CMD is processed */
+	WMI_SERVICE_PEER_ASSOC_CONF,
+
+	/* enhanced green ap support */
+	WMI_SERVICE_EGAP,
+	/* FW supports 11W PMF Offload for STA */
+	WMI_SERVICE_STA_PMF_OFFLOAD,
+
+	WMI_MAX_SERVICE = 128             /* max service */
+} WMI_SERVICE;
+
+#define WMI_SERVICE_BM_SIZE   ((WMI_MAX_SERVICE + sizeof(A_UINT32)- 1)/sizeof(A_UINT32))
+
+/*
+ * depreciated the name WMI_SERVICE_ROAM_OFFLOAD, but here to help compiling
+ * with old host driver
+ */
+#define WMI_SERVICE_ROAM_OFFLOAD WMI_SERVICE_ROAM_SCAN_OFFLOAD
+
+/*
+ * turn on the WMI service bit corresponding to  the WMI service.
+ */
+#define WMI_SERVICE_ENABLE(pwmi_svc_bmap,svc_id) \
+	( (pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] |= \
+		  (1 << ((svc_id)%(sizeof(A_UINT32)))) )
+
+#define WMI_SERVICE_DISABLE(pwmi_svc_bmap,svc_id) \
+	( (pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] &=  \
+		  ( ~(1 << ((svc_id)%(sizeof(A_UINT32)))) ) )
+
+#define WMI_SERVICE_IS_ENABLED(pwmi_svc_bmap,svc_id) \
+	( ((pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] &  \
+	   (1 << ((svc_id)%(sizeof(A_UINT32)))) ) != 0)
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*_WMI_SERVICES_H_*/
diff --git a/target/inc/wmi_tlv_defs.h b/target/inc/wmi_tlv_defs.h
new file mode 100644
index 0000000..081de73
--- /dev/null
+++ b/target/inc/wmi_tlv_defs.h
@@ -0,0 +1,2996 @@
+/*
+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _WMI_TLV_DEFS_H_
+#define _WMI_TLV_DEFS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define WMITLV_FIELD_BUF_IS_ALLOCATED(elem_name) \
+	is_allocated_ ## elem_name
+
+#define WMITLV_FIELD_NUM_OF(elem_name) \
+	num_ ## elem_name
+
+/* Define the structure typedef for the TLV parameters of each cmd/event */
+#define WMITLV_TYPEDEF_STRUCT_PARAMS_TLVS(wmi_cmd_event_id) \
+	wmi_cmd_event_id ## _param_tlvs
+
+/*
+ * The following macro WMITLV_OP_* are created by the macro WMITLV_ELEM().
+ */
+/* macro to define the TLV name in the correct order. When (op==TAG_ORDER) */
+#define WMITLV_OP_TAG_ORDER_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)	\
+	wmi_cmd_event_id ## _tlv_order_ ## elem_name,
+
+/* macro to define the TLV name with the TLV Tag value. When (op==TAG_ID) */
+#define WMITLV_OP_TAG_ID_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)  \
+	wmi_cmd_event_id ## _tlv_tag_ ## elem_name = elem_tlv_tag,
+
+/* macro to define the TLV name with the TLV structure size. May not be accurate when variable length. When (op==TAG_SIZEOF) */
+#define WMITLV_OP_TAG_SIZEOF_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)	 \
+	wmi_cmd_event_id ## _sizeof_ ## elem_name = sizeof(elem_struc_type),
+
+/* macro to define the TLV name with value indicating whether the TLV is variable length. When (op==TAG_VAR_SIZED) */
+#define WMITLV_OP_TAG_VAR_SIZED_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)  \
+	wmi_cmd_event_id ## _var_sized_ ## elem_name = var_len,
+
+/* macro to define the TLV name with value indicating the fixed array size. When (op==TAG_ARR_SIZE) */
+#define WMITLV_OP_TAG_ARR_SIZE_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)  \
+	wmi_cmd_event_id ## _arr_size_ ## elem_name = arr_size,
+
+/*
+ * macro to define afew fields associated to a TLV. For example, a structure pointer with the TLV name.
+ * This macro is expand from WMITLV_ELEM(op) when (op==STRUCT_FIELD).
+ * NOTE: If this macro is changed, then "mirror" structure wmitlv_cmd_param_info
+ * should be updated too.
+ */
+#define WMITLV_OP_STRUCT_FIELD_macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)  \
+	elem_struc_type *elem_name; \
+	A_UINT32 WMITLV_FIELD_NUM_OF(elem_name); \
+	A_UINT32 WMITLV_FIELD_BUF_IS_ALLOCATED(elem_name);
+
+/*
+ * A "mirror" structure that contains the fields that is created by the
+ * macro WMITLV_OP_STRUCT_FIELD_macro.
+ * NOTE: you should modify this structure and WMITLV_OP_STRUCT_FIELD_macro
+ * so that they both has the same kind of fields.
+ */
+typedef struct {
+	void *tlv_ptr;          /* Pointer to the TLV Buffer. But the "real" one will have the right type instead of void. */
+	A_UINT32 num_elements;          /* Number of elements. For non-array, this is one. For array, this is the number of elements. */
+	A_UINT32 buf_is_allocated;              /* Boolean flag to indicate that a new buffer is allocated for this TLV. */
+} wmitlv_cmd_param_info;
+
+/*
+ * NOTE TRICKY MACRO:
+ *  WMITLV_ELEM is re-defined to a "op" specific macro.
+ *  Eg. WMITLV_OP_TAG_ORDER_macro is created for the op_type=TAG_ORDER.
+ */
+#define WMITLV_ELEM(wmi_cmd_event_id, op_type, param_ptr, param_len, elem_tlv_tag, elem_struc_type, elem_name, var_len)	\
+	WMITLV_OP_ ## op_type ## _macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, WMITLV_ARR_SIZE_INVALID)
+/*
+ *  WMITLV_FXAR (FiX ARray) is similar to WMITLV_ELEM except it has an extra parameter for the fixed number of elements.
+ *  It is re-defined to a "op" specific macro.
+ *  Eg. WMITLV_OP_TAG_ORDER_macro is created for the op_type=TAG_ORDER.
+ */
+#define WMITLV_FXAR(wmi_cmd_event_id, op_type, param_ptr, param_len, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size) \
+	WMITLV_OP_ ## op_type ## _macro(param_ptr, param_len, wmi_cmd_event_id, elem_tlv_tag, elem_struc_type, elem_name, var_len, arr_size)
+
+#define WMITLV_TABLE(id,op,buf,len) WMITLV_TABLE_ ## id(id,op,buf,len)
+
+/*
+ * This macro will create various enumerations and structures to describe the TLVs for
+ * the given Command/Event ID.
+ *
+ * For example, the following is for WMI_SERVICE_READY_EVENTID:
+ *    #define WMITLV_TABLE_WMI_SERVICE_READY_EVENTID(id,op,buf,len)                                                                                                 \
+ *       WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_service_ready_event_fixed_param, wmi_service_ready_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)     \
+ *       WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_HAL_REG_CAPABILITIES, HAL_REG_CAPABILITIES, hal_reg_capabilities, WMITLV_SIZE_FIX)  \
+ *       WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, wmi_service_bitmap, WMITLV_SIZE_FIX, WMI_SERVICE_BM_SIZE) \
+ *       WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wlan_host_mem_req, mem_reqs, WMITLV_SIZE_VAR)
+ *    WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_READY_EVENTID);
+ * This macro will create the following text:
+ *
+ * typedef enum {
+ *    WMI_SERVICE_READY_EVENTID_tlv_order_wmi_service_ready_event_fixed_param,
+ *    WMI_SERVICE_READY_EVENTID_tlv_order_hal_reg_capabilities,
+ *    WMI_SERVICE_READY_EVENTID_tlv_order_wmi_service_bitmap,
+ *    WMI_SERVICE_READY_EVENTID_tlv_order_mem_reqs,
+ *    WMI_TLV_HLPR_NUM_TLVS_FOR_WMI_SERVICE_READY_EVENTID
+ * } WMI_SERVICE_READY_EVENTID_TAG_ID_enum_type;
+ * //NOTE: WMI_TLV_HLPR_NUM_TLVS_FOR_WMI_SERVICE_READY_EVENTID is the number of TLVs.
+ *
+ * typedef enum {
+ *    WMI_SERVICE_READY_EVENTID_tlv_tag_wmi_service_ready_event_fixed_param = WMITLV_TAG_STRUC_wmi_service_ready_event_fixed_param,
+ *    WMI_SERVICE_READY_EVENTID_tlv_tag_hal_reg_capabilities = WMITLV_TAG_STRUC_HAL_REG_CAPABILITIES,
+ *    WMI_SERVICE_READY_EVENTID_tlv_tag_wmi_service_bitmap = WMITLV_TAG_ARRAY_UINT32,
+ *    WMI_SERVICE_READY_EVENTID_tlv_tag_mem_reqs = WMITLV_TAG_ARRAY_STRUC,
+ * } WMI_SERVICE_READY_EVENTID_TAG_ORDER_enum_type;
+ *
+ * typedef enum {
+ *    WMI_SERVICE_READY_EVENTID_sizeof_wmi_service_ready_event_fixed_param = sizeof(wmi_service_ready_event_fixed_param),
+ *    WMI_SERVICE_READY_EVENTID_sizeof_hal_reg_capabilities = sizeof(HAL_REG_CAPABILITIES),
+ *    WMI_SERVICE_READY_EVENTID_sizeof_wmi_service_bitmap = sizeof(A_UINT32),
+ *    WMI_SERVICE_READY_EVENTID_sizeof_mem_reqs = sizeof(wlan_host_mem_req),
+ * } WMI_SERVICE_READY_EVENTID_TAG_SIZEOF_enum_type;
+ *
+ * typedef enum {
+ *    WMI_SERVICE_READY_EVENTID_var_sized_wmi_service_ready_event_fixed_param = WMITLV_SIZE_FIX,
+ *    WMI_SERVICE_READY_EVENTID_var_sized_hal_reg_capabilities = WMITLV_SIZE_FIX,
+ *    WMI_SERVICE_READY_EVENTID_var_sized_wmi_service_bitmap = WMITLV_SIZE_VAR,
+ *    WMI_SERVICE_READY_EVENTID_var_sized_mem_reqs = WMITLV_SIZE_VAR,
+ * } WMI_SERVICE_READY_EVENTID_TAG_VAR_SIZED_enum_type;
+ *
+ * typedef enum {
+ *    WMI_SERVICE_READY_EVENTID_arr_size_wmi_service_ready_event_fixed_param = WMITLV_ARR_SIZE_INVALID,
+ *    WMI_SERVICE_READY_EVENTID_arr_size_hal_reg_capabilities = WMITLV_ARR_SIZE_INVALID,
+ *    WMI_SERVICE_READY_EVENTID_arr_size_wmi_service_bitmap = WMI_SERVICE_BM_SIZE,
+ *    WMI_SERVICE_READY_EVENTID_arr_size_mem_reqs = WMITLV_ARR_SIZE_INVALID,
+ * } WMI_SERVICE_READY_EVENTID_TAG_ARR_SIZE_enum_type;
+ *
+ * typedef struct {
+ *    wmi_service_ready_event_fixed_param *fixed_param;
+ *    A_UINT32 num_fixed_param;
+ *    A_UINT32 is_allocated_fixed_param;
+ *    HAL_REG_CAPABILITIES *hal_reg_capabilities;
+ *    A_UINT32 num_hal_reg_capabilities;
+ *    A_UINT32 is_allocated_hal_reg_capabilities;
+ *    A_UINT32 *wmi_service_bitmap;
+ *    A_UINT32 num_wmi_service_bitmap;
+ *    A_UINT32 is_allocated_wmi_service_bitmap;
+ *    wlan_host_mem_req *mem_reqs;
+ *    A_UINT32 num_mem_reqs;
+ *    A_UINT32 is_allocated_mem_reqs;
+ *
+ * } WMI_SERVICE_READY_EVENTID_param_tlvs;
+ *
+ */
+
+#define WMITLV_CREATE_PARAM_STRUC(wmi_cmd_event_id)	       \
+	typedef enum {						   \
+		WMITLV_TABLE(wmi_cmd_event_id, TAG_ORDER, NULL, 0)     \
+		WMI_TLV_HLPR_NUM_TLVS_FOR_ ## wmi_cmd_event_id		 \
+	} wmi_cmd_event_id ## _TAG_ORDER_enum_type;		     \
+							       \
+	typedef struct {					   \
+		WMITLV_TABLE(wmi_cmd_event_id, STRUCT_FIELD, NULL, 0)  \
+	} WMITLV_TYPEDEF_STRUCT_PARAMS_TLVS (wmi_cmd_event_id);	    \
+
+/** Enum list of TLV Tags for each parameter structure type. */
+typedef enum {
+	/* 0 to 15 is reserved */
+	WMITLV_TAG_LAST_RESERVED = 15,
+	WMITLV_TAG_FIRST_ARRAY_ENUM,            /* First entry of ARRAY type tags */
+	WMITLV_TAG_ARRAY_UINT32 = WMITLV_TAG_FIRST_ARRAY_ENUM,
+	WMITLV_TAG_ARRAY_BYTE,
+	WMITLV_TAG_ARRAY_STRUC,
+	WMITLV_TAG_ARRAY_FIXED_STRUC,
+	WMITLV_TAG_LAST_ARRAY_ENUM = 31,                /* Last entry of ARRAY type tags */
+	WMITLV_TAG_STRUC_wmi_service_ready_event_fixed_param,
+	WMITLV_TAG_STRUC_HAL_REG_CAPABILITIES,
+	WMITLV_TAG_STRUC_wlan_host_mem_req,
+	WMITLV_TAG_STRUC_wmi_ready_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_scan_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_tpc_config_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_comb_phyerr_rx_hdr,
+	WMITLV_TAG_STRUC_wmi_vdev_start_response_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_stopped_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_install_key_complete_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_sta_kickout_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mgmt_rx_hdr,
+	WMITLV_TAG_STRUC_wmi_tbtt_offset_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tx_delba_complete_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tx_addba_complete_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_event_fixed_param,
+	WMITLV_TAG_STRUC_WOW_EVENT_INFO_fixed_param,
+	WMITLV_TAG_STRUC_WOW_EVENT_INFO_SECTION_BITMAP,
+	WMITLV_TAG_STRUC_wmi_rtt_event_header,
+	WMITLV_TAG_STRUC_wmi_rtt_error_report_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rtt_meas_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_echo_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ftm_intg_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_gpio_input_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_csa_event_fixed_param,
+	WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param,
+	WMITLV_TAG_STRUC_wmi_igtk_info,
+	WMITLV_TAG_STRUC_wmi_dcs_interference_event_fixed_param,
+	WMITLV_TAG_STRUC_ath_dcs_cw_int,
+	WMITLV_TAG_STRUC_ath_dcs_wlan_int_stat,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_ctx_t,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_t,
+	WMITLV_TAG_STRUC_wmi_pdev_qvit_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_host_swba_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tim_info,
+	WMITLV_TAG_STRUC_wmi_p2p_noa_info,
+	WMITLV_TAG_STRUC_wmi_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_avoid_freq_ranges_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_avoid_freq_range_desc,
+	WMITLV_TAG_STRUC_wmi_gtk_rekey_fail_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_init_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_resource_config,
+	WMITLV_TAG_STRUC_wlan_host_memory_chunk,
+	WMITLV_TAG_STRUC_wmi_start_scan_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_stop_scan_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_scan_chan_list_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_channel,
+	WMITLV_TAG_STRUC_wmi_pdev_set_regdomain_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_wmm_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wmm_params,
+	WMITLV_TAG_STRUC_wmi_pdev_set_quiet_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_create_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_delete_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_start_request_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_p2p_noa_descriptor,
+	WMITLV_TAG_STRUC_wmi_p2p_go_set_beacon_ie_fixed_param,
+	WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_up_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_stop_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_down_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_set_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_install_key_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_create_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_delete_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_flush_tids_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_set_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_assoc_complete_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vht_rate_set,
+	WMITLV_TAG_STRUC_wmi_bcn_tmpl_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_prb_tmpl_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_bcn_prb_info,
+	WMITLV_TAG_STRUC_wmi_peer_tid_addba_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_tid_delba_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_powersave_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_powersave_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_dtim_ps_method_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_scan_mode_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_scan_rssi_threshold_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_scan_period_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_scan_rssi_change_threshold_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_suspend_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_resume_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_add_bcn_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rmv_bcn_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wow_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wow_hostwakeup_from_sleep_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_uapsd_auto_trig_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_uapsd_auto_trig_param,
+	WMITLV_TAG_STRUC_WMI_SET_ARP_NS_OFFLOAD_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_ARP_OFFLOAD_TUPLE,
+	WMITLV_TAG_STRUC_WMI_NS_OFFLOAD_TUPLE,
+	WMITLV_TAG_STRUC_wmi_ftm_intg_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_STA_KEEPALIVE_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_STA_KEEPALVE_ARP_RESPONSE,
+	WMITLV_TAG_STRUC_wmi_p2p_set_vendor_ie_data_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ap_ps_peer_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_rate_retry_sched_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_trigger_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_set_hist_intvl_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_get_prof_data_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wlan_profile_enable_profile_id_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_DEL_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_ADD_DEL_EVT_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rtt_measreq_head,
+	WMITLV_TAG_STRUC_wmi_rtt_measreq_body,
+	WMITLV_TAG_STRUC_wmi_rtt_tsf_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_spectral_configure_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_spectral_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_request_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_nlo_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_nlo_configured_parameters,
+	WMITLV_TAG_STRUC_wmi_csa_offload_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_csa_offload_chanswitch_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chatter_set_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_echo_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_set_keepalive_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_FORCE_FW_HANG_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_gpio_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_gpio_output_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_add_wds_entry_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_remove_wds_entry_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_bcn_tx_hdr,
+	WMITLV_TAG_STRUC_wmi_bcn_send_from_host_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mgmt_tx_hdr,
+	WMITLV_TAG_STRUC_wmi_addba_clear_resp_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_addba_send_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_delba_send_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_addba_setresponse_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_send_singleamsdu_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_pktlog_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_pktlog_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_ht_ie_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_vht_ie_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_dscp_tid_map_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_green_ap_ps_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_get_tpc_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_base_macaddr_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_mcast_group_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_ap_profile_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ap_profile,
+	WMITLV_TAG_STRUC_wmi_scan_sch_priority_table_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_dfs_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_dfs_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_ADD_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WOW_BITMAP_PATTERN_T,
+	WMITLV_TAG_STRUC_WOW_IPV4_SYNC_PATTERN_T,
+	WMITLV_TAG_STRUC_WOW_IPV6_SYNC_PATTERN_T,
+	WMITLV_TAG_STRUC_WOW_MAGIC_PATTERN_CMD,
+	WMITLV_TAG_STRUC_WMI_scan_update_request_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chatter_pkt_coalescing_filter,
+	WMITLV_TAG_STRUC_wmi_chatter_coalescing_add_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chatter_coalescing_delete_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chatter_coalescing_query_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_txbf_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_debug_log_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_nlo_event,
+	WMITLV_TAG_STRUC_wmi_chatter_query_reply_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_upload_h_hdr,
+	WMITLV_TAG_STRUC_wmi_capture_h_event_hdr,
+	WMITLV_TAG_STRUC_WMI_VDEV_WNM_SLEEPMODE_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_wmm_addts_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_wmm_delts_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_set_wmm_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tdls_set_state_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tdls_peer_update_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tdls_peer_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tdls_peer_capabilities,
+	WMITLV_TAG_STRUC_wmi_vdev_mcc_set_tbtt_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_chan_list_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_mcc_bcn_intvl_change_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_resmgr_adaptive_ocs_enable_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_resmgr_set_chan_time_quota_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_resmgr_set_chan_latency_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ba_req_ssn_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ba_rsp_ssn_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sta_smps_force_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_SET_MCASTBCAST_FILTER_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_p2p_set_oppps_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_p2p_set_noa_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ba_req_ssn_cmd_sub_struct_param,
+	WMITLV_TAG_STRUC_wmi_ba_req_ssn_event_sub_struct_param,
+	WMITLV_TAG_STRUC_wmi_sta_smps_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_set_gtx_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mcc_sched_traffic_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mcc_sched_sta_traffic_stats,
+	WMITLV_TAG_STRUC_wmi_offload_bcn_tx_status_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_p2p_noa_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_set_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_set_tcp_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_set_tcp_pkt_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_set_udp_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_set_udp_pkt_filter_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_hb_ind_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tx_pause_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rfkill_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dfs_radar_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_ena_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_dis_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_batch_scan_result_scan_list,
+	WMITLV_TAG_STRUC_wmi_batch_scan_result_network_info,
+	WMITLV_TAG_STRUC_wmi_batch_scan_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_batch_scan_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_batch_scan_trigger_result_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_batch_scan_enabled_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_batch_scan_result_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_plmreq_start_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_plmreq_stop_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_thermal_mgmt_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_thermal_mgmt_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_info_req_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_info_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_info,
+	WMITLV_TAG_STRUC_wmi_peer_tx_fail_cnt_thr_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rmc_set_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rmc_set_action_period_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rmc_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mhf_offload_set_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mhf_offload_plumb_routing_table_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_nan_cmd_param,
+	WMITLV_TAG_STRUC_wmi_nan_event_hdr,
+	WMITLV_TAG_STRUC_wmi_pdev_l1ss_track_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_diag_data_container_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_modem_power_state_cmd_param,
+	WMITLV_TAG_STRUC_wmi_peer_get_estimated_linkspeed_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_estimated_linkspeed_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_aggr_state_trig_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mhf_offload_routing_table_entry,
+	WMITLV_TAG_STRUC_wmi_roam_scan_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_req_stats_ext_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_stats_ext_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_obss_scan_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_obss_scan_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_offload_prb_rsp_tx_status_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_led_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_host_auto_shutdown_cfg_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_host_auto_shutdown_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_update_whal_mib_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_chan_avoid_update_cmd_param,
+	WMITLV_TAG_STRUC_WOW_IOAC_PKT_PATTERN_T,
+	WMITLV_TAG_STRUC_WOW_IOAC_TMR_PATTERN_T,
+	WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_KEEPALIVE_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_KEEPALIVE_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_IOAC_KEEPALIVE_T,
+	WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_PATTERN_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_start_link_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_clear_link_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_request_link_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_iface_link_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_radio_link_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_channel_stats,
+	WMITLV_TAG_STRUC_wmi_radio_link_stats,
+	WMITLV_TAG_STRUC_wmi_rate_stats,
+	WMITLV_TAG_STRUC_wmi_peer_link_stats,
+	WMITLV_TAG_STRUC_wmi_wmm_ac_stats,
+	WMITLV_TAG_STRUC_wmi_iface_link_stats,
+	WMITLV_TAG_STRUC_wmi_lpi_mgmt_snooping_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lpi_start_scan_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lpi_stop_scan_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lpi_result_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_state_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_bucket_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_bucket_channel_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_start_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_stop_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_configure_wlan_change_monitor_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_wlan_change_bssid_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_configure_hotlist_monitor_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_get_cached_results_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_get_wlan_change_results_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_set_capabilities_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_get_capabilities_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_operation_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_start_stop_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_table_usage_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_wlan_descriptor_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_rssi_info_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_cached_results_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_wlan_change_results_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_wlan_change_result_bssid_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_hotlist_match_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_capabilities_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_cache_capabilities_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_wlan_change_monitor_capabilities_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_hotlist_monitor_capabilities_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_d0_wow_enable_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_d0_wow_disable_ack_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_unit_test_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_offload_tlv_param,
+	WMITLV_TAG_STRUC_wmi_roam_11i_offload_tlv_param,
+	WMITLV_TAG_STRUC_wmi_roam_11r_offload_tlv_param,
+	WMITLV_TAG_STRUC_wmi_roam_ese_offload_tlv_param,
+	WMITLV_TAG_STRUC_wmi_roam_synch_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_synch_complete_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extwow_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extwow_set_app_type1_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extwow_set_app_type2_params_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lpi_status_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lpi_handoff_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_rate_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_rate_ht_info,
+	WMITLV_TAG_STRUC_wmi_ric_request_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_get_temperature_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_temperature_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_set_dhcp_server_offload_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_tpc_chainmask_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ric_tspec,
+	WMITLV_TAG_STRUC_wmi_tpc_chainmask_config,
+	WMITLV_TAG_STRUCT_wmi_ipa_offload_enable_disable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_scan_prob_req_oui_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_key_material,
+	WMITLV_TAG_STRUC_wmi_tdls_set_offchan_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_set_led_flashing_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mdns_offload_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mdns_set_fqdn_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mdns_set_resp_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mdns_get_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mdns_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_invoke_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_resume_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_pdev_set_antenna_diversity_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sap_ofl_enable_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sap_ofl_add_sta_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sap_ofl_del_sta_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_apfind_cmd_param,
+	WMITLV_TAG_STRUC_wmi_apfind_event_hdr,
+	WMITLV_TAG_STRUC_wmi_ocb_set_sched_cmd_fixed_param, /* DEPRECATED */
+	WMITLV_TAG_STRUC_wmi_ocb_set_sched_event_fixed_param, /* DEPRECATED */
+	WMITLV_TAG_STRUC_wmi_ocb_set_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_set_config_resp_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_set_utc_time_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_start_timing_advert_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_stop_timing_advert_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_resp_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_get_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_channel_stats_request,
+	WMITLV_TAG_STRUC_wmi_dcc_get_stats_resp_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_clear_stats_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_update_ndl_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_update_ndl_resp_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_dcc_stats_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ocb_channel,
+	WMITLV_TAG_STRUC_wmi_ocb_schedule_element,
+	WMITLV_TAG_STRUC_wmi_dcc_ndl_stats_per_channel,
+	WMITLV_TAG_STRUC_wmi_dcc_ndl_chan,
+	WMITLV_TAG_STRUC_wmi_qos_parameter,
+	WMITLV_TAG_STRUC_wmi_dcc_ndl_active_state_config,
+	WMITLV_TAG_STRUC_wmi_roam_scan_extended_threshold_param,
+	WMITLV_TAG_STRUC_wmi_roam_filter_fixed_param,
+	WMITLV_TAG_STRUC_wmi_passpoint_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_passpoint_event_hdr,
+	WMITLV_TAG_STRUC_wmi_extscan_configure_hotlist_ssid_monitor_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_hotlist_ssid_match_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_tsf_tstamp_action_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_tsf_report_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_get_fw_mem_dump_fixed_param,
+	WMITLV_TAG_STRUC_wmi_update_fw_mem_dump_fixed_param,
+	WMITLV_TAG_STRUC_wmi_fw_mem_dump_params,
+	WMITLV_TAG_STRUC_wmi_debug_mesg_flush_fixed_param,
+	WMITLV_TAG_STRUC_wmi_debug_mesg_flush_complete_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_set_rate_report_condition_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_subnet_change_config_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_set_ie_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rssi_breach_monitor_config_fixed_param,
+	WMITLV_TAG_STRUC_wmi_rssi_breach_event_fixed_param,
+	WMITLV_TAG_STRUC_WOW_EVENT_INITIAL_WAKEUP_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_set_pcl_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_response_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_hw_mode_transition_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_vdev_txrx_streams,
+	WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_response_vdev_mac_entry,
+	WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_response_event_fixed_param,
+	WMITLV_TAG_STRUC_WOW_IOAC_SOCK_PATTERN_T,
+	WMITLV_TAG_STRUC_wmi_wow_enable_icmpv6_na_flt_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_diag_event_log_config_fixed_param,
+	WMITLV_TAG_STRUC_wmi_diag_event_log_supported_event_fixed_params,
+	WMITLV_TAG_STRUC_wmi_packet_filter_config_fixed_param,
+	WMITLV_TAG_STRUC_wmi_packet_filter_enable_fixed_param,
+	WMITLV_TAG_STRUC_wmi_sap_set_blacklist_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mgmt_tx_send_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mgmt_tx_compl_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_soc_set_antenna_mode_cmd_fixed_param,
+	WMITLV_TAG_STRUC_WMI_WOW_UDP_SVC_OFLD_CMD_fixed_param,
+	WMITLV_TAG_STRUC_wmi_lro_info_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_earlystop_rssi_thres_param,
+	WMITLV_TAG_STRUC_wmi_service_ready_ext_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mawc_sensor_report_ind_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_mawc_enable_sensor_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_roam_configure_mawc_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_nlo_configure_mawc_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_extscan_configure_mawc_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_peer_assoc_conf_event_fixed_param,
+	WMITLV_TAG_STRUC_wmi_wow_hostwakeup_gpio_pin_pattern_config_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ap_ps_egap_param_cmd_fixed_param,
+	WMITLV_TAG_STRUC_wmi_ap_ps_egap_info_event_fixed_param,
+	WMITLV_TAG_STRUC_WMI_PMF_OFFLOAD_SET_SA_QUERY_CMD_fixed_param,
+} WMITLV_TAG_ID;
+
+/*
+ * IMPORTANT: Please add _ALL_ WMI Commands Here.
+ * Otherwise, these WMI TLV Functions will be process them.
+ */
+#define WMITLV_ALL_CMD_LIST(OP)	\
+	OP(WMI_INIT_CMDID) \
+	OP(WMI_PEER_CREATE_CMDID) \
+	OP(WMI_PEER_DELETE_CMDID) \
+	OP(WMI_PEER_FLUSH_TIDS_CMDID) \
+	OP(WMI_PEER_SET_PARAM_CMDID) \
+	OP(WMI_STA_POWERSAVE_MODE_CMDID) \
+	OP(WMI_STA_POWERSAVE_PARAM_CMDID) \
+	OP(WMI_STA_DTIM_PS_METHOD_CMDID) \
+	OP(WMI_PDEV_SET_REGDOMAIN_CMDID) \
+	OP(WMI_PEER_TID_ADDBA_CMDID) \
+	OP(WMI_PEER_TID_DELBA_CMDID) \
+	OP(WMI_PDEV_FTM_INTG_CMDID) \
+	OP(WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID)	\
+	OP(WMI_WOW_ENABLE_CMDID) \
+	OP(WMI_RMV_BCN_FILTER_CMDID) \
+	OP(WMI_ROAM_SCAN_MODE) \
+	OP(WMI_ROAM_SCAN_RSSI_THRESHOLD) \
+	OP(WMI_ROAM_SCAN_PERIOD) \
+	OP(WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD)	\
+	OP(WMI_START_SCAN_CMDID) \
+	OP(WMI_VDEV_PLMREQ_START_CMDID)	\
+	OP(WMI_VDEV_PLMREQ_STOP_CMDID) \
+	OP(WMI_PDEV_SET_CHANNEL_CMDID) \
+	OP(WMI_PDEV_SET_WMM_PARAMS_CMDID) \
+	OP(WMI_VDEV_START_REQUEST_CMDID) \
+	OP(WMI_VDEV_RESTART_REQUEST_CMDID) \
+	OP(WMI_P2P_GO_SET_BEACON_IE) \
+	OP(WMI_GTK_OFFLOAD_CMDID) \
+	OP(WMI_SCAN_CHAN_LIST_CMDID) \
+	OP(WMI_STA_UAPSD_AUTO_TRIG_CMDID) \
+	OP(WMI_PRB_TMPL_CMDID) \
+	OP(WMI_BCN_TMPL_CMDID) \
+	OP(WMI_VDEV_INSTALL_KEY_CMDID) \
+	OP(WMI_PEER_ASSOC_CMDID) \
+	OP(WMI_ADD_BCN_FILTER_CMDID) \
+	OP(WMI_STA_KEEPALIVE_CMDID) \
+	OP(WMI_SET_ARP_NS_OFFLOAD_CMDID) \
+	OP(WMI_P2P_SET_VENDOR_IE_DATA_CMDID) \
+	OP(WMI_AP_PS_PEER_PARAM_CMDID) \
+	OP(WMI_WLAN_PROFILE_TRIGGER_CMDID) \
+	OP(WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID) \
+	OP(WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID) \
+	OP(WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID) \
+	OP(WMI_WOW_DEL_WAKE_PATTERN_CMDID) \
+	OP(WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID) \
+	OP(WMI_RTT_MEASREQ_CMDID) \
+	OP(WMI_RTT_TSF_CMDID) \
+	OP(WMI_OEM_REQ_CMDID) \
+	OP(WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID) \
+	OP(WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID)	\
+	OP(WMI_REQUEST_STATS_CMDID) \
+	OP(WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID) \
+	OP(WMI_CSA_OFFLOAD_ENABLE_CMDID) \
+	OP(WMI_CSA_OFFLOAD_CHANSWITCH_CMDID) \
+	OP(WMI_CHATTER_SET_MODE_CMDID) \
+	OP(WMI_ECHO_CMDID) \
+	OP(WMI_PDEV_UTF_CMDID) \
+	OP(WMI_PDEV_QVIT_CMDID)	\
+	OP(WMI_VDEV_SET_KEEPALIVE_CMDID) \
+	OP(WMI_VDEV_GET_KEEPALIVE_CMDID) \
+	OP(WMI_FORCE_FW_HANG_CMDID) \
+	OP(WMI_GPIO_CONFIG_CMDID) \
+	OP(WMI_GPIO_OUTPUT_CMDID) \
+	OP(WMI_PEER_ADD_WDS_ENTRY_CMDID) \
+	OP(WMI_PEER_REMOVE_WDS_ENTRY_CMDID) \
+	OP(WMI_BCN_TX_CMDID) \
+	OP(WMI_PDEV_SEND_BCN_CMDID) \
+	OP(WMI_MGMT_TX_CMDID) \
+	OP(WMI_ADDBA_CLEAR_RESP_CMDID) \
+	OP(WMI_ADDBA_SEND_CMDID) \
+	OP(WMI_DELBA_SEND_CMDID) \
+	OP(WMI_ADDBA_SET_RESP_CMDID) \
+	OP(WMI_SEND_SINGLEAMSDU_CMDID) \
+	OP(WMI_PDEV_PKTLOG_ENABLE_CMDID) \
+	OP(WMI_PDEV_PKTLOG_DISABLE_CMDID) \
+	OP(WMI_PDEV_SET_HT_CAP_IE_CMDID) \
+	OP(WMI_PDEV_SET_VHT_CAP_IE_CMDID) \
+	OP(WMI_PDEV_SET_DSCP_TID_MAP_CMDID) \
+	OP(WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID) \
+	OP(WMI_PDEV_GET_TPC_CONFIG_CMDID) \
+	OP(WMI_PDEV_SET_BASE_MACADDR_CMDID) \
+	OP(WMI_PEER_MCAST_GROUP_CMDID) \
+	OP(WMI_ROAM_AP_PROFILE)	\
+	OP(WMI_SCAN_SCH_PRIO_TBL_CMDID)	\
+	OP(WMI_PDEV_DFS_ENABLE_CMDID) \
+	OP(WMI_PDEV_DFS_DISABLE_CMDID) \
+	OP(WMI_WOW_ADD_WAKE_PATTERN_CMDID) \
+	OP(WMI_PDEV_SUSPEND_CMDID) \
+	OP(WMI_PDEV_RESUME_CMDID) \
+	OP(WMI_STOP_SCAN_CMDID)	\
+	OP(WMI_PDEV_SET_PARAM_CMDID) \
+	OP(WMI_PDEV_SET_QUIET_MODE_CMDID) \
+	OP(WMI_VDEV_CREATE_CMDID) \
+	OP(WMI_VDEV_DELETE_CMDID) \
+	OP(WMI_VDEV_UP_CMDID) \
+	OP(WMI_VDEV_STOP_CMDID)	\
+	OP(WMI_VDEV_DOWN_CMDID)	\
+	OP(WMI_VDEV_SET_PARAM_CMDID) \
+	OP(WMI_SCAN_UPDATE_REQUEST_CMDID) \
+	OP(WMI_CHATTER_ADD_COALESCING_FILTER_CMDID) \
+	OP(WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID) \
+	OP(WMI_CHATTER_COALESCING_QUERY_CMDID) \
+	OP(WMI_TXBF_CMDID) \
+	OP(WMI_DBGLOG_CFG_CMDID) \
+	OP(WMI_VDEV_WNM_SLEEPMODE_CMDID) \
+	OP(WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID) \
+	OP(WMI_VDEV_WMM_ADDTS_CMDID) \
+	OP(WMI_VDEV_WMM_DELTS_CMDID) \
+	OP(WMI_VDEV_SET_WMM_PARAMS_CMDID) \
+	OP(WMI_VDEV_SET_GTX_PARAMS_CMDID) \
+	OP(WMI_TDLS_SET_STATE_CMDID) \
+	OP(WMI_TDLS_PEER_UPDATE_CMDID) \
+	OP(WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID) \
+	OP(WMI_ROAM_CHAN_LIST)	\
+	OP(WMI_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMDID) \
+	OP(WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID)    \
+	OP(WMI_RESMGR_SET_CHAN_LATENCY_CMDID) \
+	OP(WMI_BA_REQ_SSN_CMDID) \
+	OP(WMI_STA_SMPS_FORCE_MODE_CMDID) \
+	OP(WMI_SET_MCASTBCAST_FILTER_CMDID) \
+	OP(WMI_P2P_SET_OPPPS_PARAM_CMDID) \
+	OP(WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID) \
+	OP(WMI_STA_SMPS_PARAM_CMDID) \
+	OP(WMI_MCC_SCHED_TRAFFIC_STATS_CMDID) \
+	OP(WMI_HB_SET_ENABLE_CMDID) \
+	OP(WMI_HB_SET_TCP_PARAMS_CMDID)	\
+	OP(WMI_HB_SET_TCP_PKT_FILTER_CMDID) \
+	OP(WMI_HB_SET_UDP_PARAMS_CMDID)	\
+	OP(WMI_HB_SET_UDP_PKT_FILTER_CMDID) \
+	OP(WMI_PEER_INFO_REQ_CMDID) \
+	OP(WMI_RMC_SET_MODE_CMDID) \
+	OP(WMI_RMC_SET_ACTION_PERIOD_CMDID) \
+	OP(WMI_RMC_CONFIG_CMDID) \
+	OP(WMI_MHF_OFFLOAD_SET_MODE_CMDID) \
+	OP(WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID) \
+	OP(WMI_DFS_PHYERR_FILTER_ENA_CMDID) \
+	OP(WMI_DFS_PHYERR_FILTER_DIS_CMDID) \
+	OP(WMI_BATCH_SCAN_ENABLE_CMDID)	\
+	OP(WMI_BATCH_SCAN_DISABLE_CMDID) \
+	OP(WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID)	\
+	OP(WMI_THERMAL_MGMT_CMDID) \
+	OP(WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID) \
+	OP(WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID) \
+	OP(WMI_NAN_CMDID) \
+	OP(WMI_MODEM_POWER_STATE_CMDID)	\
+	OP(WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID) \
+	OP(WMI_ROAM_SCAN_CMD) \
+	OP(WMI_REQUEST_STATS_EXT_CMDID)	\
+	OP(WMI_OBSS_SCAN_ENABLE_CMDID) \
+	OP(WMI_OBSS_SCAN_DISABLE_CMDID)	\
+	OP(WMI_PDEV_SET_LED_CONFIG_CMDID) \
+	OP(WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID) \
+	OP(WMI_TPC_CHAINMASK_CONFIG_CMDID) \
+	OP(WMI_CHAN_AVOID_UPDATE_CMDID)	\
+	OP(WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID) \
+	OP(WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID) \
+	OP(WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID)	\
+	OP(WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID)	\
+	OP(WMI_REQUEST_LINK_STATS_CMDID) \
+	OP(WMI_START_LINK_STATS_CMDID) \
+	OP(WMI_CLEAR_LINK_STATS_CMDID) \
+	OP(WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID) \
+	OP(WMI_LPI_START_SCAN_CMDID) \
+	OP(WMI_LPI_STOP_SCAN_CMDID) \
+	OP(WMI_EXTSCAN_START_CMDID) \
+	OP(WMI_EXTSCAN_STOP_CMDID) \
+	OP(WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID) \
+	OP(WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID)	\
+	OP(WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID) \
+	OP(WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID) \
+	OP(WMI_EXTSCAN_SET_CAPABILITIES_CMDID) \
+	OP(WMI_EXTSCAN_GET_CAPABILITIES_CMDID) \
+	OP(WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID) \
+	OP(WMI_D0_WOW_ENABLE_DISABLE_CMDID) \
+	OP(WMI_UNIT_TEST_CMDID)	\
+	OP(WMI_ROAM_SYNCH_COMPLETE) \
+	OP(WMI_EXTWOW_ENABLE_CMDID) \
+	OP(WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID) \
+	OP(WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID) \
+	OP(WMI_ROAM_SET_RIC_REQUEST_CMDID) \
+	OP(WMI_PDEV_GET_TEMPERATURE_CMDID) \
+	OP(WMI_SET_DHCP_SERVER_OFFLOAD_CMDID) \
+	OP(WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID) \
+	OP(WMI_SCAN_PROB_REQ_OUI_CMDID)	\
+	OP(WMI_TDLS_SET_OFFCHAN_MODE_CMDID) \
+	OP(WMI_PDEV_SET_LED_FLASHING_CMDID) \
+	OP(WMI_ROAM_INVOKE_CMDID) \
+	OP(WMI_MDNS_OFFLOAD_ENABLE_CMDID) \
+	OP(WMI_MDNS_SET_FQDN_CMDID) \
+	OP(WMI_MDNS_SET_RESPONSE_CMDID) \
+	OP(WMI_MDNS_GET_STATS_CMDID) \
+	OP(WMI_SET_ANTENNA_DIVERSITY_CMDID) \
+	OP(WMI_SAP_OFL_ENABLE_CMDID) \
+	OP(WMI_APFIND_CMDID) \
+	OP(WMI_OCB_SET_SCHED_CMDID) \
+	OP(WMI_OCB_SET_CONFIG_CMDID) \
+	OP(WMI_OCB_SET_UTC_TIME_CMDID) \
+	OP(WMI_OCB_START_TIMING_ADVERT_CMDID) \
+	OP(WMI_OCB_STOP_TIMING_ADVERT_CMDID) \
+	OP(WMI_OCB_GET_TSF_TIMER_CMDID) \
+	OP(WMI_DCC_GET_STATS_CMDID) \
+	OP(WMI_DCC_CLEAR_STATS_CMDID) \
+	OP(WMI_DCC_UPDATE_NDL_CMDID) \
+	OP(WMI_ROAM_FILTER_CMDID) \
+	OP(WMI_PASSPOINT_LIST_CONFIG_CMDID) \
+	OP(WMI_VDEV_TSF_TSTAMP_ACTION_CMDID) \
+	OP(WMI_GET_FW_MEM_DUMP_CMDID) \
+	OP(WMI_DEBUG_MESG_FLUSH_CMDID) \
+	OP(WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID) \
+	OP(WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID) \
+	OP(WMI_VDEV_SET_IE_CMDID) \
+	OP(WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID) \
+	OP(WMI_SOC_SET_PCL_CMDID) \
+	OP(WMI_SOC_SET_HW_MODE_CMDID) \
+	OP(WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID) \
+	OP(WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID) \
+	OP(WMI_DIAG_EVENT_LOG_CONFIG_CMDID) \
+	OP(WMI_PACKET_FILTER_CONFIG_CMDID) \
+	OP(WMI_PACKET_FILTER_ENABLE_CMDID) \
+	OP(WMI_SAP_SET_BLACKLIST_PARAM_CMDID) \
+	OP(WMI_MGMT_TX_SEND_CMDID) \
+	OP(WMI_SOC_SET_ANTENNA_MODE_CMDID) \
+	OP(WMI_WOW_UDP_SVC_OFLD_CMDID) \
+	OP(WMI_LRO_CONFIG_CMDID) \
+	OP(WMI_MAWC_SENSOR_REPORT_IND_CMDID) \
+	OP(WMI_ROAM_CONFIGURE_MAWC_CMDID) \
+	OP(WMI_NLO_CONFIGURE_MAWC_CMDID) \
+	OP(WMI_EXTSCAN_CONFIGURE_MAWC_CMDID) \
+	OP(WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID) \
+	OP(WMI_AP_PS_EGAP_PARAM_CMDID) \
+	OP(WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID)
+/*
+ * IMPORTANT: Please add _ALL_ WMI Events Here.
+ * Otherwise, these WMI TLV Functions will be process them.
+ */
+#define WMITLV_ALL_EVT_LIST(OP)	\
+	OP(WMI_SERVICE_READY_EVENTID) \
+	OP(WMI_SERVICE_READY_EXT_EVENTID) \
+	OP(WMI_READY_EVENTID) \
+	OP(WMI_SCAN_EVENTID) \
+	OP(WMI_PDEV_TPC_CONFIG_EVENTID)	\
+	OP(WMI_CHAN_INFO_EVENTID) \
+	OP(WMI_PHYERR_EVENTID) \
+	OP(WMI_VDEV_START_RESP_EVENTID)	\
+	OP(WMI_VDEV_STOPPED_EVENTID) \
+	OP(WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID) \
+	OP(WMI_PEER_STA_KICKOUT_EVENTID) \
+	OP(WMI_MGMT_RX_EVENTID)	\
+	OP(WMI_TBTTOFFSET_UPDATE_EVENTID) \
+	OP(WMI_TX_DELBA_COMPLETE_EVENTID) \
+	OP(WMI_TX_ADDBA_COMPLETE_EVENTID) \
+	OP(WMI_ROAM_EVENTID) \
+	OP(WMI_WOW_WAKEUP_HOST_EVENTID)	\
+	OP(WMI_RTT_ERROR_REPORT_EVENTID) \
+	OP(WMI_OEM_MEASUREMENT_REPORT_EVENTID) \
+	OP(WMI_OEM_ERROR_REPORT_EVENTID) \
+	OP(WMI_OEM_CAPABILITY_EVENTID) \
+	OP(WMI_ECHO_EVENTID) \
+	OP(WMI_PDEV_FTM_INTG_EVENTID) \
+	OP(WMI_VDEV_GET_KEEPALIVE_EVENTID) \
+	OP(WMI_GPIO_INPUT_EVENTID) \
+	OP(WMI_CSA_HANDLING_EVENTID) \
+	OP(WMI_DEBUG_MESG_EVENTID) \
+	OP(WMI_GTK_OFFLOAD_STATUS_EVENTID) \
+	OP(WMI_DCS_INTERFERENCE_EVENTID) \
+	OP(WMI_WLAN_PROFILE_DATA_EVENTID) \
+	OP(WMI_PDEV_UTF_EVENTID) \
+	OP(WMI_DEBUG_PRINT_EVENTID) \
+	OP(WMI_RTT_MEASUREMENT_REPORT_EVENTID) \
+	OP(WMI_HOST_SWBA_EVENTID) \
+	OP(WMI_UPDATE_STATS_EVENTID) \
+	OP(WMI_PDEV_QVIT_EVENTID) \
+	OP(WMI_WLAN_FREQ_AVOID_EVENTID)	\
+	OP(WMI_GTK_REKEY_FAIL_EVENTID) \
+	OP(WMI_NLO_MATCH_EVENTID) \
+	OP(WMI_NLO_SCAN_COMPLETE_EVENTID) \
+	OP(WMI_APFIND_EVENTID) \
+	OP(WMI_CHATTER_PC_QUERY_EVENTID) \
+	OP(WMI_UPLOADH_EVENTID)	\
+	OP(WMI_CAPTUREH_EVENTID) \
+	OP(WMI_TDLS_PEER_EVENTID) \
+	OP(WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID) \
+	OP(WMI_BA_RSP_SSN_EVENTID) \
+	OP(WMI_OFFLOAD_BCN_TX_STATUS_EVENTID) \
+	OP(WMI_P2P_NOA_EVENTID)	\
+	OP(WMI_TX_PAUSE_EVENTID) \
+	OP(WMI_RFKILL_STATE_CHANGE_EVENTID) \
+	OP(WMI_PEER_INFO_EVENTID) \
+	OP(WMI_PEER_TX_FAIL_CNT_THR_EVENTID) \
+	OP(WMI_DFS_RADAR_EVENTID) \
+	OP(WMI_BATCH_SCAN_ENABLED_EVENTID) \
+	OP(WMI_BATCH_SCAN_RESULT_EVENTID) \
+	OP(WMI_THERMAL_MGMT_EVENTID) \
+	OP(WMI_NAN_EVENTID) \
+	OP(WMI_PDEV_L1SS_TRACK_EVENTID)	\
+	OP(WMI_DIAG_DATA_CONTAINER_EVENTID) \
+	OP(WMI_PEER_ESTIMATED_LINKSPEED_EVENTID) \
+	OP(WMI_AGGR_STATE_TRIG_EVENTID)	\
+	OP(WMI_STATS_EXT_EVENTID) \
+	OP(WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID) \
+	OP(WMI_HOST_AUTO_SHUTDOWN_EVENTID) \
+	OP(WMI_UPDATE_WHAL_MIB_STATS_EVENTID) \
+	OP(WMI_IFACE_LINK_STATS_EVENTID) \
+	OP(WMI_PEER_LINK_STATS_EVENTID)	\
+	OP(WMI_RADIO_LINK_STATS_EVENTID) \
+	OP(WMI_LPI_RESULT_EVENTID) \
+	OP(WMI_PEER_STATE_EVENTID) \
+	OP(WMI_EXTSCAN_START_STOP_EVENTID) \
+	OP(WMI_EXTSCAN_OPERATION_EVENTID) \
+	OP(WMI_EXTSCAN_TABLE_USAGE_EVENTID) \
+	OP(WMI_EXTSCAN_CACHED_RESULTS_EVENTID) \
+	OP(WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID) \
+	OP(WMI_EXTSCAN_HOTLIST_MATCH_EVENTID) \
+	OP(WMI_EXTSCAN_CAPABILITIES_EVENTID) \
+	OP(WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID) \
+	OP(WMI_D0_WOW_DISABLE_ACK_EVENTID) \
+	OP(WMI_ROAM_SYNCH_EVENTID) \
+	OP(WMI_LPI_STATUS_EVENTID) \
+	OP(WMI_LPI_HANDOFF_EVENTID) \
+	OP(WMI_UPDATE_VDEV_RATE_STATS_EVENTID) \
+	OP(WMI_PDEV_TEMPERATURE_EVENTID) \
+	OP(WMI_DIAG_EVENTID) \
+	OP(WMI_MDNS_STATS_EVENTID) \
+	OP(WMI_PDEV_RESUME_EVENTID) \
+	OP(WMI_SAP_OFL_ADD_STA_EVENTID) \
+	OP(WMI_SAP_OFL_DEL_STA_EVENTID) \
+	OP(WMI_OCB_SET_SCHED_EVENTID) \
+	OP(WMI_OCB_SET_CONFIG_RESP_EVENTID) \
+	OP(WMI_OCB_GET_TSF_TIMER_RESP_EVENTID) \
+	OP(WMI_DCC_GET_STATS_RESP_EVENTID) \
+	OP(WMI_DCC_UPDATE_NDL_RESP_EVENTID) \
+	OP(WMI_DCC_STATS_EVENTID) \
+	OP(WMI_PASSPOINT_MATCH_EVENTID)\
+	OP(WMI_VDEV_TSF_REPORT_EVENTID) \
+	OP(WMI_UPDATE_FW_MEM_DUMP_EVENTID) \
+	OP(WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID) \
+	OP(WMI_RSSI_BREACH_EVENTID) \
+	OP(WMI_WOW_INITIAL_WAKEUP_EVENTID) \
+	OP(WMI_SOC_SET_HW_MODE_RESP_EVENTID) \
+	OP(WMI_SOC_HW_MODE_TRANSITION_EVENTID) \
+	OP(WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID) \
+	OP(WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID) \
+	OP(WMI_MGMT_TX_COMPLETION_EVENTID) \
+	OP(WMI_MAWC_ENABLE_SENSOR_EVENTID) \
+	OP(WMI_PEER_ASSOC_CONF_EVENTID) \
+	OP(WMI_AP_PS_EGAP_INFO_EVENTID)
+
+/* TLV definitions of WMI commands */
+
+/* Init Cmd */
+#define WMITLV_TABLE_WMI_INIT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_init_cmd_fixed_param, wmi_init_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_resource_config, wmi_resource_config, resource_config, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wlan_host_memory_chunk, host_mem_chunks, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_INIT_CMDID);
+
+/* Peer create Cmd */
+#define WMITLV_TABLE_WMI_PEER_CREATE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_create_cmd_fixed_param, wmi_peer_create_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CREATE_CMDID);
+
+/* Peer delete Cmd */
+#define WMITLV_TABLE_WMI_PEER_DELETE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_delete_cmd_fixed_param, wmi_peer_delete_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_DELETE_CMDID);
+
+/* Peer flush Cmd*/
+#define WMITLV_TABLE_WMI_PEER_FLUSH_TIDS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_flush_tids_cmd_fixed_param, wmi_peer_flush_tids_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_FLUSH_TIDS_CMDID);
+
+/* Peer Set Param Cmd */
+#define WMITLV_TABLE_WMI_PEER_SET_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_set_param_cmd_fixed_param, wmi_peer_set_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_SET_PARAM_CMDID);
+
+/* STA Powersave Mode Cmd */
+#define WMITLV_TABLE_WMI_STA_POWERSAVE_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_powersave_mode_cmd_fixed_param, wmi_sta_powersave_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_POWERSAVE_MODE_CMDID);
+
+/* STA Powersave Param Cmd */
+#define WMITLV_TABLE_WMI_STA_POWERSAVE_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_powersave_param_cmd_fixed_param, wmi_sta_powersave_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_POWERSAVE_PARAM_CMDID);
+
+/* STA DTIM PS METHOD Cmd */
+#define WMITLV_TABLE_WMI_STA_DTIM_PS_METHOD_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_dtim_ps_method_cmd_fixed_param, wmi_sta_dtim_ps_method_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_DTIM_PS_METHOD_CMDID);
+
+/* Pdev Set Reg Domain Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_REGDOMAIN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_regdomain_cmd_fixed_param, wmi_pdev_set_regdomain_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_REGDOMAIN_CMDID);
+
+/* Peer TID ADD BA Cmd */
+#define WMITLV_TABLE_WMI_PEER_TID_ADDBA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_addba_cmd_fixed_param, wmi_peer_tid_addba_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_TID_ADDBA_CMDID);
+
+/* Peer TID DEL BA Cmd */
+#define WMITLV_TABLE_WMI_PEER_TID_DELBA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_delba_cmd_fixed_param, wmi_peer_tid_delba_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_TID_DELBA_CMDID);
+/* Peer Req Add BA Ssn for staId/tid pair Cmd */
+#define WMITLV_TABLE_WMI_BA_REQ_SSN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ba_req_ssn_cmd_fixed_param, wmi_ba_req_ssn_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_ARRAY_STRUC, wmi_ba_req_ssn, ba_req_ssn_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_BA_REQ_SSN_CMDID);
+
+/* PDEV FTM integration Cmd */
+#define WMITLV_TABLE_WMI_PDEV_FTM_INTG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ftm_intg_cmd_fixed_param, wmi_ftm_intg_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_FTM_INTG_CMDID);
+
+/* WOW Wakeup from sleep Cmd */
+#define WMITLV_TABLE_WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID(id,op,buf,len)								\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wow_hostwakeup_from_sleep_cmd_fixed_param, wmi_wow_hostwakeup_from_sleep_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
+
+/* WOW Enable Cmd */
+#define WMITLV_TABLE_WMI_WOW_ENABLE_CMDID(id,op,buf,len)							 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wow_enable_cmd_fixed_param, wmi_wow_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_ENABLE_CMDID);
+
+/* WOW ICMPv6 NA filtering command */
+#define WMITLV_TABLE_WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_wow_enable_icmpv6_na_flt_cmd_fixed_param, wmi_wow_enable_icmpv6_na_flt_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID);
+
+/* Remove Bcn Filter Cmd */
+#define WMITLV_TABLE_WMI_RMV_BCN_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_rmv_bcn_filter_cmd_fixed_param, wmi_rmv_bcn_filter_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RMV_BCN_FILTER_CMDID);
+
+/** Service bit WMI_SERVICE_ROAM_OFFLOAD for Roaming feature */
+/* Roam scan mode Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SCAN_MODE(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_scan_mode_fixed_param, wmi_roam_scan_mode_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_start_scan_cmd_fixed_param, wmi_start_scan_cmd_fixed_param, scan_params, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_offload_tlv_param, offload_param, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_11i_offload_tlv_param, offload_11i_param, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_11r_offload_tlv_param, offload_11r_param, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_ese_offload_tlv_param, offload_ese_param, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SCAN_MODE);
+
+/* Roam scan Rssi Threshold Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SCAN_RSSI_THRESHOLD(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_roam_scan_rssi_threshold_fixed_param, wmi_roam_scan_rssi_threshold_fixed_param, fixed_param, WMITLV_SIZE_FIX)\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_scan_extended_threshold_param, extended_param, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_earlystop_rssi_thres_param, earlystop_param, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SCAN_RSSI_THRESHOLD);
+
+/* Roam Scan Period Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SCAN_PERIOD(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_scan_period_fixed_param, wmi_roam_scan_period_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SCAN_PERIOD);
+
+/* Roam scan change Rssi Threshold Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_scan_rssi_change_threshold_fixed_param, wmi_roam_scan_rssi_change_threshold_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD);
+/* Roam Scan Channel list Cmd */
+#define WMITLV_TABLE_WMI_ROAM_CHAN_LIST(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_chan_list_fixed_param, wmi_roam_chan_list_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_CHAN_LIST);
+
+/* Roam scan mode Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SCAN_CMD(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_scan_cmd_fixed_param, wmi_roam_scan_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SCAN_CMD);
+
+#define WMITLV_TABLE_WMI_VDEV_PLMREQ_START_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_plmreq_start_cmd_fixed_param, wmi_vdev_plmreq_start_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_PLMREQ_START_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_PLMREQ_STOP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_plmreq_stop_cmd_fixed_param, wmi_vdev_plmreq_stop_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_PLMREQ_STOP_CMDID);
+
+/* Start scan Cmd */
+#define WMITLV_TABLE_WMI_START_SCAN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_start_scan_cmd_fixed_param, wmi_start_scan_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_ssid, ssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_START_SCAN_CMDID);
+
+/* Start ExtScan Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_START_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_start_cmd_fixed_param, wmi_extscan_start_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_ssid, ssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_bucket, bucket_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_bucket_channel, channel_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_START_CMDID);
+
+/* Stop ExtScan Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_STOP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_stop_cmd_fixed_param, wmi_extscan_stop_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_STOP_CMDID);
+
+/* Start ExtScan BSSID Monitoring Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_configure_wlan_change_monitor_cmd_fixed_param, wmi_extscan_configure_wlan_change_monitor_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_change_bssid_param, wlan_change_descriptor_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC
+	(WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID);
+
+/* Start Hot List Monitoring Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_configure_hotlist_monitor_cmd_fixed_param, wmi_extscan_configure_hotlist_monitor_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_hotlist_entry, hotlist, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID);
+
+/* Get ExtScan BSSID/RSSI list Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_get_cached_results_cmd_fixed_param, wmi_extscan_get_cached_results_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID);
+
+/* Get ExtScan BSSID monitor results Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_get_wlan_change_results_cmd_fixed_param, wmi_extscan_get_wlan_change_results_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID);
+
+/* Set ExtScan Capabilities Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_SET_CAPABILITIES_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_set_capabilities_cmd_fixed_param, wmi_extscan_set_capabilities_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_cache_capabilities, extscan_cache_capabilities, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_change_monitor_capabilities, wlan_change_capabilities, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_hotlist_monitor_capabilities, hotlist_capabilities, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_SET_CAPABILITIES_CMDID);
+
+/* Get ExtScan Capabilities Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_GET_CAPABILITIES_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_get_capabilities_cmd_fixed_param, wmi_extscan_get_capabilities_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_GET_CAPABILITIES_CMDID);
+
+/* Start SSID Hot List Monitoring Cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_configure_hotlist_ssid_monitor_cmd_fixed_param, wmi_extscan_configure_hotlist_ssid_monitor_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_hotlist_ssid_entry, hotlist_ssid, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID);
+
+/* P2P set vendor ID data Cmd */
+#define WMITLV_TABLE_WMI_P2P_SET_VENDOR_IE_DATA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_set_vendor_ie_data_cmd_fixed_param, wmi_p2p_set_vendor_ie_data_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_P2P_SET_VENDOR_IE_DATA_CMDID);
+/* P2P set OppPS parameters Cmd */
+#define WMITLV_TABLE_WMI_P2P_SET_OPPPS_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_set_oppps_cmd_fixed_param, wmi_p2p_set_oppps_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_P2P_SET_OPPPS_PARAM_CMDID);
+
+/* Pdev set channel Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_CHANNEL_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_channel, wmi_channel, chan, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_CHANNEL_CMDID);
+
+/* Echo Cmd */
+#define WMITLV_TABLE_WMI_ECHO_CMDID(id,op,buf,len)							   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_echo_cmd_fixed_param, wmi_echo_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_ECHO_CMDID);
+
+/* Pdev set wmm params */
+#define WMITLV_TABLE_WMI_PDEV_SET_WMM_PARAMS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_wmm_params_cmd_fixed_param, wmi_pdev_set_wmm_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wmm_params, wmi_wmm_params, wmm_params_ac_be, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wmm_params, wmi_wmm_params, wmm_params_ac_bk, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wmm_params, wmi_wmm_params, wmm_params_ac_vi, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wmm_params, wmi_wmm_params, wmm_params_ac_vo, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_WMM_PARAMS_CMDID);
+
+/* Vdev start request Cmd */
+#define WMITLV_TABLE_WMI_VDEV_START_REQUEST_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_start_request_cmd_fixed_param, wmi_vdev_start_request_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_channel, wmi_channel, chan, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_p2p_noa_descriptor, noa_descriptors, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_START_REQUEST_CMDID);
+
+/* Vdev restart request cmd */
+#define WMITLV_TABLE_WMI_VDEV_RESTART_REQUEST_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_start_request_cmd_fixed_param, wmi_vdev_start_request_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_channel, wmi_channel, chan, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_p2p_noa_descriptor, noa_descriptors, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_RESTART_REQUEST_CMDID);
+
+/* P2P Go set beacon IE cmd */
+#define WMITLV_TABLE_WMI_P2P_GO_SET_BEACON_IE(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_go_set_beacon_ie_fixed_param, wmi_p2p_go_set_beacon_ie_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_P2P_GO_SET_BEACON_IE);
+
+/* GTK offload Cmd */
+#define WMITLV_TABLE_WMI_GTK_OFFLOAD_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_CMD_fixed_param, WMI_GTK_OFFLOAD_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_GTK_OFFLOAD_CMDID);
+
+/* PMF 11w offload Set SA query cmd */
+#define WMITLV_TABLE_WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, \
+	    WMITLV_TAG_STRUC_WMI_PMF_OFFLOAD_SET_SA_QUERY_CMD_fixed_param, \
+	    WMI_PMF_OFFLOAD_SET_SA_QUERY_CMD_fixed_param, fixed_param, \
+	     WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID);
+
+/* Scan channel list Cmd */
+#define WMITLV_TABLE_WMI_SCAN_CHAN_LIST_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_scan_chan_list_cmd_fixed_param, wmi_scan_chan_list_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_channel, chan_info, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SCAN_CHAN_LIST_CMDID);
+
+/* STA UAPSD Auto trigger Cmd */
+#define WMITLV_TABLE_WMI_STA_UAPSD_AUTO_TRIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_uapsd_auto_trig_cmd_fixed_param, wmi_sta_uapsd_auto_trig_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_sta_uapsd_auto_trig_param, ac_param, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_UAPSD_AUTO_TRIG_CMDID);
+
+/* Probe template Cmd */
+#define WMITLV_TABLE_WMI_PRB_TMPL_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_prb_tmpl_cmd_fixed_param, wmi_prb_tmpl_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bcn_prb_info, wmi_bcn_prb_info, bcn_prb_info, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PRB_TMPL_CMDID);
+
+/* Beacon template Cmd */
+#define WMITLV_TABLE_WMI_BCN_TMPL_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bcn_tmpl_cmd_fixed_param, wmi_bcn_tmpl_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bcn_prb_info, wmi_bcn_prb_info, bcn_prb_info, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_BCN_TMPL_CMDID);
+
+/* VDEV install key complete Cmd */
+#define WMITLV_TABLE_WMI_VDEV_INSTALL_KEY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_install_key_cmd_fixed_param, wmi_vdev_install_key_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, key_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_INSTALL_KEY_CMDID);
+/* VDEV WNM SLEEP MODE Cmd */
+#define WMITLV_TABLE_WMI_VDEV_WNM_SLEEPMODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_VDEV_WNM_SLEEPMODE_CMD_fixed_param, WMI_VDEV_WNM_SLEEPMODE_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_WNM_SLEEPMODE_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD_fixed_param, WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID);
+
+/* Peer Assoc Cmd */
+#define WMITLV_TABLE_WMI_PEER_ASSOC_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_assoc_complete_cmd_fixed_param, wmi_peer_assoc_complete_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, peer_legacy_rates, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, peer_ht_rates, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vht_rate_set, wmi_vht_rate_set, peer_vht_rates, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ASSOC_CMDID);
+
+/* Peer Set Rate Report Condition Cmd */
+#define WMITLV_TABLE_WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_peer_set_rate_report_condition_fixed_param, wmi_peer_set_rate_report_condition_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID);
+
+/* Add Beacon filter Cmd */
+#define WMITLV_TABLE_WMI_ADD_BCN_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_add_bcn_filter_cmd_fixed_param, wmi_add_bcn_filter_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, ie_map, WMITLV_SIZE_FIX, BCN_FLT_MAX_ELEMS_IE_LIST)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ADD_BCN_FILTER_CMDID);
+
+/* Sta keepalive cmd */
+#define WMITLV_TABLE_WMI_STA_KEEPALIVE_CMDID(id,op,buf,len)					      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_STA_KEEPALIVE_CMD_fixed_param, WMI_STA_KEEPALIVE_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_STA_KEEPALVE_ARP_RESPONSE, WMI_STA_KEEPALVE_ARP_RESPONSE, arp_resp, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_KEEPALIVE_CMDID);
+
+/* ARP NS offload Cmd */
+#define WMITLV_TABLE_WMI_SET_ARP_NS_OFFLOAD_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_SET_ARP_NS_OFFLOAD_CMD_fixed_param, WMI_SET_ARP_NS_OFFLOAD_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_NS_OFFLOAD_TUPLE, ns_tuples, WMITLV_SIZE_FIX, WMI_MAX_NS_OFFLOADS) \
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_ARP_OFFLOAD_TUPLE, arp_tuples, WMITLV_SIZE_FIX, WMI_MAX_ARP_OFFLOADS) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_NS_OFFLOAD_TUPLE, ns_ext_tuples, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SET_ARP_NS_OFFLOAD_CMDID);
+
+/* AP PS peer param Cmd */
+#define WMITLV_TABLE_WMI_AP_PS_PEER_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ap_ps_peer_cmd_fixed_param, wmi_ap_ps_peer_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_AP_PS_PEER_PARAM_CMDID);
+
+/* AP PS enhanced green ap param Cmd */
+#define WMITLV_TABLE_WMI_AP_PS_EGAP_PARAM_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len,\
+	   WMITLV_TAG_STRUC_wmi_ap_ps_egap_param_cmd_fixed_param,\
+	   wmi_ap_ps_egap_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_AP_PS_EGAP_PARAM_CMDID);
+
+/* Profile Trigger Cmd */
+#define WMITLV_TABLE_WMI_WLAN_PROFILE_TRIGGER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlan_profile_trigger_cmd_fixed_param, wmi_wlan_profile_trigger_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_PROFILE_TRIGGER_CMDID);
+
+/* WLAN Profile set hist interval Cmd */
+#define WMITLV_TABLE_WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlan_profile_set_hist_intvl_cmd_fixed_param, wmi_wlan_profile_set_hist_intvl_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID);
+
+/* WLAN Profile get profile data Cmd */
+#define WMITLV_TABLE_WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlan_profile_get_prof_data_cmd_fixed_param, wmi_wlan_profile_get_prof_data_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID);
+
+/* WLAN Profile enable profile ID Cmd */
+#define WMITLV_TABLE_WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlan_profile_enable_profile_id_cmd_fixed_param, wmi_wlan_profile_enable_profile_id_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID);
+
+/* WOW Delete Wake Pattern Cmd */
+#define WMITLV_TABLE_WMI_WOW_DEL_WAKE_PATTERN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_DEL_PATTERN_CMD_fixed_param, WMI_WOW_DEL_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_DEL_WAKE_PATTERN_CMDID);
+
+#define WMITLV_TABLE_WMI_WOW_UDP_SVC_OFLD_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_WMI_WOW_UDP_SVC_OFLD_CMD_fixed_param, WMI_WOW_UDP_SVC_OFLD_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, pattern, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, response, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_UDP_SVC_OFLD_CMDID);
+
+#define WMITLV_TABLE_WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len,\
+	   WMITLV_TAG_STRUC_wmi_wow_hostwakeup_gpio_pin_pattern_config_cmd_fixed_param,\
+	   WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD_fixed_param, fixed_param,\
+	   WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID);
+
+/* Wow enable/disable wake up Cmd */
+#define WMITLV_TABLE_WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_ADD_DEL_EVT_CMD_fixed_param, WMI_WOW_ADD_DEL_EVT_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
+
+/* RTT measurement request Cmd */
+#define WMITLV_TABLE_WMI_RTT_MEASREQ_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_RTT_MEASREQ_CMDID);
+
+/* RTT TSF Cmd */
+#define WMITLV_TABLE_WMI_RTT_TSF_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_RTT_TSF_CMDID);
+
+/*RTT OEM req Cmd */
+#define WMITLV_TABLE_WMI_OEM_REQ_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_OEM_REQ_CMDID);
+
+/* Spectral scan configure Cmd */
+#define WMITLV_TABLE_WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_spectral_configure_cmd_fixed_param, wmi_vdev_spectral_configure_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
+
+/* Spectral scan enable Cmd */
+#define WMITLV_TABLE_WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_spectral_enable_cmd_fixed_param, wmi_vdev_spectral_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
+
+/* Request stats Cmd */
+#define WMITLV_TABLE_WMI_REQUEST_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_request_stats_cmd_fixed_param, wmi_request_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_REQUEST_STATS_CMDID);
+
+/* flush debug messages */
+#define WMITLV_TABLE_WMI_GET_FW_MEM_DUMP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_get_fw_mem_dump_fixed_param, wmi_get_fw_mem_dump_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_fw_mem_dump,fw_mem_dump_params, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_GET_FW_MEM_DUMP_CMDID);
+
+/* Request for memory dump stats Cmd */
+#define WMITLV_TABLE_WMI_DEBUG_MESG_FLUSH_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_debug_mesg_flush_fixed_param, wmi_debug_mesg_flush_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DEBUG_MESG_FLUSH_CMDID);
+
+/* Request to config the DIAG Events and LOGs */
+#define WMITLV_TABLE_WMI_DIAG_EVENT_LOG_CONFIG_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_diag_event_log_config_fixed_param, wmi_diag_event_log_config_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, diag_events_logs_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DIAG_EVENT_LOG_CONFIG_CMDID);
+
+/* Set config params */
+#define WMITLV_TABLE_WMI_START_LINK_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_start_link_stats_cmd_fixed_param, wmi_start_link_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_START_LINK_STATS_CMDID);
+
+/* Request to clear link stats */
+#define WMITLV_TABLE_WMI_CLEAR_LINK_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_clear_link_stats_cmd_fixed_param, wmi_clear_link_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CLEAR_LINK_STATS_CMDID);
+
+/* Request Link stats Cmd */
+#define WMITLV_TABLE_WMI_REQUEST_LINK_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_request_link_stats_cmd_fixed_param, wmi_request_link_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_REQUEST_LINK_STATS_CMDID);
+
+/* Network list offload config Cmd */
+#define WMITLV_TABLE_WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_nlo_config_cmd_fixed_param, wmi_nlo_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, nlo_configured_parameters, nlo_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, nlo_channel_prediction_cfg, channel_prediction_param, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
+
+/* Passpoint list offload config Cmd */
+#define WMITLV_TABLE_WMI_PASSPOINT_LIST_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_STRUC_wmi_passpoint_config_cmd_fixed_param, wmi_passpoint_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PASSPOINT_LIST_CONFIG_CMDID);
+
+/* CSA offload enable Cmd */
+#define WMITLV_TABLE_WMI_CSA_OFFLOAD_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_csa_offload_enable_cmd_fixed_param, wmi_csa_offload_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CSA_OFFLOAD_ENABLE_CMDID);
+
+/* CSA offload channel switch Cmd */
+#define WMITLV_TABLE_WMI_CSA_OFFLOAD_CHANSWITCH_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_csa_offload_chanswitch_cmd_fixed_param, wmi_csa_offload_chanswitch_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_channel, wmi_channel, chan, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CSA_OFFLOAD_CHANSWITCH_CMDID);
+
+/* Chatter set mode Cmd */
+#define WMITLV_TABLE_WMI_CHATTER_SET_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chatter_set_mode_cmd_fixed_param, wmi_chatter_set_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CHATTER_SET_MODE_CMDID);
+
+/* PDEV UTF Cmd */
+#define WMITLV_TABLE_WMI_PDEV_UTF_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_UTF_CMDID);
+
+/* PDEV QVIT Cmd */
+#define WMITLV_TABLE_WMI_PDEV_QVIT_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_QVIT_CMDID);
+
+/* Vdev Set keep alive Cmd  */
+#define WMITLV_TABLE_WMI_VDEV_SET_KEEPALIVE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_set_keepalive_cmd_fixed_param, wmi_vdev_set_keepalive_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SET_KEEPALIVE_CMDID);
+
+/* Vdev Get keep alive Cmd  */
+#define WMITLV_TABLE_WMI_VDEV_GET_KEEPALIVE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_cmd_fixed_param, wmi_vdev_get_keepalive_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_GET_KEEPALIVE_CMDID);
+/*FWTEST Set TBTT mode Cmd*/
+#define WMITLV_TABLE_WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_mcc_set_tbtt_mode_cmd_fixed_param, wmi_vdev_mcc_set_tbtt_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID);
+
+/* FWTEST set NoA parameters Cmd */
+#define WMITLV_TABLE_WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_set_noa_cmd_fixed_param, wmi_p2p_set_noa_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_p2p_noa_descriptor, noa_descriptor, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID);
+
+/* Unit test FW */
+#define WMITLV_TABLE_WMI_UNIT_TEST_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_unit_test_cmd_fixed_param, wmi_unit_test_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, args, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_UNIT_TEST_CMDID);
+
+/* Force Fw Hang Cmd */
+#define WMITLV_TABLE_WMI_FORCE_FW_HANG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_FORCE_FW_HANG_CMD_fixed_param, WMI_FORCE_FW_HANG_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_FORCE_FW_HANG_CMDID);
+/* Set Mcast address Cmd */
+#define WMITLV_TABLE_WMI_SET_MCASTBCAST_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_SET_MCASTBCAST_FILTER_CMD_fixed_param, WMI_SET_MCASTBCAST_FILTER_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SET_MCASTBCAST_FILTER_CMDID);
+
+/* GPIO config Cmd */
+#define WMITLV_TABLE_WMI_GPIO_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_gpio_config_cmd_fixed_param, wmi_gpio_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_GPIO_CONFIG_CMDID);
+
+/* GPIO output Cmd */
+#define WMITLV_TABLE_WMI_GPIO_OUTPUT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_gpio_output_cmd_fixed_param, wmi_gpio_output_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_GPIO_OUTPUT_CMDID);
+
+/* Peer add WDA entry Cmd */
+#define WMITLV_TABLE_WMI_PEER_ADD_WDS_ENTRY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_add_wds_entry_cmd_fixed_param, wmi_peer_add_wds_entry_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ADD_WDS_ENTRY_CMDID);
+
+/*Peer remove WDS entry Cmd */
+#define WMITLV_TABLE_WMI_PEER_REMOVE_WDS_ENTRY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_remove_wds_entry_cmd_fixed_param, wmi_peer_remove_wds_entry_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_REMOVE_WDS_ENTRY_CMDID);
+
+/* Beacon tx Cmd */
+#define WMITLV_TABLE_WMI_BCN_TX_CMDID(id,op,buf,len)												     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bcn_tx_hdr, wmi_bcn_tx_hdr, hdr, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_BCN_TX_CMDID);
+
+/* PDEV send Beacon Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SEND_BCN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bcn_send_from_host_cmd_fixed_param, wmi_bcn_send_from_host_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SEND_BCN_CMDID);
+
+/* Management tx Cmd */
+#define WMITLV_TABLE_WMI_MGMT_TX_CMDID(id,op,buf,len)												      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mgmt_tx_hdr, wmi_mgmt_tx_hdr, hdr, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MGMT_TX_CMDID);
+
+/* Management tx send cmd */
+#define WMITLV_TABLE_WMI_MGMT_TX_SEND_CMDID(id, op, buf, len)  \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_mgmt_tx_send_cmd_fixed_param, wmi_mgmt_tx_send_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MGMT_TX_SEND_CMDID);
+
+/* ADD clear response Cmd */
+#define WMITLV_TABLE_WMI_ADDBA_CLEAR_RESP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_addba_clear_resp_cmd_fixed_param, wmi_addba_clear_resp_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ADDBA_CLEAR_RESP_CMDID);
+
+/* ADD BA send Cmd */
+#define WMITLV_TABLE_WMI_ADDBA_SEND_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_addba_send_cmd_fixed_param, wmi_addba_send_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ADDBA_SEND_CMDID);
+
+/* DEL BA send Cmd */
+#define WMITLV_TABLE_WMI_DELBA_SEND_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_delba_send_cmd_fixed_param, wmi_delba_send_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DELBA_SEND_CMDID);
+
+/* ADD BA set response Cmd */
+#define WMITLV_TABLE_WMI_ADDBA_SET_RESP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_addba_setresponse_cmd_fixed_param, wmi_addba_setresponse_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ADDBA_SET_RESP_CMDID);
+
+/* Send single AMSDU Cmd */
+#define WMITLV_TABLE_WMI_SEND_SINGLEAMSDU_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_send_singleamsdu_cmd_fixed_param, wmi_send_singleamsdu_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SEND_SINGLEAMSDU_CMDID);
+
+/* PDev Packet Log enable Cmd */
+#define WMITLV_TABLE_WMI_PDEV_PKTLOG_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_pktlog_enable_cmd_fixed_param, wmi_pdev_pktlog_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_PKTLOG_ENABLE_CMDID);
+
+/* PDev Packet Log disable Cmd */
+#define WMITLV_TABLE_WMI_PDEV_PKTLOG_DISABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_pktlog_disable_cmd_fixed_param, wmi_pdev_pktlog_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_PKTLOG_DISABLE_CMDID);
+
+/* PDev set HT Cap IE Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_HT_CAP_IE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_ht_ie_cmd_fixed_param, wmi_pdev_set_ht_ie_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_HT_CAP_IE_CMDID);
+
+/* PDev set VHT Cap IE Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_VHT_CAP_IE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_vht_ie_cmd_fixed_param, wmi_pdev_set_vht_ie_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_VHT_CAP_IE_CMDID);
+
+/* PDev Set DSCP to TID map Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_DSCP_TID_MAP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_dscp_tid_map_cmd_fixed_param, wmi_pdev_set_dscp_tid_map_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_DSCP_TID_MAP_CMDID);
+
+/* PDev Green AP PS enable Cmd */
+#define WMITLV_TABLE_WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_green_ap_ps_enable_cmd_fixed_param, wmi_pdev_green_ap_ps_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID);
+
+/* PDEV Get TPC Config Cmd */
+#define WMITLV_TABLE_WMI_PDEV_GET_TPC_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_get_tpc_config_cmd_fixed_param, wmi_pdev_get_tpc_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_GET_TPC_CONFIG_CMDID);
+
+/* PDEV Set Base Mac Address Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_BASE_MACADDR_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_base_macaddr_cmd_fixed_param, wmi_pdev_set_base_macaddr_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_BASE_MACADDR_CMDID);
+
+/* Peer multicast group Cmd */
+#define WMITLV_TABLE_WMI_PEER_MCAST_GROUP_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_mcast_group_cmd_fixed_param, wmi_peer_mcast_group_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_MCAST_GROUP_CMDID);
+
+/* Roam AP profile Cmd */
+#define WMITLV_TABLE_WMI_ROAM_AP_PROFILE(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_ap_profile_fixed_param, wmi_roam_ap_profile_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ap_profile, wmi_ap_profile, ap_profile, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_AP_PROFILE);
+
+/* Roam sync complete Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SYNCH_COMPLETE(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_synch_complete_fixed_param, wmi_roam_synch_complete_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SYNCH_COMPLETE);
+
+#define WMITLV_TABLE_WMI_ROAM_SET_RIC_REQUEST_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ric_request_fixed_param, wmi_ric_request_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ric_tspec, ric_tspec_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SET_RIC_REQUEST_CMDID);
+
+/* Scan scheduler priority Table Cmd */
+#define WMITLV_TABLE_WMI_SCAN_SCH_PRIO_TBL_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_scan_sch_priority_table_cmd_fixed_param, wmi_scan_sch_priority_table_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, mapping_table, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SCAN_SCH_PRIO_TBL_CMDID);
+
+/* PDEV DFS enable Cmd */
+#define WMITLV_TABLE_WMI_PDEV_DFS_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_dfs_enable_cmd_fixed_param, wmi_pdev_dfs_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_DFS_ENABLE_CMDID);
+
+/* PDEV DFS disable Cmd */
+#define WMITLV_TABLE_WMI_PDEV_DFS_DISABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_dfs_disable_cmd_fixed_param, wmi_pdev_dfs_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_DFS_DISABLE_CMDID);
+
+/* DFS phyerr parse/filter offload enable Cmd */
+#define WMITLV_TABLE_WMI_DFS_PHYERR_FILTER_ENA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_ena_cmd_fixed_param, wmi_dfs_phyerr_filter_ena_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DFS_PHYERR_FILTER_ENA_CMDID);
+
+/* DFS phyerr parse/filter offload disable Cmd */
+#define WMITLV_TABLE_WMI_DFS_PHYERR_FILTER_DIS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_dis_cmd_fixed_param, wmi_dfs_phyerr_filter_dis_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DFS_PHYERR_FILTER_DIS_CMDID);
+
+/* WOW Add Wake Pattern Cmd */
+#define WMITLV_TABLE_WMI_WOW_ADD_WAKE_PATTERN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_ADD_PATTERN_CMD_fixed_param, WMI_WOW_ADD_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WOW_BITMAP_PATTERN_T, pattern_info_bitmap, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WOW_IPV4_SYNC_PATTERN_T, pattern_info_ipv4, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WOW_IPV6_SYNC_PATTERN_T, pattern_info_ipv6, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WOW_MAGIC_PATTERN_CMD, pattern_info_magic_pattern, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, pattern_info_timeout, WMITLV_SIZE_VAR) \
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, ra_ratelimit_interval, WMITLV_SIZE_FIX, 1)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_ADD_WAKE_PATTERN_CMDID);
+
+/* IOAC add keep alive cmd. */
+#define WMITLV_TABLE_WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_KEEPALIVE_CMD_fixed_param, WMI_WOW_IOAC_ADD_KEEPALIVE_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_WOW_IOAC_KEEPALIVE_T, keepalive_set, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID);
+
+/* IOAC del keep alive cmd. */
+#define WMITLV_TABLE_WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_KEEPALIVE_CMD_fixed_param, WMI_WOW_IOAC_DEL_KEEPALIVE_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID);
+
+/* WOW IOAC Add Wake Pattern Cmd */
+#define WMITLV_TABLE_WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_PATTERN_CMD_fixed_param, WMI_WOW_IOAC_ADD_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, WOW_IOAC_PKT_PATTERN_T, pattern_info_pkt, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, WOW_IOAC_TMR_PATTERN_T, pattern_info_tmr, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, WOW_IOAC_SOCK_PATTERN_T, pattern_info_sock, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID);
+
+/* WOW IOAC Delete Wake Pattern Cmd */
+#define WMITLV_TABLE_WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_PATTERN_CMD_fixed_param, WMI_WOW_IOAC_DEL_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID);
+
+/* extwow enable Cmd */
+#define WMITLV_TABLE_WMI_EXTWOW_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extwow_enable_cmd_fixed_param, wmi_extwow_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTWOW_ENABLE_CMDID);
+
+/* extwow set wakeup params cmd for app type1 */
+#define WMITLV_TABLE_WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extwow_set_app_type1_params_cmd_fixed_param, wmi_extwow_set_app_type1_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID);
+
+/* extwow set wakeup params cmd for app type2 */
+#define WMITLV_TABLE_WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extwow_set_app_type2_params_cmd_fixed_param, wmi_extwow_set_app_type2_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID);
+
+/* Stop scan Cmd */
+#define WMITLV_TABLE_WMI_STOP_SCAN_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_stop_scan_cmd_fixed_param, wmi_stop_scan_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STOP_SCAN_CMDID);
+
+#define WMITLV_TABLE_WMI_PDEV_SET_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_param_cmd_fixed_param, wmi_pdev_set_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_PARAM_CMDID);
+
+/* PDev set quiet Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_QUIET_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_quiet_cmd_fixed_param, wmi_pdev_set_quiet_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_QUIET_MODE_CMDID);
+
+/* Vdev create Cmd */
+#define WMITLV_TABLE_WMI_VDEV_CREATE_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_vdev_create_cmd_fixed_param, wmi_vdev_create_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_txrx_streams, cfg_txrx_streams, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_CREATE_CMDID);
+
+/* Vdev delete Cmd */
+#define WMITLV_TABLE_WMI_VDEV_DELETE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_delete_cmd_fixed_param, wmi_vdev_delete_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_DELETE_CMDID);
+
+/* Vdev up Cmd */
+#define WMITLV_TABLE_WMI_VDEV_UP_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_up_cmd_fixed_param, wmi_vdev_up_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_UP_CMDID);
+
+/* Vdev stop cmd */
+#define WMITLV_TABLE_WMI_VDEV_STOP_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_stop_cmd_fixed_param, wmi_vdev_stop_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_STOP_CMDID);
+
+/* Vdev down Cmd */
+#define WMITLV_TABLE_WMI_VDEV_DOWN_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_down_cmd_fixed_param, wmi_vdev_down_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_DOWN_CMDID);
+
+/* Vdev set param Cmd */
+#define WMITLV_TABLE_WMI_VDEV_SET_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_set_param_cmd_fixed_param, wmi_vdev_set_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SET_PARAM_CMDID);
+
+/* Pdev suspend Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SUSPEND_CMDID(id,op,buf,len)							   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_suspend_cmd_fixed_param, wmi_pdev_suspend_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SUSPEND_CMDID);
+
+/* Pdev Resume Cmd */
+#define WMITLV_TABLE_WMI_PDEV_RESUME_CMDID(id,op,buf,len)							  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_resume_cmd_fixed_param, wmi_pdev_resume_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_RESUME_CMDID);
+
+#define WMITLV_TABLE_WMI_SCAN_UPDATE_REQUEST_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_scan_update_request_cmd_fixed_param, wmi_scan_update_request_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SCAN_UPDATE_REQUEST_CMDID);
+
+#define WMITLV_TABLE_WMI_SCAN_PROB_REQ_OUI_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_scan_prob_req_oui_cmd_fixed_param, wmi_scan_prob_req_oui_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_SCAN_PROB_REQ_OUI_CMDID);
+
+#define WMITLV_TABLE_WMI_CHATTER_ADD_COALESCING_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_STRUC_wmi_chatter_coalescing_add_filter_cmd_fixed_param, wmi_chatter_coalescing_add_filter_cmd_fixed_param, fixed_param,WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, chatter_pkt_coalescing_filter, coalescing_filter, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CHATTER_ADD_COALESCING_FILTER_CMDID);
+
+#define WMITLV_TABLE_WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chatter_coalescing_delete_filter_cmd_fixed_param,wmi_chatter_coalescing_delete_filter_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID);
+
+#define WMITLV_TABLE_WMI_CHATTER_COALESCING_QUERY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chatter_coalescing_query_cmd_fixed_param, wmi_chatter_coalescing_query_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+
+WMITLV_CREATE_PARAM_STRUC(WMI_CHATTER_COALESCING_QUERY_CMDID);
+
+#define WMITLV_TABLE_WMI_TXBF_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_STRUC_wmi_txbf_cmd_fixed_param, wmi_txbf_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+
+WMITLV_CREATE_PARAM_STRUC(WMI_TXBF_CMDID);
+
+#define WMITLV_TABLE_WMI_DBGLOG_CFG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_debug_log_config_cmd_fixed_param, wmi_debug_log_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_FXAR(id,op,buf,len,WMITLV_TAG_ARRAY_UINT32, A_UINT32, module_id_bitmap, WMITLV_SIZE_FIX, MAX_MODULE_ID_BITMAP_WORDS) \
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DBGLOG_CFG_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_WMM_ADDTS_CMDID(id,op,buf,len)					       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_wmm_addts_cmd_fixed_param, wmi_vdev_wmm_addts_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_WMM_ADDTS_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_WMM_DELTS_CMDID(id,op,buf,len)					       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_wmm_delts_cmd_fixed_param, wmi_vdev_wmm_delts_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_WMM_DELTS_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_SET_WMM_PARAMS_CMDID(id,op,buf,len)					    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_set_wmm_params_cmd_fixed_param, wmi_vdev_set_wmm_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SET_WMM_PARAMS_CMDID);
+
+#define WMITLV_TABLE_WMI_VDEV_SET_GTX_PARAMS_CMDID(id,op,buf,len)					    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_set_gtx_params_cmd_fixed_param, wmi_vdev_set_gtx_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SET_GTX_PARAMS_CMDID);
+
+/* TDLS Enable/Disable Cmd */
+#define WMITLV_TABLE_WMI_TDLS_SET_STATE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tdls_set_state_cmd_fixed_param,	\
+		    wmi_tdls_set_state_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_TDLS_SET_STATE_CMDID);
+
+/* TDLS Peer Update Cmd */
+#define WMITLV_TABLE_WMI_TDLS_PEER_UPDATE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tdls_peer_update_cmd_fixed_param, wmi_tdls_peer_update_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tdls_peer_capabilities, wmi_tdls_peer_capabilities, peer_caps, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_channel, peer_chan_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_TDLS_PEER_UPDATE_CMDID);
+
+/* Enable/Disable TDLS Offchannel Cmd */
+#define WMITLV_TABLE_WMI_TDLS_SET_OFFCHAN_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tdls_set_offchan_mode_cmd_fixed_param, \
+		    wmi_tdls_set_offchan_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_TDLS_SET_OFFCHAN_MODE_CMDID);
+
+/* Resmgr Enable/Disable Adaptive OCS CMD */
+#define WMITLV_TABLE_WMI_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_resmgr_adaptive_ocs_enable_disable_cmd_fixed_param, \
+		    wmi_resmgr_adaptive_ocs_enable_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC
+	(WMI_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMDID);
+
+/* Resmgr Set Channel Time Quota CMD */
+#define WMITLV_TABLE_WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_resmgr_set_chan_time_quota_cmd_fixed_param, \
+		    wmi_resmgr_set_chan_time_quota_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID);
+
+/* Resmgr Set Channel Latency CMD */
+#define WMITLV_TABLE_WMI_RESMGR_SET_CHAN_LATENCY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_resmgr_set_chan_latency_cmd_fixed_param, \
+		    wmi_resmgr_set_chan_latency_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RESMGR_SET_CHAN_LATENCY_CMDID);
+
+/* STA SMPS Force Mode CMD */
+#define WMITLV_TABLE_WMI_STA_SMPS_FORCE_MODE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_smps_force_mode_cmd_fixed_param, \
+		    wmi_sta_smps_force_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_SMPS_FORCE_MODE_CMDID);
+
+/* wlan hb enable/disable CMD */
+#define WMITLV_TABLE_WMI_HB_SET_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hb_set_enable_cmd_fixed_param, \
+		    wmi_hb_set_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HB_SET_ENABLE_CMDID);
+
+/* wlan hb set tcp params CMD */
+#define WMITLV_TABLE_WMI_HB_SET_TCP_PARAMS_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hb_set_tcp_params_cmd_fixed_param, \
+		    wmi_hb_set_tcp_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HB_SET_TCP_PARAMS_CMDID);
+
+/* wlan hb set tcp pkt filter CMD */
+#define WMITLV_TABLE_WMI_HB_SET_TCP_PKT_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hb_set_tcp_pkt_filter_cmd_fixed_param, \
+		    wmi_hb_set_tcp_pkt_filter_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HB_SET_TCP_PKT_FILTER_CMDID);
+
+/* wlan set udp params CMD */
+#define WMITLV_TABLE_WMI_HB_SET_UDP_PARAMS_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hb_set_udp_params_cmd_fixed_param, \
+		    wmi_hb_set_udp_params_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HB_SET_UDP_PARAMS_CMDID);
+
+/* wlan hb set udp pkt filter CMD */
+#define WMITLV_TABLE_WMI_HB_SET_UDP_PKT_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hb_set_udp_pkt_filter_cmd_fixed_param, \
+		    wmi_hb_set_udp_pkt_filter_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HB_SET_UDP_PKT_FILTER_CMDID);
+
+/* STA SMPS Param CMD */
+#define WMITLV_TABLE_WMI_STA_SMPS_PARAM_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sta_smps_param_cmd_fixed_param,	\
+		    wmi_sta_smps_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_STA_SMPS_PARAM_CMDID);
+
+/* MCC Adaptive Scheduler Traffic Stats */
+#define WMITLV_TABLE_WMI_MCC_SCHED_TRAFFIC_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mcc_sched_traffic_stats_cmd_fixed_param, wmi_mcc_sched_traffic_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_mcc_sched_sta_traffic_stats, mcc_sched_sta_traffic_stats_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_MCC_SCHED_TRAFFIC_STATS_CMDID);
+
+#define WMITLV_TABLE_WMI_BATCH_SCAN_ENABLE_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_batch_scan_enable_cmd_fixed_param, wmi_batch_scan_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_BATCH_SCAN_ENABLE_CMDID);
+
+#define WMITLV_TABLE_WMI_PEER_INFO_REQ_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_info_req_cmd_fixed_param, \
+		    wmi_peer_info_req_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_INFO_REQ_CMDID);
+
+#define WMITLV_TABLE_WMI_RMC_SET_MODE_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_rmc_set_mode_cmd_fixed_param, \
+		    wmi_rmc_set_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RMC_SET_MODE_CMDID);
+
+#define WMITLV_TABLE_WMI_RMC_SET_ACTION_PERIOD_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_rmc_set_action_period_cmd_fixed_param, \
+		    wmi_rmc_set_action_period_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RMC_SET_ACTION_PERIOD_CMDID);
+
+#define WMITLV_TABLE_WMI_RMC_CONFIG_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_rmc_config_cmd_fixed_param, \
+		    wmi_rmc_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RMC_CONFIG_CMDID);
+
+#define WMITLV_TABLE_WMI_MHF_OFFLOAD_SET_MODE_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mhf_offload_set_mode_cmd_fixed_param, \
+		    wmi_mhf_offload_set_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_MHF_OFFLOAD_SET_MODE_CMDID);
+
+#define WMITLV_TABLE_WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID(id,op,buf,len)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mhf_offload_plumb_routing_table_cmd_fixed_param, \
+		    wmi_mhf_offload_plumb_routing_table_cmd, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_mhf_offload_routing_table_entry,	\
+		    routing_tbl_entries, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID)
+#define WMITLV_TABLE_WMI_BATCH_SCAN_DISABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_batch_scan_disable_cmd_fixed_param, wmi_batch_scan_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_BATCH_SCAN_DISABLE_CMDID);
+
+#define WMITLV_TABLE_WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_batch_scan_trigger_result_cmd_fixed_param, wmi_batch_scan_trigger_result_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID);
+
+/* LPI mgmt snooping config Cmd */
+#define WMITLV_TABLE_WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_mgmt_snooping_config_cmd_fixed_param, wmi_lpi_mgmt_snooping_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID);
+
+/* LPI start scan Cmd */
+#define WMITLV_TABLE_WMI_LPI_START_SCAN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_start_scan_cmd_fixed_param, wmi_lpi_start_scan_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_ssid, ssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_data, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_START_SCAN_CMDID);
+
+/* LPI stop scan Cmd */
+#define WMITLV_TABLE_WMI_LPI_STOP_SCAN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_stop_scan_cmd_fixed_param, wmi_lpi_stop_scan_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_STOP_SCAN_CMDID);
+
+#define WMITLV_TABLE_WMI_LPI_RESULT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_result_event_fixed_param, wmi_lpi_result_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_RESULT_EVENTID);
+
+/* LPI Status Event */
+#define WMITLV_TABLE_WMI_LPI_STATUS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_status_event_fixed_param, wmi_lpi_status_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_STATUS_EVENTID);
+
+/* LPI Handoff Event */
+#define WMITLV_TABLE_WMI_LPI_HANDOFF_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_lpi_handoff_event_fixed_param, wmi_lpi_handoff_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_LPI_HANDOFF_EVENTID);
+
+/* Thermal Manager Params*/
+#define WMITLV_TABLE_WMI_THERMAL_MGMT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_thermal_mgmt_cmd_fixed_param, wmi_thermal_mgmt_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_THERMAL_MGMT_CMDID);
+
+#define WMITLV_TABLE_WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param, WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, pattern, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID);
+
+#define WMITLV_TABLE_WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param, WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID);
+
+/* NaN Request */
+#define WMITLV_TABLE_WMI_NAN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_nan_cmd_param, wmi_nan_cmd_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_NAN_CMDID);
+
+/* Modem power state cmd */
+#define WMITLV_TABLE_WMI_MODEM_POWER_STATE_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_modem_power_state_cmd_param, wmi_modem_power_state_cmd_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MODEM_POWER_STATE_CMDID);
+
+/* get estimated link speed cmd */
+#define WMITLV_TABLE_WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_get_estimated_linkspeed_cmd_fixed_param, wmi_peer_get_estimated_linkspeed_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID);
+
+/* ext stats Request */
+#define WMITLV_TABLE_WMI_REQUEST_STATS_EXT_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_req_stats_ext_cmd_fixed_param, wmi_req_stats_ext_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_REQUEST_STATS_EXT_CMDID);
+
+/* 2.4Ghz HT40 OBSS scan enable */
+#define WMITLV_TABLE_WMI_OBSS_SCAN_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_obss_scan_enable_cmd_fixed_param, wmi_obss_scan_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, channels, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_field, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OBSS_SCAN_ENABLE_CMDID);
+
+/* 2.4Ghz HT40 OBSS scan disable */
+#define WMITLV_TABLE_WMI_OBSS_SCAN_DISABLE_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_obss_scan_disable_cmd_fixed_param, wmi_obss_scan_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OBSS_SCAN_DISABLE_CMDID);
+
+/* Pdev Set LED Config Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_LED_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_led_config_cmd_fixed_param, wmi_pdev_set_led_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_LED_CONFIG_CMDID);
+
+/* host auto shut down config cmd */
+#define WMITLV_TABLE_WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_host_auto_shutdown_cfg_cmd_fixed_param, wmi_host_auto_shutdown_cfg_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID);
+
+/* tpc chainmask config cmd */
+#define WMITLV_TABLE_WMI_TPC_CHAINMASK_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tpc_chainmask_config_cmd_fixed_param, wmi_tpc_chainmask_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tpc_chainmask_config, config_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_TPC_CHAINMASK_CONFIG_CMDID);
+
+/* Ch avoidance update cmd */
+#define WMITLV_TABLE_WMI_CHAN_AVOID_UPDATE_CMDID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_avoid_update_cmd_param, wmi_chan_avoid_update_cmd_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_CHAN_AVOID_UPDATE_CMDID);
+
+/* D0-WOW Enable Disable Cmd */
+#define WMITLV_TABLE_WMI_D0_WOW_ENABLE_DISABLE_CMDID(id,op,buf,len)							    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_d0_wow_enable_disable_cmd_fixed_param, wmi_d0_wow_enable_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_D0_WOW_ENABLE_DISABLE_CMDID);
+
+/* Pdev get chip temperature Cmd */
+#define WMITLV_TABLE_WMI_PDEV_GET_TEMPERATURE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_get_temperature_cmd_fixed_param, wmi_pdev_get_temperature_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_GET_TEMPERATURE_CMDID);
+
+/* Set antenna diversity Cmd */
+#define WMITLV_TABLE_WMI_SET_ANTENNA_DIVERSITY_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_pdev_set_antenna_diversity_cmd_fixed_param, wmi_pdev_set_antenna_diversity_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SET_ANTENNA_DIVERSITY_CMDID);
+
+#define WMITLV_TABLE_WMI_LRO_CONFIG_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_lro_info_cmd_fixed_param, wmi_lro_info_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_LRO_CONFIG_CMDID);
+
+
+/* MAWC sensor report indication cmd */
+#define WMITLV_TABLE_WMI_MAWC_SENSOR_REPORT_IND_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_mawc_sensor_report_ind_cmd_fixed_param, wmi_mawc_sensor_report_ind_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MAWC_SENSOR_REPORT_IND_CMDID);
+
+/* Roam configure MAWC cmd */
+#define WMITLV_TABLE_WMI_ROAM_CONFIGURE_MAWC_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_roam_configure_mawc_cmd_fixed_param, wmi_roam_configure_mawc_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_CONFIGURE_MAWC_CMDID);
+
+/* NLO configure MAWC cmd */
+#define WMITLV_TABLE_WMI_NLO_CONFIGURE_MAWC_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_nlo_configure_mawc_cmd_fixed_param, wmi_nlo_configure_mawc_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_NLO_CONFIGURE_MAWC_CMDID);
+
+/* Extscan configure MAWC cmd */
+#define WMITLV_TABLE_WMI_EXTSCAN_CONFIGURE_MAWC_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_extscan_configure_mawc_cmd_fixed_param, wmi_extscan_configure_mawc_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_CONFIGURE_MAWC_CMDID);
+
+/* Set rssi monitoring config Cmd */
+#define WMITLV_TABLE_WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_rssi_breach_monitor_config_fixed_param, wmi_rssi_breach_monitor_config_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID);
+
+/* DHCP server offload param Cmd */
+#define WMITLV_TABLE_WMI_SET_DHCP_SERVER_OFFLOAD_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_set_dhcp_server_offload_cmd_fixed_param, wmi_set_dhcp_server_offload_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SET_DHCP_SERVER_OFFLOAD_CMDID);
+
+/* IPA Offload Enable Disable Cmd */
+#define WMITLV_TABLE_WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID(id,op,buf,len)							 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUCT_wmi_ipa_offload_enable_disable_cmd_fixed_param, wmi_ipa_offload_enable_disable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID);
+
+/* Set LED flashing parameter Cmd */
+#define WMITLV_TABLE_WMI_PDEV_SET_LED_FLASHING_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_set_led_flashing_cmd_fixed_param, wmi_set_led_flashing_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_LED_FLASHING_CMDID);
+
+/* mDNS responder offload param Cmd */
+#define WMITLV_TABLE_WMI_MDNS_OFFLOAD_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mdns_offload_cmd_fixed_param, wmi_mdns_offload_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_OFFLOAD_ENABLE_CMDID);
+
+#define WMITLV_TABLE_WMI_MDNS_SET_FQDN_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mdns_set_fqdn_cmd_fixed_param, wmi_mdns_set_fqdn_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, fqdn_data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_SET_FQDN_CMDID);
+
+#define WMITLV_TABLE_WMI_MDNS_SET_RESPONSE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mdns_set_resp_cmd_fixed_param, wmi_mdns_set_resp_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, resp_data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_SET_RESPONSE_CMDID);
+
+#define WMITLV_TABLE_WMI_MDNS_GET_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mdns_get_stats_cmd_fixed_param, wmi_mdns_get_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_GET_STATS_CMDID);
+
+/* roam invoke Cmd */
+#define WMITLV_TABLE_WMI_ROAM_INVOKE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_invoke_cmd_fixed_param, wmi_roam_invoke_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_INVOKE_CMDID);
+
+/* SAP Authentication offload param Cmd */
+#define WMITLV_TABLE_WMI_SAP_OFL_ENABLE_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sap_ofl_enable_cmd_fixed_param, wmi_sap_ofl_enable_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, psk, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SAP_OFL_ENABLE_CMDID);
+
+/* SAP set blacklist param cmd */
+#define WMITLV_TABLE_WMI_SAP_SET_BLACKLIST_PARAM_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_sap_set_blacklist_param_cmd_fixed_param, wmi_sap_set_blacklist_param_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SAP_SET_BLACKLIST_PARAM_CMDID);
+
+/* APFIND Request */
+#define WMITLV_TABLE_WMI_APFIND_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_apfind_cmd_param, wmi_apfind_cmd_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_APFIND_CMDID);
+
+/* Set OCB schedule cmd, DEPRECATED */
+#define WMITLV_TABLE_WMI_OCB_SET_SCHED_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_ocb_set_sched_cmd_fixed_param, wmi_ocb_set_sched_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_SET_SCHED_CMDID);
+
+/* Set OCB configuration cmd */
+#define WMITLV_TABLE_WMI_OCB_SET_CONFIG_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_set_config_cmd_fixed_param, wmi_ocb_set_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_channel, chan_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ocb_channel, ocb_chan_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_qos_parameter, qos_parameter_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_chan, chan_cfg, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_active_state_config, ndl_active_state_config_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ocb_schedule_element, schedule_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_SET_CONFIG_CMDID);
+
+/* Set UTC time cmd */
+#define WMITLV_TABLE_WMI_OCB_SET_UTC_TIME_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_set_utc_time_cmd_fixed_param, wmi_ocb_set_utc_time_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_SET_UTC_TIME_CMDID);
+
+/* Start timing advertisement cmd */
+#define WMITLV_TABLE_WMI_OCB_START_TIMING_ADVERT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_start_timing_advert_cmd_fixed_param, wmi_ocb_start_timing_advert_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_START_TIMING_ADVERT_CMDID);
+
+/* Stop timing advertisement cmd */
+#define WMITLV_TABLE_WMI_OCB_STOP_TIMING_ADVERT_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_stop_timing_advert_cmd_fixed_param, wmi_ocb_stop_timing_advert_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_STOP_TIMING_ADVERT_CMDID);
+
+/* Get TSF timer cmd */
+#define WMITLV_TABLE_WMI_OCB_GET_TSF_TIMER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_cmd_fixed_param, wmi_ocb_get_tsf_timer_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_GET_TSF_TIMER_CMDID);
+
+/* Get DCC stats cmd */
+#define WMITLV_TABLE_WMI_DCC_GET_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_get_stats_cmd_fixed_param, wmi_dcc_get_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_channel_stats_request, channel_stats_request, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_GET_STATS_CMDID);
+
+/* Clear DCC stats cmd */
+#define WMITLV_TABLE_WMI_DCC_CLEAR_STATS_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_clear_stats_cmd_fixed_param, wmi_dcc_clear_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_CLEAR_STATS_CMDID);
+
+/* Update DCC NDL cmd */
+#define WMITLV_TABLE_WMI_DCC_UPDATE_NDL_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_update_ndl_cmd_fixed_param, wmi_dcc_update_ndl_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_chan, chan_ndl_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_active_state_config, ndl_active_state_config_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_UPDATE_NDL_CMDID);
+
+#define WMITLV_TABLE_WMI_ROAM_FILTER_CMDID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_filter_fixed_param, wmi_roam_filter_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_black_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_ssid, ssid_white_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, bssid_preferred_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, bssid_preferred_factor, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_FILTER_CMDID);
+/* TSF timestamp action cmd */
+#define WMITLV_TABLE_WMI_VDEV_TSF_TSTAMP_ACTION_CMDID(id,op,buf,len) \
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_tsf_tstamp_action_cmd_fixed_param, wmi_vdev_tsf_tstamp_action_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_TSF_TSTAMP_ACTION_CMDID);
+
+/* LFR subnet change config Cmd */
+#define WMITLV_TABLE_WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_roam_subnet_change_config_fixed_param, wmi_roam_subnet_change_config_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_FIXED_STRUC, wmi_mac_addr, skip_subnet_change_detection_bssid_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID);
+
+/* Set the SOC Preferred Channel List (PCL) Cmd */
+#define WMITLV_TABLE_WMI_SOC_SET_PCL_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_pcl_cmd_fixed_param, wmi_soc_set_pcl_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, channel_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_PCL_CMDID);
+
+/* Set the SOC Hardware Mode Cmd */
+#define WMITLV_TABLE_WMI_SOC_SET_HW_MODE_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_cmd_fixed_param, wmi_soc_set_hw_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_HW_MODE_CMDID);
+
+/* Set the SOC Dual MAC Config Cmd */
+#define WMITLV_TABLE_WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_cmd_fixed_param, wmi_soc_set_dual_mac_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID);
+
+/* Set the SOC Antenna Mode Cmd */
+#define WMITLV_TABLE_WMI_SOC_SET_ANTENNA_MODE_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_antenna_mode_cmd_fixed_param, wmi_soc_set_antenna_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_ANTENNA_MODE_CMDID);
+
+/************************** TLV definitions of WMI events *******************************/
+
+/* Service Ready event */
+#define WMITLV_TABLE_WMI_SERVICE_READY_EVENTID(id,op,buf,len)												      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_service_ready_event_fixed_param, wmi_service_ready_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_HAL_REG_CAPABILITIES, HAL_REG_CAPABILITIES, hal_reg_capabilities, WMITLV_SIZE_FIX) \
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, wmi_service_bitmap, WMITLV_SIZE_FIX, WMI_SERVICE_BM_SIZE)	\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wlan_host_mem_req, mem_reqs, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, wlan_dbs_hw_mode_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_READY_EVENTID);
+
+/* Service Ready Extension event */
+#define WMITLV_TABLE_WMI_SERVICE_READY_EXT_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_service_ready_ext_event_fixed_param, wmi_service_ready_ext_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_READY_EXT_EVENTID);
+
+/* Ready event */
+#define WMITLV_TABLE_WMI_READY_EVENTID(id,op,buf,len)												      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ready_event_fixed_param, wmi_ready_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_READY_EVENTID);
+
+/* Scan Event */
+#define WMITLV_TABLE_WMI_SCAN_EVENTID(id,op,buf,len)												     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_scan_event_fixed_param, wmi_scan_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SCAN_EVENTID);
+
+/* ExtScan Start/Stop Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_START_STOP_EVENTID(id,op,buf,len)												   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_start_stop_event_fixed_param, wmi_extscan_start_stop_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_START_STOP_EVENTID);
+
+/* ExtScan Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_OPERATION_EVENTID(id,op,buf,len)												  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_operation_event_fixed_param, wmi_extscan_operation_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, bucket_id, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_OPERATION_EVENTID);
+
+/* ExtScan Table Usage Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_TABLE_USAGE_EVENTID(id,op,buf,len)												    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_table_usage_event_fixed_param, wmi_extscan_table_usage_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_TABLE_USAGE_EVENTID);
+
+/* ExtScan Result Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_CACHED_RESULTS_EVENTID(id,op,buf,len)												       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_cached_results_event_fixed_param, wmi_extscan_cached_results_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_descriptor, bssid_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_rssi_info, rssi_list, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ie_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_CACHED_RESULTS_EVENTID);
+
+/* ExtScan Monitor RSSI List Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID(id,op,buf,len)												    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_wlan_change_results_event_fixed_param, wmi_extscan_wlan_change_results_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_change_result_bssid, bssid_signal_descriptor_list, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, rssi_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID);
+
+/* ExtScan Hot List Match Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_HOTLIST_MATCH_EVENTID(id,op,buf,len)												      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_hotlist_match_event_fixed_param, wmi_extscan_hotlist_match_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_descriptor, hotlist_match, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_HOTLIST_MATCH_EVENTID);
+
+/* ExtScan Hot List Match Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_CAPABILITIES_EVENTID(id,op,buf,len)												     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_capabilities_event_fixed_param, wmi_extscan_capabilities_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_cache_capabilities, extscan_cache_capabilities, WMITLV_SIZE_VAR)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_change_monitor_capabilities, wlan_change_capabilities, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_hotlist_monitor_capabilities, hotlist_capabilities, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_CAPABILITIES_EVENTID);
+
+/* ExtScan Hot List Match Event */
+#define WMITLV_TABLE_WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_extscan_hotlist_ssid_match_event_fixed_param, wmi_extscan_hotlist_ssid_match_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_extscan_wlan_descriptor, hotlist_ssid_match, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID);
+
+/* Update_whal_mib_stats Event */
+#define WMITLV_TABLE_WMI_UPDATE_WHAL_MIB_STATS_EVENTID(id,op,buf,len)												      \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_update_whal_mib_stats_event_fixed_param, wmi_update_whal_mib_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_UPDATE_WHAL_MIB_STATS_EVENTID);
+
+/* PDEV TPC Config Event */
+#define WMITLV_TABLE_WMI_PDEV_TPC_CONFIG_EVENTID(id,op,buf,len)													\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_tpc_config_event_fixed_param, wmi_pdev_tpc_config_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, ratesArray, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_TPC_CONFIG_EVENTID);
+
+/* Channel Info Event */
+#define WMITLV_TABLE_WMI_CHAN_INFO_EVENTID(id,op,buf,len)												  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param, wmi_chan_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_CHAN_INFO_EVENTID);
+
+/* Phy Error Event */
+#define WMITLV_TABLE_WMI_PHYERR_EVENTID(id,op,buf,len)												       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_comb_phyerr_rx_hdr, wmi_comb_phyerr_rx_hdr, hdr, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PHYERR_EVENTID);
+
+/* TX Pause/Unpause event */
+#define WMITLV_TABLE_WMI_TX_PAUSE_EVENTID(id,op,buf,len)												 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tx_pause_event_fixed_param, wmi_tx_pause_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_TX_PAUSE_EVENTID);
+
+/* Mgmt TX completion event */
+#define WMITLV_TABLE_WMI_MGMT_TX_COMPLETION_EVENTID(id, op, buf, len)	\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_mgmt_tx_compl_event_fixed_param, wmi_mgmt_tx_compl_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MGMT_TX_COMPLETION_EVENTID);
+
+/* VDEV Start response Event */
+#define WMITLV_TABLE_WMI_VDEV_START_RESP_EVENTID(id,op,buf,len)								\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_start_response_event_fixed_param, wmi_vdev_start_response_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_START_RESP_EVENTID);
+
+/* VDEV Stopped Event */
+#define WMITLV_TABLE_WMI_VDEV_STOPPED_EVENTID(id,op,buf,len)							     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_stopped_event_fixed_param, wmi_vdev_stopped_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_STOPPED_EVENTID);
+
+/* VDEV Install Key Complete Event */
+#define WMITLV_TABLE_WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID(id,op,buf,len)					    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_install_key_complete_event_fixed_param, wmi_vdev_install_key_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID);
+
+/* Peer STA Kickout Event */
+#define WMITLV_TABLE_WMI_PEER_STA_KICKOUT_EVENTID(id,op,buf,len)							 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_sta_kickout_event_fixed_param, wmi_peer_sta_kickout_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STA_KICKOUT_EVENTID);
+
+/* Management Rx Event */
+#define WMITLV_TABLE_WMI_MGMT_RX_EVENTID(id,op,buf,len)													\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mgmt_rx_hdr, wmi_mgmt_rx_hdr, hdr, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_MGMT_RX_EVENTID);
+
+/* TBTT offset Event */
+#define WMITLV_TABLE_WMI_TBTTOFFSET_UPDATE_EVENTID(id,op,buf,len)							  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tbtt_offset_event_fixed_param, wmi_tbtt_offset_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_FXAR(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, tbttoffset_list, WMITLV_SIZE_FIX, WMI_MAX_AP_VDEV)
+WMITLV_CREATE_PARAM_STRUC(WMI_TBTTOFFSET_UPDATE_EVENTID);
+
+/* TX DELBA Complete Event */
+#define WMITLV_TABLE_WMI_TX_DELBA_COMPLETE_EVENTID(id,op,buf,len)					    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tx_delba_complete_event_fixed_param, wmi_tx_delba_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_TX_DELBA_COMPLETE_EVENTID);
+
+/* Tx ADDBA Complete Event */
+#define WMITLV_TABLE_WMI_TX_ADDBA_COMPLETE_EVENTID(id,op,buf,len)					\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tx_addba_complete_event_fixed_param, wmi_tx_addba_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_TX_ADDBA_COMPLETE_EVENTID);
+
+/* ADD BA Req ssn Event */
+#define WMITLV_TABLE_WMI_BA_RSP_SSN_EVENTID(id,op,buf,len)					 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ba_rsp_ssn_event_fixed_param, wmi_ba_rsp_ssn_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_ba_event_ssn, ba_event_ssn_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_BA_RSP_SSN_EVENTID);
+
+/* Aggregation Request event */
+#define WMITLV_TABLE_WMI_AGGR_STATE_TRIG_EVENTID(id,op,buf,len)					      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_aggr_state_trig_event_fixed_param, wmi_aggr_state_trig_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_AGGR_STATE_TRIG_EVENTID);
+
+/* Roam Event */
+#define WMITLV_TABLE_WMI_ROAM_EVENTID(id,op,buf,len)							     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_event_fixed_param, wmi_roam_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_EVENTID);
+
+/* Roam Synch Event */
+#define WMITLV_TABLE_WMI_ROAM_SYNCH_EVENTID(id,op,buf,len)							\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_synch_event_fixed_param, wmi_roam_synch_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bcn_probe_rsp_frame, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, reassoc_rsp_frame, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_channel, wmi_channel, chan, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_key_material, key, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, status, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_SYNCH_EVENTID);
+
+/* WOW Wakeup Host Event */
+/* NOTE: Make sure wow_bitmap_info can be zero or one elements only */
+#define WMITLV_TABLE_WMI_WOW_WAKEUP_HOST_EVENTID(id,op,buf,len)								\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WOW_EVENT_INFO_fixed_param, WOW_EVENT_INFO_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WOW_EVENT_INFO_SECTION_BITMAP, wow_bitmap_info, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, wow_packet_buffer, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hb_ind_event_fixed_param, hb_indevt, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param, wow_gtkigtk, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_WAKEUP_HOST_EVENTID);
+
+
+#define WMITLV_TABLE_WMI_WOW_INITIAL_WAKEUP_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_WOW_EVENT_INITIAL_WAKEUP_fixed_param, WOW_INITIAL_WAKEUP_EVENT_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_WOW_INITIAL_WAKEUP_EVENTID);
+
+
+/* RTT error report Event */
+#define WMITLV_TABLE_WMI_RTT_ERROR_REPORT_EVENTID(id,op,buf,len)    \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_RTT_ERROR_REPORT_EVENTID);
+
+/* Echo Event */
+#define WMITLV_TABLE_WMI_ECHO_EVENTID(id,op,buf,len)							     \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_echo_event_fixed_param, wmi_echo_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_ECHO_EVENTID);
+
+/* FTM Integration Event */
+#define WMITLV_TABLE_WMI_PDEV_FTM_INTG_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ftm_intg_event_fixed_param, wmi_ftm_intg_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_FTM_INTG_EVENTID);
+
+/* VDEV get Keepalive Event */
+#define WMITLV_TABLE_WMI_VDEV_GET_KEEPALIVE_EVENTID(id,op,buf,len)							   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_event_fixed_param, wmi_vdev_get_keepalive_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_GET_KEEPALIVE_EVENTID);
+
+/* GPIO Input Event */
+#define WMITLV_TABLE_WMI_GPIO_INPUT_EVENTID(id,op,buf,len)  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_gpio_input_event_fixed_param, wmi_gpio_input_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_GPIO_INPUT_EVENTID);
+
+/* CSA Handling Event */
+#define WMITLV_TABLE_WMI_CSA_HANDLING_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_csa_event_fixed_param, wmi_csa_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_CSA_HANDLING_EVENTID);
+
+/* Rfkill state change Event */
+#define WMITLV_TABLE_WMI_RFKILL_STATE_CHANGE_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_rfkill_event_fixed_param, wmi_rfkill_mode_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_RFKILL_STATE_CHANGE_EVENTID);
+
+/* Debug Message Event */
+#define WMITLV_TABLE_WMI_DEBUG_MESG_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DEBUG_MESG_EVENTID);
+
+#define WMITLV_TABLE_WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_debug_mesg_flush_complete_fixed_param, wmi_debug_mesg_flush_complete_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID);
+
+#define WMITLV_TABLE_WMI_RSSI_BREACH_EVENTID(id, op, buf, len)\
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_rssi_breach_event_fixed_param, wmi_rssi_breach_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_RSSI_BREACH_EVENTID);
+
+/* Diagnostics Event */
+#define WMITLV_TABLE_WMI_DIAG_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DIAG_EVENTID);
+
+/* IGTK Offload Event */
+#define WMITLV_TABLE_WMI_GTK_OFFLOAD_STATUS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param, WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_GTK_OFFLOAD_STATUS_EVENTID);
+
+/* DCA interferance Event */
+#define WMITLV_TABLE_WMI_DCS_INTERFERENCE_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcs_interference_event_fixed_param, wmi_dcs_interference_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, ath_dcs_cw_int, cw_int, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wlan_dcs_im_tgt_stats_t, wlan_stat, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCS_INTERFERENCE_EVENTID);
+
+/* Profile data Event */
+#define WMITLV_TABLE_WMI_WLAN_PROFILE_DATA_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlan_profile_ctx_t, wmi_wlan_profile_ctx_t, profile_ctx, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_wlan_profile_t, profile_data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_PROFILE_DATA_EVENTID);
+
+/* PDEV UTF Event */
+#define WMITLV_TABLE_WMI_PDEV_UTF_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_UTF_EVENTID);
+
+/* Debug print Event */
+#define WMITLV_TABLE_WMI_DEBUG_PRINT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DEBUG_PRINT_EVENTID);
+
+/* RTT measurement report Event */
+#define WMITLV_TABLE_WMI_RTT_MEASUREMENT_REPORT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_RTT_MEASUREMENT_REPORT_EVENTID);
+
+/*oem measurement report Event*/
+#define WMITLV_TABLE_WMI_OEM_MEASUREMENT_REPORT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OEM_MEASUREMENT_REPORT_EVENTID);
+
+/*oem error report event*/
+#define WMITLV_TABLE_WMI_OEM_ERROR_REPORT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OEM_ERROR_REPORT_EVENTID);
+
+/*oem capability report event*/
+#define WMITLV_TABLE_WMI_OEM_CAPABILITY_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_OEM_CAPABILITY_EVENTID);
+
+/* HOST SWBA Event */
+#define WMITLV_TABLE_WMI_HOST_SWBA_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_host_swba_event_fixed_param, wmi_host_swba_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tim_info, tim_info, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_p2p_noa_info, p2p_noa_info, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_HOST_SWBA_EVENTID);
+
+/* Update stats Event */
+#define WMITLV_TABLE_WMI_UPDATE_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_stats_event_fixed_param, wmi_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_UPDATE_STATS_EVENTID);
+
+/* For vdev based ht/vht info upload*/
+#define WMITLV_TABLE_WMI_UPDATE_VDEV_RATE_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_rate_stats_event_fixed_param, wmi_vdev_rate_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_rate_ht_info, ht_info, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_UPDATE_VDEV_RATE_STATS_EVENTID);
+
+/* Update memory dump complete Event */
+#define  WMITLV_TABLE_WMI_UPDATE_FW_MEM_DUMP_EVENTID(id,op,buf,len)\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_update_fw_mem_dump_fixed_param, wmi_update_fw_mem_dump_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_UPDATE_FW_MEM_DUMP_EVENTID);
+
+/* Event indicating the DIAG LOGs/Events supported by FW */
+#define WMITLV_TABLE_WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_diag_event_log_supported_event_fixed_params, wmi_diag_event_log_supported_event_fixed_params, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, diag_events_logs_list, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID);
+
+
+/* Update iface link stats Event */
+#define WMITLV_TABLE_WMI_IFACE_LINK_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_iface_link_stats_event_fixed_param, wmi_iface_link_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_iface_link_stats, iface_link_stats, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_wmm_ac_stats, ac, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_IFACE_LINK_STATS_EVENTID);
+
+/* Update Peer link stats Event */
+#define WMITLV_TABLE_WMI_PEER_LINK_STATS_EVENTID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_stats_event_fixed_param, wmi_peer_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_link_stats, peer_stats, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_rate_stats, peer_rate_stats, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_LINK_STATS_EVENTID);
+
+/* Update radio stats Event */
+#define WMITLV_TABLE_WMI_RADIO_LINK_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_radio_link_stats_event_fixed_param, wmi_radio_link_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_radio_link_stats, radio_stats, WMITLV_SIZE_VAR) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_channel_stats, channel_stats, WMITLV_SIZE_VAR)
+
+WMITLV_CREATE_PARAM_STRUC(WMI_RADIO_LINK_STATS_EVENTID);
+
+/* PDEV QVIT Event */
+#define WMITLV_TABLE_WMI_PDEV_QVIT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_QVIT_EVENTID);
+
+/* WLAN Frequency avoid Event */
+#define WMITLV_TABLE_WMI_WLAN_FREQ_AVOID_EVENTID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_avoid_freq_ranges_event_fixed_param, wmi_avoid_freq_ranges_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_avoid_freq_range_desc, avd_freq_range, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_WLAN_FREQ_AVOID_EVENTID);
+
+/* GTK rekey fail Event */
+#define WMITLV_TABLE_WMI_GTK_REKEY_FAIL_EVENTID(id,op,buf,len)												       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_gtk_rekey_fail_event_fixed_param, wmi_gtk_rekey_fail_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_GTK_REKEY_FAIL_EVENTID);
+
+/* NLO match event */
+#define WMITLV_TABLE_WMI_NLO_MATCH_EVENTID(id,op,buf,len)												  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_nlo_event, wmi_nlo_event, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_NLO_MATCH_EVENTID);
+
+/* NLO scan complete event */
+#define WMITLV_TABLE_WMI_NLO_SCAN_COMPLETE_EVENTID(id,op,buf,len)												  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_nlo_event, wmi_nlo_event, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_NLO_SCAN_COMPLETE_EVENTID);
+
+/* APFIND event */
+#define WMITLV_TABLE_WMI_APFIND_EVENTID(id,op,buf,len)                                                                                                 \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_apfind_event_hdr, wmi_apfind_event_hdr, hdr, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_APFIND_EVENTID);
+
+/* WMI_PASSPOINT_MATCH_EVENTID */
+#define WMITLV_TABLE_WMI_PASSPOINT_MATCH_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_passpoint_event_hdr, wmi_passpoint_event_hdr, fixed_param, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PASSPOINT_MATCH_EVENTID);
+
+/* Chatter query reply event */
+#define WMITLV_TABLE_WMI_CHATTER_PC_QUERY_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chatter_query_reply_event_fixed_param, wmi_chatter_query_reply_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_CHATTER_PC_QUERY_EVENTID);
+
+/* Upload H_CV info event */
+#define WMITLV_TABLE_WMI_UPLOADH_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_upload_h_hdr, wmi_upload_h_hdr, hdr, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_UPLOADH_EVENTID);
+
+/* Capture H info event */
+#define WMITLV_TABLE_WMI_CAPTUREH_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_capture_h_event_hdr, wmi_capture_h_event_hdr, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_CAPTUREH_EVENTID);
+/* TDLS Peer Update event */
+#define WMITLV_TABLE_WMI_TDLS_PEER_EVENTID(id,op,buf,len)  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_tdls_peer_event_fixed_param, wmi_tdls_peer_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_TDLS_PEER_EVENTID);
+
+/* VDEV MCC Beacon Interval Change Request Event */
+#define WMITLV_TABLE_WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_mcc_bcn_intvl_change_event_fixed_param, wmi_vdev_mcc_bcn_intvl_change_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC
+	(WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID);
+
+#define WMITLV_TABLE_WMI_BATCH_SCAN_ENABLED_EVENTID(id,op,buf,len)  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_batch_scan_enabled_event_fixed_param, wmi_batch_scan_enabled_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_BATCH_SCAN_ENABLED_EVENTID);
+
+#define WMITLV_TABLE_WMI_BATCH_SCAN_RESULT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_batch_scan_result_event_fixed_param, wmi_batch_scan_result_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_ARRAY_STRUC, wmi_batch_scan_result_scan_list, scan_list, WMITLV_SIZE_VAR)	  \
+	WMITLV_ELEM(id,op,buf,len,WMITLV_TAG_ARRAY_STRUC, wmi_batch_scan_result_network_info, network_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_BATCH_SCAN_RESULT_EVENTID);
+
+#define WMITLV_TABLE_WMI_OFFLOAD_BCN_TX_STATUS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_offload_bcn_tx_status_event_fixed_param, wmi_offload_bcn_tx_status_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OFFLOAD_BCN_TX_STATUS_EVENTID);
+
+/* NOA Event */
+#define WMITLV_TABLE_WMI_P2P_NOA_EVENTID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_noa_event_fixed_param, wmi_p2p_noa_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_p2p_noa_info, wmi_p2p_noa_info, p2p_noa_info, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_P2P_NOA_EVENTID);
+
+    /* AP PS enhanced green ap Event */
+#define WMITLV_TABLE_WMI_AP_PS_EGAP_INFO_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len,\
+	   WMITLV_TAG_STRUC_wmi_ap_ps_egap_info_event_fixed_param,\
+	   wmi_ap_ps_egap_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC,\
+	   wmi_ap_ps_egap_info_chainmask_list, chainmask_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_AP_PS_EGAP_INFO_EVENTID);
+
+#define WMITLV_TABLE_WMI_PEER_INFO_EVENTID(id,op,buf,len)												  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_info_event_fixed_param, wmi_peer_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)		  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_info, peer_info, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_INFO_EVENTID);
+
+#define WMITLV_TABLE_WMI_PEER_TX_FAIL_CNT_THR_EVENTID(id,op,buf,len)											  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tx_fail_cnt_thr_event_fixed_param, wmi_peer_tx_fail_cnt_thr_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_TX_FAIL_CNT_THR_EVENTID);
+
+/* DFS radar Event */
+#define WMITLV_TABLE_WMI_DFS_RADAR_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dfs_radar_event_fixed_param, wmi_dfs_radar_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_DFS_RADAR_EVENTID);
+
+/* Thermal Event */
+#define WMITLV_TABLE_WMI_THERMAL_MGMT_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_thermal_mgmt_event_fixed_param, wmi_thermal_mgmt_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_THERMAL_MGMT_EVENTID);
+
+/* NAN Response/Indication Event */
+#define WMITLV_TABLE_WMI_NAN_EVENTID(id,op,buf,len)					\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_nan_event_hdr, wmi_nan_event_hdr, fixed_param, WMITLV_SIZE_FIX)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_NAN_EVENTID);
+
+/* L1SS track Event */
+#define WMITLV_TABLE_WMI_PDEV_L1SS_TRACK_EVENTID(id,op,buf,len)	\
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_l1ss_track_event_fixed_param, wmi_pdev_l1ss_track_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_L1SS_TRACK_EVENTID);
+
+#define WMITLV_TABLE_WMI_DIAG_DATA_CONTAINER_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_diag_data_container_event_fixed_param, wmi_diag_data_container_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)	  \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DIAG_DATA_CONTAINER_EVENTID);
+
+/* Estimated Link Speed Indication*/
+#define WMITLV_TABLE_WMI_PEER_ESTIMATED_LINKSPEED_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_estimated_linkspeed_event_fixed_param, wmi_peer_estimated_linkspeed_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ESTIMATED_LINKSPEED_EVENTID);
+
+#define WMITLV_TABLE_WMI_STATS_EXT_EVENTID(id,op,buf,len)				      \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_stats_ext_event_fixed_param, wmi_stats_ext_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, data, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_STATS_EXT_EVENTID);
+
+#define WMITLV_TABLE_WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_offload_prb_rsp_tx_status_event_fixed_param, wmi_offload_prb_rsp_tx_status_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID);
+
+/* host auto shut down event */
+#define WMITLV_TABLE_WMI_HOST_AUTO_SHUTDOWN_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_host_auto_shutdown_event_fixed_param, wmi_host_auto_shutdown_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_HOST_AUTO_SHUTDOWN_EVENTID);
+
+/* peer state Event */
+#define WMITLV_TABLE_WMI_PEER_STATE_EVENTID(id,op,buf,len)				       \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_state_event_fixed_param, wmi_peer_state_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STATE_EVENTID);
+
+/* peer assoc conf Event */
+#define WMITLV_TABLE_WMI_PEER_ASSOC_CONF_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_peer_assoc_conf_event_fixed_param, wmi_peer_assoc_conf_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ASSOC_CONF_EVENTID);
+
+/* D0-WOW Disable Ack event */
+#define WMITLV_TABLE_WMI_D0_WOW_DISABLE_ACK_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_d0_wow_disable_ack_event_fixed_param, wmi_d0_wow_disable_ack_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_D0_WOW_DISABLE_ACK_EVENTID);
+
+/* Pdev get chip temperature event */
+#define WMITLV_TABLE_WMI_PDEV_TEMPERATURE_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_temperature_event_fixed_param, wmi_pdev_temperature_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_TEMPERATURE_EVENTID);
+
+/* mDNS offload stats event */
+#define WMITLV_TABLE_WMI_MDNS_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mdns_stats_event_fixed_param, wmi_mdns_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_STATS_EVENTID);
+
+/* pdev resume event */
+#define WMITLV_TABLE_WMI_PDEV_RESUME_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_resume_event_fixed_param, wmi_pdev_resume_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_RESUME_EVENTID);
+
+/* SAP Authentication offload event */
+#define WMITLV_TABLE_WMI_SAP_OFL_ADD_STA_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sap_ofl_add_sta_event_fixed_param, wmi_sap_ofl_add_sta_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)   \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SAP_OFL_ADD_STA_EVENTID);
+
+#define WMITLV_TABLE_WMI_SAP_OFL_DEL_STA_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sap_ofl_del_sta_event_fixed_param, wmi_sap_ofl_del_sta_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SAP_OFL_DEL_STA_EVENTID);
+
+/* Set OCB schedule cmd, DEPRECATED */
+#define WMITLV_TABLE_WMI_OCB_SET_SCHED_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_ocb_set_sched_event_fixed_param, wmi_ocb_set_sched_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_SET_SCHED_EVENTID);
+
+/* Set OCB configuration response event */
+#define WMITLV_TABLE_WMI_OCB_SET_CONFIG_RESP_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_set_config_resp_event_fixed_param, wmi_ocb_set_config_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_SET_CONFIG_RESP_EVENTID);
+
+/* Get TSF timer response event */
+#define WMITLV_TABLE_WMI_OCB_GET_TSF_TIMER_RESP_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_resp_event_fixed_param, wmi_ocb_get_tsf_timer_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_OCB_GET_TSF_TIMER_RESP_EVENTID);
+
+/* Get DCC stats response event */
+#define WMITLV_TABLE_WMI_DCC_GET_STATS_RESP_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_get_stats_resp_event_fixed_param, wmi_dcc_get_stats_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_stats_per_channel, stats_per_channel_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_GET_STATS_RESP_EVENTID);
+
+/* Update DCC NDL response event */
+#define WMITLV_TABLE_WMI_DCC_UPDATE_NDL_RESP_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_update_ndl_resp_event_fixed_param, wmi_dcc_update_ndl_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_UPDATE_NDL_RESP_EVENTID);
+
+/* DCC stats event */
+#define WMITLV_TABLE_WMI_DCC_STATS_EVENTID(id,op,buf,len) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_dcc_stats_event_fixed_param, wmi_dcc_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_dcc_ndl_stats_per_channel, stats_per_channel_list, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_DCC_STATS_EVENTID);
+
+/* Read TSF timer response event */
+#define WMITLV_TABLE_WMI_VDEV_TSF_REPORT_EVENTID(id,op,buf,len) \
+WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_tsf_report_event_fixed_param, wmi_vdev_tsf_report_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_TSF_REPORT_EVENTID);
+
+/* Vdev capabilities IE to be transmitted in mgmt frames */
+#define WMITLV_TABLE_WMI_VDEV_SET_IE_CMDID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_vdev_set_ie_cmd_fixed_param, wmi_vdev_set_ie_cmd_fixed_param, vdev_ie, WMITLV_SIZE_FIX) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bufp, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_SET_IE_CMDID);
+
+/* SOC Set Hardware Mode Response event */
+#define WMITLV_TABLE_WMI_SOC_SET_HW_MODE_RESP_EVENTID(id, op, buf, len) \
+WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_response_event_fixed_param, wmi_soc_set_hw_mode_response_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_soc_set_hw_mode_response_vdev_mac_entry, wmi_soc_set_hw_mode_response_vdev_mac_mapping, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_HW_MODE_RESP_EVENTID);
+
+/* SOC Hardware Mode Transition event */
+#define WMITLV_TABLE_WMI_SOC_HW_MODE_TRANSITION_EVENTID(id, op, buf, len) \
+WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_hw_mode_transition_event_fixed_param, wmi_soc_hw_mode_transition_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_ARRAY_STRUC, wmi_soc_set_hw_mode_response_vdev_mac_entry, wmi_soc_set_hw_mode_response_vdev_mac_mapping, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_HW_MODE_TRANSITION_EVENTID);
+
+/* SOC Set Dual MAC Config Response event */
+#define WMITLV_TABLE_WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_response_event_fixed_param, wmi_soc_set_dual_mac_config_response_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID);
+
+/* Packet Filter configure command*/
+#define WMITLV_TABLE_WMI_PACKET_FILTER_CONFIG_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_packet_filter_config_fixed_param, WMI_PACKET_FILTER_CONFIG_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PACKET_FILTER_CONFIG_CMDID);
+
+/* Packet Filter enable command*/
+#define WMITLV_TABLE_WMI_PACKET_FILTER_ENABLE_CMDID(id, op, buf, len) \
+    WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_packet_filter_enable_fixed_param, WMI_PACKET_FILTER_ENABLE_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_PACKET_FILTER_ENABLE_CMDID);
+
+/* MAWC enable/disable sensor event */
+#define WMITLV_TABLE_WMI_MAWC_ENABLE_SENSOR_EVENTID(id, op, buf, len) \
+	WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_mawc_enable_sensor_event_fixed_param, wmi_mawc_enable_sensor_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
+WMITLV_CREATE_PARAM_STRUC(WMI_MAWC_ENABLE_SENSOR_EVENTID);
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*_WMI_TLV_DEFS_H_*/
diff --git a/target/inc/wmi_tlv_helper.h b/target/inc/wmi_tlv_helper.h
new file mode 100644
index 0000000..7631e5d
--- /dev/null
+++ b/target/inc/wmi_tlv_helper.h
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+#ifndef _WMI_TLV_HELPER_H_
+#define _WMI_TLV_HELPER_H_
+
+/*
+ * Every command or event parameter structure will need a TLV definition.
+ * The macro WMITLV_TABLE is used to help build this TLV definition. Inside this macro define, the
+ * individual TLV's are specified. The parameters for WMITLV_ELEM are:
+ * (1) the list of parameters that are passed unchanged from the WMITLV_TABLE. Currently, they are id,op,buf,len
+ * (2) The TLV Tag. You should create a new tag for each cmd/event in WMITLV_TAG_ID. The name of the
+ *     tag is <WMI_TLVTAG_STRUC_><CMD or Event ID name>. There are special tags,
+ *     e.g. WMI_TLVTAG_ARRAY_UINT32 and WMI_TLVTAG_ARRAY_STRUC. WMI_TLVTAG_ARRAY_UINT32 is for a
+ *     variable size array of UINT32 elements. WMI_TLVTAG_ARRAY_STRUC is for a varialbe size array
+ *     of structures.
+ * (3) type of the TLV. For WMI_TLVTAG_ARRAY_* tag, then it is the type of each element.
+ * (4) Name of this TLV. It must be unique in this TLV TABLE.
+ * (5) Either WMITLV_SIZE_FIX or WMITLV_SIZE_VAR to indicate if this TLV is variable size.
+ *
+ * Note: It is important that the last TLV_ELEM does not have the "\" character.
+ */
+
+/* Size of the TLV Header which is the Tag and Length fields */
+#define WMI_TLV_HDR_SIZE   (1 * sizeof(A_UINT32))
+
+/** TLV Helper macro to get the TLV Header given the pointer
+ *  to the TLV buffer. */
+#define WMITLV_GET_HDR(tlv_buf)        (((A_UINT32 *)(tlv_buf))[0])
+
+/** TLV Helper macro to set the TLV Header given the pointer
+ *  to the TLV buffer. */
+#define WMITLV_SET_HDR(tlv_buf, tag, len) (((A_UINT32 *)(tlv_buf))[0]) = ((tag << 16) | (len & 0x0000FFFF))
+
+/** TLV Helper macro to get the TLV Tag given the TLV header. */
+#define WMITLV_GET_TLVTAG(tlv_header)  ((A_UINT32)((tlv_header)>>16))
+
+/** TLV Helper macro to get the TLV Buffer Length (minus TLV
+ *  header size) given the TLV header. */
+#define WMITLV_GET_TLVLEN(tlv_header)  ((A_UINT32)((tlv_header) & 0x0000FFFF))
+
+/** TLV Helper macro to get the TLV length from TLV structure size by removing TLV header size */
+#define WMITLV_GET_STRUCT_TLVLEN(tlv_struct)    ((A_UINT32)(sizeof(tlv_struct)-WMI_TLV_HDR_SIZE))
+
+/* Indicates whether the TLV is fixed size or variable length */
+#define WMITLV_SIZE_FIX     0
+#define WMITLV_SIZE_VAR     1
+
+typedef struct {
+	A_UINT32 tag_order;
+	A_UINT32 tag_id;
+	A_UINT32 tag_struct_size;
+	A_UINT32 tag_varied_size;
+	A_UINT32 tag_array_size;
+	A_UINT32 cmd_num_tlv;
+} wmitlv_attributes_struc;
+
+/* Template structure definition for a variable size array of UINT32 */
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals WMI_TLVTAG_ARRAY_UINT32 */
+	A_UINT32 uint32_array[1];       /* variable length Array of UINT32 */
+} wmitlv_array_uint32;
+
+/* Template structure definition for a variable size array of unknown structure */
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals WMI_TLVTAG_ARRAY_STRUC */
+	A_UINT32 struc_array[1];        /* variable length Array of structures */
+} wmitlv_array_struc;
+
+/*
+ * Used to fill in the "arr_size" parameter when it is not specified and hence, invalid. Can be used to
+ * indicate if the original TLV definition specify this fixed array size.
+ */
+#define WMITLV_ARR_SIZE_INVALID  0x1FE
+
+#define WMITLV_GET_TAG_NUM_TLV_ATTRIB(wmi_cmd_event_id)	     \
+	WMI_TLV_HLPR_NUM_TLVS_FOR_ ## wmi_cmd_event_id
+
+void
+wmitlv_set_static_param_tlv_buf(void *param_tlv_buf,
+				A_UINT32 max_tlvs_accomodated);
+
+void
+wmitlv_free_allocated_command_tlvs(A_UINT32 cmd_id, void **wmi_cmd_struct_ptr);
+
+void
+wmitlv_free_allocated_event_tlvs(A_UINT32 event_id, void **wmi_cmd_struct_ptr);
+
+int
+wmitlv_check_command_tlv_params(void *os_ctx, void *param_struc_ptr,
+				A_UINT32 param_buf_len,
+				A_UINT32 wmi_cmd_event_id);
+
+int
+wmitlv_check_event_tlv_params(void *os_ctx, void *param_struc_ptr,
+			      A_UINT32 param_buf_len,
+			      A_UINT32 wmi_cmd_event_id);
+
+int
+wmitlv_check_and_pad_command_tlvs(void *os_ctx, void *param_struc_ptr,
+				  A_UINT32 param_buf_len,
+				  A_UINT32 wmi_cmd_event_id,
+				  void **wmi_cmd_struct_ptr);
+
+int
+wmitlv_check_and_pad_event_tlvs(void *os_ctx, void *param_struc_ptr,
+				A_UINT32 param_buf_len,
+				A_UINT32 wmi_cmd_event_id,
+				void **wmi_cmd_struct_ptr);
+
+/** This structure is the element for the Version WhiteList
+ *  table. */
+typedef struct {
+	A_UINT32 major;
+	A_UINT32 minor;
+	A_UINT32 namespace_0;
+	A_UINT32 namespace_1;
+	A_UINT32 namespace_2;
+	A_UINT32 namespace_3;
+} wmi_whitelist_version_info;
+
+struct _wmi_abi_version;        /* Forward declaration to make the ARM compiler happy */
+
+int
+wmi_cmp_and_set_abi_version(int num_whitelist,
+			    wmi_whitelist_version_info *
+			    version_whitelist_table,
+			    struct _wmi_abi_version *my_vers,
+			    struct _wmi_abi_version *opp_vers,
+			    struct _wmi_abi_version *out_vers);
+
+int
+wmi_versions_are_compatible(struct _wmi_abi_version *vers1,
+			    struct _wmi_abi_version *vers2);
+
+#endif /*_WMI_TLV_HELPER_H_*/
diff --git a/target/inc/wmi_unified.h b/target/inc/wmi_unified.h
new file mode 100644
index 0000000..7684d33
--- /dev/null
+++ b/target/inc/wmi_unified.h
@@ -0,0 +1,12299 @@
+/*
+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/**
+ * @addtogroup WMIAPI
+ ***@{
+ */
+
+/** @file
+ * This file specifies the WMI interface for the  Software Architecture.
+ *
+ * It includes definitions of all the commands and events. Commands are messages
+ * from the host to the target. Events and Replies are messages from the target
+ * to the host.
+ *
+ * Ownership of correctness in regards to WMI commands
+ * belongs to the host driver and the target is not required to validate
+ * parameters for value, proper range, or any other checking.
+ *
+ * Guidelines for extending this interface are below.
+ *
+ * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
+ * 2. Use ONLY A_UINT32 type for defining member variables within WMI command/event
+ *    structures. Do not use A_UINT8, A_UINT16, A_BOOL or enum types within these structures.
+ * 3. DO NOT define bit fields within structures. Implement bit fields using masks
+ *    if necessary. Do not use the programming language's bit field definition.
+ * 4. Define macros for encode/decode of A_UINT8, A_UINT16 fields within the A_UINT32
+ *    variables. Use these macros for set/get of these fields. Try to use this to
+ *    optimize the structure without bloating it with A_UINT32 variables for every lower
+ *    sized field.
+ * 5. Do not use PACK/UNPACK attributes for the structures as each member variable is
+ *    already 4-byte aligned by virtue of being a A_UINT32 type.
+ * 6. Comment each parameter part of the WMI command/event structure by using the
+ *    2 stars at the begining of C comment instead of one star to enable HTML document
+ *    generation using Doxygen.
+ *
+ */
+
+#ifndef _WMI_UNIFIED_H_
+#define _WMI_UNIFIED_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <wlan_defs.h>
+#include <wmi_services.h>
+#include <dbglog.h>
+
+#define ATH_MAC_LEN             6               /**< length of MAC in bytes */
+#define WMI_EVENT_STATUS_SUCCESS 0      /* Success return status to host */
+#define WMI_EVENT_STATUS_FAILURE 1      /* Failure return status to host */
+
+#define MAX_TX_RATE_VALUES      10      /*Max Tx Rates */
+#define MAX_RSSI_VALUES         10      /*Max Rssi values */
+
+/* The WLAN_MAX_AC macro cannot be changed without breaking
+ * WMI compatibility.
+ * The maximum value of access category
+ */
+#define WLAN_MAX_AC  4
+
+/*
+ * These don't necessarily belong here; but as the MS/SM macros require
+ * ar6000_internal.h to be included, it may not be defined as yet.
+ */
+#define WMI_F_MS(_v, _f)					    \
+	( ((_v) & (_f)) >> (_f ## _S) )
+
+/*
+ * This breaks the "good macro practice" of only referencing each
+ * macro field once (to avoid things like field++ from causing issues.)
+ */
+#define WMI_F_RMW(_var, _v, _f)					    \
+	do {							\
+		(_var) &= ~(_f);				    \
+		(_var) |= ( ((_v) << (_f ## _S)) & (_f));	      \
+	} while (0)
+
+#define WMI_GET_BITS(_val, _index, _num_bits)                         \
+	(((_val) >> (_index)) & ((1 << (_num_bits)) - 1))
+
+#define WMI_SET_BITS(_var, _index, _num_bits, _val) do {               \
+		(_var) &= ~(((1 << (_num_bits)) - 1) << (_index));           \
+		(_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << (_index)); \
+	} while (0)
+
+/**
+ * A packed array is an array where each entry in the array is less than
+ * or equal to 16 bits, and the entries are stuffed into an A_UINT32 array.
+ * For example, if each entry in the array is 11 bits, then you can stuff
+ * an array of 4 11-bit values into an array of 2 A_UINT32 values.
+ * The first 2 11-bit values will be stored in the first A_UINT32,
+ * and the last 2 11-bit values will be stored in the second A_UINT32.
+ */
+#define WMI_PACKED_ARR_SIZE(num_entries, bits_per_entry) \
+	(((num_entries) / (32 / (bits_per_entry))) +            \
+	(((num_entries) % (32 / (bits_per_entry))) ? 1 : 0))
+
+static INLINE A_UINT32 wmi_packed_arr_get_bits(A_UINT32 * arr,
+			A_UINT32 entry_index, A_UINT32 bits_per_entry)
+{
+	A_UINT32 entries_per_uint = (32 / bits_per_entry);
+	A_UINT32 uint_index = (entry_index / entries_per_uint);
+	A_UINT32 num_entries_in_prev_uints = (uint_index * entries_per_uint);
+	A_UINT32 index_in_uint = (entry_index - num_entries_in_prev_uints);
+	A_UINT32 start_bit_in_uint = (index_in_uint * bits_per_entry);
+	return ((arr[uint_index] >> start_bit_in_uint) &
+		((1 << bits_per_entry) - 1));
+}
+
+static INLINE void wmi_packed_arr_set_bits(A_UINT32 *arr, A_UINT32 entry_index,
+			A_UINT32 bits_per_entry, A_UINT32 val)
+{
+	A_UINT32 entries_per_uint = (32 / bits_per_entry);
+	A_UINT32 uint_index = (entry_index / entries_per_uint);
+	A_UINT32 num_entries_in_prev_uints = (uint_index * entries_per_uint);
+	A_UINT32 index_in_uint = (entry_index - num_entries_in_prev_uints);
+	A_UINT32 start_bit_in_uint = (index_in_uint * bits_per_entry);
+
+	arr[uint_index] &= ~(((1 << bits_per_entry) - 1) << start_bit_in_uint);
+	arr[uint_index] |=
+		((val & ((1 << bits_per_entry) - 1)) << start_bit_in_uint);
+}
+
+/** 2 word representation of MAC addr */
+typedef struct {
+	/** upper 4 bytes of  MAC address */
+	A_UINT32 mac_addr31to0;
+	/** lower 2 bytes of  MAC address */
+	A_UINT32 mac_addr47to32;
+} wmi_mac_addr;
+
+/** macro to convert MAC address from WMI word format to char array */
+#define WMI_MAC_ADDR_TO_CHAR_ARRAY(pwmi_mac_addr,c_macaddr) do {	       \
+		(c_macaddr)[0] =    ((pwmi_mac_addr)->mac_addr31to0) & 0xff;	 \
+		(c_macaddr)[1] =  ( ((pwmi_mac_addr)->mac_addr31to0) >> 8) & 0xff; \
+		(c_macaddr)[2] =  ( ((pwmi_mac_addr)->mac_addr31to0) >> 16) & 0xff; \
+		(c_macaddr)[3] =  ( ((pwmi_mac_addr)->mac_addr31to0) >> 24) & 0xff;  \
+		(c_macaddr)[4] =    ((pwmi_mac_addr)->mac_addr47to32) & 0xff;	     \
+		(c_macaddr)[5] =  ( ((pwmi_mac_addr)->mac_addr47to32) >> 8) & 0xff; \
+} while(0)
+
+/** macro to convert MAC address from char array to WMI word format */
+#define WMI_CHAR_ARRAY_TO_MAC_ADDR(c_macaddr,pwmi_mac_addr)  do { \
+		(pwmi_mac_addr)->mac_addr31to0  =				    \
+			( (c_macaddr)[0] | ((c_macaddr)[1] << 8)			   \
+			  | ((c_macaddr)[2] << 16) | ((c_macaddr)[3] << 24) );	       \
+		(pwmi_mac_addr)->mac_addr47to32  =				    \
+			( (c_macaddr)[4] | ((c_macaddr)[5] << 8));	       \
+} while(0)
+
+/*
+ * wmi command groups.
+ */
+typedef enum {
+	/* 0 to 2 are reserved */
+	WMI_GRP_START = 0x3,
+	WMI_GRP_SCAN = WMI_GRP_START,
+	WMI_GRP_PDEV,
+	WMI_GRP_VDEV,
+	WMI_GRP_PEER,
+	WMI_GRP_MGMT,
+	WMI_GRP_BA_NEG,
+	WMI_GRP_STA_PS,
+	WMI_GRP_DFS,
+	WMI_GRP_ROAM,
+	WMI_GRP_OFL_SCAN,
+	WMI_GRP_P2P,
+	WMI_GRP_AP_PS,
+	WMI_GRP_RATE_CTRL,
+	WMI_GRP_PROFILE,
+	WMI_GRP_SUSPEND,
+	WMI_GRP_BCN_FILTER,
+	WMI_GRP_WOW,
+	WMI_GRP_RTT,
+	WMI_GRP_SPECTRAL,
+	WMI_GRP_STATS,
+	WMI_GRP_ARP_NS_OFL,
+	WMI_GRP_NLO_OFL,
+	WMI_GRP_GTK_OFL,
+	WMI_GRP_CSA_OFL,
+	WMI_GRP_CHATTER,
+	WMI_GRP_TID_ADDBA,
+	WMI_GRP_MISC,
+	WMI_GRP_GPIO,
+	WMI_GRP_FWTEST,
+	WMI_GRP_TDLS,
+	WMI_GRP_RESMGR,
+	WMI_GRP_STA_SMPS,
+	WMI_GRP_WLAN_HB,
+	WMI_GRP_RMC,
+	WMI_GRP_MHF_OFL,
+	WMI_GRP_LOCATION_SCAN,
+	WMI_GRP_OEM,
+	WMI_GRP_NAN,
+	WMI_GRP_COEX,
+	WMI_GRP_OBSS_OFL,
+	WMI_GRP_LPI,
+	WMI_GRP_EXTSCAN,
+	WMI_GRP_DHCP_OFL,
+	WMI_GRP_IPA,
+	WMI_GRP_MDNS_OFL,
+	WMI_GRP_SAP_OFL,
+	WMI_GRP_OCB,
+	WMI_GRP_SOC,
+	WMI_GRP_PKT_FILTER,
+	WMI_GRP_MAWC,
+	WMI_GRP_PMF_OFFLOAD,
+} WMI_GRP_ID;
+
+#define WMI_CMD_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
+#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
+
+/**
+ * Command IDs and commange events
+ */
+typedef enum {
+	/** initialize the wlan sub system */
+	WMI_INIT_CMDID = 0x1,
+
+	/* Scan specific commands */
+
+	/** start scan request to FW  */
+	WMI_START_SCAN_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_SCAN),
+	/** stop scan request to FW  */
+	WMI_STOP_SCAN_CMDID,
+	/** full list of channels as defined by the regulatory that will be used by scanner   */
+	WMI_SCAN_CHAN_LIST_CMDID,
+	/** overwrite default priority table in scan scheduler   */
+	WMI_SCAN_SCH_PRIO_TBL_CMDID,
+	/** This command to adjust the priority and min.max_rest_time
+	 * of an on ongoing scan request.
+	 */
+	WMI_SCAN_UPDATE_REQUEST_CMDID,
+
+	/** set OUI to be used in probe request if enabled */
+	WMI_SCAN_PROB_REQ_OUI_CMDID,
+
+	/* PDEV(physical device) specific commands */
+	/** set regulatorty ctl id used by FW to determine the exact ctl power limits */
+	WMI_PDEV_SET_REGDOMAIN_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_PDEV),
+	/** set channel. mainly used for supporting monitor mode */
+	WMI_PDEV_SET_CHANNEL_CMDID,
+	/** set pdev specific parameters */
+	WMI_PDEV_SET_PARAM_CMDID,
+	/** enable packet log */
+	WMI_PDEV_PKTLOG_ENABLE_CMDID,
+	/** disable packet log*/
+	WMI_PDEV_PKTLOG_DISABLE_CMDID,
+	/** set wmm parameters */
+	WMI_PDEV_SET_WMM_PARAMS_CMDID,
+	/** set HT cap ie that needs to be carried probe requests HT/VHT channels */
+	WMI_PDEV_SET_HT_CAP_IE_CMDID,
+	/** set VHT cap ie that needs to be carried on probe requests on VHT channels */
+	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
+
+	/** Command to send the DSCP-to-TID map to the target */
+	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
+	/** set quiet ie parameters. primarily used in AP mode */
+	WMI_PDEV_SET_QUIET_MODE_CMDID,
+	/** Enable/Disable Green AP Power Save  */
+	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
+	/** get TPC config for the current operating channel */
+	WMI_PDEV_GET_TPC_CONFIG_CMDID,
+
+	/** set the base MAC address for the physical device before a VDEV is created.
+	 *  For firmware that doesn't support this feature and this command, the pdev
+	 *  MAC address will not be changed. */
+	WMI_PDEV_SET_BASE_MACADDR_CMDID,
+
+	/* eeprom content dump , the same to bdboard data */
+	WMI_PDEV_DUMP_CMDID,
+	/* set LED configuration  */
+	WMI_PDEV_SET_LED_CONFIG_CMDID,
+	/* Get Current temprature of chip in Celcius degree */
+	WMI_PDEV_GET_TEMPERATURE_CMDID,
+	/* Set LED flashing behavior  */
+	WMI_PDEV_SET_LED_FLASHING_CMDID,
+
+	/* VDEV(virtual device) specific commands */
+	/** vdev create */
+	WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_VDEV),
+	/** vdev delete */
+	WMI_VDEV_DELETE_CMDID,
+	/** vdev start request */
+	WMI_VDEV_START_REQUEST_CMDID,
+	/** vdev restart request (RX only, NO TX, used for CAC period)*/
+	WMI_VDEV_RESTART_REQUEST_CMDID,
+	/** vdev up request */
+	WMI_VDEV_UP_CMDID,
+	/** vdev stop request */
+	WMI_VDEV_STOP_CMDID,
+	/** vdev down request */
+	WMI_VDEV_DOWN_CMDID,
+	/* set a vdev param */
+	WMI_VDEV_SET_PARAM_CMDID,
+	/* set a key (used for setting per peer unicast and per vdev multicast) */
+	WMI_VDEV_INSTALL_KEY_CMDID,
+
+	/* wnm sleep mode command */
+	WMI_VDEV_WNM_SLEEPMODE_CMDID,
+	WMI_VDEV_WMM_ADDTS_CMDID,
+	WMI_VDEV_WMM_DELTS_CMDID,
+	WMI_VDEV_SET_WMM_PARAMS_CMDID,
+	WMI_VDEV_SET_GTX_PARAMS_CMDID,
+	WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
+
+	WMI_VDEV_PLMREQ_START_CMDID,
+	WMI_VDEV_PLMREQ_STOP_CMDID,
+	/* TSF timestamp action for specified vdev */
+	WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
+	/*
+	 * set the capabilties IE, e.g. for extended caps in probe
+	 * requests, assoc req etc for frames FW locally generates
+	 */
+	WMI_VDEV_SET_IE_CMDID,
+
+	/* peer specific commands */
+
+	/** create a peer */
+	WMI_PEER_CREATE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_PEER),
+	/** delete a peer */
+	WMI_PEER_DELETE_CMDID,
+	/** flush specific  tid queues of a peer */
+	WMI_PEER_FLUSH_TIDS_CMDID,
+	/** set a parameter of a peer */
+	WMI_PEER_SET_PARAM_CMDID,
+	/** set peer to associated state. will cary all parameters determined during assocication time */
+	WMI_PEER_ASSOC_CMDID,
+	/**add a wds  (4 address ) entry. used only for testing WDS feature on AP products */
+	WMI_PEER_ADD_WDS_ENTRY_CMDID,
+	/**remove wds  (4 address ) entry. used only for testing WDS feature on AP products */
+	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
+	/** set up mcast group infor for multicast to unicast conversion */
+	WMI_PEER_MCAST_GROUP_CMDID,
+	/** request peer info from FW. FW shall respond with PEER_INFO_EVENTID */
+	WMI_PEER_INFO_REQ_CMDID,
+
+	/** request the estimated link speed for the peer. FW shall respond with
+	 *  WMI_PEER_ESTIMATED_LINKSPEED_EVENTID.
+	 */
+	WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
+	/*
+	 * Set the conditions to report peer justified rate to driver
+	 * The justified rate means the the user-rate is justified by PER.
+	*/
+	WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
+	/* beacon/management specific commands */
+
+	/** transmit beacon by reference . used for transmitting beacon on low latency interface like pcie */
+	WMI_BCN_TX_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MGMT),
+	/** transmit beacon by value */
+	WMI_PDEV_SEND_BCN_CMDID,
+	/** set the beacon template. used in beacon offload mode to setup the
+	 *  the common beacon template with the FW to be used by FW to generate beacons */
+	WMI_BCN_TMPL_CMDID,
+	/** set beacon filter with FW */
+	WMI_BCN_FILTER_RX_CMDID,
+	/* enable/disable filtering of probe requests in the firmware */
+	WMI_PRB_REQ_FILTER_RX_CMDID,
+	/** transmit management frame by value. will be deprecated */
+	WMI_MGMT_TX_CMDID,
+	/** set the probe response template. used in beacon offload mode to setup the
+	 *  the common probe response template with the FW to be used by FW to generate
+	 *  probe responses */
+	WMI_PRB_TMPL_CMDID,
+	/** Transmit Mgmt frame by reference */
+	WMI_MGMT_TX_SEND_CMDID,
+
+	/** commands to directly control ba negotiation directly from host. only used in test mode */
+
+	/** turn off FW Auto addba mode and let host control addba */
+	WMI_ADDBA_CLEAR_RESP_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_BA_NEG),
+	/** send add ba request */
+	WMI_ADDBA_SEND_CMDID,
+	WMI_ADDBA_STATUS_CMDID,
+	/** send del ba */
+	WMI_DELBA_SEND_CMDID,
+	/** set add ba response will be used by FW to generate addba response*/
+	WMI_ADDBA_SET_RESP_CMDID,
+	/** send single VHT MPDU with AMSDU */
+	WMI_SEND_SINGLEAMSDU_CMDID,
+
+	/** Station power save specific config */
+	/** enable/disable station powersave */
+	WMI_STA_POWERSAVE_MODE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_STA_PS),
+	/** set station power save specific parameter */
+	WMI_STA_POWERSAVE_PARAM_CMDID,
+	/** set station mimo powersave mode */
+	WMI_STA_MIMO_PS_MODE_CMDID,
+
+	/** DFS-specific commands */
+	/** enable DFS (radar detection)*/
+	WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_DFS),
+	/** disable DFS (radar detection)*/
+	WMI_PDEV_DFS_DISABLE_CMDID,
+	/** enable DFS phyerr/parse filter offload */
+	WMI_DFS_PHYERR_FILTER_ENA_CMDID,
+	/** enable DFS phyerr/parse filter offload */
+	WMI_DFS_PHYERR_FILTER_DIS_CMDID,
+
+	/* Roaming specific  commands */
+	/** set roam scan mode */
+	WMI_ROAM_SCAN_MODE = WMI_CMD_GRP_START_ID(WMI_GRP_ROAM),
+	/** set roam scan rssi threshold below which roam scan is enabled  */
+	WMI_ROAM_SCAN_RSSI_THRESHOLD,
+	/** set roam scan period for periodic roam scan mode  */
+	WMI_ROAM_SCAN_PERIOD,
+	/** set roam scan trigger rssi change threshold   */
+	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
+	/** set roam AP profile   */
+	WMI_ROAM_AP_PROFILE,
+	/** set channel list for roam scans */
+	WMI_ROAM_CHAN_LIST,
+	/** Stop scan command */
+	WMI_ROAM_SCAN_CMD,
+	/** roaming sme offload sync complete */
+	WMI_ROAM_SYNCH_COMPLETE,
+	/** set ric request element for 11r roaming */
+	WMI_ROAM_SET_RIC_REQUEST_CMDID,
+	/** Invoke roaming forcefully */
+	WMI_ROAM_INVOKE_CMDID,
+	/** roaming filter cmd to allow further filtering of roaming candidate */
+	WMI_ROAM_FILTER_CMDID,
+	/** set gateway ip, mac and retries for subnet change detection */
+	WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
+	/** configure thresholds for MAWC */
+	WMI_ROAM_CONFIGURE_MAWC_CMDID,
+
+	/** offload scan specific commands */
+	/** set offload scan AP profile   */
+	WMI_OFL_SCAN_ADD_AP_PROFILE =
+		WMI_CMD_GRP_START_ID(WMI_GRP_OFL_SCAN),
+	/** remove offload scan AP profile   */
+	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
+	/** set offload scan period   */
+	WMI_OFL_SCAN_PERIOD,
+
+	/* P2P specific commands */
+	/**set P2P device info. FW will used by FW to create P2P IE to be carried in probe response
+	 * generated during p2p listen and for p2p discoverability  */
+	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP_START_ID(WMI_GRP_P2P),
+	/** enable/disable p2p discoverability on STA/AP VDEVs  */
+	WMI_P2P_DEV_SET_DISCOVERABILITY,
+	/** set p2p ie to be carried in beacons generated by FW for GO  */
+	WMI_P2P_GO_SET_BEACON_IE,
+	/** set p2p ie to be carried in probe response frames generated by FW for GO  */
+	WMI_P2P_GO_SET_PROBE_RESP_IE,
+	/** set the vendor specific p2p ie data. FW will use this to parse the P2P NoA
+	 *  attribute in the beacons/probe responses received.
+	 */
+	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
+	/** set the configure of p2p find offload */
+	WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
+	/** set the vendor specific p2p ie data for p2p find offload using */
+	WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
+	/** set the BSSID/device name pattern of p2p find offload */
+	WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
+	/** set OppPS related parameters **/
+	WMI_P2P_SET_OPPPS_PARAM_CMDID,
+
+	/** AP power save specific config */
+	/** set AP power save specific param */
+	WMI_AP_PS_PEER_PARAM_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_AP_PS),
+	/** set AP UAPSD coex pecific param */
+	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
+
+	/** set Enhanced Green AP param */
+	WMI_AP_PS_EGAP_PARAM_CMDID,
+
+	/** Rate-control specific commands */
+	WMI_PEER_RATE_RETRY_SCHED_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_RATE_CTRL),
+
+	/** WLAN Profiling commands. */
+	WMI_WLAN_PROFILE_TRIGGER_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_PROFILE),
+	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
+	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
+	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
+	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
+
+	/** Suspend resume command Ids */
+	WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_SUSPEND),
+	WMI_PDEV_RESUME_CMDID,
+
+	/* Beacon filter commands */
+	/** add a beacon filter */
+	WMI_ADD_BCN_FILTER_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_BCN_FILTER),
+	/** remove a  beacon filter */
+	WMI_RMV_BCN_FILTER_CMDID,
+
+	/* WOW Specific WMI commands */
+	/** add pattern for awake */
+	WMI_WOW_ADD_WAKE_PATTERN_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_WOW),
+	/** deleta a wake pattern */
+	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
+	/** enable/deisable wake event  */
+	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
+	/** enable WOW  */
+	WMI_WOW_ENABLE_CMDID,
+	/** host woke up from sleep event to FW. Generated in response to WOW Hardware event */
+	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
+	/* IOAC add keep alive cmd. */
+	WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
+	/* IOAC del keep alive cmd. */
+	WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
+	/* IOAC add pattern for awake */
+	WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
+	/* IOAC deleta a wake pattern */
+	WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
+	/* D0-WOW enable or disable cmd */
+	WMI_D0_WOW_ENABLE_DISABLE_CMDID,
+	/* enable extend WoW */
+	WMI_EXTWOW_ENABLE_CMDID,
+	/* Extend WoW command to configure app type1 parameter */
+	WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
+	/* Extend WoW command to configure app type2 parameter */
+	WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
+	/* enable ICMPv6 Network advertisement filtering */
+	WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
+	/*
+	 * Set a pattern to match UDP packet in WOW mode.
+	 * If match, construct a tx frame in a local buffer
+	 * to send through the peer AP to the entity in the
+	 * IP network that sent the UDP packet to this STA.
+	 */
+	WMI_WOW_UDP_SVC_OFLD_CMDID,
+
+	/* configure WOW host wakeup PIN pattern */
+	WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
+
+	/* RTT measurement related cmd */
+	/** request to make an RTT measurement */
+	WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_RTT),
+	/** request to report a tsf measurement */
+	WMI_RTT_TSF_CMDID,
+
+	/** spectral scan command */
+	/** configure spectral scan */
+	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_SPECTRAL),
+	/** enable/disable spectral scan and trigger */
+	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
+
+	/* F/W stats */
+	/** one time request for stats */
+	WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_STATS),
+	/** Push MCC Adaptive Scheduler Stats to Firmware */
+	WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
+	/** one time request for txrx stats */
+	WMI_REQUEST_STATS_EXT_CMDID,
+
+	/* Link Layer stats */
+	/** Request for link layer stats */
+	WMI_REQUEST_LINK_STATS_CMDID,
+	/** Request for setting params to link layer stats */
+	WMI_START_LINK_STATS_CMDID,
+	/** Request to clear stats*/
+	WMI_CLEAR_LINK_STATS_CMDID,
+
+	/** Request for getting the Firmware Memory Dump */
+	WMI_GET_FW_MEM_DUMP_CMDID,
+
+	/** Request to flush of the buffered debug messages */
+	WMI_DEBUG_MESG_FLUSH_CMDID,
+
+	/** Cmd to configure the verbose level */
+	WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
+
+	/** ARP OFFLOAD REQUEST*/
+	WMI_SET_ARP_NS_OFFLOAD_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_ARP_NS_OFL),
+
+	/** Proactive ARP Response Add Pattern Command*/
+	WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
+
+	/** Proactive ARP Response Del Pattern Command*/
+	WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
+
+	/** NS offload config*/
+	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_NLO_OFL),
+
+	/** APFIND Config */
+	WMI_APFIND_CMDID,
+
+	/** Passpoint list config */
+	WMI_PASSPOINT_LIST_CONFIG_CMDID,
+
+	/** configure supprssing parameters for MAWC */
+	WMI_NLO_CONFIGURE_MAWC_CMDID,
+
+	/* GTK offload Specific WMI commands */
+	WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_GTK_OFL),
+
+	/* CSA offload Specific WMI commands */
+	/** csa offload enable */
+	WMI_CSA_OFFLOAD_ENABLE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_CSA_OFL),
+	/** chan switch command */
+	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
+
+	/* Chatter commands */
+	/* Change chatter mode of operation */
+	WMI_CHATTER_SET_MODE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_CHATTER),
+	/** chatter add coalescing filter command */
+	WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
+	/** chatter delete coalescing filter command */
+	WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
+	/** chatter coalecing query command */
+	WMI_CHATTER_COALESCING_QUERY_CMDID,
+
+	/**addba specific commands */
+	/** start the aggregation on this TID */
+	WMI_PEER_TID_ADDBA_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_TID_ADDBA),
+	/** stop the aggregation on this TID */
+	WMI_PEER_TID_DELBA_CMDID,
+
+	/** set station mimo powersave method */
+	WMI_STA_DTIM_PS_METHOD_CMDID,
+	/** Configure the Station UAPSD AC Auto Trigger Parameters */
+	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
+	/** Configure the Keep Alive Parameters */
+	WMI_STA_KEEPALIVE_CMDID,
+
+	/* Request ssn from target for a sta/tid pair */
+	WMI_BA_REQ_SSN_CMDID,
+	/* misc command group */
+	/** echo command mainly used for testing */
+	WMI_ECHO_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MISC),
+
+	/* !!IMPORTANT!!
+	 * If you need to add a new WMI command to the WMI_GRP_MISC sub-group,
+	 * please make sure you add it BEHIND WMI_PDEV_UTF_CMDID,
+	 * as we MUST have a fixed value here to maintain compatibility between
+	 * UTF and the ART2 driver
+	 */
+	/** UTF WMI commands */
+	WMI_PDEV_UTF_CMDID,
+
+	/** set debug log config */
+	WMI_DBGLOG_CFG_CMDID,
+	/* QVIT specific command id */
+	WMI_PDEV_QVIT_CMDID,
+	/* Factory Testing Mode request command
+	 * used for integrated chipsets */
+	WMI_PDEV_FTM_INTG_CMDID,
+	/* set and get keepalive parameters command */
+	WMI_VDEV_SET_KEEPALIVE_CMDID,
+	WMI_VDEV_GET_KEEPALIVE_CMDID,
+	/* For fw recovery test command */
+	WMI_FORCE_FW_HANG_CMDID,
+	/* Set Mcast/Bdcast filter */
+	WMI_SET_MCASTBCAST_FILTER_CMDID,
+	/** set thermal management params **/
+	WMI_THERMAL_MGMT_CMDID,
+	/** set host auto shutdown params **/
+	WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
+	/** set tpc chainmask config command */
+	WMI_TPC_CHAINMASK_CONFIG_CMDID,
+	/** set Antenna diversity command */
+	WMI_SET_ANTENNA_DIVERSITY_CMDID,
+	/** Set OCB Sched Request, deprecated */
+	WMI_OCB_SET_SCHED_CMDID,
+	/* Set rssi monitoring config command */
+	WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
+	/* Enable/disable Large Receive Offload processing;
+	 * provide cfg params */
+	WMI_LRO_CONFIG_CMDID,
+	/* GPIO Configuration */
+	WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_GPIO),
+	WMI_GPIO_OUTPUT_CMDID,
+
+	/* Txbf configuration command */
+	WMI_TXBF_CMDID,
+
+	/* FWTEST Commands */
+	WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_FWTEST),
+	/** set NoA descs **/
+	WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
+	/* UNIT Tests  */
+	WMI_UNIT_TEST_CMDID,
+
+	/** TDLS Configuration */
+	/** enable/disable TDLS */
+	WMI_TDLS_SET_STATE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_TDLS),
+	/** set tdls peer state */
+	WMI_TDLS_PEER_UPDATE_CMDID,
+	/** TDLS Offchannel control */
+	WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
+
+	/** Resmgr Configuration */
+	/** Adaptive OCS is enabled by default in the FW. This command is used to
+	 * disable FW based adaptive OCS.
+	 */
+	WMI_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_RESMGR),
+	/** set the requested channel time quota for the home channels */
+	WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
+	/** set the requested latency for the home channels */
+	WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
+
+	/** STA SMPS Configuration */
+	/** force SMPS mode */
+	WMI_STA_SMPS_FORCE_MODE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_STA_SMPS),
+	/** set SMPS parameters */
+	WMI_STA_SMPS_PARAM_CMDID,
+
+	/* Wlan HB commands */
+	/* enalbe/disable wlan HB */
+	WMI_HB_SET_ENABLE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_WLAN_HB),
+	/* set tcp parameters for wlan HB */
+	WMI_HB_SET_TCP_PARAMS_CMDID,
+	/* set tcp pkt filter for wlan HB */
+	WMI_HB_SET_TCP_PKT_FILTER_CMDID,
+	/* set udp parameters for wlan HB */
+	WMI_HB_SET_UDP_PARAMS_CMDID,
+	/* set udp pkt filter for wlan HB */
+	WMI_HB_SET_UDP_PKT_FILTER_CMDID,
+
+	/** Wlan RMC commands*/
+	/** enable/disable RMC */
+	WMI_RMC_SET_MODE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_RMC),
+	/** configure action frame period */
+	WMI_RMC_SET_ACTION_PERIOD_CMDID,
+	/** For debug/future enhancement purposes only,
+	 *  configures/finetunes RMC algorithms */
+	WMI_RMC_CONFIG_CMDID,
+
+	/** WLAN MHF offload commands */
+	/** enable/disable MHF offload */
+	WMI_MHF_OFFLOAD_SET_MODE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_MHF_OFL),
+	/** Plumb routing table for MHF offload */
+	WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
+
+	/*location scan commands */
+	/*start batch scan */
+	WMI_BATCH_SCAN_ENABLE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_LOCATION_SCAN),
+	/*stop batch scan */
+	WMI_BATCH_SCAN_DISABLE_CMDID,
+	/*get batch scan result */
+	WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
+	/* OEM related cmd */
+	WMI_OEM_REQ_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_OEM),
+
+	/** Nan Request */
+	WMI_NAN_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_NAN),
+
+	/** Modem power state command */
+	WMI_MODEM_POWER_STATE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_COEX),
+	WMI_CHAN_AVOID_UPDATE_CMDID,
+
+	/**
+	 *  OBSS scan offload enable/disable commands
+	 *  OBSS scan enable CMD will send to FW after VDEV UP, if these conditions are true:
+	 *  1.  WMI_SERVICE_OBSS_SCAN is reported by FW in service ready,
+	 *  2.  STA connect to a 2.4Ghz ht20/ht40 AP,
+	 *  3.  AP enable 20/40 coexistence (OBSS_IE-74 can be found in beacon or association response)
+	 *  If OBSS parameters from beacon changed, also use enable CMD to update parameters.
+	 *  OBSS scan disable CMD will send to FW if have enabled when tearing down connection.
+	 */
+	WMI_OBSS_SCAN_ENABLE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_OBSS_OFL),
+	WMI_OBSS_SCAN_DISABLE_CMDID,
+
+	/**LPI commands*/
+	/**LPI mgmt snooping config command*/
+	WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_LPI),
+	/**LPI scan start command*/
+	WMI_LPI_START_SCAN_CMDID,
+	/**LPI scan stop command*/
+	WMI_LPI_STOP_SCAN_CMDID,
+
+	/** ExtScan commands */
+	WMI_EXTSCAN_START_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_EXTSCAN),
+	WMI_EXTSCAN_STOP_CMDID,
+	WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
+	WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
+	WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
+	WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
+	WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
+	WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
+	WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
+	WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
+
+	/** DHCP server offload commands */
+	WMI_SET_DHCP_SERVER_OFFLOAD_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_DHCP_OFL),
+
+	/** IPA Offload features related commands */
+	WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_IPA),
+
+	/** mDNS responder offload commands */
+	WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MDNS_OFL),
+	WMI_MDNS_SET_FQDN_CMDID,
+	WMI_MDNS_SET_RESPONSE_CMDID,
+	WMI_MDNS_GET_STATS_CMDID,
+
+	/* enable/disable AP Authentication offload */
+	WMI_SAP_OFL_ENABLE_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_SAP_OFL),
+	WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
+
+	/** Out-of-context-of-BSS (OCB) commands */
+	WMI_OCB_SET_CONFIG_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_OCB),
+	WMI_OCB_SET_UTC_TIME_CMDID,
+	WMI_OCB_START_TIMING_ADVERT_CMDID,
+	WMI_OCB_STOP_TIMING_ADVERT_CMDID,
+	WMI_OCB_GET_TSF_TIMER_CMDID,
+	WMI_DCC_GET_STATS_CMDID,
+	WMI_DCC_CLEAR_STATS_CMDID,
+	WMI_DCC_UPDATE_NDL_CMDID,
+	/* System-On-Chip commands */
+	WMI_SOC_SET_PCL_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_SOC),
+	WMI_SOC_SET_HW_MODE_CMDID,
+	WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
+	WMI_SOC_SET_ANTENNA_MODE_CMDID,
+
+	/* packet filter commands */
+	WMI_PACKET_FILTER_CONFIG_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_PKT_FILTER),
+	WMI_PACKET_FILTER_ENABLE_CMDID,
+	/** Motion Aided WiFi Connectivity (MAWC) commands */
+	WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MAWC),
+
+	/** WMI commands related to PMF 11w Offload */
+	WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID =
+		WMI_CMD_GRP_START_ID(WMI_GRP_PMF_OFFLOAD),
+
+} WMI_CMD_ID;
+
+typedef enum {
+	/** WMI service is ready; after this event WMI messages can be sent/received  */
+	WMI_SERVICE_READY_EVENTID = 0x1,
+	/** WMI is ready; after this event the wlan subsystem is initialized and can process commands. */
+	WMI_READY_EVENTID,
+
+	/** Scan specific events */
+	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
+
+	/* PDEV specific events */
+	/** TPC config for the current operating channel */
+	WMI_PDEV_TPC_CONFIG_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
+	/** Channel stats event    */
+	WMI_CHAN_INFO_EVENTID,
+
+	/** PHY Error specific WMI event */
+	WMI_PHYERR_EVENTID,
+
+	/** eeprom dump event  */
+	WMI_PDEV_DUMP_EVENTID,
+
+	/** traffic pause event */
+	WMI_TX_PAUSE_EVENTID,
+
+	/** DFS radar event  */
+	WMI_DFS_RADAR_EVENTID,
+
+	/** track L1SS entry and residency event */
+	WMI_PDEV_L1SS_TRACK_EVENTID,
+
+	/** Report current temprature of the chip in Celcius degree */
+	WMI_PDEV_TEMPERATURE_EVENTID,
+
+	/* Extension of WMI_SERVICE_READY msg with
+	 * extra target capability info
+	 */
+	WMI_SERVICE_READY_EXT_EVENTID,
+
+	/* VDEV specific events */
+	/** VDEV started event in response to VDEV_START request */
+	WMI_VDEV_START_RESP_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
+	/** vdev stopped event , generated in response to VDEV_STOP request */
+	WMI_VDEV_STOPPED_EVENTID,
+	/* Indicate the set key (used for setting per
+	 * peer unicast and per vdev multicast)
+	 * operation has completed */
+	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
+	/* NOTE: WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID would be deprecated. Please
+	   don't use this for any new implementations */
+	/* Firmware requests dynamic change to a specific beacon interval for a specific vdev ID in MCC scenario.
+	   This request is valid only for vdevs operating in soft AP or P2P GO mode */
+	WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
+
+	/* Return the TSF timestamp of specified vdev */
+	WMI_VDEV_TSF_REPORT_EVENTID,
+	/* peer  specific events */
+	/** FW reauet to kick out the station for reasons like inactivity,lack of response ..etc */
+	WMI_PEER_STA_KICKOUT_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
+
+	/** Peer Info Event with data_rate, rssi, tx_fail_cnt etc */
+	WMI_PEER_INFO_EVENTID,
+
+	/** Event indicating that TX fail count reaching threshold */
+	WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
+	/** Return the estimate link speed for the Peer specified in the
+	 * WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID command.
+	 */
+	WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
+	/* Return the peer state
+	 * WMI_PEER_SET_PARAM_CMDID, WMI_PEER_AUTHORIZE
+	 */
+	WMI_PEER_STATE_EVENTID,
+
+	/* Peer Assoc Conf event to confirm fw had received PEER_ASSOC_CMD.
+	 * After that, host will send Mx message.
+	 * Otherwise, host will pause any Mx(STA:M2/M4) message
+	 */
+	WMI_PEER_ASSOC_CONF_EVENTID,
+
+	/* beacon/mgmt specific events */
+	/** RX management frame. the entire frame is carried along with the event.  */
+	WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
+	/** software beacon alert event to Host requesting host to Queue a beacon for transmission
+	    use only in host beacon mode */
+	WMI_HOST_SWBA_EVENTID,
+	/** beacon tbtt offset event indicating the tsf offset of the tbtt from the theritical value.
+	    tbtt offset is normally 0 and will be non zero if there are multiple VDEVs operating in
+	    staggered beacon transmission mode */
+	WMI_TBTTOFFSET_UPDATE_EVENTID,
+
+	/** event after the first beacon is transmitted following
+	         a change in the template.*/
+	WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
+	/** event after the first probe response is transmitted following
+	         a change in the template.*/
+	WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
+	/** Event for Mgmt TX completion event */
+	WMI_MGMT_TX_COMPLETION_EVENTID,
+
+	/*ADDBA Related WMI Events */
+	/** Indication the completion of the prior
+	   WMI_PEER_TID_DELBA_CMDID(initiator) */
+	WMI_TX_DELBA_COMPLETE_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
+	/** Indication the completion of the prior
+	 *WMI_PEER_TID_ADDBA_CMDID(initiator) */
+	WMI_TX_ADDBA_COMPLETE_EVENTID,
+
+	/* Seq num returned from hw for a sta/tid pair */
+	WMI_BA_RSP_SSN_EVENTID,
+
+	/* Aggregation state requested by BTC */
+	WMI_AGGR_STATE_TRIG_EVENTID,
+
+	/** Roam event to trigger roaming on host */
+	WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
+
+	/** matching AP found from list of profiles */
+	WMI_PROFILE_MATCH,
+	/** roam synch event */
+	WMI_ROAM_SYNCH_EVENTID,
+
+	/** P2P disc found */
+	WMI_P2P_DISC_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_P2P),
+
+	/*send noa info to host when noa is changed for beacon tx offload enable */
+	WMI_P2P_NOA_EVENTID,
+
+	/** Send EGAP Info to host */
+	WMI_AP_PS_EGAP_INFO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_AP_PS),
+
+	/* send pdev resume event to host after pdev resume. */
+	WMI_PDEV_RESUME_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SUSPEND),
+
+	/** WOW wake up host event.generated in response to WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID.
+	    will cary wake reason */
+	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
+	WMI_D0_WOW_DISABLE_ACK_EVENTID,
+	WMI_WOW_INITIAL_WAKEUP_EVENTID,
+
+	/*RTT related event ID */
+	/** RTT measurement report */
+	WMI_RTT_MEASUREMENT_REPORT_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
+	/** TSF measurement report */
+	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
+	/** RTT error report */
+	WMI_RTT_ERROR_REPORT_EVENTID,
+	/*STATS specific events */
+	/** txrx stats event requested by host */
+	WMI_STATS_EXT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_STATS),
+	/** FW iface link stats Event  */
+	WMI_IFACE_LINK_STATS_EVENTID,
+	/** FW iface peer link stats Event  */
+	WMI_PEER_LINK_STATS_EVENTID,
+	/** FW Update radio stats Event  */
+	WMI_RADIO_LINK_STATS_EVENTID,
+	/**  Firmware memory dump Complete event*/
+	WMI_UPDATE_FW_MEM_DUMP_EVENTID,
+
+	/** Event indicating the DIAG logs/events supported by FW */
+	WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
+
+	/** NLO specific events */
+	/** NLO match event after the first match */
+	WMI_NLO_MATCH_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_NLO_OFL),
+
+	/** NLO scan complete event */
+	WMI_NLO_SCAN_COMPLETE_EVENTID,
+
+	/** APFIND specific events */
+	WMI_APFIND_EVENTID,
+
+	/** passpoint network match event */
+	WMI_PASSPOINT_MATCH_EVENTID,
+
+	/** GTK offload stautus event requested by host */
+	WMI_GTK_OFFLOAD_STATUS_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
+
+	/** GTK offload failed to rekey event */
+	WMI_GTK_REKEY_FAIL_EVENTID,
+	/* CSA IE received event */
+	WMI_CSA_HANDLING_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
+
+	/*chatter query reply event */
+	WMI_CHATTER_PC_QUERY_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_CHATTER),
+
+	/** echo event in response to echo command */
+	WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
+
+	/* !!IMPORTANT!!
+	 * If you need to add a new WMI event ID to the WMI_GRP_MISC sub-group,
+	 * please make sure you add it BEHIND WMI_PDEV_UTF_EVENTID,
+	 * as we MUST have a fixed value here to maintain compatibility between
+	 * UTF and the ART2 driver
+	 */
+	/** UTF specific WMI event */
+	WMI_PDEV_UTF_EVENTID,
+
+	/** event carries buffered debug messages  */
+	WMI_DEBUG_MESG_EVENTID,
+	/** FW stats(periodic or on shot)  */
+	WMI_UPDATE_STATS_EVENTID,
+	/** debug print message used for tracing FW code while debugging  */
+	WMI_DEBUG_PRINT_EVENTID,
+	/** DCS wlan or non-wlan interference event
+	 */
+	WMI_DCS_INTERFERENCE_EVENTID,
+	/** VI spoecific event  */
+	WMI_PDEV_QVIT_EVENTID,
+	/** FW code profile data in response to profile request  */
+	WMI_WLAN_PROFILE_DATA_EVENTID,
+	/* Factory Testing Mode request event
+	 * used for integrated chipsets */
+	WMI_PDEV_FTM_INTG_EVENTID,
+	/* avoid list of frequencies .
+	 */
+	WMI_WLAN_FREQ_AVOID_EVENTID,
+	/* Indicate the keepalive parameters */
+	WMI_VDEV_GET_KEEPALIVE_EVENTID,
+	/* Thermal Management event */
+	WMI_THERMAL_MGMT_EVENTID,
+
+	/* Container for QXDM/DIAG events */
+	WMI_DIAG_DATA_CONTAINER_EVENTID,
+
+	/* host auto shutdown event */
+	WMI_HOST_AUTO_SHUTDOWN_EVENTID,
+
+	/*update mib counters together with WMI_UPDATE_STATS_EVENTID */
+	WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
+
+	/*update ht/vht info based on vdev (rx and tx NSS and preamble) */
+	WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
+
+	WMI_DIAG_EVENTID,
+
+	/** Set OCB Sched Response, deprecated */
+	WMI_OCB_SET_SCHED_EVENTID,
+
+	/* event to indicate the flush of the buffered debug messages is complete*/
+	WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
+	/* event to report mix/max RSSI breach events */
+	WMI_RSSI_BREACH_EVENTID,
+
+	/* GPIO Event */
+	WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
+	/** upload H_CV info WMI event
+	 * to indicate uploaded H_CV info to host
+	 */
+	WMI_UPLOADH_EVENTID,
+
+	/** capture H info WMI event
+	 * to indicate captured H info to host
+	 */
+	WMI_CAPTUREH_EVENTID,
+	/* hw RFkill */
+	WMI_RFKILL_STATE_CHANGE_EVENTID,
+
+	/* TDLS Event */
+	WMI_TDLS_PEER_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_TDLS),
+
+	/*location scan event */
+	/*report the firmware's capability of batch scan */
+	WMI_BATCH_SCAN_ENABLED_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_LOCATION_SCAN),
+	/*batch scan result */
+	WMI_BATCH_SCAN_RESULT_EVENTID,
+	/* OEM Event */
+	WMI_OEM_CAPABILITY_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_OEM),
+	WMI_OEM_MEASUREMENT_REPORT_EVENTID,
+	WMI_OEM_ERROR_REPORT_EVENTID,
+
+	/* NAN Event */
+	WMI_NAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_NAN),
+
+	/* LPI Event */
+	WMI_LPI_RESULT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_LPI),
+	WMI_LPI_STATUS_EVENTID,
+	WMI_LPI_HANDOFF_EVENTID,
+
+	/* ExtScan events */
+	WMI_EXTSCAN_START_STOP_EVENTID =
+		WMI_EVT_GRP_START_ID(WMI_GRP_EXTSCAN),
+	WMI_EXTSCAN_OPERATION_EVENTID,
+	WMI_EXTSCAN_TABLE_USAGE_EVENTID,
+	WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
+	WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
+	WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
+	WMI_EXTSCAN_CAPABILITIES_EVENTID,
+	WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
+
+	/* mDNS offload events */
+	WMI_MDNS_STATS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MDNS_OFL),
+
+	/* SAP Authentication offload events */
+	WMI_SAP_OFL_ADD_STA_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SAP_OFL),
+	WMI_SAP_OFL_DEL_STA_EVENTID,
+
+	/** Out-of-context-of-bss (OCB) events */
+	WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_OCB),
+	WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
+	WMI_DCC_GET_STATS_RESP_EVENTID,
+	WMI_DCC_UPDATE_NDL_RESP_EVENTID,
+	WMI_DCC_STATS_EVENTID,
+	/* System-On-Chip events */
+	WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SOC),
+	WMI_SOC_HW_MODE_TRANSITION_EVENTID,
+	WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
+	/** Motion Aided WiFi Connectivity (MAWC) events */
+	WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MAWC),
+
+} WMI_EVT_ID;
+
+/* defines for OEM message sub-types */
+#define WMI_OEM_CAPABILITY_REQ     0x01
+#define WMI_OEM_CAPABILITY_RSP     0x02
+#define WMI_OEM_MEASUREMENT_REQ    0x03
+#define WMI_OEM_MEASUREMENT_RSP    0x04
+#define WMI_OEM_ERROR_REPORT_RSP   0x05
+#define WMI_OEM_NAN_MEAS_REQ       0x06
+#define WMI_OEM_NAN_MEAS_RSP       0x07
+#define WMI_OEM_NAN_PEER_INFO      0x08
+#define WMI_OEM_CONFIGURE_LCR      0x09
+#define WMI_OEM_CONFIGURE_LCI      0x0A
+
+/* below message subtype is internal to CLD. Target should
+ * never use internal response type
+ */
+#define WMI_OEM_INTERNAL_RSP       0xdeadbeef
+
+#define WMI_CHAN_LIST_TAG 0x1
+#define WMI_SSID_LIST_TAG 0x2
+#define WMI_BSSID_LIST_TAG 0x3
+#define WMI_IE_TAG 0x4
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_channel */
+	/** primary 20 MHz channel frequency in mhz */
+	A_UINT32 mhz;
+	/** Center frequency 1 in MHz*/
+	A_UINT32 band_center_freq1;
+	/** Center frequency 2 in MHz - valid only for 11acvht 80plus80 mode*/
+	A_UINT32 band_center_freq2;
+	/** channel info described below */
+	A_UINT32 info;
+	/** contains min power, max power, reg power and reg class id.  */
+	A_UINT32 reg_info_1;
+	/** contains antennamax */
+	A_UINT32 reg_info_2;
+} wmi_channel;
+
+typedef enum {
+	WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
+	WMI_CHANNEL_CHANGE_CAUSE_CSA,
+} wmi_channel_change_cause;
+
+/** channel info consists of 6 bits of channel mode */
+
+#define WMI_SET_CHANNEL_MODE(pwmi_channel,val) do { \
+		(pwmi_channel)->info &= 0xffffffc0;	       \
+		(pwmi_channel)->info |= (val);		       \
+} while(0)
+
+#define WMI_GET_CHANNEL_MODE(pwmi_channel) ((pwmi_channel)->info & 0x0000003f )
+
+#define WMI_CHAN_FLAG_HT40_PLUS   6
+#define WMI_CHAN_FLAG_PASSIVE     7
+#define WMI_CHAN_ADHOC_ALLOWED    8
+#define WMI_CHAN_AP_DISABLED      9
+#define WMI_CHAN_FLAG_DFS         10
+#define WMI_CHAN_FLAG_ALLOW_HT    11    /* HT is allowed on this channel */
+#define WMI_CHAN_FLAG_ALLOW_VHT   12    /* VHT is allowed on this channel */
+#define WMI_CHANNEL_CHANGE_CAUSE_CSA 13 /*Indicate reason for channel switch */
+#define WMI_CHAN_FLAG_HALF_RATE     14  /* Indicates half rate channel */
+#define WMI_CHAN_FLAG_QUARTER_RATE  15  /* Indicates quarter rate channel */
+
+#define WMI_SET_CHANNEL_FLAG(pwmi_channel,flag) do { \
+		(pwmi_channel)->info |=  (1 << flag);	   \
+} while(0)
+
+#define WMI_GET_CHANNEL_FLAG(pwmi_channel,flag)	  \
+	(((pwmi_channel)->info & (1 << flag)) >> flag)
+
+#define WMI_SET_CHANNEL_MIN_POWER(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_1 &= 0xffffff00;	    \
+		(pwmi_channel)->reg_info_1 |= (val&0xff);	    \
+} while(0)
+#define WMI_GET_CHANNEL_MIN_POWER(pwmi_channel) ((pwmi_channel)->reg_info_1 & 0xff )
+
+#define WMI_SET_CHANNEL_MAX_POWER(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_1 &= 0xffff00ff;	    \
+		(pwmi_channel)->reg_info_1 |= ((val&0xff) << 8);    \
+} while(0)
+#define WMI_GET_CHANNEL_MAX_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 8) & 0xff )
+
+#define WMI_SET_CHANNEL_REG_POWER(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_1 &= 0xff00ffff;	    \
+		(pwmi_channel)->reg_info_1 |= ((val&0xff) << 16);   \
+} while(0)
+#define WMI_GET_CHANNEL_REG_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 16) & 0xff )
+#define WMI_SET_CHANNEL_REG_CLASSID(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_1 &= 0x00ffffff;	      \
+		(pwmi_channel)->reg_info_1 |= ((val&0xff) << 24);     \
+} while(0)
+#define WMI_GET_CHANNEL_REG_CLASSID(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 24) & 0xff )
+
+#define WMI_SET_CHANNEL_ANTENNA_MAX(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_2 &= 0xffffff00;	      \
+		(pwmi_channel)->reg_info_2 |= (val&0xff);	      \
+} while(0)
+#define WMI_GET_CHANNEL_ANTENNA_MAX(pwmi_channel) ((pwmi_channel)->reg_info_2 & 0xff )
+
+/* max tx power is in 1 dBm units */
+#define WMI_SET_CHANNEL_MAX_TX_POWER(pwmi_channel,val) do { \
+		(pwmi_channel)->reg_info_2 &= 0xffff00ff;	       \
+		(pwmi_channel)->reg_info_2 |= ((val&0xff)<<8);	       \
+} while(0)
+#define WMI_GET_CHANNEL_MAX_TX_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_2)>>8) & 0xff )
+
+
+/** HT Capabilities*/
+#define WMI_HT_CAP_ENABLED                0x0001        /* HT Enabled/ disabled */
+#define WMI_HT_CAP_HT20_SGI               0x0002        /* Short Guard Interval with HT20 */
+#define WMI_HT_CAP_DYNAMIC_SMPS           0x0004        /* Dynamic MIMO powersave */
+#define WMI_HT_CAP_TX_STBC                0x0008        /* B3 TX STBC */
+#define WMI_HT_CAP_TX_STBC_MASK_SHIFT     3
+#define WMI_HT_CAP_RX_STBC                0x0030        /* B4-B5 RX STBC */
+#define WMI_HT_CAP_RX_STBC_MASK_SHIFT     4
+#define WMI_HT_CAP_LDPC                   0x0040        /* LDPC supported */
+#define WMI_HT_CAP_L_SIG_TXOP_PROT        0x0080        /* L-SIG TXOP Protection */
+#define WMI_HT_CAP_MPDU_DENSITY           0x0700        /* MPDU Density */
+#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
+#define WMI_HT_CAP_HT40_SGI               0x0800
+
+/* These macros should be used when we wish to advertise STBC support for
+ * only 1SS or 2SS or 3SS. */
+#define WMI_HT_CAP_RX_STBC_1SS            0x0010        /* B4-B5 RX STBC */
+#define WMI_HT_CAP_RX_STBC_2SS            0x0020        /* B4-B5 RX STBC */
+#define WMI_HT_CAP_RX_STBC_3SS            0x0030        /* B4-B5 RX STBC */
+
+#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED       | \
+				WMI_HT_CAP_HT20_SGI      | \
+				WMI_HT_CAP_HT40_SGI      | \
+				WMI_HT_CAP_TX_STBC       | \
+				WMI_HT_CAP_RX_STBC       | \
+				WMI_HT_CAP_LDPC)
+
+/* WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information
+   field. The fields not defined here are not supported, or reserved.
+   Do not change these masks and if you have to add new one follow the
+   bitmask as specified by 802.11ac draft.
+ */
+
+#define WMI_VHT_CAP_MAX_MPDU_LEN_7935            0x00000001
+#define WMI_VHT_CAP_MAX_MPDU_LEN_11454           0x00000002
+#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK            0x00000003
+#define WMI_VHT_CAP_CH_WIDTH_160MHZ              0x00000004
+#define WMI_VHT_CAP_CH_WIDTH_80P80_160MHZ        0x00000008
+#define WMI_VHT_CAP_RX_LDPC                      0x00000010
+#define WMI_VHT_CAP_SGI_80MHZ                    0x00000020
+#define WMI_VHT_CAP_SGI_160MHZ                   0x00000040
+#define WMI_VHT_CAP_TX_STBC                      0x00000080
+#define WMI_VHT_CAP_RX_STBC_MASK                 0x00000300
+#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT           8
+#define WMI_VHT_CAP_SU_BFORMER                   0x00000800
+#define WMI_VHT_CAP_SU_BFORMEE                   0x00001000
+#define WMI_VHT_CAP_MAX_CS_ANT_MASK              0x0000E000
+#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT        13
+#define WMI_VHT_CAP_MAX_SND_DIM_MASK             0x00070000
+#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT       16
+#define WMI_VHT_CAP_MU_BFORMER                   0x00080000
+#define WMI_VHT_CAP_MU_BFORMEE                   0x00100000
+#define WMI_VHT_CAP_TXOP_PS                      0x00200000
+#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP            0x03800000
+#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT      23
+#define WMI_VHT_CAP_RX_FIXED_ANT                 0x10000000
+#define WMI_VHT_CAP_TX_FIXED_ANT                 0x20000000
+
+/* TEMPORARY:
+ * Preserve the incorrect old name as an alias for the correct new name
+ * until all references to the old name have been removed from all hosts
+ * and targets.
+ */
+#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT
+
+/* These macros should be used when we wish to advertise STBC support for
+ * only 1SS or 2SS or 3SS. */
+#define WMI_VHT_CAP_RX_STBC_1SS 0x00000100
+#define WMI_VHT_CAP_RX_STBC_2SS 0x00000200
+#define WMI_VHT_CAP_RX_STBC_3SS 0x00000300
+
+/* TEMPORARY:
+ * Preserve the incorrect old name as an alias for the correct new name
+ * until all references to the old name have been removed from all hosts
+ * and targets.
+ */
+#define WMI_vHT_CAP_RX_STBC_3SS WMI_VHT_CAP_RX_STBC_3SS
+
+#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  |	\
+				 WMI_VHT_CAP_SGI_80MHZ           |	\
+				 WMI_VHT_CAP_TX_STBC             |	\
+				 WMI_VHT_CAP_RX_STBC_MASK        |	\
+				 WMI_VHT_CAP_RX_LDPC             |	\
+				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   |	\
+				 WMI_VHT_CAP_RX_FIXED_ANT        |	\
+				 WMI_VHT_CAP_TX_FIXED_ANT)
+
+/* Interested readers refer to Rx/Tx MCS Map definition as defined in
+   802.11ac
+ */
+#define WMI_VHT_MAX_MCS_4_SS_MASK(r,ss)      ((3 & (r)) << (((ss) - 1) << 1))
+#define WMI_VHT_MAX_SUPP_RATE_MASK           0x1fff0000
+#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT     16
+
+/* WMI_SYS_CAPS_* refer to the capabilities that system support
+ */
+#define WMI_SYS_CAP_ENABLE                       0x00000001
+#define WMI_SYS_CAP_TXPOWER                      0x00000002
+
+/*
+ * WMI Dual Band Simultaneous (DBS) hardware mode list bit-mask definitions.
+ * Bits 5:0 are reserved
+ */
+#define WMI_DBS_HW_MODE_MAC0_TX_STREAMS_BITPOS  (28)
+#define WMI_DBS_HW_MODE_MAC0_RX_STREAMS_BITPOS  (24)
+#define WMI_DBS_HW_MODE_MAC1_TX_STREAMS_BITPOS  (20)
+#define WMI_DBS_HW_MODE_MAC1_RX_STREAMS_BITPOS  (16)
+#define WMI_DBS_HW_MODE_MAC0_BANDWIDTH_BITPOS   (12)
+#define WMI_DBS_HW_MODE_MAC1_BANDWIDTH_BITPOS   (8)
+#define WMI_DBS_HW_MODE_DBS_MODE_BITPOS         (7)
+#define WMI_DBS_HW_MODE_AGILE_DFS_MODE_BITPOS   (6)
+
+#define WMI_DBS_HW_MODE_MAC0_TX_STREAMS_MASK    (0xf << WMI_DBS_HW_MODE_MAC0_TX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC0_RX_STREAMS_MASK    (0xf << WMI_DBS_HW_MODE_MAC0_RX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_TX_STREAMS_MASK    (0xf << WMI_DBS_HW_MODE_MAC1_TX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_RX_STREAMS_MASK    (0xf << WMI_DBS_HW_MODE_MAC1_RX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC0_BANDWIDTH_MASK     (0xf << WMI_DBS_HW_MODE_MAC0_BANDWIDTH_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_BANDWIDTH_MASK     (0xf << WMI_DBS_HW_MODE_MAC1_BANDWIDTH_BITPOS)
+#define WMI_DBS_HW_MODE_DBS_MODE_MASK           (0x1 << WMI_DBS_HW_MODE_DBS_MODE_BITPOS)
+#define WMI_DBS_HW_MODE_AGILE_DFS_MODE_MASK     (0x1 << WMI_DBS_HW_MODE_AGILE_DFS_MODE_BITPOS)
+
+#define WMI_DBS_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value)  \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value)  \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value)
+#define WMI_DBS_HW_MODE_DBS_MODE_SET(hw_mode, value)        \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_DBS_MODE_BITPOS, 1, value)
+#define WMI_DBS_HW_MODE_AGILE_DFS_SET(hw_mode, value)       \
+    WMI_SET_BITS(hw_mode, WMI_DBS_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value)
+
+#define WMI_DBS_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode)    \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC0_TX_STREAMS_MASK) >> WMI_DBS_HW_MODE_MAC0_TX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode)    \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC0_RX_STREAMS_MASK) >> WMI_DBS_HW_MODE_MAC0_RX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode)    \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC1_TX_STREAMS_MASK) >> WMI_DBS_HW_MODE_MAC1_TX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode)    \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC1_RX_STREAMS_MASK) >> WMI_DBS_HW_MODE_MAC1_RX_STREAMS_BITPOS)
+#define WMI_DBS_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode)     \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC0_BANDWIDTH_MASK) >> WMI_DBS_HW_MODE_MAC0_BANDWIDTH_BITPOS)
+#define WMI_DBS_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode)     \
+    ((hw_mode & WMI_DBS_HW_MODE_MAC1_BANDWIDTH_MASK) >> WMI_DBS_HW_MODE_MAC1_BANDWIDTH_BITPOS)
+#define WMI_DBS_HW_MODE_DBS_MODE_GET(hw_mode)           \
+    ((hw_mode & WMI_DBS_HW_MODE_DBS_MODE_MASK) >> WMI_DBS_HW_MODE_DBS_MODE_BITPOS)
+#define WMI_DBS_HW_MODE_AGILE_DFS_GET(hw_mode)          \
+    ((hw_mode & WMI_DBS_HW_MODE_AGILE_DFS_MODE_MASK) >> WMI_DBS_HW_MODE_AGILE_DFS_MODE_BITPOS)
+
+#define WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_BITPOS    (31)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_BITPOS   (30)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_BITPOS  (29)
+
+#define WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_MASK    (0x1 << WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_BITPOS)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_MASK   (0x1 << WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_BITPOS)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_MASK  (0x1 << WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_BITPOS)
+
+#define WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_SET(scan_cfg, value) \
+    WMI_SET_BITS(scan_cfg, WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_BITPOS, 1, value)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_SET(scan_cfg, value) \
+    WMI_SET_BITS(scan_cfg, WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_BITPOS, 1, value)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_SET(scan_cfg, value) \
+    WMI_SET_BITS(scan_cfg, WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_BITPOS, 1, value)
+
+#define WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_GET(scan_cfg)    \
+    ((scan_cfg & WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_MASK) >> WMI_DBS_CONC_SCAN_CFG_DBS_SCAN_BITPOS)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_GET(scan_cfg)    \
+    ((scan_cfg & WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_MASK) >> WMI_DBS_CONC_SCAN_CFG_AGILE_SCAN_BITPOS)
+#define WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_GET(scan_cfg)    \
+    ((scan_cfg & WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_MASK) >> WMI_DBS_CONC_SCAN_CFG_AGILE_DFS_SCAN_BITPOS)
+
+#define WMI_DBS_FW_MODE_CFG_DBS_BITPOS          (31)
+#define WMI_DBS_FW_MODE_CFG_AGILE_DFS_BITPOS    (30)
+
+#define WMI_DBS_FW_MODE_CFG_DBS_MASK          (0x1 << WMI_DBS_FW_MODE_CFG_DBS_BITPOS)
+#define WMI_DBS_FW_MODE_CFG_AGILE_DFS_MASK    (0x1 << WMI_DBS_FW_MODE_CFG_AGILE_DFS_BITPOS)
+
+#define WMI_DBS_FW_MODE_CFG_DBS_SET(fw_mode, value) \
+	WMI_SET_BITS(fw_mode, WMI_DBS_FW_MODE_CFG_DBS_BITPOS, 1, value)
+#define WMI_DBS_FW_MODE_CFG_AGILE_DFS_SET(fw_mode, value) \
+	WMI_SET_BITS(fw_mode, WMI_DBS_FW_MODE_CFG_AGILE_DFS_BITPOS, 1, value)
+
+#define WMI_DBS_FW_MODE_CFG_DBS_GET(fw_mode)    \
+	((fw_mode & WMI_DBS_FW_MODE_CFG_DBS_MASK) >> WMI_DBS_FW_MODE_CFG_DBS_BITPOS)
+#define WMI_DBS_FW_MODE_CFG_AGILE_DFS_GET(fw_mode)    \
+	((fw_mode & WMI_DBS_FW_MODE_CFG_AGILE_DFS_MASK) >> WMI_DBS_FW_MODE_CFG_AGILE_DFS_BITPOS)
+
+/** NOTE: This structure cannot be extended in the future without breaking WMI compatibility */
+typedef struct _wmi_abi_version {
+	A_UINT32 abi_version_0;
+	/** WMI Major and Minor versions */
+	A_UINT32 abi_version_1;
+	/** WMI change revision */
+	A_UINT32 abi_version_ns_0;
+	/** ABI version namespace first four dwords */
+	A_UINT32 abi_version_ns_1;
+	/** ABI version namespace second four dwords */
+	A_UINT32 abi_version_ns_2;
+	/** ABI version namespace third four dwords */
+	A_UINT32 abi_version_ns_3;
+	/** ABI version namespace fourth four dwords */
+} wmi_abi_version;
+
+/*
+ * maximum number of memroy requests allowed from FW.
+ */
+#define WMI_MAX_MEM_REQS 16
+
+/* !!NOTE!!:
+ * This HW_BD_INFO_SIZE cannot be changed without breaking compatibility.
+ * Please don't change it.
+ */
+#define HW_BD_INFO_SIZE       5
+
+/**
+ * The following struct holds optional payload for
+ * wmi_service_ready_event_fixed_param,e.g., 11ac pass some of the
+ * device capability to the host.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_SERVICE_READY_EVENT */
+	A_UINT32 fw_build_vers;         /* firmware build number */
+	wmi_abi_version fw_abi_vers;
+	A_UINT32 phy_capability;                /* WMI_PHY_CAPABILITY */
+	A_UINT32 max_frag_entry;                /* Maximum number of frag table entries that SW will populate less 1 */
+	A_UINT32 num_rf_chains;
+	/* The following field is only valid for service type WMI_SERVICE_11AC */
+	A_UINT32 ht_cap_info;           /* WMI HT Capability */
+	A_UINT32 vht_cap_info;          /* VHT capability info field of 802.11ac */
+	A_UINT32 vht_supp_mcs;          /* VHT Supported MCS Set field Rx/Tx same */
+	A_UINT32 hw_min_tx_power;
+	A_UINT32 hw_max_tx_power;
+	A_UINT32 sys_cap_info;
+	A_UINT32 min_pkt_size_enable;           /* Enterprise mode short pkt enable */
+	/** Max beacon and Probe Response IE offload size (includes
+	 *  optional P2P IEs) */
+	A_UINT32 max_bcn_ie_size;
+	/*
+	 * request to host to allocate a chuck of memory and pss it down to FW via WM_INIT.
+	 * FW uses this as FW extesnsion memory for saving its data structures. Only valid
+	 * for low latency interfaces like PCIE where FW can access this memory directly (or)
+	 * by DMA.
+	 */
+	A_UINT32 num_mem_reqs;
+	/* Max No. scan channels target can support
+	 * If FW is too old and doesn't indicate this number, host side value will default to
+	 * 0, and host will take the original compatible value (62) for future scan channel
+	 * setup.
+	 */
+	A_UINT32 max_num_scan_channels;
+
+	/* Hardware board specific ID. Values defined in enum WMI_HWBOARD_ID.
+	 * Default 0 means tha hw_bd_info[] is invalid(legacy board).
+	 */
+	A_UINT32 hw_bd_id;
+	A_UINT32 hw_bd_info[HW_BD_INFO_SIZE];           /* Board specific information. Invalid if hw_hd_id is zero. */
+
+	/*
+	 * Number of MACs supported, i.e. a DBS-capable device will return 2
+	 */
+	A_UINT32 max_supported_macs;
+
+	/*
+	 * FW sub-feature capabilities to be used in concurrence with
+	 * wmi_service_bitmap
+	 * values from enum WMI_FW_SUB_FEAT_CAPS
+	 */
+	A_UINT32 wmi_fw_sub_feat_caps;
+	/*
+	 * Number of Dual Band Simultaneous (DBS) hardware modes
+	 */
+	A_UINT32 num_dbs_hw_modes;
+	/*
+	 * txrx_chainmask
+	 *    [7:0]   - 2G band tx chain mask
+	 *    [15:8]  - 2G band rx chain mask
+	 *    [23:16] - 5G band tx chain mask
+	 *    [31:24] - 5G band rx chain mask
+	 *
+	 */
+	A_UINT32 txrx_chainmask;
+
+	/*
+	 * default Dual Band Simultaneous (DBS) hardware mode
+	 */
+	A_UINT32 default_dbs_hw_mode_index;
+
+	/*
+	 * Number of msdu descriptors target would use
+	 */
+	A_UINT32 num_msdu_desc;
+
+	/* The TLVs for hal_reg_capabilities, wmi_service_bitmap and mem_reqs[] will follow this TLV.
+	 *     HAL_REG_CAPABILITIES   hal_reg_capabilities;
+	 *     A_UINT32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
+	 *     wlan_host_mem_req mem_reqs[];
+	 *     wlan_dbs_hw_mode_list[];
+	 */
+} wmi_service_ready_event_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 *WMITLV_TAG_STRUC_WMI_SERVICE_EXT_READY_EVENT
+	 */
+	A_UINT32 tlv_header;
+	/* which WMI_DBS_CONC_SCAN_CFG setting the FW is initialized with */
+	A_UINT32 default_conc_scan_config_bits;
+	/* which WMI_DBS_FW_MODE_CFG setting the FW is initialized with */
+	A_UINT32 default_fw_config_bits;
+} wmi_service_ready_ext_event_fixed_param;
+
+typedef enum {
+	WMI_HWBD_NONE = 0,              /* No hw board information is given */
+	WMI_HWBD_QCA6174 = 1,           /* Rome(AR6320) */
+	WMI_HWBD_QCA2582 = 2,           /* Killer 1525 */
+} WMI_HWBD_ID;
+
+typedef enum {
+	WMI_FW_STA_RTT_INITR =     0x00000001,
+	WMI_FW_STA_RTT_RESPR =     0x00000002,
+	WMI_FW_P2P_CLI_RTT_INITR = 0x00000004,
+	WMI_FW_P2P_CLI_RTT_RESPR = 0x00000008,
+	WMI_FW_P2P_GO_RTT_INITR =  0x00000010,
+	WMI_FW_P2P_GO_RTT_RESPR =  0x00000020,
+	WMI_FW_AP_RTT_INITR =      0x00000040,
+	WMI_FW_AP_RTT_RESPR =      0x00000080,
+	WMI_FW_NAN_RTT_INITR =     0x00000100,
+	WMI_FW_NAN_RTT_RESPR =     0x00000200,
+	/*
+	 * New fw sub feature capabilites before
+	 * WMI_FW_MAX_SUB_FEAT_CAP
+	 */
+	WMI_FW_MAX_SUB_FEAT_CAP =  0x80000000,
+} WMI_FW_SUB_FEAT_CAPS;
+
+#define ATH_BD_DATA_REV_MASK            0x000000FF
+#define ATH_BD_DATA_REV_SHIFT           0
+
+#define ATH_BD_DATA_PROJ_ID_MASK        0x0000FF00
+#define ATH_BD_DATA_PROJ_ID_SHIFT       8
+
+#define ATH_BD_DATA_CUST_ID_MASK        0x00FF0000
+#define ATH_BD_DATA_CUST_ID_SHIFT       16
+
+#define ATH_BD_DATA_REF_DESIGN_ID_MASK  0xFF000000
+#define ATH_BD_DATA_REF_DESIGN_ID_SHIFT 24
+
+#define SET_BD_DATA_REV(bd_data_ver, value)	\
+	((bd_data_ver) &= ~ATH_BD_DATA_REV_MASK, (bd_data_ver) |= ((value) << ATH_BD_DATA_REV_SHIFT))
+
+#define GET_BD_DATA_REV(bd_data_ver)		\
+	(((bd_data_ver) & ATH_BD_DATA_REV_MASK) >> ATH_BD_DATA_REV_SHIFT)
+
+#define SET_BD_DATA_PROJ_ID(bd_data_ver, value)	\
+	((bd_data_ver) &= ~ATH_BD_DATA_PROJ_ID_MASK, (bd_data_ver) |= ((value) << ATH_BD_DATA_PROJ_ID_SHIFT))
+
+#define GET_BD_DATA_PROJ_ID(bd_data_ver)	\
+	(((bd_data_ver) & ATH_BD_DATA_PROJ_ID_MASK) >> ATH_BD_DATA_PROJ_ID_SHIFT)
+
+#define SET_BD_DATA_CUST_ID(bd_data_ver, value)	\
+	((bd_data_ver) &= ~ATH_BD_DATA_CUST_ID_MASK, (bd_data_ver) |= ((value) << ATH_BD_DATA_CUST_ID_SHIFT))
+
+#define GET_BD_DATA_CUST_ID(bd_data_ver)	\
+	(((bd_data_ver) & ATH_BD_DATA_CUST_ID_MASK) >> ATH_BD_DATA_CUST_ID_SHIFT)
+
+#define SET_BD_DATA_REF_DESIGN_ID(bd_data_ver, value)	\
+	((bd_data_ver) &= ~ATH_BD_DATA_REF_DESIGN_ID_MASK, (bd_data_ver) |= ((value) << ATH_BD_DATA_REF_DESIGN_ID_SHIFT))
+
+#define GET_BD_DATA_REF_DESIGN_ID(bd_data_ver)		\
+	(((bd_data_ver) & ATH_BD_DATA_REF_DESIGN_ID_MASK) >> ATH_BD_DATA_REF_DESIGN_ID_SHIFT)
+
+#ifdef ROME_LTE_COEX_FREQ_AVOID
+typedef struct {
+	A_UINT32 start_freq;            /* start frequency, not channel center freq */
+	A_UINT32 end_freq;              /* end frequency */
+} avoid_freq_range_desc;
+
+typedef struct {
+	/* bad channel range count, multi range is allowed, 0 means all channel clear */
+	A_UINT32 num_freq_ranges;
+	/* multi range with num_freq_ranges, LTE advance multi carrier, CDMA,etc */
+	avoid_freq_range_desc avd_freq_range[0];
+} wmi_wlan_avoid_freq_ranges_event;
+#endif
+
+/** status consists of  upper 16 bits fo A_STATUS status and lower 16 bits of module ID that retuned status */
+#define WLAN_INIT_STATUS_SUCCESS   0x0
+#define WLAN_INIT_STATUS_GEN_FAILED   0x1
+#define WLAN_GET_INIT_STATUS_REASON(status)    ((status) & 0xffff)
+#define WLAN_GET_INIT_STATUS_MODULE_ID(status) (((status) >> 16) & 0xffff)
+
+typedef A_UINT32 WLAN_INIT_STATUS;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ready_event_fixed_param */
+	wmi_abi_version fw_abi_vers;
+	wmi_mac_addr mac_addr;
+	A_UINT32 status;
+} wmi_ready_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_resource_config */
+/**
+ * @brief num_vdev - number of virtual devices (VAPs) to support
+ */
+	A_UINT32 num_vdevs;
+/**
+ * @brief num_peers - number of peer nodes to support
+ */
+	A_UINT32 num_peers;
+/*
+ * @brief In offload mode target supports features like WOW, chatter and other
+ * protocol offloads. In order to support them some functionalities like
+ * reorder buffering, PN checking need to be done in target. This determines
+ * maximum number of peers suported by target in offload mode
+ */
+	A_UINT32 num_offload_peers;
+/* @brief Number of reorder buffers available for doing target based reorder
+ * Rx reorder buffering
+ */
+	A_UINT32 num_offload_reorder_buffs;
+/**
+ * @brief num_peer_keys - number of keys per peer
+ */
+	A_UINT32 num_peer_keys;
+/**
+ * @brief num_peer_tids - number of TIDs to provide storage for per peer.
+ */
+	A_UINT32 num_tids;
+/**
+ * @brief ast_skid_limit - max skid for resolving hash collisions
+ * @details
+ *     The address search table is sparse, so that if two MAC addresses
+ *     result in the same hash value, the second of these conflicting
+ *     entries can slide to the next index in the address search table,
+ *     and use it, if it is unoccupied.  This ast_skid_limit parameter
+ *     specifies the upper bound on how many subsequent indices to search
+ *     over to find an unoccupied space.
+ */
+	A_UINT32 ast_skid_limit;
+/**
+ * @brief tx_chain_mask - the nominal chain mask for transmit
+ * @details
+ *     The chain mask may be modified dynamically, e.g. to operate AP tx with
+ *     a reduced number of chains if no clients are associated.
+ *     This configuration parameter specifies the nominal chain-mask that
+ *     should be used when not operating with a reduced set of tx chains.
+ */
+	A_UINT32 tx_chain_mask;
+/**
+ * @brief rx_chain_mask - the nominal chain mask for receive
+ * @details
+ *     The chain mask may be modified dynamically, e.g. for a client to use
+ *     a reduced number of chains for receive if the traffic to the client
+ *     is low enough that it doesn't require downlink MIMO or antenna
+ *     diversity.
+ *     This configuration parameter specifies the nominal chain-mask that
+ *     should be used when not operating with a reduced set of rx chains.
+ */
+	A_UINT32 rx_chain_mask;
+/**
+ * @brief rx_timeout_pri - what rx reorder timeout (ms) to use for the AC
+ * @details
+ *     Each WMM access class (voice, video, best-effort, background) will
+ *     have its own timeout value to dictate how long to wait for missing
+ *     rx MPDUs to arrive before flushing subsequent MPDUs that have already
+ *     been received.
+ *     This parameter specifies the timeout in milliseconds for each class .
+ *     NOTE: the number of class (defined as 4) cannot be
+ *     changed in the future without breaking WMI compatibility.
+ */
+	A_UINT32 rx_timeout_pri[4];
+/**
+ * @brief rx_decap mode - what mode the rx should decap packets to
+ * @details
+ *     MAC can decap to RAW (no decap), native wifi or Ethernet types
+ *     THis setting also determines the default TX behavior, however TX
+ *     behavior can be modified on a per VAP basis during VAP init
+ */
+	A_UINT32 rx_decap_mode;
+	/**
+	 * @brief  scan_max_pending_req - what is the maximum scan requests than can be queued
+	 */
+	A_UINT32 scan_max_pending_req;
+
+	/**
+	 * @brief maximum VDEV that could use BMISS offload
+	 */
+	A_UINT32 bmiss_offload_max_vdev;
+
+	/**
+	 * @brief maximum VDEV that could use offload roaming
+	 */
+	A_UINT32 roam_offload_max_vdev;
+
+	/**
+	 * @brief maximum AP profiles that would push to offload roaming
+	 */
+	A_UINT32 roam_offload_max_ap_profiles;
+
+/**
+ * @brief num_mcast_groups - how many groups to use for mcast->ucast conversion
+ * @details
+ *     The target's WAL maintains a table to hold information regarding which
+ *     peers belong to a given multicast group, so that if multicast->unicast
+ *     conversion is enabled, the target can convert multicast tx frames to a
+ *     series of unicast tx frames, to each peer within the multicast group.
+ *     This num_mcast_groups configuration parameter tells the target how
+ *     many multicast groups to provide storage for within its multicast
+ *     group membership table.
+ */
+	A_UINT32 num_mcast_groups;
+
+/**
+ * @brief num_mcast_table_elems - size to alloc for the mcast membership table
+ * @details
+ *     This num_mcast_table_elems configuration parameter tells the target
+ *     how many peer elements it needs to provide storage for in its
+ *     multicast group membership table.
+ *     These multicast group membership table elements are shared by the
+ *     multicast groups stored within the table.
+ */
+	A_UINT32 num_mcast_table_elems;
+
+/**
+ * @brief mcast2ucast_mode - whether/how to do multicast->unicast conversion
+ * @details
+ *     This configuration parameter specifies whether the target should
+ *     perform multicast --> unicast conversion on transmit, and if so,
+ *     what to do if it finds no entries in its multicast group membership
+ *     table for the multicast IP address in the tx frame.
+ *     Configuration value:
+ *     0 -> Do not perform multicast to unicast conversion.
+ *     1 -> Convert multicast frames to unicast, if the IP multicast address
+ *          from the tx frame is found in the multicast group membership
+ *          table.  If the IP multicast address is not found, drop the frame.
+ *     2 -> Convert multicast frames to unicast, if the IP multicast address
+ *          from the tx frame is found in the multicast group membership
+ *          table.  If the IP multicast address is not found, transmit the
+ *          frame as multicast.
+ */
+	A_UINT32 mcast2ucast_mode;
+
+	/**
+	 * @brief tx_dbg_log_size - how much memory to allocate for a tx PPDU dbg log
+	 * @details
+	 *     This parameter controls how much memory the target will allocate to
+	 *     store a log of tx PPDU meta-information (how large the PPDU was,
+	 *     when it was sent, whether it was successful, etc.)
+	 */
+	A_UINT32 tx_dbg_log_size;
+
+	/**
+	 * @brief num_wds_entries - how many AST entries to be allocated for WDS
+	 */
+	A_UINT32 num_wds_entries;
+
+	/**
+	 * @brief dma_burst_size - MAC DMA burst size, e.g., on Peregrine on PCI
+	 * this limit can be 0 -default, 1 256B
+	 */
+	A_UINT32 dma_burst_size;
+
+	/**
+	 * @brief mac_aggr_delim - Fixed delimiters to be inserted after every MPDU
+	 * to account for interface latency to avoid underrun.
+	 */
+	A_UINT32 mac_aggr_delim;
+	/**
+	 * @brief rx_skip_defrag_timeout_dup_detection_check
+	 * @details
+	 *  determine whether target is responsible for detecting duplicate
+	 *  non-aggregate MPDU and timing out stale fragments.
+	 *
+	 *  A-MPDU reordering is always performed on the target.
+	 *
+	 *  0: target responsible for frag timeout and dup checking
+	 *  1: host responsible for frag timeout and dup checking
+	 */
+	A_UINT32 rx_skip_defrag_timeout_dup_detection_check;
+
+	/**
+	 * @brief vow_config - Configuration for VoW : No of Video Nodes to be supported
+	 * and Max no of descriptors for each Video link (node).
+	 */
+	A_UINT32 vow_config;
+
+	/**
+	 * @brief maximum VDEV that could use GTK offload
+	 */
+	A_UINT32 gtk_offload_max_vdev;
+
+	/**
+	 * @brief num_msdu_desc - Number of msdu descriptors target should use
+	 */
+	A_UINT32 num_msdu_desc;         /* Number of msdu desc */
+	/**
+	 * @brief max_frag_entry - Max. number of Tx fragments per MSDU
+	 * @details
+	 *     This parameter controls the max number of Tx fragments per MSDU.
+	 *     This is sent by the target as part of the WMI_SERVICE_READY event
+	 *     and is overriden by the OS shim as required.
+	 */
+	A_UINT32 max_frag_entries;
+
+	/**
+	 * @brief num_tdls_vdevs - Max. number of vdevs that can support TDLS
+	 * @brief num_msdu_desc - Number of vdev that can support beacon offload
+	 */
+
+	A_UINT32 num_tdls_vdevs;                /* number of vdevs allowed to do tdls */
+
+	/**
+	 * @brief num_tdls_conn_table_entries - Number of peers tracked by tdls vdev
+	 * @details
+	 *      Each TDLS enabled vdev can track outgoing transmits/rssi/rates to/of
+	 *      peers in a connection tracking table for possible TDLS link creation
+	 *      or deletion. This controls the number of tracked peers per vdev.
+	 */
+	A_UINT32 num_tdls_conn_table_entries;           /* number of peers to track per TDLS vdev */
+	A_UINT32 beacon_tx_offload_max_vdev;
+	A_UINT32 num_multicast_filter_entries;
+	A_UINT32 num_wow_filters;               /*host can configure the number of wow filters */
+
+	/**
+	 * @brief num_keep_alive_pattern - Num of keep alive patterns configured
+	 * from host.
+	 */
+	A_UINT32 num_keep_alive_pattern;
+	/**
+	 * @brief keep_alive_pattern_size - keep alive pattern size.
+	 */
+	A_UINT32 keep_alive_pattern_size;
+
+	/**
+	 * @brief max_tdls_concurrent_sleep_sta - Number of tdls sleep sta supported
+	 * @details
+	 *      Each TDLS STA can become a sleep STA independently. This parameter
+	 *      mentions how many such sleep STAs can be supported concurrently.
+	 */
+	A_UINT32 max_tdls_concurrent_sleep_sta;
+
+	/**
+	 * @brief max_tdls_concurrent_buffer_sta - Number of tdls buffer sta supported
+	 * @details
+	 *      Each TDLS STA can become a buffer STA independently. This parameter
+	 *      mentions how many such buffer STAs can be supported concurrently.
+	 */
+	A_UINT32 max_tdls_concurrent_buffer_sta;
+
+	/**
+	 * @brief wmi_send_separate - host configures fw to send the wmi separately
+	 */
+	A_UINT32 wmi_send_separate;
+
+	/**
+	 * @brief num_ocb_vdevs - Number of vdevs used for OCB support
+	 */
+	A_UINT32 num_ocb_vdevs;
+
+	/**
+	 * @brief num_ocb_channels - The supported number of simultaneous OCB channels
+	 */
+	A_UINT32 num_ocb_channels;
+
+	/**
+	 * @brief num_ocb_schedules - The supported number of OCB schedule segments
+	 */
+	A_UINT32 num_ocb_schedules;
+} wmi_resource_config;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_init_cmd_fixed_param */
+
+	/** The following indicate the WMI versions to be supported by
+	 *  the host driver. Note that the host driver decide to
+	 *  "downgrade" its WMI version support and this may not be the
+	 *  native version of the host driver. */
+	wmi_abi_version host_abi_vers;
+
+	A_UINT32 num_host_mem_chunks;
+	/** size of array host_mem_chunks[] */
+	/* The TLVs for resource_config and host_mem_chunks[] will follow.
+	 *     wmi_resource_config   resource_config;
+	 *     wlan_host_memory_chunk host_mem_chunks[];
+	 */
+
+} wmi_init_cmd_fixed_param;
+
+/**
+ * TLV for channel list
+ */
+typedef struct {
+	/** WMI_CHAN_LIST_TAG */
+	A_UINT32 tag;
+	/** # of channels to scan */
+	A_UINT32 num_chan;
+	/** channels in Mhz */
+	A_UINT32 channel_list[1];
+} wmi_chan_list;
+
+/**
+ * TLV for bssid list
+ */
+typedef struct {
+	/** WMI_BSSID_LIST_TAG */
+	A_UINT32 tag;
+	/** number of bssids   */
+	A_UINT32 num_bssid;
+	/** bssid list         */
+	wmi_mac_addr bssid_list[1];
+} wmi_bssid_list;
+
+/**
+ * TLV for  ie data.
+ */
+typedef struct {
+	/** WMI_IE_TAG */
+	A_UINT32 tag;
+	/** number of bytes in ie data   */
+	A_UINT32 ie_len;
+	/** ie data array  (ie_len adjusted to  number of words  (ie_len + 4)/4 )  */
+	A_UINT32 ie_data[1];
+} wmi_ie_data;
+
+typedef struct {
+	/** Len of the SSID */
+	A_UINT32 ssid_len;
+	/** SSID */
+	A_UINT32 ssid[8];
+} wmi_ssid;
+
+typedef struct {
+	/** WMI_SSID_LIST_TAG */
+	A_UINT32 tag;
+	A_UINT32 num_ssids;
+	wmi_ssid ssids[1];
+} wmi_ssid_list;
+
+/* prefix used by scan requestor ids on the host */
+#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
+/* prefix used by scan request ids generated on the host */
+/* host cycles through the lower 12 bits to generate ids */
+#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
+
+#define WLAN_SCAN_PARAMS_MAX_SSID    16
+#define WLAN_SCAN_PARAMS_MAX_BSSID   4
+#define WLAN_SCAN_PARAMS_MAX_IE_LEN  512
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_start_scan_cmd_fixed_param */
+	/** Scan ID */
+	A_UINT32 scan_id;
+	/** Scan requestor ID */
+	A_UINT32 scan_req_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** Scan Priority, input to scan scheduler */
+	A_UINT32 scan_priority;
+	/** Scan events subscription */
+	A_UINT32 notify_scan_events;
+	/** dwell time in msec on active channels */
+	A_UINT32 dwell_time_active;
+	/** dwell time in msec on passive channels */
+	A_UINT32 dwell_time_passive;
+	/** min time in msec on the BSS channel,only valid if atleast one VDEV is active*/
+	A_UINT32 min_rest_time;
+	/** max rest time in msec on the BSS channel,only valid if at least one VDEV is active*/
+	/** the scanner will rest on the bss channel at least min_rest_time. after min_rest_time the scanner
+	 *  will start checking for tx/rx activity on all VDEVs. if there is no activity the scanner will
+	 *  switch to off channel. if there is activity the scanner will let the radio on the bss channel
+	 *  until max_rest_time expires.at max_rest_time scanner will switch to off channel
+	 *  irrespective of activity. activity is determined by the idle_time parameter.
+	 */
+	A_UINT32 max_rest_time;
+	/** time before sending next set of probe requests.
+	 *   The scanner keeps repeating probe requests transmission with period specified by repeat_probe_time.
+	 *   The number of probe requests specified depends on the ssid_list and bssid_list
+	 */
+	A_UINT32 repeat_probe_time;
+	/** time in msec between 2 consequetive probe requests with in a set. */
+	A_UINT32 probe_spacing_time;
+	/** data inactivity time in msec on bss channel that will be used by scanner for measuring the inactivity  */
+	A_UINT32 idle_time;
+	/** maximum time in msec allowed for scan  */
+	A_UINT32 max_scan_time;
+	/** delay in msec before sending first probe request after switching to a channel */
+	A_UINT32 probe_delay;
+	/** Scan control flags */
+	A_UINT32 scan_ctrl_flags;
+	/** Burst duration time in msec*/
+	A_UINT32 burst_duration;
+
+	/** # if channels to scan. In the TLV channel_list[] */
+	A_UINT32 num_chan;
+	/** number of bssids. In the TLV bssid_list[] */
+	A_UINT32 num_bssid;
+	/** number of ssid. In the TLV ssid_list[] */
+	A_UINT32 num_ssids;
+	/** number of bytes in ie data. In the TLV ie_data[].  Max len is defined by WLAN_SCAN_PARAMS_MAX_IE_LEN */
+	A_UINT32 ie_len;
+	/** Max number of probes to be sent */
+	A_UINT32 n_probes;
+
+	/**
+	 * TLV (tag length value ) parameters follow the scan_cmd
+	 * structure. The TLV's are:
+	 *     A_UINT32 channel_list[];
+	 *     wmi_ssid ssid_list[];
+	 *     wmi_mac_addr bssid_list[];
+	 *     A_UINT8 ie_data[];
+	 */
+} wmi_start_scan_cmd_fixed_param;
+
+/**
+ * scan control flags.
+ */
+
+/** passively scan all channels including active channels */
+#define WMI_SCAN_FLAG_PASSIVE        0x1
+/** add wild card ssid probe request even though ssid_list is specified. */
+#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
+/** add cck rates to rates/xrate ie for the generated probe request */
+#define WMI_SCAN_ADD_CCK_RATES       0x4
+/** add ofdm rates to rates/xrate ie for the generated probe request */
+#define WMI_SCAN_ADD_OFDM_RATES      0x8
+/** To enable indication of Chan load and Noise floor to host */
+#define WMI_SCAN_CHAN_STAT_EVENT     0x10
+/** Filter Probe request frames  */
+#define WMI_SCAN_FILTER_PROBE_REQ    0x20
+/**When set, not to scan DFS channels*/
+#define WMI_SCAN_BYPASS_DFS_CHN      0x40
+/**When set, certain errors are ignored and scan continues.
+ * Different FW scan engine may use its own logic to decide what errors to ignore*/
+#define WMI_SCAN_CONTINUE_ON_ERROR   0x80
+/** Enable promiscous mode for ese */
+#define WMI_SCAN_FILTER_PROMISCOUS   0x100
+/** allow to send probe req on DFS channel */
+#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
+/** add TPC content in probe req frame */
+#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ  0x400
+/** add DS content in probe req frame */
+#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ   0x800
+/** use random mac address for TA for probe request frame and add
+ * oui specified by WMI_SCAN_PROB_REQ_OUI_CMDID to the probe req frame.
+ * if oui is not set by WMI_SCAN_PROB_REQ_OUI_CMDID  then the flag is ignored*/
+#define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ   0x1000
+
+/** WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */
+#define WMI_SCAN_CLASS_MASK 0xFF000000
+
+/*
+ * Masks identifying types/ID of scans
+ * Scan_Stop macros should be the same value as below defined in UMAC
+ * #define IEEE80211_SPECIFIC_SCAN       0x00000000
+ * #define IEEE80211_VAP_SCAN            0x01000000
+ * #define IEEE80211_ALL_SCANS           0x04000000
+ */
+#define WMI_SCAN_STOP_ONE       0x00000000
+#define WMI_SCN_STOP_VAP_ALL    0x01000000
+#define WMI_SCAN_STOP_ALL       0x04000000
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_stop_scan_cmd_fixed_param */
+	/** requestor requesting cancel  */
+	A_UINT32 requestor;
+	/** Scan ID */
+	A_UINT32 scan_id;
+	/**
+	 * Req Type
+	 * req_type should be WMI_SCAN_STOP_ONE, WMI_SCN_STOP_VAP_ALL or WMI_SCAN_STOP_ALL
+	 * WMI_SCAN_STOP_ONE indicates to stop a specific scan with scan_id
+	 * WMI_SCN_STOP_VAP_ALL indicates to stop all scan requests on a specific vDev with vdev_id
+	 * WMI_SCAN_STOP_ALL indicates to stop all scan requests in both Scheduler's queue and Scan Engine
+	 */
+	A_UINT32 req_type;
+	/**
+	 * vDev ID
+	 * used when req_type equals to WMI_SCN_STOP_VAP_ALL, it indexed the vDev on which to stop the scan
+	 */
+	A_UINT32 vdev_id;
+} wmi_stop_scan_cmd_fixed_param;
+
+#define MAX_NUM_CHAN_PER_WMI_CMD     58 /* each WMI cmd can hold 58 channel entries at most */
+#define APPEND_TO_EXISTING_CHAN_LIST 1
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_scan_chan_list_cmd_fixed_param */
+	A_UINT32 num_scan_chans;
+	/** no of elements in chan_info[] */
+	A_UINT32 flags;         /* Flags used to control the behavior of channel list update on target side */
+	/** Followed by the variable length TLV chan_info:
+	 *  wmi_channel chan_info[] */
+} wmi_scan_chan_list_cmd_fixed_param;
+
+/*
+ * Priority numbers must be sequential, starting with 0.
+ */
+/* NOTE: WLAN SCAN_PRIORITY_COUNT can't be changed without breaking the compatibility */
+typedef enum {
+	WMI_SCAN_PRIORITY_VERY_LOW = 0,
+	WMI_SCAN_PRIORITY_LOW,
+	WMI_SCAN_PRIORITY_MEDIUM,
+	WMI_SCAN_PRIORITY_HIGH,
+	WMI_SCAN_PRIORITY_VERY_HIGH,
+
+	WMI_SCAN_PRIORITY_COUNT         /* number of priorities supported */
+} wmi_scan_priority;
+
+/* Five Levels for Requested Priority */
+/* VERY_LOW LOW  MEDIUM   HIGH  VERY_HIGH */
+typedef A_UINT32 WLAN_PRIORITY_MAPPING[WMI_SCAN_PRIORITY_COUNT];
+
+/**
+ * to keep align with UMAC implementation, we pass only vdev_type but not vdev_subtype when we overwrite an entry for a specific vdev_subtype
+ * ex. if we need overwrite P2P Client prority entry, we will overwrite the whole table for WLAN_M_STA
+ * we will generate the new WLAN_M_STA table with modified P2P Client Entry but keep STA entry intact
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_scan_sch_priority_table_cmd_fixed_param */
+	/**
+	 * used as an index to find the proper table for a specific vdev type in default_scan_priority_mapping_table
+	 * vdev_type should be one of enum in WLAN_OPMODE which inculdes WLAN_M_IBSS, WLAN_M_STA, WLAN_M_AP and WLAN_M_MONITOR currently
+	 */
+	A_UINT32 vdev_type;
+	/**
+	 * number of rows in mapping_table for a specific vdev
+	 * for WLAN_M_STA type, there are 3 entries in the table (refer to default_scan_priority_mapping_table definition)
+	 */
+	A_UINT32 number_rows;
+	/**  mapping_table for a specific vdev follows this TLV
+	 *   WLAN_PRIORITY_MAPPING mapping_table[]; */
+} wmi_scan_sch_priority_table_cmd_fixed_param;
+
+/** update flags */
+#define WMI_SCAN_UPDATE_SCAN_PRIORITY           0x1
+#define WMI_SCAN_UPDATE_SCAN_MIN_REST_TIME      0x2
+#define WMI_SCAN_UPDATE_SCAN_MAX_REST_TIME      0x4
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** requestor requesting update scan request  */
+	A_UINT32 requestor;
+	/** Scan ID of the scan request that need to be update */
+	A_UINT32 scan_id;
+	/** update flags, indicating which of the following fields are valid and need to be updated*/
+	A_UINT32 scan_update_flags;
+	/** scan priority. Only valid if WMI_SCAN_UPDATE_SCAN_PRIORITY flag is set in scan_update_flag */
+	A_UINT32 scan_priority;
+	/** min rest time. Only valid if WMI_SCAN_UPDATE_MIN_REST_TIME flag is set in scan_update_flag */
+	A_UINT32 min_rest_time;
+	/** min rest time. Only valid if WMI_SCAN_UPDATE_MAX_REST_TIME flag is set in scan_update_flag */
+	A_UINT32 max_rest_time;
+} wmi_scan_update_request_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** oui to be used in probe request frame when  random mac addresss is
+	 * requested part of scan parameters. this is applied to both FW internal scans and
+	 * host initated scans. host can request for random mac address with
+	 * WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ flag.     */
+	A_UINT32 prob_req_oui;
+} wmi_scan_prob_req_oui_cmd_fixed_param;
+
+enum wmi_scan_event_type {
+	WMI_SCAN_EVENT_STARTED = 0x1,
+	WMI_SCAN_EVENT_COMPLETED = 0x2,
+	WMI_SCAN_EVENT_BSS_CHANNEL = 0x4,
+	WMI_SCAN_EVENT_FOREIGN_CHANNEL = 0x8,
+	WMI_SCAN_EVENT_DEQUEUED = 0x10,         /* scan request got dequeued */
+	WMI_SCAN_EVENT_PREEMPTED = 0x20,                /* preempted by other high priority scan */
+	WMI_SCAN_EVENT_START_FAILED = 0x40,             /* scan start failed */
+	WMI_SCAN_EVENT_RESTARTED = 0x80,                /*scan restarted */
+	WMI_SCAN_EVENT_MAX = 0x8000
+};
+
+enum wmi_scan_completion_reason {
+	/** scan related events */
+	WMI_SCAN_REASON_NONE = 0xFF,
+	WMI_SCAN_REASON_COMPLETED = 0,
+	WMI_SCAN_REASON_CANCELLED = 1,
+	WMI_SCAN_REASON_PREEMPTED = 2,
+	WMI_SCAN_REASON_TIMEDOUT = 3,
+	WMI_SCAN_REASON_INTERNAL_FAILURE = 4,           /* This reason indication failures when performaing scan */
+	WMI_SCAN_REASON_MAX,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_scan_event_fixed_param */
+	/** scan event (wmi_scan_event_type) */
+	A_UINT32 event;
+	/** status of the scan completion event */
+	A_UINT32 reason;
+	/** channel freq , only valid for FOREIGN channel event*/
+	A_UINT32 channel_freq;
+	/**id of the requestor whose scan is in progress */
+	A_UINT32 requestor;
+	/**id of the scan that is in progress */
+	A_UINT32 scan_id;
+	/**id of VDEV that requested the scan */
+	A_UINT32 vdev_id;
+} wmi_scan_event_fixed_param;
+
+/* WMI Diag event */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag is WMITLV_TAG_STRUC_wmi_diag_event_fixed_param */
+	A_UINT32 time_stamp;            /* Reference timestamp. diag frame contains diff value */
+	A_UINT32 count;         /* Number of diag frames added to current event */
+	A_UINT32 dropped;
+	/* followed by WMITLV_TAG_ARRAY_BYTE */
+} wmi_diag_event_fixed_param;
+
+/*
+ * If FW has multiple active channels due to MCC(multi channel concurrency),
+ * then these stats are combined stats for all the active channels.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_update_whal_mib_stats_event_fixed_param */
+	/** ack count, it is an incremental number, not accumulated number */
+	A_UINT32 ackRcvBad;
+	/** bad rts count, it is an incremental number, not accumulated number */
+	A_UINT32 rtsBad;
+	/** good rts, it is an incremental number, not accumulated number */
+	A_UINT32 rtsGood;
+	/** fcs count, it is an incremental number, not accumulated number */
+	A_UINT32 fcsBad;
+	/** beacon count, it is an incremental number, not accumulated number */
+	A_UINT32 noBeacons;
+} wmi_update_whal_mib_stats_event_fixed_param;
+
+/*
+ * This defines how much headroom is kept in the
+ * receive frame between the descriptor and the
+ * payload, in order for the WMI PHY error and
+ * management handler to insert header contents.
+ *
+ * This is in bytes.
+ */
+#define WMI_MGMT_RX_HDR_HEADROOM    sizeof(wmi_comb_phyerr_rx_hdr) + WMI_TLV_HDR_SIZE + sizeof(wmi_single_phyerr_rx_hdr)
+
+/** This event will be used for sending scan results
+ * as well as rx mgmt frames to the host. The rx buffer
+ * will be sent as part of this WMI event. It would be a
+ * good idea to pass all the fields in the RX status
+ * descriptor up to the host.
+ */
+/* ATH_MAX_ANTENNA value (4) can't be changed without breaking the compatibility */
+#define ATH_MAX_ANTENNA 4       /* To support beelinear, which is up to 4 chains */
+
+/** flag indicating that the the  mgmt frame (probe req/beacon) is received in the context of extscan performed by FW */
+#define WMI_MGMT_RX_HDR_EXTSCAN     0x01
+
+/**
+ * flag indicating that the the mgmt frame (probe req/beacon) is received in
+ * the context of matched network by FW ENLO
+ */
+#define WMI_MGMT_RX_HDR_ENLO 0x02
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mgmt_rx_hdr */
+	/** channel on which this frame is received. */
+	A_UINT32 channel;
+	/** snr information used to cal rssi */
+	A_UINT32 snr;
+	/** Rate kbps */
+	A_UINT32 rate;
+	/** rx phy mode WLAN_PHY_MODE */
+	A_UINT32 phy_mode;
+	/** length of the frame */
+	A_UINT32 buf_len;
+	/** rx status */
+	A_UINT32 status;
+	/** RSSI of PRI 20MHz for each chain. */
+	A_UINT32 rssi_ctl[ATH_MAX_ANTENNA];
+	/** information about the management frame e.g. can give a scan source for a scan result mgmt frame */
+	A_UINT32 flags;
+	/** combined RSSI, i.e. the sum of the snr + noise floor (dBm units) */
+	A_INT32 rssi;
+
+	/** delta between local TSF(TSF timestamp when frame was RXd)
+	* and remote TSF(TSF timestamp in the IE for mgmt frame
+	* beacon,proberesp for e.g). If remote TSF is not available,
+	* delta set to 0.
+	* Although tsf_delta is stored as A_UINT32, it can be negative,
+	* and thus would need to be sign-extended if added to a value
+	* larger than 32 bits.
+	*/
+	A_UINT32 tsf_delta;
+	/* This TLV is followed by array of bytes:
+	 * // management frame buffer
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_mgmt_rx_hdr;
+
+/* WMI PHY Error RX */
+
+typedef struct {
+	/** TSF timestamp */
+	A_UINT32 tsf_timestamp;
+
+	/**
+	 * Current freq1, freq2
+	 *
+	 * [7:0]:    freq1[lo]
+	 * [15:8] :   freq1[hi]
+	 * [23:16]:   freq2[lo]
+	 * [31:24]:   freq2[hi]
+	 */
+	A_UINT32 freq_info_1;
+
+	/**
+	 * Combined RSSI over all chains and channel width for this PHY error
+	 *
+	 * [7:0]: RSSI combined
+	 * [15:8]: Channel width (MHz)
+	 * [23:16]: PHY error code
+	 * [24:16]: reserved (future use)
+	 */
+	A_UINT32 freq_info_2;
+
+	/**
+	 * RSSI on chain 0 through 3
+	 *
+	 * This is formatted the same as the PPDU_START RX descriptor
+	 * field:
+	 *
+	 * [7:0]:   pri20
+	 * [15:8]:  sec20
+	 * [23:16]: sec40
+	 * [31:24]: sec80
+	 */
+	A_UINT32 rssi_chain0;
+	A_UINT32 rssi_chain1;
+	A_UINT32 rssi_chain2;
+	A_UINT32 rssi_chain3;
+
+	/**
+	 * Last calibrated NF value for chain 0 through 3
+	 *
+	 * nf_list_1:
+	 *
+	 * + [15:0] - chain 0
+	 * + [31:16] - chain 1
+	 *
+	 * nf_list_2:
+	 *
+	 * + [15:0] - chain 2
+	 * + [31:16] - chain 3
+	 */
+	A_UINT32 nf_list_1;
+	A_UINT32 nf_list_2;
+
+	/** Length of the frame */
+	A_UINT32 buf_len;
+} wmi_single_phyerr_rx_hdr;
+
+#define WMI_UNIFIED_FREQINFO_1_LO   0x000000ff
+#define WMI_UNIFIED_FREQINFO_1_LO_S 0
+#define WMI_UNIFIED_FREQINFO_1_HI   0x0000ff00
+#define WMI_UNIFIED_FREQINFO_1_HI_S 8
+#define WMI_UNIFIED_FREQINFO_2_LO   0x00ff0000
+#define WMI_UNIFIED_FREQINFO_2_LO_S 16
+#define WMI_UNIFIED_FREQINFO_2_HI   0xff000000
+#define WMI_UNIFIED_FREQINFO_2_HI_S 24
+
+/*
+ * Please keep in mind that these _SET macros break macro side effect
+ * assumptions; don't be clever with them.
+ */
+#define WMI_UNIFIED_FREQ_INFO_GET(hdr, f)				    \
+	( WMI_F_MS( (hdr)->freq_info_1,					\
+		    WMI_UNIFIED_FREQINFO_ ## f ## _LO )				      \
+	  | (WMI_F_MS( (hdr)->freq_info_1,				\
+		       WMI_UNIFIED_FREQINFO_ ## f ## _HI ) << 8) )
+
+#define WMI_UNIFIED_FREQ_INFO_SET(hdr, f, v)				    \
+	do {								    \
+		WMI_F_RMW((hdr)->freq_info_1, (v) & 0xff,			\
+			  WMI_UNIFIED_FREQINFO_ ## f ## _LO);				    \
+		WMI_F_RMW((hdr)->freq_info_1, ((v) >> 8) & 0xff,		\
+			  WMI_UNIFIED_FREQINFO_ ## f ## _HI);				  \
+	} while (0)
+
+#define WMI_UNIFIED_FREQINFO_2_RSSI_COMB    0x000000ff
+#define WMI_UNIFIED_FREQINFO_2_RSSI_COMB_S  0
+#define WMI_UNIFIED_FREQINFO_2_CHWIDTH      0x0000ff00
+#define WMI_UNIFIED_FREQINFO_2_CHWIDTH_S    8
+#define WMI_UNIFIED_FREQINFO_2_PHYERRCODE   0x00ff0000
+#define WMI_UNIFIED_FREQINFO_2_PHYERRCODE_S 16
+
+#define WMI_UNIFIED_RSSI_COMB_GET(hdr)					    \
+	( (int8_t) (WMI_F_MS((hdr)->freq_info_2,			\
+			     WMI_UNIFIED_FREQINFO_2_RSSI_COMB)))
+
+#define WMI_UNIFIED_RSSI_COMB_SET(hdr, v)				    \
+	WMI_F_RMW((hdr)->freq_info_2, (v) & 0xff,			\
+		  WMI_UNIFIED_FREQINFO_2_RSSI_COMB);
+
+#define WMI_UNIFIED_CHWIDTH_GET(hdr)					    \
+	WMI_F_MS((hdr)->freq_info_2, WMI_UNIFIED_FREQINFO_2_CHWIDTH)
+
+#define WMI_UNIFIED_CHWIDTH_SET(hdr, v)					    \
+	WMI_F_RMW((hdr)->freq_info_2, (v) & 0xff,			\
+		  WMI_UNIFIED_FREQINFO_2_CHWIDTH);
+
+#define WMI_UNIFIED_PHYERRCODE_GET(hdr)					    \
+	WMI_F_MS((hdr)->freq_info_2, WMI_UNIFIED_FREQINFO_2_PHYERRCODE)
+
+#define WMI_UNIFIED_PHYERRCODE_SET(hdr, v)				    \
+	WMI_F_RMW((hdr)->freq_info_2, (v) & 0xff,			\
+		  WMI_UNIFIED_FREQINFO_2_PHYERRCODE);
+
+#define WMI_UNIFIED_CHAIN_0     0x0000ffff
+#define WMI_UNIFIED_CHAIN_0_S   0
+#define WMI_UNIFIED_CHAIN_1     0xffff0000
+#define WMI_UNIFIED_CHAIN_1_S   16
+#define WMI_UNIFIED_CHAIN_2     0x0000ffff
+#define WMI_UNIFIED_CHAIN_2_S   0
+#define WMI_UNIFIED_CHAIN_3     0xffff0000
+#define WMI_UNIFIED_CHAIN_3_S   16
+
+#define WMI_UNIFIED_CHAIN_0_FIELD   nf_list_1
+#define WMI_UNIFIED_CHAIN_1_FIELD   nf_list_1
+#define WMI_UNIFIED_CHAIN_2_FIELD   nf_list_2
+#define WMI_UNIFIED_CHAIN_3_FIELD   nf_list_2
+
+#define WMI_UNIFIED_NF_CHAIN_GET(hdr, c)				    \
+	((int16_t) (WMI_F_MS((hdr)->WMI_UNIFIED_CHAIN_ ## c ## _FIELD,	    \
+			     WMI_UNIFIED_CHAIN_ ## c)))
+
+#define WMI_UNIFIED_NF_CHAIN_SET(hdr, c, nf)				    \
+	WMI_F_RMW((hdr)->WMI_UNIFIED_CHAIN_ ## c ## _FIELD, (nf) & 0xffff,  \
+		  WMI_UNIFIED_CHAIN_ ## c);
+
+/*
+ * For now, this matches what the underlying hardware is doing.
+ * Update ar6000ProcRxDesc() to use these macros when populating
+ * the rx descriptor and then we can just copy the field over
+ * to the WMI PHY notification without worrying about breaking
+ * things.
+ */
+#define WMI_UNIFIED_RSSI_CHAN_PRI20     0x000000ff
+#define WMI_UNIFIED_RSSI_CHAN_PRI20_S   0
+#define WMI_UNIFIED_RSSI_CHAN_SEC20     0x0000ff00
+#define WMI_UNIFIED_RSSI_CHAN_SEC20_S   8
+#define WMI_UNIFIED_RSSI_CHAN_SEC40     0x00ff0000
+#define WMI_UNIFIED_RSSI_CHAN_SEC40_S   16
+#define WMI_UNIFIED_RSSI_CHAN_SEC80     0xff000000
+#define WMI_UNIFIED_RSSI_CHAN_SEC80_S   24
+
+#define WMI_UNIFIED_RSSI_CHAN_SET(hdr, c, ch, rssi)			    \
+	WMI_F_RMW((hdr)->rssi_chain ## c, (rssi) & 0xff,		  \
+		  WMI_UNIFIED_RSSI_CHAN_ ## ch);
+
+#define WMI_UNIFIED_RSSI_CHAN_GET(hdr, c, ch)				    \
+	((int8_t) (WMI_F_MS((hdr)->rssi_chain ## c,			  \
+			    WMI_UNIFIED_RSSI_CHAN_ ## ch)))
+
+typedef struct {
+	/** Phy error event header */
+	wmi_single_phyerr_rx_hdr hdr;
+	/** frame buffer */
+	A_UINT8 bufp[1];
+} wmi_single_phyerr_rx_event;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_comb_phyerr_rx_hdr */
+	/** Phy error phy error count */
+	A_UINT32 num_phyerr_events;
+	A_UINT32 tsf_l32;
+	A_UINT32 tsf_u32;
+	A_UINT32 buf_len;
+	A_UINT32 pmac_id;
+	/* This TLV is followed by array of bytes:
+	 * // frame buffer - contains multiple payloads in the order:
+	 * // header - payload, header - payload...
+	 *  (The header is of type: wmi_single_phyerr_rx_hdr)
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_comb_phyerr_rx_hdr;
+
+/* WMI MGMT TX  */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mgmt_tx_hdr */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** xmit rate */
+	A_UINT32 tx_rate;
+	/** xmit power */
+	A_UINT32 tx_power;
+	/** Buffer length in bytes */
+	A_UINT32 buf_len;
+	/* This TLV is followed by array of bytes:
+	 * // management frame buffer
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_mgmt_tx_hdr;
+
+typedef struct {
+	/*
+	 * TLV tag and len;
+	 *  tag equals WMITLV_TAG_STRUC_wmi_mgmt_tx_send_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	/* echoed in tx_compl_event */
+	A_UINT32 desc_id;
+	/* MHz units */
+	A_UINT32 chanfreq;
+	A_UINT32 paddr_lo;
+	A_UINT32 paddr_hi;
+	A_UINT32 frame_len;
+	/* Buffer length in bytes */
+	A_UINT32 buf_len;
+	/*
+	 * This TLV is followed by array of bytes:
+	 *  First 64 bytes of management frame
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_mgmt_tx_send_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_echo_event_fixed_param */
+	A_UINT32 value;
+} wmi_echo_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_echo_cmd_fixed_param */
+	A_UINT32 value;
+} wmi_echo_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_regdomain_cmd_fixed_param */
+
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	/** reg domain code */
+	A_UINT32 reg_domain;
+	A_UINT32 reg_domain_2G;
+	A_UINT32 reg_domain_5G;
+	A_UINT32 conformance_test_limit_2G;
+	A_UINT32 conformance_test_limit_5G;
+} wmi_pdev_set_regdomain_cmd_fixed_param;
+
+typedef struct {
+	/** true for scan start and flase for scan end */
+	A_UINT32 scan_start;
+} wmi_pdev_scan_cmd;
+
+/*Command to set/unset chip in quiet mode*/
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_quiet_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 period;                /*period in TUs */
+	A_UINT32 duration;              /*duration in TUs */
+	A_UINT32 next_start;            /*offset in TUs */
+	A_UINT32 enabled;               /*enable/disable */
+} wmi_pdev_set_quiet_cmd_fixed_param;
+
+/*
+ * Command to enable/disable Green AP Power Save.
+ * This helps conserve power during AP operation. When the AP has no
+ * stations associated with it, the host can enable Green AP Power Save
+ * to request the firmware to shut down all but one transmit and receive
+ * chains.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_green_ap_ps_enable_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 enable;                /*1:enable, 0:disable */
+} wmi_pdev_green_ap_ps_enable_cmd_fixed_param;
+
+#define MAX_HT_IE_LEN 32
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_ht_ie_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 ie_len;                /*length of the ht ie in the TLV ie_data[] */
+	A_UINT32 tx_streams; /* Tx streams supported for this HT IE */
+	A_UINT32 rx_streams; /* Rx streams supported for this HT IE */
+	/** The TLV for the HT IE follows:
+	 *       A_UINT32 ie_data[];
+	 */
+} wmi_pdev_set_ht_ie_cmd_fixed_param;
+
+#define MAX_VHT_IE_LEN 32
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_vht_ie_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 ie_len;                /*length of the vht ie in the TLV ie_data[] */
+	A_UINT32 tx_streams; /* Tx streams supported for this HT IE */
+	A_UINT32 rx_streams; /* Rx streams supported for this HT IE */
+	/** The TLV for the VHT IE follows:
+	 *       A_UINT32 ie_data[];
+	 */
+} wmi_pdev_set_vht_ie_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_base_macaddr_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	wmi_mac_addr base_macaddr;
+} wmi_pdev_set_base_macaddr_cmd_fixed_param;
+
+/*
+ * For now, the spectral configuration is global rather than
+ * per-vdev.  The vdev is a placeholder and will be ignored
+ * by the firmware.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_spectral_configure_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 spectral_scan_count;
+	A_UINT32 spectral_scan_period;
+	A_UINT32 spectral_scan_priority;
+	A_UINT32 spectral_scan_fft_size;
+	A_UINT32 spectral_scan_gc_ena;
+	A_UINT32 spectral_scan_restart_ena;
+	A_UINT32 spectral_scan_noise_floor_ref;
+	A_UINT32 spectral_scan_init_delay;
+	A_UINT32 spectral_scan_nb_tone_thr;
+	A_UINT32 spectral_scan_str_bin_thr;
+	A_UINT32 spectral_scan_wb_rpt_mode;
+	A_UINT32 spectral_scan_rssi_rpt_mode;
+	A_UINT32 spectral_scan_rssi_thr;
+	A_UINT32 spectral_scan_pwr_format;
+	A_UINT32 spectral_scan_rpt_mode;
+	A_UINT32 spectral_scan_bin_scale;
+	A_UINT32 spectral_scan_dBm_adj;
+	A_UINT32 spectral_scan_chn_mask;
+} wmi_vdev_spectral_configure_cmd_fixed_param;
+
+/*
+ * Enabling, disabling and triggering the spectral scan
+ * is a per-vdev operation.  That is, it will set channel
+ * flags per vdev rather than globally; so concurrent scan/run
+ * and multiple STA (eg p2p, tdls, multi-band STA) is possible.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_spectral_enable_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	/* 0 - ignore; 1 - trigger, 2 - clear trigger */
+	A_UINT32 trigger_cmd;
+	/* 0 - ignore; 1 - enable, 2 - disable */
+	A_UINT32 enable_cmd;
+} wmi_vdev_spectral_enable_cmd_fixed_param;
+
+typedef enum {
+	WMI_CSA_IE_PRESENT = 0x00000001,
+	WMI_XCSA_IE_PRESENT = 0x00000002,
+	WMI_WBW_IE_PRESENT = 0x00000004,
+	WMI_CSWARP_IE_PRESENT = 0x00000008,
+} WMI_CSA_EVENT_IES_PRESENT_FLAG;
+
+/* wmi CSA receive event from beacon frame */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_csa_event_fixed_param */
+	A_UINT32 i_fc_dur;
+/*  Bit 0-15: FC */
+/*  Bit 16-31: DUR */
+	wmi_mac_addr i_addr1;
+	wmi_mac_addr i_addr2;
+	/* NOTE: size of array of csa_ie[], xcsa_ie[], and wb_ie[] cannot be
+	 * changed in the future without breaking WMI compatibility */
+	A_UINT32 csa_ie[2];
+	A_UINT32 xcsa_ie[2];
+	A_UINT32 wb_ie[2];
+	A_UINT32 cswarp_ie;
+	A_UINT32 ies_present_flag;              /* WMI_CSA_EVENT_IES_PRESENT_FLAG */
+} wmi_csa_event_fixed_param;
+
+typedef enum {
+	/** TX chain mask */
+	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
+	/** RX chain mask */
+	WMI_PDEV_PARAM_RX_CHAIN_MASK,
+	/** TX power limit for 2G Radio */
+	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
+	/** TX power limit for 5G Radio */
+	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
+	/** TX power scale */
+	WMI_PDEV_PARAM_TXPOWER_SCALE,
+	/** Beacon generation mode . 0: host, 1: target   */
+	WMI_PDEV_PARAM_BEACON_GEN_MODE,
+	/** Beacon generation mode . 0: staggered 1: bursted   */
+	WMI_PDEV_PARAM_BEACON_TX_MODE,
+	/** Resource manager off chan mode .
+	 * 0: turn off off chan mode. 1: turn on offchan mode
+	 */
+	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
+	/** Protection mode  0: no protection 1:use CTS-to-self 2: use RTS/CTS */
+	WMI_PDEV_PARAM_PROTECTION_MODE,
+	/** Dynamic bandwidth 0: disable 1: enable */
+	WMI_PDEV_PARAM_DYNAMIC_BW,
+	/** Non aggregrate/ 11g sw retry threshold.0-disable */
+	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
+	/** aggregrate sw retry threshold. 0-disable*/
+	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
+	/** Station kickout threshold (non of consecutive failures).0-disable */
+	WMI_PDEV_PARAM_STA_KICKOUT_TH,
+	/** Aggerate size scaling configuration per AC */
+	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
+	/** LTR enable */
+	WMI_PDEV_PARAM_LTR_ENABLE,
+	/** LTR latency for BE, in us */
+	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
+	/** LTR latency for BK, in us */
+	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
+	/** LTR latency for VI, in us */
+	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
+	/** LTR latency for VO, in us  */
+	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
+	/** LTR AC latency timeout, in ms */
+	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
+	/** LTR platform latency override, in us */
+	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
+	/** LTR-M override, in us */
+	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
+	/** Tx activity timeout for LTR, in us */
+	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
+	/** L1SS state machine enable */
+	WMI_PDEV_PARAM_L1SS_ENABLE,
+	/** Deep sleep state machine enable */
+	WMI_PDEV_PARAM_DSLEEP_ENABLE,
+	/** RX buffering flush enable */
+	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
+	/** RX buffering matermark */
+	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
+	/** RX buffering timeout enable */
+	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
+	/** RX buffering timeout value */
+	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
+	/** pdev level stats update period in ms */
+	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
+	/** vdev level stats update period in ms */
+	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
+	/** peer level stats update period in ms */
+	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
+	/** beacon filter status update period */
+	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
+	/** QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
+	WMI_PDEV_PARAM_PMF_QOS,
+	/** Access category on which ARP frames are sent */
+	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
+	/** DCS configuration */
+	WMI_PDEV_PARAM_DCS,
+	/** Enable/Disable ANI on target */
+	WMI_PDEV_PARAM_ANI_ENABLE,
+	/** configure the ANI polling period */
+	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
+	/** configure the ANI listening period */
+	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
+	/** configure OFDM immunity level */
+	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
+	/** configure CCK immunity level */
+	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
+	/** Enable/Disable CDD for 1x1 STAs in rate control module */
+	WMI_PDEV_PARAM_DYNTXCHAIN,
+	/** Enable/Disable proxy STA */
+	WMI_PDEV_PARAM_PROXY_STA,
+	/** Enable/Disable low power state when all VDEVs are inactive/idle. */
+	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
+	/** Enable/Disable power gating sleep */
+	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
+	/** Enable/Disable Rfkill */
+	WMI_PDEV_PARAM_RFKILL_ENABLE,
+	/** Set Bursting DUR */
+	WMI_PDEV_PARAM_BURST_DUR,
+	/** Set Bursting ENABLE */
+	WMI_PDEV_PARAM_BURST_ENABLE,
+	/** HW rfkill config */
+	WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
+	/** Enable radio low power features */
+	WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
+	/** L1SS entry and residency time track */
+	WMI_PDEV_PARAM_L1SS_TRACK,
+	/** set hyst at runtime, requirement from SS */
+	WMI_PDEV_PARAM_HYST_EN,
+	/** Enable/ Disable POWER COLLAPSE */
+	WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
+	/** configure LED system state */
+	WMI_PDEV_PARAM_LED_SYS_STATE,
+	/** Enable/Disable LED */
+	WMI_PDEV_PARAM_LED_ENABLE,
+	/** set DIRECT AUDIO time latency */
+	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
+	/** set DIRECT AUDIO Feature ENABLE */
+	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
+	/** pdev level whal mib stats update enable */
+	WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
+	/** ht/vht info based on vdev */
+	WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
+	/** Set CTS channel BW for dynamic BW adjustment feature */
+	WMI_PDEV_PARAM_CTS_CBW,
+	/** Set GPIO pin info used by WNTS */
+	WMI_PDEV_PARAM_WNTS_CONFIG,
+	/** Enable/Disable hardware adaptive early rx feature */
+	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
+	/** The minimum early rx duration, to ensure early rx duration is non-zero */
+	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
+	/** Increasing/decreasing step used by hardware */
+	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
+	/** The fixed early rx duration when adaptive early rx is disabled */
+	WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
+	/** Enable/Disable bmiss based adaptive beacon timeout feature */
+	WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
+	/*
+	 * The minimum beacon timeout duration, to ensure beacon timeout
+	 * duration is non-zero
+	 */
+	WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
+	/** Increasing/decreasing step used by hardware */
+	WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
+	/*
+	 * The fixed beacon timeout duration when bmiss based adaptive beacon
+	 * timeout is disabled
+	 */
+	WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
+	/*
+	 * Enable/Disable Congestion Estimator based adaptive beacon
+	 * timeout feature */
+	WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
+	/*
+	 * combo value of ce_id, ce_threshold, ce_time, refer
+	 * to WMI_CE_BTO_CE_ID_MASK
+	 */
+	WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
+	/** 2G TX chain mask */
+	WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
+	/** 2G RX chain mask */
+	WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
+	/** 5G TX chain mask */
+	WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
+	/** 5G RX chain mask */
+	WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
+	/* Set tx chain mask for CCK rates */
+	WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
+	/* Set tx chain mask for 1SS stream */
+	WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
+} WMI_PDEV_PARAM;
+
+typedef enum {
+	/** Set the loglevel */
+	WMI_DBGLOG_LOG_LEVEL = 0x1,
+	/** Enable VAP level debug */
+	WMI_DBGLOG_VAP_ENABLE,
+	/** Disable VAP level debug */
+	WMI_DBGLOG_VAP_DISABLE,
+	/** Enable MODULE level debug */
+	WMI_DBGLOG_MODULE_ENABLE,
+	/** Disable MODULE level debug */
+	WMI_DBGLOG_MODULE_DISABLE,
+	/** Enable MODULE level debug */
+	WMI_DBGLOG_MOD_LOG_LEVEL,
+	/** set type of the debug output */
+	WMI_DBGLOG_TYPE,
+	/** Enable Disable debug */
+	WMI_DBGLOG_REPORT_ENABLE
+} WMI_DBG_PARAM;
+
+/* param_value for param_id WMI_PDEV_PARAM_CTS_CBW */
+typedef enum {
+	WMI_CTS_CBW_INVALID = 0,
+	WMI_CTS_CBW_20,
+	WMI_CTS_CBW_40,
+	WMI_CTS_CBW_80,
+	WMI_CTS_CBW_80_80,
+	WMI_CTS_CBW_160,
+} WMI_CTS_CBW;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_param_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	/** parameter id   */
+	A_UINT32 param_id;
+	/** parametr value */
+	A_UINT32 param_value;
+} wmi_pdev_set_param_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_get_tpc_config_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	/** parameter   */
+	A_UINT32 param;
+} wmi_pdev_get_tpc_config_cmd_fixed_param;
+
+#define WMI_FAST_DIVERSITY_BIT_OFFSET 0
+#define WMI_SLOW_DIVERSITY_BIT_OFFSET 1
+
+typedef struct {
+	A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_antenna_diversity_cmd_fixed_param */
+	A_UINT32 mac_id; /** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	/** parameter   */
+	A_UINT32 value;      /** bit0 is for enable/disable FAST diversity, and bit1 is for enable/disable SLOW diversity, 0->disable, 1->enable */
+} wmi_pdev_set_antenna_diversity_cmd_fixed_param;
+
+#define WMI_MAX_RSSI_THRESHOLD_SUPPORTED 3
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_rssi_breach_monitor_config_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* vdev_id, where RSSI monitoring will take place */
+	A_UINT32 vdev_id;
+	/*
+	 * host will configure request_id and firmware echo
+	 * this id in RSSI_BREACH_EVENT
+	 */
+	A_UINT32 request_id;
+	/*
+	 * bit [0-2] = low_rssi_breach_enabled[0-2]
+	 * enabled, bit [3-5] = hi_rssi_breach_enabled[0-2]
+	 */
+	A_UINT32 enabled_bitmap;
+	/* unit dBm. host driver to make sure [0] > [1] > [2] */
+	A_UINT32 low_rssi_breach_threshold[WMI_MAX_RSSI_THRESHOLD_SUPPORTED];
+	/* unit dBm. host driver to make sure [0] < [1] < [2] */
+	A_UINT32 hi_rssi_breach_threshold[WMI_MAX_RSSI_THRESHOLD_SUPPORTED];
+	/*
+	 * unit dBm. once low rssi[] breached, same event
+	 * bitmap will be generated only after signal gets better
+	 * than this level. This value is adopted for all low_rssi_breach_threshold[3]
+	 */
+	A_UINT32 lo_rssi_reenable_hysteresis;
+	/*
+	 * unit dBm. once hi rssi[] breached, same event bitmap
+	 * will be generated only after signal gets worse than this
+	 * level. This value is adopted for all hi_rssi_breach_threshold[3]
+	 */
+	A_UINT32 hi_rssi_reenable_histeresis;
+	/*
+	 * After last event is generated, we wait
+	 * until this interval to generate next event
+	 */
+	A_UINT32 min_report_interval;
+	/* this is to suppress number of event to be generated */
+	A_UINT32 max_num_report;
+} wmi_rssi_breach_monitor_config_fixed_param;
+
+typedef struct {
+	/** parameter   */
+	A_UINT32 param;
+} wmi_pdev_dump_cmd;
+
+typedef enum {
+	PAUSE_TYPE_CHOP = 0x1,
+	/** for MCC (switch channel), only vdev_map is valid */
+	PAUSE_TYPE_PS = 0x2,         /** for peer station sleep in sap mode, only peer_id is valid */
+	PAUSE_TYPE_UAPSD = 0x3,
+	/** for uapsd, only peer_id and tid_map are valid. */
+	PAUSE_TYPE_P2P_CLIENT_NOA = 0x4,
+	/** only vdev_map is valid, actually only one vdev id is set at one time */
+	PAUSE_TYPE_P2P_GO_PS = 0x5,
+	/** only vdev_map is valid, actually only one vdev id is set at one time */
+	PAUSE_TYPE_STA_ADD_BA = 0x6,
+	/** only peer_id and tid_map are valid, actually only one tid is set at one time */
+	PAUSE_TYPE_AP_PS = 0x7,
+	/** for pausing AP vdev when all the connected clients are in PS. only vdev_map is valid */
+	PAUSE_TYPE_IBSS_PS = 0x8,
+	/** for pausing IBSS vdev when all the peers are in PS. only vdev_map is valid */
+	PAUSE_TYPE_HOST = 0x15,
+	/** host is requesting vdev pause */
+} wmi_tx_pause_type;
+
+typedef enum {
+	ACTION_PAUSE = 0x0,
+	ACTION_UNPAUSE = 0x1,
+} wmi_tx_pause_action;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 pause_type;
+	A_UINT32 action;
+	A_UINT32 vdev_map;
+	A_UINT32 peer_id;
+	A_UINT32 tid_map;
+} wmi_tx_pause_event_fixed_param;
+
+typedef enum {
+	WMI_MGMT_TX_COMP_TYPE_COMPLETE_OK = 0,
+	WMI_MGMT_TX_COMP_TYPE_DISCARD,
+	WMI_MGMT_TX_COMP_TYPE_INSPECT,
+	WMI_MGMT_TX_COMP_TYPE_COMPLETE_NO_ACK,
+	WMI_MGMT_TX_COMP_TYPE_MAX,
+} WMI_MGMT_TX_COMP_STATUS_TYPE;
+
+typedef struct {
+	A_UINT32    tlv_header;
+	A_UINT32    desc_id; /* from tx_send_cmd */
+	A_UINT32    status;  /* WMI_MGMT_TX_COMP_STATUS_TYPE */
+} wmi_mgmt_tx_compl_event_fixed_param;
+
+#define WMI_TPC_RATE_MAX            160
+/* WMI_TPC_TX_NUM_CHAIN macro can't be changed without breaking the WMI compatibility */
+#define WMI_TPC_TX_NUM_CHAIN        4
+
+typedef enum {
+	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
+	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
+	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
+} WMI_TPC_CONFIG_EVENT_FLAG;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_tpc_config_event_fixed_param  */
+	A_UINT32 regDomain;
+	A_UINT32 chanFreq;
+	A_UINT32 phyMode;
+	A_UINT32 twiceAntennaReduction;
+	A_UINT32 twiceMaxRDPower;
+	A_INT32 twiceAntennaGain;
+	A_UINT32 powerLimit;
+	A_UINT32 rateMax;
+	A_UINT32 numTxChain;
+	A_UINT32 ctl;
+	A_UINT32 flags;
+	/* WMI_TPC_TX_NUM_CHAIN macro can't be changed without breaking the WMI compatibility */
+	A_INT8 maxRegAllowedPower[WMI_TPC_TX_NUM_CHAIN];
+	A_INT8
+		maxRegAllowedPowerAGCDD[WMI_TPC_TX_NUM_CHAIN]
+	[WMI_TPC_TX_NUM_CHAIN];
+	A_INT8
+		maxRegAllowedPowerAGSTBC[WMI_TPC_TX_NUM_CHAIN]
+	[WMI_TPC_TX_NUM_CHAIN];
+	A_INT8
+		maxRegAllowedPowerAGTXBF[WMI_TPC_TX_NUM_CHAIN]
+	[WMI_TPC_TX_NUM_CHAIN];
+	/* This TLV is followed by a byte array:
+	 *      A_UINT8 ratesArray[];
+	 */
+} wmi_pdev_tpc_config_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_l1ss_track_event_fixed_param  */
+	A_UINT32 periodCnt;
+	A_UINT32 L1Cnt;
+	A_UINT32 L11Cnt;
+	A_UINT32 L12Cnt;
+	A_UINT32 L1Entry;
+	A_UINT32 L11Entry;
+	A_UINT32 L12Entry;
+} wmi_pdev_l1ss_track_event_fixed_param;
+
+typedef struct {
+	A_UINT32 len;
+	A_UINT32 msgref;
+	A_UINT32 segmentInfo;
+} wmi_pdev_seg_hdr_info;
+
+/*
+ * Transmit power scale factor.
+ *
+ */
+typedef enum {
+	WMI_TP_SCALE_MAX = 0,           /* no scaling (default) */
+	WMI_TP_SCALE_50 = 1,            /* 50% of max (-3 dBm) */
+	WMI_TP_SCALE_25 = 2,            /* 25% of max (-6 dBm) */
+	WMI_TP_SCALE_12 = 3,            /* 12% of max (-9 dBm) */
+	WMI_TP_SCALE_MIN = 4,           /* min, but still on   */
+	WMI_TP_SCALE_SIZE = 5,          /* max num of enum     */
+} WMI_TP_SCALE;
+
+#define WMI_MAX_DEBUG_MESG (sizeof(A_UINT32) * 32)
+
+typedef struct {
+	/** message buffer, NULL terminated */
+	char bufp[WMI_MAX_DEBUG_MESG];
+} wmi_debug_mesg_event;
+
+enum {
+	/** IBSS station */
+	VDEV_TYPE_IBSS = 0,
+	/** infra STA */
+	VDEV_TYPE_STA = 1,
+	/** infra AP */
+	VDEV_TYPE_AP = 2,
+	/** Monitor */
+	VDEV_TYPE_MONITOR = 3,
+	/** OCB */
+	VDEV_TYPE_OCB = 6,
+};
+
+enum {
+	/** P2P device */
+	VDEV_SUBTYPE_P2PDEV = 0,
+	/** P2P client */
+	VDEV_SUBTYPE_P2PCLI,
+	/** P2P GO */
+	VDEV_SUBTYPE_P2PGO,
+	/** BT3.0 HS */
+	VDEV_SUBTYPE_BT,
+};
+
+typedef struct {
+	/** idnore power , only use flags , mode and freq */
+	wmi_channel chan;
+} wmi_pdev_set_channel_cmd;
+
+typedef enum {
+	WMI_PKTLOG_EVENT_RX = 0x1,
+	WMI_PKTLOG_EVENT_TX = 0x2,
+	WMI_PKTLOG_EVENT_RCF = 0x4,             /* Rate Control Find */
+	WMI_PKTLOG_EVENT_RCU = 0x8,             /* Rate Control Update */
+	/* 0x10 used by deprecated DBG_PRINT */
+	WMI_PKTLOG_EVENT_SMART_ANTENNA = 0x20, /* To support Smart Antenna */
+} WMI_PKTLOG_EVENT;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_pktlog_enable_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	WMI_PKTLOG_EVENT evlist;
+} wmi_pdev_pktlog_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_pktlog_disable_cmd_fixed_param */
+	A_UINT32 reserved0;
+} wmi_pdev_pktlog_disable_cmd_fixed_param;
+
+/** Customize the DSCP (bit) to TID (0-7) mapping for QOS.
+ *  NOTE: This constant cannot be changed without breaking
+ *  WMI Compatibility. */
+
+#define WMI_DSCP_MAP_MAX    (64)
+/*
+ * @brief dscp_tid_map_cmdid - command to send the dscp to tid map to the target
+ * @details
+ * Create an API for sending the custom DSCP-to-TID map to the target
+ * If this is a request from the user space or from above the UMAC
+ * then the best place to implement this is in the umac_if_offload of the OL path.
+ * Provide a place holder for this API in the ieee80211com (ic).
+ *
+ * This API will be a function pointer in the ieee80211com (ic). Any user space calls for manually setting the DSCP-to-TID mapping
+ * in the target should be directed to the function pointer in the ic.
+ *
+ * Implementation details of the API to send the map to the target are as described-
+ *
+ * 1. The function will have 2 arguments- struct ieee80211com, DSCP-to-TID map.
+ *    DSCP-to-TID map is a one dimensional uint32_t array of length 64 to accomodate
+ *    64 TID values for 2^6 (64) DSCP ids.
+ *    Example:
+ *      A_UINT32 dscp_tid_map[WMI_DSCP_MAP_MAX] = {
+ *                                                                  0, 0, 0, 0, 0, 0, 0, 0,
+ *                                                                  1, 1, 1, 1, 1, 1, 1, 1,
+ *                                                                  2, 2, 2, 2, 2, 2, 2, 2,
+ *                                                                  3, 3, 3, 3, 3, 3, 3, 3,
+ *                                                                  4, 4, 4, 4, 4, 4, 4, 4,
+ *                                                                  5, 5, 5, 5, 5, 5, 5, 5,
+ *                                                                  6, 6, 6, 6, 6, 6, 6, 6,
+ *                                                                  7, 7, 7, 7, 7, 7, 7, 7,
+ *                                                            };
+ *
+ * 2. Request for the WMI buffer of size equal to the size of the DSCP-to-TID map.
+ *
+ * 3. Copy the DSCP-to-TID map into the WMI buffer.
+ *
+ * 4. Invoke the wmi_unified_cmd_send to send the cmd buffer to the target with the
+ *    WMI_PDEV_SET_DSCP_TID_MAP_CMDID. Arguments to the wmi send cmd API
+ *    (wmi_unified_send_cmd) are wmi handle, cmd buffer, length of the cmd buffer and
+ *    the WMI_PDEV_SET_DSCP_TID_MAP_CMDID id.
+ *
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_dscp_tid_map_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	/* map indicating DSCP to TID conversion */
+	A_UINT32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
+} wmi_pdev_set_dscp_tid_map_cmd_fixed_param;
+
+/** Fixed rate (rate-code) for broadcast/ multicast data frames */
+/* @brief bcast_mcast_data_rate - set the rates for the bcast/ mcast frames
+ * @details
+ * Create an API for setting the custom rate for the MCAST and BCAST frames
+ * in the target. If this is a request from the user space or from above the UMAC
+ * then the best place to implement this is in the umac_if_offload of the OL path.
+ * Provide a place holder for this API in the ieee80211com (ic).
+ *
+ * Implementation details of the API to set custom rates for MCAST and BCAST in
+ * the target are as described-
+ *
+ * 1. The function will have 3 arguments-
+ *    vap structure,
+ *    MCAST/ BCAST identifier code,
+ *    8 bit rate code
+ *
+ * The rate-code is a 1-byte field in which:for given rate, nss and preamble
+ * b'7-b-6 indicate the preamble (0 OFDM, 1 CCK, 2, HT, 3 VHT)
+ * b'5-b'4 indicate the NSS (0 - 1x1, 1 - 2x2, 2 - 3x3)
+ * b'3-b'0 indicate the rate, which is indicated as follows:
+ *          OFDM :     0: OFDM 48 Mbps
+ *                     1: OFDM 24 Mbps
+ *                     2: OFDM 12 Mbps
+ *                     3: OFDM 6 Mbps
+ *                     4: OFDM 54 Mbps
+ *                     5: OFDM 36 Mbps
+ *                     6: OFDM 18 Mbps
+ *                     7: OFDM 9 Mbps
+ *         CCK (pream == 1)
+ *                     0: CCK 11 Mbps Long
+ *                     1: CCK 5.5 Mbps Long
+ *                     2: CCK 2 Mbps Long
+ *                     3: CCK 1 Mbps Long
+ *                     4: CCK 11 Mbps Short
+ *                     5: CCK 5.5 Mbps Short
+ *                     6: CCK 2 Mbps Short
+ *         HT/VHT (pream == 2/3)
+ *                     0..7: MCS0..MCS7 (HT)
+ *                     0..9: MCS0..MCS9 (VHT)
+ *
+ * 2. Invoke the wmi_unified_vdev_set_param_send to send the rate value
+ *    to the target.
+ *    Arguments to the API are-
+ *    wmi handle,
+ *    VAP interface id (av_if_id) defined in ol_ath_vap_net80211,
+ *    WMI_VDEV_PARAM_BCAST_DATA_RATE/ WMI_VDEV_PARAM_MCAST_DATA_RATE,
+ *    rate value.
+ */
+typedef enum {
+	WMI_SET_MCAST_RATE,
+	WMI_SET_BCAST_RATE
+} MCAST_BCAST_RATE_ID;
+
+typedef struct {
+	MCAST_BCAST_RATE_ID rate_id;
+	A_UINT32 rate;
+} mcast_bcast_rate;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wmm_params */
+	A_UINT32 cwmin;
+	A_UINT32 cwmax;
+	A_UINT32 aifs;
+	A_UINT32 txoplimit;
+	A_UINT32 acm;
+	A_UINT32 no_ack;
+} wmi_wmm_params;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_set_wmm_params_cmd_fixed_param */
+	A_UINT32 reserved0;
+	/** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 dg_type;
+
+	/* The TLVs for the 4 AC follows:
+	 *     wmi_wmm_params wmm_params_ac_be;
+	 *     wmi_wmm_params wmm_params_ac_bk;
+	 *     wmi_wmm_params wmm_params_ac_vi;
+	 *     wmi_wmm_params wmm_params_ac_vo;
+	 */
+} wmi_pdev_set_wmm_params_cmd_fixed_param;
+
+typedef enum {
+	WMI_REQUEST_PEER_STAT = 0x01,
+	WMI_REQUEST_AP_STAT = 0x02,
+	WMI_REQUEST_PDEV_STAT = 0x04,
+	WMI_REQUEST_VDEV_STAT = 0x08,
+	WMI_REQUEST_BCNFLT_STAT = 0x10,
+	WMI_REQUEST_VDEV_RATE_STAT = 0x20,
+} wmi_stats_id;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_request_stats_cmd_fixed_param */
+	wmi_stats_id stats_id;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_request_stats_cmd_fixed_param;
+
+/* stats type bitmap  */
+#define WMI_LINK_STATS_RADIO         0x00000001
+#define WMI_LINK_STATS_IFACE         0x00000002
+#define WMI_LINK_STATS_ALL_PEER      0x00000004
+#define WMI_LINK_STATS_PER_PEER      0x00000008
+
+/* wifi clear statistics bitmap  */
+#define WIFI_STATS_RADIO              0x00000001 /** all radio statistics */
+#define WIFI_STATS_RADIO_CCA          0x00000002 /** cca_busy_time (within radio statistics) */
+#define WIFI_STATS_RADIO_CHANNELS     0x00000004 /** all channel statistics (within radio statistics) */
+#define WIFI_STATS_RADIO_SCAN         0x00000008 /** all scan statistics (within radio statistics) */
+#define WIFI_STATS_IFACE              0x00000010 /** all interface statistics */
+#define WIFI_STATS_IFACE_TXRATE       0x00000020 /** all tx rate statistics (within interface statistics) */
+#define WIFI_STATS_IFACE_AC           0x00000040 /** all ac statistics (within interface statistics) */
+#define WIFI_STATS_IFACE_CONTENTION   0x00000080 /** all contention (min, max, avg) statistics (within ac statisctics) */
+#define WMI_STATS_IFACE_ALL_PEER      0x00000100 /** All peer stats on this interface */
+#define WMI_STATS_IFACE_PER_PEER      0x00000200 /** Clear particular peer stats depending on the peer_mac */
+
+/** Default value for stats if the stats collection has not started */
+#define WMI_STATS_VALUE_INVALID       0xffffffff
+
+#define WMI_DIAG_ID_GET(diag_events_logs)                         WMI_GET_BITS(diag_events_logs, 0, 16)
+#define WMI_DIAG_ID_SET(diag_events_logs, value)                  WMI_SET_BITS(diag_events_logs, 0, 16, value)
+#define WMI_DIAG_TYPE_GET(diag_events_logs)                       WMI_GET_BITS(diag_events_logs, 16, 1)
+#define WMI_DIAG_TYPE_SET(diag_events_logs, value)                WMI_SET_BITS(diag_events_logs, 16, 1, value)
+#define WMI_DIAG_ID_ENABLED_DISABLED_GET(diag_events_logs)        WMI_GET_BITS(diag_events_logs, 17, 1)
+#define WMI_DIAG_ID_ENABLED_DISABLED_SET(diag_events_logs, value) WMI_SET_BITS(diag_events_logs, 17, 1, value)
+
+typedef struct {
+	A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_diag_event_log_config_fixed_param */
+	A_UINT32 num_of_diag_events_logs;
+/* The TLVs will follow.
+ *    A_UINT32 diag_events_logs_list[]; 0-15 Bits Diag EVENT/LOG ID,
+ *                                      Bit 16 - DIAG type EVENT/LOG, 0 - Event, 1 - LOG
+ *                                      Bit 17 Indicate if the DIAG type is Enabled/Disabled.
+ */
+} wmi_diag_event_log_config_fixed_param;
+
+#define WMI_DIAG_FREQUENCY_GET(diag_events_logs)          WMI_GET_BITS(diag_events_logs, 17, 1)
+#define WMI_DIAG_FREQUENCY_SET(diag_events_logs, value)   WMI_SET_BITS(diag_events_logs, 17, 1, value)
+#define WMI_DIAG_EXT_FEATURE_GET(diag_events_logs)        WMI_GET_BITS(diag_events_logs, 18, 1)
+#define WMI_DIAG_EXT_FEATURE_SET(diag_events_logs, value) WMI_SET_BITS(diag_events_logs, 18, 1, value)
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 num_of_diag_events_logs;
+/* The TLVs will follow.
+ *    A_UINT32 diag_events_logs_list[]; 0-15 Bits Diag EVENT/LOG ID,
+ *                                      Bit 16 - DIAG type EVENT/LOG, 0 - Event, 1 - LOG
+ *                                      Bit 17 - Frequncy of the DIAG EVENT/LOG High Frequency -1, Low Frequency - 0
+ *                                      Bit 18 - Set if the EVENTS/LOGs are used for EXT DEBUG Framework
+ */
+} wmi_diag_event_log_supported_event_fixed_params;
+
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_debug_mesg_flush_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/** placeholder for future */
+	A_UINT32 reserved0;
+} wmi_debug_mesg_flush_fixed_param;
+
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_debug_mesg_flush_complete_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/** placeholder for future */
+	A_UINT32 reserved0;
+} wmi_debug_mesg_flush_complete_fixed_param;
+
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_rssi_breach_fixed_param
+	 * vdev_id, where RSSI breach event occurred
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	/* request id */
+	A_UINT32 request_id;
+	/*
+	 * bitmap[0-2] is corresponding to low_rssi[0-2]. bitmap[3-5] is
+	 * corresponding to hi_rssi[0-2]
+	 */
+	A_UINT32 event_bitmap;
+	/* rssi at the time of RSSI breach. Unit dBm */
+	A_UINT32 rssi;
+	/* bssid of the monitored AP's */
+	wmi_mac_addr bssid;
+} wmi_rssi_breach_event_fixed_param;
+
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_fw_mem_dump */
+	A_UINT32 tlv_header;
+	/** unique id identifying the segment */
+	A_UINT32 seg_id;
+	/** Start address of the segment to be read */
+	A_UINT32 seg_start_addr_lo;
+	A_UINT32 seg_start_addr_hi;
+	/** Length of the segment to be read */
+	A_UINT32 seg_length;
+	/** Host bufeer address to which the segment will be read and dumped */
+	A_UINT32 dest_addr_lo;
+	A_UINT32 dest_addr_hi;
+} wmi_fw_mem_dump;
+
+/* Command to get firmware memory dump*/
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_get_fw_mem_dump_fixed_param */
+	A_UINT32 tlv_header;
+	/** unique id identifying the request */
+	A_UINT32 request_id;
+	/** number of memory dump segments */
+	A_UINT32 num_fw_mem_dump_segs;
+	/**
+	 * This TLV is followed by another TLV
+	 *     wmi_fw_mem_dump fw_mem_dump[];
+	 */
+} wmi_get_fw_mem_dump_fixed_param;
+
+/** Event to indicate the completion of fw mem dump */
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_update_fw_mem_dump_fixed_param */
+	A_UINT32 tlv_header;
+	/** unique id identifying the request, given
+	 * in the request stats command */
+	A_UINT32 request_id;
+	/*In case of Firmware memory dump */
+	A_UINT32 fw_mem_dump_complete;
+} wmi_update_fw_mem_dump_fixed_param;
+
+typedef enum {
+	WMI_ROAMING_IDLE = 0,
+	WMI_ROAMING_ACTIVE = 1,
+} wmi_roam_state;
+
+/* access categories */
+typedef enum {
+	WMI_AC_VO = 0,
+	WMI_AC_VI = 1,
+	WMI_AC_BE = 2,
+	WMI_AC_BK = 3,
+	WMI_AC_MAX = 4,
+} wmi_traffic_ac;
+
+typedef enum {
+	WMI_STA_STATS = 0,
+	WMI_SOFTAP_STATS = 1,
+	WMI_IBSS_STATS = 2,
+	WMI_P2P_CLIENT_STATS = 3,
+	WMI_P2P_GO_STATS = 4,
+	WMI_NAN_STATS = 5,
+	WMI_MESH_STATS = 6,
+} wmi_link_iface_type;
+
+/* channel operating width */
+typedef enum {
+	WMI_CHAN_WIDTH_20 = 0,
+	WMI_CHAN_WIDTH_40 = 1,
+	WMI_CHAN_WIDTH_80 = 2,
+	WMI_CHAN_WIDTH_160 = 3,
+	WMI_CHAN_WIDTH_80P80 = 4,
+	WMI_CHAN_WIDTH_5 = 5,
+	WMI_CHAN_WIDTH_10 = 6,
+} wmi_channel_width;
+
+/*Clear stats*/
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_clear_link_stats_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** stop_stats_collection_req = 1 will imply stop the statistics collection */
+	A_UINT32 stop_stats_collection_req;
+	/** identifies what stats to be cleared */
+	A_UINT32 stats_clear_req_mask;
+	/** identifies which peer stats to be cleared. Valid only while clearing PER_REER */
+	wmi_mac_addr peer_macaddr;
+} wmi_clear_link_stats_cmd_fixed_param;
+
+/* Link Stats configuration params. Trigger the link layer statistics collection*/
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_start_link_stats_cmd_fixed_param */
+	/** threshold to classify the pkts as short or long */
+	A_UINT32 mpdu_size_threshold;
+	/** set for field debug mode. Driver should collect all statistics regardless of performance impact.*/
+	A_UINT32 aggressive_statistics_gathering;
+} wmi_start_link_stats_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_request_link_stats_cmd_fixed_param */
+	/** Type of stats required. This is a bitmask WMI_LINK_STATS_RADIO, WMI_LINK_STATS_IFACE */
+	A_UINT32 stats_type;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** unique id identifying the request, generated by the caller */
+	A_UINT32 request_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_request_link_stats_cmd_fixed_param;
+
+/* channel statistics */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_channel_stats */
+	/** Channel width (20, 40, 80, 80+80, 160) enum wmi_channel_width*/
+	A_UINT32 channel_width;
+	/** Primary 20 MHz channel */
+	A_UINT32 center_freq;
+	/** center frequency (MHz) first segment */
+	A_UINT32 center_freq0;
+	/** center frequency (MHz) second segment */
+	A_UINT32 center_freq1;
+	/** msecs the radio is awake (32 bits number accruing over time) */
+	A_UINT32 radio_awake_time;
+	/** msecs the CCA register is busy (32 bits number accruing over time) */
+	A_UINT32 cca_busy_time;
+} wmi_channel_stats;
+
+/* radio statistics */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_radio_link_stats */
+	/** Wifi radio (if multiple radio supported) */
+	A_UINT32 radio_id;
+	/** msecs the radio is awake (32 bits number accruing over time) */
+	A_UINT32 on_time;
+	/** msecs the radio is transmitting (32 bits number accruing over time) */
+	A_UINT32 tx_time;
+	/** msecs the radio is in active receive (32 bits number accruing over time) */
+	A_UINT32 rx_time;
+	/** msecs the radio is awake due to all scan (32 bits number accruing over time) */
+	A_UINT32 on_time_scan;
+	/** msecs the radio is awake due to NAN (32 bits number accruing over time) */
+	A_UINT32 on_time_nbd;
+	/** msecs the radio is awake due to G?scan (32 bits number accruing over time) */
+	A_UINT32 on_time_gscan;
+	/** msecs the radio is awake due to roam?scan (32 bits number accruing over time) */
+	A_UINT32 on_time_roam_scan;
+	/** msecs the radio is awake due to PNO scan (32 bits number accruing over time) */
+	A_UINT32 on_time_pno_scan;
+	/** msecs the radio is awake due to HS2.0 scans and GAS exchange (32 bits number accruing over time) */
+	A_UINT32 on_time_hs20;
+	/** number of channels */
+	A_UINT32 num_channels;
+} wmi_radio_link_stats;
+
+/** Radio statistics (once started) do not stop or get reset unless wifi_clear_link_stats is invoked */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_stats_event_fixed_param */
+	/** unique id identifying the request, given in the request stats command */
+	A_UINT32 request_id;
+	/** Number of radios*/
+	A_UINT32 num_radio;
+	/** more_data will be set depending on the number of radios */
+	A_UINT32 more_radio_events;
+/*
+ * This TLV is followed by another TLV of array of bytes
+ *   size of(struct wmi_radio_link_stats);
+ *
+ * This TLV is followed by another TLV of array of bytes
+ *   num_channels * size of(struct wmi_channel_stats)
+ */
+
+} wmi_radio_link_stats_event_fixed_param;
+
+/* per rate statistics */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_rate_stats */
+	/** rate information
+	 * The rate-code is a 1-byte field in which:for given rate, nss and preamble
+	 * b'7-b-6 indicate the preamble (0 OFDM, 1 CCK, 2, HT, 3 VHT)
+	 * b'5-b'4 indicate the NSS (0 - 1x1, 1 - 2x2, 2 - 3x3)
+	 * b'3-b'0 indicate the rate, which is indicated as follows:
+	 *          OFDM :     0: OFDM 48 Mbps
+	 *                     1: OFDM 24 Mbps
+	 *                     2: OFDM 12 Mbps
+	 *                     3: OFDM 6 Mbps
+	 *                     4: OFDM 54 Mbps
+	 *                     5: OFDM 36 Mbps
+	 *                     6: OFDM 18 Mbps
+	 *                     7: OFDM 9 Mbps
+	 *         CCK (pream == 1)
+	 *                     0: CCK 11 Mbps Long
+	 *                     1: CCK 5.5 Mbps Long
+	 *                     2: CCK 2 Mbps Long
+	 *                     3: CCK 1 Mbps Long
+	 *                     4: CCK 11 Mbps Short
+	 *                     5: CCK 5.5 Mbps Short
+	 *                     6: CCK 2 Mbps Short
+	 *         HT/VHT (pream == 2/3)
+	 *                     0..7: MCS0..MCS7 (HT)
+	 *                     0..9: MCS0..MCS9 (VHT)
+	 */
+	A_UINT32 rate;
+	/** units of 100 Kbps */
+	A_UINT32 bitrate;
+	/** number of successfully transmitted data pkts (ACK rcvd) */
+	A_UINT32 tx_mpdu;
+	/** number of received data pkts */
+	A_UINT32 rx_mpdu;
+	/** number of data packet losses (no ACK) */
+	A_UINT32 mpdu_lost;
+	/** total number of data pkt retries */
+	A_UINT32 retries;
+	/** number of short data pkt retries */
+	A_UINT32 retries_short;
+	/** number of long data pkt retries */
+	A_UINT32 retries_long;
+} wmi_rate_stats;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_link_stats */
+	/** peer type (AP, TDLS, GO etc.) enum wmi_peer_type*/
+	A_UINT32 peer_type;
+	/** mac address */
+	wmi_mac_addr peer_mac_address;
+	/** peer wmi_CAPABILITY_XXX */
+	A_UINT32 capabilities;
+	/** number of rates */
+	A_UINT32 num_rates;
+} wmi_peer_link_stats;
+
+/** PEER statistics (once started) reset and start afresh after each connection */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_stats_event_fixed_param */
+	/** unique id identifying the request, given in the request stats command */
+	A_UINT32 request_id;
+	/** number of peers accomidated in this particular event  */
+	A_UINT32 num_peers;
+	/** Indicates the fragment number  */
+	A_UINT32 peer_event_number;
+	/** Indicates if there are more peers which will be sent as seperate peer_stats event */
+	A_UINT32 more_data;
+
+/**
+ * This TLV is followed by another TLV
+ * num_peers * size of(struct wmi_peer_stats)
+ * num_rates * size of(struct wmi_rate_stats). num_rates is the sum of the rates of all the peers.
+ */
+} wmi_peer_stats_event_fixed_param;
+
+/* per access category statistics */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wmm_ac_stats */
+	/** access category (VI, VO, BE, BK) enum wmi_traffic_ac*/
+	A_UINT32 ac_type;
+	/** number of successfully transmitted unicast data pkts (ACK rcvd) */
+	A_UINT32 tx_mpdu;
+	/** number of received unicast mpdus */
+	A_UINT32 rx_mpdu;
+	/** number of succesfully transmitted multicast data packets */
+	/** STA case: implies ACK received from AP for the unicast packet in which mcast pkt was sent */
+	A_UINT32 tx_mcast;
+	/** number of received multicast data packets */
+	A_UINT32 rx_mcast;
+	/** number of received unicast a-mpdus */
+	A_UINT32 rx_ampdu;
+	/** number of transmitted unicast a-mpdus */
+	A_UINT32 tx_ampdu;
+	/** number of data pkt losses (no ACK) */
+	A_UINT32 mpdu_lost;
+	/** total number of data pkt retries */
+	A_UINT32 retries;
+	/** number of short data pkt retries */
+	A_UINT32 retries_short;
+	/** number of long data pkt retries */
+	A_UINT32 retries_long;
+	/** data pkt min contention time (usecs) */
+	A_UINT32 contention_time_min;
+	/** data pkt max contention time (usecs) */
+	A_UINT32 contention_time_max;
+	/** data pkt avg contention time (usecs) */
+	A_UINT32 contention_time_avg;
+	/** num of data pkts used for contention statistics */
+	A_UINT32 contention_num_samples;
+} wmi_wmm_ac_stats;
+
+/* interface statistics */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_iface_link_stats */
+	/** access point beacon received count from connected AP */
+	A_UINT32 beacon_rx;
+	/** access point mgmt frames received count from connected AP (including Beacon) */
+	A_UINT32 mgmt_rx;
+	/** action frames received count */
+	A_UINT32 mgmt_action_rx;
+	/** action frames transmit count */
+	A_UINT32 mgmt_action_tx;
+	/** access Point Beacon and Management frames RSSI (averaged) */
+	A_UINT32 rssi_mgmt;
+	/** access Point Data Frames RSSI (averaged) from connected AP */
+	A_UINT32 rssi_data;
+	/** access Point ACK RSSI (averaged) from connected AP */
+	A_UINT32 rssi_ack;
+	/** number of peers */
+	A_UINT32 num_peers;
+	/** Indicates how many peer_stats events will be sent depending on the num_peers. */
+	A_UINT32 num_peer_events;
+	/** number of ac */
+	A_UINT32 num_ac;
+	/** Roaming Stat */
+	A_UINT32 roam_state;
+	/**
+	 * Average Beacon spread offset is the averaged time delay between TBTT
+	 * and beacon TSF */
+	/** Upper 32 bits of averaged 64 bit beacon spread offset */
+	A_UINT32 avg_bcn_spread_offset_high;
+	/** Lower 32 bits of averaged 64 bit beacon spread offset */
+	A_UINT32 avg_bcn_spread_offset_low;
+	/** Takes value of 1 if AP leaks packets after sending an ACK for PM=1 otherwise 0 */
+	A_UINT32 is_leaky_ap;
+	/** Average number of frames received from AP after receiving the ACK for a frame with PM=1 */
+	A_UINT32 avg_rx_frms_leaked;
+	/** Rx leak watch window currently in force to minimize data loss
+	 * because of leaky AP. Rx leak window is the
+	 * time driver waits before shutting down the radio or switching the
+	 * channel and after receiving an ACK for
+	 * a data frame with PM bit set) */
+	A_UINT32 rx_leak_window;
+} wmi_iface_link_stats;
+
+/** Interface statistics (once started) reset and start afresh after each connection */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_iface_link_stats_event_fixed_param */
+	/** unique id identifying the request, given in the request stats command */
+	A_UINT32 request_id;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+/*
+ * This TLV is followed by another TLV
+ *   wmi_iface_link_stats iface_link_stats;
+ *   num_ac * size of(struct wmi_wmm_ac_stats)
+ */
+} wmi_iface_link_stats_event_fixed_param;
+
+/** Suspend option */
+enum {
+	WMI_PDEV_SUSPEND,               /* suspend */
+	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,              /* suspend and disable all interrupts */
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_suspend_cmd_fixed_param  */
+	/* suspend option sent to target */
+	A_UINT32 reserved0;                          /** placeholder for pdev_id of future multiple MAC products. Init. to 0. */
+	A_UINT32 suspend_opt;
+} wmi_pdev_suspend_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_resume_cmd_fixed_param  */
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_pdev_resume_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_rate_stats_event_fixed_param,  */
+	A_UINT32 num_vdev_stats;                /* number of vdevs */
+} wmi_vdev_rate_stats_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len, tag equals WMITLV_TAG_STRUC_wmi_vdev_rate_ht_info */
+	A_UINT32 vdevid;                /* Id of the wlan vdev */
+	A_UINT32 tx_nss;                /* Bit 28 of tx_rate_kbps has this info - based on last data packet transmitted */
+	A_UINT32 rx_nss;                /* Bit 24 of rx_rate_kbps - same as above */
+	A_UINT32 tx_preamble;           /* Bits 30-29 from tx_rate_kbps */
+	A_UINT32 rx_preamble;           /* Bits 26-25 from rx_rate_kbps */
+} wmi_vdev_rate_ht_info;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_stats_event_fixed_param */
+	wmi_stats_id stats_id;
+	/** number of pdev stats event structures (wmi_pdev_stats) 0 or 1 */
+	A_UINT32 num_pdev_stats;
+	/** number of vdev stats event structures  (wmi_vdev_stats) 0 or max vdevs */
+	A_UINT32 num_vdev_stats;
+	/** number of peer stats event structures  (wmi_peer_stats) 0 or max peers */
+	A_UINT32 num_peer_stats;
+	A_UINT32 num_bcnflt_stats;
+	/** number of chan stats event structures  (wmi_chan_stats) 0 to MAX MCC CHANS */
+	A_UINT32 num_chan_stats;
+	/* This TLV is followed by another TLV of array of bytes
+	 *   A_UINT8 data[];
+	 *  This data array contains
+	 *   num_pdev_stats * size of(struct wmi_pdev_stats)
+	 *   num_vdev_stats * size of(struct wmi_vdev_stats)
+	 *   num_peer_stats * size of(struct wmi_peer_stats)
+	 *   num_bcnflt_stats * size_of()
+	 *   num_chan_stats * size of(struct wmi_chan_stats)
+	 *
+	 */
+} wmi_stats_event_fixed_param;
+
+/**
+ *  PDEV statistics
+ *  @todo
+ *  add all PDEV stats here
+ */
+typedef struct {
+	/** Channel noise floor */
+	A_INT32 chan_nf;
+	/** TX frame count */
+	A_UINT32 tx_frame_count;
+	/** RX frame count */
+	A_UINT32 rx_frame_count;
+	/** rx clear count */
+	A_UINT32 rx_clear_count;
+	/** cycle count */
+	A_UINT32 cycle_count;
+	/** Phy error count */
+	A_UINT32 phy_err_count;
+	/** Channel Tx Power */
+	A_UINT32 chan_tx_pwr;
+	/** WAL dbg stats */
+	struct wlan_dbg_stats pdev_stats;
+
+} wmi_pdev_stats;
+
+/**
+ *  VDEV statistics
+ *  @todo
+ *  add all VDEV stats here
+ */
+
+typedef struct {
+	A_INT32 bcn_snr;
+	A_INT32 dat_snr;
+} wmi_snr_info;
+
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	wmi_snr_info vdev_snr;
+	A_UINT32 tx_frm_cnt[WLAN_MAX_AC];               /* Total number of packets(per AC) that were successfully transmitted(with and without retries, including multi-cast, broadcast) */
+	A_UINT32 rx_frm_cnt;            /* Total number of packets that were successfully received (after appropriate filter rules including multi-cast, broadcast) */
+	A_UINT32 multiple_retry_cnt[WLAN_MAX_AC];               /*The number of MSDU packets and MMPDU frames per AC
+	                                                           that the 802.11 station successfully transmitted after more than one retransmission attempt */
+	A_UINT32 fail_cnt[WLAN_MAX_AC];         /*Total number packets(per AC) failed to transmit */
+	A_UINT32 rts_fail_cnt;          /*Total number of RTS/CTS sequence failures for transmission of a packet */
+	A_UINT32 rts_succ_cnt;          /*Total number of RTS/CTS sequence success for transmission of a packet */
+	A_UINT32 rx_err_cnt;            /*The receive error count. HAL will provide the RxP FCS error global */
+	A_UINT32 rx_discard_cnt;                /* The sum of the receive error count and dropped-receive-buffer error count. (FCS error) */
+	A_UINT32 ack_fail_cnt;          /*Total number packets failed transmit because of no ACK from the remote entity */
+	A_UINT32 tx_rate_history[MAX_TX_RATE_VALUES];           /*History of last ten transmit rate, in units of 500 kbit/sec */
+	A_UINT32 bcn_rssi_history[MAX_RSSI_VALUES];             /*History of last ten Beacon rssi of the connected Bss */
+} wmi_vdev_stats;
+
+/**
+ *  peer statistics.
+ *
+ * @todo
+ * add more stats
+ *
+ */
+typedef struct {
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** rssi */
+	A_UINT32 peer_rssi;
+	/** last tx data rate used for peer */
+	A_UINT32 peer_tx_rate;
+	/** last rx data rate used for peer */
+	A_UINT32 peer_rx_rate;
+} wmi_peer_stats;
+
+typedef struct {
+	/** Primary channel freq of the channel for which stats are sent */
+	A_UINT32 chan_mhz;
+	/** Time spent on the channel */
+	A_UINT32 sampling_period_us;
+	/** Aggregate duration over a sampling period for which channel activity was observed */
+	A_UINT32 rx_clear_count;
+	/** Accumalation of the TX PPDU duration over a sampling period */
+	A_UINT32 tx_duration_us;
+	/** Accumalation of the RX PPDU duration over a sampling period */
+	A_UINT32 rx_duration_us;
+} wmi_chan_stats;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_create_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** VDEV type (AP,STA,IBSS,MONITOR) */
+	A_UINT32 vdev_type;
+	/** VDEV subtype (P2PDEV, P2PCLI, P2PGO, BT3.0)*/
+	A_UINT32 vdev_subtype;
+	/** VDEV MAC address */
+	wmi_mac_addr vdev_macaddr;
+	/* Number of configured txrx streams */
+	A_UINT32 num_cfg_txrx_streams;
+	/*
+	 * This TLV is followed by another TLV of array of structures
+	 * wmi_vdev_txrx_streams cfg_txrx_streams[];
+	*/
+} wmi_vdev_create_cmd_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_vdev_txrx_streams
+	 */
+	A_UINT32 tlv_header;
+	/* band - Should take values from wmi_channel_band_mask */
+	A_UINT32 band;
+	/* max supported tx streams per given band for this vdev */
+	A_UINT32 supported_tx_streams;
+	/* max supported rx streams per given band for this vdev */
+	A_UINT32 supported_rx_streams;
+} wmi_vdev_txrx_streams;
+
+/* wmi_p2p_noa_descriptor structure can't be modified without breaking the compatibility for WMI_HOST_SWBA_EVENTID */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_noa_descriptor */
+	A_UINT32 type_count;
+	/** 255: continuous schedule, 0: reserved */
+	A_UINT32 duration;
+	/** Absent period duration in micro seconds */
+	A_UINT32 interval;
+	/** Absent period interval in micro seconds */
+	A_UINT32 start_time;
+	/** 32 bit tsf time when in starts */
+} wmi_p2p_noa_descriptor;
+
+/** values for vdev_type */
+#define WMI_VDEV_TYPE_AP         0x1
+#define WMI_VDEV_TYPE_STA        0x2
+#define WMI_VDEV_TYPE_IBSS       0x3
+#define WMI_VDEV_TYPE_MONITOR    0x4
+
+/** VDEV type is for social wifi interface.This VDEV is Currently mainly needed
+ * by FW to execute the NAN specific WMI commands and also implement NAN specific
+ * operations like Network discovery, service provisioning and service
+ * subscription  ..etc. If FW needs NAN VDEV then Host should issue VDEV create
+ * WMI command to create this VDEV once during initialization and host is not
+ * expected to use any VDEV specific WMI commands on this VDEV.
+ **/
+#define WMI_VDEV_TYPE_NAN        0x5
+
+#define WMI_VDEV_TYPE_OCB        0x6
+
+/** values for vdev_subtype */
+#define WMI_UNIFIED_VDEV_SUBTYPE_P2P_DEVICE 0x1
+#define WMI_UNIFIED_VDEV_SUBTYPE_P2P_CLIENT 0x2
+#define WMI_UNIFIED_VDEV_SUBTYPE_P2P_GO     0x3
+
+/** values for vdev_start_request flags */
+/** Indicates that AP VDEV uses hidden ssid. only valid for
+ *  AP/GO */
+#define WMI_UNIFIED_VDEV_START_HIDDEN_SSID  (1<<0)
+/** Indicates if robust management frame/management frame
+ *  protection is enabled. For GO/AP vdevs, it indicates that
+ *  it may support station/client associations with RMF enabled.
+ *  For STA/client vdevs, it indicates that sta will
+ *  associate with AP with RMF enabled. */
+#define WMI_UNIFIED_VDEV_START_PMF_ENABLED  (1<<1)
+
+/*
+ * Host is sending bcn_tx_rate to override the beacon tx rates.
+ */
+#define WMI_UNIFIED_VDEV_START_BCN_TX_RATE_PRESENT (1<<2)
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_start_request_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** requestor id identifying the caller module */
+	A_UINT32 requestor_id;
+	/** beacon interval from received beacon */
+	A_UINT32 beacon_interval;
+	/** DTIM Period from the received beacon */
+	A_UINT32 dtim_period;
+	/** Flags */
+	A_UINT32 flags;
+	/** ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
+	wmi_ssid ssid;
+	/** beacon/probe reponse xmit rate. Applicable for SoftAP. */
+	/** This field will be invalid and ignored unless the */
+	/** flags field has the WMI_UNIFIED_VDEV_START_BCN_TX_RATE_PRESENT bit. */
+	/** When valid, this field contains the fixed tx rate for the beacon */
+	/** and probe response frames send by the GO or SoftAP */
+	A_UINT32 bcn_tx_rate;
+	/** beacon/probe reponse xmit power. Applicable for SoftAP. */
+	A_UINT32 bcn_txPower;
+	/** number of p2p NOA descriptor(s) from scan entry */
+	A_UINT32 num_noa_descriptors;
+	/** Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID.
+	      During CAC, Our HW shouldn't ack ditected frames */
+	A_UINT32 disable_hw_ack;
+	/** This field will be invalid unless the Dual Band Simultaneous (DBS) feature is enabled. */
+	/** The DBS policy manager indicates the preferred number of transmit streams. */
+	A_UINT32 preferred_tx_streams;
+	/** This field will be invalid unless the Dual Band Simultaneous (DBS) feature is enabled. */
+	/** the DBS policy manager indicates the preferred number of receive streams. */
+	A_UINT32 preferred_rx_streams;
+	/* The TLVs follows this structure:
+	 *     wmi_channel chan;   //WMI channel
+	 *     wmi_p2p_noa_descriptor  noa_descriptors[]; //actual p2p NOA descriptor from scan entry
+	 */
+} wmi_vdev_start_request_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_delete_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_delete_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_up_cmdid_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** aid (assoc id) received in association response for STA VDEV  */
+	A_UINT32 vdev_assoc_id;
+	/** bssid of the BSS the VDEV is joining  */
+	wmi_mac_addr vdev_bssid;
+} wmi_vdev_up_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_stop_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_stop_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_down_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_down_cmd_fixed_param;
+
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_standby_response_cmd;
+
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_resume_response_cmd;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_set_param_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** parameter id   */
+	A_UINT32 param_id;
+	/** parameter value */
+	A_UINT32 param_value;
+} wmi_vdev_set_param_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 key_seq_counter_l;
+	A_UINT32 key_seq_counter_h;
+} wmi_key_seq_counter;
+
+#define  WMI_CIPHER_NONE     0x0        /* clear key */
+#define  WMI_CIPHER_WEP      0x1
+#define  WMI_CIPHER_TKIP     0x2
+#define  WMI_CIPHER_AES_OCB  0x3
+#define  WMI_CIPHER_AES_CCM  0x4
+#define  WMI_CIPHER_WAPI     0x5
+#define  WMI_CIPHER_CKIP     0x6
+#define  WMI_CIPHER_AES_CMAC 0x7
+#define  WMI_CIPHER_ANY      0x8
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_install_key_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** MAC address used for installing   */
+	wmi_mac_addr peer_macaddr;
+	/** key index */
+	A_UINT32 key_ix;
+	/** key flags */
+	A_UINT32 key_flags;
+	/** key cipher, defined above */
+	A_UINT32 key_cipher;
+	/** key rsc counter */
+	wmi_key_seq_counter key_rsc_counter;
+	/** global key rsc counter */
+	wmi_key_seq_counter key_global_rsc_counter;
+	/** global key tsc counter */
+	wmi_key_seq_counter key_tsc_counter;
+	/** WAPI key rsc counter */
+	A_UINT8 wpi_key_rsc_counter[16];
+	/** WAPI key tsc counter */
+	A_UINT8 wpi_key_tsc_counter[16];
+	/** key length */
+	A_UINT32 key_len;
+	/** key tx mic length */
+	A_UINT32 key_txmic_len;
+	/** key rx mic length */
+	A_UINT32 key_rxmic_len;
+	/*
+	 * Following this struct are this TLV.
+	 *     // actual key data
+	 *     A_UINT8  key_data[]; // contains key followed by tx mic followed by rx mic
+	 */
+} wmi_vdev_install_key_cmd_fixed_param;
+
+/** Preamble types to be used with VDEV fixed rate configuration */
+typedef enum {
+	WMI_RATE_PREAMBLE_OFDM,
+	WMI_RATE_PREAMBLE_CCK,
+	WMI_RATE_PREAMBLE_HT,
+	WMI_RATE_PREAMBLE_VHT,
+} WMI_RATE_PREAMBLE;
+
+/** Value to disable fixed rate setting */
+#define WMI_FIXED_RATE_NONE    (0xff)
+
+/** the definition of different VDEV parameters */
+typedef enum {
+	/** RTS Threshold */
+	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
+	/** Fragmentation threshold */
+	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
+	/** beacon interval in TUs */
+	WMI_VDEV_PARAM_BEACON_INTERVAL,
+	/** Listen interval in TUs */
+	WMI_VDEV_PARAM_LISTEN_INTERVAL,
+	/** muticast rate in Mbps */
+	WMI_VDEV_PARAM_MULTICAST_RATE,
+	/** management frame rate in Mbps */
+	WMI_VDEV_PARAM_MGMT_TX_RATE,
+	/** slot time (long vs short) */
+	WMI_VDEV_PARAM_SLOT_TIME,
+	/** preamble (long vs short) */
+	WMI_VDEV_PARAM_PREAMBLE,
+	/** SWBA time (time before tbtt in msec) */
+	WMI_VDEV_PARAM_SWBA_TIME,
+	/** time period for updating VDEV stats */
+	WMI_VDEV_STATS_UPDATE_PERIOD,
+	/** age out time in msec for frames queued for station in power save*/
+	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
+	/** Host SWBA interval (time in msec before tbtt for SWBA event generation) */
+	WMI_VDEV_HOST_SWBA_INTERVAL,
+	/** DTIM period (specified in units of num beacon intervals) */
+	WMI_VDEV_PARAM_DTIM_PERIOD,
+	/** scheduler air time limit for this VDEV. used by off chan scheduler  */
+	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
+	/** enable/dsiable WDS for this VDEV  */
+	WMI_VDEV_PARAM_WDS,
+	/** ATIM Window */
+	WMI_VDEV_PARAM_ATIM_WINDOW,
+	/** BMISS max */
+	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
+	/** BMISS first time */
+	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
+	/** BMISS final time */
+	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
+	/** WMM enables/disabled */
+	WMI_VDEV_PARAM_FEATURE_WMM,
+	/** Channel width */
+	WMI_VDEV_PARAM_CHWIDTH,
+	/** Channel Offset */
+	WMI_VDEV_PARAM_CHEXTOFFSET,
+	/** Disable HT Protection */
+	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
+	/** Quick STA Kickout */
+	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
+	/** Rate to be used with Management frames */
+	WMI_VDEV_PARAM_MGMT_RATE,
+	/** Protection Mode */
+	WMI_VDEV_PARAM_PROTECTION_MODE,
+	/** Fixed rate setting */
+	WMI_VDEV_PARAM_FIXED_RATE,
+	/** Short GI Enable/Disable */
+	WMI_VDEV_PARAM_SGI,
+	/** Enable LDPC */
+	WMI_VDEV_PARAM_LDPC,
+	/** Enable Tx STBC */
+	WMI_VDEV_PARAM_TX_STBC,
+	/** Enable Rx STBC */
+	WMI_VDEV_PARAM_RX_STBC,
+	/** Intra BSS forwarding  */
+	WMI_VDEV_PARAM_INTRA_BSS_FWD,
+	/** Setting Default xmit key for Vdev */
+	WMI_VDEV_PARAM_DEF_KEYID,
+	/** NSS width */
+	WMI_VDEV_PARAM_NSS,
+	/** Set the custom rate for the broadcast data frames */
+	WMI_VDEV_PARAM_BCAST_DATA_RATE,
+	/** Set the custom rate (rate-code) for multicast data frames */
+	WMI_VDEV_PARAM_MCAST_DATA_RATE,
+	/** Tx multicast packet indicate Enable/Disable */
+	WMI_VDEV_PARAM_MCAST_INDICATE,
+	/** Tx DHCP packet indicate Enable/Disable */
+	WMI_VDEV_PARAM_DHCP_INDICATE,
+	/** Enable host inspection of Tx unicast packet to unknown destination */
+	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
+
+	/* The minimum amount of time AP begins to consider STA inactive */
+	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
+
+	/* An associated STA is considered inactive when there is no recent TX/RX
+	 * activity and no downlink frames are buffered for it. Once a STA exceeds
+	 * the maximum idle inactive time, the AP will send an 802.11 data-null as
+	 * a keep alive to verify the STA is still associated. If the STA does ACK
+	 * the data-null, or if the data-null is buffered and the STA does not
+	 * retrieve it, the STA will be considered unresponsive (see
+	 * WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). */
+	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
+
+	/* An associated STA is considered unresponsive if there is no recent
+	 * TX/RX activity and downlink frames are buffered for it. Once a STA
+	 * exceeds the maximum unresponsive time, the AP will send a
+	 * WMI_STA_KICKOUT event to the host so the STA can be deleted. */
+	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
+
+	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
+	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
+	/** Enable/Disable RTS-CTS */
+	WMI_VDEV_PARAM_ENABLE_RTSCTS,
+	/* Enable TXBFee/er */
+	WMI_VDEV_PARAM_TXBF,
+
+	/**Set packet power save */
+	WMI_VDEV_PARAM_PACKET_POWERSAVE,
+
+	/**Drops un-encrypted packets if any received in an encryted connection
+	 * otherwise forwards to host
+	 */
+	WMI_VDEV_PARAM_DROP_UNENCRY,
+
+	/*
+	 * Set TX encap type.
+	 *
+	 * enum wmi_pkt_type is to be used as the parameter
+	 * specifying the encap type.
+	 */
+	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
+
+	/*
+	 * Try to detect stations that woke-up and exited power save but did not
+	 * successfully transmit data-null with PM=0 to AP. When this happens,
+	 * STA and AP power save state are out-of-sync. Use buffered but
+	 * undelivered MSDU to the STA as a hint that the STA is really awake
+	 * and expecting normal ASAP delivery, rather than retrieving BU with
+	 * PS-Poll, U-APSD trigger, etc.
+	 *
+	 * 0 disables out-of-sync detection. Maximum time is 255 seconds.
+	 */
+	WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
+
+	/* Enable/Disable early rx dynamic adjust feature.
+	 * Early-rx dynamic adjust is a advance power save feature.
+	 * Early-rx is a wakeup duration before exact TBTT,which is deemed necessary to provide a cushion for various
+	 * timing discrepancies in the system.
+	 * In current code branch, the duration is set to a very conservative fix value to make sure the drift impact is minimum.
+	 * The fix early-tx will result in the unnessary power consume, so a dynamic early-rx adjust algorithm can be designed
+	 * properly to minimum the power consume.*/
+	WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
+
+	/* set target bmiss number per sample cycle if bmiss adjust was chosen.
+	 * In this adjust policy,early-rx is adjusted by comparing the current bmiss rate to target bmiss rate
+	 * which can be set by user through WMI command.
+	 */
+	WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
+
+	/* set sample cycle(in the unit of beacon interval) if bmiss adjust was chosen */
+	WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
+
+	/* set slop_step */
+	WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
+
+	/* set init slop */
+	WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
+
+	/* pause adjust enable/disable */
+	WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
+
+	/* Set channel pwr limit value of the vdev the minimal value of all
+	 * vdevs operating on this channel will be set as channel tx power
+	 * limit, which is used to configure ratearray
+	 */
+	WMI_VDEV_PARAM_TX_PWRLIMIT,
+
+	/* set the count of snr value for calculation in snr monitor */
+	WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
+
+	/** Roaming offload */
+	WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
+
+	/** Enable Leader request RX functionality for RMC */
+	WMI_VDEV_PARAM_ENABLE_RMC,
+
+	/* IBSS does not have deauth/disassoc, vdev has to detect peer gone event
+	 * by himself. If the beacon lost time exceed this threshold, the peer is
+	 * thought to be gone. */
+	WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
+
+	/** max rate in kpbs, transmit rate can't go beyond it */
+	WMI_VDEV_PARAM_MAX_RATE,
+
+	/* enable/disable drift sample. 0: disable; 1: clk_drift; 2: ap_drift; 3 both clk and ap drift */
+	WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
+	/* set Tx failure count threshold for the vdev */
+	WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
+
+	/* set ebt resync timeout value, in the unit of TU */
+	WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
+
+	/* Enable Aggregation State Trigger Event */
+	WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
+
+	/* This parameter indicates whether IBSS station can enter into power save
+	 * mode by sending Null frame (with PM=1). When not allowed, IBSS station has to stay
+	 * awake all the time and should never set PM=1 in its transmitted frames.
+	 * This parameter is meaningful/valid only when WMI_VDEV_PARAM_ATIM_WINDOW_LENGTH
+	 * is non-zero. */
+	WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
+
+	/* This parameter indicates if this station can enter into power collapse
+	 * for the remaining beacon interval after the ATIM window.
+	 * This parameter is meaningful/valid only when WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED
+	 * is set to true. */
+	WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
+
+	/* This parameter indicates whether IBSS station exit power save mode and
+	 * enter power active state (by sending Null frame with PM=0 in the immediate ATIM Window)
+	 * whenever there is a TX/RX activity. */
+	WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
+
+	/* If Awake on TX/RX activity is enabled, this parameter indicates
+	 * the data inactivity time in number of beacon intervals after which
+	 * IBSS station reenters power save by sending Null frame with PM=1. */
+	WMI_VDEV_PARAM_INACTIVITY_CNT,
+
+	/* Inactivity time in msec after which TX Service Period (SP) is
+	 * terminated by sending a Qos Null frame with EOSP.
+	 * If value is 0, TX SP is terminated with the last buffered packet itself
+	 * instead of waiting for the inactivity timeout. */
+	WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
+
+	/** DTIM policy */
+	WMI_VDEV_PARAM_DTIM_POLICY,
+
+	/* When IBSS network is initialized, PS-supporting device
+	 * does not enter protocol sleep state during first
+	 * WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS seconds. */
+	WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
+
+	/* Enable/Disable 1 RX chain usage during the ATIM window */
+	WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
+	/**
+	 * RX Leak window is the time driver waits before shutting down
+	 * the radio or switching the channel and after receiving an ACK
+	 * for a data frame with PM bit set)
+	 */
+	WMI_VDEV_PARAM_RX_LEAK_WINDOW,
+
+	/**
+	 * Averaging factor(16 bit value) is used in the calculations to
+	 * perform averaging of different link level statistics like average
+	 * beacon spread or average number of frames leaked
+	 */
+	WMI_VDEV_PARAM_STATS_AVG_FACTOR,
+	/*
+	 * disconnect threshold, once the consecutive error for specific peer
+	 * exceed this threhold, FW will send kickout event to host
+	 */
+	WMI_VDEV_PARAM_DISCONNECT_TH,
+	/*
+	 * The rate_code of RTS_CTS changed by host. Now FW can support
+	 * more non-HT rates rather than 1Mbps or 6Mbps */
+	WMI_VDEV_PARAM_RTSCTS_RATE,
+
+	/** This parameter indicates whether using a long duration RTS-CTS
+	 * protection when a SAP goes off channel in MCC mode */
+	WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
+
+	/*
+	 * This parameter indicates whether using a broadcast probe response
+	 * to increase the detectability of SAP in MCC mode
+	 */
+	WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
+} WMI_VDEV_PARAM;
+
+/* Length of ATIM Window in TU */
+#define WMI_VDEV_PARAM_ATIM_WINDOW_LENGTH WMI_VDEV_PARAM_ATIM_WINDOW
+
+enum wmi_pkt_type {
+	WMI_PKT_TYPE_RAW = 0,
+	WMI_PKT_TYPE_NATIVE_WIFI = 1,
+	WMI_PKT_TYPE_ETHERNET = 2,
+};
+
+typedef struct {
+	A_UINT8 sutxbfee : 1, mutxbfee : 1, sutxbfer : 1, mutxbfer : 1,
+#if defined(AR900B)
+	txb_sts_cap : 3, implicit_bf : 1;
+#else
+	reserved : 4;
+#endif
+} wmi_vdev_txbf_en;
+
+/** Upto 8 bits are available for Roaming module to be sent along with
+   WMI_VDEV_PARAM_ROAM_FW_OFFLOAD WMI_VDEV_PARAM **/
+/* Enable Roaming FW offload LFR1.5/LFR2.0 implementation */
+#define WMI_ROAM_FW_OFFLOAD_ENABLE_FLAG                          0x1
+/* Enable Roaming module in FW to do scan based on Final BMISS */
+#define WMI_ROAM_BMISS_FINAL_SCAN_ENABLE_FLAG                    0x2
+
+/** slot time long */
+#define WMI_VDEV_SLOT_TIME_LONG                                  0x1
+/** slot time short */
+#define WMI_VDEV_SLOT_TIME_SHORT                                 0x2
+/** preablbe long */
+#define WMI_VDEV_PREAMBLE_LONG                                   0x1
+/** preablbe short */
+#define WMI_VDEV_PREAMBLE_SHORT                                  0x2
+
+/** the definition of different START/RESTART Event response  */
+typedef enum {
+	/* Event respose of START CMD */
+	WMI_VDEV_START_RESP_EVENT = 0,
+	/* Event respose of RESTART CMD */
+	WMI_VDEV_RESTART_RESP_EVENT,
+} WMI_START_EVENT_PARAM;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_start_response_event_fixed_param  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** requestor id that requested the VDEV start request */
+	A_UINT32 requestor_id;
+	/* Respose of Event type START/RESTART */
+	WMI_START_EVENT_PARAM resp_type;
+	/** status of the response */
+	A_UINT32 status;
+	/** Vdev chain mask */
+	A_UINT32 chain_mask;
+	/** Vdev mimo power save mode */
+	A_UINT32 smps_mode;
+	/** mac_id field contains the MAC identifier that the VDEV is bound to. The valid range is 0 to (num_macs-1). */
+	A_UINT32 mac_id;
+	/** Configured Transmit Streams **/
+	A_UINT32 cfgd_tx_streams;
+	/** Configured Receive Streams **/
+	A_UINT32 cfgd_rx_streams;
+} wmi_vdev_start_response_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_stopped_event_fixed_param  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_stopped_event_fixed_param;
+
+/** common structure used for simple events (stopped, resume_req, standby response) */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag would be equivalent to actual event  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_vdev_simple_event_fixed_param;
+
+/** VDEV start response status codes */
+#define WMI_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0          /** VDEV succesfully started */
+#define WMI_VDEV_START_RESPONSE_INVALID_VDEVID  0x1          /** requested VDEV not found */
+#define WMI_VDEV_START_RESPONSE_NOT_SUPPORTED  0x2          /** unsupported VDEV combination */
+
+/** Beacon processing related command and event structures */
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_bcn_tx_hdr */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** xmit rate */
+	A_UINT32 tx_rate;
+	/** xmit power */
+	A_UINT32 txPower;
+	/** beacon buffer length in bytes */
+	A_UINT32 buf_len;
+	/* This TLV is followed by array of bytes:
+	 * // beacon frame buffer
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_bcn_tx_hdr;
+
+/* Beacon filter */
+#define WMI_BCN_FILTER_ALL   0  /* Filter all beacons */
+#define WMI_BCN_FILTER_NONE  1  /* Pass all beacons */
+#define WMI_BCN_FILTER_RSSI  2  /* Pass Beacons RSSI >= RSSI threshold */
+#define WMI_BCN_FILTER_BSSID 3  /* Pass Beacons with matching BSSID */
+#define WMI_BCN_FILTER_SSID  4  /* Pass Beacons with matching SSID */
+
+typedef struct {
+	/** Filter ID */
+	A_UINT32 bcn_filter_id;
+	/** Filter type - wmi_bcn_filter */
+	A_UINT32 bcn_filter;
+	/** Buffer len */
+	A_UINT32 bcn_filter_len;
+	/** Filter info (threshold, BSSID, RSSI) */
+	A_UINT8 *bcn_filter_buf;
+} wmi_bcn_filter_rx_cmd;
+
+/** Capabilities and IEs to be passed to firmware */
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_bcn_prb_info */
+	/** Capabilities */
+	A_UINT32 caps;
+	/** ERP info */
+	A_UINT32 erp;
+	/** Advanced capabilities */
+	/** HT capabilities */
+	/** HT Info */
+	/** ibss_dfs */
+	/** wpa Info */
+	/** rsn Info */
+	/** rrm info */
+	/** ath_ext */
+	/** app IE */
+} wmi_bcn_prb_info;
+
+typedef struct {
+	A_UINT32 tlv_header;          /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_bcn_tmpl_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** TIM IE offset from the beginning of the template. */
+	A_UINT32 tim_ie_offset;
+	/** beacon buffer length. data is in TLV data[] */
+	A_UINT32 buf_len;
+	/*
+	 * The TLVs follows:
+	 *    wmi_bcn_prb_info bcn_prb_info; //beacon probe capabilities and IEs
+	 *    A_UINT8  data[]; //Variable length data
+	 */
+} wmi_bcn_tmpl_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;          /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_prb_tmpl_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** beacon buffer length. data is in TLV data[] */
+	A_UINT32 buf_len;
+	/*
+	 * The TLVs follows:
+	 *    wmi_bcn_prb_info bcn_prb_info; //beacon probe capabilities and IEs
+	 *    A_UINT8  data[]; //Variable length data
+	 */
+} wmi_prb_tmpl_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_offload_bcn_tx_status_event_fixed_param */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** bcn tx status, values defined in enum WMI_FRAME_TX_STATUS */
+	A_UINT32 tx_status;
+} wmi_offload_bcn_tx_status_event_fixed_param;
+
+enum wmi_sta_ps_mode {
+	/** enable power save for the given STA VDEV */
+	WMI_STA_PS_MODE_DISABLED = 0,
+	/** disable power save  for a given STA VDEV */
+	WMI_STA_PS_MODE_ENABLED = 1,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sta_powersave_mode_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+
+	/** Power save mode
+	 *
+	 * (see enum wmi_sta_ps_mode)
+	 */
+	A_UINT32 sta_ps_mode;
+} wmi_sta_powersave_mode_cmd_fixed_param;
+
+enum wmi_csa_offload_en {
+	WMI_CSA_OFFLOAD_DISABLE = 0,
+	WMI_CSA_OFFLOAD_ENABLE = 1,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_csa_offload_enable_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+	A_UINT32 csa_offload_enable;
+} wmi_csa_offload_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_csa_offload_chanswitch_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+	/*
+	 * The TLVs follows:
+	 *    wmi_channel chan;
+	 */
+} wmi_csa_offload_chanswitch_cmd_fixed_param;
+/**
+ * This parameter controls the policy for retrieving frames from AP while the
+ * STA is in sleep state.
+ *
+ * Only takes affect if the sta_ps_mode is enabled
+ */
+enum wmi_sta_ps_param_rx_wake_policy {
+	/* Wake up when ever there is an  RX activity on the VDEV. In this mode
+	 * the Power save SM(state machine) will come out of sleep by either
+	 * sending null frame (or) a data frame (with PS==0) in response to TIM
+	 * bit set in the received beacon frame from AP.
+	 */
+	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
+
+	/* Here the power save state machine will not wakeup in response to TIM
+	 * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD
+	 * configuration setup by WMISET_PS_SET_UAPSD  WMI command.  When all
+	 * access categories are delivery-enabled, the station will send a UAPSD
+	 * trigger frame, otherwise it will send a PS-Poll.
+	 */
+	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
+};
+
+/** Number of tx frames/beacon  that cause the power save SM to wake up.
+ *
+ * Value 1 causes the SM to wake up for every TX. Value 0 has a special
+ * meaning, It will cause the SM to never wake up. This is useful if you want
+ * to keep the system to sleep all the time for some kind of test mode . host
+ * can change this parameter any time.  It will affect at the next tx frame.
+ */
+enum wmi_sta_ps_param_tx_wake_threshold {
+	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
+	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
+
+	/* Values greater than one indicate that many TX attempts per beacon
+	 * interval before the STA will wake up
+	 */
+};
+
+/**
+ * The maximum number of PS-Poll frames the FW will send in response to
+ * traffic advertised in TIM before waking up (by sending a null frame with PS
+ * = 0). Value 0 has a special meaning: there is no maximum count and the FW
+ * will send as many PS-Poll as are necessary to retrieve buffered BU. This
+ * parameter is used when the RX wake policy is
+ * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
+ * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
+ */
+enum wmi_sta_ps_param_pspoll_count {
+	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
+	/* Values greater than 0 indicate the maximum numer of PS-Poll frames FW
+	 * will send before waking up.
+	 */
+};
+
+/*
+ * This will include the delivery and trigger enabled state for every AC.
+ * This is the negotiated state with AP. The host MLME needs to set this based
+ * on AP capability and the state Set in the association request by the
+ * station MLME.Lower 8 bits of the value specify the UAPSD configuration.
+ */
+#define WMI_UAPSD_AC_TYPE_DELI 0
+#define WMI_UAPSD_AC_TYPE_TRIG 1
+
+#define WMI_UAPSD_AC_BIT_MASK(ac,type) (type ==  WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1))
+
+enum wmi_sta_ps_param_uapsd {
+	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
+	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
+	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
+	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
+	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
+	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
+	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
+	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
+};
+
+enum wmi_sta_powersave_param {
+	/**
+	 * Controls how frames are retrievd from AP while STA is sleeping
+	 *
+	 * (see enum wmi_sta_ps_param_rx_wake_policy)
+	 */
+	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
+
+	/**
+	 * The STA will go active after this many TX
+	 *
+	 * (see enum wmi_sta_ps_param_tx_wake_threshold)
+	 */
+	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
+
+	/**
+	 * Number of PS-Poll to send before STA wakes up
+	 *
+	 * (see enum wmi_sta_ps_param_pspoll_count)
+	 *
+	 */
+	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
+
+	/**
+	 * TX/RX inactivity time in msec before going to sleep.
+	 *
+	 * The power save SM will monitor tx/rx activity on the VDEV, if no
+	 * activity for the specified msec of the parameter the Power save SM will
+	 * go to sleep.
+	 */
+	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
+
+	/**
+	 * Set uapsd configuration.
+	 *
+	 * (see enum wmi_sta_ps_param_uapsd)
+	 */
+	WMI_STA_PS_PARAM_UAPSD = 4,
+	/**
+	 * Number of PS-Poll to send before STA wakes up in QPower Mode
+	 */
+	WMI_STA_PS_PARAM_QPOWER_PSPOLL_COUNT = 5,
+
+	/**
+	 * Enable QPower
+	 */
+	WMI_STA_PS_ENABLE_QPOWER = 6,
+
+	/**
+	 * Number of TX frames before the entering the Active state
+	 */
+	WMI_STA_PS_PARAM_QPOWER_MAX_TX_BEFORE_WAKE = 7,
+
+	/**
+	 * QPower SPEC PSPOLL interval
+	 */
+	WMI_STA_PS_PARAM_QPOWER_SPEC_PSPOLL_WAKE_INTERVAL = 8,
+
+	/**
+	 * Max SPEC PSPOLL to be sent when the PSPOLL response has
+	 * no-data bit set
+	 */
+	WMI_STA_PS_PARAM_QPOWER_SPEC_MAX_SPEC_NODATA_PSPOLL = 9,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sta_powersave_param_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** station power save parameter (see enum wmi_sta_powersave_param) */
+	A_UINT32 param;
+	A_UINT32 value;
+} wmi_sta_powersave_param_cmd_fixed_param;
+
+/** No MIMO power save */
+#define WMI_STA_MIMO_PS_MODE_DISABLE
+/** mimo powersave mode static*/
+#define WMI_STA_MIMO_PS_MODE_STATIC
+/** mimo powersave mode dynamic */
+#define WMI_STA_MIMO_PS_MODE_DYNAMI
+
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** mimo powersave mode as defined above */
+	A_UINT32 mimo_pwrsave_mode;
+} wmi_sta_mimo_ps_mode_cmd;
+
+/** U-APSD configuration of peer station from (re)assoc request and TSPECs */
+enum wmi_ap_ps_param_uapsd {
+	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
+	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
+	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
+	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
+	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
+	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
+	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
+	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
+};
+
+/** U-APSD maximum service period of peer station */
+enum wmi_ap_ps_peer_param_max_sp {
+	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
+	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
+	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
+	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
+
+	/* keep last! */
+	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
+};
+
+/**
+ * AP power save parameter
+ * Set a power save specific parameter for a peer station
+ */
+enum wmi_ap_ps_peer_param {
+	/** Set uapsd configuration for a given peer.
+	 *
+	 * This will include the delivery and trigger enabled state for every AC.
+	 * The host  MLME needs to set this based on AP capability and stations
+	 * request Set in the association request  received from the station.
+	 *
+	 * Lower 8 bits of the value specify the UAPSD configuration.
+	 *
+	 * (see enum wmi_ap_ps_param_uapsd)
+	 * The default value is 0.
+	 */
+	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
+
+	/**
+	 * Set the service period for a UAPSD capable station
+	 *
+	 * The service period from wme ie in the (re)assoc request frame.
+	 *
+	 * (see enum wmi_ap_ps_peer_param_max_sp)
+	 */
+	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
+
+	/** Time in seconds for aging out buffered frames for STA in power save */
+	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ap_ps_peer_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** AP powersave param (see enum wmi_ap_ps_peer_param) */
+	A_UINT32 param;
+	/** AP powersave param value */
+	A_UINT32 value;
+} wmi_ap_ps_peer_cmd_fixed_param;
+
+/** Configure peer station 11v U-APSD coexistance
+ *
+ * Two parameters from uaspd coexistence ie info (as specified in 11v) are
+ * sent down to FW along with this command.
+ *
+ * The semantics of these fields are described in the following text extracted
+ * from 802.11v.
+ *
+ * ---  If the non-AP STA specified a non-zero TSF 0 Offset value in the
+ *      U-APSD Coexistence element, the AP should not transmit frames to the
+ *      non-AP STA outside of the U-APSD Coexistence Service Period, which
+ *      begins when the AP receives the U-APSD trigger frame and ends after
+ *      the transmission period specified by the result of the following
+ *      calculation:
+ *
+ *          End of transmission period = T + (Interval . ((T . TSF 0 Offset) mod Interval))
+ *
+ *      Where T is the time the U-APSD trigger frame was received at the AP
+ *      Interval is the UAPSD Coexistence element Duration/Interval field
+ *      value (see 7.3.2.91) or upon the successful transmission of a frame
+ *      with EOSP bit set to 1, whichever is earlier.
+ *
+ *
+ * ---  If the non-AP STA specified a zero TSF 0 Offset value in the U-APSD
+ *      Coexistence element, the AP should not transmit frames to the non-AP
+ *      STA outside of the U-APSD Coexistence Service Period, which begins
+ *      when the AP receives a U-APSD trigger frame and ends after the
+ *      transmission period specified by the result of the following
+ *      calculation: End of transmission period = T + Duration
+ */
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Enable U-APSD coexistence support for this peer
+	 *
+	 * 0 -> disabled (default)
+	 * 1 -> enabled
+	 */
+	A_UINT32 enabled;
+	/** Duration/Interval as defined by 11v U-ASPD coexistance */
+	A_UINT32 duration_interval;
+	/** Upper 32 bits of 64-bit TSF offset */
+	A_UINT32 tsf_offset_high;
+	/** Lower 32 bits of 64-bit TSF offset */
+	A_UINT32 tsf_offset_low;
+} wmi_ap_powersave_peer_uapsd_coex_cmd;
+
+typedef enum {
+	WMI_AP_PS_EGAP_F_ENABLE_PHYERR_DETECTION      = 0x0001,
+	WMI_AP_PS_EGAP_F_ENABLE_PWRSAVE_BY_PS_STATE   = 0x0002,
+	WMI_AP_PS_EGAP_F_ENABLE_PWRSAVE_BY_INACTIVITY = 0x0004,
+
+	WMI_AP_PS_EGAP_FLAG_MAX = 0x8000
+} wmi_ap_ps_egap_flag_type;
+
+/**
+ * configure ehanced green ap parameters
+ */
+typedef struct {
+	/*
+	* TLV tag and len; tag equals
+	* wmi_ap_powersave_egap_param_cmd_fixed_param
+	*/
+	A_UINT32 tlv_header;
+	/** Enable enhanced green ap
+	* 0 -> disabled
+	* 1 -> enabled
+	*/
+	A_UINT32 enable;
+	/** The param indicates a duration that all STAs connected
+	* to S-AP have no traffic.
+	*/
+	A_UINT32 inactivity_time; /* in unit of milliseconds */
+	/** The param indicates a duration that all STAs connected
+	* to S-AP have no traffic, after all STAs have entered powersave.
+	*/
+	A_UINT32 wait_time; /* in unit of milliseconds */
+	/** The param is used to turn on/off some functions within E-GAP.
+	*/
+	A_UINT32 flags; /* wmi_ap_ps_egap_flag_type bitmap */
+} wmi_ap_ps_egap_param_cmd_fixed_param;
+
+typedef enum {
+	WMI_AP_PS_EGAP_STATUS_IDLE        = 1,
+	WMI_AP_PS_EGAP_STATUS_PWRSAVE_OFF = 2,
+	WMI_AP_PS_EGAP_STATUS_PWRSAVE_ON  = 3,
+
+	WMI_AP_PS_EGAP_STATUS_MAX = 15
+} wmi_ap_ps_egap_status_type;
+
+/**
+ * send ehanced green ap status to host
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** The param indicates a mac under dual-mac */
+	A_UINT32 mac_id;
+	/** The param indicates the current tx chainmask with the mac id. */
+	A_UINT32 tx_chainmask;
+	/** The param indicates the current rx chainmask with the mac id. */
+	A_UINT32 rx_chainmask;
+} wmi_ap_ps_egap_info_chainmask_list;
+
+typedef struct {
+	/*
+	* TLV tag and len; tag equals
+	* wmi_ap_powersave_egap_param_cmd_fixed_param
+	*/
+	A_UINT32 tlv_header;
+	/** Enhanced green ap status (WMI_AP_PS_EGAP_STATUS). */
+	A_UINT32 status;
+	/* This TLV is followed by
+	 *     wmi_ap_ps_egap_info_chainmask_list chainmask_list[];
+	 */
+} wmi_ap_ps_egap_info_event_fixed_param;
+
+
+/* 128 clients = 4 words */
+/* WMI_TIM_BITMAP_ARRAY_SIZE can't be modified without breaking the compatibility */
+#define WMI_TIM_BITMAP_ARRAY_SIZE 4
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tim_info  */
+	/** TIM bitmap len (in bytes)*/
+	A_UINT32 tim_len;
+	/** TIM Partial Virtual Bitmap */
+	A_UINT32 tim_mcast;
+	A_UINT32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
+	A_UINT32 tim_changed;
+	A_UINT32 tim_num_ps_pending;
+} wmi_tim_info;
+
+typedef struct {
+	/** Flag to enable quiet period IE support */
+	A_UINT32 is_enabled;
+	/** Quiet start */
+	A_UINT32 tbttcount;
+	/** Beacon intervals between quiets*/
+	A_UINT32 period;
+	/** TUs of each quiet*/
+	A_UINT32 duration;
+	/** TUs of from TBTT of quiet start*/
+	A_UINT32 offset;
+} wmi_quiet_info;
+
+/* WMI_P2P_MAX_NOA_DESCRIPTORS can't be modified without breaking the compatibility */
+#define WMI_P2P_MAX_NOA_DESCRIPTORS 4   /* Maximum number of NOA Descriptors supported */
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_noa_info  */
+	/** Bit  0:        Flag to indicate an update in NOA schedule
+	 *  Bits 7-1:    Reserved
+	 *  Bits 15-8:    Index (identifies the instance of NOA sub element)
+	 *  Bit  16:     Opp PS state of the AP
+	 *     Bits 23-17:    Ctwindow in TUs
+	 *     Bits 31-24:    Number of NOA descriptors
+	 */
+	A_UINT32 noa_attributes;
+	wmi_p2p_noa_descriptor
+		noa_descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
+} wmi_p2p_noa_info;
+
+#define WMI_UNIFIED_NOA_ATTR_MODIFIED           0x1
+#define WMI_UNIFIED_NOA_ATTR_MODIFIED_S         0
+
+#define WMI_UNIFIED_NOA_ATTR_IS_MODIFIED(hdr)			    \
+	WMI_F_MS((hdr)->noa_attributes, WMI_UNIFIED_NOA_ATTR_MODIFIED)
+
+#define WMI_UNIFIED_NOA_ATTR_MODIFIED_SET(hdr)			    \
+	WMI_F_RMW((hdr)->noa_attributes, 0x1,			 \
+		  WMI_UNIFIED_NOA_ATTR_MODIFIED);
+
+#define WMI_UNIFIED_NOA_ATTR_INDEX                      0xff00
+#define WMI_UNIFIED_NOA_ATTR_INDEX_S            8
+
+#define WMI_UNIFIED_NOA_ATTR_INDEX_GET(hdr)			       \
+	WMI_F_MS((hdr)->noa_attributes, WMI_UNIFIED_NOA_ATTR_INDEX)
+
+#define WMI_UNIFIED_NOA_ATTR_INDEX_SET(hdr, v)			    \
+	WMI_F_RMW((hdr)->noa_attributes, (v) & 0xff,		\
+		  WMI_UNIFIED_NOA_ATTR_INDEX);
+
+#define WMI_UNIFIED_NOA_ATTR_OPP_PS                     0x10000
+#define WMI_UNIFIED_NOA_ATTR_OPP_PS_S           16
+
+#define WMI_UNIFIED_NOA_ATTR_OPP_PS_GET(hdr)			     \
+	WMI_F_MS((hdr)->noa_attributes, WMI_UNIFIED_NOA_ATTR_OPP_PS)
+
+#define WMI_UNIFIED_NOA_ATTR_OPP_PS_SET(hdr)			     \
+	WMI_F_RMW((hdr)->noa_attributes, 0x1,			 \
+		  WMI_UNIFIED_NOA_ATTR_OPP_PS);
+
+#define WMI_UNIFIED_NOA_ATTR_CTWIN                      0xfe0000
+#define WMI_UNIFIED_NOA_ATTR_CTWIN_S            17
+
+#define WMI_UNIFIED_NOA_ATTR_CTWIN_GET(hdr)			     \
+	WMI_F_MS((hdr)->noa_attributes, WMI_UNIFIED_NOA_ATTR_CTWIN)
+
+#define WMI_UNIFIED_NOA_ATTR_CTWIN_SET(hdr, v)			     \
+	WMI_F_RMW((hdr)->noa_attributes, (v) & 0x7f,		 \
+		  WMI_UNIFIED_NOA_ATTR_CTWIN);
+
+#define WMI_UNIFIED_NOA_ATTR_NUM_DESC           0xff000000
+#define WMI_UNIFIED_NOA_ATTR_NUM_DESC_S         24
+
+#define WMI_UNIFIED_NOA_ATTR_NUM_DESC_GET(hdr)			     \
+	WMI_F_MS((hdr)->noa_attributes, WMI_UNIFIED_NOA_ATTR_NUM_DESC)
+
+#define WMI_UNIFIED_NOA_ATTR_NUM_DESC_SET(hdr, v)		     \
+	WMI_F_RMW((hdr)->noa_attributes, (v) & 0xff,		 \
+		  WMI_UNIFIED_NOA_ATTR_NUM_DESC);
+
+typedef struct {
+	/** TIM info */
+	wmi_tim_info tim_info;
+	/** P2P NOA info */
+	wmi_p2p_noa_info p2p_noa_info;
+	/* TBD: More info elements to be added later */
+} wmi_bcn_info;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_host_swba_event_fixed_param  */
+	/** bitmap identifying the VDEVs, generated by the caller */
+	A_UINT32 vdev_map;
+	/* This TLV is followed by tim_info and p2p_noa_info for each vdev in vdevmap :
+	 *     wmi_tim_info tim_info[];
+	 *     wmi_p2p_noa_info p2p_noa_info[];
+	 *
+	 */
+} wmi_host_swba_event_fixed_param;
+
+#define WMI_MAX_AP_VDEV 16
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tbtt_offset_event_fixed_param  */
+	/** bimtap of VDEVs that has tbtt offset updated */
+	A_UINT32 vdev_map;
+	/* The TLVs for tbttoffset_list will follow this TLV.
+	 *     tbtt offset list in the order of the LSB to MSB in the vdev_map bitmap
+	 *     A_UINT32 tbttoffset_list[WMI_MAX_AP_VDEV];
+	 */
+} wmi_tbtt_offset_event_fixed_param;
+
+/* Peer Specific commands and events */
+
+typedef struct {
+	A_UINT32 percentage; /* in unit of 12.5% */
+	A_UINT32 min_delta;  /* in unit of Mbps */
+} rate_delta_t;
+
+#define PEER_RATE_REPORT_COND_FLAG_DELTA        0x01
+#define PEER_RATE_REPORT_COND_FLAG_THRESHOLD    0x02
+#define MAX_NUM_OF_RATE_THRESH                  4
+
+typedef struct {
+	/*
+	 * PEER_RATE_REPORT_COND_FLAG_DELTA,
+	 * PEER_RATE_REPORT_COND_FLAG_THRESHOLD
+	 * Any of these two conditions or both of
+	 * them can be set.
+	 */
+	A_UINT32 val_cond_flags;
+	rate_delta_t rate_delta;
+	/*
+	 * In unit of Mbps. There are at most 4 thresholds
+	 * If the threshold count is less than 4, set zero to
+	 * the one following the last threshold
+	 */
+	A_UINT32 rate_threshold[MAX_NUM_OF_RATE_THRESH];
+} report_cond_per_phy_t;
+
+
+enum peer_rate_report_cond_phy_type {
+	PEER_RATE_REPORT_COND_11B = 0,
+	PEER_RATE_REPORT_COND_11A_G,
+	PEER_RATE_REPORT_COND_11N,
+	PEER_RATE_REPORT_COND_11AC,
+	PEER_RATE_REPORT_COND_MAX_NUM
+};
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_peer_rate_report_condtion_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* 1= enable, 0=disable */
+	A_UINT32 enable_rate_report;
+	A_UINT32 report_backoff_time;            /* in unit of msecond */
+	A_UINT32 report_timer_period;            /* in unit of msecond */
+	/*
+	 *In the following field, the array index means the phy type,
+	 * please see enum peer_rate_report_cond_phy_type for detail
+	 */
+	report_cond_per_phy_t cond_per_phy[PEER_RATE_REPORT_COND_MAX_NUM];
+} wmi_peer_set_rate_report_condition_fixed_param;
+
+/* Peer Type:
+ * NB: This can be left DEFAULT for the normal case, and f/w will determine BSS type based
+ * on address and vdev opmode. This is largely here to allow host to indicate that
+ * peer is explicitly a TDLS peer
+ */
+enum wmi_peer_type {
+	WMI_PEER_TYPE_DEFAULT = 0,              /* Generic/Non-BSS/Self Peer */
+	WMI_PEER_TYPE_BSS = 1,          /* Peer is BSS Peer entry */
+	WMI_PEER_TYPE_TDLS = 2,         /* Peer is a TDLS Peer */
+	WMI_PEER_TYPE_OCB = 3, /* Peer is a OCB Peer */
+	WMI_PEER_TYPE_HOST_MAX = 127,           /* Host <-> Target Peer type
+	                                         * is assigned up to 127 */
+	/* Reserved from 128 - 255 for
+	 * target internal use.*/
+	WMI_PEER_TYPE_ROAMOFFLOAD_TEMP = 128, /* Temporarily created during offload roam */
+};
+
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_create_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** peer type: see enum values above */
+	A_UINT32 peer_type;
+} wmi_peer_create_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_delete_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_peer_delete_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;         /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_flush_tids_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** tid bitmap identifying the tids to flush */
+	A_UINT32 peer_tid_bitmap;
+} wmi_peer_flush_tids_cmd_fixed_param;
+
+typedef struct {
+	/** rate mode . 0: disable fixed rate (auto rate)
+	 *   1: legacy (non 11n) rate  specified as ieee rate 2*Mbps
+	 *   2: ht20 11n rate  specified as mcs index
+	 *   3: ht40 11n rate  specified as mcs index
+	 */
+	A_UINT32 rate_mode;
+	/** 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB)
+	 *  and series 3 is stored at byte 3 (MSB) */
+	A_UINT32 rate_series;
+	/** 4 retry counts for 4 rate series. retry count for rate 0 is stored in byte 0 (LSB)
+	 *  and retry count for rate 3 is stored at byte 3 (MSB) */
+	A_UINT32 rate_retries;
+} wmi_fixed_rate;
+
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** fixed rate */
+	wmi_fixed_rate peer_fixed_rate;
+} wmi_peer_fixed_rate_cmd;
+
+#define WMI_MGMT_TID    17
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_addba_clear_resp_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_addba_clear_resp_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_addba_send_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Buffer/Window size*/
+	A_UINT32 buffersize;
+} wmi_addba_send_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_delba_send_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Is Initiator */
+	A_UINT32 initiator;
+	/** Reason code */
+	A_UINT32 reasoncode;
+} wmi_delba_send_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_addba_setresponse_cmd_fixed_param */
+	/** unique id identifying the vdev, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer mac address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** status code */
+	A_UINT32 statuscode;
+} wmi_addba_setresponse_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_send_singleamsdu_cmd_fixed_param */
+	/** unique id identifying the vdev, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer mac address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+} wmi_send_singleamsdu_cmd_fixed_param;
+
+/* Type of Station DTIM Power Save method */
+enum {
+	/* For NORMAL DTIM, the parameter is the number of beacon intervals and
+	 * also the same value as the listen interval. For this method, the
+	 * station will wake up based on the listen interval. If this
+	 * listen interval is not equal to DTIM, then the station may
+	 * miss certain DTIM beacons. If this value is 1, then the
+	 * station will wake up for every beacon.
+	 */
+	WMI_STA_DTIM_PS_NORMAL_DTIM = 0x01,
+	/* For MODULATED_DTIM, parameter is a multiple of DTIM beacons to skip.
+	 * When this value is 1, then the station will wake at every DTIM beacon.
+	 * If this value is >1, then the station will skip certain DTIM beacons.
+	 * This value is the multiple of DTIM intervals that the station will
+	 * wake up to receive the DTIM beacons.
+	 */
+	WMI_STA_DTIM_PS_MODULATED_DTIM = 0x02,
+};
+
+/* Parameter structure for the WMI_STA_DTIM_PS_METHOD_CMDID */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sta_dtim_ps_method_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* Station DTIM Power Save method as defined above */
+	A_UINT32 dtim_pwrsave_method;
+	/* DTIM PS value. Contents depends on the method */
+	A_UINT32 value;
+	/* Modulated DTIM value */
+	A_UINT32 MaxLIModulatedDTIM;
+} wmi_sta_dtim_ps_method_cmd_fixed_param;
+
+/*
+ * For Station UAPSD Auto Trigger feature, the Firmware monitors the
+ * uAPSD uplink and downlink traffic for each uAPSD enabled WMM ACs.
+ * If there is no uplink/download for the specified service interval (field service_interval),
+ * firmware will auto generate a QOS-NULL trigger for that WMM-AP with the TID value
+ * specified in the UP (field user_priority).
+ * Firmware also monitors the responses for these QOS-NULL triggers.
+ * If the peer does not have any delivery frames, it will respond with
+ * QOS-NULL (EOSP=1). This feature of only using service interval is assumed to be mandatory for all
+ * firmware implementation. For this basic implementation, the suspend_interval and delay_interval
+ * are unused and should be set to 0.
+ * When service_interval is 0, then the firmware will not send any trigger frames. This is for
+ * certain host-based implementations that don't want this firmware offload.
+ * Note that the per-AC intervals are required for some usage scenarios. This is why the intervals
+ * are given in the array of ac_param[]. For example, Voice service interval may defaults to 20 ms
+ * and rest of the AC default to 300 ms.
+ *
+ * The service bit, WMI_STA_UAPSD_VAR_AUTO_TRIG, will indicate that the more advanced feature
+ * of variable auto trigger is supported. The suspend_interval and delay_interval is used in
+ * the more advanced monitoring method.
+ * If the PEER does not have any delivery enabled data frames (non QOS-NULL) for the
+ * suspend interval (field suspend_interval), firmware will change its auto trigger interval
+ * to delay interval (field delay_interval). This way, when there is no traffic, the station
+ * will save more power by waking up less and sending less trigger frames.
+ * The (service_interval < suspend_interval) and (service_interval < delay_interval).
+ * If this variable auto trigger is not required, then the suspend_interval and delay_interval
+ * should be 0.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sta_uapsd_auto_trig_param */
+	/** WMM Access category from 0 to 3 */
+	A_UINT32 wmm_ac;
+	/** User priority to use in trigger frames. It is the TID
+	 *  value. This field needs to be specified and may not be
+	 *  equivalent to AC since some implementation may use the TSPEC
+	 *  to enable UAPSD and negotiate a particular user priority. */
+	A_UINT32 user_priority;
+	/** service interval in ms */
+	A_UINT32 service_interval;
+	/** Suspend interval in ms */
+	A_UINT32 suspend_interval;
+	/** delay interval in ms */
+	A_UINT32 delay_interval;
+} wmi_sta_uapsd_auto_trig_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sta_uapsd_auto_trig_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer mac address */
+	wmi_mac_addr peer_macaddr;
+	/** Number of AC to specify */
+	A_UINT32 num_ac;
+	/*
+	 * Following this struc is the TLV:
+	 *     wmi_sta_uapsd_auto_trig_param ac_param[]; //Variable number of AC parameters (defined by field num_ac)
+	 */
+
+} wmi_sta_uapsd_auto_trig_cmd_fixed_param;
+
+/** mimo powersave state */
+#define WMI_PEER_MIMO_PS_STATE                          0x1
+/** enable/disable AMPDU . initial value (enabled) */
+#define WMI_PEER_AMPDU                                  0x2
+/** authorize/unauthorize peer. initial value is unauthorized (0)  */
+#define WMI_PEER_AUTHORIZE                              0x3
+/** peer channel bandwidth */
+#define WMI_PEER_CHWIDTH                                0x4
+/** peer NSS */
+#define WMI_PEER_NSS                                    0x5
+/** USE 4 ADDR */
+#define WMI_PEER_USE_4ADDR                              0x6
+/* set group membership status */
+#define WMI_PEER_MEMBERSHIP                0x7
+#define WMI_PEER_USERPOS                0x8
+/*
+ * A critical high-level protocol is being used with this peer. Target
+ * should take appropriate measures (if possible) to ensure more
+ * reliable link with minimal latency. This *may* include modifying the
+ * station power save policy, enabling more RX chains, increased
+ * priority of channel scheduling, etc.
+ *
+ * NOTE: This parameter should only be considered a hint as specific
+ * behavior will depend on many factors including current network load
+ * and vdev/peer configuration.
+ *
+ * For STA VDEV this peer corresponds to the AP's BSS peer.
+ * For AP VDEV this peer corresponds to the remote peer STA.
+ */
+#define WMI_PEER_CRIT_PROTO_HINT_ENABLED                0x9
+/* set Tx failure count threshold for the peer - Currently unused */
+#define WMI_PEER_TX_FAIL_CNT_THR                        0xA
+/* Enable H/W retry and Enable H/W Send CTS2S before Data */
+#define WMI_PEER_SET_HW_RETRY_CTS2S                     0xB
+
+/* Set peer advertised IBSS atim window length */
+#define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH                0xC
+
+/** peer phy mode */
+#define WMI_PEER_PHYMODE 0xD
+
+/** mimo ps values for the parameter WMI_PEER_MIMO_PS_STATE  */
+#define WMI_PEER_MIMO_PS_NONE                          0x0
+#define WMI_PEER_MIMO_PS_STATIC                        0x1
+#define WMI_PEER_MIMO_PS_DYNAMIC                       0x2
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_set_param_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** parameter id   */
+	A_UINT32 param_id;
+	/** parametr value */
+	A_UINT32 param_value;
+} wmi_peer_set_param_cmd_fixed_param;
+
+#define MAX_SUPPORTED_RATES 128
+
+typedef struct {
+	/** total number of rates */
+	A_UINT32 num_rates;
+	/**
+	 * rates (each 8bit value) packed into a 32 bit word.
+	 * the rates are filled from least significant byte to most
+	 * significant byte.
+	 */
+	A_UINT32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
+} wmi_rate_set;
+
+/* NOTE: It would bea good idea to represent the Tx MCS
+ * info in one word and Rx in another word. This is split
+ * into multiple words for convenience
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vht_rate_set */
+	A_UINT32 rx_max_rate;           /* Max Rx data rate */
+	A_UINT32 rx_mcs_set;            /* Negotiated RX VHT rates */
+	A_UINT32 tx_max_rate;           /* Max Tx data rate */
+	A_UINT32 tx_mcs_set;            /* Negotiated TX VHT rates */
+} wmi_vht_rate_set;
+
+/*
+ * IMPORTANT: Make sure the bit definitions here are consistent
+ * with the ni_flags definitions in wlan_peer.h
+ */
+#define WMI_PEER_AUTH           0x00000001      /* Authorized for data */
+#define WMI_PEER_QOS            0x00000002      /* QoS enabled */
+#define WMI_PEER_NEED_PTK_4_WAY 0x00000004      /* Needs PTK 4 way handshake for authorization */
+#define WMI_PEER_NEED_GTK_2_WAY 0x00000010      /* Needs GTK 2 way handshake after 4-way handshake */
+#define WMI_PEER_APSD           0x00000800      /* U-APSD power save enabled */
+#define WMI_PEER_HT             0x00001000      /* HT enabled */
+#define WMI_PEER_40MHZ          0x00002000      /* 40MHz enabld */
+#define WMI_PEER_STBC           0x00008000      /* STBC Enabled */
+#define WMI_PEER_LDPC           0x00010000      /* LDPC ENabled */
+#define WMI_PEER_DYN_MIMOPS     0x00020000      /* Dynamic MIMO PS Enabled */
+#define WMI_PEER_STATIC_MIMOPS  0x00040000      /* Static MIMO PS enabled */
+#define WMI_PEER_SPATIAL_MUX    0x00200000      /* SM Enabled */
+#define WMI_PEER_VHT            0x02000000      /* VHT Enabled */
+#define WMI_PEER_80MHZ          0x04000000      /* 80MHz enabld */
+#define WMI_PEER_PMF            0x08000000      /* Robust Management Frame Protection enabled */
+/** CAUTION TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. Need to be clean up */
+#define WMI_PEER_IS_P2P_CAPABLE 0x20000000      /* P2P capable peer */
+#define WMI_PEER_160MHZ         0x40000000      /* 160 MHz enabled */
+#define WMI_PEER_SAFEMODE_EN    0x80000000      /* Fips Mode Enabled */
+
+/**
+ * Peer rate capabilities.
+ *
+ * This is of interest to the ratecontrol
+ * module which resides in the firmware. The bit definitions are
+ * consistent with that defined in if_athrate.c.
+ *
+ * @todo
+ * Move this to a common header file later so there is no need to
+ * duplicate the definitions or maintain consistency.
+ */
+#define WMI_RC_DS_FLAG          0x01    /* Dual stream flag */
+#define WMI_RC_CW40_FLAG        0x02    /* CW 40 */
+#define WMI_RC_SGI_FLAG         0x04    /* Short Guard Interval */
+#define WMI_RC_HT_FLAG          0x08    /* HT */
+#define WMI_RC_RTSCTS_FLAG      0x10    /* RTS-CTS */
+#define WMI_RC_TX_STBC_FLAG     0x20    /* TX STBC */
+#define WMI_RC_TX_STBC_FLAG_S   5       /* TX STBC */
+#define WMI_RC_RX_STBC_FLAG     0xC0    /* RX STBC ,2 bits */
+#define WMI_RC_RX_STBC_FLAG_S   6       /* RX STBC ,2 bits */
+#define WMI_RC_WEP_TKIP_FLAG    0x100   /* WEP/TKIP encryption */
+#define WMI_RC_TS_FLAG          0x200   /* Three stream flag */
+#define WMI_RC_UAPSD_FLAG       0x400   /* UAPSD Rate Control */
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_assoc_complete_cmd_fixed_param */
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** VDEV id */
+	A_UINT32 vdev_id;
+	/** assoc = 1 reassoc = 0 */
+	A_UINT32 peer_new_assoc;
+	/** peer associd (16 bits) */
+	A_UINT32 peer_associd;
+	/** peer station flags: see definition above */
+	A_UINT32 peer_flags;
+	/** negotiated capabilities (lower 16 bits)*/
+	A_UINT32 peer_caps;
+	/** Listen interval */
+	A_UINT32 peer_listen_intval;
+	/** HT capabilties of the peer */
+	A_UINT32 peer_ht_caps;
+	/** maximum rx A-MPDU length */
+	A_UINT32 peer_max_mpdu;
+	/** mpdu density of the peer in usec(0 to 16) */
+	A_UINT32 peer_mpdu_density;
+	/** peer rate capabilties see flags above */
+	A_UINT32 peer_rate_caps;
+	/** num spatial streams */
+	A_UINT32 peer_nss;
+	/** VHT capabilties of the peer */
+	A_UINT32 peer_vht_caps;
+	/** phy mode */
+	A_UINT32 peer_phymode;
+	/** HT Operation Element of the peer. Five bytes packed in 2
+	 *  INT32 array and filled from lsb to msb.
+	 *  Note that the size of array peer_ht_info[] cannotbe changed
+	 *  without breaking WMI Compatibility. */
+	A_UINT32 peer_ht_info[2];
+	/** total number of negotiated legacy rate set. Also the sizeof
+	 *  peer_legacy_rates[] */
+	A_UINT32 num_peer_legacy_rates;
+	/** total number of negotiated ht rate set. Also the sizeof
+	 *  peer_ht_rates[] */
+	A_UINT32 num_peer_ht_rates;
+	/* Following this struc are the TLV's:
+	 *     A_UINT8 peer_legacy_rates[];
+	 *     A_UINT8 peer_ht_rates[];
+	 *     wmi_vht_rate_set peer_vht_rates; //VHT capabilties of the peer
+	 */
+} wmi_peer_assoc_complete_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_add_wds_entry_cmd_fixed_param */
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** wds MAC addr */
+	wmi_mac_addr wds_macaddr;
+} wmi_peer_add_wds_entry_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_remove_wds_entry_cmd_fixed_param */
+	/** wds MAC addr */
+	wmi_mac_addr wds_macaddr;
+} wmi_peer_remove_wds_entry_cmd_fixed_param;
+
+typedef struct {
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_peer_q_empty_callback_event;
+
+/**
+ * Channel info WMI event
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param */
+	/** Error code */
+	A_UINT32 err_code;
+	/** Channel freq */
+	A_UINT32 freq;
+	/** Read flags */
+	A_UINT32 cmd_flags;
+	/** Noise Floor value */
+	A_UINT32 noise_floor;
+	/** rx clear count */
+	A_UINT32 rx_clear_count;
+	/** cycle count */
+	A_UINT32 cycle_count;
+} wmi_chan_info_event_fixed_param;
+
+/**
+ * Non wlan interference event
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_ath_dcs_cw_int */
+	A_UINT32 channel;               /* either number or freq in mhz */
+} ath_dcs_cw_int;
+
+/**
+ *  wlan_dcs_im_tgt_stats
+ *
+ */
+typedef struct _wlan_dcs_im_tgt_stats {
+	/** current running TSF from the TSF-1 */
+	A_UINT32 reg_tsf32;
+
+	/** Known last frame rssi, in case of multiple stations, if
+	 *  and at different ranges, this would not gaurantee that
+	 *  this is the least rssi.
+	 */
+	A_UINT32 last_ack_rssi;
+
+	/**  Sum of all the failed durations in the last one second interval.
+	 */
+	A_UINT32 tx_waste_time;
+	/** count how many times the hal_rxerr_phy is marked, in this
+	 *  time period
+	 */
+	A_UINT32 rx_time;
+	A_UINT32 phyerr_cnt;
+
+	/**
+	 *  WLAN IM stats from target to host
+	 *
+	 *  Below statistics are sent from target to host periodically.
+	 *  These are collected at target as long as target is running
+	 *  and target chip is not in sleep.
+	 *
+	 */
+
+	/** listen time from ANI */
+	A_INT32 listen_time;
+
+	/** tx frame count, MAC_PCU_TX_FRAME_CNT_ADDRESS */
+	A_UINT32 reg_tx_frame_cnt;
+
+	/** rx frame count, MAC_PCU_RX_FRAME_CNT_ADDRESS */
+	A_UINT32 reg_rx_frame_cnt;
+
+	/** rx clear count, MAC_PCU_RX_CLEAR_CNT_ADDRESS */
+	A_UINT32 reg_rxclr_cnt;
+
+	/** total cycle counts MAC_PCU_CYCLE_CNT_ADDRESS */
+	A_UINT32 reg_cycle_cnt;         /* delta cycle count */
+
+	/** extenstion channel rx clear count  */
+	A_UINT32 reg_rxclr_ext_cnt;
+
+	/** OFDM phy error counts, MAC_PCU_PHY_ERR_CNT_1_ADDRESS */
+	A_UINT32 reg_ofdm_phyerr_cnt;
+
+	/** CCK phy error count, MAC_PCU_PHY_ERR_CNT_2_ADDRESS */
+	A_UINT32 reg_cck_phyerr_cnt;            /* CCK err count since last reset, read from register */
+
+} wlan_dcs_im_tgt_stats_t;
+
+/**
+ *  wmi_dcs_interference_event_t
+ *
+ *  Right now this is event and stats together. Partly this is
+ *  because cw interference is handled in target now. This
+ *  can be done at host itself, if we can carry the NF alone
+ *  as a stats event. In future this would be done and this
+ *  event would carry only stats.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_dcs_interference_event_fixed_param */
+	/**
+	 * Type of the event present, either the cw interference event, or the wlan_im stats
+	 */
+	A_UINT32 interference_type;             /* type of interference, wlan or cw */
+	/*
+	 * Following this struct are these TLVs. Note that they are both array of structures
+	 * but can have at most one element. Which TLV is empty or has one element depends
+	 * on the field interference_type. This is to emulate an union with cw_int and wlan_stat
+	 * elements (not arrays).     union { ath_dcs_cw_int cw_int; wlan_dcs_im_tgt_stats_t   wlan_stat; } int_event;
+	 *
+	 *        //cw_interference event
+	 *       ath_dcs_cw_int            cw_int[];  this element
+	 *       // wlan im interfernce stats
+	 *       wlan_dcs_im_tgt_stats_t   wlan_stat[];
+	 */
+} wmi_dcs_interference_event_fixed_param;
+
+enum wmi_peer_mcast_group_action {
+	wmi_peer_mcast_group_action_add = 0,
+	wmi_peer_mcast_group_action_del = 1
+};
+#define WMI_PEER_MCAST_GROUP_FLAG_ACTION_M   0x1
+#define WMI_PEER_MCAST_GROUP_FLAG_ACTION_S   0
+#define WMI_PEER_MCAST_GROUP_FLAG_WILDCARD_M 0x2
+#define WMI_PEER_MCAST_GROUP_FLAG_WILDCARD_S 1
+/* multicast group membership commands */
+/* TODO: Converting this will be tricky since it uses an union.
+   Also, the mac_addr is not aligned. We will convert to the wmi_mac_addr */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_mcast_group_cmd_fixed_param */
+	A_UINT32 flags;
+	wmi_mac_addr ucast_mac_addr;
+	A_UINT8 mcast_ip_addr[16];              /* in network byte order */
+} wmi_peer_mcast_group_cmd_fixed_param;
+
+/** Offload Scan and Roaming related  commands */
+/** The FW performs 2 different kinds of offload scans independent
+ *  of host. One is Roam scan which is primarily performed  on a
+ *  station VDEV after association to look for a better AP that
+ *  the station VDEV can roam to. The second scan is connect scan
+ *  which is mainly performed when the station is not associated
+ *  and to look for a matching AP profile from a list of
+ *  configured profiles. */
+
+/**
+ * WMI_ROAM_SCAN_MODE: Set Roam Scan mode
+ *   the roam scan mode is one of the periodic, rssi change, both, none.
+ *   None        : Disable Roam scan. No Roam scan at all.
+ *   Periodic    : Scan periodically with a configurable period.
+ *   Rssi change : Scan when ever rssi to current AP changes by the threshold value
+ *                 set by WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD command.
+ *   Both        : Both of the above (scan when either period expires or rss to current AP changes by X amount)
+ *
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_scan_mode_fixed_param */
+	A_UINT32 roam_scan_mode;
+	A_UINT32 vdev_id;
+} wmi_roam_scan_mode_fixed_param;
+
+#define WMI_ROAM_SCAN_MODE_NONE        0x0
+#define WMI_ROAM_SCAN_MODE_PERIODIC    0x1
+#define WMI_ROAM_SCAN_MODE_RSSI_CHANGE 0x2
+#define WMI_ROAM_SCAN_MODE_BOTH        0x3
+/* Note: WMI_ROAM_SCAN_MODE_ROAMOFFLOAD is one bit not conflict with LFR2.0 SCAN_MODE. */
+#define WMI_ROAM_SCAN_MODE_ROAMOFFLOAD 0x4
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_scan_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 command_arg;
+} wmi_roam_scan_cmd_fixed_param;
+
+#define WMI_ROAM_SCAN_STOP_CMD 0x1
+
+/**
+ * WMI_ROAM_SCAN_RSSI_THRESHOLD : set scan rssi thresold
+ *  scan rssi threshold is the rssi threshold below which the FW will start running Roam scans.
+ * Applicable when WMI_ROAM_SCAN_MODE is not set to none.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_scan_rssi_threshold_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** roam scan rssi threshold */
+	A_UINT32 roam_scan_rssi_thresh;
+	/** When using Hw generated beacon RSSI interrupts */
+	A_UINT32 roam_rssi_thresh_diff;
+	/** 5G scan max count */
+	A_UINT32 hirssi_scan_max_count;
+	/** 5G scan rssi change threshold value */
+	A_UINT32 hirssi_scan_delta;
+	/** 5G scan upper bound */
+	A_UINT32 hirssi_upper_bound;
+	/* The TLVs will follow.
+	 * wmi_roam_scan_extended_threshold_param extended_param;
+	 * wmi_roam_earlystop_rssi_thres_param earlystop_param;
+	 */
+} wmi_roam_scan_rssi_threshold_fixed_param;
+
+#define WMI_ROAM_5G_BOOST_PENALIZE_ALGO_FIXED  0x0
+#define WMI_ROAM_5G_BOOST_PENALIZE_ALGO_LINEAR 0x1
+#define WMI_ROAM_5G_BOOST_PENALIZE_ALGO_LOG    0x2
+#define WMI_ROAM_5G_BOOST_PENALIZE_ALGO_EXP    0x3
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *WMITLV_TAG_STRUC_wmi_roam_scan_extended_threshold_param */
+	A_UINT32 tlv_header;
+	A_UINT32 boost_threshold_5g; /** RSSI threshold above which 5GHz RSSI is favored */
+	A_UINT32 penalty_threshold_5g; /** RSSI threshold below which 5GHz RSSI is penalized */
+	A_UINT32 boost_algorithm_5g; /** 0 == fixed, 1 == linear, 2 == logarithm ..etc */
+	A_UINT32 boost_factor_5g; /** factor by which 5GHz RSSI is boosted */
+	A_UINT32 penalty_algorithm_5g; /** 0 == fixed, 1 == linear, 2 == logarithm ..etc */
+	A_UINT32 penalty_factor_5g; /** factor by which 5GHz RSSI is penalized */
+	A_UINT32 max_boost_5g; /** maximum boost that can be applied to a 5GHz RSSI */
+	A_UINT32 max_penalty_5g; /** maximum penality that can be applied to a 5GHz RSSI */
+	/**
+	  * RSSI below which roam is kicked in by background scan
+	  * although rssi is still good
+	  */
+	A_UINT32 good_rssi_threshold;
+} wmi_roam_scan_extended_threshold_param;
+
+
+/**
+ * WMI_ROAM_SCAN_PERIOD: period for roam scan.
+ *  Applicable when the scan mode is Periodic or both.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_scan_period_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** roam scan period value */
+	A_UINT32 roam_scan_period;
+	/** Aging for Roam scans */
+	A_UINT32 roam_scan_age;
+} wmi_roam_scan_period_fixed_param;
+
+/**
+ * WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD : rssi delta to trigger the roam scan.
+ *   Rssi change threshold used when mode is Rssi change (or) Both.
+ *   The FW will run the roam scan when ever the rssi changes (up or down) by the value set by this parameter.
+ *   Note scan is triggered based on the rssi threshold condition set by WMI_ROAM_SCAN_RSSI_THRESHOLD
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_scan_rssi_change_threshold_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** roam scan rssi change threshold value */
+	A_UINT32 roam_scan_rssi_change_thresh;
+	/** When using Hw generated beacon RSSI interrupts */
+	A_UINT32 bcn_rssi_weight;
+	/** Minimum delay between two 5G scans */
+	A_UINT32 hirssi_delay_btw_scans;
+} wmi_roam_scan_rssi_change_threshold_fixed_param;
+
+#define WMI_ROAM_SCAN_CHAN_LIST_TYPE_NONE 0x1
+#define WMI_ROAM_SCAN_CHAN_LIST_TYPE_STATIC 0x2
+#define WMI_ROAM_SCAN_CHAN_LIST_TYPE_DYNAMIC 0x3
+/**
+ * TLV for roaming channel list
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_chan_list_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** WMI_CHAN_LIST_TAG */
+	A_UINT32 chan_list_type;
+	/** # if channels to scan */
+	A_UINT32 num_chan;
+/**
+ * TLV (tag length value ) parameters follow the wmi_roam_chan_list
+ * structure. The TLV's are:
+ *     A_UINT32 channel_list[];
+ **/
+} wmi_roam_chan_list_fixed_param;
+
+/** Authentication modes */
+enum {
+	WMI_AUTH_NONE,          /* no upper level auth */
+	WMI_AUTH_OPEN,          /* open */
+	WMI_AUTH_SHARED,                /* shared-key */
+	WMI_AUTH_8021X,         /* 802.1x */
+	WMI_AUTH_AUTO,          /* Auto */
+	WMI_AUTH_WPA,           /* WPA */
+	WMI_AUTH_RSNA,          /* WPA2/RSNA */
+	WMI_AUTH_CCKM,          /* CCK */
+	WMI_AUTH_WAPI,          /* WAPI */
+	WMI_AUTH_AUTO_PSK,
+	WMI_AUTH_WPA_PSK,
+	WMI_AUTH_RSNA_PSK,
+	WMI_AUTH_WAPI_PSK,
+	WMI_AUTH_FT_RSNA,               /* 11r FT */
+	WMI_AUTH_FT_RSNA_PSK,
+	WMI_AUTH_RSNA_PSK_SHA256,
+	WMI_AUTH_RSNA_8021X_SHA256,
+};
+
+typedef struct {
+	/** authentication mode (defined above)  */
+	A_UINT32 rsn_authmode;
+	/** unicast cipher set */
+	A_UINT32 rsn_ucastcipherset;
+	/** mcast/group cipher set */
+	A_UINT32 rsn_mcastcipherset;
+	/** mcast/group management frames cipher set */
+	A_UINT32 rsn_mcastmgmtcipherset;
+} wmi_rsn_params;
+
+/** looking for a wps enabled AP */
+#define WMI_AP_PROFILE_FLAG_WPS    0x1
+/** looking for a secure AP  */
+#define WMI_AP_PROFILE_FLAG_CRYPTO 0x2
+/** looking for a PMF enabled AP */
+#define WMI_AP_PROFILE_FLAG_PMF    0x4
+
+/** To match an open AP, the rs_authmode should be set to WMI_AUTH_NONE
+ *  and WMI_AP_PROFILE_FLAG_CRYPTO should be clear.
+ *  To match a WEP enabled AP, the rs_authmode should be set to WMI_AUTH_NONE
+ *  and WMI_AP_PROFILE_FLAG_CRYPTO should be set .
+ */
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ap_profile */
+	/** flags as defined above */
+	A_UINT32 flags;
+	/**
+	 * rssi thresold value: the value of the the candidate AP should
+	 * higher by this threshold than the rssi of the currrently associated AP.
+	 */
+	A_UINT32 rssi_threshold;
+	/**
+	 * ssid vlaue to be matched.
+	 */
+	wmi_ssid ssid;
+
+	/**
+	 * security params to be matched.
+	 */
+	/** authentication mode (defined above)  */
+	A_UINT32 rsn_authmode;
+	/** unicast cipher set */
+	A_UINT32 rsn_ucastcipherset;
+	/** mcast/group cipher set */
+	A_UINT32 rsn_mcastcipherset;
+	/** mcast/group management frames cipher set */
+	A_UINT32 rsn_mcastmgmtcipherset;
+} wmi_ap_profile;
+
+/** Support early stop roaming scanning when finding a strong candidate AP
+ * A 'strong' candidate is
+ * 1) Is eligible candidate
+ *    (all conditions are met in existing candidate selection).
+ * 2) Its rssi is better than earlystop threshold.
+ *    Earlystop threshold will be relaxed as each channel is scanned.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/* Minimum RSSI threshold value for early stop, unit is dB above NF. */
+	A_UINT32 roam_earlystop_thres_min;
+	/* Maminum RSSI threshold value for early stop, unit is dB above NF. */
+	A_UINT32 roam_earlystop_thres_max;
+} wmi_roam_earlystop_rssi_thres_param;
+
+/** Beacon filter wmi command info */
+
+#define BCN_FLT_MAX_SUPPORTED_IES    256
+#define BCN_FLT_MAX_ELEMS_IE_LIST    BCN_FLT_MAX_SUPPORTED_IES/32
+
+typedef struct bss_bcn_stats {
+	A_UINT32 vdev_id;
+	A_UINT32 bss_bcnsdropped;
+	A_UINT32 bss_bcnsdelivered;
+} wmi_bss_bcn_stats_t;
+
+typedef struct bcn_filter_stats {
+	A_UINT32 bcns_dropped;
+	A_UINT32 bcns_delivered;
+	A_UINT32 activefilters;
+	wmi_bss_bcn_stats_t bss_stats;
+} wmi_bcnfilter_stats_t;
+
+typedef struct wmi_add_bcn_filter_cmd {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_add_bcn_filter_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	/*
+	 * Following this structure is the TLV:
+	 *    A_UINT32   ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
+	 */
+} wmi_add_bcn_filter_cmd_fixed_param;
+
+typedef struct wmi_rmv_bcn_filter_cmd {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_rmv_bcn_filter_cmd_fixed_param */
+	A_UINT32 vdev_id;
+} wmi_rmv_bcn_filter_cmd_fixed_param;
+
+#define WMI_BCN_SEND_DTIM_ZERO         1
+#define WMI_BCN_SEND_DTIM_BITCTL_SET   2
+typedef struct wmi_bcn_send_from_host {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_bcn_send_from_host_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+	A_UINT32 data_len;
+	A_UINT32 frag_ptr;              /* Physical address of the frame */
+	A_UINT32 frame_ctrl;            /* farme ctrl to setup PPDU desc */
+	A_UINT32 dtim_flag;             /* to control CABQ traffic */
+} wmi_bcn_send_from_host_cmd_fixed_param;
+
+/* cmd to support bcn snd for all vaps at once */
+typedef struct wmi_pdev_send_bcn {
+	A_UINT32 num_vdevs;
+	wmi_bcn_send_from_host_cmd_fixed_param bcn_cmd[1];
+} wmi_pdev_send_bcn_cmd_t;
+
+/*
+ * WMI_ROAM_AP_PROFILE:  AP profile of connected AP for roaming.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_ap_profile_fixed_param */
+	/** id of AP criteria */
+	A_UINT32 id;
+
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+
+	/*
+	 * Following this structure is the TLV:
+	 *     wmi_ap_profile ap_profile; //AP profile info
+	 */
+} wmi_roam_ap_profile_fixed_param;
+
+/**
+ * WMI_OFL_SCAN_ADD_AP_PROFILE: add an AP profile.
+ */
+typedef struct {
+	/** id of AP criteria */
+	A_UINT32 id;
+
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+
+	/** AP profile info */
+	wmi_ap_profile ap_profile;
+
+} wmi_ofl_scan_add_ap_profile;
+
+/**
+ * WMI_OFL_SCAN_REMOVE_AP_CRITERIA: remove an ap profile.
+ */
+typedef struct {
+	/** id of AP criteria */
+	A_UINT32 id;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_ofl_scan_remove_ap_profile;
+
+/**
+ * WMI_OFL_SCAN_PERIOD: period in msec for offload scan.
+ *  0 will disable ofload scan and a very low value will perform a continous
+ *  scan.
+ */
+typedef struct {
+	/** offload scan period value, used for scans used when not connected */
+	A_UINT32 ofl_scan_period;
+} wmi_ofl_scan_period;
+
+/* Do not modify XXX_BYTES or XXX_LEN below as it is fixed by standard */
+#define ROAM_OFFLOAD_PMK_BYTES       (32)
+#define ROAM_OFFLOAD_PSK_MSK_BYTES   (32)
+#define ROAM_OFFLOAD_KRK_BYTES       (16)
+#define ROAM_OFFLOAD_BTK_BYTES       (32)
+#define ROAM_OFFLOAD_R0KH_ID_MAX_LEN (48)
+#define ROAM_OFFLOAD_NUM_MCS_SET     (16)
+
+/* This TLV will be filled only in case roam offload
+ * for wpa2-psk/okc/ese/11r is enabled */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_offload_fixed_param */
+	A_UINT32 rssi_cat_gap;          /* gap for every category bucket */
+	A_UINT32 prefer_5g;             /* prefer select 5G candidate */
+	A_UINT32 select_5g_margin;
+	A_UINT32 reassoc_failure_timeout;               /* reassoc failure timeout */
+	A_UINT32 capability;
+	A_UINT32 ht_caps_info;
+	A_UINT32 ampdu_param;
+	A_UINT32 ht_ext_cap;
+	A_UINT32 ht_txbf;
+	A_UINT32 asel_cap;
+	A_UINT32 qos_enabled;
+	A_UINT32 qos_caps;
+	A_UINT32 wmm_caps;
+	A_UINT32 mcsset[ROAM_OFFLOAD_NUM_MCS_SET >> 2];         /* since this 4 byte aligned,
+	                                                         * we don't declare it as
+	                                                         * tlv array */
+} wmi_roam_offload_tlv_param;
+
+/* flags for 11i offload */
+#define WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED       0       /* okc is enabled */
+/* from bit 1 to bit 31 are reserved */
+
+#define WMI_SET_ROAM_OFFLOAD_OKC_ENABLED(flag) do { \
+		(flag) |=  (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED);	  \
+} while(0)
+
+#define WMI_SET_ROAM_OFFLOAD_OKC_DISABLED(flag) do { \
+		(flag) &=  ~(1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED);	   \
+} while(0)
+
+#define WMI_GET_ROAM_OFFLOAD_OKC_ENABLED(flag)	 \
+	((flag) & (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED))
+
+/* This TLV will be  filled only in case of wpa-psk/wpa2-psk */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_11i_offload_fixed_param */
+	A_UINT32 flags;
+	/** flags. see WMI_ROAM_OFFLOAD_FLAG_ above */
+	A_UINT32 pmk[ROAM_OFFLOAD_PMK_BYTES >> 2];              /* pmk offload. As this 4 byte aligned, we don't declare it as tlv array */
+	A_UINT32 pmk_len;
+	/**the length of pmk. in normal case it should be 32, but for LEAP, is should be 16*/
+} wmi_roam_11i_offload_tlv_param;
+
+/* This TLV will be  filled only in case of 11R*/
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_11r_offload_fixed_param */
+	A_UINT32 mdie_present;
+	A_UINT32 mdid;
+	A_UINT32 r0kh_id[ROAM_OFFLOAD_R0KH_ID_MAX_LEN >> 2];
+	A_UINT32 r0kh_id_len;
+	A_UINT32 psk_msk[ROAM_OFFLOAD_PSK_MSK_BYTES >> 2];              /* psk/msk offload. As this 4 byte aligned, we don't declare it as tlv array */
+	A_UINT32 psk_msk_len;
+	/**length of psk_msk*/
+} wmi_roam_11r_offload_tlv_param;
+
+/* This TLV will be filled only in case of ESE */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_ese_offload_fixed_param */
+	A_UINT32 krk[ROAM_OFFLOAD_KRK_BYTES >> 2];              /* KRK offload. As this 4 byte aligned, we don't declare it as tlv array */
+	A_UINT32 btk[ROAM_OFFLOAD_BTK_BYTES >> 2];              /* BTK offload. As this 4 byte aligned, we don't declare it as tlv array */
+} wmi_roam_ese_offload_tlv_param;
+
+/** WMI_ROAM_EVENT: roam event triggering the host roam logic.
+ * generated when ever a better AP is found in the recent roam scan (or)
+ * when beacon miss is detected (or) when a DEAUTH/DISASSOC is received
+ * from the current AP.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_event_fixed_param  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** reason for roam event */
+	A_UINT32 reason;
+	/** associated AP's rssi calculated by FW when reason code is WMI_ROAM_REASON_LOW_RSSI*/
+	A_UINT32 rssi;
+
+} wmi_roam_event_fixed_param;
+
+#define WMI_ROAM_REASON_BETTER_AP 0x1 /** found a better AP */
+#define WMI_ROAM_REASON_BMISS     0x2 /** beacon miss detected */
+#define WMI_ROAM_REASON_DEAUTH    0x2 /** deauth/disassoc received */
+#define WMI_ROAM_REASON_LOW_RSSI  0x3 /** connected AP's low rssi condition detected */
+#define WMI_ROAM_REASON_SUITABLE_AP 0x4 /** found another AP that matches
+	                                   SSID and Security profile in
+	                                   WMI_ROAM_AP_PROFILE, found during scan
+	                                   triggered upon FINAL_BMISS **/
+#define WMI_ROAM_REASON_HO_FAILED  0x5  /** LFR3.0 roaming failed, indicate the disconnection to host */
+
+/*
+ * These will be used in WMI_ROAM_SYNCH_EVENTID for passing the subnet change
+ * info. Once roaming happens, firmware checks if subnet has changed and
+ * populates roam_reason field in WMI_ROAM_SYNCH_EVENTID using the definitions
+ * below.
+ */
+typedef enum {
+	WMI_ROAM_SUBNET_CHANGE_STATUS_UNKNOWN = 0,
+	WMI_ROAM_SUBNET_CHANGE_STATUS_UNCHANGED,
+	WMI_ROAM_SUBNET_CHANGE_STATUS_CHANGED,
+} wmi_roam_subnet_change_status;
+
+/**whenever RIC request information change, host driver should pass all ric related information to firmware (now only support tsepc)
+ * Once, 11r roaming happens, firmware can generate RIC request in reassoc request based on these informations
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ric_request_fixed_param */
+	A_UINT32 vdev_id;
+	/**unique id identifying the VDEV, generated by the caller*/
+	A_UINT32 num_ric_request;
+	/**number of ric request ie send to firmware.(max value is 2 now)*/
+	A_UINT32 is_add_ric;
+	/**support add ric or delete ric*/
+} wmi_ric_request_fixed_param;
+
+/**tspec element: refer to 8.4.2.32 of 802.11 2012 spec
+ * these elements are used to construct tspec field in RIC request, which allow station to require specific TS when 11r roaming
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 ts_info;                     /** bits value of TS Info field.*/
+	A_UINT32 nominal_msdu_size;                     /**Nominal MSDU Size field*/
+	A_UINT32 maximum_msdu_size;                     /**The Maximum MSDU Size field*/
+	A_UINT32 min_service_interval;                     /**The Minimum Service Interval field*/
+	A_UINT32 max_service_interval;                     /**The Maximum Service Interval field*/
+	A_UINT32 inactivity_interval;                     /**The Inactivity Interval field*/
+	A_UINT32 suspension_interval;                     /**The Suspension Interval field*/
+	A_UINT32 svc_start_time;                     /**The Service Start Time field*/
+	A_UINT32 min_data_rate;                     /**The Minimum Data Rate field*/
+	A_UINT32 mean_data_rate;                     /**The Mean Data Rate field*/
+	A_UINT32 peak_data_rate;                     /**The Peak Data Rate field*/
+	A_UINT32 max_burst_size;                     /**The Burst Size field*/
+	A_UINT32 delay_bound;                     /**The Delay Bound field*/
+	A_UINT32 min_phy_rate;                     /**The Minimum PHY Rate field*/
+	A_UINT32 surplus_bw_allowance;                     /**The Surplus Bandwidth Allowance field*/
+	A_UINT32 medium_time;                     /**The Medium Time field,in units of 32 us/s.*/
+} wmi_ric_tspec;
+
+/* flags for roam_invoke_cmd */
+/* add this channel into roam cache channel list after this command is finished */
+#define WMI_ROAM_INVOKE_FLAG_ADD_CH_TO_CACHE       0
+/* from bit 1 to bit 31 are reserved */
+
+#define WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \
+	(flag) |=  (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE);      \
+	} while(0)
+
+#define WMI_CLEAR_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \
+	(flag) &=  ~(1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE);      \
+	} while(0)
+
+#define WMI_GET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag)   \
+        ((flag) & (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE))
+
+
+#define WMI_ROAM_INVOKE_SCAN_MODE_FIXED_CH      0   /* scan given channel only */
+#define WMI_ROAM_INVOKE_SCAN_MODE_CACHE_LIST    1   /* scan cached channel list */
+#define WMI_ROAM_INVOKE_SCAN_MODE_FULL_CH       2   /* scan full channel */
+
+#define WMI_ROAM_INVOKE_AP_SEL_FIXED_BSSID      0   /* roam to given BSSID only */
+#define WMI_ROAM_INVOKE_AP_SEL_ANY_BSSID        1   /* roam to any BSSID */
+
+/** WMI_ROAM_INVOKE_CMD: command to invoke roaming forcefully
+ *
+ * if <roam_scan_ch_mode> is zero and <channel_no> is not given, roaming is not executed.
+ * if <roam_ap_sel_mode> is zero and <BSSID) is not given, roaming is not executed
+ *
+ * This command can be used to add specific channel into roam cached channel list by following
+ * <roam_scan_ch_mode> = 0
+ * <roam_ap_sel_mode> = 0
+ * <roam_delay> = 0
+ * <flag> |= WMI_ROAM_INVOKE_FLAG_ADD_CH_TO_CACHE
+ * <BSSID> = do not fill (there will be no actual roaming because of ap_sel_mode is zero, but no BSSID is given)
+ * <channel_no> = channel list to be added
+ */
+typedef struct {
+	A_UINT32 tlv_header;     /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_invoke_fixed_param */
+	A_UINT32 vdev_id; /** Unique id identifying the VDEV on which roaming is invoked */
+	A_UINT32 flags;   /** flags. see WMI_ROAM_INVOKE_FLAG_ above */
+	A_UINT32 roam_scan_mode; /** see WMI_ROAM_INVOKE_SCAN_ above */
+	A_UINT32 roam_ap_sel_mode; /** see WMI_ROAM_INVOKE_AP_SEL_ above */
+	A_UINT32 roam_delay; /** 0 = immediate roam, 1-2^32 = roam after this delay (msec) */
+	A_UINT32 num_chan; /** # if channels to scan. In the TLV channel_list[] */
+	A_UINT32 num_bssid;  /** number of bssids. In the TLV bssid_list[] */
+	/**
+	 * TLV (tag length value ) parameters follows roam_invoke_req
+	 * The TLV's are:
+	 *     A_UINT32 channel_list[];
+	 *     wmi_mac_addr bssid_list[];
+	 */
+} wmi_roam_invoke_cmd_fixed_param;
+
+/* Definition for op_bitmap */
+enum {
+	ROAM_FILTER_OP_BITMAP_BLACK_LIST =   0x1,
+	ROAM_FILTER_OP_BITMAP_WHITE_LIST =   0x2,
+	ROAM_FILTER_OP_BITMAP_PREFER_BSSID = 0x4,
+};
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_filter_list_fixed_param */
+	A_UINT32 tlv_header;
+	/** Unique id identifying the VDEV on which roaming filter is adopted */
+	A_UINT32 vdev_id;
+	A_UINT32 flags; /** flags for filter */
+	/** 32 bit bitmap to be set on.
+	 * bit0 = first param,
+	 * bit 1 = second param...etc. Can be or'ed
+	 */
+	A_UINT32 op_bitmap;
+	/* number of blacklist in the TLV variable bssid_black_list */
+	A_UINT32 num_bssid_black_list;
+	/* number of whitelist in the TLV variable ssid_white_list */
+	A_UINT32 num_ssid_white_list;
+	/* only for lfr 3.0. number of preferred list & factor in the TLV */
+	A_UINT32 num_bssid_preferred_list;
+	/**
+	 * TLV (tag length value ) parameters follows roam_filter_list_cmd
+	 * The TLV's are:
+	 *     wmi_mac_addr bssid_black_list[];
+	 *     wmi_ssid ssid_white_list[];
+	 *     wmi_mac_addr bssid_preferred_list[];
+	 *     A_UINT32 bssid_preferred_factor[];
+	 */
+} wmi_roam_filter_fixed_param;
+
+typedef struct {
+	A_UINT8 address[4]; /* IPV4 address in Network Byte Order */
+} WMI_IPV4_ADDR;
+
+typedef struct _WMI_IPV6_ADDR {
+	A_UINT8 address[16]; /* IPV6 in Network Byte Order */
+} WMI_IPV6_ADDR;
+
+/* flags for subnet change detection */
+#define WMI_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED 0
+#define WMI_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED 1
+/* bit 2 to bit 31 are reserved */
+
+/* set IPv4 enabled/disabled flag and get the flag */
+#define WMI_SET_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED(flag) do { \
+	(flag) |= (1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED); \
+} while (0)
+
+#define WMI_SET_ROAM_SUBNET_CHANGE_FLAG_IP4_DISABLED(flag) do { \
+	(flag) &= ~(1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED); \
+} while (0)
+
+#define WMI_GET_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED(flag) \
+	((flag) & (1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP4_ENABLED))
+
+/* set IPv6 enabled flag, disabled and get the flag */
+#define WMI_SET_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED(flag) do { \
+	(flag) |= (1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED); \
+} while (0)
+
+#define WMI_SET_ROAM_SUBNET_CHANGE_FLAG_IP6_DISABLED(flag) do { \
+	(flag) &= ~(1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED); \
+} while (0)
+
+#define WMI_GET_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED(flag) \
+	((flag) & (1 << WMI_ROAM_SUBNET_CHANGE_FLAG_IP6_ENABLED))
+
+/**
+ * WMI_ROAM_SUBNET_CHANGE_CONFIG : Pass the gateway IP and MAC addresses
+ *  to FW. FW uses these parameters for subnet change detection.
+ */
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_roam_subnet_change_config_fixed_param
+	 */
+	A_UINT32      tlv_header;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32      vdev_id;
+	/** IPv4/IPv6 enabled/disabled */
+	/** This flag sets the WMI_SET_ROAM_SUBNET_CHANGE_FLAG_xxx_ENABLED/
+	DISABLED */
+	A_UINT32      flag;
+	/** Gateway MAC address */
+	wmi_mac_addr  inet_gw_mac_addr;
+	/** IP addresses */
+	WMI_IPV4_ADDR inet_gw_ip_v4_addr;
+	WMI_IPV6_ADDR inet_gw_ip_v6_addr;
+	/** Number of software retries for ARP/Neighbor solicitation request */
+	A_UINT32      max_retries;
+	/** timeout in milliseconds for each ARP request*/
+	A_UINT32      timeout;
+	/** number of skipped aps **/
+	A_UINT32      num_skip_subnet_change_detection_bssid_list;
+/**
+ * TLV (tag length value ) parameters follows roam_subnet_change_config_cmd
+ * structure. The TLV's are:
+ *     wmi_mac_addr skip_subnet_change_detection_bssid_list [];
+ **/
+} wmi_roam_subnet_change_config_fixed_param;
+
+/** WMI_PROFILE_MATCH_EVENT: offload scan
+ * generated when ever atleast one of the matching profiles is found
+ * in recent NLO scan. no data is carried with the event.
+ */
+
+/** P2P specific commands */
+
+/**
+ * WMI_P2P_DEV_SET_DEVICE_INFO : p2p device info, which will be used by
+ * FW to generate P2P IE tobe carried in probe response frames.
+ * FW will respond to probe requests while in listen state.
+ */
+typedef struct {
+	/* number of secondary device types,supported */
+	A_UINT32 num_secondary_dev_types;
+	/**
+	 * followed by 8 bytes of primary device id and
+	 * num_secondary_dev_types * 8 bytes of secondary device
+	 * id.
+	 */
+} wmi_p2p_dev_set_device_info;
+
+/** WMI_P2P_DEV_SET_DISCOVERABILITY: enable/disable discoverability
+ *  state. if enabled, an active STA/AP will respond to P2P probe requests on
+ *  the operating channel of the VDEV.
+ */
+
+typedef struct {
+	/* 1:enable disoverability, 0:disable discoverability */
+	A_UINT32 enable_discoverability;
+} wmi_p2p_set_discoverability;
+
+/** WMI_P2P_GO_SET_BEACON_IE: P2P IE to be added to
+ *  beacons generated by FW. used in FW beacon mode.
+ *  the FW will add this IE to beacon in addition to the beacon
+ *  template set by WMI_BCN_TMPL_CMDID command.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_go_set_beacon_ie_fixed_param  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* ie length */
+	A_UINT32 ie_buf_len;
+	/* Following this structure is the TLV byte stream of ie data of length ie_buf_len:
+	 *     A_UINT8 ie_data[];    // length in byte given by field num_data.
+	 */
+
+} wmi_p2p_go_set_beacon_ie_fixed_param;
+
+/** WMI_P2P_GO_PROBE_RESP_IE: P2P IE to be added to
+ *  probe response generated by FW. used in FW beacon mode.
+ *  the FW will add this IE to probe response in addition to the probe response
+ *  template set by WMI_PRB_TMPL_CMDID command.
+ */
+typedef struct {
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* ie length */
+	A_UINT32 ie_buf_len;
+	/*followed by  byte stream of ie data of length ie_buf_len */
+} wmi_p2p_go_set_probe_resp_ie;
+
+/** WMI_P2P_SET_VENDOR_IE_DATA_CMDID: Vendor specific P2P IE data, which will
+ *  be used by the FW to parse the P2P NoA attribute in beacons, probe resposes
+ *  and action frames received by the P2P Client.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_set_vendor_ie_data_cmd_fixed_param */
+	/** OS specific P2P IE OUI (3 bytes) + OUI type (1 byte)  */
+	A_UINT32 p2p_ie_oui_type;
+	/** OS specific NoA Attribute ID */
+	A_UINT32 p2p_noa_attribute;
+} wmi_p2p_set_vendor_ie_data_cmd_fixed_param;
+
+/*----P2P disc offload definition  ----*/
+
+typedef struct {
+	A_UINT32 pattern_type;
+	/**
+	 * TLV (tag length value )  paramerters follow the pattern structure.
+	 * TLV can contain bssid list, ssid list and
+	 * ie. the TLV tags are defined above;
+	 */
+} wmi_p2p_disc_offload_pattern_cmd;
+
+typedef struct {
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* mgmt type of the ie */
+	A_UINT32 mgmt_type;
+	/* ie length */
+	A_UINT32 ie_buf_len;
+	/*followed by  byte stream of ie data of length ie_buf_len */
+} wmi_p2p_disc_offload_appie_cmd;
+
+typedef struct {
+	/* enable/disable p2p find offload */
+	A_UINT32 enable;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* p2p find type */
+	A_UINT32 disc_type;
+	/* p2p find perodic */
+	A_UINT32 perodic;
+	/* p2p find listen channel */
+	A_UINT32 listen_channel;
+	/* p2p find full channel number */
+	A_UINT32 num_scan_chans;
+	/**
+	 * TLV (tag length value )  paramerters follow the pattern structure.
+	 * TLV  contain channel list
+	 */
+} wmi_p2p_disc_offload_config_cmd;
+
+/*----P2P OppPS definition  ----*/
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_set_oppps_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* OppPS attributes */
+	/** Bit  0: Indicate enable/disable of OppPS
+	 *	Bits 7-1:	Ctwindow in TUs
+	 *	Bits 31-8:  Reserved
+	 */
+	A_UINT32 oppps_attr;
+} wmi_p2p_set_oppps_cmd_fixed_param;
+
+#define WMI_UNIFIED_OPPPS_ATTR_ENALBED          0x1
+#define WMI_UNIFIED_OPPPS_ATTR_ENALBED_S        0
+
+#define WMI_UNIFIED_OPPPS_ATTR_IS_ENABLED(hdr)			 \
+	WMI_F_MS((hdr)->oppps_attr, WMI_UNIFIED_OPPPS_ATTR_ENALBED)
+
+#define WMI_UNIFIED_OPPPS_ATTR_ENABLED_SET(hdr)			\
+	WMI_F_RMW((hdr)->oppps_attr, 0x1,		 \
+		  WMI_UNIFIED_OPPPS_ATTR_ENALBED);
+
+#define WMI_UNIFIED_OPPPS_ATTR_CTWIN            0xfe
+#define WMI_UNIFIED_OPPPS_ATTR_CTWIN_S          1
+
+#define WMI_UNIFIED_OPPPS_ATTR_CTWIN_GET(hdr)			     \
+	WMI_F_MS((hdr)->oppps_attr, WMI_UNIFIED_OPPPS_ATTR_CTWIN)
+
+#define WMI_UNIFIED_OPPPS_ATTR_CTWIN_SET(hdr, v)		\
+	WMI_F_RMW((hdr)->oppps_attr, (v) & 0x7f,	    \
+		  WMI_UNIFIED_OPPPS_ATTR_CTWIN);
+
+typedef struct {
+	A_UINT32 time32;                /* upper 32 bits of time stamp */
+	A_UINT32 time0;         /* lower 32 bits of time stamp */
+} A_TIME64;
+
+typedef enum wmi_peer_sta_kickout_reason {
+	WMI_PEER_STA_KICKOUT_REASON_UNSPECIFIED = 0,            /* default value to preserve legacy behavior */
+	WMI_PEER_STA_KICKOUT_REASON_XRETRY = 1,
+	WMI_PEER_STA_KICKOUT_REASON_INACTIVITY = 2,
+	WMI_PEER_STA_KICKOUT_REASON_IBSS_DISCONNECT = 3,
+	WMI_PEER_STA_KICKOUT_REASON_TDLS_DISCONNECT = 4,                /* TDLS peer has disappeared. All tx is failing */
+	WMI_PEER_STA_KICKOUT_REASON_SA_QUERY_TIMEOUT = 5,
+} PEER_KICKOUT_REASON;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_sta_kickout_event_fixed_param  */
+	/** peer mac address */
+	wmi_mac_addr peer_macaddr;
+	/** Reason code, defined as above */
+	A_UINT32 reason;
+	/** RSSI of the last bcn (averaged) in dB. 0 means Noise Floor value */
+	A_UINT32 rssi;
+} wmi_peer_sta_kickout_event_fixed_param;
+
+#define WMI_WLAN_PROFILE_MAX_HIST     3
+#define WMI_WLAN_PROFILE_MAX_BIN_CNT 32
+
+typedef struct _wmi_wlan_profile_t {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_t */
+	A_UINT32 id;
+	A_UINT32 cnt;
+	A_UINT32 tot;
+	A_UINT32 min;
+	A_UINT32 max;
+	A_UINT32 hist_intvl;
+	A_UINT32 hist[WMI_WLAN_PROFILE_MAX_HIST];
+} wmi_wlan_profile_t;
+
+typedef struct _wmi_wlan_profile_ctx_t {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_ctx_t */
+	A_UINT32 tot;           /* time in us */
+	A_UINT32 tx_msdu_cnt;
+	A_UINT32 tx_mpdu_cnt;
+	A_UINT32 tx_ppdu_cnt;
+	A_UINT32 rx_msdu_cnt;
+	A_UINT32 rx_mpdu_cnt;
+	A_UINT32 bin_count;
+} wmi_wlan_profile_ctx_t;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_trigger_cmd_fixed_param */
+	A_UINT32 enable;
+} wmi_wlan_profile_trigger_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_get_prof_data_cmd_fixed_param */
+	A_UINT32 value;
+} wmi_wlan_profile_get_prof_data_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_set_hist_intvl_cmd_fixed_param */
+	A_UINT32 profile_id;
+	A_UINT32 value;
+} wmi_wlan_profile_set_hist_intvl_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wlan_profile_enable_profile_id_cmd_fixed_param */
+	A_UINT32 profile_id;
+	A_UINT32 enable;
+} wmi_wlan_profile_enable_profile_id_cmd_fixed_param;
+
+/*Wifi header is upto 26, LLC is 8, with 14 byte duplicate in 802.3 header, that's 26+8-14=20.
+   146-128=18. So this means it is converted to non-QoS header. Riva FW take care of the QOS/non-QOS
+   when comparing wifi header.*/
+/* NOTE: WOW_DEFAULT_BITMAP_PATTERN_SIZE(_DWORD) and WOW_DEFAULT_BITMASK_SIZE(_DWORD) can't be changed without breaking the compatibility */
+#define WOW_DEFAULT_BITMAP_PATTERN_SIZE      146
+#define WOW_DEFAULT_BITMAP_PATTERN_SIZE_DWORD 37        /* Convert WOW_DEFAULT_EVT_BUF_SIZE into Int32 size */
+#define WOW_DEFAULT_BITMASK_SIZE             146
+#define WOW_DEFAULT_BITMASK_SIZE_DWORD        37
+#define WOW_MAX_BITMAP_FILTERS               32
+#define WOW_DEFAULT_MAGIG_PATTERN_MATCH_CNT  16
+#define WOW_EXTEND_PATTERN_MATCH_CNT         16
+#define WOW_SHORT_PATTERN_MATCH_CNT           8
+#define WOW_DEFAULT_EVT_BUF_SIZE             148        /* Maximum 148 bytes of the data is copied starting from header incase if the match is found.
+	                                                   The 148 comes from (128 - 14 )  payload size  + 8bytes LLC + 26bytes MAC header */
+#define WOW_DEFAULT_IOAC_PATTERN_SIZE  6
+#define WOW_DEFAULT_IOAC_PATTERN_SIZE_DWORD 2
+#define WOW_DEFAULT_IOAC_RANDOM_SIZE  6
+#define WOW_DEFAULT_IOAC_RANDOM_SIZE_DWORD 2
+#define WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_SIZE   120
+#define WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_SIZE_DWORD 30
+#define WOW_DEFAULT_IOAC_SOCKET_PATTERN_SIZE 32
+#define WOW_DEFAULT_IOAC_SOCKET_PATTERN_SIZE_DWORD 8
+#define WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_REV_SIZE 32
+#define WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_REV_SIZE_DWORD 8
+
+typedef enum pattern_type_e {
+	WOW_PATTERN_MIN = 0,
+	WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
+	WOW_IPV4_SYNC_PATTERN,
+	WOW_IPV6_SYNC_PATTERN,
+	WOW_WILD_CARD_PATTERN,
+	WOW_TIMER_PATTERN,
+	WOW_MAGIC_PATTERN,
+	WOW_IPV6_RA_PATTERN,
+	WOW_IOAC_PKT_PATTERN,
+	WOW_IOAC_TMR_PATTERN,
+	WOW_IOAC_SOCK_PATTERN,
+	WOW_PATTERN_MAX
+} WOW_PATTERN_TYPE;
+
+typedef enum event_type_e {
+	WOW_BMISS_EVENT = 0,
+	WOW_BETTER_AP_EVENT,
+	WOW_DEAUTH_RECVD_EVENT,
+	WOW_MAGIC_PKT_RECVD_EVENT,
+	WOW_GTK_ERR_EVENT,
+	WOW_FOURWAY_HSHAKE_EVENT,
+	WOW_EAPOL_RECVD_EVENT,
+	WOW_NLO_DETECTED_EVENT,
+	WOW_DISASSOC_RECVD_EVENT,
+	WOW_PATTERN_MATCH_EVENT,
+	WOW_CSA_IE_EVENT,
+	WOW_PROBE_REQ_WPS_IE_EVENT,
+	WOW_AUTH_REQ_EVENT,
+	WOW_ASSOC_REQ_EVENT,
+	WOW_HTT_EVENT,
+	WOW_RA_MATCH_EVENT,
+	WOW_HOST_AUTO_SHUTDOWN_EVENT,
+	WOW_IOAC_MAGIC_EVENT,
+	WOW_IOAC_SHORT_EVENT,
+	WOW_IOAC_EXTEND_EVENT,
+	WOW_IOAC_TIMER_EVENT,
+	WOW_DFS_PHYERR_RADAR_EVENT,
+	WOW_BEACON_EVENT,
+	WOW_CLIENT_KICKOUT_EVENT,
+	WOW_NAN_EVENT,
+	WOW_EXTSCAN_EVENT,
+	WOW_IOAC_REV_KA_FAIL_EVENT,
+	WOW_IOAC_SOCK_EVENT,
+	WOW_NLO_SCAN_COMPLETE_EVENT,
+} WOW_WAKE_EVENT_TYPE;
+
+typedef enum wake_reason_e {
+	WOW_REASON_UNSPECIFIED = -1,
+	WOW_REASON_NLOD = 0,
+	WOW_REASON_AP_ASSOC_LOST,
+	WOW_REASON_LOW_RSSI,
+	WOW_REASON_DEAUTH_RECVD,
+	WOW_REASON_DISASSOC_RECVD,
+	WOW_REASON_GTK_HS_ERR,
+	WOW_REASON_EAP_REQ,
+	WOW_REASON_FOURWAY_HS_RECV,
+	WOW_REASON_TIMER_INTR_RECV,
+	WOW_REASON_PATTERN_MATCH_FOUND,
+	WOW_REASON_RECV_MAGIC_PATTERN,
+	WOW_REASON_P2P_DISC,
+	WOW_REASON_WLAN_HB,
+	WOW_REASON_CSA_EVENT,
+	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
+	WOW_REASON_AUTH_REQ_RECV,
+	WOW_REASON_ASSOC_REQ_RECV,
+	WOW_REASON_HTT_EVENT,
+	WOW_REASON_RA_MATCH,
+	WOW_REASON_HOST_AUTO_SHUTDOWN,
+	WOW_REASON_IOAC_MAGIC_EVENT,
+	WOW_REASON_IOAC_SHORT_EVENT,
+	WOW_REASON_IOAC_EXTEND_EVENT,
+	WOW_REASON_IOAC_TIMER_EVENT,
+	WOW_REASON_ROAM_HO,
+	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
+	WOW_REASON_BEACON_RECV,
+	WOW_REASON_CLIENT_KICKOUT_EVENT,
+	WOW_REASON_NAN_EVENT,
+	WOW_REASON_EXTSCAN,
+	WOW_REASON_RSSI_BREACH_EVENT,
+	WOW_REASON_IOAC_REV_KA_FAIL_EVENT,
+	WOW_REASON_IOAC_SOCK_EVENT,
+	WOW_REASON_NLO_SCAN_COMPLETE,
+	WOW_REASON_PACKET_FILTER_MATCH,
+	WOW_REASON_ASSOC_RES_RECV,
+	WOW_REASON_REASSOC_REQ_RECV,
+	WOW_REASON_REASSOC_RES_RECV,
+	WOW_REASON_ACTION_FRAME_RECV,
+	WOW_REASON_DEBUG_TEST = 0xFF,
+} WOW_WAKE_REASON_TYPE;
+
+typedef enum {
+	WOW_IFACE_PAUSE_ENABLED,
+	WOW_IFACE_PAUSE_DISABLED
+} WOW_IFACE_STATUS;
+
+enum {
+	/* some win10 platfrom will not assert pcie_reset for wow.*/
+	WMI_WOW_FLAG_IGNORE_PCIE_RESET = 0x00000001,
+};
+
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wow_enable_cmd_fixed_param  */
+	A_UINT32 enable;
+	A_UINT32 pause_iface_config;
+	A_UINT32 flags;  /* WMI_WOW_FLAG enums */
+} wmi_wow_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_wow_hostwakeup_from_sleep_cmd_fixed_param  */
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_wow_hostwakeup_from_sleep_cmd_fixed_param;
+
+#define WOW_ICMPV6_NA_FILTER_DISABLE 0
+#define WOW_ICMPV6_NA_FILTER_ENABLE 1
+
+typedef struct {
+	/* TLV tag and len;
+	 * tag equals WMITLV_TAG_STRUC_wmi_wow_enable_icmpv6_na_flt_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 enable; /* WOW_ICMPV6_NA_FILTER_ENABLE/DISABLE */
+} wmi_wow_enable_icmpv6_na_flt_cmd_fixed_param;
+
+typedef struct bitmap_pattern_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_BITMAP_PATTERN_T */
+	A_UINT32 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE_DWORD];
+	A_UINT32 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE_DWORD];
+	A_UINT32 pattern_offset;
+	A_UINT32 pattern_len;
+	A_UINT32 bitmask_len;
+	A_UINT32 pattern_id;            /* must be less than max_bitmap_filters */
+} WOW_BITMAP_PATTERN_T;
+
+typedef struct ipv4_sync_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_IPV4_SYNC_PATTERN_T */
+	A_UINT32 ipv4_src_addr;
+	A_UINT32 ipv4_dst_addr;
+	A_UINT32 tcp_src_prt;
+	A_UINT32 tcp_dst_prt;
+} WOW_IPV4_SYNC_PATTERN_T;
+
+typedef struct ipv6_sync_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_IPV6_SYNC_PATTERN_T */
+	A_UINT32 ipv6_src_addr[4];
+	A_UINT32 ipv6_dst_addr[4];
+	A_UINT32 tcp_src_prt;
+	A_UINT32 tcp_dst_prt;
+} WOW_IPV6_SYNC_PATTERN_T;
+
+typedef struct WOW_MAGIC_PATTERN_CMD {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_MAGIC_PATTERN_CMD */
+	wmi_mac_addr macaddr;
+} WOW_MAGIC_PATTERN_CMD;
+
+typedef enum wow_ioac_pattern_type {
+	WOW_IOAC_MAGIC_PATTERN = 1,
+	WOW_IOAC_SHORT_PATTERN,
+	WOW_IOAC_EXTEND_PATTERN,
+} WOW_IOAC_PATTERN_TYPE;
+
+typedef struct ioac_sock_pattern_s {
+	/**
+	 * TLV tag and len;
+	 * tag equals WMITLV_TAG_STRUC_WOW_IOAC_SOCK_PATTERN_T
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 id;
+	A_UINT32 local_ipv4;
+	A_UINT32 remote_ipv4;
+	A_UINT32 local_port;
+	A_UINT32 remote_port;
+	A_UINT32 pattern_len; /* units = bytes */
+	A_UINT32 pattern[WOW_DEFAULT_IOAC_SOCKET_PATTERN_SIZE_DWORD];
+} WOW_IOAC_SOCK_PATTERN_T;
+
+typedef struct ioac_pkt_pattern_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_IOAC_PKT_PATTERN_T */
+	A_UINT32 pattern_type;
+	A_UINT32 pattern[WOW_DEFAULT_IOAC_PATTERN_SIZE_DWORD];
+	A_UINT32 random[WOW_DEFAULT_IOAC_RANDOM_SIZE_DWORD];
+	A_UINT32 pattern_len;
+	A_UINT32 random_len;
+} WOW_IOAC_PKT_PATTERN_T;
+
+typedef struct ioac_tmr_pattern_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_IOAC_TMR_PATTERN_T */
+	A_UINT32 wake_in_s;
+	A_UINT32 vdev_id;
+} WOW_IOAC_TMR_PATTERN_T;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_KEEPALIVE_CMD_fixed_param */
+	A_UINT32 nID;
+} WMI_WOW_IOAC_ADD_KEEPALIVE_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_KEEPALIVE_CMD_fixed_param */
+	A_UINT32 nID;
+} WMI_WOW_IOAC_DEL_KEEPALIVE_CMD_fixed_param;
+
+typedef struct ioac_keepalive_s {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_IOAC_KEEPALIVE_T */
+	A_UINT32
+		keepalive_pkt_buf
+	[WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_SIZE_DWORD];
+	A_UINT32 keepalive_pkt_len;
+	A_UINT32 period_in_ms;
+	A_UINT32 vdev_id;
+	A_UINT32 max_loss_cnt;
+	A_UINT32 local_ipv4;
+	A_UINT32 remote_ipv4;
+	A_UINT32 local_port;
+	A_UINT32 remote_port;
+	A_UINT32 recv_period_in_ms;
+	A_UINT32 rev_ka_size;
+	A_UINT32 rev_ka_data[WOW_DEFAULT_IOAC_KEEP_ALIVE_PKT_REV_SIZE_DWORD];
+} WMI_WOW_IOAC_KEEPALIVE_T;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_IOAC_ADD_PATTERN_CMD_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_type;
+/*
+ * Following this struct are these TLVs. Note that they are all array of structures
+ * but can have at most one element. Which TLV is empty or has one element depends
+ * on the field pattern_type. This is to emulate an union.
+ *     WOW_IOAC_PKT_PATTERN_T pattern_info_pkt[];
+ *     WOW_IOAC_TMR_PATTERN_T pattern_info_tmr[];
+ */
+} WMI_WOW_IOAC_ADD_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_IOAC_DEL_PATTERN_CMD_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_type;
+	A_UINT32 pattern_id;
+} WMI_WOW_IOAC_DEL_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;        /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_ADD_PATTERN_CMD_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_id;
+	A_UINT32 pattern_type;
+	/*
+	 * Following this struct are these TLVs. Note that they are all array of structures
+	 * but can have at most one element. Which TLV is empty or has one element depends
+	 * on the field pattern_type. This is to emulate an union.
+	 *     WOW_BITMAP_PATTERN_T       pattern_info_bitmap[];
+	 *     WOW_IPV4_SYNC_PATTERN_T    pattern_info_ipv4[];
+	 *     WOW_IPV6_SYNC_PATTERN_T    pattern_info_ipv6[];
+	 *     WOW_MAGIC_PATTERN_CMD      pattern_info_magic_pattern[];
+	 *     A_UINT32                   pattern_info_timeout[];
+	 *     A_UINT32                   ra_ratelimit_interval;
+	 */
+} WMI_WOW_ADD_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;        /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_DEL_PATTERN_CMD_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_id;
+	A_UINT32 pattern_type;
+} WMI_WOW_DEL_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_WOW_ADD_DEL_EVT_CMD_fixed_param  */
+	A_UINT32 vdev_id;
+	A_UINT32 is_add;
+	A_UINT32 event_bitmap;
+} WMI_WOW_ADD_DEL_EVT_CMD_fixed_param;
+
+/*
+ * This structure is used to set the pattern to check UDP packet in WOW mode.
+ * If match, construct a tx frame in a local buffer to send through the peer
+ * AP to the entity in the IP network that sent the UDP packet to this STA.
+ */
+typedef struct {
+	/*
+	 * TLV tag and len;
+	 *  tag equals WMITLV_TAG_STRUC_WMI_WOW_UDP_SVC_OFLD_CMD_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 enable; /* 1: enable, 0: disable */
+	/*
+	 * dest_port -
+	 *  bits 7:0  contain the LSB of the UDP dest port,
+	 *  bits 15:8 contain the MSB of the UDP dest port
+	 */
+	A_UINT32 dest_port;
+	A_UINT32 pattern_len; /* length in byte of pattern[] */
+	A_UINT32 response_len; /* length in byte of response[] */
+	/*
+	 * Following this struct are the TLV's:
+	 *  payload of UDP packet to be checked, network byte order
+	 *   A_UINT8 pattern[];
+	 *  payload of UDP packet to be response, network byte order
+	 *   A_UINT8 response[];
+	 */
+} WMI_WOW_UDP_SVC_OFLD_CMD_fixed_param;
+
+/*
+ * This structure is used to set the pattern for WOW host wakeup pin pulse
+ * pattern confirguration.
+ */
+typedef struct {
+	/*
+	* TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_WMI_WOW_HOSTWAKEUP_PIN_PATTERN_CONFIG_CMD_fixed_param
+	*/
+	A_UINT32 tlv_header;
+
+	/* 1: enable, 0: disable */
+	A_UINT32 enable;
+
+	/* pin for host wakeup */
+	A_UINT32 pin;
+
+	/* interval for keeping low voltage, unit: ms */
+	A_UINT32 interval_low;
+
+	/* interval for keeping high voltage, unit: ms */
+	A_UINT32 interval_high;
+
+	/* repeat times for pulse (0xffffffff means forever) */
+	A_UINT32 repeat_cnt;
+} WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD_fixed_param;
+
+typedef struct wow_event_info_s {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_EVENT_INFO_fixed_param  */
+	A_UINT32 vdev_id;
+	A_UINT32 flag;          /*This is current reserved. */
+	A_INT32 wake_reason;
+	A_UINT32 data_len;
+} WOW_EVENT_INFO_fixed_param;
+
+typedef struct wow_initial_wakeup_event_s {
+	/*
+	 * TLV tag and len; tag equals
+	 * WOW_INITIAL_WAKEUP_EVENT_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+} WOW_INITIAL_WAKEUP_EVENT_fixed_param;
+
+typedef enum {
+	WOW_EVENT_INFO_TYPE_PACKET = 0x0001,
+	WOW_EVENT_INFO_TYPE_BITMAP,
+	WOW_EVENT_INFO_TYPE_GTKIGTK,
+} WOW_EVENT_INFO_TYPE;
+
+typedef struct wow_event_info_section_s {
+	A_UINT32 data_type;
+	A_UINT32 data_len;
+} WOW_EVENT_INFO_SECTION;
+
+typedef struct wow_event_info_section_packet_s {
+	A_UINT8 packet[WOW_DEFAULT_EVT_BUF_SIZE];
+} WOW_EVENT_INFO_SECTION_PACKET;
+
+typedef struct wow_event_info_section_bitmap_s {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WOW_EVENT_INFO_SECTION_BITMAP  */
+	A_UINT32 flag;          /*This is current reserved. */
+	A_UINT32 value;         /*This could be the pattern id for bitmap pattern. */
+	A_UINT32 org_len;               /*The length of the orginal packet. */
+} WOW_EVENT_INFO_SECTION_BITMAP;
+
+/**
+ * This command is sent from WLAN host driver to firmware to
+ * enable or disable D0-WOW. D0-WOW means APSS suspend with
+ * PCIe link and DDR being active.
+ *
+ *
+ * Entering D0-WOW Mode (based on kernel suspend request):
+ *    host->target: WMI_DO_WOW_ENABLE_DISABLE_CMDID (enable = 1)
+ *    target: Take action (e.g. dbglog suspend)
+ *    target->host: HTC_ACK (HTC_MSG_SEND_SUSPEND_COMPLETE message)
+ *
+ * Exiting D0-WOW mode (based on kernel resume OR target->host message received)
+ *    host->target: WMI_DO_WOW_ENABLE_DISABLE_CMDID (enable = 0)
+ *    target: Take action (e.g. dbglog resume)
+ *    target->host: WMI_D0_WOW_DISABLE_ACK_EVENTID
+ *
+ * This command is applicable only on the PCIE LL systems
+ * Host can enter either D0-WOW or WOW mode, but NOT both at same time
+ * Decision to enter D0-WOW or WOW is based on active interfaces
+ *
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_d0_wow_enable_disable_cmd_fixed_param  */
+	A_UINT32 enable;                /* 1 = enable, 0 = disable */
+} wmi_d0_wow_enable_disable_cmd_fixed_param;
+
+typedef enum extend_wow_type_e {
+	EXTWOW_TYPE_APP_TYPE1,          /* extend wow type: only enable wakeup for app type1 */
+	EXTWOW_TYPE_APP_TYPE2,          /* extend wow type: only enable wakeup for app type2 */
+	EXTWOW_TYPE_APP_TYPE1_2,                /* extend wow type: enable wakeup for app type1&2 */
+	EXTWOW_DISABLED = 255,
+} EXTWOW_TYPE;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals wmi_extwow_enable_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+	A_UINT32 type;
+	A_UINT32 wakeup_pin_num;
+} wmi_extwow_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals wmi_extwow_set_app_type1_params_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+	wmi_mac_addr wakee_mac;
+	A_UINT8 ident[8];
+	A_UINT8 passwd[16];
+	A_UINT32 ident_len;
+	A_UINT32 passwd_len;
+} wmi_extwow_set_app_type1_params_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals wmi_extwow_set_app_type2_params_cmd_fixed_param  */
+	A_UINT32 vdev_id;
+
+	A_UINT8 rc4_key[16];
+	A_UINT32 rc4_key_len;
+
+	/** ip header parameter */
+	A_UINT32 ip_id;         /* NC id */
+	A_UINT32 ip_device_ip;          /* NC IP address */
+	A_UINT32 ip_server_ip;          /* Push server IP address */
+
+	/** tcp header parameter */
+	A_UINT16 tcp_src_port;          /* NC TCP port */
+	A_UINT16 tcp_dst_port;          /* Push server TCP port */
+	A_UINT32 tcp_seq;
+	A_UINT32 tcp_ack_seq;
+
+	A_UINT32 keepalive_init;                /* Initial ping interval */
+	A_UINT32 keepalive_min;         /* Minimum ping interval */
+	A_UINT32 keepalive_max;         /* Maximum ping interval */
+	A_UINT32 keepalive_inc;         /* Increment of ping interval */
+
+	wmi_mac_addr gateway_mac;
+	A_UINT32 tcp_tx_timeout_val;
+	A_UINT32 tcp_rx_timeout_val;
+
+	/** add extra parameter for backward-compatible */
+	/*
+	 * For all byte arrays, natural order is used.  E.g.
+	 * rc4_write_sandbox[0] holds the 1st RC4 S-box byte,
+	 * rc4_write_sandbox[1] holds the 2nd RC4 S-box byte, etc.
+	 */
+
+	/* used to encrypt transmit packet such as keep-alive */
+	A_UINT8  rc4_write_sandbox[256];
+	A_UINT32 rc4_write_x;
+	A_UINT32 rc4_write_y;
+
+	/* used to decrypt received packet such as wow data */
+	A_UINT8  rc4_read_sandbox[256];
+	A_UINT32 rc4_read_x;
+	A_UINT32 rc4_read_y;
+
+	/* used to caculate HMAC hash for transmit packet such as keep-alive */
+	A_UINT8  ssl_write_seq[8];
+	A_UINT8  ssl_sha1_write_key[64];
+	A_UINT32 ssl_sha1_write_key_len;
+
+	/* used to calculate HAMC hash for receive packet such as wow data */
+	A_UINT8  ssl_read_seq[8];
+	A_UINT8  ssl_sha1_read_key[64];
+	A_UINT32 ssl_sha1_read_key_len;
+
+	/* optional element for specifying TCP options data to include in
+	 * transmit packets such as keep-alive
+	 */
+	A_UINT32 tcp_options_len;
+	A_UINT8  tcp_options[40];
+
+	A_UINT32 async_id; /* keep-alive request id */
+} wmi_extwow_set_app_type2_params_cmd_fixed_param;
+
+#define WMI_RXERR_CRC               0x01        /* CRC error on frame */
+#define WMI_RXERR_DECRYPT           0x08        /* non-Michael decrypt error */
+#define WMI_RXERR_MIC               0x10        /* Michael MIC decrypt error */
+#define WMI_RXERR_KEY_CACHE_MISS    0x20        /* No/incorrect key matter in h/w */
+
+typedef enum {
+	PKT_PWR_SAVE_PAID_MATCH = 0x0001,
+	PKT_PWR_SAVE_GID_MATCH = 0x0002,
+	PKT_PWR_SAVE_EARLY_TIM_CLEAR = 0x0004,
+	PKT_PWR_SAVE_EARLY_DTIM_CLEAR = 0x0008,
+	PKT_PWR_SAVE_EOF_PAD_DELIM = 0x0010,
+	PKT_PWR_SAVE_MACADDR_MISMATCH = 0x0020,
+	PKT_PWR_SAVE_DELIM_CRC_FAIL = 0x0040,
+	PKT_PWR_SAVE_GID_NSTS_ZERO = 0x0080,
+	PKT_PWR_SAVE_RSSI_CHECK = 0x0100,
+	PKT_PWR_SAVE_5G_EBT = 0x0200,
+	PKT_PWR_SAVE_2G_EBT = 0x0400,
+	WMI_PKT_PWR_SAVE_MAX = 0x0800,
+} WMI_PKT_PWR_SAVE_TYPE;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ftm_intg_cmd_fixed_param */
+	A_UINT32 num_data;
+	/** length in byte of data[]. */
+	/* This structure is used to send Factory Test Mode [FTM] command
+	 * from host to firmware for integrated chips which are binary blobs.
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field num_data.
+	 */
+} wmi_ftm_intg_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ftm_intg_event_fixed_param */
+	A_UINT32 num_data;
+	/** length in byte of data[]. */
+	/* This structure is used to receive Factory Test Mode [FTM] event
+	 * from firmware to host for integrated chips which are binary blobs.
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field num_data.
+	 */
+} wmi_ftm_intg_event_fixed_param;
+
+#define WMI_MAX_NS_OFFLOADS           2
+#define WMI_MAX_ARP_OFFLOADS          2
+
+#define WMI_ARPOFF_FLAGS_VALID              (1 << 0)    /* the tuple entry is valid */
+#define WMI_ARPOFF_FLAGS_MAC_VALID          (1 << 1)    /* the target mac address is valid */
+#define WMI_ARPOFF_FLAGS_REMOTE_IP_VALID    (1 << 2)    /* remote IP field is valid */
+
+typedef struct {
+	A_UINT32 tlv_header;                   /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_ARP_OFFLOAD_TUPLE */
+	A_UINT32 flags;         /* flags */
+	A_UINT8 target_ipaddr[4];               /* IPV4 addresses of the local node */
+	A_UINT8 remote_ipaddr[4];               /* source address of the remote node requesting the ARP (qualifier) */
+	wmi_mac_addr target_mac;                /* mac address for this tuple, if not valid, the local MAC is used */
+} WMI_ARP_OFFLOAD_TUPLE;
+
+#define WMI_NSOFF_FLAGS_VALID           (1 << 0)        /* the tuple entry is valid */
+#define WMI_NSOFF_FLAGS_MAC_VALID       (1 << 1)        /* the target mac address is valid */
+#define WMI_NSOFF_FLAGS_REMOTE_IP_VALID (1 << 2)        /* remote IP field is valid */
+
+#define WMI_NSOFF_MAX_TARGET_IPS    2
+
+typedef struct {
+	A_UINT32 tlv_header;                     /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_NS_OFFLOAD_TUPLE */
+	A_UINT32 flags;         /* flags */
+	/* NOTE: This size of array target_ipaddr[] cannot be changed without breaking WMI compatibility. */
+	WMI_IPV6_ADDR target_ipaddr[WMI_NSOFF_MAX_TARGET_IPS];          /* IPV6 target addresses of the local node  */
+	WMI_IPV6_ADDR solicitation_ipaddr;              /* multi-cast source IP addresses for receiving solicitations */
+	WMI_IPV6_ADDR remote_ipaddr;            /* address of remote node requesting the solicitation (qualifier) */
+	wmi_mac_addr target_mac;                /* mac address for this tuple, if not valid, the local MAC is used */
+} WMI_NS_OFFLOAD_TUPLE;
+
+typedef struct {
+	A_UINT32 tlv_header;                 /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_SET_ARP_NS_OFFLOAD_CMD_fixed_param */
+	A_UINT32 flags;
+	A_UINT32 vdev_id;
+	A_UINT32 num_ns_ext_tuples;
+	/* Following this structure are the TLVs:
+	 *     WMI_NS_OFFLOAD_TUPLE    ns_tuples[WMI_MAX_NS_OFFLOADS];
+	 *     WMI_ARP_OFFLOAD_TUPLE   arp_tuples[WMI_MAX_ARP_OFFLOADS];
+	 * size of ns_ext_tuples is based on num_ns_ext_tuples
+	 *     WMI_NS_OFFLOAD_TUPLE  ns_ext_tuples[];
+	 */
+} WMI_SET_ARP_NS_OFFLOAD_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_id;
+	A_UINT32 timeout;
+	A_UINT32 length;
+	/* Following this would be the pattern
+	   A_UINT8 pattern[] of length specifed by length
+	   field in the structure. */
+} WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 pattern_id;
+} WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_tid_addba_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Initiator (1) or Responder (0) for this aggregation */
+	A_UINT32 initiator;
+	/** size of the negotiated window */
+	A_UINT32 window_size;
+	/** starting sequence number (only valid for initiator) */
+	A_UINT32 ssn;
+	/** timeout field represents the time to wait for Block Ack in
+	 *   initiator case and the time to wait for BAR in responder
+	 *   case. 0 represents no timeout. */
+	A_UINT32 timeout;
+	/* BA policy: immediate ACK (0) or delayed ACK (1) */
+	A_UINT32 policy;
+} wmi_peer_tid_addba_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_tid_delba_cmd */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Initiator (1) or Responder (0) for this aggregation */
+	A_UINT32 initiator;
+} wmi_peer_tid_delba_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tx_addba_complete_event_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Event status */
+	A_UINT32 status;
+} wmi_tx_addba_complete_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tx_delba_complete_event_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** Tid number */
+	A_UINT32 tid;
+	/** Event status */
+	A_UINT32 status;
+} wmi_tx_delba_complete_event_fixed_param;
+/*
+ * Structure to request sequence numbers for a given
+ * peer station on different TIDs. The TIDs are
+ * indicated in the tidBitMap, tid 0 would
+ * be represented by LSB bit 0. tid 1 would be
+ * represented by LSB bit 1 etc.
+ * The target will retrieve the current sequence
+ * numbers for the peer on all the TIDs requested
+ * and send back a response in a WMI event.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals
+	                                   WMITLV_TAG_STRUC_wmi_ba_req_ssn_cmd_sub_struct_param */
+	wmi_mac_addr peer_macaddr;
+	A_UINT32 tidBitmap;
+} wmi_ba_req_ssn;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals
+	                                   WMITLV_TAG_STRUC_wmi_ba_req_ssn_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** Number of requested SSN In the TLV wmi_ba_req_ssn[] */
+	A_UINT32 num_ba_req_ssn;
+/* Following this struc are the TLV's:
+ *     wmi_ba_req_ssn ba_req_ssn_list; All peer and tidBitMap for which the ssn is requested
+ */
+} wmi_ba_req_ssn_cmd_fixed_param;
+
+/*
+ * Max transmit categories
+ *
+ * Note: In future if we need to increase WMI_MAX_TC definition
+ * It would break the compatibility for WMI_BA_RSP_SSN_EVENTID.
+ */
+#define WMI_MAX_TC  8
+
+/*
+ * Structure to send response sequence numbers
+ * for a give peer and tidmap.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals
+	                                   WMITLV_TAG_STRUC_wmi_ba_req_ssn_event_sub_struct_param */
+	wmi_mac_addr peer_macaddr;
+	/* A bool to indicate if ssn is present */
+	A_UINT32 ssn_present_for_tid[WMI_MAX_TC];
+	/* The ssn from target, valid only if
+	 * ssn_present_for_tid[tidn] equals 1
+	 */
+	A_UINT32 ssn_for_tid[WMI_MAX_TC];
+} wmi_ba_event_ssn;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals
+	                                   WMITLV_TAG_STRUC_wmi_ba_rsp_ssn_event_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** Event status, success or failure of the overall operation */
+	A_UINT32 status;
+	/** Number of requested SSN In the TLV wmi_ba_req_ssn[] */
+	A_UINT32 num_ba_event_ssn;
+/* Following this struc are the TLV's:
+ *     wmi_ba_event_ssn ba_event_ssn_list; All peer and tidBitMap for which the ssn is requested
+ */
+} wmi_ba_rsp_ssn_event_fixed_param;
+
+enum wmi_aggr_state_req_type {
+	WMI_DISABLE_AGGREGATION,
+	WMI_ENABLE_AGGREGATION
+};
+
+/*
+ * This event is generated by the COEX module
+ * when esco call is begins the coex module in fw genrated this event to host to
+ * disable the RX aggregation and after completion of the esco call fw will indicate to
+ * enable back the Rx aggregation .
+ */
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_aggr_state_trig_event_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** req_type  contains values from enum
+	 *  wmi_aggr_state_req_type; 0 (disable) 1(enable) */
+	A_UINT32 req_type;
+} wmi_aggr_state_trig_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_install_key_complete_event_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/** MAC address used for installing   */
+	wmi_mac_addr peer_macaddr;
+	/** key index */
+	A_UINT32 key_ix;
+	/** key flags */
+	A_UINT32 key_flags;
+	/** Event status */
+	A_UINT32 status;
+} wmi_vdev_install_key_complete_event_fixed_param;
+
+typedef enum _WMI_NLO_AUTH_ALGORITHM {
+	WMI_NLO_AUTH_ALGO_80211_OPEN = 1,
+	WMI_NLO_AUTH_ALGO_80211_SHARED_KEY = 2,
+	WMI_NLO_AUTH_ALGO_WPA = 3,
+	WMI_NLO_AUTH_ALGO_WPA_PSK = 4,
+	WMI_NLO_AUTH_ALGO_WPA_NONE = 5,
+	WMI_NLO_AUTH_ALGO_RSNA = 6,
+	WMI_NLO_AUTH_ALGO_RSNA_PSK = 7,
+} WMI_NLO_AUTH_ALGORITHM;
+
+typedef enum _WMI_NLO_CIPHER_ALGORITHM {
+	WMI_NLO_CIPHER_ALGO_NONE = 0x00,
+	WMI_NLO_CIPHER_ALGO_WEP40 = 0x01,
+	WMI_NLO_CIPHER_ALGO_TKIP = 0x02,
+	WMI_NLO_CIPHER_ALGO_CCMP = 0x04,
+	WMI_NLO_CIPHER_ALGO_WEP104 = 0x05,
+	WMI_NLO_CIPHER_ALGO_BIP = 0x06,
+	WMI_NLO_CIPHER_ALGO_WPA_USE_GROUP = 0x100,
+	WMI_NLO_CIPHER_ALGO_RSN_USE_GROUP = 0x100,
+	WMI_NLO_CIPHER_ALGO_WEP = 0x101,
+} WMI_NLO_CIPHER_ALGORITHM;
+
+/* SSID broadcast  type passed in NLO params */
+typedef enum _WMI_NLO_SSID_BcastNwType {
+	WMI_NLO_BCAST_UNKNOWN = 0,
+	WMI_NLO_BCAST_NORMAL = 1,
+	WMI_NLO_BCAST_HIDDEN = 2,
+} WMI_NLO_SSID_BcastNwType;
+
+#define WMI_NLO_MAX_SSIDS    16
+#define WMI_NLO_MAX_CHAN     48
+
+#define WMI_NLO_CONFIG_STOP             (0x1 << 0)
+#define WMI_NLO_CONFIG_START            (0x1 << 1)
+#define WMI_NLO_CONFIG_RESET            (0x1 << 2)
+#define WMI_NLO_CONFIG_SLOW_SCAN        (0x1 << 4)
+#define WMI_NLO_CONFIG_FAST_SCAN        (0x1 << 5)
+#define WMI_NLO_CONFIG_SSID_HIDE_EN     (0x1 << 6)
+/* This bit is used to indicate if EPNO or supplicant PNO is enabled. Only
+  * one of them can be enabled at a given time */
+#define WMI_NLO_CONFIG_ENLO             (0x1 << 7)
+#define WMI_NLO_CONFIG_SCAN_PASSIVE     (0x1 << 8)
+
+/* Whether directed scan needs to be performed (for hidden SSIDs) */
+#define WMI_ENLO_FLAG_DIRECTED_SCAN      1
+/* Whether PNO event shall be triggered if the network is found on A band */
+#define WMI_ENLO_FLAG_A_BAND             2
+/* Whether PNO event shall be triggered if the network is found on G band */
+#define WMI_ENLO_FLAG_G_BAND             4
+/* Whether strict matching is required (i.e. firmware shall not match on the entire SSID) */
+#define WMI_ENLO_FLAG_STRICT_MATCH       8
+/* Code for matching the beacon AUTH IE - additional codes TBD open */
+#define WMI_ENLO_AUTH_CODE_OPEN  1
+/* WPA_PSK or WPA2PSK */
+#define WMI_ENLO_AUTH_CODE_PSK   2
+/* any EAPOL */
+#define WMI_ENLO_AUTH_CODE_EAPOL 4
+
+/* NOTE: wmi_nlo_ssid_param structure can't be changed without breaking the compatibility */
+typedef struct wmi_nlo_ssid_param {
+	A_UINT32 valid;
+	wmi_ssid ssid;
+} wmi_nlo_ssid_param;
+
+/* NOTE: wmi_nlo_enc_param structure can't be changed without breaking the compatibility */
+typedef struct wmi_nlo_enc_param {
+	A_UINT32 valid;
+	A_UINT32 enc_type;
+} wmi_nlo_enc_param;
+
+/* NOTE: wmi_nlo_auth_param structure can't be changed without breaking the compatibility */
+typedef struct wmi_nlo_auth_param {
+	A_UINT32 valid;
+	A_UINT32 auth_type;
+} wmi_nlo_auth_param;
+
+/* NOTE: wmi_nlo_bcast_nw_param structure can't be changed without breaking the compatibility */
+typedef struct wmi_nlo_bcast_nw_param {
+	A_UINT32 valid;
+	/**
+	 * If WMI_NLO_CONFIG_EPNO is not set. Supplicant PNO is enabled. The value
+	 * should be true/false.Otherwise EPNO is enabled. bcast_nw_type would be used
+	 * as a bit flag contains WMI_ENLO_FLAG_XXX
+	 */
+	A_UINT32 bcast_nw_type;
+} wmi_nlo_bcast_nw_param;
+
+/* NOTE: wmi_nlo_rssi_param structure can't be changed without breaking the compatibility */
+typedef struct wmi_nlo_rssi_param {
+	A_UINT32 valid;
+	A_INT32 rssi;
+} wmi_nlo_rssi_param;
+
+typedef struct nlo_configured_parameters {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_nlo_configured_parameters */
+	wmi_nlo_ssid_param ssid;
+	wmi_nlo_enc_param enc_type;
+	wmi_nlo_auth_param auth_type;
+	wmi_nlo_rssi_param rssi_cond;
+	wmi_nlo_bcast_nw_param bcast_nw_type;           /* indicates if the SSID is hidden or not */
+} nlo_configured_parameters;
+
+/* Support channel prediction for PNO scan after scanning top_k_num channels
+ * if stationary_threshold is met.
+ */
+typedef struct nlo_channel_prediction_cfg {
+	A_UINT32 tlv_header;
+	/* Enable or disable this feature. */
+	A_UINT32 enable;
+	/* Top K channels will be scanned before deciding whether to further
+	 * scan or stop. Minimum value is 3 and maximum is 5. */
+	A_UINT32 top_k_num;
+	/* Preconfigured stationary threshold. Lesser value means more
+	 * conservative. Bigger value means more aggressive.
+	 * Maximum is 100 and mininum is 0. */
+	A_UINT32 stationary_threshold;
+	/* Periodic full channel scan in milliseconds unit.
+	 * After full_scan_period_ms since last full scan, channel prediction
+	 * scan is suppressed and will do full scan.
+	 * This is to help detecting sudden AP power-on or -off.
+	 * Value 0 means no full scan at all (not recommended).
+	 */
+	A_UINT32 full_scan_period_ms;
+} nlo_channel_prediction_cfg;
+
+typedef struct wmi_nlo_config {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_nlo_config_cmd_fixed_param */
+	A_UINT32 flags;
+	A_UINT32 vdev_id;
+	A_UINT32 fast_scan_max_cycles;
+	A_UINT32 active_dwell_time;
+	A_UINT32 passive_dwell_time;            /* PDT in msecs */
+	A_UINT32 probe_bundle_size;
+	A_UINT32 rest_time;             /* ART = IRT */
+	A_UINT32 max_rest_time;         /* Max value that can be reached after SBM */
+	A_UINT32 scan_backoff_multiplier;               /* SBM */
+	A_UINT32 fast_scan_period;              /* SCBM */
+	A_UINT32 slow_scan_period;              /* specific to windows */
+	A_UINT32 no_of_ssids;
+	A_UINT32 num_of_channels;
+	A_UINT32 delay_start_time;              /* NLO scan start delay time in milliseconds */
+	/* The TLVs will follow.
+	 * nlo_configured_parameters nlo_list[];
+	 * A_UINT32 channel_list[];
+	 * nlo_channel_prediction_cfg ch_prediction_cfg;
+	 */
+
+} wmi_nlo_config_cmd_fixed_param;
+
+typedef struct wmi_nlo_event {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_nlo_event */
+	A_UINT32 vdev_id;
+} wmi_nlo_event;
+
+/* WMI_PASSPOINT_CONFIG_SET
+ * Sets a list for passpoint networks for PNO purposes;
+ * it should be matched against any passpoint networks found
+ * during regular PNO scan.
+ */
+#define WMI_PASSPOINT_CONFIG_SET   (0x1 << 0)
+/* WMI_PASSPOINT_CONFIG_RESET
+ * Reset passpoint network list -
+ * no Passpoint networks should be matched after this.
+ */
+#define WMI_PASSPOINT_CONFIG_RESET     (0x1 << 1)
+#define PASSPOINT_REALM_LEN                  256
+#define PASSPOINT_ROAMING_CONSORTIUM_ID_LEN  5
+#define PASSPOINT_ROAMING_CONSORTIUM_ID_NUM  16
+#define PASSPOINT_PLMN_ID_LEN                3
+#define PASSPOINT_PLMN_ID_ALLOC_LEN /* round up to A_UINT32 boundary */ \
+	(((PASSPOINT_PLMN_ID_LEN + 3) >> 2) << 2)
+
+/*
+ * Confirm PASSPOINT_REALM_LEN is a multiple of 4, so the
+ *  A_UINT8 realm[PASSPOINT_REALM_LEN]
+ * array will end on a 4-byte boundary.
+ * (This 4-byte alignment simplifies endianness-correction byte swapping.)
+ */
+A_COMPILE_TIME_ASSERT(check_passpoint_realm_size,(PASSPOINT_REALM_LEN % sizeof(A_UINT32)) == 0);
+
+/*
+ * Confirm the product of PASSPOINT_ROAMING_CONSORTIUM_ID_NUM and
+ * PASSPOINT_ROAMING_CONSORTIUM_ID_LEN is a multiple of 4, so the
+ * roaming_consortium_ids array below will end on a 4-byte boundary.
+ * (This 4-byte alignment simplifies endianness-correction byte swapping.)
+ */
+A_COMPILE_TIME_ASSERT(check_passpoint_roaming_consortium_ids_size,
+((PASSPOINT_ROAMING_CONSORTIUM_ID_NUM*PASSPOINT_ROAMING_CONSORTIUM_ID_LEN) % sizeof(A_UINT32)) == 0);
+
+/* wildcard ID to allow an action (reset) to apply to all networks */
+#define WMI_PASSPOINT_NETWORK_ID_WILDCARD 0xFFFFFFFF
+typedef struct wmi_passpoint_config {
+	/* TLV tag and len; tag equals wmi_passpoint_config_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* (network) id
+	 * identifier of the matched network, report this in event
+	 * This id can be a wildcard (WMI_PASSPOINT_NETWORK_ID_WILDCARD)
+	 * that indicates the action should be applied to all networks.
+	 * Currently, the only action that is applied to all networks is "reset".
+	 * If a non-wildcard ID is specified, that particular network is configured.
+	 * If a wildcard ID is specified, all networks are reset.
+	 */
+	A_UINT32 id;
+	A_UINT32 req_id;
+	 /*null terminated UTF8 encoded realm, 0 if unspecified*/
+	A_UINT8  realm[PASSPOINT_REALM_LEN];
+	/*roaming consortium ids to match, 0s if unspecified*/
+	A_UINT8  roaming_consortium_ids[PASSPOINT_ROAMING_CONSORTIUM_ID_NUM][PASSPOINT_ROAMING_CONSORTIUM_ID_LEN];
+	/*This would be bytes-stream as same as defition of realm id in 802.11 standard*/
+	/*PLMN id mcc/mnc combination as per rules, 0s if unspecified */
+	A_UINT8  plmn[PASSPOINT_PLMN_ID_ALLOC_LEN];
+} wmi_passpoint_config_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;    /* TLV tag and len; tag equals
+wmi_passpoint_event_hdr */
+	A_UINT32 id;            /* identifier of the matched network */
+	A_UINT32 vdev_id;
+	A_UINT32 timestamp;     /* time since boot (in microsecond) when the
+result was retrieved*/
+	wmi_ssid ssid;
+	wmi_mac_addr    bssid;  /* bssid of the network */
+	A_UINT32 channel_mhz;   /* channel frequency in MHz */
+	A_UINT32 rssi;          /* rssi value */
+	A_UINT32 rtt;           /* timestamp in nanoseconds*/
+	A_UINT32 rtt_sd;        /* standard deviation in rtt */
+	A_UINT32 beacon_period; /* beacon advertised in the beacon */
+	A_UINT32 capability;    /* capabilities advertised in the beacon */
+	A_UINT32 ie_length;     /* size of the ie_data blob */
+	A_UINT32 anqp_length;   /* length of ANQP blob */
+	/**
+	 * Following this structure is the byte stream of ie data of length ie_buf_len:
+	 * A_UINT8 ie_data[];      // length in byte given by field ie_length, blob of ie data in beacon
+	 * A_UINT8 anqp_ie[];      // length in byte given by field anqp_len, blob of anqp data of IE
+	 * Implicitly, combing ie_data and anqp_ie into a single bufp, and the bytes
+	 * stream of each ie should be same as BEACON/Action-frm  by 802.11 spec
+	 */
+} wmi_passpoint_event_hdr;
+
+#define GTK_OFFLOAD_OPCODE_MASK                         0xFF000000
+/** Enable GTK offload, and provided parameters KEK,KCK and replay counter values */
+#define GTK_OFFLOAD_ENABLE_OPCODE                       0x01000000
+/** Disable GTK offload */
+#define GTK_OFFLOAD_DISABLE_OPCODE                      0x02000000
+/** Read GTK offload parameters, generates WMI_GTK_OFFLOAD_STATUS_EVENT */
+#define GTK_OFFLOAD_REQUEST_STATUS_OPCODE       0x04000000
+enum wmi_chatter_mode {
+	/* Chatter enter/exit happens
+	 * automatically based on preset
+	 * params
+	 */
+	WMI_CHATTER_MODE_AUTO,
+	/* Chatter enter is triggered
+	 * manually by the user
+	 */
+	WMI_CHATTER_MODE_MANUAL_ENTER,
+	/* Chatter exit is triggered
+	 * manually by the user
+	 */
+	WMI_CHATTER_MODE_MANUAL_EXIT,
+	/* Placeholder max value, always last */
+	WMI_CHATTER_MODE_MAX
+};
+
+enum wmi_chatter_query_type {
+	/*query coalescing filter match counter */
+	WMI_CHATTER_QUERY_FILTER_MATCH_CNT,
+	WMI_CHATTER_QUERY_MAX
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_set_mode_cmd_fixed_param  */
+	A_UINT32 chatter_mode;
+} wmi_chatter_set_mode_cmd_fixed_param;
+
+/** maximum number of filter supported*/
+#define CHATTER_MAX_COALESCING_RULES     11
+/** maximum number of field tests per filter*/
+#define CHATTER_MAX_FIELD_TEST           5
+/** maximum field length in number of DWORDS*/
+#define CHATTER_MAX_TEST_FIELD_LEN32     2
+
+/** field test kinds*/
+#define CHATTER_COALESCING_TEST_EQUAL            1
+#define CHATTER_COALESCING_TEST_MASKED_EQUAL     2
+#define CHATTER_COALESCING_TEST_NOT_EQUAL        3
+
+/** packet type*/
+#define CHATTER_COALESCING_PKT_TYPE_UNICAST      (1 << 0)
+#define CHATTER_COALESCING_PKT_TYPE_MULTICAST    (1 << 1)
+#define CHATTER_COALESCING_PKT_TYPE_BROADCAST    (1 << 2)
+
+/** coalescing field test*/
+typedef struct _chatter_pkt_coalescing_hdr_test {
+	/** offset from start of mac header, for windows native wifi host driver
+	 * should assume standard 802.11 frame format without QoS info and address4
+	 * FW would account for any non-stand fields for final offset value.
+	 */
+	A_UINT32 offset;
+	A_UINT32 length;                /* length of test field */
+	A_UINT32 test;          /*equal, not equal or masked equal */
+	A_UINT32 mask[CHATTER_MAX_TEST_FIELD_LEN32];            /*mask byte stream */
+	A_UINT32 value[CHATTER_MAX_TEST_FIELD_LEN32];           /*value byte stream */
+} chatter_pkt_coalescing_hdr_test;
+
+/** packet coalescing filter*/
+typedef struct _chatter_pkt_coalescing_filter {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_pkt_coalescing_filter */
+	A_UINT32 filter_id;             /*unique id assigned by OS */
+	A_UINT32 max_coalescing_delay;          /*max miliseconds 1st pkt can be hold */
+	A_UINT32 pkt_type;              /*unicast/multicast/broadcast */
+	A_UINT32 num_of_test_field;             /*number of field test in table */
+	chatter_pkt_coalescing_hdr_test test_fields[CHATTER_MAX_FIELD_TEST];            /*field test tbl */
+} chatter_pkt_coalescing_filter;
+
+/** packet coalescing filter add command*/
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_coalescing_add_filter_cmd_fixed_param */
+	A_UINT32 num_of_filters;
+	/* Following this tlv, there comes an array of structure of type chatter_pkt_coalescing_filter
+	   chatter_pkt_coalescing_filter rx_filter[1]; */
+} wmi_chatter_coalescing_add_filter_cmd_fixed_param;
+/** packet coalescing filter delete command*/
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_coalescing_delete_filter_cmd_fixed_param */
+	A_UINT32 filter_id;             /*filter id which will be deleted */
+} wmi_chatter_coalescing_delete_filter_cmd_fixed_param;
+/** packet coalescing query command*/
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_coalescing_query_cmd_fixed_param */
+	A_UINT32 type;          /*type of query */
+} wmi_chatter_coalescing_query_cmd_fixed_param;
+/** chatter query reply event*/
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chatter_query_reply_event_fixed_param  */
+	A_UINT32 type;          /*query type */
+	A_UINT32 filter_match_cnt;              /*coalescing filter match counter */
+} wmi_chatter_query_reply_event_fixed_param;
+
+/* NOTE: This constants GTK_OFFLOAD_KEK_BYTES, GTK_OFFLOAD_KCK_BYTES, and GTK_REPLAY_COUNTER_BYTES
+ * cannot be changed without breaking WMI compatibility. */
+#define GTK_OFFLOAD_KEK_BYTES       16
+#define GTK_OFFLOAD_KCK_BYTES       16
+/* NOTE: GTK_REPLAY_COUNTER_BYTES, WMI_MAX_KEY_LEN, IGTK_PN_SIZE cannot be changed in the future without breaking WMI compatibility */
+#define GTK_REPLAY_COUNTER_BYTES    8
+#define WMI_MAX_KEY_LEN             32
+#define IGTK_PN_SIZE                6
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param */
+	A_UINT32 vdev_id;
+	/** unique id identifying the VDEV */
+	A_UINT32 flags;         /* status flags */
+	A_UINT32 refresh_cnt;           /* number of successful GTK refresh exchanges since last SET operation */
+	A_UINT8 replay_counter[GTK_REPLAY_COUNTER_BYTES];               /* current replay counter */
+	A_UINT8 igtk_keyIndex;          /* Use if IGTK_OFFLOAD is defined */
+	A_UINT8 igtk_keyLength;         /* Use if IGTK_OFFLOAD is defined */
+	A_UINT8 igtk_keyRSC[IGTK_PN_SIZE];              /* key replay sequence counter *//* Use if IGTK_OFFLOAD is defined */
+	A_UINT8 igtk_key[WMI_MAX_KEY_LEN];              /* Use if IGTK_OFFLOAD is defined */
+} WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;                    /** TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_GTK_OFFLOAD_CMD_fixed_param */
+	A_UINT32 vdev_id;                                       /** unique id identifying the VDEV */
+	A_UINT32 flags;         /* control flags, GTK offload command use high byte  */
+	/* The size of following 3 arrays cannot be changed without breaking WMI compatibility. */
+	A_UINT8 KEK[GTK_OFFLOAD_KEK_BYTES];             /* key encryption key */
+	A_UINT8 KCK[GTK_OFFLOAD_KCK_BYTES];             /* key confirmation key */
+	A_UINT8 replay_counter[GTK_REPLAY_COUNTER_BYTES];               /* replay counter for re-key */
+} WMI_GTK_OFFLOAD_CMD_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_WMI_PMF_OFFLOAD_SET_SA_QUERY_CMD_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 sa_query_retry_interval;  /* in msec */
+	A_UINT32 sa_query_max_retry_count;
+} WMI_PMF_OFFLOAD_SET_SA_QUERY_CMD_fixed_param;
+
+typedef enum {
+	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,                /* 802.11 NULL frame */
+	WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,          /* ARP response */
+	WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,         /*ETHERNET LOOPBACK */
+	/* gratuitous ARP req*/
+	WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
+} WMI_STA_KEEPALIVE_METHOD;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_STA_KEEPALVE_ARP_RESPONSE */
+	WMI_IPV4_ADDR sender_prot_addr;         /* Sender protocol address */
+	WMI_IPV4_ADDR target_prot_addr;         /* Target protocol address */
+	wmi_mac_addr dest_mac_addr;             /* destination MAC address */
+} WMI_STA_KEEPALVE_ARP_RESPONSE;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_STA_KEEPALIVE_CMD_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 enable;                /* 1 - Enable, 0 - disable */
+	A_UINT32 method;                /* keep alive method */
+	A_UINT32 interval;              /* time interval in seconds  */
+	/*
+	 * NOTE: following this structure is the TLV for ARP Resonse:
+	 *     WMI_STA_KEEPALVE_ARP_RESPONSE arp_resp; // ARP response
+	 */
+} WMI_STA_KEEPALIVE_CMD_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 action;
+} WMI_VDEV_WNM_SLEEPMODE_CMD_fixed_param;
+typedef WMI_VDEV_WNM_SLEEPMODE_CMD_fixed_param WMI_STA_WNMSLEEP_CMD;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_set_keepalive_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 keepaliveInterval;             /* seconds */
+	A_UINT32 keepaliveMethod;
+} wmi_vdev_set_keepalive_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_cmd_fixed_param */
+	A_UINT32 vdev_id;
+} wmi_vdev_get_keepalive_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_get_keepalive_event_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 keepaliveInterval;             /* seconds */
+	A_UINT32 keepaliveMethod;               /* seconds */
+} wmi_vdev_get_keepalive_event_fixed_param;
+
+#define IPSEC_NATKEEPALIVE_FILTER_DISABLE 0
+#define IPSEC_NATKEEPALIVE_FILTER_ENABLE  1
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 action;
+} WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD_fixed_param;
+
+typedef WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD_fixed_param
+WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 mcc_tbttmode;
+	wmi_mac_addr mcc_bssid;
+} wmi_vdev_mcc_set_tbtt_mode_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;               /* home vdev id */
+	A_UINT32 meas_token;            /* from measure request frame */
+	A_UINT32 dialog_token;
+	A_UINT32 number_bursts;         /* zero keep sending until cancel, bigger than 0 means times e.g. 1,2 */
+	A_UINT32 burst_interval;                /* unit in mill seconds, interval between consecutive burst */
+	A_UINT32 burst_cycle;           /* times cycle through within one burst */
+	A_UINT32 tx_power;              /* for path frame */
+	A_UINT32 off_duration;          /* uint in mill seconds, channel off duraiton for path loss frame sending */
+	wmi_mac_addr dest_mac;          /* multicast DA, for path loss frame */
+	A_UINT32 num_chans;
+} wmi_vdev_plmreq_start_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 meas_token;            /* same value from req */
+} wmi_vdev_plmreq_stop_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_set_noa_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* enable/disable NoA */
+	A_UINT32 enable;
+	/** number of NoA desc. In the TLV noa_descriptor[] */
+	A_UINT32 num_noa;
+	/**
+	 * TLV (tag length value )  paramerters follow the pattern structure.
+	 * TLV  contain NoA desc with num of num_noa
+	 */
+} wmi_p2p_set_noa_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_unit_test_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* Identify the wlan module */
+	A_UINT32 module_id;
+	/* Num of test arguments passed */
+	A_UINT32 num_args;
+/**
+ * TLV (tag length value ) parameters follow the wmi_roam_chan_list
+ * structure. The TLV's are:
+ *   A_UINT32 args[];
+ **/
+} wmi_unit_test_cmd_fixed_param;
+
+/** Roaming offload SYNCH_COMPLETE from host when host finished sync logic
+ * after it received WMI_ROAM_SYNCH_EVENTID.
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_synch_complete_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+} wmi_roam_synch_complete_fixed_param;
+
+typedef enum {
+	RECOVERY_SIM_ASSERT = 0x01,
+	RECOVERY_SIM_NO_DETECT = 0x02,
+	RECOVERY_SIM_CTR_EP_FULL = 0x03,
+	RECOVERY_SIM_EMPTY_POINT = 0x04,
+	RECOVERY_SIM_STACK_OV = 0x05,
+	RECOVERY_SIM_INFINITE_LOOP = 0x06,
+	RECOVERY_SIM_PCIE_LINKDOWN = 0x07,
+	RECOVERY_SIM_SELF_RECOVERY   = 0x08,
+} RECOVERY_SIM_TYPE;
+
+/* WMI_FORCE_FW_HANG_CMDID */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_FORCE_FW_HANG_CMD_fixed_param */
+	A_UINT32 type;          /*0:unused 1: ASSERT, 2: not respond detect command,3:  simulate ep-full(),4:... */
+	A_UINT32 delay_time_ms;         /*0xffffffff means the simulate will delay for random time (0 ~0xffffffff ms) */
+} WMI_FORCE_FW_HANG_CMD_fixed_param;
+#define WMI_MCAST_FILTER_SET 1
+#define WMI_MCAST_FILTER_DELETE 2
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 index;
+	A_UINT32 action;
+	wmi_mac_addr mcastbdcastaddr;
+} WMI_SET_MCASTBCAST_FILTER_CMD_fixed_param;
+
+/* GPIO Command and Event data structures */
+
+/* WMI_GPIO_CONFIG_CMDID */
+enum {
+	WMI_GPIO_PULL_NONE,
+	WMI_GPIO_PULL_UP,
+	WMI_GPIO_PULL_DOWN,
+};
+
+enum {
+	WMI_GPIO_INTTYPE_DISABLE,
+	WMI_GPIO_INTTYPE_RISING_EDGE,
+	WMI_GPIO_INTTYPE_FALLING_EDGE,
+	WMI_GPIO_INTTYPE_BOTH_EDGE,
+	WMI_GPIO_INTTYPE_LEVEL_LOW,
+	WMI_GPIO_INTTYPE_LEVEL_HIGH
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_gpio_config_cmd_fixed_param */
+	A_UINT32 gpio_num;              /* GPIO number to be setup */
+	A_UINT32 input;         /* 0 - Output/ 1 - Input */
+	A_UINT32 pull_type;             /* Pull type defined above */
+	A_UINT32 intr_mode;             /* Interrupt mode defined above (Input) */
+} wmi_gpio_config_cmd_fixed_param;
+
+/* WMI_GPIO_OUTPUT_CMDID */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_gpio_output_cmd_fixed_param */
+	A_UINT32 gpio_num;              /* GPIO number to be setup */
+	A_UINT32 set;           /* Set the GPIO pin */
+} wmi_gpio_output_cmd_fixed_param;
+
+/* WMI_GPIO_INPUT_EVENTID */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_gpio_input_event_fixed_param */
+	A_UINT32 gpio_num;              /* GPIO number which changed state */
+} wmi_gpio_input_event_fixed_param;
+
+/* WMI_P2P_DISC_EVENTID */
+enum {
+	P2P_DISC_SEARCH_PROB_REQ_HIT = 0,               /* prob req hit the p2p find pattern */
+	P2P_DISC_SEARCH_PROB_RESP_HIT,          /* prob resp hit the p2p find pattern */
+};
+
+enum {
+	P2P_DISC_MODE_SEARCH = 0,               /* do search when p2p find offload */
+	P2P_DISC_MODE_LISTEN,           /* do listen when p2p find offload */
+	P2P_DISC_MODE_AUTO,             /* do listen and search when p2p find offload */
+};
+
+enum {
+	P2P_DISC_PATTERN_TYPE_BSSID = 0,                /* BSSID pattern */
+	P2P_DISC_PATTERN_TYPE_DEV_NAME,         /* device name pattern */
+};
+
+typedef struct {
+	A_UINT32 vdev_id;
+	A_UINT32 reason;                /* P2P DISC wake up reason */
+} wmi_p2p_disc_event;
+
+typedef WMI_GTK_OFFLOAD_STATUS_EVENT_fixed_param
+WOW_EVENT_INFO_SECTION_GTKIGTK;
+
+typedef enum {
+	WMI_FAKE_TXBFER_SEND_NDPA,
+	WMI_FAKE_TXBFER_SEND_MU,
+	WMI_FAKE_TXBFER_NDPA_FBTYPE,
+	WMI_FAKE_TXBFER_NDPA_NCIDX,
+	WMI_FAKE_TXBFER_NDPA_POLL,
+	WMI_FAKE_TXBFER_NDPA_BW,
+	WMI_FAKE_TXBFER_NDPA_PREAMBLE,
+	WMI_FAKE_TXBFER_NDPA_RATE,
+	WMI_FAKE_TXBFER_NDP_BW,
+	WMI_FAKE_TXBFER_NDP_NSS,
+	WMI_TXBFEE_ENABLE_UPLOAD_H,
+	WMI_TXBFEE_ENABLE_CAPTURE_H,
+	WMI_TXBFEE_SET_CBF_TBL,
+	WMI_TXBFEE_CBF_TBL_LSIG,
+	WMI_TXBFEE_CBF_TBL_SIGA1,
+	WMI_TXBFEE_CBF_TBL_SIGA2,
+	WMI_TXBFEE_CBF_TBL_SIGB,
+	WMI_TXBFEE_CBF_TBL_PAD,
+	WMI_TXBFEE_CBF_TBL_DUR,
+	WMI_TXBFEE_SU_NCIDX,
+	WMI_TXBFEE_CBIDX,
+	WMI_TXBFEE_NGIDX,
+} WMI_TXBF_PARAM_ID;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_txbf_cmd_fixed_param */
+	/** parameter id   */
+	A_UINT32 param_id;
+	/** parameter value */
+	A_UINT32 param_value;
+} wmi_txbf_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_upload_h_hdr */
+	A_UINT32 h_length;
+	A_UINT32 cv_length;
+	/* This TLV is followed by array of bytes:
+	 * // h_cv info buffer
+	 *   A_UINT8 bufp[];
+	 */
+} wmi_upload_h_hdr;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_capture_h_event_hdr */
+	A_UINT32 svd_num;
+	A_UINT32 tone_num;
+	A_UINT32 reserved;
+} wmi_capture_h_event_hdr;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_avoid_freq_range_desc */
+	A_UINT32 start_freq;            /* start frequency, not channel center freq */
+	A_UINT32 end_freq;              /* end frequency */
+} wmi_avoid_freq_range_desc;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_avoid_freq_ranges_event_fixed_param */
+	/* bad channel range count, multi range is allowed, 0 means all channel clear */
+	A_UINT32 num_freq_ranges;
+
+	/* The TLVs will follow.
+	 * multi range with num_freq_ranges, LTE advance multi carrier, CDMA,etc
+	 *     wmi_avoid_freq_range_desc avd_freq_range[];     // message buffer, NULL terminated
+	 */
+} wmi_avoid_freq_ranges_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_gtk_rekey_fail_event_fixed_param  */
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+	A_UINT32 vdev_id;
+} wmi_gtk_rekey_fail_event_fixed_param;
+
+enum wmm_ac_downgrade_policy {
+	WMM_AC_DOWNGRADE_DEPRIO,
+	WMM_AC_DOWNGRADE_DROP,
+	WMM_AC_DOWNGRADE_INVALID,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 cwmin;
+	A_UINT32 cwmax;
+	A_UINT32 aifs;
+	A_UINT32 txoplimit;
+	A_UINT32 acm;
+	A_UINT32 no_ack;
+} wmi_wmm_vparams;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	wmi_wmm_vparams wmm_params[4];          /* 0 be, 1 bk, 2 vi, 3 vo */
+} wmi_vdev_set_wmm_params_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 gtxRTMask[2];          /* for HT and VHT rate masks */
+	A_UINT32 userGtxMask;           /* host request for GTX mask */
+	A_UINT32 gtxPERThreshold;               /* default: 10% */
+	A_UINT32 gtxPERMargin;          /* default: 2% */
+	A_UINT32 gtxTPCstep;            /* default: 1 */
+	A_UINT32 gtxTPCMin;             /* default: 5 */
+	A_UINT32 gtxBWMask;             /* 20/40/80/160 Mhz */
+} wmi_vdev_set_gtx_params_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 ac;
+	A_UINT32 medium_time_us;                /* per second unit, the Admitted time granted, unit in micro seconds */
+	A_UINT32 downgrade_type;
+} wmi_vdev_wmm_addts_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 ac;
+} wmi_vdev_wmm_delts_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_dfs_enable_cmd_fixed_param  */
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_pdev_dfs_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_dfs_disable_cmd_fixed_param  */
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_pdev_dfs_disable_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_ena_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_dfs_phyerr_filter_ena_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_dfs_phyerr_filter_dis_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/** Reserved for future use */
+	A_UINT32 reserved0;
+} wmi_dfs_phyerr_filter_dis_cmd_fixed_param;
+
+/** TDLS COMMANDS */
+
+/* WMI_TDLS_SET_STATE_CMDID */
+/* TDLS State */
+enum wmi_tdls_state {
+	/** TDLS disable */
+	WMI_TDLS_DISABLE,
+	/** TDLS enabled - no firmware connection tracking/notifications */
+	WMI_TDLS_ENABLE_PASSIVE,
+	/** TDLS enabled - with firmware connection tracking/notifications */
+	WMI_TDLS_ENABLE_ACTIVE,
+	/* TDLS enabled - firmware waits for peer mac for connection tracking */
+	WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
+};
+
+/* TDLS Options */
+#define WMI_TDLS_OFFCHAN_EN             (1 << 0) /** TDLS Off Channel support */
+#define WMI_TDLS_BUFFER_STA_EN          (1 << 1) /** TDLS Buffer STA support */
+#define WMI_TDLS_SLEEP_STA_EN           (1 << 2) /** TDLS Sleep STA support (not currently supported) */
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_set_state_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** Enable/Disable TDLS (wmi_tdls_state) */
+	A_UINT32 state;
+	/* Duration (in ms) over which to calculate tx/rx threshold
+	 * to trigger TDLS Discovery
+	 */
+	A_UINT32 notification_interval_ms;
+	/** number of packets OVER which notify/suggest TDLS Discovery:
+	 *  if current tx pps counter / notification interval >= threshold
+	 *  then a notification will be sent to host to advise TDLS Discovery */
+	A_UINT32 tx_discovery_threshold;
+	/** number of packets UNDER which notify/suggest TDLS Teardown:
+	 *  if current tx pps counter / notification interval < threshold
+	 *  then a notification will be sent to host to advise TDLS Tear down */
+	A_UINT32 tx_teardown_threshold;
+	/** Absolute RSSI value under which notify/suggest TDLS Teardown */
+	A_INT32 rssi_teardown_threshold;
+	/** Peer RSSI < (AP RSSI + delta) will trigger a teardown */
+	A_INT32 rssi_delta;
+	/** TDLS Option Control
+	 * Off-Channel, Buffer STA, (later)Sleep STA support */
+	A_UINT32 tdls_options;
+	/* Buffering time in number of beacon intervals */
+	A_UINT32 tdls_peer_traffic_ind_window;
+	/* Wait time for PTR frame */
+	A_UINT32 tdls_peer_traffic_response_timeout_ms;
+	/* Self PUAPSD mask */
+	A_UINT32 tdls_puapsd_mask;
+	/* Inactivity timeout */
+	A_UINT32 tdls_puapsd_inactivity_time_ms;
+	/* Max of rx frame during SP */
+	A_UINT32 tdls_puapsd_rx_frame_threshold;
+	/* Duration (in ms) over which to check whether TDLS link
+	 * needs to be torn down
+	 */
+	A_UINT32 teardown_notification_ms;
+	/* STA kickout threshold for TDLS peer */
+	A_UINT32 tdls_peer_kickout_threshold;
+} wmi_tdls_set_state_cmd_fixed_param;
+
+/* WMI_TDLS_PEER_UPDATE_CMDID */
+
+enum wmi_tdls_peer_state {
+	/** tx peer TDLS link setup now starting, traffic to DA should be
+	 * paused (except TDLS frames) until state is moved to CONNECTED (or
+	 * TEARDOWN on setup failure) */
+	WMI_TDLS_PEER_STATE_PEERING,
+	/** tx peer TDLS link established, running (all traffic to DA unpaused) */
+	WMI_TDLS_PEER_STATE_CONNECTED,
+	/** tx peer TDLS link tear down started (link paused, any frames
+	 * queued for DA will be requeued back through the AP)*/
+	WMI_TDLS_PEER_STATE_TEARDOWN,
+	/* Add peer mac into connection table */
+	WMI_TDLS_PEER_ADD_MAC_ADDR,
+	/* Remove peer mac from connection table */
+	WMI_TDLS_PEER_REMOVE_MAC_ADDR,
+};
+
+/* NB: These defines are fixed, and cannot be changed without breaking WMI compatibility */
+#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_peer_capabilities  */
+	A_UINT32 tlv_header;
+	/* Peer's QoS Info - for U-APSD */
+	/* AC FLAGS  - accessed through macros below */
+	/* Ack, SP, More Data Ack - accessed through macros below */
+	A_UINT32 peer_qos;
+	/*TDLS Peer's U-APSD Buffer STA Support */
+	A_UINT32 buff_sta_support;
+	/*TDLS off channel related params */
+	A_UINT32 off_chan_support;
+	A_UINT32 peer_curr_operclass;
+	A_UINT32 self_curr_operclass;
+	/* Number of channels available for off channel operation */
+	A_UINT32 peer_chan_len;
+	A_UINT32 peer_operclass_len;
+	A_UINT8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
+	/* Is peer initiator or responder of TDLS setup request */
+	A_UINT32 is_peer_responder;
+	/* Preferred off channel number as configured by user */
+	A_UINT32 pref_offchan_num;
+	/* Preferred off channel bandwidth as configured by user */
+	A_UINT32 pref_offchan_bw;
+
+	/** Followed by the variable length TLV peer_chan_list:
+	 *  wmi_channel peer_chan_list[].
+	 *  Array size would be peer_chan_len.
+	 *  This array is intersected channels which is supported by both peer
+	 *  and DUT. freq1 in chan_info shall be same as mhz, freq2 shall be 0.
+	 *  FW shall compute BW for an offchan based on peer's ht/vht cap
+	 *  received in peer_assoc cmd during change STA operation
+	 */
+} wmi_tdls_peer_capabilities;
+
+#define WMI_TDLS_QOS_VO_FLAG           0
+#define WMI_TDLS_QOS_VI_FLAG           1
+#define WMI_TDLS_QOS_BK_FLAG           2
+#define WMI_TDLS_QOS_BE_FLAG           3
+#define WMI_TDLS_QOS_ACK_FLAG          4
+#define WMI_TDLS_QOS_SP_FLAG           5
+#define WMI_TDLS_QOS_MOREDATA_FLAG     7
+
+#define WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps,flag) do { \
+		(ppeer_caps)->peer_qos |=  (1 << flag);	     \
+} while(0)
+#define WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps,flag)   \
+	(((ppeer_caps)->peer_qos & (1 << flag)) >> flag)
+
+#define WMI_SET_TDLS_PEER_VO_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_VO_FLAG)
+#define WMI_GET_TDLS_PEER_VO_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_VO_FLAG)
+#define WMI_SET_TDLS_PEER_VI_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_VI_FLAG)
+#define WMI_GET_TDLS_PEER_VI_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_VI_FLAG)
+#define WMI_SET_TDLS_PEER_BK_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_BK_FLAG)
+#define WMI_GET_TDLS_PEER_BK_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_BK_FLAG)
+#define WMI_SET_TDLS_PEER_BE_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_BE_FLAG)
+#define WMI_GET_TDLS_PEER_BE_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_BE_FLAG)
+#define WMI_SET_TDLS_PEER_ACK_UAPSD(ppeer_caps)	\
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_ACK_FLAG)
+#define WMI_GET_TDLS_PEER_ACK_UAPSD(ppeer_caps)	\
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_ACK_FLAG)
+/* SP has 2 bits */
+#define WMI_SET_TDLS_PEER_SP_UAPSD(ppeer_caps,val) do {	\
+		(ppeer_caps)->peer_qos |=  (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG); \
+} while(0)
+#define WMI_GET_TDLS_PEER_SP_UAPSD(ppeer_caps) \
+	(((ppeer_caps)->peer_qos & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG)
+
+#define WMI_SET_TDLS_PEER_MORE_DATA_ACK_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_MOREDATA_FLAG)
+#define WMI_GET_TDLS_PEER_MORE_DATA_ACK_UAPSD(ppeer_caps) \
+	WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_MOREDATA_FLAG)
+
+#define WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd,flag) do { \
+		(pset_cmd)->tdls_puapsd_mask |=  (1 << flag);	   \
+} while(0)
+#define WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd,flag)   \
+	(((pset_cmd)->tdls_puapsd_mask & (1 << flag)) >> flag)
+
+#define WMI_SET_TDLS_SELF_VO_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_VO_FLAG)
+#define WMI_GET_TDLS_SELF_VO_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_VO_FLAG)
+#define WMI_SET_TDLS_SELF_VI_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_VI_FLAG)
+#define WMI_GET_TDLS_SELF_VI_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_VI_FLAG)
+#define WMI_SET_TDLS_SELF_BK_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_BK_FLAG)
+#define WMI_GET_TDLS_SELF__BK_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_BK_FLAG)
+#define WMI_SET_TDLS_SELF_BE_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_BE_FLAG)
+#define WMI_GET_TDLS_SELF_BE_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_BE_FLAG)
+#define WMI_SET_TDLS_SELF_ACK_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_ACK_FLAG)
+#define WMI_GET_TDLS_SELF_ACK_UAPSD(pset_cmd) \
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_ACK_FLAG)
+/* SP has 2 bits */
+#define WMI_SET_TDLS_SELF_SP_UAPSD(pset_cmd,val) do { \
+		(pset_cmd)->tdls_puapsd_mask |=  (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG);	\
+} while(0)
+#define WMI_GET_TDLS_SELF_SP_UAPSD(pset_cmd) \
+	(((pset_cmd)->tdls_puapsd_mask & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG)
+
+#define WMI_SET_TDLS_SELF_MORE_DATA_ACK_UAPSD(pset_cmd)	\
+	WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_MOREDATA_FLAG)
+#define WMI_GET_TDLS_SELF_MORE_DATA_ACK_UAPSD(pset_cmd)	\
+	WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_MOREDATA_FLAG)
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_peer_update_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** new TDLS state for peer (wmi_tdls_peer_state) */
+	A_UINT32 peer_state;
+	/* The TLV for wmi_tdls_peer_capabilities will follow.
+	 *     wmi_tdls_peer_capabilities  peer_caps;
+	 */
+	/** Followed by the variable length TLV chan_info:
+	 *  wmi_channel chan_info[] */
+} wmi_tdls_peer_update_cmd_fixed_param;
+
+/* WMI_TDLS_SET_OFFCHAN_MODE_CMDID */
+
+/* bitmap  20, 40, 80 or 160 MHz wide channel */
+#define WMI_TDLS_OFFCHAN_20MHZ                  0x1     /*  20 MHz wide channel */
+#define WMI_TDLS_OFFCHAN_40MHZ                  0x2     /*  40 MHz wide channel */
+#define WMI_TDLS_OFFCHAN_80MHZ                  0x4     /*  80 MHz wide channel */
+#define WMI_TDLS_OFFCHAN_160MHZ                 0x8     /*  160 MHz wide channel */
+
+enum wmi_tdls_offchan_mode {
+	WMI_TDLS_ENABLE_OFFCHANNEL,
+	WMI_TDLS_DISABLE_OFFCHANNEL
+};
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_set_offchan_mode_cmd_fixed_param  */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** Enable/Disable TDLS offchannel */
+	A_UINT32 offchan_mode;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/* Is peer initiator or responder of TDLS setup request */
+	A_UINT32 is_peer_responder;
+	/* off channel number */
+	A_UINT32 offchan_num;
+	/* off channel bandwidth bitmap, e.g. WMI_OFFCHAN_20MHZ */
+	A_UINT32 offchan_bw_bitmap;
+	/* operating class for offchan */
+	A_UINT32 offchan_oper_class;
+} wmi_tdls_set_offchan_mode_cmd_fixed_param;
+
+/** TDLS EVENTS */
+enum wmi_tdls_peer_notification {
+	/** tdls discovery recommended for peer (based
+	 * on tx bytes per second > tx_discover threshold) */
+	WMI_TDLS_SHOULD_DISCOVER,
+	/** tdls link tear down recommended for peer
+	 * due to tx bytes per second below tx_teardown_threshold
+	 * NB: this notification sent once */
+	WMI_TDLS_SHOULD_TEARDOWN,
+	/** tx peer TDLS link tear down complete */
+	WMI_TDLS_PEER_DISCONNECTED,
+};
+
+enum wmi_tdls_peer_reason {
+	/** tdls teardown recommended due to low transmits */
+	WMI_TDLS_TEARDOWN_REASON_TX,
+	/** tdls link tear down recommended due to poor RSSI */
+	WMI_TDLS_TEARDOWN_REASON_RSSI,
+	/** tdls link tear down recommended due to offchannel scan */
+	WMI_TDLS_TEARDOWN_REASON_SCAN,
+	/** tdls peer disconnected due to peer deletion */
+	WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
+	/** tdls peer disconnected due to PTR timeout */
+	WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
+	/** tdls peer disconnected due wrong PTR format */
+	WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
+	/** tdls peer not responding */
+	WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
+};
+
+/* WMI_TDLS_PEER_EVENTID */
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_peer_event_fixed_param  */
+	A_UINT32 tlv_header;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+	/** TDLS peer status (wmi_tdls_peer_notification)*/
+	A_UINT32 peer_status;
+	/** TDLS peer reason (wmi_tdls_peer_reason) */
+	A_UINT32 peer_reason;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+} wmi_tdls_peer_event_fixed_param;
+
+/* NOTE: wmi_vdev_mcc_bcn_intvl_change_event_fixed_param would be deprecated. Please
+   don't use this for any new implementations */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_mcc_bcn_intvl_change_event_fixed_param  */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* New beacon interval to be used for the specified VDEV suggested by firmware */
+	A_UINT32 new_bcn_intvl;
+} wmi_vdev_mcc_bcn_intvl_change_event_fixed_param;
+
+/* WMI_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMDID */
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_resmgr_adaptive_ocs_enable_disable_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** 1: enable fw based adaptive ocs,
+	 *  0: disable fw based adaptive ocs
+	 */
+	A_UINT32 enable;
+	/** This field contains the MAC identifier in order to lookup the appropriate OCS instance. */
+	/** The valid range is 0 to (num_macs-1). */
+	A_UINT32 mac_id;
+} wmi_resmgr_adaptive_ocs_enable_disable_cmd_fixed_param;
+
+/* WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID */
+typedef struct {
+	/* Frequency of the channel for which the quota is set */
+	A_UINT32 chan_mhz;
+	/* Requested channel time quota expressed as percentage */
+	A_UINT32 channel_time_quota;
+} wmi_resmgr_chan_time_quota;
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_resmgr_set_chan_time_quota_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** number of channel time quota command structures
+	 * (wmi_resmgr_chan_time_quota) 1 or 2
+	 */
+	A_UINT32 num_chans;
+/* This TLV is followed by another TLV of array of bytes
+ * A_UINT8 data[];
+ * This data array contains
+ * num_chans * size of(struct wmi_resmgr_chan_time_quota)
+ */
+} wmi_resmgr_set_chan_time_quota_cmd_fixed_param;
+
+/* WMI_RESMGR_SET_CHAN_LATENCY_CMDID */
+typedef struct {
+	/* Frequency of the channel for which the latency is set */
+	A_UINT32 chan_mhz;
+	/* Requested channel latency in milliseconds */
+	A_UINT32 latency;
+} wmi_resmgr_chan_latency;
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_resmgr_set_chan_latency_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** number of channel latency command structures
+	 * (wmi_resmgr_chan_latency) 1 or 2
+	 */
+	A_UINT32 num_chans;
+/* This TLV is followed by another TLV of array of bytes
+ * A_UINT8 data[];
+ * This data array contains
+ * num_chans * size of(struct wmi_resmgr_chan_latency)
+ */
+} wmi_resmgr_set_chan_latency_cmd_fixed_param;
+
+/* WMI_STA_SMPS_FORCE_MODE_CMDID */
+
+/** STA SMPS Forced Mode */
+typedef enum {
+	WMI_SMPS_FORCED_MODE_NONE = 0,
+	WMI_SMPS_FORCED_MODE_DISABLED,
+	WMI_SMPS_FORCED_MODE_STATIC,
+	WMI_SMPS_FORCED_MODE_DYNAMIC
+} wmi_sta_smps_forced_mode;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_sta_smps_force_mode_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** Unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** The mode of SMPS that is to be forced in the FW. */
+	A_UINT32 forced_mode;
+} wmi_sta_smps_force_mode_cmd_fixed_param;
+
+/** wlan HB commands */
+#define WMI_WLAN_HB_ITEM_UDP            0x1
+#define WMI_WLAN_HB_ITEM_TCP            0x2
+#define WMI_WLAN_HB_MAX_FILTER_SIZE     32      /* should be equal to WLAN_HB_MAX_FILTER_SIZE, must be a multiple of 4 bytes */
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_hb_set_enable_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 enable;
+	A_UINT32 item;
+	A_UINT32 session;
+} wmi_hb_set_enable_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_hb_set_tcp_params_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 srv_ip;
+	A_UINT32 dev_ip;
+	A_UINT32 seq;
+	A_UINT32 src_port;
+	A_UINT32 dst_port;
+	A_UINT32 interval;
+	A_UINT32 timeout;
+	A_UINT32 session;
+	wmi_mac_addr gateway_mac;
+} wmi_hb_set_tcp_params_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_hb_set_tcp_pkt_filter_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 length;
+	A_UINT32 offset;
+	A_UINT32 session;
+	A_UINT8 filter[WMI_WLAN_HB_MAX_FILTER_SIZE];
+} wmi_hb_set_tcp_pkt_filter_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_hb_set_udp_params_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 srv_ip;
+	A_UINT32 dev_ip;
+	A_UINT32 src_port;
+	A_UINT32 dst_port;
+	A_UINT32 interval;
+	A_UINT32 timeout;
+	A_UINT32 session;
+	wmi_mac_addr gateway_mac;
+} wmi_hb_set_udp_params_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_hb_set_udp_pkt_filter_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	A_UINT32 length;
+	A_UINT32 offset;
+	A_UINT32 session;
+	A_UINT8 filter[WMI_WLAN_HB_MAX_FILTER_SIZE];
+} wmi_hb_set_udp_pkt_filter_cmd_fixed_param;
+
+/** wlan HB events */
+typedef enum {
+	WMI_WLAN_HB_REASON_UNKNOWN = 0,
+	WMI_WLAN_HB_REASON_TCP_TIMEOUT = 1,
+	WMI_WLAN_HB_REASON_UDP_TIMEOUT = 2,
+} WMI_HB_WAKEUP_REASON;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_hb_ind_event_fixed_param */
+	A_UINT32 vdev_id;               /* unique id identifying the VDEV */
+	A_UINT32 session;               /* Session ID from driver */
+	A_UINT32 reason;                /* wakeup reason */
+} wmi_hb_ind_event_fixed_param;
+
+/** WMI_STA_SMPS_PARAM_CMDID */
+typedef enum {
+	/** RSSI threshold to enter Dynamic SMPS mode from inactive mode */
+	WMI_STA_SMPS_PARAM_UPPER_RSSI_THRESH = 0,
+	/** RSSI threshold to enter Stalled-D-SMPS mode from D-SMPS mode or
+	 * to enter D-SMPS mode from Stalled-D-SMPS mode */
+	WMI_STA_SMPS_PARAM_STALL_RSSI_THRESH = 1,
+	/** RSSI threshold to disable SMPS modes */
+	WMI_STA_SMPS_PARAM_LOWER_RSSI_THRESH = 2,
+	/** Upper threshold for beacon-RSSI. Used to reduce RX chainmask. */
+	WMI_STA_SMPS_PARAM_UPPER_BRSSI_THRESH = 3,
+	/** Lower threshold for beacon-RSSI. Used to increase RX chainmask. */
+	WMI_STA_SMPS_PARAM_LOWER_BRSSI_THRESH = 4,
+	/** Enable/Disable DTIM 1chRx feature */
+	WMI_STA_SMPS_PARAM_DTIM_1CHRX_ENABLE = 5
+} wmi_sta_smps_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_sta_smps_param_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** Unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** SMPS parameter (see wmi_sta_smps_param) */
+	A_UINT32 param;
+	/** Value of SMPS parameter */
+	A_UINT32 value;
+} wmi_sta_smps_param_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_mcc_sched_sta_traffic_stats */
+	A_UINT32 tlv_header;
+	/* TX stats */
+	A_UINT32 txBytesPushed;
+	A_UINT32 txPacketsPushed;
+	/* RX stats */
+	A_UINT32 rxBytesRcvd;
+	A_UINT32 rxPacketsRcvd;
+	A_UINT32 rxTimeTotal;
+	/** peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_mcc_sched_sta_traffic_stats;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_mcc_sched_traffic_stats_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** Duration over which the host stats were collected */
+	A_UINT32 duration;
+	/** Number of stations filled in following stats array */
+	A_UINT32 num_sta;
+	/* Following this struct are the TLVs:
+	 * wmi_mcc_sched_sta_traffic_stats mcc_sched_sta_traffic_stats_list;
+	 */
+} wmi_mcc_sched_traffic_stats_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals  WMITLV_TAG_STRUC_wmi_batch_scan_enable_cmd_fixed_param */
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/*Batch scan enable command parameters */
+	A_UINT32 scanInterval;
+	A_UINT32 numScan2Batch;
+	A_UINT32 bestNetworks;
+	A_UINT32 rfBand;
+	A_UINT32 rtt;
+} wmi_batch_scan_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_batch_scan_enabled_event_fixed_param  */
+	A_UINT32 supportedMscan;
+} wmi_batch_scan_enabled_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals  WMITLV_TAG_STRUC_wmi_batch_scan_disable_cmd_fixed_param */
+/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	A_UINT32 param;
+} wmi_batch_scan_disable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals  WMITLV_TAG_STRUC_wmi_batch_scan_trigger_result_cmd_fixed_param */
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	A_UINT32 param;
+} wmi_batch_scan_trigger_result_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	wmi_mac_addr bssid;             /* BSSID */
+	wmi_ssid ssid;          /* SSID */
+	A_UINT32 ch;            /* Channel */
+	A_UINT32 rssi;          /* RSSI or Level */
+	/* Timestamp when Network was found. Used to calculate age based on timestamp in GET_RSP msg header */
+	A_UINT32 timestamp;
+} wmi_batch_scan_result_network_info;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 scanId;                /* Scan List ID. */
+	/* No of AP in a Scan Result. Should be same as bestNetwork in SET_REQ msg */
+	A_UINT32 numNetworksInScanList;
+	A_UINT32 netWorkStartIndex;             /* indicate the start index of network info */
+} wmi_batch_scan_result_scan_list;
+
+#define LPI_IE_BITMAP_BSSID                  0x00000001     /* if this bit is set, bssid of the scan response frame is sent as the first IE in the data buffer sent to LOWI LP.*/
+#define LPI_IE_BITMAP_IS_PROBE               0x00000002     /*send true or false based on scan response frame being a Probe Rsp or not*/
+#define LPI_IE_BITMAP_SSID                   0x00000004     /*send ssid from received scan response frame*/
+#define LPI_IE_BITMAP_RSSI                   0x00000008     /* end RSSI value reported by HW for the received scan response after adjusting with noise floor*/
+#define LPI_IE_BITMAP_CHAN                   0x00000010     /*send channel number from the received scan response*/
+#define LPI_IE_BITMAP_AP_TX_PWR              0x00000020     /* sen Tx power from TPC IE of scan rsp*/
+#define LPI_IE_BITMAP_TX_RATE                0x00000040     /*send rate of the received frame as reported by HW.*/
+#define LPI_IE_BITMAP_80211_MC_SUPPORT       0x00000080     /*send true or false based on the received scan rsp was from a 11mc supported AP or not.*/
+#define LPI_IE_BITMAP_TSF_TIMER_VALUE        0x00000100     /*send timestamp reported in the received scan rsp frame.*/
+#define LPI_IE_BITMAP_AGE_OF_MEASUREMENT     0x00000200     /* current system time - received time) = duration of time scan rsp frame data is kept in the buffer before sending to LOWI LP.*/
+/*
+ * TEMPORARY alias of incorrect old name the correct name.
+ * This alias will be removed once all references to the old name have been fixed.
+ */
+#define LPI_IE_BITMAP_AGE_OF_MESAUREMENT LPI_IE_BITMAP_AGE_OF_MEASUREMENT
+#define LPI_IE_BITMAP_CONN_STATUS            0x00000400     /* If an infra STA is active and connected to an AP, true value is sent else false.*/
+#define LPI_IE_BITMAP_MSAP_IE                0x00000800     /* info on the vendor specific proprietary IE MSAP*/
+#define LPI_IE_BITMAP_SEC_STATUS             0x00001000     /* we indicate true or false based on if the AP has WPA or RSN security enabled*/
+#define LPI_IE_BITMAP_DEVICE_TYPE            0x00002000     /* info about the beacons coming from an AP or P2P or NAN device.*/
+#define LPI_IE_BITMAP_CHAN_IS_PASSIVE        0x00004000     /* info on whether the scan rsp was received from a passive channel*/
+#define LPI_IE_BITMAP_DWELL_TIME             0x00008000     /* send the scan dwell time of the channel on which the current scan rsp frame was received.*/
+#define LPI_IE_BITMAP_BAND_CENTER_FREQ1      0x00010000     /* the center frequencies in case AP is supporting wider channels than 20 MHz*/
+#define LPI_IE_BITMAP_BAND_CENTER_FREQ2      0x00020000     /* same as above*/
+#define LPI_IE_BITMAP_PHY_MODE               0x00040000     /* PHY mode indicates a, b, ,g, ac and other combinations*/
+#define LPI_IE_BITMAP_SCAN_MODULE_ID         0x00080000     /* scan module id indicates the scan client who originated the scan*/
+#define LPI_IE_BITMAP_SCAN_ID                0x00100000     /*extscan inserts the scan cycle count for this value; other scan clients can insert the scan id of the scan, if needed.*/
+#define LPI_IE_BITMAP_FLAGS                  0x00200000     /* reserved as a bitmap to indicate more scan information; one such use being to indicate if the on-going scan is interrupted or not*/
+#define LPI_IE_BITMAP_CACHING_REQD           0x00400000     /*extscan will use this field to indicate if this frame info needs to be cached in LOWI LP or not*/
+#define LPI_IE_BITMAP_ALL                    0xFFFFFFFF
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/**A_BOOL indicates LPI mgmt snooping enable/disable*/
+	A_UINT32 enable;
+	/**LPI snooping mode*/
+	A_UINT32 snooping_mode;
+	/** LPI interested IEs in snooping context */
+	A_UINT32 ie_bitmap;
+} wmi_lpi_mgmt_snooping_config_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_start_scan_cmd_fixed_param */
+	/** Scan ID */
+	A_UINT32 scan_id;
+	/** Scan requestor ID */
+	A_UINT32 scan_req_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** LPI interested IEs in scan context */
+	A_UINT32 ie_bitmap;
+	/** Scan Priority, input to scan scheduler */
+	A_UINT32 scan_priority;
+	/** dwell time in msec on active channels */
+	A_UINT32 dwell_time_active;
+	/** dwell time in msec on passive channels */
+	A_UINT32 dwell_time_passive;
+	/** min time in msec on the BSS channel,only valid if atleast one VDEV is active*/
+	A_UINT32 min_rest_time;
+	/** max rest time in msec on the BSS channel,only valid if at least one VDEV is active*/
+	/** the scanner will rest on the bss channel at least min_rest_time. after min_rest_time the scanner
+	 *  will start checking for tx/rx activity on all VDEVs. if there is no activity the scanner will
+	 *  switch to off channel. if there is activity the scanner will let the radio on the bss channel
+	 *  until max_rest_time expires.at max_rest_time scanner will switch to off channel
+	 *  irrespective of activity. activity is determined by the idle_time parameter.
+	 */
+	A_UINT32 max_rest_time;
+	/** time before sending next set of probe requests.
+	 *   The scanner keeps repeating probe requests transmission with period specified by repeat_probe_time.
+	 *   The number of probe requests specified depends on the ssid_list and bssid_list
+	 */
+	A_UINT32 repeat_probe_time;
+	/** time in msec between 2 consequetive probe requests with in a set. */
+	A_UINT32 probe_spacing_time;
+	/** data inactivity time in msec on bss channel that will be used by scanner for measuring the inactivity  */
+	A_UINT32 idle_time;
+	/** maximum time in msec allowed for scan  */
+	A_UINT32 max_scan_time;
+	/** delay in msec before sending first probe request after switching to a channel */
+	A_UINT32 probe_delay;
+	/** Scan control flags */
+	A_UINT32 scan_ctrl_flags;
+	/** Burst duration time in msec*/
+	A_UINT32 burst_duration;
+
+	/** # if channels to scan. In the TLV channel_list[] */
+	A_UINT32 num_chan;
+	/** number of bssids. In the TLV bssid_list[] */
+	A_UINT32 num_bssid;
+	/** number of ssid. In the TLV ssid_list[] */
+	A_UINT32 num_ssids;
+	/** number of bytes in ie data. In the TLV ie_data[] */
+	A_UINT32 ie_len;
+
+/**
+ * TLV (tag length value ) parameters follow the scan_cmd
+ * structure. The TLV's are:
+ *     A_UINT32 channel_list[];
+ *     wmi_ssid ssid_list[];
+ *     wmi_mac_addr bssid_list[];
+ *     A_UINT8 ie_data[];
+ */
+} wmi_lpi_start_scan_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_stop_scan_cmd_fixed_param */
+	/** Scan requestor ID */
+	A_UINT32 scan_req_id;
+	/** Scan ID */
+	A_UINT32 scan_id;
+	/**
+	 * Req Type
+	 * req_type should be WMI_SCAN_STOP_ONE, WMI_SCN_STOP_VAP_ALL or WMI_SCAN_STOP_ALL
+	 * WMI_SCAN_STOP_ONE indicates to stop a specific scan with scan_id
+	 * WMI_SCN_STOP_VAP_ALL indicates to stop all scan requests on a specific vDev with vdev_id
+	 * WMI_SCAN_STOP_ALL indicates to stop all scan requests in both Scheduler's queue and Scan Engine
+	 */
+	A_UINT32 req_type;
+	/**
+	 * vDev ID
+	 * used when req_type equals to WMI_SCN_STOP_VAP_ALL, it indexed the vDev on which to stop the scan
+	 */
+	A_UINT32 vdev_id;
+} wmi_lpi_stop_scan_cmd_fixed_param;
+
+typedef enum {
+	WMI_LPI_DEVICE_TYPE_AP = 1,
+	WMI_LPI_DEVICE_TYPE_P2P = 2,
+	WMI_LPI_DEVICE_TYPE_NAN = 3,
+} wmi_lpi_device_type;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** Scan requestor ID */
+	A_UINT32 scan_req_id;
+	A_UINT32 ie_bitmap;
+	A_UINT32 data_len;
+} wmi_lpi_result_event_fixed_param;
+
+typedef enum {
+	/** User scan Request completed */
+	WMI_LPI_STATUS_SCAN_REQ_COMPLED = 0,
+	/** User Request was never serviced */
+	WMI_LPI_STATUS_DROPPED_REQ = 1,
+	/** Illegal channel Req */
+	WMI_LPI_STATUS_ILLEGAL_CHAN_REQ = 2,
+	/** Illegal Operation Req */
+	WMI_LPI_STATUS_ILLEGAL_OPER_REQ = 3,
+	/** Request Aborted */
+	WMI_LPI_STATUS_REQ_ABORTED = 4,
+	/** Request Timed Out */
+	WMI_LPI_STATUS_REQ_TIME_OUT = 5,
+	/** Medium Busy, already there
+	 * is a scan is going on */
+	WMI_LPI_STATUS_MEDIUM_BUSY = 6,
+	/* Extscan is the scan client whose scan complete event is triggered */
+	WMI_LPI_STATUS_EXTSCAN_CYCLE_AND_SCAN_REQ_COMPLETED = 7,
+} wmi_lpi_staus;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	wmi_lpi_staus status;
+	/** Scan requestor ID */
+	A_UINT32 scan_req_id;
+} wmi_lpi_status_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	wmi_mac_addr bssid;
+	wmi_ssid ssid;
+	A_UINT32 freq;
+	A_UINT32 rssi;
+	A_UINT32 vdev_id;
+} wmi_lpi_handoff_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 timestamp;             /*timestamp of batch scan event */
+	A_UINT32 numScanLists;          /*number of scan in this event */
+	A_UINT32 isLastResult;          /*is this event a last event of the whole batch scan */
+} wmi_batch_scan_result_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_p2p_noa_event_fixed_param  */
+	A_UINT32 vdev_id;
+	/* This TLV is followed by p2p_noa_info for vdev :
+	 *     wmi_p2p_noa_info p2p_noa_info;
+	 */
+} wmi_p2p_noa_event_fixed_param;
+
+#define WMI_RFKILL_CFG_RADIO_LEVEL_OFFSET      6
+#define WMI_RFKILL_CFG_RADIO_LEVEL_MASK      0x1
+
+#define WMI_RFKILL_CFG_GPIO_PIN_NUM_OFFSET      0
+#define WMI_RFKILL_CFG_GPIO_PIN_NUM_MASK      0x3f
+
+#define WMI_RFKILL_CFG_PIN_AS_GPIO_OFFSET      7
+#define WMI_RFKILL_CFG_PIN_AS_GPIO_MASK      0xf
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * */
+	A_UINT32 tlv_header;
+	/** gpip pin number */
+	A_UINT32 gpio_pin_num;
+	/** gpio interupt type */
+	A_UINT32 int_type;
+	/** RF radio status */
+	A_UINT32 radio_state;
+} wmi_rfkill_mode_param;
+
+typedef enum {
+	WMI_SET_LED_SYS_POWEROFF,
+	WMI_SET_LED_SYS_S3_SUSPEND,
+	WMI_SET_LED_SYS_S4_S5,
+	WMI_SET_LED_SYS_DRIVER_DISABLE,
+	WMI_SET_LED_SYS_WAKEUP,
+	WMI_SET_LED_SYS_ALWAYS_ON,              /* just for test! */
+	WMI_SET_LED_SYS_POWERON,
+} wmi_led_sys_state_param;
+
+typedef enum {
+	WMI_CONFIG_LED_TO_VDD = 0,
+	WMI_CONFIG_LED_TO_GND = 1,
+} wmi_config_led_connect_type;
+
+typedef enum {
+	WMI_CONFIG_LED_NOT_WITH_BT = 0,
+	WMI_CONFIG_LED_WITH_BT = 1,
+} wmi_config_led_with_bt_flag;
+
+typedef enum {
+	WMI_CONFIG_LED_DISABLE = 0,
+	WMI_CONFIG_LED_ENABLE = 1,
+} wmi_config_led_enable_flag;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_peer_info_req_cmd_fixed_param   */
+	A_UINT32 tlv_header;
+	/* Set GPIO pin */
+	A_UINT32 led_gpio_pin;
+	/* Set connect type defined in wmi_config_led_connect_type */
+	A_UINT32 connect_type;
+	/* Set flag defined in wmi_config_led_with_bt_flag */
+	A_UINT32 with_bt;
+	/* Set LED enablement defined in wmi_config_led_enable_flag */
+	A_UINT32 led_enable;
+} wmi_pdev_set_led_config_cmd_fixed_param;
+
+#define WMI_WNTS_CFG_GPIO_PIN_NUM_OFFSET 0
+#define WMI_WNTS_CFG_GPIO_PIN_NUM_MASK 0xff
+
+/** WMI_PEER_INFO_REQ_CMDID
+ *   Request FW to provide peer info */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_peer_info_req_cmd_fixed_param   */
+	A_UINT32 tlv_header;
+	/** In order to get the peer info for a single peer, host shall
+	 *  issue the peer_mac_address of that peer. For getting the
+	 *  info all peers, the host shall issue 0xFFFFFFFF as the mac
+	 *  address. The firmware will return the peer info for all the
+	 *  peers on the specified vdev_id */
+	wmi_mac_addr peer_mac_address;
+	/** vdev id */
+	A_UINT32 vdev_id;
+} wmi_peer_info_req_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_peer_info */
+	A_UINT32 tlv_header;
+	/** mac addr of the peer */
+	wmi_mac_addr peer_mac_address;
+	/** data_rate of the peer */
+	A_UINT32 data_rate;
+	/** rssi of the peer */
+	A_UINT32 rssi;
+	/** tx fail count */
+	A_UINT32 tx_fail_cnt;
+} wmi_peer_info;
+
+/** FW response with the peer info */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_peer_info_event_fixed_param   */
+	A_UINT32 tlv_header;
+	/** number of peers in peer_info */
+	A_UINT32 num_peers;
+	/* This TLV is followed by another TLV of array of structs
+	 * wmi_peer_info peer_info[];
+	 */
+} wmi_peer_info_event_fixed_param;
+
+/** FW response when tx failure count has reached threshold
+ *  for a peer */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_peer_tx_fail_cnt_thr_event_fixed_param */
+	A_UINT32 tlv_header;
+	/** vdev id*/
+	A_UINT32 vdev_id;
+	/** mac address */
+	wmi_mac_addr peer_mac_address;
+	/** tx failure count- will eventually be removed and not used * */
+	A_UINT32 tx_fail_cnt;
+	/** seq number of the nth tx_fail_event */
+	A_UINT32 seq_no;
+} wmi_peer_tx_fail_cnt_thr_event_fixed_param;
+
+enum wmi_rmc_mode {
+	/** Disable RMC */
+	WMI_RMC_MODE_DISABLED = 0,
+	/** Enable RMC */
+	WMI_RMC_MODE_ENABLED = 1,
+};
+
+/** Enable RMC transmitter functionality. Upon
+ *  receiving this, the FW shall mutlicast frames with
+ *  reliablity. This is a vendor
+ *  proprietary feature. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_rmc_set_mode_cmd_fixed_param   */
+	A_UINT32 tlv_header;
+	/** vdev id*/
+	A_UINT32 vdev_id;
+	/** enable_rmc contains values from enum wmi_rmc_mode;
+	 *  Default value: 0 (disabled) */
+	A_UINT32 enable_rmc;
+} wmi_rmc_set_mode_cmd_fixed_param;
+
+/** Configure transmission periodicity of action frames in a
+ *  RMC network for the multicast transmitter */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_rmc_set_action_period_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** vdev id */
+	A_UINT32 vdev_id;
+	/** time period in milliseconds. Default: 300 ms.
+	   An action frame indicating the current leader is transmitted by the
+	   RMC transmitter once every 'periodity_msec' */
+	A_UINT32 periodicity_msec;
+} wmi_rmc_set_action_period_cmd_fixed_param;
+
+/** Optimise Leader selection process in RMC functionality. For
+ *  Enhancement/Debug purposes only */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_rmc_config_cmd_fixed_param   */
+	A_UINT32 tlv_header;
+	/** vdev id */
+	A_UINT32 vdev_id;
+	/** flags ::
+	 *  0x0001 - Enable beacon averaging
+	 *  0x0002 - Force leader selection
+	 *  0x0004 - Enable Timer based leader switch
+	 *  0x0008 - Use qos/NULL based for multicast reliability */
+	A_UINT32 flags;
+	/**  control leader change timeperiod (in seconds) */
+	A_UINT32 peridocity_leader_switch;
+	/** control activity timeout value for data rx (in seconds) */
+	A_UINT32 data_activity_timeout;
+	/** mac address of leader */
+	wmi_mac_addr forced_leader_mac_addr;
+} wmi_rmc_config_cmd_fixed_param;
+
+/** MHF is generally implemented in
+ *  the kernel. To decrease system power consumption, the
+ *  driver can enable offloading this to the chipset. In
+ *  order for the offload, the firmware needs the routing table.
+ *  The host shall plumb the routing table into FW. The firmware
+ *  shall perform an IP address lookup and forward the packet to
+ *  the next hop using next hop's mac address. This is a vendor
+ *  proprietary feature. */
+enum wmi_mhf_ofl_mode {
+	/** Disable MHF offload */
+	WMI_MHF_OFL_MODE_DISABLED = 0,
+	/** Enable MHF offload */
+	WMI_MHF_OFL_MODE_ENABLED = 1,
+};
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_mhf_offload_set_mode_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** vdev id*/
+	A_UINT32 vdev_id;
+	/** enable_mhf_ofl contains values from enum
+	 *  wmi_mhf_ofl_mode; Default value: 0 (disabled) */
+	A_UINT32 enable_mhf_ofl;
+} wmi_mhf_offload_set_mode_cmd_fixed_param;
+
+enum wmi_mhf_ofl_table_action {
+	/** Create forwarding offload table in FW */
+	WMI_MHF_OFL_TBL_CREATE = 0,
+	/** Append to existing MHF offload table */
+	WMI_MHF_OFL_TBL_APPEND = 1,
+	/** Flush entire MHF offload table in FW */
+	WMI_MHF_OFL_TBL_FLUSH = 2,
+};
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_mhf_offload_plumb_routing_table_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** vdev id*/
+	A_UINT32 vdev_id;
+	/** action corresponds to values from enum
+	 *  wmi_mhf_ofl_table_action */
+	A_UINT32 action;
+	/** number of entries in the table */
+	A_UINT32 num_entries;
+/** Followed by the variable length TLV
+ *  wmi_mhf_offload_routing_table_entry entries[] */
+} wmi_mhf_offload_plumb_routing_table_cmd;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_mhf_offload_routing_table_entry */
+	A_UINT32 tlv_header;
+	/** Destination node's IP address */
+	WMI_IPV4_ADDR dest_ipv4_addr;
+	/** Next hop node's MAC address */
+	wmi_mac_addr next_hop_mac_addr;
+} wmi_mhf_offload_routing_table_entry;
+
+typedef struct {
+	/** tlv tag and len, tag equals
+	 * WMITLV_TAG_STRUC_wmi_dfs_radar_event */
+	A_UINT32 tlv_header;
+
+	/** full 64 tsf timestamp get from MAC tsf timer indicates
+	 * the time that the radar event uploading to host, split
+	 * it to high 32 bit and lower 32 bit in fulltsf_high and
+	 * full_tsf_low
+	 */
+	A_UINT32 upload_fullts_low;
+	A_UINT32 upload_fullts_high;
+
+	/** timestamp indicates the time when DFS pulse is detected
+	 * equal to ppdu_end_ts - radar_pusle_summary_ts_offset
+	 */
+	A_UINT32 pulse_detect_ts;
+
+	/** the duaration of the pulse in us */
+	A_UINT32 pulse_duration;
+
+	/** the center frequency of the radar pulse detected, KHz */
+	A_UINT32 pulse_center_freq;
+
+	/** bandwidth of current DFS channel, MHz */
+	A_UINT32 ch_bandwidth;
+
+	/** center channel frequency1 of current DFS channel, MHz */
+	A_UINT16 ch_center_freq1;
+
+	/** center channel frequency2 of current DFS channel, MHz,
+	 * reserved for 160 BW mode
+	 */
+	A_UINT16 ch_center_freq2;
+
+	/** flag to indicate if this pulse is chirp */
+	A_UINT8 pulse_is_chirp;
+
+	/** RSSI recorded in the ppdu */
+	A_UINT8 rssi;
+
+	/** extened RSSI info */
+	A_UINT8 rssi_ext;
+
+	/** For 4-byte aligment padding */
+	A_UINT8 reserved;
+
+	/** pmac_id for the radar event */
+	A_UINT8 pmac_id;
+
+	/** index of peak magnitude bin (signed) */
+	A_INT32 peak_sidx;
+
+} wmi_dfs_radar_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_thermal_mgmt_cmd_fixed_param  */
+
+	/*Thermal thresholds */
+	A_UINT32 lower_thresh_degreeC;          /* in degree C */
+	A_UINT32 upper_thresh_degreeC;          /* in degree C */
+
+	/*Enable/Disable Thermal Monitoring for Mitigation */
+	A_UINT32 enable;
+} wmi_thermal_mgmt_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_thermal_mgmt_event_fixed_param  */
+
+	A_UINT32 temperature_degreeC;           /* temperature in degree C */
+} wmi_thermal_mgmt_event_fixed_param;
+
+/**
+ * This command is sent from WLAN host driver to firmware to
+ * request firmware to configure auto shutdown timer in fw
+ * 0 - Disable <1-19600>-Enabled and timer value is seconds (86400 seconds = 1 day maximum>
+ */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_host_auto_shutdown_cfg_cmd_param  */
+	A_UINT32 timer_value;
+	/** timer value; 0=disable */
+} wmi_host_auto_shutdown_cfg_cmd_fixed_param;
+
+enum wmi_host_auto_shutdown_reason {
+	WMI_HOST_AUTO_SHUTDOWN_REASON_UNKNOWN = 0,
+	WMI_HOST_AUTO_SHUTDOWN_REASON_TIMER_EXPIRY = 1,
+	WMI_HOST_AUTO_SHUTDOWN_REASON_MAX,
+};
+
+/* WMI_HOST_AUTO_SHUTDOWN_EVENTID  */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_host_auto_shutdown_event_fixed_param  */
+	A_UINT32 shutdown_reason;               /* value: wmi_host_auto_shutdown_reason */
+} wmi_host_auto_shutdown_event_fixed_param;
+
+/** New WMI command to support TPC CHAINMASK ADJUSTMENT ACCORDING TO a set of conditions specified in the command.
+ *  fw will save c tpc offset/chainmask along with conditions and adjust tpc/chainmask when condition meet.
+ *  This command is only used by some customer for  verification test.  It is not for end-user.
+ *
+ *  array of wmi_tpc_chainmask_config structures are passed with the command to specify multiple conditions.
+ *
+ *  The set of conditions include bt status, stbc status, band, phy_mode, 1stream/2streams, channel, rate. when all these conditions meet,
+ *  the output(tpc_offset,chainmask) will be applied on per packet basis. ack_offset is applied based on channel condtion only. When multiple
+ *  conditions has the same channel ,then the first ack_offset will be applied. It is better for host driver to make sure the
+ *  <channel, ack_offset> pair is unique.
+ *
+ *  the conditions (bt status, stbc status, band, phy_mode, 1steam/2streams, tpc_offset, ack_offset, chainmask) are combinedi into a single word
+ *  called basic_config_info by bitmap
+ *  to save memory. And channel & rate info will be tracked by 'channel' field and 'rate0', 'rate1' field because of its large combination.
+ *
+ *  'rate bit' or 'channel bit' field of basic_config_info indicate validity of the channel and rate fields.if rate bit is 0 then the rate field
+ *   is ignored.
+ *  disable will remove preious conditions from FW.
+ *  conditions from the later command will over write conditions stored from a previous command.
+ *
+ */
+
+#define WMI_TPC_CHAINMASK_CONFIG_BT_ON_OFF    0   /** dont' care the bt status */
+#define WMI_TPC_CHAINMASK_CONFIG_BT_ON        1   /** apply only when bt on */
+#define WMI_TPC_CHAINMASK_CONFIG_BT_OFF       2   /** apply only when bt off  */
+#define WMI_TPC_CHAINMASK_CONFIG_BT_RESV1     3   /** reserved  */
+
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_DONT_CARE   0   /**  don't care the chainmask */
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_CHAIN0      1   /**  force to use Chain0 to send */
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_CHAIN1      2   /**  force to use Chain1 to send */
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_CHAIN0_CHAIN1  3   /** force to use Chain0 & Chain1 to send */
+
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_ON_OFF  0   /**  don't care about stbc  */
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_ON      1   /**  apply only when stbc on */
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_OFF     2   /**  apply only when stbc off */
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_RESV1   3   /**  reserved */
+
+#define WMI_TPC_CHAINMASK_CONFIG_BAND_2G      0   /**  2G */
+#define WMI_TPC_CHAINMASK_CONFIG_BAND_5G      1   /**  5G */
+
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11B_2G    0        /** 11b 2G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11G_2G    1        /** 11g 2G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_2G    2        /** 11n 2G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_11AC_2G   3    /** 11n + 11ac 2G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11A_5G    4        /** 11a 5G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_5G    5        /** 11n 5G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11AC_5G   6        /** 11ac 5G */
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_11AC_5G  7     /** 11n + 11ac 5G */
+
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM_1           0    /** 1 stream  */
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM_2           1    /** 2 streams */
+
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_OFF        0    /** channel field is ignored */
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_ON         1    /** channel field needs to be checked */
+
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_OFF           0    /** rate field is ignored */
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_ON            1    /** rate field needs to be checked */
+
+/**  Bit map definition for basic_config_info starts   */
+#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S   0
+#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET     (0x1f << WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S)
+#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_GET(x)     WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET)
+#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_SET(x,z)   WMI_F_RMW(x,(z) & 0x1f,WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET)
+
+#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S      5
+#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET        (0x1f << WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S)
+#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_GET(x)     WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET)
+#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_SET(x,z)   WMI_F_RMW(x, (z) & 0x1f, WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET)
+
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S  10
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK   (0x3 << WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S)
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_GET(x)   WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_CHAINMASK)
+#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_SET(x,z)  WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_CHAINMASK)
+
+#define WMI_TPC_CHAINMASK_CONFIG_BT_S       12
+#define WMI_TPC_CHAINMASK_CONFIG_BT         (0x3 << WMI_TPC_CHAINMASK_CONFIG_BT_S)
+#define WMI_TPC_CHAINMASK_CONFIG_BT_GET(x)     WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_BT)
+#define WMI_TPC_CHAINMASK_CONFIG_BT_SET(x,z)   WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_BT)
+
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_S     14
+#define WMI_TPC_CHAINMASK_CONFIG_STBC       (0x3 << WMI_TPC_CHAINMASK_CONFIG_STBC_S)
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_GET(x)     WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_STBC)
+#define WMI_TPC_CHAINMASK_CONFIG_STBC_SET(x,z)   WMI_F_RMW(x, (z)& 0x3, WMI_TPC_CHAINMASK_CONFIG_STBC)
+
+#define WMI_TPC_CHAINMASK_CONFIG_BAND_S     16
+#define WMI_TPC_CHAINMASK_CONFIG_BAND       (0x1 << WMI_TPC_CHAINMASK_CONFIG_BAND_S)
+#define WMI_TPC_CHAINMASK_CONFIG_BAND_GET(x)  WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_BAND)
+#define WMI_TPC_CHAINMASK_CONFIG_BAND_SET(x,z) WMI_F_RMW(x, (z) &0x1, WMI_TPC_CHAINMASK_CONFIG_BAND)
+
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM_S   17
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM     (0x1 << WMI_TPC_CHAINMASK_CONFIG_STREAM_S)
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM_GET(x)  WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_STREAM)
+#define WMI_TPC_CHAINMASK_CONFIG_STREAM_SET(x,z)  WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_STREAM)
+
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S     18
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE       (0x7 << WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S)
+#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_PHY_MODE)
+#define WMI_TPC_CHAINAMSK_CONFIG_PHY_MODE_SET(x,z)  WMI_F_RMW(x, (z)&0x7, WMI_TPC_CHAINMASK_CONFIG_PHY_MODE)
+
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S     21
+/*
+ * The deprecated old name (WMI_TPC_CHAINMASK_CONFIG_CHANNEL_EXIST)
+ * is temporarily maintained as an alias for the correct name
+ * (WMI_TPC_CHAINMASK_CONFIG_CHANNEL)
+ */
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_EXIST WMI_TPC_CHAINMASK_CONFIG_CHANNEL
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL       (0x1 << WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S)
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_GET(x)  WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_CHANNEL)
+#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_SET(x,z)  WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_CHANNEL)
+
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_S  22
+/*
+ * The deprecated old name (WMI_TPC_CHAINMASK_CONFIG_RATE_EXIST)
+ * is temporarily maintained as an alias for the correct name
+ * (WMI_TPC_CHAINMASK_CONFIG_RATE)
+ */
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_EXIST WMI_TPC_CHAINMASK_CONFIG_RATE
+#define WMI_TPC_CHAINMASK_CONFIG_RATE    (0x1 << WMI_TPC_CHAINMASK_CONFIG_RATE_S)
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_GET(x)   WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_RATE)
+#define WMI_TPC_CHAINMASK_CONFIG_RATE_SET(x,z)  WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_RATE)
+
+/**  Bit map definition for basic_config_info ends   */
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** Basic condition defined as bit map above, bitmap is chosen to save memory.
+	 * Bit0  ~ Bit4: tpc offset which will be adjusted if condtion matches, the unit is 0.5dB.  bit4 indicates signed
+	 * Bit5  ~ Bit9: ack offset which will be adjusted if condtion matches, the unit is 0.5dB.  bit9 indicates signed
+	 * Bit10 ~ Bit11: chainmask  b'00: don't care, b'01: force to use chain0, b'10: force to use chain1, b'11: force to use chain0&chain1
+	 * Bit12 ~ Bit13: bt condition  b'00: don't care, b'01: apply only when bt on, b'10: apply only when bt off,  b'11: reserved
+	 * Bit14 ~ Bit15: stbc condition  b'00: don't care, b'01: apply only when stbc on, b'10: apply only when stbc off, b'11: reserved
+	 * Bit16 : band condition  b'0: 2G,  b'1: 5G
+	 * Bit17 : stream condition:  b'0: 1 stream, b'1: 2 streams
+	 * Bit18 ~ Bit20: phy mode condition: b'000: 11b 2g, b'001: 11g 2g, b'010: 11n 2g, b'011: 11n+11ac 2g, b'100: 11a, b'101: 11n 5g, b'110: 11ac 5g, b'111: 11n+11ac 5g
+	 * Bit21 : channel bit, if this bit is 0, then the following channel field is ignored
+	 * Bit22 : rate bit, if this bit is 0, then the following rate0&rate1 is ignored.
+	 * Bit23 ~ Bit31:  reserved
+	 */
+	A_UINT32 basic_config_info;
+
+	/** channel mapping bit rule: The lower bit corresponds with smaller channel.
+	 *  it depends on Bit14 of basic_config_info
+	 *  Total 24 channels for 5G
+	 *  36    40    44    48    52    56    60    64   100   104   108   112   116   120   124   128   132   136   140   149   153   157   161   165
+	 *  Total 14 channels for 2G
+	 *  1 ~ 14
+	 */
+	A_UINT32 channel;
+
+	/** rate mapping bit rule:  The lower bit corresponds with lower rate.
+	 *  it depends on Bit16 ~ Bit18 of basic_config_info, "phy mode condition"
+	 *  Legacy rates , 11b, 11g, 11A
+	 *  11n one stream ( ht20, ht40 ) 8+8
+	 *  11n two streams ( ht20, ht40 ) 8+8
+	 *  11ac one stream ( vht20, vht40, vht80 ) 10+10+10
+	 *  11ac two streams (vht20, vht40, vht80 ) 10+10+10
+	 */
+	A_UINT32 rate0;
+	/** For example, for 11b, when rate0 equals 0x3, it means if actual_rate in [ "1Mbps", "2Mbps"] connection, the rate condition is true.
+	 *  For example, for 11g/11a, when rate0 equals 0xf0,it means "54Mbps", "48Mbps", "36Mbps", "24Mb's" is selected, while "18Mbps", "12Mbps", "9Mbps", "6Mbps" is not selected
+	 */
+
+	/** only used for "11n+11ac" combined phy_mode, (WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_11AC_2G , WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_11N_11AC_5G) in this case, 11n rates begins on rate0, while 11ac rates begins on rate1
+	 */
+	A_UINT32 rate1;
+} wmi_tpc_chainmask_config;
+
+#define WMI_TPC_CHAINMASK_CONFIG_DISABLE   0   /** control the off for the tpc & chainmask*/
+#define WMI_TPC_CHAINMASK_CONFIG_ENABLE    1   /** control the on for the tpc & chainmask*/
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 enable;
+	/** enable to set tpc & chainmask when condtions meet, 0: disabled,   1: enabled.  */
+	A_UINT32 num_tpc_chainmask_configs;
+	/** following this structure is num_tpc_chainmask_configs number of wmi_tpc_chainmask_config  */
+} wmi_tpc_chainmask_config_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_nan_cmd_param */
+	A_UINT32 data_len;
+	/** length in byte of data[]. */
+	/* This structure is used to send REQ binary blobs
+	 * from application/service to firmware where Host drv is pass through .
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_nan_cmd_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_nan_event_hdr */
+	A_UINT32 data_len;
+	/** length in byte of data[]. */
+	/* This structure is used to send REQ binary blobs
+	 * from firmware to application/service where Host drv is pass through .
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_nan_event_hdr;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	A_UINT32 num_data;
+	/* followed by WMITLV_TAG_ARRAY_BYTE */
+} wmi_diag_data_container_event_fixed_param;
+
+enum {
+	WMI_PDEV_PARAM_TXPOWER_REASON_NONE = 0,
+	WMI_PDEV_PARAM_TXPOWER_REASON_SAR,
+	WMI_PDEV_PARAM_TXPOWER_REASON_MAX
+};
+
+#define PDEV_PARAM_TXPOWER_VALUE_MASK  0x000000FF
+#define PDEV_PARAM_TXPOWER_VALUE_SHIFT 0
+
+#define PDEV_PARAM_TXPOWER_REASON_MASK  0x0000FF00
+#define PDEV_PARAM_TXPOWER_REASON_SHIFT 8
+
+#define SET_PDEV_PARAM_TXPOWER_VALUE(txpower_param, value)     \
+	((txpower_param) &= ~PDEV_PARAM_TXPOWER_VALUE_MASK, (txpower_param) |= ((value) << PDEV_PARAM_TXPOWER_VALUE_SHIFT))
+
+#define SET_PDEV_PARAM_TXPOWER_REASON(txpower_param, value)	\
+	((txpower_param) &= ~PDEV_PARAM_TXPOWER_REASON_MASK, (txpower_param) |= ((value) << PDEV_PARAM_TXPOWER_REASON_SHIFT))
+
+#define GET_PDEV_PARAM_TXPOWER_VALUE(txpower_param)	\
+	(((txpower_param) & PDEV_PARAM_TXPOWER_VALUE_MASK) >> PDEV_PARAM_TXPOWER_VALUE_SHIFT)
+
+#define GET_PDEV_PARAM_TXPOWER_REASON(txpower_param)	 \
+	(((txpower_param) & PDEV_PARAM_TXPOWER_REASON_MASK) >> PDEV_PARAM_TXPOWER_REASON_SHIFT)
+
+/**
+ * This command is sent from WLAN host driver to firmware to
+ * notify the current modem power state. Host would receive a
+ * message from modem when modem is powered on. Host driver
+ * would then send this command to firmware. Firmware would then
+ * power on WCI-2 (UART) interface for LTE/MWS Coex.
+ *
+ * This command is only applicable for APQ platform which has
+ * modem on the platform. If firmware doesn't support MWS Coex,
+ * this command can be dropped by firmware.
+ *
+ * This is a requirement from modem team that WCN can't toggle
+ * UART before modem is powered on.
+ */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_modem_power_state_cmd_param */
+	A_UINT32 tlv_header;
+
+	/** Modem power state parameter */
+	A_UINT32 modem_power_state;
+} wmi_modem_power_state_cmd_param;
+
+enum {
+	WMI_MODEM_STATE_OFF = 0,
+	WMI_MODEM_STATE_ON
+};
+
+#define WMI_ROAM_AUTH_STATUS_CONNECTED       0x1 /** connected, but not authenticated */
+#define WMI_ROAM_AUTH_STATUS_AUTHENTICATED   0x2 /** connected and authenticated */
+
+/** WMI_ROAM_SYNCH_EVENT: roam synch event triggering the host propagation logic
+    generated whenever firmware roamed to new AP silently and
+    (a) If the host is awake, FW sends the event to the host immediately .
+    (b) If host is in sleep then either
+        (1) FW waits until  host sends WMI_PDEV_RESUME_CMDID or WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID
+    command to FW (part of host wake up sequence  from low power mode) before sending the event host.
+        (2) data/mgmt frame is received from roamed AP, which needs to return to host
+ */
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_key_material */
+	A_UINT32 tlv_header;
+
+	A_UINT8 kck[GTK_OFFLOAD_KCK_BYTES];             /* EAPOL-Key Key Confirmation Key (KCK) */
+	A_UINT8 kek[GTK_OFFLOAD_KEK_BYTES];             /* EAPOL-Key Key Encryption Key (KEK) */
+	A_UINT8 replay_counter[GTK_REPLAY_COUNTER_BYTES];
+} wmi_key_material;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_synch_event_fixed_param  */
+	/** Unique id identifying the VDEV on which roaming is done by firmware */
+	A_UINT32 vdev_id;
+	/** auth_status: connected or authorized */
+	A_UINT32 auth_status;
+	/*
+	 *  roam_reason: whether roaming went to a new subnet;
+	 *  see WMI_ROAM_SUBNET_CHANGE_STATUS_XXX
+	 */
+	A_UINT32 roam_reason;
+	/** associated AP's rssi calculated by FW when reason code is WMI_ROAM_REASON_LOW_RSSI. not valid if roam_reason is BMISS */
+	A_UINT32 rssi;
+	/** MAC address of roamed AP */
+	wmi_mac_addr bssid;             /* BSSID */
+	/** whether the frame is beacon or probe rsp */
+	A_UINT32 is_beacon;
+	/** the length of beacon/probe rsp */
+	A_UINT32 bcn_probe_rsp_len;
+	/** the length of reassoc rsp */
+	A_UINT32 reassoc_rsp_len;
+	/**
+	 * TLV (tag length value ) parameters follows roam_synch_event
+	 * The TLV's are:
+	 *     A_UINT8 bcn_probe_rsp_frame[];  length identified by bcn_probe_rsp_len
+	 *     A_UINT8 reassoc_rsp_frame[];  length identified by reassoc_rsp_len
+	 *     wmi_channel chan;
+	 *     wmi_key_material key;
+	 *     A_UINT32 status; subnet changed status not being used
+	 *     currently. will pass the information using roam_status.
+	 **/
+} wmi_roam_synch_event_fixed_param;
+
+#define WMI_PEER_ESTIMATED_LINKSPEED_INVALID    0xFFFFFFFF
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_ wmi_peer_get_estimated_linkspeed_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** MAC address of the peer for which the estimated link speed is required. */
+	wmi_mac_addr peer_macaddr;
+} wmi_peer_get_estimated_linkspeed_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_ wmi_peer_estimated_linkspeed_event_fixed_param */
+	A_UINT32 tlv_header;
+	/** MAC address of the peer for which the estimated link speed is required.
+	 */
+	wmi_mac_addr peer_macaddr;
+	/* Estimated link speed in kbps.
+	 * When est_linkspeed_kbps is not valid, the value is set to WMI_PEER_ESTIMATED_LINKSPEED_INVALID.
+	 */
+	A_UINT32 est_linkspeed_kbps;
+} wmi_peer_estimated_linkspeed_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals */
+	/* vdev ID */
+	A_UINT32 vdev_id;
+	A_UINT32 data_len;
+	/** length in byte of data[]. */
+	/* This structure is used to send REQ binary blobs
+	 * from application/service to firmware where Host drv is pass through .
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_req_stats_ext_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_stats1_event_fix_param */
+	A_UINT32 vdev_id;
+	/** vdev ID */
+	A_UINT32 data_len;
+	/** length in byte of data[]. */
+	/* This structure is used to send REQ binary blobs
+	 * from firmware to application/service where Host drv is pass through .
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_stats_ext_event_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_STRUC_ wmi_peer_state_event_fixed_param */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;               /* vdev ID */
+	/* MAC address of the peer for which the estimated link speed is required. */
+	wmi_mac_addr peer_macaddr;
+	A_UINT32 state;         /* peer state */
+} wmi_peer_state_event_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_peer_assoc_conf_event_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* peer MAC address */
+	wmi_mac_addr peer_macaddr;
+} wmi_peer_assoc_conf_event_fixed_param;
+
+enum {
+	WMI_2G4_HT40_OBSS_SCAN_PASSIVE = 0,
+	/** scan_type: passive */
+	WMI_2G4_HT40_OBSS_SCAN_ACTIVE,
+	/** scan_type: active */
+};
+
+typedef struct {
+	/**
+	 * TLV tag and len;
+	 * tag equals WMITLV_TAG_STRUC_wmi_obss_scan_enalbe_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	/**
+	 * active or passive. if active all the channels are actively scanned.
+	 *  if passive then all the channels are passively scanned
+	 */
+	A_UINT32 scan_type;
+	/**
+	 * FW can perform multiple scans with in a  OBSS scan interval.
+	 * For each scan,
+	 *  if the scan is passive then obss_scan_passive_dwell is minimum dwell to be used for each channel  ,
+	 *  if the scan is active then obss_scan_active_dwell is minimum dwell to be used for each channel .
+	 *   The unit for these 2 parameters is TUs.
+	 */
+	A_UINT32 obss_scan_passive_dwell;
+	A_UINT32 obss_scan_active_dwell;
+	/**
+	 * OBSS scan interval . FW needs to perform one or more OBSS scans within this interval and fulfill the
+	 *  both min and total per channel dwell time requirement
+	 */
+	A_UINT32 bss_channel_width_trigger_scan_interval;
+	/**
+	 * FW can perform multiple scans with in a  OBSS scan interval.
+	 * For each scan,
+	 * the total per channel dwell time across all scans with in OBSS scan interval should be
+	 * atleast obss_scan_passive_total_per channel for passive scas and obss_scan_active_total_per channel
+	 * for active scans and ,
+	 *   The unit for these 2 parameters is TUs.
+	 */
+	A_UINT32 obss_scan_passive_total_per_channel;
+	A_UINT32 obss_scan_active_total_per_channel;
+	A_UINT32 bss_width_channel_transition_delay_factor;
+	/** parameter to check exemption from scan */
+	A_UINT32 obss_scan_activity_threshold;
+	/** parameter to check exemption from scan */
+	/** following two parameters used by FW to fill IEs when sending 20/40 coexistence action frame to AP */
+	A_UINT32 forty_mhz_intolerant;
+	/** STA 40M bandwidth intolerant capability */
+	A_UINT32 current_operating_class;
+	/** STA current operating class */
+	/** length of 2.4GHz channel list to scan at, channel list in tlv->channels[] */
+	A_UINT32 channel_len;
+	/** length of optional ie data to append to probe reqest when active scan, ie data in tlv->ie_field[] */
+	A_UINT32 ie_len;
+} wmi_obss_scan_enable_cmd_fixed_param;
+
+typedef struct {
+	/**
+	 * TLV tag and len;
+	 * tag equals WMITLV_TAG_STRUC_wmi_obss_scan_disalbe_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+} wmi_obss_scan_disable_cmd_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_offload_prb_rsp_tx_status_event_fixed_param */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/** prb rsp tx status, values defined in enum WMI_FRAME_TX_STATUS */
+	A_UINT32 tx_status;
+} wmi_offload_prb_rsp_tx_status_event_fixed_param;
+
+typedef enum {
+	WMI_FRAME_TX_OK,                /* frame tx ok */
+	WMI_FRAME_TX_XRETRY,            /* excessivley retried */
+	WMI_FRAME_TX_DROP,              /* frame dropped by FW due to resources */
+	WMI_FRAME_TX_FILTERED,          /* frame filtered by hardware */
+} WMI_FRAME_TX_STATUS;
+
+/**
+ * This command is sent from WLAN host driver to firmware to
+ * request firmware to send the latest channel avoidance range
+ * to host.
+ *
+ * This command is only applicable for APQ platform which has
+ * modem on the platform. If firmware doesn't support MWS Coex,
+ * this command can be dropped by firmware.
+ *
+ * Host would send this command to firmware to request a channel
+ * avoidance information update.
+ */
+typedef struct {
+	/** TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_chan_avoid_update_cmd_param */
+	A_UINT32 tlv_header;
+} wmi_chan_avoid_update_cmd_param;
+
+/* ExtScan operation mode */
+typedef enum {
+	WMI_EXTSCAN_MODE_NONE = 0x0000,
+	WMI_EXTSCAN_MODE_START = 0x0001,                /* ExtScan/TableMonitoring operation started */
+	WMI_EXTSCAN_MODE_STOP = 0x0002,         /* ExtScan/TableMonitoring operation stopped */
+	WMI_EXTSCAN_MODE_IGNORED = 0x0003,              /* ExtScan command ignored due to error */
+} wmi_extscan_operation_mode;
+
+/* Channel Mask */
+typedef enum {
+	WMI_CHANNEL_BAND_UNSPECIFIED = 0x0000,
+	WMI_CHANNEL_BAND_24 = 0x0001,           /* 2.4 channel */
+	WMI_CHANNEL_BAND_5_NON_DFS = 0x0002,            /* 5G Channels (No DFS channels) */
+	WMI_CHANNEL_BAND_DFS = 0x0004,          /* DFS channels */
+} wmi_channel_band_mask;
+
+typedef enum {
+	WMI_EXTSCAN_CYCLE_STARTED_EVENT = 0x0001,
+	WMI_EXTSCAN_CYCLE_COMPLETED_EVENT = 0x0002,
+	WMI_EXTSCAN_BUCKET_STARTED_EVENT = 0x0004,
+	WMI_EXTSCAN_BUCKET_COMPLETED_EVENT = 0x0008,
+	WMI_EXTSCAN_BUCKET_FAILED_EVENT = 0x0010,
+	WMI_EXTSCAN_BUCKET_OVERRUN_EVENT = 0x0020,
+
+	WMI_EXTSCAN_EVENT_MAX = 0x8000
+} wmi_extscan_event_type;
+
+#define WMI_EXTSCAN_CYCLE_EVENTS_MASK    (WMI_EXTSCAN_CYCLE_STARTED_EVENT   | \
+					  WMI_EXTSCAN_CYCLE_COMPLETED_EVENT)
+
+#define WMI_EXTSCAN_BUCKET_EVENTS_MASK   (WMI_EXTSCAN_BUCKET_STARTED_EVENT   | \
+					  WMI_EXTSCAN_BUCKET_COMPLETED_EVENT | \
+					  WMI_EXTSCAN_BUCKET_FAILED_EVENT    | \
+					  WMI_EXTSCAN_BUCKET_OVERRUN_EVENT)
+
+typedef enum {
+	WMI_EXTSCAN_NO_FORWARDING = 0x0000,
+	WMI_EXTSCAN_FORWARD_FRAME_TO_HOST = 0x0001
+} wmi_extscan_forwarding_flags;
+
+typedef enum {
+	/* Use Motion Sensor Detection */
+	WMI_EXTSCAN_USE_MSD = 0x0001,
+	/* Extscan LPASS extended batching feature is supported and enabled */
+	WMI_EXTSCAN_EXTENDED_BATCHING_EN = 0x0002,
+} wmi_extscan_configuration_flags;
+typedef enum {
+	/*
+	 * Cache the results of bucket whose
+	 * configuration flags has this bit  set
+	 */
+	WMI_EXTSCAN_BUCKET_CACHE_RESULTS = 0x0001,
+} wmi_extscan_bucket_configuration_flags;
+
+typedef enum {
+	WMI_EXTSCAN_STATUS_OK = 0,
+	WMI_EXTSCAN_STATUS_ERROR = 0x80000000,
+	WMI_EXTSCAN_STATUS_INVALID_PARAMETERS,
+	WMI_EXTSCAN_STATUS_INTERNAL_ERROR
+} wmi_extscan_start_stop_status;
+
+typedef struct {
+	/** Request ID - to identify command. Cannot be 0 */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting ExtScan */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+} wmi_extscan_command_id;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/** channel number */
+	A_UINT32 channel;
+
+	/** dwell time in msec - use defaults if 0 */
+	A_UINT32 min_dwell_time;
+	A_UINT32 max_dwell_time;
+	/** passive/active channel and other flags */
+	A_UINT32 control_flags;         /* 0 => active, 1 => passive scan; ignored for DFS */
+} wmi_extscan_bucket_channel;
+
+/* Scan Bucket specification */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/** Bucket ID  - 0-based */
+	A_UINT32 bucket_id;
+	/** ExtScan events subscription - events to be reported to client (see wmi_extscan_event_type) */
+	A_UINT32 notify_extscan_events;
+	/** Options to forward scan results - see wmi_extscan_forwarding_flags */
+	A_UINT32 forwarding_flags;
+	/*
+	 * ExtScan configuration flags -
+	 * wmi_extscan__bucket_configuration_flags
+	 */
+	A_UINT32 configuration_flags;
+	/** DEPRECATED member:multiplier to be applied to the periodic scan's base period */
+	A_UINT32 base_period_multiplier;
+	/** dwell time in msec on active channels - use defaults if 0 */
+	A_UINT32 min_dwell_time_active;
+	A_UINT32 max_dwell_time_active;
+	/** dwell time in msec on passive channels - use defaults if 0 */
+	A_UINT32 min_dwell_time_passive;
+	A_UINT32 max_dwell_time_passive;
+	/** see wmi_channel_band_mask; when equal to WMI_CHANNEL_UNSPECIFIED, use channel list */
+	A_UINT32 channel_band;
+	/** number of channels (if channel_band is WMI_CHANNEL_UNSPECIFIED) */
+	A_UINT32 num_channels;
+	/** scan period upon start or restart of the bucket - periodicity of the bucket to begin with */
+	A_UINT32 min_period;
+	/** period above which exponent is not applied anymore */
+	A_UINT32        max_period;
+	/**
+	 * back off value to be applied to bucket's periodicity after exp_max_step_count scan cycles
+	 * new_bucket_period = last_bucket_period + last_exponent_period exp_backoff
+	 */
+	A_UINT32        exp_backoff;
+	/** number of scans performed at a given periodicity after which exponential back off value is
+	 * applied to current periodicity to obtain a newer one
+	 */
+	A_UINT32        exp_max_step_count;
+/** Followed by the variable length TLV chan_list:
+ *  wmi_extscan_bucket_channel chan_list[] */
+} wmi_extscan_bucket;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_start_cmd_fixed_param */
+	/** Request ID - to identify command. Cannot be 0 */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting ExtScan */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+	/** Base period (milliseconds) used by scan buckets to define periodicity of the scans */
+	A_UINT32 base_period;
+	/** Maximum number of iterations to run - one iteration is the scanning of the least frequent bucket */
+	A_UINT32 max_iterations;
+	/** Options to forward scan results - see wmi_extscan_forwarding_flags */
+	A_UINT32 forwarding_flags;
+	/** ExtScan configuration flags - wmi_extscan_configuration_flags */
+	A_UINT32 configuration_flags;
+	/** ExtScan events subscription - bitmask indicating which events should be send to client (see wmi_extscan_event_type) */
+	A_UINT32 notify_extscan_events;
+	/** Scan Priority, input to scan scheduler */
+	A_UINT32 scan_priority;
+	/** Maximum number of BSSIDs to cache on each scan cycle */
+	A_UINT32 max_bssids_per_scan_cycle;
+	/** Minimum RSSI value to report */
+	A_UINT32 min_rssi;
+	/** Maximum table usage in percentage */
+	A_UINT32 max_table_usage;
+	/** default dwell time in msec on active channels */
+	A_UINT32 min_dwell_time_active;
+	A_UINT32 max_dwell_time_active;
+	/** default dwell time in msec on passive channels */
+	A_UINT32 min_dwell_time_passive;
+	A_UINT32 max_dwell_time_passive;
+	/** min time in msec on the BSS channel,only valid if atleast one VDEV is active*/
+	A_UINT32 min_rest_time;
+	/** max rest time in msec on the BSS channel,only valid if at least one VDEV is active*/
+	/** the scanner will rest on the bss channel at least min_rest_time. after min_rest_time the scanner
+	 *  will start checking for tx/rx activity on all VDEVs. if there is no activity the scanner will
+	 *  switch to off channel. if there is activity the scanner will let the radio on the bss channel
+	 *  until max_rest_time expires.at max_rest_time scanner will switch to off channel
+	 *  irrespective of activity. activity is determined by the idle_time parameter.
+	 */
+	A_UINT32 max_rest_time;
+	/** time before sending next set of probe requests.
+	 *   The scanner keeps repeating probe requests transmission with period specified by repeat_probe_time.
+	 *   The number of probe requests specified depends on the ssid_list and bssid_list
+	 */
+	/** Max number of probes to be sent */
+	A_UINT32 n_probes;
+	/** time in msec between 2 sets of probe requests. */
+	A_UINT32 repeat_probe_time;
+	/** time in msec between 2 consequetive probe requests with in a set. */
+	A_UINT32 probe_spacing_time;
+	/** data inactivity time in msec on bss channel that will be used by scanner for measuring the inactivity  */
+	A_UINT32 idle_time;
+	/** maximum time in msec allowed for scan  */
+	A_UINT32 max_scan_time;
+	/** delay in msec before sending first probe request after switching to a channel */
+	A_UINT32 probe_delay;
+	/** Scan control flags */
+	A_UINT32 scan_ctrl_flags;
+	/** Burst duration time in msec*/
+	A_UINT32 burst_duration;
+
+	/** number of bssids in the TLV bssid_list[] */
+	A_UINT32 num_bssid;
+	/** number of ssid in the TLV ssid_list[] */
+	A_UINT32 num_ssids;
+	/** number of bytes in TLV ie_data[] */
+	A_UINT32 ie_len;
+	/** number of buckets in the TLV bucket_list[] */
+	A_UINT32 num_buckets;
+	/** in number of scans, send notifications to host after these many scans */
+	A_UINT32    report_threshold_num_scans;
+
+	/** number of channels in channel_list[] determined by the
+	    sum of wmi_extscan_bucket.num_channels in array  */
+
+/**
+ * TLV (tag length value ) parameters follow the extscan_cmd
+ * structure. The TLV's are:
+ *     wmi_ssid                   ssid_list[];
+ *     wmi_mac_addr               bssid_list[];
+ *     A_UINT8                    ie_data[];
+ *     wmi_extscan_bucket         bucket_list[];
+ *     wmi_extscan_bucket_channel channel_list[];
+ */
+} wmi_extscan_start_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_stop_cmd_fixed_param */
+	/** Request ID - to match running command. 0 matches any request */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting stop */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+} wmi_extscan_stop_cmd_fixed_param;
+
+enum wmi_extscan_get_cached_results_flags {
+	WMI_EXTSCAN_GET_CACHED_RESULTS_FLAG_NONE = 0x0000,
+	WMI_EXTSCAN_GET_CACHED_RESULTS_FLAG_FLUSH_TABLE = 0x0001
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_get_cached_results_cmd_fixed_param */
+	/** request ID - used to correlate command with events */
+	A_UINT32 request_id;
+	/** Requestor ID - client that requested results */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+	/** maximum number of results to be returned  */
+	A_UINT32 max_results;
+	/** flush BSSID list - wmi_extscan_get_cached_results_flags */
+	A_UINT32 control_flags;         /* enum wmi_extscan_get_cached_results_flags */
+} wmi_extscan_get_cached_results_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_get_wlan_change_results_cmd_fixed_param */
+	/** request ID - used to correlate command with events */
+	A_UINT32 request_id;
+	/** Requestor ID - client that requested results */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+} wmi_extscan_get_wlan_change_results_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/**bssid */
+	wmi_mac_addr bssid;
+	/**channel number */
+	A_UINT32 channel;
+	/**upper RSSI limit */
+	A_UINT32 upper_rssi_limit;
+	/**lower RSSI limit */
+	A_UINT32 lower_rssi_limit;
+} wmi_extscan_wlan_change_bssid_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_configure_wlan_change_monitor_cmd_fixed_param */
+	/** Request ID - to identify command. Cannot be 0 */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting wlan change monitoring */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/** operation mode: start/stop */
+	A_UINT32 mode;          /* wmi_extscan_operation_mode */
+	/** number of rssi samples to store */
+	A_UINT32 max_rssi_samples;
+	/** number of samples to use to calculate RSSI average */
+	A_UINT32 rssi_averaging_samples;
+	/** number of scans to confirm loss of contact with RSSI */
+	A_UINT32 lost_ap_scan_count;
+	/** number of out-of-range BSSIDs necessary to send event */
+	A_UINT32 max_out_of_range_count;
+	/** total number of bssid signal descriptors (in all pages) */
+	A_UINT32 total_entries;
+	/** index of the first bssid entry found in the TLV wlan_change_descriptor_list*/
+	A_UINT32 first_entry_index;
+	/** number of bssid signal descriptors in this page */
+	A_UINT32 num_entries_in_page;
+	/* Following this structure is the TLV:
+	 *     wmi_extscan_wlan_change_bssid_param wlan_change_descriptor_list[];    // number of elements given by field num_page_entries.
+	 */
+} wmi_extscan_configure_wlan_change_monitor_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	A_UINT32        tlv_header;
+	/**ssid */
+	wmi_ssid        ssid;
+	/**band */
+	A_UINT32        band;
+	/**RSSI threshold for reporting */
+	A_UINT32        min_rssi;
+	A_UINT32        max_rssi;
+} wmi_extscan_hotlist_ssid_entry;
+
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * MITLV_TAG_STRUC_wmi_extscan_configure_hotlist_ssid_monitor_cmd_fixed_param
+	 */
+	A_UINT32    tlv_header;
+	/** Request ID - to identify command. Cannot be 0 */
+	A_UINT32    request_id;
+	/** Requestor ID - client requesting hotlist ssid monitoring */
+	A_UINT32    requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32    vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32    table_id;
+	/** operation mode: start/stop */
+	A_UINT32    mode;    // wmi_extscan_operation_mode
+	/**total number of ssids (in all pages) */
+	A_UINT32    total_entries;
+	/**index of the first ssid entry found in the TLV extscan_hotlist_ssid_entry*/
+	A_UINT32    first_entry_index;
+	/**number of ssids in this page */
+	A_UINT32    num_entries_in_page;
+	/** number of consecutive scans to confirm loss of an ssid **/
+	A_UINT32    lost_ap_scan_count;
+	/* Following this structure is the TLV:
+	 *  wmi_extscan_hotlist_ssid_entry hotlist_ssid[];
+	 * number of element given by field num_page_entries.
+	 */
+} wmi_extscan_configure_hotlist_ssid_monitor_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/**bssid */
+	wmi_mac_addr bssid;
+	/**RSSI  min threshold for reporting */
+	A_UINT32 min_rssi;
+	/**Deprecated entry  channel number */
+	A_UINT32 channel;
+	/** RSSI max threshold for reporting */
+	A_UINT32 max_rssi;
+} wmi_extscan_hotlist_entry;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_configure_hotlist_monitor_cmd_fixed_param */
+	/** Request ID - to identify command. Cannot be 0 */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting hotlist monitoring */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) that is requesting scan */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/** operation mode: start/stop */
+	A_UINT32 mode;          /* wmi_extscan_operation_mode */
+	/**total number of bssids (in all pages) */
+	A_UINT32 total_entries;
+	/**index of the first bssid entry found in the TLV wmi_extscan_hotlist_entry*/
+	A_UINT32 first_entry_index;
+	/**number of bssids in this page */
+	A_UINT32 num_entries_in_page;
+	/** number of consecutive scans to confirm loss of contact with AP */
+	A_UINT32 lost_ap_scan_count;
+	/* Following this structure is the TLV:
+	 *     wmi_extscan_hotlist_entry hotlist[];    // number of elements given by field num_page_entries.
+	 */
+} wmi_extscan_configure_hotlist_monitor_cmd_fixed_param;
+
+ typedef struct {
+	/* TLV tag and len; tag equals
+	 *WMITLV_TAG_STRUC_wmi_extscan_hotlist_match_event_fixed_param */
+	A_UINT32     tlv_header;
+	/** Request ID of the WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID that configured the table */
+	A_UINT32     config_request_id;
+	/** Requestor ID of the WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID
+	that configured the table */
+	A_UINT32     config_requestor_id;
+	/**
+	 * VDEV id(interface) of the
+	 * WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID that configured the table
+	 */
+	A_UINT32     config_vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32     table_id;
+	/**total number of ssids (in all pages) */
+	A_UINT32     total_entries;
+	/**index of the first ssid entry found in the TLV wmi_extscan_wlan_descriptor*/
+	A_UINT32     first_entry_index;
+	/**number of ssids in this page */
+	A_UINT32     num_entries_in_page;
+	/*  Following this structure is the TLV:
+	 *  wmi_extscan_wlan_descriptor hotlist_match[];
+	 *  number of descriptors given by field num_entries_in_page
+	 */
+} wmi_extscan_hotlist_ssid_match_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/** size in bytes of scan cache entry */
+	A_UINT32 scan_cache_entry_size;
+	/** maximum number of scan cache entries */
+	A_UINT32 max_scan_cache_entries;
+	/** maximum number of buckets per extscan request */
+	A_UINT32 max_buckets;
+	/** maximum number of BSSIDs that will be stored in each scan (best n/w as per RSSI) */
+	A_UINT32 max_bssid_per_scan;
+	/** table usage level at which indication must be sent to host */
+	A_UINT32 max_table_usage_threshold;
+} wmi_extscan_cache_capabilities;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/** size in bytes of wlan change entry */
+	A_UINT32 wlan_change_entry_size;
+	/** maximum number of entries in wlan change table */
+	A_UINT32 max_wlan_change_entries;
+	/** number of RSSI samples used for averaging RSSI */
+	A_UINT32 max_rssi_averaging_samples;
+	/** number of BSSID/RSSI entries (BSSID pointer, RSSI, timestamp) that device can hold */
+	A_UINT32 max_rssi_history_entries;
+} wmi_extscan_wlan_change_monitor_capabilities;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/** size in bytes of hotlist entry */
+	A_UINT32 wlan_hotlist_entry_size;
+	/** maximum number of entries in wlan change table */
+	A_UINT32 max_hotlist_entries;
+} wmi_extscan_hotlist_monitor_capabilities;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_set_capabilities_cmd_fixed_param */
+	/** Request ID - matches request ID used to start hot list monitoring */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting stop */
+	A_UINT32 requestor_id;
+	/** number of extscan caches */
+	A_UINT32 num_extscan_cache_tables;
+	/** number of wlan change lists */
+	A_UINT32 num_wlan_change_monitor_tables;
+	/** number of hotlists */
+	A_UINT32 num_hotlist_monitor_tables;
+	/** if one sided rtt data collection is supported */
+	A_UINT32 rtt_one_sided_supported;
+	/** if 11v data collection is supported */
+	A_UINT32 rtt_11v_supported;
+	/** if 11mc data collection is supported */
+	A_UINT32 rtt_ftm_supported;
+	/** number of extscan cache capabilities (one per table)  */
+	A_UINT32 num_extscan_cache_capabilities;
+	/** number of wlan change  capabilities (one per table)  */
+	A_UINT32 num_extscan_wlan_change_capabilities;
+	/** number of extscan hotlist capabilities (one per table)  */
+	A_UINT32 num_extscan_hotlist_capabilities;
+	/* Following this structure is the TLV:
+	 *     wmi_extscan_cache_capabilities               extscan_cache_capabilities; // number of capabilities given by num_extscan_caches
+	 *     wmi_extscan_wlan_change_monitor_capabilities wlan_change_capabilities;   // number of capabilities given by num_wlan_change_monitor_tables
+	 *     wmi_extscan_hotlist_monitor_capabilities     hotlist_capabilities;       // number of capabilities given by num_hotlist_monitor_tables
+	 */
+} wmi_extscan_set_capabilities_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_get_capabilities_cmd_fixed_param */
+	/** Request ID - matches request ID used to start hot list monitoring */
+	A_UINT32 request_id;
+	/** Requestor ID - client requesting capabilities */
+	A_UINT32 requestor_id;
+} wmi_extscan_get_capabilities_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_start_stop_event_fixed_param */
+	/** Request ID of the operation that was started/stopped */
+	A_UINT32 request_id;
+	/** Requestor ID of the operation that was started/stopped */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the operation that was started/stopped */
+	A_UINT32 vdev_id;
+	/** extscan WMI command */
+	A_UINT32 command;
+	/** operation mode: start/stop */
+	A_UINT32 mode;          /* wmi_extscan_operation_mode */
+	/**success/failure */
+	A_UINT32 status;                /* enum wmi_extscan_start_stop_status */
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+} wmi_extscan_start_stop_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_operation_event_fixed_param */
+	/** Request ID of the extscan operation that is currently running */
+	A_UINT32 request_id;
+	/** Requestor ID of the extscan operation that is currently running */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the extscan operation that is currently running */
+	A_UINT32 vdev_id;
+	/** scan event (wmi_scan_event_type) */
+	A_UINT32 event;         /* wmi_extscan_event_type */
+	/** table ID - to allow support for multiple simultaneous requests */
+	A_UINT32 table_id;
+	/**number of buckets */
+	A_UINT32 num_buckets;
+	/* Following this structure is the TLV:
+	 *     A_UINT32    bucket_id[];    // number of elements given by field num_buckets.
+	 */
+} wmi_extscan_operation_event_fixed_param;
+
+/* Types of extscan tables */
+typedef enum {
+	EXTSCAN_TABLE_NONE = 0,
+	EXTSCAN_TABLE_BSSID = 1,
+	EXTSCAN_TABLE_RSSI = 2,
+} wmi_extscan_table_type;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_table_usage_event_fixed_param */
+	/** Request ID of the extscan operation that is currently running */
+	A_UINT32 request_id;
+	/** Requestor ID of the extscan operation that is currently running */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the extscan operation that is currently running */
+	A_UINT32 vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/**see wmi_extscan_table_type for table reporting usage */
+	A_UINT32 table_type;
+	/**number of entries in use */
+	A_UINT32 entries_in_use;
+	/**maximum number of entries in table */
+	A_UINT32 maximum_entries;
+} wmi_extscan_table_usage_event_fixed_param;
+
+typedef enum {
+	/**
+	 * Indicates scan got interrupted i.e. aborted or pre-empted for a long time (> 1sec)
+	 * this can be used to discard scan results
+	 */
+	WMI_SCAN_STATUS_INTERRUPTED = 1
+} wmi_scan_status_flags;
+
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/**RSSI */
+	A_UINT32 rssi;
+	/**time stamp in milliseconds */
+	A_UINT32 tstamp;
+	/** Extscan cycle during which this entry was scanned */
+	A_UINT32    scan_cycle_id;
+	/**
+	 * flag to indicate if the given result was obtained as part of
+	 * interrupted (aborted/large time gap preempted) scan
+	 */
+	A_UINT32    flags;
+} wmi_extscan_rssi_info;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/**bssid */
+	wmi_mac_addr bssid;
+	/**ssid */
+	wmi_ssid ssid;
+	/**channel number */
+	A_UINT32 channel;
+	/* capabilities */
+	A_UINT32 capabilities;
+	/* beacon interval in TUs */
+	A_UINT32 beacon_interval;
+	/**time stamp in milliseconds - time last seen */
+	A_UINT32 tstamp;
+	/**flags - _tExtScanEntryFlags */
+	A_UINT32 flags;
+	/**RTT in ns */
+	A_UINT32 rtt;
+	/**rtt standard deviation */
+	A_UINT32 rtt_sd;
+	/* rssi information */
+	A_UINT32 number_rssi_samples;
+	/** IE length */
+	A_UINT32 ie_length;             /* length of IE data */
+} wmi_extscan_wlan_descriptor;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_cached_results_event_fixed_param */
+	/** Request ID of the WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID */
+	A_UINT32 request_id;
+	/** Requestor ID of the WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID */
+	A_UINT32 vdev_id;
+	/** Request ID of the extscan operation that is currently running */
+	A_UINT32 extscan_request_id;
+	/** Requestor ID of the extscan operation that is currently running */
+	A_UINT32 extscan_requestor_id;
+	/** VDEV id(interface) of the extscan operation that is currently running */
+	A_UINT32 extscan_vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/**current time stamp in seconds. Used to provide a baseline for the relative timestamps returned for each block and entry */
+	A_UINT32 current_tstamp;
+	/**total number of bssids (in all pages) */
+	A_UINT32 total_entries;
+	/**index of the first bssid entry found in the TLV wmi_extscan_wlan_descriptor*/
+	A_UINT32 first_entry_index;
+	/**number of bssids in this page */
+	A_UINT32 num_entries_in_page;
+	/* Followed by the variable length TLVs
+	 *     wmi_extscan_wlan_descriptor    bssid_list[]
+	 *     wmi_extscan_rssi_info          rssi_list[]
+	 *     A_UINT8                        ie_list[]
+	 */
+} wmi_extscan_cached_results_event_fixed_param;
+
+typedef enum {
+	EXTSCAN_WLAN_CHANGE_FLAG_NONE = 0x00,
+	EXTSCAN_WLAN_CHANGE_FLAG_OUT_OF_RANGE = 0x01,
+	EXTSCAN_WLAN_CHANGE_FLAG_AP_LOST = 0x02,
+} wmi_extscan_wlan_change_flags;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_ARRAY_STRUC */
+	/**bssid */
+	wmi_mac_addr bssid;
+	/**time stamp in milliseconds */
+	A_UINT32 tstamp;
+	/**upper RSSI limit */
+	A_UINT32 upper_rssi_limit;
+	/**lower RSSI limit */
+	A_UINT32 lower_rssi_limit;
+	/** channel */
+	A_UINT32 channel;               /* in MHz */
+	/**current RSSI average */
+	A_UINT32 rssi_average;
+	/**flags - wmi_extscan_wlan_change_flags */
+	A_UINT32 flags;
+	/**legnth of RSSI history to follow (number of values) */
+	A_UINT32 num_rssi_samples;
+} wmi_extscan_wlan_change_result_bssid;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_wlan_change_results_event_fixed_param */
+	/** Request ID of the WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID command that requested the results */
+	A_UINT32 request_id;
+	/** Requestor ID of the WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID command that requested the results */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID command that requested the results */
+	A_UINT32 vdev_id;
+	/** Request ID of the WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID command that configured the table */
+	A_UINT32 config_request_id;
+	/** Requestor ID of the WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID command that configured the table */
+	A_UINT32 config_requestor_id;
+	/** VDEV id(interface) of the WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID command that configured the table */
+	A_UINT32 config_vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/**number of entries with RSSI out of range or BSSID not detected */
+	A_UINT32 change_count;
+	/**total number of bssid signal descriptors (in all pages) */
+	A_UINT32 total_entries;
+	/**index of the first bssid signal descriptor entry found in the TLV wmi_extscan_wlan_descriptor*/
+	A_UINT32 first_entry_index;
+	/**number of bssids signal descriptors in this page */
+	A_UINT32 num_entries_in_page;
+	/* Following this structure is the TLV:
+	 *     wmi_extscan_wlan_change_result_bssid bssid_signal_descriptor_list[];    // number of descriptors given by field num_entries_in_page.
+	 * Following this structure is the list of RSSI values (each is an A_UINT8):
+	 *     A_UINT8 rssi_list[];    // last N RSSI values.
+	 */
+} wmi_extscan_wlan_change_results_event_fixed_param;
+
+enum _tExtScanEntryFlags {
+	WMI_HOTLIST_FLAG_NONE = 0x00,
+	WMI_HOTLIST_FLAG_PRESENCE = 0x01,
+	WMI_HOTLIST_FLAG_DUPLICATE_SSID = 0x80,
+};
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_hotlist_match_event_fixed_param */
+	/** Request ID of the WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID that configured the table */
+	A_UINT32 config_request_id;
+	/** Requestor ID of the WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID that configured the table */
+	A_UINT32 config_requestor_id;
+	/** VDEV id(interface) of the WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID that configured the table */
+	A_UINT32 config_vdev_id;
+	/** table ID - to allow support for multiple simultaneous tables */
+	A_UINT32 table_id;
+	/**total number of bssids (in all pages) */
+	A_UINT32 total_entries;
+	/**index of the first bssid entry found in the TLV wmi_extscan_wlan_descriptor*/
+	A_UINT32 first_entry_index;
+	/**number of bssids in this page */
+	A_UINT32 num_entries_in_page;
+	/* Following this structure is the TLV:
+	 *     wmi_extscan_wlan_descriptor hotlist_match[];    // number of descriptors given by field num_entries_in_page.
+	 */
+} wmi_extscan_hotlist_match_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_extscan_capabilities_event_fixed_param */
+	/** Request ID of the WMI_EXTSCAN_GET_CAPABILITIES_CMDID */
+	A_UINT32 request_id;
+	/** Requestor ID of the WMI_EXTSCAN_GET_CAPABILITIES_CMDID */
+	A_UINT32 requestor_id;
+	/** VDEV id(interface) of the WMI_EXTSCAN_GET_CAPABILITIES_CMDID */
+	A_UINT32 vdev_id;
+	/** number of extscan caches */
+	A_UINT32 num_extscan_cache_tables;
+	/** number of wlan change lists */
+	A_UINT32 num_wlan_change_monitor_tables;
+	/** number of hotlists */
+	A_UINT32 num_hotlist_monitor_tables;
+	/** if one sided rtt data collection is supported */
+	A_UINT32 rtt_one_sided_supported;
+	/** if 11v data collection is supported */
+	A_UINT32 rtt_11v_supported;
+	/** if 11mc data collection is supported */
+	A_UINT32 rtt_ftm_supported;
+	/** number of extscan cache capabilities (one per table)  */
+	A_UINT32 num_extscan_cache_capabilities;
+	/** number of wlan change  capabilities (one per table)  */
+	A_UINT32 num_extscan_wlan_change_capabilities;
+	/** number of extscan hotlist capabilities (one per table)  */
+	A_UINT32 num_extscan_hotlist_capabilities;
+	/* max number of roaming ssid whitelist firmware can support */
+	A_UINT32 num_roam_ssid_whitelist;
+	/* max number of blacklist bssid firmware can support */
+	A_UINT32 num_roam_bssid_blacklist;
+	/* max number of preferred list firmware can support */
+	A_UINT32 num_roam_bssid_preferred_list;
+	/* max number of hotlist ssids firmware can support */
+	A_UINT32 num_extscan_hotlist_ssid;
+	/* max number of epno networks firmware can support */
+	A_UINT32 num_epno_networks;
+
+	/* Following this structure are the TLVs describing the capabilities of of the various types of lists. The FW theoretically
+	 * supports multiple lists of each type.
+	 *
+	 *     wmi_extscan_cache_capabilities               extscan_cache_capabilities[] // capabilities of extscan cache (BSSID/RSSI lists)
+	 *     wmi_extscan_wlan_change_monitor_capabilities wlan_change_capabilities[]   // capabilities of wlan_change_monitor_tables
+	 *     wmi_extscan_hotlist_monitor_capabilities     hotlist_capabilities[]       // capabilities of hotlist_monitor_tables
+	 */
+} wmi_extscan_capabilities_event_fixed_param;
+
+/* WMI_D0_WOW_DISABLE_ACK_EVENTID  */
+typedef struct {
+	A_UINT32 tlv_header;
+	/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_d0_wow_disable_ack_event_fixed_param  */
+	A_UINT32 reserved0;             /* for future need */
+} wmi_d0_wow_disable_ack_event_fixed_param;
+
+/** WMI_PDEV_RESUME_EVENTID : generated in response to WMI_PDEV_RESUME_CMDID */
+typedef struct {
+	A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_resume_event_fixed_param  */
+	A_UINT32 rsvd;  /* for future need */
+} wmi_pdev_resume_event_fixed_param;
+
+/** value representing all modules */
+#define WMI_DEBUG_LOG_MODULE_ALL 0xffff
+
+/* param definitions */
+
+/**
+ * Log level for a given module. Value contains both module id and log level.
+ * here is the bitmap definition for value.
+ * module Id   : 16
+ *     Flags   :  reserved
+ *     Level   :  8
+ * if odule Id  is WMI_DEBUG_LOG_MODULE_ALL then  log level is  applied to all modules (global).
+ * WMI_DEBUG_LOG_MIDULE_ALL will overwrites per module level setting.
+ */
+#define WMI_DEBUG_LOG_PARAM_LOG_LEVEL      0x1
+
+#define WMI_DBGLOG_SET_LOG_LEVEL(val,lvl) do { \
+		(val) |=  (lvl & 0xff);		       \
+} while(0)
+
+#define WMI_DBGLOG_GET_LOG_LEVEL(val) ((val) & 0xff)
+
+#define WMI_DBGLOG_SET_MODULE_ID(val,mid) do { \
+		(val) |=  ((mid & 0xffff) << 16);	 \
+} while(0)
+
+#define WMI_DBGLOG_GET_MODULE_ID(val) (( (val) >> 16) & 0xffff)
+
+/**
+ * Enable the debug log for a given vdev. Value is vdev id
+ */
+#define WMI_DEBUG_LOG_PARAM_VDEV_ENABLE    0x2
+
+/**
+ * Disable the debug log for a given vdev. Value is vdev id
+ * All the log level  for a given VDEV is disabled except the ERROR log messages
+ */
+
+#define WMI_DEBUG_LOG_PARAM_VDEV_DISABLE   0x3
+
+/**
+ * set vdev enable bitmap. value is the vden enable bitmap
+ */
+#define WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP    0x4
+
+/**
+ * set a given log level to all the modules specified in the module bitmap.
+ * and set the log levle for all other modules to DBGLOG_ERR.
+ *  value: log levelt to be set.
+ *  module_id_bitmap : identifies the modules for which the log level should be set and
+ *                      modules for which the log level should be reset to DBGLOG_ERR.
+ */
+#define WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP    0x5
+
+#define NUM_MODULES_PER_ENTRY ((sizeof(A_UINT32)) << 3)
+
+#define WMI_MODULE_ENABLE(pmid_bitmap,mod_id) \
+	( (pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] |= \
+		  (1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) )
+
+#define WMI_MODULE_DISABLE(pmid_bitmap,mod_id)	   \
+	( (pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] &=  \
+		  ( ~(1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) ) )
+
+#define WMI_MODULE_IS_ENABLED(pmid_bitmap,mod_id) \
+	( ((pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY ] &  \
+	   (1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) ) != 0)
+
+#define MAX_MODULE_ID_BITMAP_WORDS 16   /* 16*32=512 module ids. should be more than sufficient */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_debug_log_config_cmd_fixed_param */
+	A_UINT32 dbg_log_param;
+	/** param types are defined above */
+	A_UINT32 value;
+	/* The below array will follow this tlv ->fixed length module_id_bitmap[]
+	   A_UINT32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
+	 */
+} wmi_debug_log_config_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_get_temperature_cmd_fixed_param  */
+	A_UINT32 param;         /* Reserved for future use */
+} wmi_pdev_get_temperature_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_temperature_event_fixed_param */
+	A_INT32 value;          /* temprature value in Celcius degree */
+} wmi_pdev_temperature_event_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_set_dhcp_server_offload_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 enable;
+	A_UINT32 srv_ipv4;              /* server IP */
+	A_UINT32 start_lsb;             /* starting address assigned to client */
+	A_UINT32 num_client;            /* number of clients we support */
+} wmi_set_dhcp_server_offload_cmd_fixed_param;
+
+typedef enum {
+	AP_RX_DATA_OFFLOAD = 0x00,
+	STA_RX_DATA_OFFLOAD = 0x01,
+} wmi_ipa_offload_types;
+
+/**
+ * This command is sent from WLAN host driver to firmware for
+ * enabling/disabling IPA data-path offload features.
+ *
+ *
+ * Enabling data path offload to IPA(based on host INI configuration), example:
+ *    when STA interface comes up,
+ *    host->target: WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
+ *                  (enable = 1, vdev_id = STA vdev id, offload_type = STA_RX_DATA_OFFLOAD)
+ *
+ * Disabling data path offload to IPA, example:
+ *    host->target: WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
+ *                  (enable = 0, vdev_id = STA vdev id, offload_type = STA_RX_DATA_OFFLOAD)
+ *
+ *
+ * This command is applicable only on the PCIE LL systems
+ *
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ipa_offload_enable_disable_cmd_fixed_param */
+	A_UINT32 offload_type;          /* wmi_ipa_offload_types enum values */
+	A_UINT32 vdev_id;
+	A_UINT32 enable;                /* 1 == enable, 0 == disable */
+} wmi_ipa_offload_enable_disable_cmd_fixed_param;
+
+typedef enum {
+	WMI_LED_FLASHING_PATTERN_NOT_CONNECTED = 0,
+	WMI_LED_FLASHING_PATTERN_CONNECTED = 1,
+	WMI_LED_FLASHING_PATTERN_RESERVED = 2,
+} wmi_set_led_flashing_type;
+
+/**
+   The state of the LED GPIO control is determined by two 32 bit values(X_0 and X_1) to produce a 64 bit value.
+   Each 32 bit value consists of 4 bytes, where each byte defines the number of 50ms intervals that the GPIO will
+   remain at a predetermined state. The 64 bit value provides 8 unique GPIO timing intervals. The pattern starts
+   with the MSB of X_0 and continues to the LSB of X_1. After executing the timer interval of the LSB of X_1, the
+   pattern returns to the MSB of X_0 and repeats. The GPIO state for each timing interval  alternates from Low to
+   High and the first interval of the pattern represents the time when the GPIO is Low. When a timing interval of
+   Zero is reached, it is skipped and moves on to the next interval.
+ */
+typedef struct {
+	A_UINT32 tlv_header;            /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_set_led_flashing_cmd_fixed_param  */
+	A_UINT32 pattern_id;            /* pattern identifier */
+	A_UINT32 led_x0;                /* led flashing parameter0 */
+	A_UINT32 led_x1;                /* led flashing parameter1 */
+	A_UINT32 gpio_num; /* GPIO number */
+} wmi_set_led_flashing_cmd_fixed_param;
+
+/**
+ * The purpose of the multicast Domain Name System (mDNS) is to resolve host names to IP addresses
+ * within small networks that do not include a local name server.
+ * It utilizes essentially the same programming interfaces, packet formats and operating semantics
+ * as the unicast DNS, and the advantage is zero configuration service while no need for central or
+ * global server.
+ * Based on mDNS, the DNS-SD (Service Discovery) allows clients to discover a named list of services
+ * by type in a specified domain using standard DNS queries.
+ * Here, we provide the ability to advertise the available services by responding to mDNS queries.
+ */
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mdns_offload_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	A_UINT32 enable;
+} wmi_mdns_offload_cmd_fixed_param;
+
+#define WMI_MAX_MDNS_FQDN_LEN         64
+#define WMI_MAX_MDNS_RESP_LEN         512
+#define WMI_MDNS_FQDN_TYPE_GENERAL    0
+#define WMI_MDNS_FQDN_TYPE_UNIQUE     1
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mdns_set_fqdn_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	/** type of fqdn, general or unique */
+	A_UINT32 type;
+	/** length of fqdn */
+	A_UINT32 fqdn_len;
+	/* Following this structure is the TLV byte stream of fqdn data of length fqdn_len
+	 * A_UINT8  fqdn_data[]; // fully-qualified domain name to check if match with the received queries
+	 */
+} wmi_mdns_set_fqdn_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mdns_set_resp_cmd_fixed_param */
+	A_UINT32 vdev_id;
+	/** Answer Resource Record count */
+	A_UINT32 AR_count;
+	/** length of response */
+	A_UINT32 resp_len;
+	/* Following this structure is the TLV byte stream of resp data of length resp_len
+	 * A_UINT8  resp_data[]; // responses consisits of Resource Records
+	 */
+} wmi_mdns_set_resp_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mdns_get_stats_cmd_fixed_param */
+	A_UINT32 vdev_id;
+} wmi_mdns_get_stats_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mdns_stats_event_fixed_param */
+	A_UINT32 vdev_id;
+	/** curTimestamp in milliseconds */
+	A_UINT32 curTimestamp;
+	/** last received Query in milliseconds */
+	A_UINT32 lastQueryTimestamp;
+	/** last sent Response in milliseconds */
+	A_UINT32 lastResponseTimestamp;
+	/** stats of received queries */
+	A_UINT32 totalQueries;
+	/** stats of macth queries */
+	A_UINT32 totalMatches;
+	/** stats of responses */
+	A_UINT32 totalResponses;
+	/** indicate the current status of mDNS offload */
+	A_UINT32 status;
+} wmi_mdns_stats_event_fixed_param;
+
+/**
+ * The purpose of the SoftAP authenticator offload is to offload the association and 4-way handshake process
+ * down to the firmware. When this feature is enabled, firmware can process the association/disassociation
+ * request and create/remove connection even host is suspended.
+ * 3 major components are offloaded:
+ *     1. ap-mlme. Firmware will process auth/deauth, association/disassociation request and send out response.
+ *     2. 4-way handshake. Firmware will send out m1/m3 and receive m2/m4.
+ *     3. key installation. Firmware will generate PMK from the psk info which is sent from the host and install PMK/GTK.
+ * Current implementation only supports WPA2 CCMP.
+ */
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sap_ofl_enable_cmd_fixed_param */
+	/** VDEV id(interface) of the WMI_SAP_OFL_ENABLE_CMDID */
+	A_UINT32 vdev_id;
+	/** enable/disable sap auth offload */
+	A_UINT32 enable;
+	/** sap ssid */
+	wmi_ssid ap_ssid;
+	/** authentication mode (defined above) */
+	A_UINT32 rsn_authmode;
+	/** unicast cipher set */
+	A_UINT32 rsn_ucastcipherset;
+	/** mcast/group cipher set */
+	A_UINT32 rsn_mcastcipherset;
+	/** mcast/group management frames cipher set */
+	A_UINT32 rsn_mcastmgmtcipherset;
+	/** sap channel */
+	A_UINT32 channel;
+	/** length of psk */
+	A_UINT32 psk_len;
+	/* Following this structure is the TLV byte stream of wpa passphrase data of length psk_len
+	 * A_UINT8  psk[];
+	 */
+} wmi_sap_ofl_enable_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sap_ofl_add_sta_event_fixed_param */
+	/** VDEV id(interface) of the WMI_SAP_OFL_ADD_STA_EVENTID */
+	A_UINT32 vdev_id;
+	/** aid (association id) of this station */
+	A_UINT32 assoc_id;
+	/** peer station's mac addr */
+	wmi_mac_addr peer_macaddr;
+	/** length of association request frame */
+	A_UINT32 data_len;
+	/* Following this structure is the TLV byte stream of a whole association request frame of length data_len
+	 * A_UINT8 bufp[];
+	 */
+} wmi_sap_ofl_add_sta_event_fixed_param;
+
+typedef enum {
+	SAP_OFL_DEL_STA_FLAG_NONE       = 0x00,
+	SAP_OFL_DEL_STA_FLAG_RECONNECT  = 0x01,
+} wmi_sap_ofl_del_sta_flags;
+
+typedef struct {
+	A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sap_ofl_del_sta_event_fixed_param */
+	/** VDEV id(interface) of the WMI_SAP_OFL_DEL_STA_EVENTID */
+	A_UINT32 vdev_id;
+	/** aid (association id) of this station */
+	A_UINT32 assoc_id;
+	/** peer station's mac addr */
+	wmi_mac_addr peer_macaddr;
+	/** disassociation reason */
+	A_UINT32 reason;
+	/** flags - wmi_sap_ofl_del_sta_flags */
+	A_UINT32 flags;
+} wmi_sap_ofl_del_sta_event_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_sap_set_blacklist_param_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id;
+	/* Number of client failure connection attempt */
+	A_UINT32 num_retry;
+	/*Time in milliseconds to record the client's failure connection attempts*/
+	A_UINT32 retry_allow_time_ms;
+	/*
+	 * Time in milliseconds to drop the connection request if
+	 * client is blacklisted
+	 */
+	A_UINT32 blackout_time_ms;
+} wmi_sap_set_blacklist_param_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_apfind_cmd_param */
+	A_UINT32 data_len; /** length in byte of data[]. */
+	/** This structure is used to send REQ binary blobs
+	 * from application/service to firmware where Host drv is pass through .
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_apfind_cmd_param;
+
+typedef enum apfind_event_type_e {
+	APFIND_MATCH_EVENT = 0,
+	APFIND_WAKEUP_EVENT,
+} APFIND_EVENT_TYPE;
+
+typedef struct {
+	A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_apfind_event_hdr */
+	A_UINT32 event_type; /** APFIND_EVENT_TYPE */
+	A_UINT32 data_len; /** length in byte of data[]. */
+	/** This structure is used to send event binary blobs
+	 * from firmware to application/service and Host drv.
+	 * Following this structure is the TLV:
+	 *     A_UINT8 data[];    // length in byte given by field data_len.
+	 */
+} wmi_apfind_event_hdr;
+
+/**
+ * OCB DCC types and structures.
+ */
+
+/**
+ * DCC types as described in ETSI TS 102 687
+ * Type                   Format            stepSize    referenceValue  numBits
+ * -------------------------------------------------------------------------
+ * ndlType_acPrio         INTEGER (0...7)   1           number          3
+ * ndlType_controlLoop    INTEGER (0...7)   1           0               3
+ * ndlType_arrivalRate    INTEGER (0..8191) 0.01 /s     0               13
+ * ndlType_channelLoad    INTEGER (0..1000) 0.1 %       0 %             10
+ * ndlType_channelUse     INTEGER (0..8000) 0.0125 %    0 %             13
+ * ndlType_datarate       INTEGER (0..7)                Table 8         3
+ * ndlType_distance       INTEGER (0..4095) 1 m         0               12
+ * ndlType_numberElements INTEGER (0..63)               number          6
+ * ndlType_packetDuration INTEGER (0..2047) TSYM        0               11
+ * ndlType_packetInterval INTEGER (0..1023) 10 ms       0               10
+ * ndlType_pathloss       INTEGER (0..31)   0.1         1.0             5
+ * ndlType_rxPower        INTEGER (0..127)  -0.5 dB     -40 dBm         7
+ * ndlType_snr            INTEGER (0..127)  0.5 dB      -10 dB          7
+ * ndlType_timing         INTEGER (0..4095) 10 ms       0               12
+ * ndlType_txPower        INTEGER (0..127)  0.5 dB      -20 dBm         7
+ * ndlType_ratio          INTEGER (0..100)  1 %         0 %             7
+ * ndlType_exponent       INTEGER (0..100)  0.1         0               7
+ * ndlType_queueStatus    Enumeration                   Table A.2       1
+ * ndlType_dccMechanism   Bitset                        Table A.2       6
+ *
+ * NOTE: All of following size macros (SIZE_NDLTYPE_ACPRIO through SIZE_BYTE)
+ * cannot be changed without breaking WMI compatibility.
+ *
+ * NOTE: For each of the types, one additional bit is allocated. This
+ *  leftmost bit is used to indicate that the value is invalid.
+ */
+#define SIZE_NDLTYPE_ACPRIO         (1 + 3)
+#define SIZE_NDLTYPE_CONTROLLOOP    (1 + 3)
+#define SIZE_NDLTYPE_ARRIVALRATE    (1 + 13)
+#define SIZE_NDLTYPE_CHANNELLOAD    (1 + 10)
+#define SIZE_NDLTYPE_CHANNELUSE     (1 + 13)
+#define SIZE_NDLTYPE_DATARATE       (1 + 3)
+#define SIZE_NDLTYPE_DISTANCE       (1 + 12)
+#define SIZE_NDLTYPE_NUMBERELEMENTS (1 + 6)
+#define SIZE_NDLTYPE_PACKETDURATION (1 + 11)
+#define SIZE_NDLTYPE_PACKETINTERVAL (1 + 10)
+#define SIZE_NDLTYPE_PATHLOSS       (1 + 5)
+#define SIZE_NDLTYPE_RXPOWER        (1 + 7)
+#define SIZE_NDLTYPE_SNR            (1 + 7)
+#define SIZE_NDLTYPE_TIMING         (1 + 12)
+#define SIZE_NDLTYPE_TXPOWER        (1 + 7)
+#define SIZE_NDLTYPE_RATIO          (1 + 7)
+#define SIZE_NDLTYPE_EXPONENT       (1 + 7)
+#define SIZE_NDLTYPE_QUEUESTATUS    (1 + 1)
+#define SIZE_NDLTYPE_DCCMECHANISM   (1 + 6)
+#define SIZE_BYTE                   (8)
+
+#define INVALID_ACPRIO          ((1 << SIZE_NDLTYPE_ACPRIO) - 1)
+#define INVALID_CONTROLLOOP     ((1 << SIZE_NDLTYPE_CONTROLLOOP) - 1)
+#define INVALID_ARRIVALRATE     ((1 << SIZE_NDLTYPE_ARRIVALRATE) - 1)
+#define INVALID_CHANNELLOAD     ((1 << SIZE_NDLTYPE_CHANNELLOAD) - 1)
+#define INVALID_CHANNELUSE      ((1 << SIZE_NDLTYPE_CHANNELUSE) - 1)
+#define INVALID_DATARATE        ((1 << SIZE_NDLTYPE_DATARATE) - 1)
+#define INVALID_DISTANCE        ((1 << SIZE_NDLTYPE_DISTANCE) - 1)
+#define INVALID_NUMBERELEMENTS  ((1 << SIZE_NDLTYPE_NUMBERELEMENTS) - 1)
+#define INVALID_PACKETDURATION  ((1 << SIZE_NDLTYPE_PACKETDURATION) - 1)
+#define INVALID_PACKETINTERVAL  ((1 << SIZE_NDLTYPE_PACKETINTERVAL) - 1)
+#define INVALID_PATHLOSS        ((1 << SIZE_NDLTYPE_PATHLOSS) - 1)
+#define INVALID_RXPOWER         ((1 << SIZE_NDLTYPE_RXPOWER) - 1)
+#define INVALID_SNR             ((1 << SIZE_NDLTYPE_SNR) - 1)
+#define INVALID_TIMING          ((1 << SIZE_NDLTYPE_TIMING) - 1)
+#define INVALID_TXPOWER         ((1 << SIZE_NDLTYPE_TXPOWER) - 1)
+#define INVALID_RATIO           ((1 << SIZE_NDLTYPE_RATIO) - 1)
+#define INVALID_EXPONENT        ((1 << SIZE_NDLTYPE_EXPONENT) - 1)
+#define INVALID_QUEUESTATS      ((1 << SIZE_NDLTYPE_QUEUESTATUS) - 1)
+#define INVALID_DCCMECHANISM    ((1 << SIZE_NDLTYPE_DCCMECHANISM) - 1)
+
+/**
+ *  The MCS_COUNT macro cannot be modified without breaking
+ *  WMI compatibility.
+ */
+#define MCS_COUNT               (8)
+
+/**
+ * Flags for ndlType_dccMechanism.
+ */
+typedef enum {
+	DCC_MECHANISM_TPC = 1,
+	DCC_MECHANISM_TRC = 2,
+	DCC_MECHANISM_TDC = 4,
+	DCC_MECHANISM_DSC = 8,
+	DCC_MECHANISM_TAC = 16,
+	DCC_MECHANISM_RESERVED = 32,
+	DCC_MECHANISM_ALL = 0x3f,
+} wmi_dcc_ndl_type_dcc_mechanism;
+
+/** Values for ndlType_queueStatus. */
+typedef enum {
+	DCC_QUEUE_CLOSED = 0,
+	DCC_QUEUE_OPEN = 1,
+} wmi_dcc_ndl_type_queue_status;
+
+/**
+  * For ndlType_acPrio, use the values in wmi_traffic_ac.
+  * Values for ndlType_datarate.
+  */
+typedef enum {
+	DCC_DATARATE_3_MBPS = 0,
+	DCC_DATARATE_4_5_MBPS = 1,
+	DCC_DATARATE_6_MBPS = 2,
+	DCC_DATARATE_9_MBPS = 3,
+	DCC_DATARATE_12_MBPS = 4,
+	DCC_DATARATE_18_MBPS = 5,
+	DCC_DATARATE_24_MBPS = 6,
+	DCC_DATARATE_27_MBPS = 7,
+} wmi_dcc_ndl_type_datarate;
+
+/** Data structure for active state configuration. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_dcc_ndl_active_state_config
+	*/
+	A_UINT32 tlv_header;
+	/**
+	* NDL_asStateId, ndlType_numberElements, 1+6 bits.
+	* NDL_asChanLoad, ndlType_channelLoad, 1+10 bits.
+	*/
+	A_UINT32 state_info;
+	/**
+	* NDL_asDcc(AC_BK), ndlType_dccMechanism, 1+6 bits.
+	* NDL_asDcc(AC_BE), ndlType_dccMechanism, 1+6 bits.
+	* NDL_asDcc(AC_VI), ndlType_dccMechanism, 1+6 bits.
+	* NDL_asDcc(AC_VO), ndlType_dccMechanism, 1+6 bits.
+	*/
+	A_UINT32 as_dcc[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_DCCMECHANISM)];
+	/**
+	* NDL_asTxPower(AC_BK), ndlType_txPower, 1+7 bits.
+	* NDL_asTxPower(AC_BE), ndlType_txPower, 1+7 bits.
+	* NDL_asTxPower(AC_VI), ndlType_txPower, 1+7 bits.
+	* NDL_asTxPower(AC_VO), ndlType_txPower, 1+7 bits.
+	*/
+	A_UINT32 as_tx_power_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_TXPOWER)];
+	/**
+	* NDL_asPacketInterval(AC_BK), ndlType_packetInterval, 1+10 bits.
+	* NDL_asPacketInterval(AC_BE), ndlType_packetInterval, 1+10 bits.
+	* NDL_asPacketInterval(AC_VI), ndlType_packetInterval, 1+10 bits.
+	* NDL_asPacketInterval(AC_VO), ndlType_packetInterval, 1+10 bits.
+	*/
+	A_UINT32 as_packet_interval_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_PACKETINTERVAL)];
+	/**
+	* NDL_asDatarate(AC_BK), ndlType_datarate, 1+3 bits.
+	* NDL_asDatarate(AC_BE), ndlType_datarate, 1+3 bits.
+	* NDL_asDatarate(AC_VI), ndlType_datarate, 1+3 bits.
+	* NDL_asDatarate(AC_VO), ndlType_datarate, 1+3 bits.
+	*/
+	A_UINT32 as_datarate_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_DATARATE)];
+	/**
+	* NDL_asCarrierSense(AC_BK), ndlType_rxPower, 1+7 bits.
+	* NDL_asCarrierSense(AC_BE), ndlType_rxPower, 1+7 bits.
+	* NDL_asCarrierSense(AC_VI), ndlType_rxPower, 1+7 bits.
+	* NDL_asCarrierSense(AC_VO), ndlType_rxPower, 1+7 bits.
+	*/
+	A_UINT32 as_carrier_sense_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_RXPOWER)];
+} wmi_dcc_ndl_active_state_config;
+
+#define WMI_NDL_AS_STATE_ID_GET(ptr)                    WMI_GET_BITS((ptr)->state_info, 0, 7)
+#define WMI_NDL_AS_STATE_ID_SET(ptr, val)                WMI_SET_BITS((ptr)->state_info, 0, 7, val)
+#define WMI_NDL_AS_CHAN_LOAD_GET(ptr)                   WMI_GET_BITS((ptr)->state_info, 7, 11)
+#define WMI_NDL_AS_CHAN_LOAD_SET(ptr, val)               WMI_SET_BITS((ptr)->state_info, 7, 11, val)
+#define WMI_NDL_AS_DCC_GET(ptr, acprio)                  wmi_packed_arr_get_bits((ptr)->as_dcc, acprio, SIZE_NDLTYPE_DCCMECHANISM)
+#define WMI_NDL_AS_DCC_SET(ptr, acprio, val)              wmi_packed_arr_set_bits((ptr)->as_dcc, acprio, SIZE_NDLTYPE_DCCMECHANISM, val)
+#define WMI_NDL_AS_TX_POWER_GET(ptr, acprio)             wmi_packed_arr_get_bits((ptr)->as_tx_power_ac, acprio, SIZE_NDLTYPE_TXPOWER)
+#define WMI_NDL_AS_TX_POWER_SET(ptr, acprio, val)         wmi_packed_arr_set_bits((ptr)->as_tx_power_ac, acprio, SIZE_NDLTYPE_TXPOWER, val)
+#define WMI_NDL_AS_PACKET_INTERVAL_GET(ptr, acprio)      wmi_packed_arr_get_bits((ptr)->as_packet_interval_ac, acprio, SIZE_NDLTYPE_PACKETINTERVAL)
+#define WMI_NDL_AS_PACKET_INTERVAL_SET(ptr, acprio, val)  wmi_packed_arr_set_bits((ptr)->as_packet_interval_ac, acprio, SIZE_NDLTYPE_PACKETINTERVAL, val)
+#define WMI_NDL_AS_DATARATE_GET(ptr, acprio)             wmi_packed_arr_get_bits((ptr)->as_datarate_ac, acprio, SIZE_NDLTYPE_DATARATE)
+#define WMI_NDL_AS_DATARATE_SET(ptr, acprio, val)         wmi_packed_arr_set_bits((ptr)->as_datarate_ac, acprio, SIZE_NDLTYPE_DATARATE, val)
+#define WMI_NDL_AS_CARRIER_SENSE_GET(ptr, acprio)        wmi_packed_arr_get_bits((ptr)->as_carrier_sense_ac, acprio, SIZE_NDLTYPE_RXPOWER)
+#define WMI_NDL_AS_CARRIER_SENSE_SET(ptr, acprio, val)    wmi_packed_arr_set_bits((ptr)->as_carrier_sense_ac, acprio, SIZE_NDLTYPE_RXPOWER, val)
+
+/** Data structure for EDCA/QOS parameters. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_qos_parameter */
+	A_UINT32 tlv_header;
+	/** Arbitration Inter-Frame Spacing. Range: 2-15 */
+	A_UINT32 aifsn;
+	/** Contention Window minimum. Range: 1 - 10 */
+	A_UINT32 cwmin;
+	/** Contention Window maximum. Range: 1 - 10 */
+	A_UINT32 cwmax;
+} wmi_qos_parameter;
+
+/** Data structure for information specific to a channel. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_ocb_channel */
+	A_UINT32 tlv_header;
+	A_UINT32 bandwidth; /* MHz units */
+	wmi_mac_addr mac_address;
+} wmi_ocb_channel;
+
+/** Data structure for an element of the schedule array. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_ocb_schedule_element */
+	A_UINT32 tlv_header;
+	A_UINT32 channel_freq; /* MHz units */
+	A_UINT32 total_duration; /* ms units */
+	A_UINT32 guard_interval; /* ms units */
+} wmi_ocb_schedule_element;
+
+/** Data structure for OCB configuration. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_ocb_set_config_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** VDEV id(interface) that is being configured */
+	A_UINT32 vdev_id;
+	A_UINT32 channel_count;
+	A_UINT32 schedule_size;
+	A_UINT32 flags;
+
+	/** This is followed by a TLV array of wmi_channel.
+	* This is followed by a TLV array of wmi_ocb_channel.
+	* This is followed by a TLV array of wmi_qos_parameter.
+	* This is followed by a TLV array of wmi_dcc_ndl_chan.
+	* This is followed by a TLV array of wmi_dcc_ndl_active_state_config.
+	* This is followed by a TLV array of wmi_ocb_schedule_element.
+	*/
+} wmi_ocb_set_config_cmd_fixed_param;
+
+
+#define EXPIRY_TIME_IN_TSF_TIMESTAMP_OFFSET 0
+#define EXPIRY_TIME_IN_TSF_TIMESTAMP_MASK 1
+
+#define WMI_OCB_EXPIRY_TIME_IN_TSF(ptr) \
+	(((ptr)->flags & EXPIRY_TIME_IN_TSF_TIMESTAMP_MASK) >> EXPIRY_TIME_IN_TSF_TIMESTAMP_OFFSET)
+
+
+/** Data structure for the response to the WMI_OCB_SET_CONFIG_CMDID command. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_set_config_resp_event_fixed_param
+	*/
+	A_UINT32 tlv_header;
+	/* VDEV id(interface)*/
+	A_UINT32 vdev_id;
+	A_UINT32 status;
+} wmi_ocb_set_config_resp_event_fixed_param;
+
+/* SIZE_UTC_TIME and SIZE_UTC_TIME_ERROR cannot be modified without breaking
+ * WMI compatibility.
+ */
+/* The size of the utc time in bytes. */
+#define SIZE_UTC_TIME (10)
+/* The size of the utc time error in bytes. */
+#define SIZE_UTC_TIME_ERROR (5)
+
+/** Data structure to set the UTC time. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_set_utc_time_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+	/** 10 bytes of the utc time. */
+	A_UINT32 utc_time[WMI_PACKED_ARR_SIZE(SIZE_UTC_TIME, SIZE_BYTE)];
+	/** 5 bytes of the time error. */
+	A_UINT32 time_error[WMI_PACKED_ARR_SIZE(SIZE_UTC_TIME_ERROR, SIZE_BYTE)];
+} wmi_ocb_set_utc_time_cmd_fixed_param;
+
+#define WMI_UTC_TIME_GET(ptr, byte_index)         wmi_packed_arr_get_bits((ptr)->utc_time, byte_index, SIZE_BYTE)
+#define WMI_UTC_TIME_SET(ptr, byte_index, val)    wmi_packed_arr_set_bits((ptr)->utc_time, byte_index, SIZE_BYTE, val)
+#define WMI_TIME_ERROR_GET(ptr, byte_index)       wmi_packed_arr_get_bits((ptr)->time_error, byte_index, SIZE_BYTE)
+#define WMI_TIME_ERROR_SET(ptr, byte_index, val)  wmi_packed_arr_set_bits((ptr)->time_error, byte_index, SIZE_BYTE, val)
+
+/** Data structure start the timing advertisement. The template for the
+ *  timing advertisement frame follows this structure in the WMI command.
+ */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_start_timing_advert_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+	/** Number of times the TA is sent every 5 seconds. */
+	A_UINT32 repeat_rate;
+	/** The frequency on which to transmit. */
+	A_UINT32 channel_freq; /* MHz units */
+	/** The offset into the template of the timestamp. */
+	A_UINT32 timestamp_offset;
+	/** The offset into the template of the time value. */
+	A_UINT32 time_value_offset;
+	/** The length of the timing advertisement template. The
+	*  template is in the TLV data. */
+	A_UINT32 timing_advert_template_length;
+	/** This is followed by a binary array containing the TA template. */
+} wmi_ocb_start_timing_advert_cmd_fixed_param;
+
+/** Data structure to stop the timing advertisement. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_stop_timing_advert_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+	A_UINT32 channel_freq; /* MHz units */
+} wmi_ocb_stop_timing_advert_cmd_fixed_param;
+
+/** Data structure for the request for WMI_OCB_GET_TSF_TIMER_CMDID. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+	A_UINT32 reserved;
+} wmi_ocb_get_tsf_timer_cmd_fixed_param;
+
+/** Data structure for the response to WMI_OCB_GET_TSF_TIMER_CMDID. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_ocb_get_tsf_timer_resp_event_fixed_param */
+	A_UINT32 tlv_header;
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+	A_UINT32 tsf_timer_high;
+	A_UINT32 tsf_timer_low;
+} wmi_ocb_get_tsf_timer_resp_event_fixed_param;
+
+/** Data structure for DCC stats configuration per channel. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_dcc_ndl_stats_per_channel */
+	A_UINT32 tlv_header;
+
+	/*VDEV Identifier*/
+	A_UINT32 vdev_id;
+
+	/** The channel for which this applies, 16 bits.
+	 *  The dcc_stats_bitmap, 8 bits. */
+	A_UINT32 chan_info;
+
+	/** Demodulation model parameters.
+	*
+	* NDL_snrBackoff(MCS0), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS1), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS2), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS3), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS4), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS5), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS6), ndlType_snr, 1+7 bits.
+	* NDL_snrBackoff(MCS7), ndlType_snr, 1+7 bits.
+	*/
+	A_UINT32 snr_backoff_mcs[WMI_PACKED_ARR_SIZE(MCS_COUNT, SIZE_NDLTYPE_SNR)];
+
+	/** Communication ranges.
+	 *
+	 * tx_power, ndlType_txPower, 1+7 bits.
+	 * datarate, ndlType_datarate, 1+3 bits.
+	 */
+	A_UINT32 tx_power_datarate;
+	/**
+	* NDL_carrierSenseRange, ndlType_distance, 1+12 bits.
+	* NDL_estCommRange, ndlType_distance, 1+12 bits.
+	*/
+	A_UINT32 carrier_sense_est_comm_range;
+
+	/** Channel load measures. */
+	/**
+	 * dccSensitivity, ndlType_rxPower, 1+7 bits.
+	 * carrierSense, ndlType_rxPower, 1+7 bits.
+	 * NDL_channelLoad, ndlType_channelLoad, 1+10 bits.
+	 */
+	A_UINT32 dcc_stats;
+	/**
+	* NDL_packetArrivalRate, ndlType_arrivalRate, 1+13 bits.
+	* NDL_packetAvgDuration, ndlType_packetDuration, 1+11 bits.
+	*/
+	A_UINT32 packet_stats;
+	/**
+	 * NDL_channelBusyTime, ndlType_channelLoad, 1+10 bits.
+	 */
+	A_UINT32 channel_busy_time;
+	/**
+	 *Transmit packet statistics.
+	 * NDL_txPacketArrivalRate(AC_BK), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_txPacketArrivalRate(AC_BE), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_txPacketArrivalRate(AC_VI), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_txPacketArrivalRate(AC_VO), ndlType_arrivalRate, 1+13 bits.
+	 */
+	A_UINT32 tx_packet_arrival_rate_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_ARRIVALRATE)];
+	/**
+	 * NDL_txPacketAvgDuration(AC_BK), ndlType_packetDuration, 1+11 bits.
+	 * NDL_txPacketAvgDuration(AC_BE), ndlType_packetDuration, 1+11 bits.
+	 * NDL_txPacketAvgDuration(AC_VI), ndlType_packetDuration, 1+11 bits.
+	 * NDL_txPacketAvgDuration(AC_VO), ndlType_packetDuration, 1+11 bits.
+	 */
+	A_UINT32 tx_packet_avg_duration_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_PACKETDURATION)];
+	/**
+	 * NDL_txChannelUse(AC_BK), ndlType_channelUse, 1+13 bits.
+	 * NDL_txChannelUse(AC_BE), ndlType_channelUse, 1+13 bits.
+	 * NDL_txChannelUse(AC_VI), ndlType_channelUse, 1+13 bits.
+	 * NDL_txChannelUse(AC_VO), ndlType_channelUse, 1+13 bits.
+	 */
+	A_UINT32 tx_channel_use_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_CHANNELUSE)];
+	/**
+	 * NDL_txSignalAvgPower(AC_BK), ndlType_txPower, 1+7 bits.
+	 * NDL_txSignalAvgPower(AC_BE), ndlType_txPower, 1+7 bits.
+	 * NDL_txSignalAvgPower(AC_VI), ndlType_txPower, 1+7 bits.
+	 * NDL_txSignalAvgPower(AC_VO), ndlType_txPower, 1+7 bits.
+	 */
+	A_UINT32 tx_signal_avg_power_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_TXPOWER)];
+} wmi_dcc_ndl_stats_per_channel;
+
+#define WMI_NDL_STATS_SNR_BACKOFF_GET(ptr, mcs)       wmi_packed_arr_get_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR)
+#define WMI_NDL_STATS_SNR_BACKOFF_SET(ptr, mcs, val)  wmi_packed_arr_set_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR, val)
+#define WMI_NDL_STATS_CHAN_FREQ_GET(ptr)              WMI_GET_BITS((ptr)->chan_info, 0, 16)
+#define WMI_NDL_STATS_CHAN_FREQ_SET(ptr, val)         WMI_SET_BITS((ptr)->chan_info, 0, 16, val)
+#define WMI_NDL_STATS_DCC_STATS_BITMAP_GET(ptr)       WMI_GET_BITS((ptr)->chan_info, 16, 8)
+#define WMI_NDL_STATS_DCC_STATS_BITMAP_SET(ptr, val)  WMI_SET_BITS((ptr)->chan_info, 16, 8, val)
+#define WMI_NDL_STATS_SNR_BACKOFF_GET(ptr, mcs)       wmi_packed_arr_get_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR)
+#define WMI_NDL_STATS_SNR_BACKOFF_SET(ptr, mcs, val)  wmi_packed_arr_set_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR, val)
+#define WMI_TX_POWER_GET(ptr)                         WMI_GET_BITS((ptr)->tx_power_datarate, 0, 8)
+#define WMI_TX_POWER_SET(ptr, val)                    WMI_SET_BITS((ptr)->tx_power_datarate, 0, 8, val)
+#define WMI_TX_DATARATE_GET(ptr)                      WMI_GET_BITS((ptr)->tx_power_datarate, 0, 4)
+#define WMI_TX_DATARATE_SET(ptr, val)                 WMI_SET_BITS((ptr)->tx_power_datarate, 0, 4, val)
+#define WMI_NDL_CARRIER_SENSE_RANGE_GET(ptr)          WMI_GET_BITS((ptr)->carrier_sense_est_comm_range, 0, 13)
+#define WMI_NDL_CARRIER_SENSE_RANGE_SET(ptr, val)     WMI_SET_BITS((ptr)->carrier_sense_est_comm_range, 0, 13, val)
+#define WMI_NDL_EST_COMM_RANGE_GET(ptr)               WMI_GET_BITS((ptr)->carrier_sense_est_comm_range, 13, 13)
+#define WMI_NDL_EST_COMM_RANGE_SET(ptr, val)          WMI_SET_BITS((ptr)->carrier_sense_est_comm_range, 13, 13, val)
+#define WMI_DCC_SENSITIVITY_GET(ptr)                  WMI_GET_BITS((ptr)->dcc_stats, 0, 8)
+#define WMI_DCC_SENSITIVITY_SET(ptr, val)             WMI_SET_BITS((ptr)->dcc_stats, 0, 8, val)
+#define WMI_CARRIER_SENSE_GET(ptr)                    WMI_GET_BITS((ptr)->dcc_stats, 8, 8)
+#define WMI_CARRIER_SENSE_SET(ptr, val)               WMI_SET_BITS((ptr)->dcc_stats, 8, 8, val)
+#define WMI_NDL_CHANNEL_LOAD_GET(ptr)               WMI_GET_BITS((ptr)->dcc_stats, 16, 11)
+#define WMI_NDL_CHANNEL_LOAD_SET(ptr, val)           WMI_SET_BITS((ptr)->dcc_stats, 16, 11, val)
+#define WMI_NDL_PACKET_ARRIVAL_RATE_GET(ptr)        WMI_GET_BITS((ptr)->packet_stats, 0, 14)
+#define WMI_NDL_PACKET_ARRIVAL_RATE_SET(ptr, val)    WMI_SET_BITS((ptr)->packet_stats, 0, 14, val)
+#define WMI_NDL_PACKET_AVG_DURATION_GET(ptr)        WMI_GET_BITS((ptr)->packet_stats, 14, 12)
+#define WMI_NDL_PACKET_AVG_DURATION_SET(ptr, val)    WMI_SET_BITS((ptr)->packet_stats, 14, 12, val)
+#define WMI_NDL_CHANNEL_BUSY_TIME_GET(ptr)          WMI_GET_BITS((ptr)->channel_busy_time, 0, 11)
+#define WMI_NDL_CHANNEL_BUSY_TIME_SET(ptr, val)      WMI_SET_BITS((ptr)->channel_busy_time, 0, 11, val)
+
+#define WMI_NDL_TX_PACKET_ARRIVAL_RATE_GET(ptr, acprio)           wmi_packed_arr_get_bits((ptr)->tx_packet_arrival_rate_ac, acprio, SIZE_NDLTYPE_ARRIVALRATE)
+#define WMI_NDL_TX_PACKET_ARRIVAL_RATE_SET(ptr, acprio, val)      wmi_packed_arr_set_bits((ptr)->tx_packet_arrival_rate_ac, acprio, SIZE_NDLTYPE_ARRIVALRATE, val)
+#define WMI_NDL_TX_PACKET_AVG_DURATION_GET(ptr, acprio)           wmi_packed_arr_get_bits((ptr)->tx_packet_avg_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION)
+#define WMI_NDL_TX_PACKET_AVG_DURATION_SET(ptr, acprio, val)      wmi_packed_arr_set_bits((ptr)->tx_packet_avg_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION, val)
+#define WMI_NDL_TX_CHANNEL_USE_GET(ptr, acprio)                   wmi_packed_arr_get_bits((ptr)->tx_channel_use_ac, acprio, SIZE_NDLTYPE_CHANNELUSE)
+#define WMI_NDL_TX_CHANNEL_USE_SET(ptr, acprio, val)              wmi_packed_arr_set_bits((ptr)->tx_channel_use_ac, acprio, SIZE_NDLTYPE_CHANNELUSE, val)
+#define WMI_NDL_TX_SIGNAL_AVG_POWER_GET(ptr, acprio)              wmi_packed_arr_get_bits((ptr)->tx_signal_avg_power_ac, acprio, SIZE_NDLTYPE_TXPOWER)
+#define WMI_NDL_TX_SIGNAL_AVG_POWER_SET(ptr, acprio, val)         wmi_packed_arr_set_bits((ptr)->tx_signal_avg_power_ac, acprio, SIZE_NDLTYPE_TXPOWER, val)
+
+/** Bitmap for DCC stats. */
+typedef enum {
+	DCC_STATS_DEMODULATION_MODEL = 1,
+	DCC_STATS_COMMUNICATION_RANGES = 2,
+	DCC_STATS_CHANNEL_LOAD_MEASURES = 4,
+	DCC_STATS_TRANSMIT_PACKET_STATS = 8,
+	DCC_STATS_TRANSMIT_MODEL_PARAMETER = 16,
+	DCC_STATS_ALL = 0xff,
+} wmi_dcc_stats_bitmap;
+
+/** Data structure for getting the DCC stats. */
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_get_stats_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/**The number of channels for which stats are being requested. */
+	A_UINT32 num_channels;
+	/** This is followed by a TLV array of wmi_dcc_channel_stats_request. */
+} wmi_dcc_get_stats_cmd_fixed_param;
+
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_channel_stats_request.
+	 */
+	A_UINT32 tlv_header;
+	/** The channel for which this applies. */
+	A_UINT32 chan_freq; /* MHz units */
+	/** The DCC stats being requested. */
+	A_UINT32 dcc_stats_bitmap;
+} wmi_dcc_channel_stats_request;
+
+/** Data structure for the response with the DCC stats. */
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_get_stats_resp_event_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/** Number of channels in the response. */
+	A_UINT32 num_channels;
+	/** This is followed by a TLV array of wmi_dcc_ndl_stats_per_channel. */
+} wmi_dcc_get_stats_resp_event_fixed_param;
+
+/** Data structure for clearing the DCC stats. */
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_clear_stats_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	A_UINT32 dcc_stats_bitmap;
+} wmi_dcc_clear_stats_cmd_fixed_param;
+
+/** Data structure for the pushed DCC stats */
+typedef struct {
+	/**
+	 *  TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_stats_event_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/** The number of channels in the response. */
+	A_UINT32 num_channels;
+	/** This is followed by a TLV array of wmi_dcc_ndl_stats_per_channel. */
+} wmi_dcc_stats_event_fixed_param;
+
+/** Data structure for updating NDL per channel. */
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_dcc_ndl_chan
+	 */
+	A_UINT32 tlv_header;
+	/**
+	 * Channel frequency, 16 bits
+	 * NDL_numActiveState, ndlType_numberElements, 1+6 bits
+	 */
+	A_UINT32 chan_info;
+	/**
+	 *  NDL_minDccSampling, 10 bits.
+	 *      Maximum time interval between subsequent checks of the DCC rules.
+	 */
+	A_UINT32 ndl_min_dcc_sampling;
+	/**
+	 * dcc_enable, 1 bit.
+	 * dcc_stats_enable, 1 bit.
+	 * dcc_stats_interval, 16 bits.
+	 */
+	A_UINT32 dcc_flags;
+	/** General DCC configuration.
+	 * NDL_timeUp, ndlType_timing, 1+12 bits.
+	 * NDL_timeDown, ndlType_timing, 1+12 bits.
+	 */
+	A_UINT32 general_config;
+	/** Transmit power thresholds.
+	 * NDL_minTxPower, ndlType_txPower, 1+7 bits.
+	 * NDL_maxTxPower, ndlType_txPower, 1+7 bits.
+	 */
+	/* see "ETSI TS 102 687" table above for units */
+	A_UINT32 min_max_tx_power;
+	/**
+	 * NDL_defTxPower(AC_BK), ndlType_txPower, 1+7 bits.
+	 * NDL_defTxPower(AC_BE), ndlType_txPower, 1+7 bits.
+	 * NDL_defTxPower(AC_VI), ndlType_txPower, 1+7 bits.
+	 * NDL_defTxPower(AC_VO), ndlType_txPower, 1+7 bits.
+	 */
+    /* see "ETSI TS 102 687" table above for units */
+    A_UINT32 def_tx_power_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_TXPOWER)];
+	/** Packet timing thresholds.
+	 * NDL_maxPacketDuration(AC_BK), ndlType_packetDuration, 1+11 bits.
+	 * NDL_maxPacketDuration(AC_BE), ndlType_packetDuration, 1+11 bits.
+	 * NDL_maxPacketDuration(AC_VI), ndlType_packetDuration, 1+11 bits.
+	 * NDL_maxPacketDuration(AC_VO), ndlType_packetDuration, 1+11 bits.
+	 */
+	A_UINT32 max_packet_duration_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_PACKETDURATION)];
+	/**
+	* NDL_minPacketInterval, ndlType_packetInterval, 1+10 bits.
+	* NDL_maxPacketInterval, ndlType_packetInterval, 1+10 bits.
+	*/
+	A_UINT32 min_max_packet_interval;
+	/**
+	 * NDL_defPacketInterval(AC_BK), ndlType_packetInterval, 1+10 bits.
+	 * NDL_defPacketInterval(AC_BE), ndlType_packetInterval, 1+10 bits.
+	 * NDL_defPacketInterval(AC_VI), ndlType_packetInterval, 1+10 bits.
+	 * NDL_defPacketInterval(AC_VO), ndlType_packetInterval, 1+10 bits
+	 */
+	A_UINT32 def_packet_interval_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_PACKETINTERVAL)];
+	/** Packet datarate thresholds.
+	* NDL_minDatarate, ndlType_datarate, 1+3 bits.
+	* NDL_maxDatarate, ndlType_datarate, 1+3 bits.
+	*/
+	A_UINT32 min_max_datarate;
+	/**
+	 * NDL_defDatarate(AC_BK), ndlType_datarate, 1+3 bits.
+	 * NDL_defDatarate(AC_BE), ndlType_datarate, 1+3 bits.
+	 * NDL_defDatarate(AC_VI), ndlType_datarate, 1+3 bits.
+	 * NDL_defDatarate(AC_VO), ndlType_datarate, 1+3 bits.
+	 */
+	A_UINT32 def_datarate_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_DATARATE)];
+	/** Receive signal thresholds.
+	 * NDL_minCarrierSense, ndlType_rxPower, 1+7 bits.
+	 * NDL_maxCarrierSense, ndlType_rxPower, 1+7 bits.
+	 * NDL_defCarrierSense, ndlType_rxPower, 1+7 bits.
+	 */
+	A_UINT32 min_max_def_carrier_sense;
+
+	/** Receive model parameter.
+	 * NDL_defDccSensitivity, ndlType_rxPower, 1+7 bits.
+	 * NDL_maxCsRange, ndlType_distance, 1+12 bits.
+	 * NDL_refPathLoss, ndlType_pathloss, 1+5 bits.
+	 */
+	A_UINT32 receive_model_parameter;
+
+	/**
+	 * NDL_minSNR, ndlType_snr, 1+7 bits.
+	 */
+	A_UINT32 receive_model_parameter_2;
+
+	/** Demodulation model parameters.
+	 * NDL_snrBackoff(MCS0), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS1), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS2), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS3), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS4), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS5), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS6), ndlType_snr, 1+7 bits.
+	 * NDL_snrBackoff(MCS7), ndlType_snr, 1+7 bits.
+	 */
+	A_UINT32 snr_backoff_mcs[WMI_PACKED_ARR_SIZE(MCS_COUNT, SIZE_NDLTYPE_SNR)];
+	/** Transmit model parameters.
+	 * NDL_tmPacketArrivalRate(AC_BK), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_tmPacketArrivalRate(AC_BE), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_tmPacketArrivalRate(AC_VI), ndlType_arrivalRate, 1+13 bits.
+	 * NDL_tmPacketArrivalRate(AC_VO), ndlType_arrivalRate, 1+13 bits.
+	 */
+	A_UINT32 tm_packet_arrival_rate_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_ARRIVALRATE)];
+	/**
+	 * NDL_tmPacketAvgDuration(AC_BK), ndlType_packetDuration, 1+11 bits.
+	 * NDL_tmPacketAvgDuration(AC_BE), ndlType_packetDuration, 1+11 bits.
+	 * NDL_tmPacketAvgDuration(AC_VI), ndlType_packetDuration, 1+11 bits.
+	 * NDL_tmPacketAvgDuration(AC_VO), ndlType_packetDuration, 1+11 bits.
+	 */
+	A_UINT32 tm_packet_avg_duration_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_PACKETDURATION)];
+	/**
+	 * NDL_tmSignalAvgPower(AC_BK), ndlType_txPower, 1+7 bits.
+	 * NDL_tmSignalAvgPower(AC_BE), ndlType_txPower, 1+7 bits.
+	 * NDL_tmSignalAvgPower(AC_VI), ndlType_txPower, 1+7 bits.
+	 * NDL_tmSignalAvgPower(AC_VO), ndlType_txPower, 1+7 bits.
+	 */
+	A_UINT32 tm_signal_avg_power_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_TXPOWER)];
+	/* NDL_tmMaxChannelUse, ndlType_channelUse, 1+13 bits. */
+	A_UINT32 tm_max_channel_use;
+    /**
+     * NDL_tmChannelUse(AC_BK), ndlType_channelUse, 1+13 bits.
+     * NDL_tmChannelUse(AC_BE), ndlType_channelUse, 1+13 bits.
+     * NDL_tmChannelUse(AC_VI), ndlType_channelUse, 1+13 bits.
+     * NDL_tmChannelUse(AC_VO), ndlType_channelUse, 1+13 bits.
+     */
+	A_UINT32 tm_channel_use_ac[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_CHANNELUSE)];
+    /** Channel load thresholds.
+	 * NDL_minChannelLoad, ndlType_channelLoad, 1+10 bits.
+	 * NDL_maxChannelLoad, ndlType_channelLoad, 1+10 bits.
+	 */
+	A_UINT32 min_max_channel_load;
+    /** Transmit queue parameters.
+	 * NDL_numQueue, ndlType_acPrio, 1+3 bits.
+	 * NDL_refQueueStatus(AC_BK), ndlType_queueStatus, 1+1 bit.
+	 * NDL_refQueueStatus(AC_BE), ndlType_queueStatus, 1+1 bit.
+	 * NDL_refQueueStatus(AC_VI), ndlType_queueStatus, 1+1 bit.
+	 * NDL_refQueueStatus(AC_VO), ndlType_queueStatus, 1+1 bit.
+	 */
+	A_UINT32 transmit_queue_parameters;
+	/**
+	 * NDL_refQueueLen(AC_BK), ndlType_numberElements, 1+6 bits.
+	 * NDL_refQueueLen(AC_BE), ndlType_numberElements, 1+6 bits.
+	 * NDL_refQueueLen(AC_VI), ndlType_numberElements, 1+6 bits.
+	 * NDL_refQueueLen(AC_VO), ndlType_numberElements, 1+6 bits.
+	 */
+	A_UINT32 numberElements[WMI_PACKED_ARR_SIZE(WLAN_MAX_AC, SIZE_NDLTYPE_NUMBERELEMENTS)];
+} wmi_dcc_ndl_chan;
+
+#define WMI_CHAN_FREQ_GET(ptr)                   WMI_GET_BITS((ptr)->chan_info, 0, 16)
+#define WMI_CHAN_FREQ_SET(ptr, val)              WMI_SET_BITS((ptr)->chan_info, 0, 16, val)
+#define WMI_NDL_NUM_ACTIVE_STATE_GET(ptr)        WMI_GET_BITS((ptr)->chan_info, 16, 7)
+#define WMI_NDL_NUM_ACTIVE_STATE_SET(ptr, val)   WMI_SET_BITS((ptr)->chan_info, 16, 7, val)
+
+#define WMI_NDL_MIN_DCC_SAMPLING_GET(ptr)        WMI_GET_BITS((ptr)->ndl_min_dcc_sampling, 0, 10)
+#define WMI_NDL_MIN_DCC_SAMPLING_SET(ptr, val)   WMI_SET_BITS((ptr)->ndl_min_dcc_sampling, 0, 10, val)
+
+#define WMI_NDL_MEASURE_INTERVAL_GET(ptr) WMI_GET_BITS((ptr)->ndl_min_dcc_sampling, 10, 16)
+#define WMI_NDL_MEASURE_INTERVAL_SET(ptr, val) WMI_SET_BITS((ptr)->ndl_min_dcc_sampling, 10, 16, val)
+
+
+#define WMI_NDL_DCC_ENABLE_GET(ptr)              WMI_GET_BITS((ptr)->dcc_flags, 0, 1)
+#define WMI_NDL_DCC_ENABLE_SET(ptr, val)         WMI_SET_BITS((ptr)->dcc_flags, 0, 1, val)
+#define WMI_NDL_DCC_STATS_ENABLE_GET(ptr)        WMI_GET_BITS((ptr)->dcc_flags, 1, 1)
+#define WMI_NDL_DCC_STATS_ENABLE_SET(ptr, val)   WMI_SET_BITS((ptr)->dcc_flags, 1, 1, val)
+#define WMI_NDL_DCC_STATS_INTERVAL_GET(ptr)      WMI_GET_BITS((ptr)->dcc_flags, 2, 16)
+#define WMI_NDL_DCC_STATS_INTERVAL_SET(ptr, val) WMI_SET_BITS((ptr)->dcc_flags, 2, 16, val)
+
+#define WMI_NDL_TIME_UP_GET(ptr)                 WMI_GET_BITS((ptr)->general_config, 0, 13)
+#define WMI_NDL_TIME_UP_SET(ptr, val)            WMI_SET_BITS((ptr)->general_config, 0, 13, val)
+#define WMI_NDL_TIME_DOWN_GET(ptr)               WMI_GET_BITS((ptr)->general_config, 13, 13)
+#define WMI_NDL_TIME_DOWN_SET(ptr, val)          WMI_SET_BITS((ptr)->general_config, 13, 13, val)
+
+#define WMI_NDL_MIN_TX_POWER_GET(ptr)        WMI_GET_BITS((ptr)->min_max_tx_power, 0, 8)
+#define WMI_NDL_MIN_TX_POWER_SET(ptr, val)   WMI_SET_BITS((ptr)->min_max_tx_power, 0, 8, val)
+#define WMI_NDL_MAX_TX_POWER_GET(ptr)        WMI_GET_BITS((ptr)->min_max_tx_power, 8, 8)
+#define WMI_NDL_MAX_TX_POWER_SET(ptr, val)   WMI_SET_BITS((ptr)->min_max_tx_power, 8, 8, val)
+
+#define WMI_NDL_DEF_TX_POWER_GET(ptr, acprio)         wmi_packed_arr_get_bits((ptr)->def_tx_power_ac, acprio, SIZE_NDLTYPE_TXPOWER)
+#define WMI_NDL_DEF_TX_POWER_SET(ptr, acprio, val)    wmi_packed_arr_set_bits((ptr)->def_tx_power_ac, acprio, SIZE_NDLTYPE_TXPOWER, val)
+
+#define WMI_NDL_MAX_PACKET_DURATION_GET(ptr, acprio)      wmi_packed_arr_get_bits((ptr)->max_packet_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION)
+#define WMI_NDL_MAX_PACKET_DURATION_SET(ptr, acprio, val) wmi_packed_arr_set_bits((ptr)->max_packet_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION, val)
+#define WMI_NDL_MIN_PACKET_INTERVAL_GET(ptr)              WMI_GET_BITS((ptr)->min_max_packet_interval, 0, 11)
+#define WMI_NDL_MIN_PACKET_INTERVAL_SET(ptr, val)         WMI_SET_BITS((ptr)->min_max_packet_interval, 0, 11, val)
+#define WMI_NDL_MAX_PACKET_INTERVAL_GET(ptr)              WMI_GET_BITS((ptr)->min_max_packet_interval, 11, 11)
+#define WMI_NDL_MAX_PACKET_INTERVAL_SET(ptr, val)         WMI_SET_BITS((ptr)->min_max_packet_interval, 11, 11, val)
+#define WMI_NDL_DEF_PACKET_INTERVAL_GET(ptr, acprio)      wmi_packed_arr_get_bits((ptr)->def_packet_interval_ac, acprio, SIZE_NDLTYPE_PACKETINTERVAL)
+#define WMI_NDL_DEF_PACKET_INTERVAL_SET(ptr, acprio, val) wmi_packed_arr_set_bits((ptr)->def_packet_interval_ac, acprio, SIZE_NDLTYPE_PACKETINTERVAL, val)
+
+#define WMI_NDL_MIN_DATARATE_GET(ptr)                WMI_GET_BITS((ptr)->min_max_datarate, 0, 4)
+#define WMI_NDL_MIN_DATARATE_SET(ptr, val)           WMI_SET_BITS((ptr)->min_max_datarate, 0, 4, val)
+#define WMI_NDL_MAX_DATARATE_GET(ptr)                WMI_GET_BITS((ptr)->min_max_datarate, 4, 4)
+#define WMI_NDL_MAX_DATARATE_SET(ptr, val)           WMI_SET_BITS((ptr)->min_max_datarate, 4, 4, val)
+#define WMI_NDL_DEF_DATARATE_GET(ptr, acprio)        wmi_packed_arr_get_bits((ptr)->def_datarate_ac, acprio, SIZE_NDLTYPE_DATARATE)
+#define WMI_NDL_DEF_DATARATE_SET(ptr, acprio, val)   wmi_packed_arr_set_bits((ptr)->def_datarate_ac, acprio, SIZE_NDLTYPE_DATARATE, val)
+
+#define WMI_NDL_MIN_CARRIER_SENSE_GET(ptr)       WMI_GET_BITS((ptr)->min_max_def_carrier_sense, 0, 8)
+#define WMI_NDL_MIN_CARRIER_SENSE_SET(ptr, val)  WMI_SET_BITS((ptr)->min_max_def_carrier_sense, 0, 8, val)
+#define WMI_NDL_MAX_CARRIER_SENSE_GET(ptr)       WMI_GET_BITS((ptr)->min_max_def_carrier_sense, 8, 8)
+#define WMI_NDL_MAX_CARRIER_SENSE_SET(ptr, val)  WMI_SET_BITS((ptr)->min_max_def_carrier_sense, 8, 8, val)
+#define WMI_NDL_DEF_CARRIER_SENSE_GET(ptr)       WMI_GET_BITS((ptr)->min_max_def_carrier_sense, 16, 8)
+#define WMI_NDL_DEF_CARRIER_SENSE_SET(ptr, val)  WMI_SET_BITS((ptr)->min_max_def_carrier_sense, 16, 8, val)
+
+#define WMI_NDL_DEF_DCC_SENSITIVITY_GET(ptr)        WMI_GET_BITS((ptr)->receive_model_parameter, 0, 8)
+#define WMI_NDL_DEF_DCC_SENSITIVITY_SET(ptr, val)   WMI_SET_BITS((ptr)->receive_model_parameter, 0, 8, val)
+#define WMI_NDL_MAX_CS_RANGE_GET(ptr)               WMI_GET_BITS((ptr)->receive_model_parameter, 8, 13)
+#define WMI_NDL_MAX_CS_RANGE_SET(ptr, val)          WMI_SET_BITS((ptr)->receive_model_parameter, 8, 13, val)
+#define WMI_NDL_REF_PATH_LOSS_GET(ptr)              WMI_GET_BITS((ptr)->receive_model_parameter, 21, 6)
+#define WMI_NDL_REF_PATH_LOSS_SET(ptr, val)         WMI_SET_BITS((ptr)->receive_model_parameter, 21, 6, val)
+
+#define WMI_NDL_MIN_SNR_GET(ptr)                    WMI_GET_BITS((ptr)->receive_model_parameter_2, 0, 8)
+#define WMI_NDL_MIN_SNR_SET(ptr, val)                WMI_SET_BITS((ptr)->receive_model_parameter_2, 0, 8, val)
+
+#define WMI_NDL_SNR_BACKOFF_GET(ptr, mcs)        wmi_packed_arr_get_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR)
+#define WMI_NDL_SNR_BACKOFF_SET(ptr, mcs, val)    wmi_packed_arr_set_bits((ptr)->snr_backoff_mcs, mcs, SIZE_NDLTYPE_SNR, val)
+
+#define WMI_NDL_TM_PACKET_ARRIVAL_RATE_GET(ptr, acprio)       wmi_packed_arr_get_bits((ptr)->tm_packet_arrival_rate_ac, acprio, SIZE_NDLTYPE_ARRIVALRATE)
+#define WMI_NDL_TM_PACKET_ARRIVAL_RATE_SET(ptr, acprio, val)  wmi_packed_arr_set_bits((ptr)->tm_packet_arrival_rate_ac, acprio, SIZE_NDLTYPE_ARRIVALRATE, val)
+#define WMI_NDL_TM_PACKET_AVG_DURATION_GET(ptr, acprio)       wmi_packed_arr_get_bits((ptr)->tm_packet_avg_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION)
+#define WMI_NDL_TM_PACKET_AVG_DURATION_SET(ptr, acprio, val)  wmi_packed_arr_set_bits((ptr)->tm_packet_avg_duration_ac, acprio, SIZE_NDLTYPE_PACKETDURATION, val)
+#define WMI_NDL_TM_SIGNAL_AVG_POWER_GET(ptr, acprio)          wmi_packed_arr_get_bits((ptr)->tm_signal_avg_power_ac, acprio, SIZE_NDLTYPE_TXPOWER)
+#define WMI_NDL_TM_SIGNAL_AVG_POWER_SET(ptr, acprio, val)     wmi_packed_arr_set_bits((ptr)->tm_signal_avg_power_ac, acprio, SIZE_NDLTYPE_TXPOWER, val)
+#define WMI_NDL_TM_MAX_CHANNEL_USE_GET(ptr)                   WMI_GET_BITS((ptr)->tm_max_channel_use, 0, 14)
+#define WMI_NDL_TM_MAX_CHANNEL_USE_SET(ptr, val)              WMI_SET_BITS((ptr)->tm_max_channel_use, 0, 14, val)
+#define WMI_NDL_TM_CHANNEL_USE_GET(ptr, acprio)               wmi_packed_arr_get_bits((ptr)->tm_channel_use_ac, acprio, SIZE_NDLTYPE_CHANNELUSE)
+#define WMI_NDL_TM_CHANNEL_USE_SET(ptr, acprio, val)          wmi_packed_arr_set_bits((ptr)->tm_channel_use_ac, acprio, SIZE_NDLTYPE_CHANNELUSE, val)
+
+#define WMI_NDL_MIN_CHANNEL_LOAD_GET(ptr)        WMI_GET_BITS((ptr)->min_max_channel_load, 0, 11)
+#define WMI_NDL_MIN_CHANNEL_LOAD_SET(ptr, val)   WMI_SET_BITS((ptr)->min_max_channel_load, 0, 11, val)
+#define WMI_NDL_MAX_CHANNEL_LOAD_GET(ptr)        WMI_GET_BITS((ptr)->min_max_channel_load, 11, 11)
+#define WMI_NDL_MAX_CHANNEL_LOAD_SET(ptr, val)   WMI_SET_BITS((ptr)->min_max_channel_load, 11, 11, val)
+
+#define WMI_NDL_NUM_QUEUE_GET(ptr)                        WMI_GET_BITS((ptr)->transmit_queue_parameters, 0, 4)
+#define WMI_NDL_NUM_QUEUE_SET(ptr, val)                   WMI_SET_BITS((ptr)->transmit_queue_parameters, 0, 4, val)
+#define WMI_NDL_REF_QUEUE_STATUS_GET(ptr, acprio)         WMI_GET_BITS((ptr)->transmit_queue_parameters, (4 + (acprio * 2)), 2)
+#define WMI_NDL_REF_QUEUE_STATUS_SET(ptr, acprio, val)    WMI_SET_BITS((ptr)->transmit_queue_parameters, (4 + (acprio * 2)), 2, val)
+#define WMI_NDL_REF_QUEUE_LEN_GET(ptr, acprio)            wmi_packed_arr_get_bits((ptr)->numberElements, acprio, SIZE_NDLTYPE_NUMBERELEMENTS)
+#define WMI_NDL_REF_QUEUE_LEN_SET(ptr, acprio, val)       wmi_packed_arr_set_bits((ptr)->numberElements, acprio, SIZE_NDLTYPE_NUMBERELEMENTS, val)
+
+/** Data structure for updating the NDL. */
+typedef struct {
+	/** TLV tag and len; tag equals
+	*  WMITLV_TAG_STRUC_wmi_dcc_update_ndl_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/** The number of channels in the request. */
+	A_UINT32 num_channel;
+	/** This is followed by a TLV array of wmi_dcc_ndl_chan. */
+	/** This is followed by a TLV array of wmi_dcc_ndl_active_state_config. */
+} wmi_dcc_update_ndl_cmd_fixed_param;
+
+typedef struct {
+	/**
+	 * TLV tag and len; tag equals
+	 *  WMITLV_TAG_STRUC_wmi_dcc_update_ndl_resp_event_fixed_param
+	 */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	A_UINT32 status;
+} wmi_dcc_update_ndl_resp_event_fixed_param;
+
+/* Actions for TSF timestamp */
+typedef enum {
+	TSF_TSTAMP_CAPTURE_REQ = 1,
+	TSF_TSTAMP_CAPTURE_RESET = 2,
+	TSF_TSTAMP_READ_VALUE = 3,
+} wmi_tsf_tstamp_action;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_vdev_tsf_tstamp_action_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* action type, refer to wmi_tsf_tstamp_action */
+	A_UINT32 tsf_action;
+} wmi_vdev_tsf_tstamp_action_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_vdev_tsf_report_event_fixed_param */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/* low 32bit of tsf */
+	A_UINT32 tsf_low;
+	/* high 32 bit of tsf */
+	A_UINT32 tsf_high;
+} wmi_vdev_tsf_report_event_fixed_param;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_vdev_set_ie_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* unique id identifying the VDEV, generated by the caller */
+	A_UINT32 vdev_id;
+	/* unique id to identify the ie_data as defined by ieee 802.11 spec */
+	A_UINT32 ie_id;
+	/* ie_len corresponds to num of bytes in ie_data[] */
+	A_UINT32 ie_len;
+	/*
+	 * Following this structure is the TLV byte stream of ie data of length
+	 * buf_len:
+	 * A_UINT8 ie_data[];
+	 */
+} wmi_vdev_set_ie_cmd_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_set_pcl_cmd_fixed_param
+	 * Set Preferred Channel List
+	 */
+	A_UINT32 tlv_header;
+
+	/* # of channels to scan */
+	A_UINT32 num_chan;
+	/*
+	 * TLV (tag length value ) parameters follow the wmi_soc_set_pcl_cmd
+	 * structure. The TLV's are:
+	 *     A_UINT32 channel_list[];
+	 */
+} wmi_soc_set_pcl_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_cmd_fixed_param
+	 * Set Hardware Mode  */
+	A_UINT32 tlv_header;
+
+	/* Hardware Mode Index */
+	A_UINT32 hw_mode_index;
+} wmi_soc_set_hw_mode_cmd_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_cmd_fixed_param
+	 *  Set Dual MAC Firmware Configuration
+	 */
+	A_UINT32 tlv_header;
+
+	/* Concurrent scan configuration bits */
+	A_UINT32 concurrent_scan_config_bits;
+	/* Firmware mode configuration bits */
+	A_UINT32 fw_mode_config_bits;
+} wmi_soc_set_dual_mac_config_cmd_fixed_param;
+
+typedef struct {
+	A_UINT32 num_tx_chains;
+	A_UINT32 num_rx_chains;
+	A_UINT32 reserved[2];
+} soc_num_tx_rx_chains;
+
+typedef struct {
+	A_UINT32 num_tx_chains_2g;
+	A_UINT32 num_rx_chains_2g;
+	A_UINT32 num_tx_chains_5g;
+	A_UINT32 num_rx_chains_5g;
+} band_num_tx_rx_chains;
+
+typedef union {
+	soc_num_tx_rx_chains soc_txrx_chain_setting;
+	band_num_tx_rx_chains band_txrx_chain_setting;
+} antenna_num_tx_rx_chains;
+
+typedef enum {
+	ANTENNA_MODE_DISABLED = 0x0,
+	ANTENNA_MODE_LOW_POWER_LOCATION_SCAN = 0x01,
+	/* reserved */
+} antenna_mode_reason;
+
+typedef struct {
+	/*
+	 * TLV tag and len;
+	 *  tag equals WMITLV_TAG_STRUC_wmi_soc_set_antenna_mode_cmd_fixed_param
+	 */
+	A_UINT32 tlv_header;
+
+	/* the reason for setting antenna mode, refer antenna_mode_reason */
+	A_UINT32 reason;
+
+	/*
+	 * The above reason parameter will select whether the following union
+	 * is soc_num_tx_rx_chains or band_num_tx_rx_chains.
+	 */
+	antenna_num_tx_rx_chains num_txrx_chains_setting;
+} wmi_soc_set_antenna_mode_cmd_fixed_param;
+
+
+/** Data structure for information specific to a VDEV to MAC mapping. */
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_response_vdev_mac_entry */
+	A_UINT32 tlv_header;
+	A_UINT32 vdev_id; /* VDEV ID */
+	A_UINT32 mac_id; /* MAC ID */
+} wmi_soc_set_hw_mode_response_vdev_mac_entry;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_set_hw_mode_response_event_fixed_param
+	 *  Set Hardware Mode Response Event  **/
+	A_UINT32 tlv_header;
+
+	/* Status of set_hw_mode command
+	 * Values for Status:
+	 *  0 - OK; command successful
+	*  1 - EINVAL; Requested invalid hw_mode
+	*  2 - ECANCELED; HW mode change canceled
+	*  3 - ENOTSUP; HW mode not supported
+	*  4 - EHARDWARE; HW mode change prevented by hardware
+	*  5 - EPENDING; HW mode change is pending
+	*  6 - ECOEX; HW mode change conflict with Coex
+	*/
+	A_UINT32 status;
+	/* Configured Hardware Mode */
+	A_UINT32 cfgd_hw_mode_index;
+	/* Number of Vdev to Mac entries */
+	A_UINT32 num_vdev_mac_entries;
+	/*
+	 * TLV (tag length value ) parameters follow the soc_set_hw_mode_response_event
+	 * structure. The TLV's are:
+	 *      A_UINT32 wmi_soc_set_hw_mode_response_vdev_mac_entry[];
+	 */
+} wmi_soc_set_hw_mode_response_event_fixed_param;
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_hw_mode_transition_event_fixed_param
+	 *  Hardware Mode Transition Event
+	 */
+	A_UINT32 tlv_header;
+	 /* Original or old Hardware mode */
+	A_UINT32 old_hw_mode_index;
+	/* New Hardware Mode */
+	A_UINT32 new_hw_mode_index;
+	/* Number of Vdev to Mac entries */
+	A_UINT32 num_vdev_mac_entries;
+
+	/**
+	 * TLV (tag length value ) parameters follow the soc_set_hw_mode_response_event
+	 * structure. The TLV's are:
+	 *      A_UINT32 wmi_soc_set_hw_mode_response_vdev_mac_entry[];
+	 */
+} wmi_soc_hw_mode_transition_event_fixed_param;
+
+
+typedef struct {
+	/*
+	 * TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_soc_set_dual_mac_config_response_event_fixed_param
+	 *  Set Dual MAC Config Response Event
+	 */
+	A_UINT32 tlv_header;
+
+	/* Status for set_dual_mac_config command */
+	/*
+	 * Values for Status:
+	 *  0 - OK; command successful
+	 *  1 - EINVAL; Requested invalid hw_mode
+	 *  3 - ENOTSUP; HW mode not supported
+	 *  4 - EHARDWARE; HW mode change prevented by hardware
+	 *  6 - ECOEX; HW mode change conflict with Coex
+	 */
+	A_UINT32 status;
+} wmi_soc_set_dual_mac_config_response_event_fixed_param;
+
+typedef enum {
+	MAWC_MOTION_STATE_UNKNOWN,
+	MAWC_MOTION_STATE_STATIONARY,
+	MAWC_MOTION_STATE_WALK,
+	MAWC_MOTION_STATE_TRANSIT,
+} MAWC_MOTION_STATE;
+
+typedef enum {
+	MAWC_SENSOR_STATUS_OK,
+	MAWC_SENSOR_STATUS_FAILED_TO_ENABLE,
+	MAWC_SENSOR_STATUS_SHUTDOWN,
+} MAWC_SENSOR_STATUS;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_mawc_sensor_report_ind_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/** new motion state, MAWC_MOTION_STATE */
+	A_UINT32 motion_state;
+	/** status code of sensor, MAWC_SENSOR_STATUS */
+	A_UINT32 sensor_status;
+} wmi_mawc_sensor_report_ind_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_mawc_enable_sensor_event_fixed_param */
+	A_UINT32 tlv_header;
+	/* enable(1) or disable(0) */
+	A_UINT32 enable;
+} wmi_mawc_enable_sensor_event_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_extscan_configure_mawc_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* Unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/* enable(1) or disable(0) MAWC */
+	A_UINT32 enable;
+	/* ratio of skipping suppressing scan, skip one out of x */
+	A_UINT32 suppress_ratio;
+} wmi_extscan_configure_mawc_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_nlo_configure_mawc_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* Unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/* enable(1) or disable(0) MAWC */
+	A_UINT32 enable;
+	/* ratio of exponential backoff, next = current + current*ratio/100 */
+	A_UINT32 exp_backoff_ratio;
+	/* initial scan interval(msec) */
+	A_UINT32 init_scan_interval;
+	/* max scan interval(msec) */
+	A_UINT32 max_scan_interval;
+} wmi_nlo_configure_mawc_cmd_fixed_param;
+
+typedef struct {
+	/* TLV tag and len; tag equals
+	 * WMITLV_TAG_STRUC_wmi_roam_configure_mawc_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* Unique id identifying the VDEV */
+	A_UINT32 vdev_id;
+	/* enable(1) or disable(0) MAWC */
+	A_UINT32 enable;
+	/* data traffic load (kBps) to register CMC */
+	A_UINT32 traffic_load_threshold;
+	/* RSSI threshold (dBm) to scan for Best AP */
+	A_UINT32 best_ap_rssi_threshold;
+	/* high RSSI threshold adjustment in Stationary to suppress scan */
+	A_UINT32 rssi_stationary_high_adjust;
+	/* low RSSI threshold adjustment in Stationary to suppress scan */
+	A_UINT32 rssi_stationary_low_adjust;
+} wmi_roam_configure_mawc_cmd_fixed_param;
+
+#define WMI_PACKET_FILTER_COMPARE_DATA_LEN_DWORD     2
+#define WMI_PACKET_FILTER_MAX_CMP_PER_PACKET_FILTER  10
+
+typedef enum {
+	PACKET_FILTER_TYPE_INVALID = 0,
+	PACKET_FILTER_TYPE_FILTER_PKT,
+	PACKET_FILTER_TYPE_RESERVE_PKT, /* not used */
+	PACKET_FILTER_TYPE_MAX_ENUM_SIZE
+} WMI_PACKET_FILTER_FILTER_TYPE;
+
+typedef enum {
+	PACKET_FILTER_PROTO_TYPE_INVALID = 0,
+
+	/* L2 header */
+	PACKET_FILTER_PROTO_TYPE_MAC,
+	PACKET_FILTER_PROTO_TYPE_SNAP,
+
+	/* L3 header (EtherType) */
+	PACKET_FILTER_PROTO_TYPE_IPV4,
+	PACKET_FILTER_PROTO_TYPE_IPV6,
+
+	/* L4 header (IP protocol) */
+	PACKET_FILTER_PROTO_TYPE_UDP,
+	PACKET_FILTER_PROTO_TYPE_TCP,
+	PACKET_FILTER_PROTO_TYPE_ICMPV6,
+
+	PACKET_FILTER_PROTO_TYPE_MAX
+} WMI_PACKET_FILTER_PROTO_TYPE;
+
+typedef enum {
+	PACKET_FILTER_CMP_TYPE_INVALID = 0,
+	PACKET_FILTER_CMP_TYPE_EQUAL,
+	PACKET_FILTER_CMP_TYPE_MASK_EQUAL,
+	PACKET_FILTER_CMP_TYPE_NOT_EQUAL,
+	PACKET_FILTER_CMP_TYPE_MASK_NOT_EQUAL,
+	PACKET_FILTER_CMP_TYPE_ADDRTYPE,
+	PACKET_FILTER_CMP_TYPE_MAX
+} WMI_PACKET_FILTER_CMP_TYPE;
+
+typedef enum {
+	PACKET_FILTER_SET_INACTIVE = 0,
+	PACKET_FILTER_SET_ACTIVE
+} WMI_PACKET_FILTER_ACTION;
+
+typedef enum {
+	PACKET_FILTER_SET_DISABLE = 0,
+	PACKET_FILTER_SET_ENABLE
+} WMI_PACKET_FILTER_RUNTIME_ENABLE;
+
+typedef struct {
+	A_UINT32  proto_type;
+	A_UINT32  cmp_type;
+	A_UINT32  data_length; /* Length of the data to compare (units = bytes) */
+	/*
+	 * from start of the respective frame header (
+	 * units = bytes)
+	 */
+	A_UINT32  data_offset;
+	/* Data to compare, little-endian order */
+	A_UINT32  compareData[WMI_PACKET_FILTER_COMPARE_DATA_LEN_DWORD];
+	/* Mask to be applied on rcvd packet data before compare, little-endian order */
+	A_UINT32  dataMask[WMI_PACKET_FILTER_COMPARE_DATA_LEN_DWORD];
+} WMI_PACKET_FILTER_PARAMS_TYPE;
+
+typedef struct {
+	A_UINT32  tlv_header;
+	A_UINT32  vdev_id;
+	A_UINT32  filter_id;
+	A_UINT32  filter_action; /* WMI_PACKET_FILTER_ACTION */
+	A_UINT32  filter_type;
+	A_UINT32  num_params; /* how many entries in paramsData are valid */
+	A_UINT32  coalesce_time; /* not currently used - fill with 0x0 */
+	WMI_PACKET_FILTER_PARAMS_TYPE  paramsData[WMI_PACKET_FILTER_MAX_CMP_PER_PACKET_FILTER];
+} WMI_PACKET_FILTER_CONFIG_CMD_fixed_param;
+
+/* enable / disable all filters within the specified vdev */
+typedef struct {
+	A_UINT32  tlv_header;
+	A_UINT32  vdev_id;
+	A_UINT32  enable; /* WMI_PACKET_FILTER_RUNTIME_ENABLE */
+} WMI_PACKET_FILTER_ENABLE_CMD_fixed_param;
+
+
+#define WMI_LRO_INFO_TCP_FLAG_VALS_BITPOS  0
+#define WMI_LRO_INFO_TCP_FLAG_VALS_NUMBITS 9
+
+#define WMI_LRO_INFO_TCP_FLAG_VALS_SET(tcp_flag_u32, tcp_flag_values) \
+	WMI_SET_BITS(tcp_flag_u32, \
+	WMI_LRO_INFO_TCP_FLAG_VALS_BITPOS, \
+	WMI_LRO_INFO_TCP_FLAG_VALS_NUMBITS, \
+	tcp_flag_values)
+#define WMI_LRO_INFO_TCP_FLAG_VALS_GET(tcp_flag_u32) \
+	WMI_GET_BITS(tcp_flag_u32, \
+	WMI_LRO_INFO_TCP_FLAG_VALS_BITPOS, \
+	WMI_LRO_INFO_TCP_FLAG_VALS_NUMBITS)
+
+#define WMI_LRO_INFO_TCP_FLAGS_MASK_BITPOS  9
+#define WMI_LRO_INFO_TCP_FLAGS_MASK_NUMBITS 9
+
+#define WMI_LRO_INFO_TCP_FLAGS_MASK_SET(tcp_flag_u32, tcp_flags_mask) \
+	WMI_SET_BITS(tcp_flag_u32, \
+	WMI_LRO_INFO_TCP_FLAGS_MASK_BITPOS, \
+	WMI_LRO_INFO_TCP_FLAGS_MASK_NUMBITS, \
+	tcp_flags_mask)
+#define WMI_LRO_INFO_TCP_FLAGS_MASK_GET(tcp_flag_u32) \
+	WMI_GET_BITS(tcp_flag_u32, \
+	WMI_LRO_INFO_TCP_FLAGS_MASK_BITPOS, \
+	WMI_LRO_INFO_TCP_FLAGS_MASK_NUMBITS)
+
+typedef struct {
+	A_UINT32 tlv_header;
+	/**
+	 * @brief lro_enable - indicates whether lro is enabled
+	 * [0] LRO Enable
+	 */
+	A_UINT32 lro_enable;
+	/**
+	 * @brief tcp_flag_u32 - mask of which TCP flags to check and
+	 *      values to check for
+	 * [8:0] TCP flag values - If the TCP flags from the packet do not match
+	 *       the values in this field after masking with TCP flags mask
+	 *       below,LRO eligible will not be set
+	 * [17:9] TCP flags mask - Mask field for comparing the TCP values
+	 *       provided above with the TCP flags field in the received packet
+	 * Use WMI_LRO_INFO_TCP_FLAG_VALS and WMI_LRO_INFO_TCP_FLAGS_MASK
+	 * macros to isolate the mask field and values field that are packed
+	 * into this u32 "word".
+	 */
+	A_UINT32 tcp_flag_u32;
+	/**
+	 * @brief toeplitz_hash_ipv4 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv4 packets. Contains
+	 * bytes 0 to 3
+	 *
+	 * In this and all the below toeplitz_hash fields, the bytes are
+	 * specified in little-endian order.  For example:
+	 *     toeplitz_hash_ipv4_0_3 bits 7:0   holds seed byte 0
+	 *     toeplitz_hash_ipv4_0_3 bits 15:8  holds seed byte 1
+	 *     toeplitz_hash_ipv4_0_3 bits 23:16 holds seed byte 2
+	 *     toeplitz_hash_ipv4_0_3 bits 31:24 holds seed byte 3
+	 */
+	A_UINT32 toeplitz_hash_ipv4_0_3;
+
+	/**
+	 * @brief toeplitz_hash_ipv4 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv4 packets. Contains
+	 * bytes 4 to 7
+	 */
+	A_UINT32 toeplitz_hash_ipv4_4_7;
+
+	/**
+	 * @brief toeplitz_hash_ipv4 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv4 packets. Contains
+	 * bytes 8 to 11
+	 */
+	A_UINT32 toeplitz_hash_ipv4_8_11;
+
+	/**
+	 * @brief toeplitz_hash_ipv4 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv4 packets. Contains
+	 * bytes 12 to 15
+	 */
+	A_UINT32 toeplitz_hash_ipv4_12_15;
+
+	/**
+	 * @brief toeplitz_hash_ipv4 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv4 packets. Contains
+	 * byte 16
+	 */
+	A_UINT32 toeplitz_hash_ipv4_16;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 0 to 3
+	 */
+	A_UINT32 toeplitz_hash_ipv6_0_3;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 4 to 7
+	 */
+	A_UINT32 toeplitz_hash_ipv6_4_7;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 8 to 11
+	 */
+	A_UINT32 toeplitz_hash_ipv6_8_11;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 12 to 15
+	 */
+	A_UINT32 toeplitz_hash_ipv6_12_15;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 16 to 19
+	 */
+	A_UINT32 toeplitz_hash_ipv6_16_19;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 20 to 22
+	 */
+	A_UINT32 toeplitz_hash_ipv6_20_23;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 24 to 27
+	 */
+	A_UINT32 toeplitz_hash_ipv6_24_27;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 28 to 31
+	 */
+	A_UINT32 toeplitz_hash_ipv6_28_31;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 32 to 35
+	 */
+	A_UINT32 toeplitz_hash_ipv6_32_35;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * bytes 36 to 39
+	 */
+	A_UINT32 toeplitz_hash_ipv6_36_39;
+
+	/**
+	 * @brief toeplitz_hash_ipv6 - contains seed needed to compute
+	 * the flow id 5-tuple toeplitz hash for IPv6 packets. Contains
+	 * byte 40
+	 */
+	A_UINT32 toeplitz_hash_ipv6_40;
+} wmi_lro_info_cmd_fixed_param;
+
+/* ADD NEW DEFS HERE */
+
+/*****************************************************************************
+ * The following structures are deprecated. DO NOT USE THEM!
+ */
+
+/** Max number of channels in the schedule. */
+#define OCB_CHANNEL_MAX (5)
+
+/* NOTE: Make sure these data structures are identical to those	9235
+* defined in sirApi.h */
+
+typedef struct
+{
+	/** Arbitration Inter-Frame Spacing. Range: 2-15 */
+	A_UINT32 aifsn;
+	/** Contention Window minimum. Range: 1 - 10 */
+	A_UINT32 cwmin;
+	/** Contention Window maximum. Range: 1 - 10 */
+	A_UINT32 cwmax;
+} wmi_qos_params_t;
+
+typedef struct
+{
+	/** Channel frequency in MHz */
+	A_UINT32 chan_freq;
+	/** Channel duration in ms */
+	A_UINT32 duration;
+	/** Start guard interval in ms */
+	A_UINT32 start_guard_interval;
+	/** End guard interval in ms */
+	A_UINT32 end_guard_interval;
+	/** Transmit power in dBm, range 0 - 23 */
+	A_UINT32 tx_power;
+	/** Transmit datarate in Mbps */
+	A_UINT32 tx_rate;
+	/** QoS parameters for each AC */
+	wmi_qos_params_t qos_params[WLAN_MAX_AC];
+	/** 1 to enable RX stats for this channel, 0 otherwise */
+	A_UINT32 rx_stats;
+} wmi_ocb_channel_t;
+
+typedef struct {
+	/** TLV tag and len; tag equals
+	* WMITLV_TAG_STRUC_wmi_ocb_set_sched_cmd_fixed_param */
+	A_UINT32 tlv_header;
+	/* VDEV identifier */
+	A_UINT32 vdev_id;
+	/** Number of valid channels in the channels array */
+	A_UINT32 num_channels;
+	/** The array of channels */
+	wmi_ocb_channel_t channels[OCB_CHANNEL_MAX];
+	/** 1 to allow off-channel tx, 0 otherwise */
+	A_UINT32 off_channel_tx; // Not supported
+} wmi_ocb_set_sched_cmd_fixed_param;
+
+typedef struct {
+	/** Return status. 0 for success, non-zero otherwise */
+	A_UINT32 status;
+} wmi_ocb_set_sched_event_fixed_param;
+
+/**
+* END DEPRECATED
+*/
+#ifdef __cplusplus
+}
+#endif
+#endif /*_WMI_UNIFIED_H_*/
+/**@}*/
diff --git a/target/inc/wmi_version.h b/target/inc/wmi_version.h
new file mode 100644
index 0000000..0c1b628
--- /dev/null
+++ b/target/inc/wmi_version.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2012-2015 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/*
+ * IMPORTANT NOTE: For all change to WMI Interface, the ABI version number _must_ be updated.
+ */
+/** Major version number is incremented when there are significant changes to WMI Interface that break compatibility. */
+#define __WMI_VER_MAJOR_    1
+/** Minor version number is incremented when there are changes
+ *  (however minor) to WMI Interface that break
+ *  compatibility. */
+#define __WMI_VER_MINOR_    0
+/** WMI revision number has to be incremented when there is a
+ *  change that may or may not break compatibility */
+#define __WMI_REVISION_ 173
+
+/** The Version Namespace should not be normally changed. Only
+ *  host and firmware of the same WMI namespace will work
+ *  together.
+ *  For example, "QCA_ML" converts to 0x4C, 0x4D5F414351.
+ *  where 'Q'=0x51, 'C'=0x43, 'A'=0x41, '_'=0x5F. 'M'=4D, 'L'=4C
+ */
+#define __NAMESPACE_0_    0x5F414351
+#define __NAMESPACE_1_    0x00004C4D
+#define __NAMESPACE_2_    0x00000000
+#define __NAMESPACE_3_    0x00000000
+
+/* Format of the version number. */
+#define WMI_VER_MAJOR_BIT_OFFSET        24
+#define WMI_VER_MINOR_BIT_OFFSET        0
+
+#define WMI_VER_MAJOR_BIT_MASK          0xFF000000
+#define WMI_VER_MINOR_BIT_MASK          0x00FFFFFF
+
+/* Macros to extract the sw_version components.
+ */
+#define WMI_VER_GET_MAJOR(x) (((x) & WMI_VER_MAJOR_BIT_MASK)>>WMI_VER_MAJOR_BIT_OFFSET)
+#define WMI_VER_GET_MINOR(x) (((x) & WMI_VER_MINOR_BIT_MASK)>>WMI_VER_MINOR_BIT_OFFSET)
+
+#define WMI_VER_GET_VERSION_0(major, minor) ( (( major << WMI_VER_MAJOR_BIT_OFFSET ) & WMI_VER_MAJOR_BIT_MASK) + (( minor << WMI_VER_MINOR_BIT_OFFSET ) & WMI_VER_MINOR_BIT_MASK) )
+/*
+ * The version has the following format:
+ * Bits 24-31: Major version
+ * Bits 0-23: Minor version
+ * Bits 0-31:  Build number
+ * E.g. Build 1.1.7 would be represented as 0x01000001 for Major/Minor & 0x00000007 for buildnum.
+ *
+ * DO NOT split the following macro into multiple lines as this may confuse the build scripts.
+ */
+/* ABI Version. Reflects the version of binary interface exposed by Target firmware. */
+#define WMI_ABI_VERSION_0  WMI_VER_GET_VERSION_0(__WMI_VER_MAJOR_, __WMI_VER_MINOR_)
+#define WMI_ABI_VERSION_1  __WMI_REVISION_
+#define WMI_ABI_VERSION_NS_0 __NAMESPACE_0_
+#define WMI_ABI_VERSION_NS_1 __NAMESPACE_1_
+#define WMI_ABI_VERSION_NS_2 __NAMESPACE_2_
+#define WMI_ABI_VERSION_NS_3 __NAMESPACE_3_
diff --git a/target/inc/wmix.h b/target/inc/wmix.h
new file mode 100644
index 0000000..e7c7934
--- /dev/null
+++ b/target/inc/wmix.h
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ *
+ * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
+ *
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * This file was originally distributed by Qualcomm Atheros, Inc.
+ * under proprietary terms before Copyright ownership was assigned
+ * to the Linux Foundation.
+ */
+
+/*
+ * This file contains extensions of the WMI protocol specified in the
+ * Wireless Module Interface (WMI).  It includes definitions of all
+ * extended commands and events.  Extensions include useful commands
+ * that are not directly related to wireless activities.  They may
+ * be hardware-specific, and they might not be supported on all
+ * implementations.
+ *
+ * Extended WMIX commands are encapsulated in a WMI message with
+ * cmd=WMI_EXTENSION_CMD.
+ */
+
+#ifndef _WMIX_H_
+#define _WMIX_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Extended WMI commands are those that are needed during wireless
+ * operation, but which are not really wireless commands.  This allows,
+ * for instance, platform-specific commands.  Extended WMI commands are
+ * embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID.
+ * Extended WMI events are similarly embedded in a WMI event message with
+ * WMI_EVENT_ID=WMI_EXTENSION_EVENTID.
+ */
+typedef struct {
+	A_UINT32 commandId;
+} POSTPACK WMIX_CMD_HDR;
+
+typedef enum {
+	WMIX_DSETOPEN_REPLY_CMDID = 0x2001,
+	WMIX_DSETDATA_REPLY_CMDID,
+	WMIX_HB_CHALLENGE_RESP_CMDID,
+	WMIX_DBGLOG_CFG_MODULE_CMDID,
+	WMIX_PROF_CFG_CMDID,            /* 0x200a */
+	WMIX_PROF_ADDR_SET_CMDID,
+	WMIX_PROF_START_CMDID,
+	WMIX_PROF_STOP_CMDID,
+	WMIX_PROF_COUNT_GET_CMDID,
+} WMIX_COMMAND_ID;
+
+typedef enum {
+	WMIX_DSETOPENREQ_EVENTID = 0x3001,
+	WMIX_DSETCLOSE_EVENTID,
+	WMIX_DSETDATAREQ_EVENTID,
+	WMIX_HB_CHALLENGE_RESP_EVENTID,
+	WMIX_DBGLOG_EVENTID,
+	WMIX_PROF_COUNT_EVENTID,
+	WMIX_PKTLOG_EVENTID,
+} WMIX_EVENT_ID;
+
+/*
+ * =============DataSet support=================
+ */
+
+/*
+ * WMIX_DSETOPENREQ_EVENTID
+ * DataSet Open Request Event
+ */
+typedef struct {
+	A_UINT32 dset_id;
+	A_UINT32 targ_dset_handle;              /* echo'ed, not used by Host, */
+	A_UINT32 targ_reply_fn;         /* echo'ed, not used by Host, */
+	A_UINT32 targ_reply_arg;                /* echo'ed, not used by Host, */
+} POSTPACK WMIX_DSETOPENREQ_EVENT;
+
+/*
+ * WMIX_DSETCLOSE_EVENTID
+ * DataSet Close Event
+ */
+typedef struct {
+	A_UINT32 access_cookie;
+} POSTPACK WMIX_DSETCLOSE_EVENT;
+
+/*
+ * WMIX_DSETDATAREQ_EVENTID
+ * DataSet Data Request Event
+ */
+typedef struct {
+	A_UINT32 access_cookie;
+	A_UINT32 offset;
+	A_UINT32 length;
+	A_UINT32 targ_buf;              /* echo'ed, not used by Host, */
+	A_UINT32 targ_reply_fn;         /* echo'ed, not used by Host, */
+	A_UINT32 targ_reply_arg;                /* echo'ed, not used by Host, */
+} WMIX_DSETDATAREQ_EVENT;
+
+typedef struct {
+	A_UINT32 status;
+	A_UINT32 targ_dset_handle;
+	A_UINT32 targ_reply_fn;
+	A_UINT32 targ_reply_arg;
+	A_UINT32 access_cookie;
+	A_UINT32 size;
+	A_UINT32 version;
+} WMIX_DSETOPEN_REPLY_CMD;
+
+typedef struct {
+	A_UINT32 status;
+	A_UINT32 targ_buf;
+	A_UINT32 targ_reply_fn;
+	A_UINT32 targ_reply_arg;
+	A_UINT32 length;
+	A_UINT8 buf[1];
+} WMIX_DSETDATA_REPLY_CMD;
+
+/*
+ * =============Error Detection support=================
+ */
+
+/*
+ * WMIX_HB_CHALLENGE_RESP_CMDID
+ * Heartbeat Challenge Response command
+ */
+typedef struct {
+	A_UINT32 cookie;
+	A_UINT32 source;
+} WMIX_HB_CHALLENGE_RESP_CMD;
+
+/*
+ * WMIX_HB_CHALLENGE_RESP_EVENTID
+ * Heartbeat Challenge Response Event
+ */
+#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD
+
+/*
+ * =============Target Profiling support=================
+ */
+
+typedef struct {
+	A_UINT32 period;                /* Time (in 30.5us ticks) between samples */
+	A_UINT32 nbins;
+} WMIX_PROF_CFG_CMD;
+
+typedef struct {
+	A_UINT32 addr;
+} WMIX_PROF_ADDR_SET_CMD;
+
+/*
+ * Target responds to Hosts's earlier WMIX_PROF_COUNT_GET_CMDID request
+ * using a WMIX_PROF_COUNT_EVENT with
+ *   addr set to the next address
+ *   count set to the corresponding count
+ */
+typedef struct {
+	A_UINT32 addr;
+	A_UINT32 count;
+} WMIX_PROF_COUNT_EVENT;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _WMIX_H_ */