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gerrit-public.fairphone.software / platform / vendor / qcom-opensource / wlan / qcacld-3.0 / 7090c5fd8d2bc46a463549bf26505e67a32d1d0e / . / core / mac / src / cfg / cfg_proc_msg.c
blob: 0a477d0b805efe747513beb48644b292d9a126b5 [file] [log] [blame]
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800[diff] [blame^]1/*
2 * Copyright (c) 2011-2015 The Linux Foundation. All rights reserved.
3 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28/*
29 * This file contains CFG functions for processing host messages.
30 */
31#include "cds_api.h"
32#include "ani_global.h"
33#include "cfg_priv.h"
34#include "cfg_debug.h"
35#include "wma_types.h"
36
37cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
38 {WNI_CFG_STA_ID,
39 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RELOAD |
40 CFG_CTL_NTF_HAL,
41 0, 255, 1},
42 {WNI_CFG_CF_POLLABLE,
43 CFG_CTL_RE | CFG_CTL_INT | CFG_CTL_RESTART,
44 0, 255, 1},
45 {WNI_CFG_CFP_PERIOD,
46 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT,
47 WNI_CFG_CFP_PERIOD_STAMIN,
48 WNI_CFG_CFP_PERIOD_STAMAX,
49 WNI_CFG_CFP_PERIOD_STADEF},
50 {WNI_CFG_CFP_MAX_DURATION,
51 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT,
52 WNI_CFG_CFP_MAX_DURATION_STAMIN,
53 WNI_CFG_CFP_MAX_DURATION_STAMAX,
54 WNI_CFG_CFP_MAX_DURATION_STADEF},
55 {WNI_CFG_SSID,
56 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
57 0, 255, 6},
58 {WNI_CFG_BEACON_INTERVAL,
59 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
60 CFG_CTL_NTF_SCH,
61 WNI_CFG_BEACON_INTERVAL_STAMIN,
62 WNI_CFG_BEACON_INTERVAL_STAMAX,
63 WNI_CFG_BEACON_INTERVAL_STADEF},
64 {WNI_CFG_DTIM_PERIOD,
65 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT,
66 WNI_CFG_DTIM_PERIOD_STAMIN,
67 WNI_CFG_DTIM_PERIOD_STAMAX,
68 WNI_CFG_DTIM_PERIOD_STADEF},
69 {WNI_CFG_WEP_KEY_LENGTH,
70 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
71 CFG_CTL_RESTART,
72 WNI_CFG_WEP_KEY_LENGTH_STAMIN,
73 WNI_CFG_WEP_KEY_LENGTH_STAMAX,
74 WNI_CFG_WEP_KEY_LENGTH_STADEF},
75 {WNI_CFG_WEP_DEFAULT_KEY_1,
76 CFG_CTL_VALID | CFG_CTL_WE | CFG_CTL_RESTART,
77 0, 65535, 0},
78 {WNI_CFG_WEP_DEFAULT_KEY_2,
79 CFG_CTL_VALID | CFG_CTL_WE | CFG_CTL_RESTART,
80 1, 1, 1},
81 {WNI_CFG_WEP_DEFAULT_KEY_3,
82 CFG_CTL_VALID | CFG_CTL_WE | CFG_CTL_RESTART,
83 0, 5, 5},
84 {WNI_CFG_WEP_DEFAULT_KEY_4,
85 CFG_CTL_VALID | CFG_CTL_WE | CFG_CTL_RESTART,
86 0, 1, 0},
87 {WNI_CFG_WEP_DEFAULT_KEYID,
88 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
89 CFG_CTL_NTF_LIM,
90 WNI_CFG_WEP_DEFAULT_KEYID_STAMIN,
91 WNI_CFG_WEP_DEFAULT_KEYID_STAMAX,
92 WNI_CFG_WEP_DEFAULT_KEYID_STADEF},
93 {WNI_CFG_EXCLUDE_UNENCRYPTED,
94 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
95 CFG_CTL_NTF_LIM,
96 WNI_CFG_EXCLUDE_UNENCRYPTED_STAMIN,
97 WNI_CFG_EXCLUDE_UNENCRYPTED_STAMAX,
98 WNI_CFG_EXCLUDE_UNENCRYPTED_STADEF},
99 {WNI_CFG_RTS_THRESHOLD,
100 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
101 CFG_CTL_NTF_HAL,
102 WNI_CFG_RTS_THRESHOLD_STAMIN,
103 WNI_CFG_RTS_THRESHOLD_STAMAX,
104 WNI_CFG_RTS_THRESHOLD_STADEF},
105 {WNI_CFG_SHORT_RETRY_LIMIT,
106 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
107 CFG_CTL_NTF_HAL,
108 WNI_CFG_SHORT_RETRY_LIMIT_STAMIN,
109 WNI_CFG_SHORT_RETRY_LIMIT_STAMAX,
110 WNI_CFG_SHORT_RETRY_LIMIT_STADEF},
111 {WNI_CFG_LONG_RETRY_LIMIT,
112 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
113 CFG_CTL_NTF_HAL,
114 WNI_CFG_LONG_RETRY_LIMIT_STAMIN,
115 WNI_CFG_LONG_RETRY_LIMIT_STAMAX,
116 WNI_CFG_LONG_RETRY_LIMIT_STADEF},
117 {WNI_CFG_FRAGMENTATION_THRESHOLD,
118 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
119 CFG_CTL_NTF_HAL,
120 WNI_CFG_FRAGMENTATION_THRESHOLD_STAMIN,
121 WNI_CFG_FRAGMENTATION_THRESHOLD_STAMAX,
122 WNI_CFG_FRAGMENTATION_THRESHOLD_STADEF},
123 {WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME,
124 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
125 WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STAMIN,
126 WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STAMAX,
127 WNI_CFG_ACTIVE_MINIMUM_CHANNEL_TIME_STADEF},
128 {WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME,
129 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
130 WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STAMIN,
131 WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STAMAX,
132 WNI_CFG_ACTIVE_MAXIMUM_CHANNEL_TIME_STADEF},
133 {WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME,
134 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
135 WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STAMIN,
136 WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STAMAX,
137 WNI_CFG_PASSIVE_MINIMUM_CHANNEL_TIME_STADEF},
138 {WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME,
139 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
140 WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STAMIN,
141 WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STAMAX,
142 WNI_CFG_PASSIVE_MAXIMUM_CHANNEL_TIME_STADEF},
143 {WNI_CFG_JOIN_FAILURE_TIMEOUT,
144 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
145 WNI_CFG_JOIN_FAILURE_TIMEOUT_STAMIN,
146 WNI_CFG_JOIN_FAILURE_TIMEOUT_STAMAX,
147 WNI_CFG_JOIN_FAILURE_TIMEOUT_STADEF},
148 {WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT,
149 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
150 WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STAMIN,
151 WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STAMAX,
152 WNI_CFG_AUTHENTICATE_FAILURE_TIMEOUT_STADEF},
153 {WNI_CFG_AUTHENTICATE_RSP_TIMEOUT,
154 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
155 WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STAMIN,
156 WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STAMAX,
157 WNI_CFG_AUTHENTICATE_RSP_TIMEOUT_STADEF},
158 {WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT,
159 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
160 CFG_CTL_NTF_LIM,
161 WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STAMIN,
162 WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STAMAX,
163 WNI_CFG_ASSOCIATION_FAILURE_TIMEOUT_STADEF},
164 {WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT,
165 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
166 WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STAMIN,
167 WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STAMAX,
168 WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STADEF},
169 {WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS,
170 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
171 CFG_CTL_NTF_HAL,
172 WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STAMIN,
173 WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STAMAX,
174 WNI_CFG_RA_PERIODICITY_TIMEOUT_IN_PS_STADEF},
175 {WNI_CFG_PS_ENABLE_BCN_FILTER,
176 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
177 CFG_CTL_NTF_HAL,
178 WNI_CFG_PS_ENABLE_BCN_FILTER_STAMIN,
179 WNI_CFG_PS_ENABLE_BCN_FILTER_STAMAX,
180 WNI_CFG_PS_ENABLE_BCN_FILTER_STADEF},
181 {WNI_CFG_PS_ENABLE_HEART_BEAT,
182 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
183 CFG_CTL_NTF_HAL,
184 WNI_CFG_PS_ENABLE_HEART_BEAT_STAMIN,
185 WNI_CFG_PS_ENABLE_HEART_BEAT_STAMAX,
186 WNI_CFG_PS_ENABLE_HEART_BEAT_STADEF},
187 {WNI_CFG_PS_ENABLE_RSSI_MONITOR,
188 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
189 CFG_CTL_NTF_HAL,
190 WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMIN,
191 WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMAX,
192 WNI_CFG_PS_ENABLE_RSSI_MONITOR_STADEF},
193 {WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT,
194 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
195 CFG_CTL_NTF_HAL,
196 WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMIN,
197 WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMAX,
198 WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STADEF},
199 {WNI_CFG_RF_SETTLING_TIME_CLK,
200 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
201 CFG_CTL_NTF_HAL,
202 WNI_CFG_RF_SETTLING_TIME_CLK_STAMIN,
203 WNI_CFG_RF_SETTLING_TIME_CLK_STAMAX,
204 WNI_CFG_RF_SETTLING_TIME_CLK_STADEF},
205 {WNI_CFG_SUPPORTED_RATES_11B,
206 CFG_CTL_VALID | CFG_CTL_RE,
207 0, 3, 1},
208 {WNI_CFG_SUPPORTED_RATES_11A, CFG_CTL_VALID | CFG_CTL_RE,
209 0, 255, 15},
210 {WNI_CFG_PHY_MODE,
211 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
212 CFG_CTL_RESTART,
213 WNI_CFG_PHY_MODE_STAMIN,
214 WNI_CFG_PHY_MODE_STAMAX,
215 WNI_CFG_PHY_MODE_STADEF},
216 {WNI_CFG_DOT11_MODE,
217 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_RESTART |
218 CFG_CTL_NTF_LIM,
219 WNI_CFG_DOT11_MODE_STAMIN,
220 WNI_CFG_DOT11_MODE_STAMAX,
221 WNI_CFG_DOT11_MODE_STADEF},
222 {WNI_CFG_OPERATIONAL_RATE_SET,
223 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
224 0, 1, 1},
225 {WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET,
226 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
227 0, 65535, 65534},
228 {WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET,
229 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
230 0, 0, 0},
231 {WNI_CFG_LISTEN_INTERVAL,
232 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
233 CFG_CTL_RESTART,
234 WNI_CFG_LISTEN_INTERVAL_STAMIN,
235 WNI_CFG_LISTEN_INTERVAL_STAMAX,
236 WNI_CFG_LISTEN_INTERVAL_STADEF},
237 {WNI_CFG_VALID_CHANNEL_LIST,
238 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART |
239 CFG_CTL_NTF_LIM,
240 0, 1, 1},
241 {WNI_CFG_CURRENT_CHANNEL,
242 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT,
243 WNI_CFG_CURRENT_CHANNEL_STAMIN,
244 WNI_CFG_CURRENT_CHANNEL_STAMAX,
245 WNI_CFG_CURRENT_CHANNEL_STADEF},
246 {WNI_CFG_DEFAULT_RATE_INDEX_5GHZ,
247 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
248 WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STAMIN,
249 WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STAMAX,
250 WNI_CFG_DEFAULT_RATE_INDEX_5GHZ_STADEF},
251 {WNI_CFG_DEFAULT_RATE_INDEX_24GHZ,
252 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
253 WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STAMIN,
254 WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STAMAX,
255 WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STADEF},
256 {WNI_CFG_RATE_ADAPTATION_TYPE,
257 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
258 CFG_CTL_NTF_SCH,
259 WNI_CFG_RATE_ADAPTATION_TYPE_STAMIN,
260 WNI_CFG_RATE_ADAPTATION_TYPE_STAMAX,
261 WNI_CFG_RATE_ADAPTATION_TYPE_STADEF},
262 {WNI_CFG_FIXED_RATE,
263 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
264 CFG_CTL_NTF_HAL,
265 WNI_CFG_FIXED_RATE_STAMIN,
266 WNI_CFG_FIXED_RATE_STAMAX,
267 WNI_CFG_FIXED_RATE_STADEF},
268 {WNI_CFG_FIXED_RATE_MULTICAST_24GHZ,
269 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
270 CFG_CTL_NTF_HAL,
271 WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STAMIN,
272 WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STAMAX,
273 WNI_CFG_FIXED_RATE_MULTICAST_24GHZ_STADEF},
274 {WNI_CFG_FIXED_RATE_MULTICAST_5GHZ,
275 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
276 CFG_CTL_NTF_HAL,
277 WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STAMIN,
278 WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STAMAX,
279 WNI_CFG_FIXED_RATE_MULTICAST_5GHZ_STADEF},
280 {WNI_CFG_RETRYRATE_POLICY,
281 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
282 CFG_CTL_NTF_HAL,
283 WNI_CFG_RETRYRATE_POLICY_STAMIN,
284 WNI_CFG_RETRYRATE_POLICY_STAMAX,
285 WNI_CFG_RETRYRATE_POLICY_STADEF},
286 {WNI_CFG_RETRYRATE_SECONDARY,
287 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
288 CFG_CTL_NTF_HAL,
289 WNI_CFG_RETRYRATE_SECONDARY_STAMIN,
290 WNI_CFG_RETRYRATE_SECONDARY_STAMAX,
291 WNI_CFG_RETRYRATE_SECONDARY_STADEF},
292 {WNI_CFG_RETRYRATE_TERTIARY,
293 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
294 CFG_CTL_NTF_HAL,
295 WNI_CFG_RETRYRATE_TERTIARY_STAMIN,
296 WNI_CFG_RETRYRATE_TERTIARY_STAMAX,
297 WNI_CFG_RETRYRATE_TERTIARY_STADEF},
298 {WNI_CFG_APSD_ENABLED,
299 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
300 WNI_CFG_APSD_ENABLED_STAMIN,
301 WNI_CFG_APSD_ENABLED_STAMAX,
302 WNI_CFG_APSD_ENABLED_STADEF},
303 {WNI_CFG_SHARED_KEY_AUTH_ENABLE,
304 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
305 WNI_CFG_SHARED_KEY_AUTH_ENABLE_STAMIN,
306 WNI_CFG_SHARED_KEY_AUTH_ENABLE_STAMAX,
307 WNI_CFG_SHARED_KEY_AUTH_ENABLE_STADEF},
308 {WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE,
309 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
310 WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STAMIN,
311 WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STAMAX,
312 WNI_CFG_OPEN_SYSTEM_AUTH_ENABLE_STADEF},
313 {WNI_CFG_AUTHENTICATION_TYPE,
314 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
315 CFG_CTL_RESTART,
316 WNI_CFG_AUTHENTICATION_TYPE_STAMIN,
317 WNI_CFG_AUTHENTICATION_TYPE_STAMAX,
318 WNI_CFG_AUTHENTICATION_TYPE_STADEF},
319 {WNI_CFG_CF_POLL_REQUEST,
320 CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_RESTART,
321 0, 255, 1},
322 {WNI_CFG_PRIVACY_ENABLED,
323 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
324 CFG_CTL_RESTART,
325 WNI_CFG_PRIVACY_ENABLED_STAMIN,
326 WNI_CFG_PRIVACY_ENABLED_STAMAX,
327 WNI_CFG_PRIVACY_ENABLED_STADEF},
328 {WNI_CFG_SHORT_PREAMBLE,
329 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
330 CFG_CTL_RESTART,
331 WNI_CFG_SHORT_PREAMBLE_STAMIN,
332 WNI_CFG_SHORT_PREAMBLE_STAMAX,
333 WNI_CFG_SHORT_PREAMBLE_STADEF},
334 {WNI_CFG_SHORT_SLOT_TIME,
335 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
336 WNI_CFG_SHORT_SLOT_TIME_STAMIN,
337 WNI_CFG_SHORT_SLOT_TIME_STAMAX,
338 WNI_CFG_SHORT_SLOT_TIME_STADEF},
339 {WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY,
340 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
341 CFG_CTL_RESTART,
342 WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STAMIN,
343 WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STAMAX,
344 WNI_CFG_ACCEPT_SHORT_SLOT_ASSOC_ONLY_STADEF},
345 {WNI_CFG_QOS_ENABLED,
346 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
347 CFG_CTL_RESTART,
348 WNI_CFG_QOS_ENABLED_STAMIN,
349 WNI_CFG_QOS_ENABLED_STAMAX,
350 WNI_CFG_QOS_ENABLED_STADEF},
351 {WNI_CFG_HCF_ENABLED,
352 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
353 CFG_CTL_RESTART,
354 WNI_CFG_HCF_ENABLED_STAMIN,
355 WNI_CFG_HCF_ENABLED_STAMAX,
356 WNI_CFG_HCF_ENABLED_STADEF},
357 {WNI_CFG_RSN_ENABLED,
358 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
359 CFG_CTL_RESTART,
360 WNI_CFG_RSN_ENABLED_STAMIN,
361 WNI_CFG_RSN_ENABLED_STAMAX,
362 WNI_CFG_RSN_ENABLED_STADEF},
363 {WNI_CFG_MAX_NUM_PRE_AUTH,
364 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
365 CFG_CTL_RESTART,
366 WNI_CFG_MAX_NUM_PRE_AUTH_STAMIN,
367 WNI_CFG_MAX_NUM_PRE_AUTH_STAMAX,
368 WNI_CFG_MAX_NUM_PRE_AUTH_STADEF},
369 {WNI_CFG_PREAUTH_CLNUP_TIMEOUT,
370 CFG_CTL_INT,
371 0, 255, 1},
372 {WNI_CFG_RELEASE_AID_TIMEOUT,
373 CFG_CTL_INT,
374 0, 255, 1},
375 {WNI_CFG_HEART_BEAT_THRESHOLD,
376 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
377 CFG_CTL_NTF_LIM,
378 WNI_CFG_HEART_BEAT_THRESHOLD_STAMIN,
379 WNI_CFG_HEART_BEAT_THRESHOLD_STAMAX,
380 WNI_CFG_HEART_BEAT_THRESHOLD_STADEF},
381 {WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT,
382 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE |
383 CFG_CTL_INT,
384 WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STAMIN,
385 WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STAMAX,
386 WNI_CFG_PROBE_AFTER_HB_FAIL_TIMEOUT_STADEF},
387 {WNI_CFG_MANUFACTURER_OUI,
388 CFG_CTL_VALID | CFG_CTL_RE,
389 0, 0, 0},
390 {WNI_CFG_MANUFACTURER_NAME,
391 CFG_CTL_VALID | CFG_CTL_RE,
392 0, 0, 0},
393 {WNI_CFG_MODEL_NUMBER,
394 CFG_CTL_VALID | CFG_CTL_RE,
395 0, 0, 0},
396 {WNI_CFG_MODEL_NAME,
397 CFG_CTL_VALID | CFG_CTL_RE,
398 0, 0, 0},
399 {WNI_CFG_MANUFACTURER_PRODUCT_NAME,
400 CFG_CTL_VALID | CFG_CTL_RE,
401 0, 0, 0},
402 {WNI_CFG_MANUFACTURER_PRODUCT_VERSION,
403 CFG_CTL_VALID | CFG_CTL_RE,
404 0, 0, 0},
405 {WNI_CFG_11D_ENABLED,
406 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
407 CFG_CTL_RESTART,
408 WNI_CFG_11D_ENABLED_STAMIN,
409 WNI_CFG_11D_ENABLED_STAMAX,
410 WNI_CFG_11D_ENABLED_STADEF},
411 {WNI_CFG_MAX_TX_POWER_2_4,
412 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
413 0, 0, 0},
414 {WNI_CFG_MAX_TX_POWER_5,
415 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
416 0, 0, 0},
417 {WNI_CFG_NETWORK_DENSITY,
418 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
419 CFG_CTL_NTF_HAL,
420 WNI_CFG_NETWORK_DENSITY_STAMIN,
421 WNI_CFG_NETWORK_DENSITY_STAMAX,
422 WNI_CFG_NETWORK_DENSITY_STADEF},
423 {WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM,
424 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
425 CFG_CTL_NTF_HAL,
426 WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STAMIN,
427 WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STAMAX,
428 WNI_CFG_ADAPTIVE_THRESHOLD_ALGORITHM_STADEF},
429 {WNI_CFG_CURRENT_TX_ANTENNA,
430 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
431 CFG_CTL_NTF_HAL,
432 WNI_CFG_CURRENT_TX_ANTENNA_STAMIN,
433 WNI_CFG_CURRENT_TX_ANTENNA_STAMAX,
434 WNI_CFG_CURRENT_TX_ANTENNA_STADEF},
435 {WNI_CFG_CURRENT_RX_ANTENNA,
436 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
437 CFG_CTL_NTF_HAL,
438 WNI_CFG_CURRENT_RX_ANTENNA_STAMIN,
439 WNI_CFG_CURRENT_RX_ANTENNA_STAMAX,
440 WNI_CFG_CURRENT_RX_ANTENNA_STADEF},
441 {WNI_CFG_CURRENT_TX_POWER_LEVEL,
442 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
443 WNI_CFG_CURRENT_TX_POWER_LEVEL_STAMIN,
444 WNI_CFG_CURRENT_TX_POWER_LEVEL_STAMAX,
445 WNI_CFG_CURRENT_TX_POWER_LEVEL_STADEF},
446 {WNI_CFG_NEW_BSS_FOUND_IND,
447 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
448 WNI_CFG_NEW_BSS_FOUND_IND_STAMIN,
449 WNI_CFG_NEW_BSS_FOUND_IND_STAMAX,
450 WNI_CFG_NEW_BSS_FOUND_IND_STADEF},
451 {WNI_CFG_PROPRIETARY_RATES_ENABLED,
452 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
453 CFG_CTL_RESTART,
454 WNI_CFG_PROPRIETARY_RATES_ENABLED_STAMIN,
455 WNI_CFG_PROPRIETARY_RATES_ENABLED_STAMAX,
456 WNI_CFG_PROPRIETARY_RATES_ENABLED_STADEF},
457 {WNI_CFG_AP_NODE_NAME,
458 CFG_CTL_RE,
459 0, 255, 1},
460 {WNI_CFG_COUNTRY_CODE,
461 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
462 0, 0, 0},
463 {WNI_CFG_11H_ENABLED,
464 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
465 CFG_CTL_RESTART,
466 WNI_CFG_11H_ENABLED_STAMIN,
467 WNI_CFG_11H_ENABLED_STAMAX,
468 WNI_CFG_11H_ENABLED_STADEF},
469 {WNI_CFG_WT_CNF_TIMEOUT,
470 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
471 WNI_CFG_WT_CNF_TIMEOUT_STAMIN,
472 WNI_CFG_WT_CNF_TIMEOUT_STAMAX,
473 WNI_CFG_WT_CNF_TIMEOUT_STADEF},
474 {WNI_CFG_PROXIMITY,
475 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
476 CFG_CTL_NTF_HAL,
477 WNI_CFG_PROXIMITY_STAMIN,
478 WNI_CFG_PROXIMITY_STAMAX,
479 WNI_CFG_PROXIMITY_STADEF},
480 {WNI_CFG_LOG_LEVEL,
481 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
482 WNI_CFG_LOG_LEVEL_STAMIN,
483 WNI_CFG_LOG_LEVEL_STAMAX,
484 WNI_CFG_LOG_LEVEL_STADEF},
485 {WNI_CFG_OLBC_DETECT_TIMEOUT,
486 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
487 WNI_CFG_OLBC_DETECT_TIMEOUT_STAMIN,
488 WNI_CFG_OLBC_DETECT_TIMEOUT_STAMAX,
489 WNI_CFG_OLBC_DETECT_TIMEOUT_STADEF},
490 {WNI_CFG_PROTECTION_ENABLED,
491 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
492 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
493 WNI_CFG_PROTECTION_ENABLED_STAMIN,
494 WNI_CFG_PROTECTION_ENABLED_STAMAX,
495 WNI_CFG_PROTECTION_ENABLED_STADEF},
496 {WNI_CFG_11G_PROTECTION_ALWAYS,
497 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
498 CFG_CTL_RESTART,
499 WNI_CFG_11G_PROTECTION_ALWAYS_STAMIN,
500 WNI_CFG_11G_PROTECTION_ALWAYS_STAMAX,
501 WNI_CFG_11G_PROTECTION_ALWAYS_STADEF},
502 {WNI_CFG_FORCE_POLICY_PROTECTION,
503 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
504 CFG_CTL_RESTART | CFG_CTL_NTF_HAL,
505 WNI_CFG_FORCE_POLICY_PROTECTION_STAMIN,
506 WNI_CFG_FORCE_POLICY_PROTECTION_STAMAX,
507 WNI_CFG_FORCE_POLICY_PROTECTION_STADEF},
508 {WNI_CFG_11G_SHORT_PREAMBLE_ENABLED,
509 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
510 CFG_CTL_RESTART,
511 WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STAMIN,
512 WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STAMAX,
513 WNI_CFG_11G_SHORT_PREAMBLE_ENABLED_STADEF},
514 {WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED,
515 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
516 CFG_CTL_RESTART,
517 WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STAMIN,
518 WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STAMAX,
519 WNI_CFG_11G_SHORT_SLOT_TIME_ENABLED_STADEF},
520 {WNI_CFG_11G_ONLY_POLICY,
521 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
522 WNI_CFG_11G_ONLY_POLICY_STAMIN,
523 WNI_CFG_11G_ONLY_POLICY_STAMAX,
524 WNI_CFG_11G_ONLY_POLICY_STADEF},
525 {WNI_CFG_PACKET_CLASSIFICATION,
526 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
527 CFG_CTL_NTF_HAL,
528 WNI_CFG_PACKET_CLASSIFICATION_STAMIN,
529 WNI_CFG_PACKET_CLASSIFICATION_STAMAX,
530 WNI_CFG_PACKET_CLASSIFICATION_STADEF},
531 {WNI_CFG_WME_ENABLED,
532 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
533 CFG_CTL_RESTART,
534 WNI_CFG_WME_ENABLED_STAMIN,
535 WNI_CFG_WME_ENABLED_STAMAX,
536 WNI_CFG_WME_ENABLED_STADEF},
537 {WNI_CFG_ADDTS_RSP_TIMEOUT,
538 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
539 WNI_CFG_ADDTS_RSP_TIMEOUT_STAMIN,
540 WNI_CFG_ADDTS_RSP_TIMEOUT_STAMAX,
541 WNI_CFG_ADDTS_RSP_TIMEOUT_STADEF},
542 {WNI_CFG_MAX_SP_LENGTH,
543 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
544 WNI_CFG_MAX_SP_LENGTH_STAMIN,
545 WNI_CFG_MAX_SP_LENGTH_STAMAX,
546 WNI_CFG_MAX_SP_LENGTH_STADEF},
547 {WNI_CFG_KEEP_ALIVE_STA_LIMIT_THRESHOLD,
548 CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
549 0, 255, 1},
550 {WNI_CFG_SEND_SINGLE_SSID_ALWAYS,
551 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
552 WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STAMIN,
553 WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STAMAX,
554 WNI_CFG_SEND_SINGLE_SSID_ALWAYS_STADEF},
555 {WNI_CFG_WSM_ENABLED,
556 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
557 WNI_CFG_WSM_ENABLED_STAMIN,
558 WNI_CFG_WSM_ENABLED_STAMAX,
559 WNI_CFG_WSM_ENABLED_STADEF},
560 {WNI_CFG_EDCA_PROFILE,
561 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
562 CFG_CTL_NTF_SCH,
563 WNI_CFG_EDCA_PROFILE_STAMIN,
564 WNI_CFG_EDCA_PROFILE_STAMAX,
565 WNI_CFG_EDCA_PROFILE_STADEF},
566 {WNI_CFG_EDCA_ANI_ACBK_LOCAL,
567 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
568 0, 0, 0},
569 {WNI_CFG_EDCA_ANI_ACBE_LOCAL,
570 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
571 0, 0, 0},
572 {WNI_CFG_EDCA_ANI_ACVI_LOCAL,
573 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
574 0, 0, 0},
575 {WNI_CFG_EDCA_ANI_ACVO_LOCAL,
576 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
577 0, 0, 0},
578 {WNI_CFG_EDCA_ANI_ACBK,
579 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
580 0, 0, 0},
581 {WNI_CFG_EDCA_ANI_ACBE,
582 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
583 0, 0, 0},
584 {WNI_CFG_EDCA_ANI_ACVI,
585 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
586 0, 0, 0},
587 {WNI_CFG_EDCA_ANI_ACVO,
588 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
589 0, 0, 0},
590 {WNI_CFG_EDCA_WME_ACBK_LOCAL,
591 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
592 0, 0, 0},
593 {WNI_CFG_EDCA_WME_ACBE_LOCAL,
594 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
595 0, 0, 0},
596 {WNI_CFG_EDCA_WME_ACVI_LOCAL,
597 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
598 0, 0, 0},
599 {WNI_CFG_EDCA_WME_ACVO_LOCAL,
600 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
601 0, 0, 0},
602 {WNI_CFG_EDCA_WME_ACBK,
603 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
604 0, 0, 0},
605 {WNI_CFG_EDCA_WME_ACBE,
606 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
607 0, 0, 0},
608 {WNI_CFG_EDCA_WME_ACVI,
609 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
610 0, 0, 0},
611 {WNI_CFG_EDCA_WME_ACVO,
612 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
613 0, 0, 0},
614 {WNI_CFG_RDET_FLAG,
615 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
616 WNI_CFG_RDET_FLAG_STAMIN,
617 WNI_CFG_RDET_FLAG_STAMAX,
618 WNI_CFG_RDET_FLAG_STADEF},
619 {WNI_CFG_RADAR_CHANNEL_LIST,
620 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART,
621 0, 0, 0},
622 {WNI_CFG_LOCAL_POWER_CONSTRAINT,
623 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
624 CFG_CTL_RESTART,
625 WNI_CFG_LOCAL_POWER_CONSTRAINT_STAMIN,
626 WNI_CFG_LOCAL_POWER_CONSTRAINT_STAMAX,
627 WNI_CFG_LOCAL_POWER_CONSTRAINT_STADEF},
628 {WNI_CFG_ADMIT_POLICY,
629 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
630 CFG_CTL_RESTART,
631 WNI_CFG_ADMIT_POLICY_STAMIN,
632 WNI_CFG_ADMIT_POLICY_STAMAX,
633 WNI_CFG_ADMIT_POLICY_STADEF},
634 {WNI_CFG_ADMIT_BWFACTOR,
635 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
636 CFG_CTL_RESTART,
637 WNI_CFG_ADMIT_BWFACTOR_STAMIN,
638 WNI_CFG_ADMIT_BWFACTOR_STAMAX,
639 WNI_CFG_ADMIT_BWFACTOR_STADEF},
640 {WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE,
641 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
642 CFG_CTL_RESTART,
643 WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STAMIN,
644 WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STAMAX,
645 WNI_CFG_MAX_CONSECUTIVE_BACKGROUND_SCAN_FAILURE_STADEF},
646 {WNI_CFG_CHANNEL_BONDING_MODE,
647 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
648 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
649 WNI_CFG_CHANNEL_BONDING_MODE_STAMIN,
650 WNI_CFG_CHANNEL_BONDING_MODE_STAMAX,
651 WNI_CFG_CHANNEL_BONDING_MODE_STADEF},
652 {WNI_CFG_CB_SECONDARY_CHANNEL_STATE,
653 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
654 WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STAMIN,
655 WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STAMAX,
656 WNI_CFG_CB_SECONDARY_CHANNEL_STATE_STADEF},
657 {WNI_CFG_DYNAMIC_THRESHOLD_ZERO,
658 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
659 CFG_CTL_NTF_HAL,
660 WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMIN,
661 WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMAX,
662 WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STADEF},
663 {WNI_CFG_DYNAMIC_THRESHOLD_ONE,
664 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
665 CFG_CTL_NTF_HAL,
666 WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMIN,
667 WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMAX,
668 WNI_CFG_DYNAMIC_THRESHOLD_ONE_STADEF},
669 {WNI_CFG_DYNAMIC_THRESHOLD_TWO,
670 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
671 CFG_CTL_NTF_HAL,
672 WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMIN,
673 WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMAX,
674 WNI_CFG_DYNAMIC_THRESHOLD_TWO_STADEF},
675 {WNI_CFG_TRIG_STA_BK_SCAN,
676 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
677 CFG_CTL_NTF_LIM,
678 WNI_CFG_TRIG_STA_BK_SCAN_STAMIN,
679 WNI_CFG_TRIG_STA_BK_SCAN_STAMAX,
680 WNI_CFG_TRIG_STA_BK_SCAN_STADEF},
681 {WNI_CFG_DYNAMIC_PROFILE_SWITCHING,
682 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
683 CFG_CTL_RESTART,
684 WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STAMIN,
685 WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STAMAX,
686 WNI_CFG_DYNAMIC_PROFILE_SWITCHING_STADEF},
687 {WNI_CFG_SCAN_CONTROL_LIST,
688 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RESTART |
689 CFG_CTL_NTF_LIM,
690 0, 0, 0},
691 {WNI_CFG_MIMO_ENABLED,
692 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
693 CFG_CTL_RELOAD,
694 WNI_CFG_MIMO_ENABLED_STAMIN,
695 WNI_CFG_MIMO_ENABLED_STAMAX,
696 WNI_CFG_MIMO_ENABLED_STADEF},
697 {WNI_CFG_BLOCK_ACK_ENABLED,
698 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
699 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
700 WNI_CFG_BLOCK_ACK_ENABLED_STAMIN,
701 WNI_CFG_BLOCK_ACK_ENABLED_STAMAX,
702 WNI_CFG_BLOCK_ACK_ENABLED_STADEF},
703 {WNI_CFG_HT_RX_STBC,
704 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
705 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
706 WNI_CFG_HT_RX_STBC_STAMIN,
707 WNI_CFG_HT_RX_STBC_STAMAX,
708 WNI_CFG_HT_RX_STBC_STADEF},
709 {WNI_CFG_HT_CAP_INFO,
710 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
711 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
712 WNI_CFG_HT_CAP_INFO_STAMIN,
713 WNI_CFG_HT_CAP_INFO_STAMAX,
714 WNI_CFG_HT_CAP_INFO_STADEF},
715 {WNI_CFG_HT_AMPDU_PARAMS,
716 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
717 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
718 WNI_CFG_HT_AMPDU_PARAMS_STAMIN,
719 WNI_CFG_HT_AMPDU_PARAMS_STAMAX,
720 WNI_CFG_HT_AMPDU_PARAMS_STADEF},
721 {WNI_CFG_SUPPORTED_MCS_SET,
722 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_SAVE |
723 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
724 0, 0, 0},
725 {WNI_CFG_EXT_HT_CAP_INFO,
726 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_SAVE |
727 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
728 WNI_CFG_EXT_HT_CAP_INFO_STAMIN,
729 WNI_CFG_EXT_HT_CAP_INFO_STAMAX,
730 WNI_CFG_EXT_HT_CAP_INFO_STADEF},
731 {WNI_CFG_TX_BF_CAP,
732 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT | CFG_CTL_RESTART |
733 CFG_CTL_NTF_LIM,
734 WNI_CFG_TX_BF_CAP_STAMIN,
735 4294967295u,
736 WNI_CFG_TX_BF_CAP_STADEF},
737 {WNI_CFG_AS_CAP,
738 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_SAVE |
739 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
740 WNI_CFG_AS_CAP_STAMIN,
741 WNI_CFG_AS_CAP_STAMAX,
742 WNI_CFG_AS_CAP_STADEF},
743 {WNI_CFG_HT_INFO_FIELD1,
744 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
745 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
746 WNI_CFG_HT_INFO_FIELD1_STAMIN,
747 WNI_CFG_HT_INFO_FIELD1_STAMAX,
748 WNI_CFG_HT_INFO_FIELD1_STADEF},
749 {WNI_CFG_HT_INFO_FIELD2,
750 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_SAVE |
751 CFG_CTL_NTF_LIM,
752 WNI_CFG_HT_INFO_FIELD2_STAMIN,
753 WNI_CFG_HT_INFO_FIELD2_STAMAX,
754 WNI_CFG_HT_INFO_FIELD2_STADEF},
755 {WNI_CFG_HT_INFO_FIELD3,
756 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_SAVE |
757 CFG_CTL_NTF_LIM,
758 WNI_CFG_HT_INFO_FIELD3_STAMIN,
759 WNI_CFG_HT_INFO_FIELD3_STAMAX,
760 WNI_CFG_HT_INFO_FIELD3_STADEF},
761 {WNI_CFG_BASIC_MCS_SET,
762 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_SAVE |
763 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
764 0, 0, 0},
765 {WNI_CFG_CURRENT_MCS_SET,
766 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_SAVE |
767 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
768 0, 0, 0},
769 {WNI_CFG_GREENFIELD_CAPABILITY,
770 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT | CFG_CTL_RESTART |
771 CFG_CTL_NTF_LIM,
772 WNI_CFG_GREENFIELD_CAPABILITY_STAMIN,
773 WNI_CFG_GREENFIELD_CAPABILITY_STAMAX,
774 WNI_CFG_GREENFIELD_CAPABILITY_STADEF},
775 {WNI_CFG_VHT_MAX_MPDU_LENGTH,
776 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
777 CFG_CTL_NTF_LIM,
778 WNI_CFG_VHT_MAX_MPDU_LENGTH_STAMIN,
779 WNI_CFG_VHT_MAX_MPDU_LENGTH_STAMAX,
780 WNI_CFG_VHT_MAX_MPDU_LENGTH_STADEF},
781 {WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET,
782 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
783 CFG_CTL_NTF_LIM,
784 WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STAMIN,
785 WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STAMAX,
786 WNI_CFG_VHT_SUPPORTED_CHAN_WIDTH_SET_STADEF},
787 {WNI_CFG_VHT_LDPC_CODING_CAP,
788 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
789 CFG_CTL_NTF_LIM,
790 WNI_CFG_VHT_LDPC_CODING_CAP_STAMIN,
791 WNI_CFG_VHT_LDPC_CODING_CAP_STAMAX,
792 WNI_CFG_VHT_LDPC_CODING_CAP_STADEF},
793 {WNI_CFG_VHT_SHORT_GI_80MHZ,
794 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
795 CFG_CTL_NTF_LIM,
796 WNI_CFG_VHT_SHORT_GI_80MHZ_STAMIN,
797 WNI_CFG_VHT_SHORT_GI_80MHZ_STAMAX,
798 WNI_CFG_VHT_SHORT_GI_80MHZ_STADEF},
799 {WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ,
800 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
801 CFG_CTL_NTF_LIM,
802 WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STAMIN,
803 WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STAMAX,
804 WNI_CFG_VHT_SHORT_GI_160_AND_80_PLUS_80MHZ_STADEF},
805 {WNI_CFG_VHT_TXSTBC,
806 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
807 CFG_CTL_NTF_LIM,
808 WNI_CFG_VHT_TXSTBC_STAMIN,
809 WNI_CFG_VHT_TXSTBC_STAMAX,
810 WNI_CFG_VHT_TXSTBC_STADEF},
811 {WNI_CFG_VHT_RXSTBC,
812 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
813 CFG_CTL_NTF_LIM,
814 WNI_CFG_VHT_RXSTBC_STAMIN,
815 WNI_CFG_VHT_RXSTBC_STAMAX,
816 WNI_CFG_VHT_RXSTBC_STADEF},
817 {WNI_CFG_VHT_SU_BEAMFORMER_CAP,
818 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
819 CFG_CTL_NTF_LIM,
820 WNI_CFG_VHT_SU_BEAMFORMER_CAP_STAMIN,
821 WNI_CFG_VHT_SU_BEAMFORMER_CAP_STAMAX,
822 WNI_CFG_VHT_SU_BEAMFORMER_CAP_STADEF},
823 {WNI_CFG_VHT_SU_BEAMFORMEE_CAP,
824 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
825 CFG_CTL_NTF_LIM,
826 WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STAMIN,
827 WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STAMAX,
828 WNI_CFG_VHT_SU_BEAMFORMEE_CAP_STADEF},
829 {WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED,
830 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
831 CFG_CTL_NTF_LIM,
832 WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STAMIN,
833 WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STAMAX,
834 WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED_STADEF},
835 {WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS,
836 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
837 CFG_CTL_NTF_LIM,
838 WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STAMIN,
839 WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STAMAX,
840 WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS_STADEF},
841 {WNI_CFG_VHT_MU_BEAMFORMER_CAP,
842 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
843 CFG_CTL_NTF_LIM,
844 WNI_CFG_VHT_MU_BEAMFORMER_CAP_STAMIN,
845 WNI_CFG_VHT_MU_BEAMFORMER_CAP_STAMAX,
846 WNI_CFG_VHT_MU_BEAMFORMER_CAP_STADEF},
847 {WNI_CFG_VHT_MU_BEAMFORMEE_CAP,
848 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
849 CFG_CTL_NTF_LIM,
850 WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STAMIN,
851 WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STAMAX,
852 WNI_CFG_VHT_MU_BEAMFORMEE_CAP_STADEF},
853 {WNI_CFG_VHT_TXOP_PS,
854 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
855 CFG_CTL_NTF_LIM,
856 WNI_CFG_VHT_TXOP_PS_STAMIN,
857 WNI_CFG_VHT_TXOP_PS_STAMAX,
858 WNI_CFG_VHT_TXOP_PS_STADEF},
859 {WNI_CFG_VHT_HTC_VHTC_CAP,
860 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
861 CFG_CTL_NTF_LIM,
862 WNI_CFG_VHT_HTC_VHTC_CAP_STAMIN,
863 WNI_CFG_VHT_HTC_VHTC_CAP_STAMAX,
864 WNI_CFG_VHT_HTC_VHTC_CAP_STADEF},
865 {WNI_CFG_VHT_AMPDU_LEN_EXPONENT,
866 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
867 CFG_CTL_NTF_LIM,
868 WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STAMIN,
869 WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STAMAX,
870 WNI_CFG_VHT_AMPDU_LEN_EXPONENT_STADEF},
871 {WNI_CFG_VHT_LINK_ADAPTATION_CAP,
872 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
873 CFG_CTL_NTF_LIM,
874 WNI_CFG_VHT_LINK_ADAPTATION_CAP_STAMIN,
875 WNI_CFG_VHT_LINK_ADAPTATION_CAP_STAMAX,
876 WNI_CFG_VHT_LINK_ADAPTATION_CAP_STADEF},
877 {WNI_CFG_VHT_RX_ANT_PATTERN,
878 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
879 CFG_CTL_NTF_LIM,
880 WNI_CFG_VHT_RX_ANT_PATTERN_STAMIN,
881 WNI_CFG_VHT_RX_ANT_PATTERN_STAMAX,
882 WNI_CFG_VHT_RX_ANT_PATTERN_STADEF},
883 {WNI_CFG_VHT_TX_ANT_PATTERN,
884 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
885 CFG_CTL_NTF_LIM,
886 WNI_CFG_VHT_TX_ANT_PATTERN_STAMIN,
887 WNI_CFG_VHT_TX_ANT_PATTERN_STAMAX,
888 WNI_CFG_VHT_TX_ANT_PATTERN_STADEF},
889 {WNI_CFG_VHT_RX_MCS_MAP,
890 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
891 CFG_CTL_NTF_LIM,
892 WNI_CFG_VHT_RX_MCS_MAP_STAMIN,
893 WNI_CFG_VHT_RX_MCS_MAP_STAMAX,
894 WNI_CFG_VHT_RX_MCS_MAP_STADEF},
895 {WNI_CFG_VHT_TX_MCS_MAP,
896 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
897 CFG_CTL_NTF_LIM,
898 WNI_CFG_VHT_TX_MCS_MAP_STAMIN,
899 WNI_CFG_VHT_TX_MCS_MAP_STAMAX,
900 WNI_CFG_VHT_TX_MCS_MAP_STADEF},
901 {WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE,
902 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
903 CFG_CTL_NTF_LIM,
904 WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STAMIN,
905 WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STAMAX,
906 WNI_CFG_VHT_RX_HIGHEST_SUPPORTED_DATA_RATE_STADEF},
907 {WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE,
908 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
909 CFG_CTL_NTF_LIM,
910 WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STAMIN,
911 WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STAMAX,
912 WNI_CFG_VHT_TX_HIGHEST_SUPPORTED_DATA_RATE_STADEF},
913 {WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1,
914 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
915 CFG_CTL_NTF_LIM,
916 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STAMIN,
917 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STAMAX,
918 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT1_STADEF},
919 {WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2,
920 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
921 CFG_CTL_NTF_LIM,
922 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STAMIN,
923 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STAMAX,
924 WNI_CFG_VHT_CHANNEL_CENTER_FREQ_SEGMENT2_STADEF},
925 {WNI_CFG_VHT_BASIC_MCS_SET,
926 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
927 CFG_CTL_NTF_LIM,
928 WNI_CFG_VHT_BASIC_MCS_SET_STAMIN,
929 WNI_CFG_VHT_BASIC_MCS_SET_STAMAX,
930 WNI_CFG_VHT_BASIC_MCS_SET_STADEF},
931 {WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT,
932 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
933 CFG_CTL_NTF_LIM,
934 WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STAMIN,
935 WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STAMAX,
936 WNI_CFG_VHT_MU_MIMO_CAP_STA_COUNT_STADEF},
937 {WNI_CFG_VHT_SS_UNDER_UTIL,
938 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
939 CFG_CTL_NTF_LIM,
940 WNI_CFG_VHT_SS_UNDER_UTIL_STAMIN,
941 WNI_CFG_VHT_SS_UNDER_UTIL_STAMAX,
942 WNI_CFG_VHT_SS_UNDER_UTIL_STADEF},
943 {WNI_CFG_VHT_40MHZ_UTILIZATION,
944 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
945 CFG_CTL_NTF_LIM,
946 WNI_CFG_VHT_40MHZ_UTILIZATION_STAMIN,
947 WNI_CFG_VHT_40MHZ_UTILIZATION_STAMAX,
948 WNI_CFG_VHT_40MHZ_UTILIZATION_STADEF},
949 {WNI_CFG_VHT_80MHZ_UTILIZATION,
950 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
951 CFG_CTL_NTF_LIM,
952 WNI_CFG_VHT_80MHZ_UTILIZATION_STAMIN,
953 WNI_CFG_VHT_80MHZ_UTILIZATION_STAMAX,
954 WNI_CFG_VHT_80MHZ_UTILIZATION_STADEF},
955 {WNI_CFG_VHT_160MHZ_UTILIZATION,
956 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
957 CFG_CTL_NTF_LIM,
958 WNI_CFG_VHT_80MHZ_UTILIZATION_STADEF,
959 WNI_CFG_VHT_160MHZ_UTILIZATION_STAMAX,
960 WNI_CFG_VHT_160MHZ_UTILIZATION_STADEF},
961 {WNI_CFG_MAX_AMSDU_LENGTH,
962 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
963 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
964 WNI_CFG_MAX_AMSDU_LENGTH_STAMIN,
965 WNI_CFG_MAX_AMSDU_LENGTH_STAMAX,
966 WNI_CFG_MAX_AMSDU_LENGTH_STADEF},
967 {WNI_CFG_MPDU_DENSITY,
968 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
969 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
970 WNI_CFG_MPDU_DENSITY_STAMIN,
971 WNI_CFG_MPDU_DENSITY_STAMAX,
972 WNI_CFG_MPDU_DENSITY_STADEF},
973 {WNI_CFG_MAX_RX_AMPDU_FACTOR,
974 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
975 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
976 WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMIN,
977 WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMAX,
978 WNI_CFG_MAX_RX_AMPDU_FACTOR_STAMAX},
979 {WNI_CFG_SHORT_GI_20MHZ,
980 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
981 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
982 WNI_CFG_SHORT_GI_20MHZ_STAMIN,
983 WNI_CFG_SHORT_GI_20MHZ_STAMAX,
984 WNI_CFG_SHORT_GI_20MHZ_STADEF},
985 {WNI_CFG_SHORT_GI_40MHZ,
986 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
987 CFG_CTL_RESTART | CFG_CTL_NTF_LIM,
988 WNI_CFG_SHORT_GI_40MHZ_STAMIN,
989 WNI_CFG_SHORT_GI_40MHZ_STAMAX,
990 WNI_CFG_SHORT_GI_40MHZ_STADEF},
991 {WNI_CFG_RIFS_ENABLED,
992 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
993 CFG_CTL_RESTART,
994 WNI_CFG_RIFS_ENABLED_STAMIN,
995 WNI_CFG_RIFS_ENABLED_STAMAX,
996 WNI_CFG_RIFS_ENABLED_STADEF},
997 {WNI_CFG_MAX_PS_POLL,
998 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
999 CFG_CTL_NTF_LIM,
1000 WNI_CFG_MAX_PS_POLL_STAMIN,
1001 WNI_CFG_MAX_PS_POLL_STAMAX,
1002 WNI_CFG_MAX_PS_POLL_STADEF},
1003 {WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE,
1004 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1005 CFG_CTL_NTF_LIM,
1006 WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STAMIN,
1007 WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STAMAX,
1008 WNI_CFG_NUM_BEACON_PER_RSSI_AVERAGE_STADEF},
1009 {WNI_CFG_RSSI_FILTER_PERIOD,
1010 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1011 CFG_CTL_NTF_LIM,
1012 WNI_CFG_RSSI_FILTER_PERIOD_STAMIN,
1013 WNI_CFG_RSSI_FILTER_PERIOD_STAMAX,
1014 WNI_CFG_RSSI_FILTER_PERIOD_STADEF},
1015 {WNI_CFG_MIN_RSSI_THRESHOLD,
1016 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1017 CFG_CTL_NTF_LIM,
1018 WNI_CFG_MIN_RSSI_THRESHOLD_STAMIN,
1019 WNI_CFG_MIN_RSSI_THRESHOLD_STAMAX,
1020 WNI_CFG_MIN_RSSI_THRESHOLD_STADEF},
1021 {WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE,
1022 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1023 CFG_CTL_NTF_LIM,
1024 WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STAMIN,
1025 WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STAMAX,
1026 WNI_CFG_BROADCAST_FRAME_FILTER_ENABLE_STADEF},
1027 {WNI_CFG_SCAN_IN_POWERSAVE,
1028 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1029 CFG_CTL_NTF_LIM,
1030 WNI_CFG_SCAN_IN_POWERSAVE_STAMIN,
1031 WNI_CFG_SCAN_IN_POWERSAVE_STAMAX,
1032 WNI_CFG_SCAN_IN_POWERSAVE_STADEF},
1033 {WNI_CFG_IGNORE_DTIM,
1034 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1035 WNI_CFG_IGNORE_DTIM_STAMIN,
1036 WNI_CFG_IGNORE_DTIM_STAMAX,
1037 WNI_CFG_IGNORE_DTIM_STADEF},
1038 {WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE,
1039 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1040 WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STAMIN,
1041 WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STAMAX,
1042 WNI_CFG_WOWLAN_UCAST_PATTERN_FILTER_ENABLE_STADEF},
1043 {WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE,
1044 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1045 WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STAMIN,
1046 WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STAMAX,
1047 WNI_CFG_WOWLAN_CHANNEL_SWITCH_ENABLE_STADEF},
1048 {WNI_CFG_WOWLAN_DEAUTH_ENABLE,
1049 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1050 WNI_CFG_WOWLAN_DEAUTH_ENABLE_STAMIN,
1051 WNI_CFG_WOWLAN_DEAUTH_ENABLE_STAMAX,
1052 WNI_CFG_WOWLAN_DEAUTH_ENABLE_STADEF},
1053 {WNI_CFG_WOWLAN_DISASSOC_ENABLE,
1054 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1055 WNI_CFG_WOWLAN_DISASSOC_ENABLE_STAMIN,
1056 WNI_CFG_WOWLAN_DISASSOC_ENABLE_STAMAX,
1057 WNI_CFG_WOWLAN_DISASSOC_ENABLE_STADEF},
1058 {WNI_CFG_WOWLAN_MAX_MISSED_BEACON,
1059 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1060 WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STAMIN,
1061 WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STAMAX,
1062 WNI_CFG_WOWLAN_MAX_MISSED_BEACON_STADEF},
1063 {WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD,
1064 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1065 WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STAMIN,
1066 WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STAMAX,
1067 WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STADEF},
1068 {WNI_CFG_BG_SCAN_CHANNEL_LIST,
1069 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_NTF_LIM,
1070 0, 0, 0},
1071 {WNI_CFG_MAX_MEDIUM_TIME,
1072 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1073 CFG_CTL_NTF_HAL,
1074 WNI_CFG_MAX_MEDIUM_TIME_STAMIN,
1075 WNI_CFG_MAX_MEDIUM_TIME_STAMAX,
1076 WNI_CFG_MAX_MEDIUM_TIME_STADEF},
1077 {WNI_CFG_MAX_MPDUS_IN_AMPDU,
1078 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1079 CFG_CTL_NTF_HAL,
1080 WNI_CFG_MAX_MPDUS_IN_AMPDU_STAMIN,
1081 WNI_CFG_MAX_MPDUS_IN_AMPDU_STAMAX,
1082 WNI_CFG_MAX_MPDUS_IN_AMPDU_STADEF},
1083 {WNI_CFG_IBSS_AUTO_BSSID,
1084 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1085 WNI_CFG_IBSS_AUTO_BSSID_STAMIN,
1086 WNI_CFG_IBSS_AUTO_BSSID_STAMAX,
1087 WNI_CFG_IBSS_AUTO_BSSID_STADEF},
1088 {WNI_CFG_PROBE_REQ_ADDNIE_FLAG,
1089 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1090 WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STAMIN,
1091 WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STAMAX,
1092 WNI_CFG_PROBE_REQ_ADDNIE_FLAG_STADEF},
1093 {WNI_CFG_PROBE_REQ_ADDNIE_DATA,
1094 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1095 0, 0, 0},
1096 {WNI_CFG_PROBE_RSP_ADDNIE_FLAG,
1097 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1098 WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STAMIN,
1099 WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STAMAX,
1100 WNI_CFG_PROBE_RSP_ADDNIE_FLAG_STADEF},
1101 {WNI_CFG_PROBE_RSP_ADDNIE_DATA1,
1102 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1103 0, 0, 0},
1104 {WNI_CFG_PROBE_RSP_ADDNIE_DATA2,
1105 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1106 0, 0, 0},
1107 {WNI_CFG_PROBE_RSP_ADDNIE_DATA3,
1108 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1109 0, 0, 0},
1110 {WNI_CFG_ASSOC_RSP_ADDNIE_FLAG,
1111 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1112 WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STAMIN,
1113 WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STAMAX,
1114 WNI_CFG_ASSOC_RSP_ADDNIE_FLAG_STADEF},
1115 {WNI_CFG_ASSOC_RSP_ADDNIE_DATA,
1116 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1117 0, 0, 0},
1118 {WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG,
1119 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1120 WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STAMIN,
1121 WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STAMAX,
1122 WNI_CFG_PROBE_REQ_ADDNP2PIE_FLAG_STADEF},
1123 {WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA,
1124 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
1125 0, 0, 0},
1126 {WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG,
1127 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1128 CFG_CTL_NTF_LIM,
1129 WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STAMIN,
1130 WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STAMAX,
1131 WNI_CFG_PROBE_RSP_BCN_ADDNIE_FLAG_STADEF},
1132 {WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA,
1133 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_NTF_LIM,
1134 0, 0, 0},
1135 {WNI_CFG_WPS_ENABLE,
1136 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1137 CFG_CTL_NTF_LIM,
1138 WNI_CFG_WPS_ENABLE_STAMIN,
1139 WNI_CFG_WPS_ENABLE_STAMAX,
1140 WNI_CFG_WPS_ENABLE_STADEF},
1141 {WNI_CFG_WPS_STATE,
1142 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1143 CFG_CTL_NTF_LIM,
1144 WNI_CFG_WPS_STATE_STAMIN,
1145 WNI_CFG_WPS_STATE_STAMAX,
1146 WNI_CFG_WPS_STATE_STADEF},
1147 {WNI_CFG_WPS_PROBE_REQ_FLAG,
1148 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1149 CFG_CTL_NTF_LIM,
1150 WNI_CFG_WPS_PROBE_REQ_FLAG_STAMIN,
1151 WNI_CFG_WPS_PROBE_REQ_FLAG_STAMAX,
1152 WNI_CFG_WPS_PROBE_REQ_FLAG_STADEF},
1153 {WNI_CFG_WPS_VERSION,
1154 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1155 CFG_CTL_NTF_LIM,
1156 WNI_CFG_WPS_VERSION_STAMIN,
1157 WNI_CFG_WPS_VERSION_STAMAX,
1158 WNI_CFG_WPS_VERSION_STADEF},
1159 {WNI_CFG_WPS_REQUEST_TYPE,
1160 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1161 CFG_CTL_NTF_LIM,
1162 WNI_CFG_WPS_REQUEST_TYPE_STAMIN,
1163 WNI_CFG_WPS_REQUEST_TYPE_STAMAX,
1164 WNI_CFG_WPS_REQUEST_TYPE_STADEF},
1165 {WNI_CFG_WPS_CFG_METHOD,
1166 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1167 CFG_CTL_NTF_LIM,
1168 WNI_CFG_WPS_CFG_METHOD_STAMIN,
1169 4294967295u,
1170 WNI_CFG_WPS_CFG_METHOD_STADEF},
1171 {WNI_CFG_WPS_UUID,
1172 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_NTF_LIM,
1173 0, 0, 0},
1174 {WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY,
1175 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1176 CFG_CTL_NTF_LIM,
1177 WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STAMIN,
1178 WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STAMAX,
1179 WNI_CFG_WPS_PRIMARY_DEVICE_CATEGORY_STADEF},
1180 {WNI_CFG_WPS_PIMARY_DEVICE_OUI,
1181 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1182 CFG_CTL_NTF_LIM,
1183 WNI_CFG_WPS_PIMARY_DEVICE_OUI_STAMIN,
1184 4294967295u,
1185 WNI_CFG_WPS_PIMARY_DEVICE_OUI_STADEF},
1186 {WNI_CFG_WPS_DEVICE_SUB_CATEGORY,
1187 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1188 CFG_CTL_NTF_LIM,
1189 WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STAMIN,
1190 WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STAMAX,
1191 WNI_CFG_WPS_DEVICE_SUB_CATEGORY_STADEF},
1192 {WNI_CFG_WPS_ASSOCIATION_STATE,
1193 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1194 CFG_CTL_NTF_LIM,
1195 WNI_CFG_WPS_ASSOCIATION_STATE_STAMIN,
1196 WNI_CFG_WPS_ASSOCIATION_STATE_STAMAX,
1197 WNI_CFG_WPS_ASSOCIATION_STATE_STADEF},
1198 {WNI_CFG_WPS_CONFIGURATION_ERROR,
1199 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1200 CFG_CTL_NTF_LIM,
1201 WNI_CFG_WPS_CONFIGURATION_ERROR_STAMIN,
1202 WNI_CFG_WPS_CONFIGURATION_ERROR_STAMAX,
1203 WNI_CFG_WPS_CONFIGURATION_ERROR_STADEF},
1204 {WNI_CFG_WPS_DEVICE_PASSWORD_ID,
1205 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1206 CFG_CTL_NTF_LIM,
1207 WNI_CFG_WPS_DEVICE_PASSWORD_ID_STAMIN,
1208 4294967295u,
1209 WNI_CFG_WPS_DEVICE_PASSWORD_ID_STADEF},
1210 {WNI_CFG_WPS_ASSOC_METHOD,
1211 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1212 CFG_CTL_NTF_LIM,
1213 WNI_CFG_WPS_ASSOC_METHOD_STAMIN,
1214 WNI_CFG_WPS_ASSOC_METHOD_STAMAX,
1215 WNI_CFG_WPS_ASSOC_METHOD_STADEF},
1216 {WNI_CFG_LOW_GAIN_OVERRIDE,
1217 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1218 CFG_CTL_NTF_HAL,
1219 WNI_CFG_LOW_GAIN_OVERRIDE_STAMIN,
1220 WNI_CFG_LOW_GAIN_OVERRIDE_STAMAX,
1221 WNI_CFG_LOW_GAIN_OVERRIDE_STADEF},
1222 {WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE,
1223 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1224 CFG_CTL_NTF_HAL,
1225 WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STAMIN,
1226 WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STAMAX,
1227 WNI_CFG_ENABLE_PHY_AGC_LISTEN_MODE_STADEF},
1228 {WNI_CFG_RPE_POLLING_THRESHOLD,
1229 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1230 CFG_CTL_NTF_HAL,
1231 WNI_CFG_RPE_POLLING_THRESHOLD_STAMIN,
1232 WNI_CFG_RPE_POLLING_THRESHOLD_STAMAX,
1233 WNI_CFG_RPE_POLLING_THRESHOLD_STADEF},
1234 {WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG,
1235 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1236 CFG_CTL_NTF_HAL,
1237 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STAMIN,
1238 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STAMAX,
1239 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG_STADEF},
1240 {WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG,
1241 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1242 CFG_CTL_NTF_HAL,
1243 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STAMIN,
1244 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STAMAX,
1245 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG_STADEF},
1246 {WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG,
1247 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1248 CFG_CTL_NTF_HAL,
1249 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STAMIN,
1250 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STAMAX,
1251 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG_STADEF},
1252 {WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG,
1253 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1254 CFG_CTL_NTF_HAL,
1255 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STAMIN,
1256 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STAMAX,
1257 WNI_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG_STADEF},
1258 {WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS,
1259 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1260 CFG_CTL_NTF_HAL,
1261 WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STAMIN,
1262 WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STAMAX,
1263 WNI_CFG_NO_OF_ONCHIP_REORDER_SESSIONS_STADEF},
1264 {WNI_CFG_SINGLE_TID_RC,
1265 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1266 WNI_CFG_SINGLE_TID_RC_STAMIN,
1267 WNI_CFG_SINGLE_TID_RC_STAMAX,
1268 WNI_CFG_SINGLE_TID_RC_STADEF},
1269 {WNI_CFG_RRM_ENABLED,
1270 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1271 WNI_CFG_RRM_ENABLED_STAMIN,
1272 WNI_CFG_RRM_ENABLED_STAMAX,
1273 WNI_CFG_RRM_ENABLED_STADEF},
1274 {WNI_CFG_RRM_OPERATING_CHAN_MAX,
1275 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1276 WNI_CFG_RRM_OPERATING_CHAN_MAX_STAMIN,
1277 WNI_CFG_RRM_OPERATING_CHAN_MAX_STAMAX,
1278 WNI_CFG_RRM_OPERATING_CHAN_MAX_STADEF},
1279 {WNI_CFG_RRM_NON_OPERATING_CHAN_MAX,
1280 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1281 WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STAMIN,
1282 WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STAMAX,
1283 WNI_CFG_RRM_NON_OPERATING_CHAN_MAX_STADEF},
1284 {WNI_CFG_TX_PWR_CTRL_ENABLE,
1285 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1286 WNI_CFG_TX_PWR_CTRL_ENABLE_STAMIN,
1287 WNI_CFG_TX_PWR_CTRL_ENABLE_STAMAX,
1288 WNI_CFG_TX_PWR_CTRL_ENABLE_STADEF},
1289 {WNI_CFG_MCAST_BCAST_FILTER_SETTING,
1290 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1291 CFG_CTL_NTF_HAL,
1292 WNI_CFG_MCAST_BCAST_FILTER_SETTING_STAMIN,
1293 WNI_CFG_MCAST_BCAST_FILTER_SETTING_STAMAX,
1294 WNI_CFG_MCAST_BCAST_FILTER_SETTING_STADEF},
1295 {WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK,
1296 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1297 CFG_CTL_NTF_HAL,
1298 WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STAMIN,
1299 WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STAMAX,
1300 WNI_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK_STADEF},
1301 {WNI_CFG_DYNAMIC_PS_POLL_VALUE,
1302 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1303 CFG_CTL_NTF_HAL,
1304 WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMIN,
1305 WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMAX,
1306 WNI_CFG_DYNAMIC_PS_POLL_VALUE_STADEF},
1307 {WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT,
1308 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1309 CFG_CTL_NTF_HAL,
1310 WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMIN,
1311 WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMAX,
1312 WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STADEF},
1313 {WNI_CFG_TELE_BCN_WAKEUP_EN,
1314 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1315 CFG_CTL_NTF_HAL,
1316 WNI_CFG_TELE_BCN_WAKEUP_EN_STAMIN,
1317 WNI_CFG_TELE_BCN_WAKEUP_EN_STAMAX,
1318 WNI_CFG_TELE_BCN_WAKEUP_EN_STADEF},
1319 {WNI_CFG_TELE_BCN_TRANS_LI,
1320 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1321 CFG_CTL_NTF_HAL,
1322 WNI_CFG_TELE_BCN_TRANS_LI_STAMIN,
1323 WNI_CFG_TELE_BCN_TRANS_LI_STAMAX,
1324 WNI_CFG_TELE_BCN_TRANS_LI_STADEF},
1325 {WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS,
1326 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1327 CFG_CTL_NTF_HAL,
1328 WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMIN,
1329 WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMAX,
1330 WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STADEF},
1331 {WNI_CFG_TELE_BCN_MAX_LI,
1332 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1333 CFG_CTL_NTF_HAL,
1334 WNI_CFG_TELE_BCN_MAX_LI_STAMIN,
1335 WNI_CFG_TELE_BCN_MAX_LI_STAMAX,
1336 WNI_CFG_TELE_BCN_MAX_LI_STADEF},
1337 {WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS,
1338 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1339 CFG_CTL_NTF_HAL,
1340 WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMIN,
1341 WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMAX,
1342 WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STADEF},
1343 {WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS,
1344 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1345 CFG_CTL_NTF_HAL,
1346 WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STAMIN,
1347 WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STAMAX,
1348 WNI_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS_STADEF},
1349 {WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD,
1350 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1351 CFG_CTL_NTF_HAL,
1352 WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMIN,
1353 WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMAX,
1354 WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STADEF},
1355 {WNI_CFG_ASSOC_STA_LIMIT,
1356 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1357 CFG_CTL_NTF_LIM,
1358 WNI_CFG_ASSOC_STA_LIMIT_STAMIN,
1359 WNI_CFG_ASSOC_STA_LIMIT_STAMAX,
1360 WNI_CFG_ASSOC_STA_LIMIT_STADEF},
1361 {WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL,
1362 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1363 WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STAMIN,
1364 WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STAMAX,
1365 WNI_CFG_SAP_CHANNEL_SELECT_START_CHANNEL_STADEF},
1366 {WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL,
1367 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1368 WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STAMIN,
1369 WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STAMAX,
1370 WNI_CFG_SAP_CHANNEL_SELECT_END_CHANNEL_STADEF},
1371 {WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND,
1372 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1373 WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STAMIN,
1374 WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STAMAX,
1375 WNI_CFG_SAP_CHANNEL_SELECT_OPERATING_BAND_STADEF},
1376 {WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD,
1377 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1378 WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STAMIN,
1379 WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STAMAX,
1380 WNI_CFG_AP_DATA_AVAIL_POLL_PERIOD_STADEF},
1381 {WNI_CFG_ENABLE_CLOSE_LOOP,
1382 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1383 WNI_CFG_ENABLE_CLOSE_LOOP_STAMIN,
1384 WNI_CFG_ENABLE_CLOSE_LOOP_STAMAX,
1385 WNI_CFG_ENABLE_CLOSE_LOOP_STADEF},
1386 {WNI_CFG_ENABLE_LTE_COEX,
1387 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1388 WNI_CFG_ENABLE_LTE_COEX_STAMIN,
1389 WNI_CFG_ENABLE_LTE_COEX_STAMAX,
1390 WNI_CFG_ENABLE_LTE_COEX_STADEF},
1391 {WNI_CFG_AP_KEEP_ALIVE_TIMEOUT,
1392 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1393 CFG_CTL_NTF_HAL,
1394 WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMIN,
1395 WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMAX,
1396 WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STADEF},
1397 {WNI_CFG_GO_KEEP_ALIVE_TIMEOUT,
1398 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1399 CFG_CTL_NTF_HAL,
1400 WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMIN,
1401 WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMAX,
1402 WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STADEF},
1403 {WNI_CFG_ENABLE_MC_ADDR_LIST,
1404 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1405 CFG_CTL_NTF_HAL,
1406 WNI_CFG_ENABLE_MC_ADDR_LIST_STAMIN,
1407 WNI_CFG_ENABLE_MC_ADDR_LIST_STAMAX,
1408 WNI_CFG_ENABLE_MC_ADDR_LIST_STADEF},
1409 {WNI_CFG_ENABLE_UC_FILTER,
1410 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1411 CFG_CTL_NTF_HAL,
1412 WNI_CFG_ENABLE_UC_FILTER_STAMIN,
1413 WNI_CFG_ENABLE_UC_FILTER_STAMAX,
1414 WNI_CFG_ENABLE_UC_FILTER_STADEF},
1415 {WNI_CFG_ENABLE_LPWR_IMG_TRANSITION,
1416 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1417 WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STAMIN,
1418 WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STAMAX,
1419 WNI_CFG_ENABLE_LPWR_IMG_TRANSITION_STADEF},
1420 {WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED,
1421 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1422 WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STAMIN,
1423 WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STAMAX,
1424 WNI_CFG_ENABLE_MCC_ADAPTIVE_SCHED_STADEF},
1425 {WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP,
1426 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1427 WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STAMIN,
1428 WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STAMAX,
1429 WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STADEF},
1430 {WNI_CFG_AP_LINK_MONITOR_TIMEOUT,
1431 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1432 CFG_CTL_NTF_HAL,
1433 WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMIN,
1434 WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMAX,
1435 WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STADEF},
1436 {WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK,
1437 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1438 CFG_CTL_NTF_LIM,
1439 WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STAMIN,
1440 WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STAMAX,
1441 WNI_CFG_TDLS_QOS_WMM_UAPSD_MASK_STADEF},
1442 {WNI_CFG_TDLS_BUF_STA_ENABLED,
1443 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1444 CFG_CTL_NTF_LIM,
1445 WNI_CFG_TDLS_BUF_STA_ENABLED_STAMIN,
1446 WNI_CFG_TDLS_BUF_STA_ENABLED_STAMAX,
1447 WNI_CFG_TDLS_BUF_STA_ENABLED_STADEF},
1448 {WNI_CFG_TDLS_PUAPSD_INACT_TIME,
1449 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1450 CFG_CTL_NTF_LIM,
1451 WNI_CFG_TDLS_PUAPSD_INACT_TIME_STAMIN,
1452 WNI_CFG_TDLS_PUAPSD_INACT_TIME_STAMAX,
1453 WNI_CFG_TDLS_PUAPSD_INACT_TIME_STADEF},
1454 {WNI_CFG_TDLS_RX_FRAME_THRESHOLD,
1455 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1456 CFG_CTL_NTF_LIM,
1457 WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STAMIN,
1458 WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STAMAX,
1459 WNI_CFG_TDLS_RX_FRAME_THRESHOLD_STADEF},
1460 {WNI_CFG_PMF_SA_QUERY_MAX_RETRIES,
1461 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1462 CFG_CTL_RESTART,
1463 WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STAMIN,
1464 WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STAMAX,
1465 WNI_CFG_PMF_SA_QUERY_MAX_RETRIES_STADEF},
1466 {WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL,
1467 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1468 CFG_CTL_RESTART,
1469 WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STAMIN,
1470 WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STAMAX,
1471 WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STADEF},
1472 {WNI_CFG_ENABLE_ADAPT_RX_DRAIN,
1473 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1474 CFG_CTL_NTF_HAL,
1475 WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMIN,
1476 WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMAX,
1477 WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STADEF},
1478 {WNI_CFG_FLEX_CONNECT_POWER_FACTOR,
1479 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1480 WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STAMIN,
1481 WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STAMAX,
1482 WNI_CFG_FLEX_CONNECT_POWER_FACTOR_STADEF},
1483 {WNI_CFG_ANTENNA_DIVESITY,
1484 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1485 CFG_CTL_NTF_HAL,
1486 WNI_CFG_ANTENNA_DIVESITY_STAMIN,
1487 WNI_CFG_ANTENNA_DIVESITY_STAMAX,
1488 WNI_CFG_ANTENNA_DIVESITY_STADEF},
1489 {WNI_CFG_GO_LINK_MONITOR_TIMEOUT,
1490 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1491 CFG_CTL_NTF_HAL,
1492 WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMIN,
1493 WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMAX,
1494 WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STADEF},
1495 {WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY,
1496 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1497 CFG_CTL_NTF_HAL,
1498 WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STAMIN,
1499 WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STAMAX,
1500 WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STADEF},
1501 {WNI_CFG_CURRENT_RSSI,
1502 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1503 WNI_CFG_CURRENT_RSSI_STAMIN,
1504 WNI_CFG_CURRENT_RSSI_STAMAX,
1505 WNI_CFG_CURRENT_RSSI_STADEF},
1506 {WNI_CFG_RTT3_ENABLE,
1507 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1508 WNI_CFG_RTT3_ENABLE_STAMIN,
1509 WNI_CFG_RTT3_ENABLE_STAMAX,
1510 WNI_CFG_RTT3_ENABLE_STADEF},
1511 {WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL,
1512 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1513 WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STAMIN,
1514 WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STAMAX,
1515 WNI_CFG_DEBUG_P2P_REMAIN_ON_CHANNEL_STADEF},
1516 {WNI_CFG_TDLS_OFF_CHANNEL_ENABLED,
1517 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1518 CFG_CTL_NTF_LIM,
1519 WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STAMIN,
1520 WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STAMAX,
1521 WNI_CFG_TDLS_OFF_CHANNEL_ENABLED_STADEF},
1522 {WNI_CFG_IBSS_ATIM_WIN_SIZE,
1523 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1524 WNI_CFG_IBSS_ATIM_WIN_SIZE_STAMIN,
1525 WNI_CFG_IBSS_ATIM_WIN_SIZE_STAMAX,
1526 WNI_CFG_IBSS_ATIM_WIN_SIZE_STADEF},
1527 {WNI_CFG_DFS_MASTER_ENABLED,
1528 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1529 WNI_CFG_DFS_MASTER_ENABLED_STAMIN,
1530 WNI_CFG_DFS_MASTER_ENABLED_STAMAX,
1531 WNI_CFG_DFS_MASTER_ENABLED_STADEF},
1532 {WNI_CFG_VHT_ENABLE_TXBF_20MHZ,
1533 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
1534 WNI_CFG_VHT_ENABLE_TXBF_20MHZ_STAMIN,
1535 WNI_CFG_VHT_ENABLE_TXBF_20MHZ_STAMAX,
1536 WNI_CFG_VHT_ENABLE_TXBF_20MHZ_STADEF},
1537 {WNI_CFG_TDLS_WMM_MODE_ENABLED,
1538 CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
1539 CFG_CTL_NTF_LIM,
1540 WNI_CFG_TDLS_WMM_MODE_ENABLED_STAMIN,
1541 WNI_CFG_TDLS_WMM_MODE_ENABLED_STAMAX,
1542 WNI_CFG_TDLS_WMM_MODE_ENABLED_STADEF}
1543};
1544
1545
1546cfgstatic_string cfg_static_string[CFG_MAX_STATIC_STRING] = {
1547
1548 {WNI_CFG_STA_ID,
1549 WNI_CFG_STA_ID_LEN,
1550 6,
1551 {0x22, 0x22, 0x44, 0x44, 0x33, 0x33} },
1552 {WNI_CFG_SSID,
1553 WNI_CFG_SSID_LEN,
1554 10,
1555 {1, 2, 3, 4, 5, 6, 7, 8, 9, 0} },
1556 {WNI_CFG_WEP_DEFAULT_KEY_1,
1557 WNI_CFG_WEP_DEFAULT_KEY_1_LEN,
1558 0,
1559 {0} },
1560 {WNI_CFG_WEP_DEFAULT_KEY_2,
1561 WNI_CFG_WEP_DEFAULT_KEY_2_LEN,
1562 0,
1563 {0} },
1564 {WNI_CFG_WEP_DEFAULT_KEY_3,
1565 WNI_CFG_WEP_DEFAULT_KEY_3_LEN,
1566 0,
1567 {0} },
1568 {WNI_CFG_WEP_DEFAULT_KEY_4,
1569 WNI_CFG_WEP_DEFAULT_KEY_4_LEN,
1570 0,
1571 {0} },
1572 {WNI_CFG_SUPPORTED_RATES_11B,
1573 WNI_CFG_SUPPORTED_RATES_11B_LEN,
1574 4,
1575 {2, 4, 11, 22} },
1576 {WNI_CFG_SUPPORTED_RATES_11A,
1577 WNI_CFG_SUPPORTED_RATES_11A_LEN,
1578 8,
1579 {12, 18, 24, 36, 48, 72, 96, 108} },
1580 {WNI_CFG_OPERATIONAL_RATE_SET,
1581 WNI_CFG_OPERATIONAL_RATE_SET_LEN,
1582 0,
1583 {0} },
1584 {WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET,
1585 WNI_CFG_EXTENDED_OPERATIONAL_RATE_SET_LEN,
1586 0,
1587 {0} },
1588 {WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET,
1589 WNI_CFG_PROPRIETARY_OPERATIONAL_RATE_SET_LEN,
1590 4,
1591 {1, 3, 5, 7} },
1592 {WNI_CFG_VALID_CHANNEL_LIST,
1593 WNI_CFG_VALID_CHANNEL_LIST_LEN,
1594 55,
1595 {36, 40, 44, 48, 52, 56, 60, 64, 1, 6, 11, 34, 38, 42, 46, 2, 3, 4,
1596 5, 7, 8, 9, 10, 12, 13, 14, 100, 104, 108, 112, 116, 120, 124, 128,
1597 132, 136, 140, 149, 151, 153, 155, 157, 159, 161, 50, 54, 58, 62, 240,
1598 242, 244, 246, 248, 250, 252} },
1599
1600 {WNI_CFG_MANUFACTURER_OUI,
1601 WNI_CFG_MANUFACTURER_OUI_LEN,
1602 3,
1603 {0x0, 0xa, 0xf5} },
1604 {WNI_CFG_MANUFACTURER_NAME,
1605 WNI_CFG_MANUFACTURER_NAME_LEN,
1606 8,
1607 {0x51, 0x75, 0x61, 0x6c, 0x63, 0x6f, 0x6d, 0x6d} },
1608 {WNI_CFG_MODEL_NUMBER,
1609 WNI_CFG_MODEL_NUMBER_LEN,
1610 6,
1611 {0x4d, 0x4e, 0x31, 0x32, 0x33, 0x34} },
1612 {WNI_CFG_MODEL_NAME,
1613 WNI_CFG_MODEL_NAME_LEN,
1614 7,
1615 {0x57, 0x46, 0x52, 0x34, 0x30, 0x33, 0x31} },
1616 {WNI_CFG_MANUFACTURER_PRODUCT_NAME,
1617 WNI_CFG_MANUFACTURER_PRODUCT_NAME_LEN,
1618 6,
1619 {0x31, 0x31, 0x6e, 0x2d, 0x41, 0x50} },
1620 {WNI_CFG_MANUFACTURER_PRODUCT_VERSION,
1621 WNI_CFG_MANUFACTURER_PRODUCT_VERSION_LEN,
1622 6,
1623 {0x53, 0x4e, 0x31, 0x32, 0x33, 0x34} },
1624 {WNI_CFG_MAX_TX_POWER_2_4,
1625 WNI_CFG_MAX_TX_POWER_2_4_LEN,
1626 3,
1627 {0x1, 0xe, 0x14} },
1628 {WNI_CFG_MAX_TX_POWER_5,
1629 WNI_CFG_MAX_TX_POWER_5_LEN,
1630 3,
1631 {0x24, 0x7e, 0x14} },
1632 {WNI_CFG_AP_NODE_NAME,
1633 WNI_CFG_AP_NODE_NAME_LEN,
1634 0,
1635 {0} },
1636 {WNI_CFG_COUNTRY_CODE,
1637 WNI_CFG_COUNTRY_CODE_LEN,
1638 0,
1639 {0} },
1640 {WNI_CFG_EDCA_ANI_ACBK_LOCAL,
1641 WNI_CFG_EDCA_ANI_ACBK_LOCAL_LEN,
1642 17,
1643 {0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff, 0x0, 0x0,
1644 0xf, 0x3, 0xff, 0x0} },
1645 {WNI_CFG_EDCA_ANI_ACBE_LOCAL,
1646 WNI_CFG_EDCA_ANI_ACBE_LOCAL_LEN,
1647 17,
1648 {0x0, 0x2, 0x0, 0xf, 0x3, 0xff, 0x64, 0x0, 0x1f, 0x3, 0xff, 0x64, 0x0,
1649 0xf, 0x3, 0xff, 0x64} },
1650 {WNI_CFG_EDCA_ANI_ACVI_LOCAL,
1651 WNI_CFG_EDCA_ANI_ACVI_LOCAL_LEN,
1652 17,
1653 {0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0xc8, 0x0, 0xf, 0x0, 0x1f, 0xbc, 0x0,
1654 0x7, 0x0, 0xf, 0xc8} },
1655 {WNI_CFG_EDCA_ANI_ACVO_LOCAL,
1656 WNI_CFG_EDCA_ANI_ACVO_LOCAL_LEN,
1657 17,
1658 {0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x64, 0x0, 0x7, 0x0, 0xf, 0x66, 0x0,
1659 0x3, 0x0, 0x7, 0x64} },
1660 {WNI_CFG_EDCA_ANI_ACBK,
1661 WNI_CFG_EDCA_ANI_ACBK_LEN,
1662 17,
1663 {0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff, 0x0, 0x0,
1664 0xf, 0x3, 0xff, 0x0} },
1665 {WNI_CFG_EDCA_ANI_ACBE,
1666 WNI_CFG_EDCA_ANI_ACBE_LEN,
1667 17,
1668 {0x0, 0x2, 0x0, 0xf, 0x3, 0xff, 0x64, 0x0, 0x1f, 0x3, 0xff, 0x64, 0x0,
1669 0xf, 0x3, 0xff, 0x64} },
1670 {WNI_CFG_EDCA_ANI_ACVI,
1671 WNI_CFG_EDCA_ANI_ACVI_LEN,
1672 17, {0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0xc8, 0x0, 0xf, 0x0, 0x1f,
1673 0xbc, 0x0, 0x7, 0x0, 0xf, 0xc8} },
1674 {WNI_CFG_EDCA_ANI_ACVO,
1675 WNI_CFG_EDCA_ANI_ACVO_LEN,
1676 17,
1677 {0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x64, 0x0, 0x7, 0x0, 0xf, 0x66, 0x0, 0x3,
1678 0x0, 0x7, 0x64} },
1679 {WNI_CFG_EDCA_WME_ACBK_LOCAL,
1680 WNI_CFG_EDCA_WME_ACBK_LOCAL_LEN,
1681 17, {0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0x1f, 0x3, 0xff,
1682 0x0, 0x0, 0xf, 0x3, 0xff, 0x0} },
1683 {WNI_CFG_EDCA_WME_ACBE_LOCAL,
1684 WNI_CFG_EDCA_WME_ACBE_LOCAL_LEN,
1685 17, {0x0, 0x3, 0x0, 0xf, 0x0, 0x3f, 0x0, 0x0, 0x1f, 0x3, 0xff,
1686 0x0, 0x0, 0xf, 0x0, 0x3f, 0x0} },
1687 {WNI_CFG_EDCA_WME_ACVI_LOCAL,
1688 WNI_CFG_EDCA_WME_ACVI_LOCAL_LEN,
1689 17,
1690 {0x0, 0x1, 0x0, 0x7, 0x0, 0xf, 0x5e, 0x0, 0x7, 0x0, 0xf, 0xbc, 0x0, 0x7,
1691 0x0, 0xf, 0x5e} },
1692 {WNI_CFG_EDCA_WME_ACVO_LOCAL,
1693 WNI_CFG_EDCA_WME_ACVO_LOCAL_LEN,
1694 17,
1695 {0x0, 0x1, 0x0, 0x3, 0x0, 0x7, 0x2f, 0x0, 0x3, 0x0, 0x7, 0x66, 0x0, 0x3,
1696 0x0, 0x7, 0x2f} },
1697 {WNI_CFG_EDCA_WME_ACBK,
1698 WNI_CFG_EDCA_WME_ACBK_LEN,
1699 17,
1700 {0x0, 0x7, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf,
1701 0x3, 0xff, 0x0} },
1702 {WNI_CFG_EDCA_WME_ACBE,
1703 WNI_CFG_EDCA_WME_ACBE_LEN,
1704 17,
1705 {0x0, 0x3, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf, 0x3, 0xff, 0x0, 0x0, 0xf,
1706 0x3, 0xff, 0x0} },
1707 {WNI_CFG_EDCA_WME_ACVI,
1708 WNI_CFG_EDCA_WME_ACVI_LEN,
1709 17,
1710 {0x0, 0x2, 0x0, 0x7, 0x0, 0xf, 0x5e, 0x0, 0x7, 0x0, 0xf, 0xbc, 0x0, 0x7,
1711 0x0, 0xf, 0x5e} },
1712 {WNI_CFG_EDCA_WME_ACVO,
1713 WNI_CFG_EDCA_WME_ACVO_LEN,
1714 17,
1715 {0x0, 0x2, 0x0, 0x3, 0x0, 0x7, 0x2f, 0x0, 0x3, 0x0, 0x7, 0x66, 0x0, 0x3,
1716 0x0, 0x7, 0x2f} },
1717 {WNI_CFG_RADAR_CHANNEL_LIST,
1718 WNI_CFG_RADAR_CHANNEL_LIST_LEN,
1719 15,
1720 {0x34, 0x38, 0x3c, 0x40, 0x64, 0x68, 0x6c, 0x70, 0x74, 0x78, 0x7c, 0x80,
1721 0x84, 0x88, 0x8c} },
1722 {WNI_CFG_SCAN_CONTROL_LIST,
1723 WNI_CFG_SCAN_CONTROL_LIST_LEN,
1724 114,
1725 {0x1, 0x1, 0x2, 0x1, 0x3, 0x1, 0x4, 0x1, 0x5, 0x1, 0x6, 0x1, 0x7, 0x1,
1726 0x8, 0x1, 0x9, 0x1, 0xa, 0x1, 0xb, 0x1, 0xc, 0x1, 0xd, 0x1, 0xe, 0x1,
1727 0x22, 0x1, 0x24, 0x1, 0x26, 0x1, 0x28, 0x1, 0x2a, 0x1, 0x2c, 0x1, 0x2e,
1728 0x1, 0x30, 0x1, 0x32, 0x1, 0x34, 0x0, 0x36, 0x0, 0x38, 0x0, 0x3a, 0x0,
1729 0x3c, 0x0, 0x3e, 0x0, 0x40, 0x0, 0x64, 0x0, 0x68, 0x0, 0x6c, 0x0, 0x70,
1730 0x0, 0x74, 0x0, 0x78, 0x0, 0x7c, 0x0, 0x80, 0x0, 0x84, 0x0, 0x88, 0x0,
1731 0x8c, 0x0, 0x90, 0x0, 0x95, 0x1, 0x97, 0x1, 0x99, 0x1, 0x9b, 0x1, 0x9d,
1732 0x1, 0x9f, 0x1, 0xa1, 0x1, 0xa5, 0x1, 0xf0, 0x1, 0xf2, 0x1, 0xf4, 0x1,
1733 0xf6, 0x1, 0xf8, 0x1, 0xfa, 0x1, 0xfc, 0x1} },
1734 {WNI_CFG_SUPPORTED_MCS_SET,
1735 WNI_CFG_SUPPORTED_MCS_SET_LEN,
1736 16,
1737 {0xff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
1738 0x0, 0x0} },
1739 {WNI_CFG_BASIC_MCS_SET,
1740 WNI_CFG_BASIC_MCS_SET_LEN,
1741 16,
1742 {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
1743 0x0, 0x0} },
1744 {WNI_CFG_CURRENT_MCS_SET,
1745 WNI_CFG_CURRENT_MCS_SET_LEN,
1746 16,
1747 {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
1748 0x0, 0x0} },
1749 {WNI_CFG_BG_SCAN_CHANNEL_LIST,
1750 WNI_CFG_BG_SCAN_CHANNEL_LIST_LEN,
1751 55,
1752 {0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c, 0x40, 0x1, 0x6, 0xb, 0x22,
1753 0x26, 0x2a, 0x2e, 0x2, 0x3, 0x4, 0x5, 0x7, 0x8, 0x9, 0xa, 0xc, 0xd,
1754 0xe, 0x64, 0x68, 0x6c, 0x70, 0x74, 0x78, 0x7c, 0x80, 0x84, 0x88, 0x8c,
1755 0x95, 0x97, 0x99, 0x9b, 0x9d, 0x9f, 0xa1, 0x32, 0x36, 0x3a, 0x3e, 0xf0,
1756 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc} },
1757 {WNI_CFG_PROBE_REQ_ADDNIE_DATA,
1758 WNI_CFG_PROBE_REQ_ADDNIE_DATA_LEN,
1759 0,
1760 {0} },
1761 {WNI_CFG_PROBE_RSP_ADDNIE_DATA1,
1762 WNI_CFG_PROBE_RSP_ADDNIE_DATA1_LEN,
1763 0,
1764 {0} },
1765 {WNI_CFG_PROBE_RSP_ADDNIE_DATA2,
1766 WNI_CFG_PROBE_RSP_ADDNIE_DATA2_LEN,
1767 0,
1768 {0} },
1769 {WNI_CFG_PROBE_RSP_ADDNIE_DATA3,
1770 WNI_CFG_PROBE_RSP_ADDNIE_DATA3_LEN,
1771 0,
1772 {0} },
1773 {WNI_CFG_ASSOC_RSP_ADDNIE_DATA,
1774 WNI_CFG_ASSOC_RSP_ADDNIE_DATA_LEN,
1775 0,
1776 {0} },
1777 {WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA,
1778 WNI_CFG_PROBE_REQ_ADDNP2PIE_DATA_LEN,
1779 0,
1780 {0} },
1781 {WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA,
1782 WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA_LEN,
1783 0,
1784 {0} },
1785 {WNI_CFG_WPS_UUID,
1786 WNI_CFG_WPS_UUID_LEN,
1787 6,
1788 {0xa, 0xb, 0xc, 0xd, 0xe, 0xf} }
1789};
1790
1791/*--------------------------------------------------------------------*/
1792/* Static function prototypes */
1793/*--------------------------------------------------------------------*/
1794static void proc_dnld_rsp(tpAniSirGlobal, uint16_t, uint32_t *);
1795static void proc_get_req(tpAniSirGlobal, uint16_t, uint32_t *);
1796static void proc_set_req(tpAniSirGlobal, uint16_t, uint32_t *);
1797static void proc_set_req_no_rsp(tpAniSirGlobal, uint16_t, uint32_t *);
1798
1799static uint8_t check_param(tpAniSirGlobal, uint16_t, uint32_t, uint32_t,
1800 uint32_t *);
1801static void get_str_value(uint8_t *, uint8_t *, uint32_t);
1802
1803/*--------------------------------------------------------------------*/
1804/* Module global variables */
1805/*--------------------------------------------------------------------*/
1806
1807/* CFG function table */
1808void (*g_cfg_func[])(tpAniSirGlobal, uint16_t, uint32_t *) = {
1809 proc_dnld_rsp, proc_get_req, proc_set_req, proc_set_req_no_rsp
1810};
1811
1812/**---------------------------------------------------------------------
1813 * cfg_process_mb_msg()
1814 *
1815 ***FUNCTION:
1816 * CFG mailbox message processing function.
1817 *
1818 ***LOGIC:
1819 *
1820 ***ASSUMPTIONS:
1821 * None.
1822 *
1823 ***NOTE:
1824 *
1825 * @param pMsg Message pointer
1826 *
1827 * @return None.
1828 *
1829 */
1830void cfg_process_mb_msg(tpAniSirGlobal pMac, tSirMbMsg *pMsg)
1831{
1832 uint16_t index;
1833 uint16_t len;
1834 uint32_t *pParam;
1835
1836 /* Use type[7:0] as index to function table */
1837 index = CFG_GET_FUNC_INDX(pMsg->type);
1838
1839 if (index >= CDF_ARRAY_SIZE(g_cfg_func)) {
1840 cdf_mem_free(pMsg);
1841 return;
1842 }
1843 len = pMsg->msgLen - WNI_CFG_MB_HDR_LEN;
1844 pParam = ((uint32_t *) pMsg) + 1;
1845
1846 /* Call processing function */
1847 g_cfg_func[index] (pMac, len, pParam);
1848
1849 /* Free up buffer */
1850 cdf_mem_free(pMsg);
1851
1852} /*** end cfg_process_mb_msg() ***/
1853
1854/**---------------------------------------------------------------------
1855 * proc_dnld_rsp()
1856 *
1857 * FUNCTION:
1858 * This function processes CFG_DNLD_RSP message from host.
1859 *
1860 * LOGIC:
1861 *
1862 * ASSUMPTIONS:
1863 *
1864 * NOTE:
1865 *
1866 * @param length: message length
1867 * @param pParam: parameter list pointer
1868 *
1869 * @return None
1870 *
1871 */
1872static void proc_dnld_rsp(tpAniSirGlobal pMac, uint16_t length, uint32_t *pParam)
1873{
1874 int32_t i;
1875
1876 uint32_t expLen, retVal, bufStart, bufEnd;
1877 uint32_t *pSrc, *pDst, *pDstEnd;
1878 uint32_t strSize, j;
1879 uint8_t pStr[CFG_MAX_STR_LEN];
1880 tpCfgBinHdr pHdr;
1881 uint32_t logLevel;
1882 tSirMsgQ mmhMsg;
1883
1884 /* First Dword must contain the AP or STA magic dword */
1885 PELOGW(cfg_log(pMac, LOGW, FL("CFG size %d bytes MAGIC dword is 0x%x"),
1886 length, sir_read_u32_n((uint8_t *) pParam));
1887 )
1888 /* if the string is not correct, return failure */
1889 if (*pParam == CFG_STA_MAGIC_DWORD) {
1890 }
1891
1892 else {
1893 PELOGE(cfg_log
1894 (pMac, LOGE, FL("Invalid magic dword 0x%x"),
1895 sir_read_u32_n((uint8_t *) pParam));
1896 )
1897 retVal = WNI_CFG_INVALID_LEN;
1898 goto end;
1899 }
1900
1901 pParam++;
1902 length -= 4;
1903
1904 /* Verify message length */
1905 {
1906 pMac->cfg.gCfgMaxIBufSize = CFG_STA_IBUF_MAX_SIZE;
1907 pMac->cfg.gCfgMaxSBufSize = CFG_STA_SBUF_MAX_SIZE;
1908 }
1909
1910 /* Parse the Cfg header */
1911 pHdr = (tpCfgBinHdr) pParam;
1912 pParam += (sizeof(tCfgBinHdr) >> 2);
1913 PELOGW(cfg_log
1914 (pMac, LOGW,
1915 FL("CFG hdr totParams %d intParams %d strBufSize %d/%d"),
1916 pHdr->controlSize, pHdr->iBufSize, pHdr->sBufSize,
1917 pMac->cfg.gCfgMaxSBufSize);
1918 )
1919
1920 expLen =
1921 ((CFG_PARAM_MAX_NUM + 3 * pMac->cfg.gCfgMaxIBufSize) << 2) +
1922 pHdr->sBufSize + sizeof(tCfgBinHdr);
1923
1924 if (length != expLen) {
1925 PELOGE(cfg_log
1926 (pMac, LOGE,
1927 FL("<CFG> DNLD_RSP invalid length %d (exp %d)"), length,
1928 expLen);
1929 )
1930 retVal = WNI_CFG_INVALID_LEN;
1931 goto end;
1932 }
1933
1934 if (pHdr->controlSize != CFG_PARAM_MAX_NUM) {
1935 PELOGE(cfg_log
1936 (pMac, LOGE, FL("<CFG> Total parameter count mismatch"));
1937 )
1938 retVal = WNI_CFG_INVALID_LEN;
1939 goto end;
1940 }
1941
1942 if (pHdr->iBufSize != pMac->cfg.gCfgMaxIBufSize) {
1943 PELOGE(cfg_log
1944 (pMac, LOGE,
1945 FL("<CFG> Integer parameter count mismatch"));
1946 )
1947 retVal = WNI_CFG_INVALID_LEN;
1948 goto end;
1949 }
1950 /* Copy control array */
1951 pDst = (uint32_t *) pMac->cfg.gCfgEntry;
1952 pDstEnd = pDst + CFG_PARAM_MAX_NUM;
1953 pSrc = pParam;
1954 while (pDst < pDstEnd) {
1955 *pDst++ = *pSrc++;
1956 }
1957 /* Copy default values */
1958 pDst = pMac->cfg.gCfgIBuf;
1959 pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
1960 while (pDst < pDstEnd) {
1961 *pDst++ = *pSrc++;
1962 }
1963
1964 /* Copy min values */
1965 pDst = pMac->cfg.gCfgIBufMin;
1966 pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
1967 while (pDst < pDstEnd) {
1968 *pDst++ = *pSrc++;
1969 }
1970
1971 /* Copy max values */
1972 pDst = pMac->cfg.gCfgIBufMax;
1973 pDstEnd = pDst + pMac->cfg.gCfgMaxIBufSize;
1974 while (pDst < pDstEnd) {
1975 *pDst++ = *pSrc++;
1976 }
1977
1978 for (i = 0; i < pMac->cfg.gCfgMaxIBufSize; i++)
1979 if (pMac->cfg.gCfgIBuf[i] < pMac->cfg.gCfgIBufMin[i] ||
1980 pMac->cfg.gCfgIBuf[i] > pMac->cfg.gCfgIBufMax[i]) {
1981 PELOGE(cfg_log
1982 (pMac, LOGE,
1983 FL("cfg id %d Invalid def value %d "
1984 "min %d max %d"), i, pMac->cfg.gCfgIBuf[i],
1985 pMac->cfg.gCfgIBufMin[i],
1986 pMac->cfg.gCfgIBufMax[i]);
1987 )
1988 }
1989 /* Calculate max string buffer lengths for all string parameters */
1990 bufEnd = pMac->cfg.gCfgMaxSBufSize;
1991 for (i = CFG_PARAM_MAX_NUM - 1; i >= 0; i--) {
1992 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0)
1993 continue;
1994
1995 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
1996 continue;
1997
1998 bufStart = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
1999 pMac->cfg.gCfgSBuf[bufStart] =
2000 (uint8_t) (bufEnd - bufStart - 2);
2001
2002 PELOG1(cfg_log
2003 (pMac, LOG1, FL("id %d max %d bufStart %d bufEnd %d"), i,
2004 pMac->cfg.gCfgSBuf[bufStart], bufStart, bufEnd);
2005 )
2006
2007 bufEnd = bufStart;
2008 }
2009
2010 /* Initialize string defaults */
2011 strSize = pHdr->sBufSize;
2012 while (strSize) {
2013 uint32_t paramId, paramLen, paramLenCeil4;
2014
2015 if (strSize < 4) {
2016 PELOGE(cfg_log
2017 (pMac, LOGE,
2018 FL("Error parsing str defaults, rem %d bytes"),
2019 strSize);
2020 )
2021 retVal = WNI_CFG_INVALID_LEN;
2022 goto end;
2023 }
2024 paramId = *pSrc >> 16;
2025 paramLen = *pSrc & 0xff;
2026 pSrc++;
2027 strSize -= 4;
2028
2029 paramLenCeil4 = ((paramLen + 3) >> 2);
2030 if (strSize < paramLenCeil4 << 2) {
2031 PELOGE(cfg_log
2032 (pMac, LOGE,
2033 FL("Error parsing str defaults, rem %d bytes"),
2034 strSize);
2035 )
2036 PELOGE(cfg_log
2037 (pMac, LOGE, FL("param id %d len %d bytes"),
2038 paramId, paramLen);
2039 )
2040 retVal = WNI_CFG_INVALID_LEN;
2041 goto end;
2042 }
2043 for (j = 0; j < paramLenCeil4; j++) {
2044 pStr[4 * j] = (uint8_t) (*pSrc >> 24) & 0xff;
2045 pStr[4 * j + 1] = (uint8_t) (*pSrc >> 16) & 0xff;
2046 pStr[4 * j + 2] = (uint8_t) (*pSrc >> 8) & 0xff;
2047 pStr[4 * j + 3] = (uint8_t) (*pSrc) & 0xff;
2048
2049 pSrc++;
2050 strSize -= 4;
2051 }
2052
2053 PELOG1(cfg_log
2054 (pMac, LOG1, FL("set str id %d len %d"), paramId,
2055 paramLen);
2056 )
2057
2058 if (cfg_set_str(pMac, (uint16_t) paramId, pStr, paramLen) !=
2059 eSIR_SUCCESS) {
2060 PELOGE(cfg_log
2061 (pMac, LOGE,
2062 FL("Error setting str default param %d len %d"),
2063 paramId, paramLen);
2064 )
2065 retVal = WNI_CFG_INVALID_LEN;
2066 goto end;
2067 }
2068 }
2069
2070 /* Set the default log level based on config */
2071 wlan_cfg_get_int(pMac, WNI_CFG_LOG_LEVEL, &logLevel);
2072 for (i = 0; i < LOG_ENTRY_NUM; i++)
2073 pMac->utils.gLogEvtLevel[i] = pMac->utils.gLogDbgLevel[i] =
2074 logLevel;
2075
2076 /* Set status to READY */
2077 pMac->cfg.gCfgStatus = CFG_SUCCESS;
2078 retVal = WNI_CFG_SUCCESS;
2079 PELOG1(cfg_log(pMac, LOG1, "<CFG> Completed successfully");)
2080
2081end :
2082
2083 if (retVal != WNI_CFG_SUCCESS)
2084 pMac->cfg.gCfgStatus = CFG_FAILURE;
2085
2086 /* Send response message to host */
2087 pMac->cfg.gParamList[WNI_CFG_DNLD_CNF_RES] = retVal;
2088 cfg_send_host_msg(pMac, WNI_CFG_DNLD_CNF, WNI_CFG_DNLD_CNF_LEN,
2089 WNI_CFG_DNLD_CNF_NUM, pMac->cfg.gParamList, 0, 0);
2090
2091 /* notify WMA that the config has downloaded */
2092 mmhMsg.type = SIR_CFG_DOWNLOAD_COMPLETE_IND;
2093 mmhMsg.bodyptr = NULL;
2094 mmhMsg.bodyval = 0;
2095
2096 MTRACE(mac_trace_msg_tx(pMac, NO_SESSION, mmhMsg.type));
2097 if (wma_post_ctrl_msg(pMac, &mmhMsg) != eSIR_SUCCESS) {
2098 PELOGE(cfg_log(pMac, LOGE, FL("WMAPostMsgApi failed!"));)
2099 }
2100
2101} /*** end procDnldRsp() ***/
2102
2103/**---------------------------------------------------------------------
2104 * proc_get_req()
2105 *
2106 * FUNCTION:
2107 * This function processes CFG_GET_REQ message from host.
2108 *
2109 * LOGIC:
2110 *
2111 * ASSUMPTIONS:
2112 *
2113 * NOTE:
2114 * For every parameter ID specified on the list, CFG will send a separate
2115 * CFG_GET_RSP back to host.
2116 *
2117 * @param length: message length
2118 * @param pParam: parameter list pointer
2119 *
2120 * @return None
2121 *
2122 */
2123static void proc_get_req(tpAniSirGlobal pMac, uint16_t length, uint32_t *pParam)
2124{
2125 uint16_t cfgId, i;
2126 uint32_t value, valueLen, result;
2127 uint32_t *pValue;
2128
2129 PELOG1(cfg_log(pMac, LOG1, FL("Rcvd cfg get request %d bytes"), length);)
2130 for (i = 0; i < length / 4; i++)
2131 PELOG2(cfg_log(pMac, LOG2, FL("[%2d] 0x%08x"), i, pParam[i]);)
2132
2133 if (!pMac->cfg.gCfgStatus) {
2134 cfgId = (uint16_t) sir_read_u32_n((uint8_t *) pParam);
2135 PELOGE(cfg_log(pMac, LOGE, FL("CFG not ready, param %d"), cfgId);)
2136 pMac->cfg.gParamList[WNI_CFG_GET_RSP_RES] =
2137 WNI_CFG_NOT_READY;
2138 pMac->cfg.gParamList[WNI_CFG_GET_RSP_PID] = cfgId;
2139 pMac->cfg.gParamList[WNI_CFG_GET_RSP_PLEN] = 0;
2140 cfg_send_host_msg(pMac, WNI_CFG_GET_RSP,
2141 WNI_CFG_GET_RSP_PARTIAL_LEN, WNI_CFG_GET_RSP_NUM,
2142 pMac->cfg.gParamList, 0, 0);
2143 } else {
2144 /* Process all parameter ID's on the list */
2145 while (length >= sizeof(uint32_t)) {
2146 cfgId = (uint16_t) *pParam++;
2147 pValue = 0;
2148 valueLen = 0;
2149
2150 PELOG1(cfg_log
2151 (pMac, LOG1, FL("Cfg get param %d"), cfgId);
2152 )
2153 /* Check for valid parameter ID, etc... */
2154 if (check_param
2155 (pMac, cfgId, CFG_CTL_RE, WNI_CFG_WO_PARAM,
2156 &result)) {
2157 if ((pMac->cfg.gCfgEntry[cfgId].
2158 control & CFG_CTL_INT) != 0) {
2159 /* Get integer parameter */
2160 result =
2161 (wlan_cfg_get_int(pMac, cfgId, &value)
2162 ==
2163 eSIR_SUCCESS ? WNI_CFG_SUCCESS :
2164 WNI_CFG_OTHER_ERROR);
2165 pValue = &value;
2166 valueLen = sizeof(uint32_t);
2167 } else {
2168 /* Get string parameter */
2169 valueLen = sizeof(pMac->cfg.gSBuffer);
2170 result =
2171 (wlan_cfg_get_str
2172 (pMac, cfgId, pMac->cfg.gSBuffer,
2173 &valueLen)
2174 == eSIR_SUCCESS ? WNI_CFG_SUCCESS :
2175 WNI_CFG_OTHER_ERROR);
2176 pValue =
2177 (uint32_t *) pMac->cfg.gSBuffer;
2178 }
2179 } else {
2180 PELOGE(cfg_log
2181 (pMac, LOGE,
2182 FL("Check param failed, param %d"),
2183 cfgId);
2184 )
2185 result = WNI_CFG_INVALID_LEN;
2186 }
2187
2188 /* Send response message to host */
2189 pMac->cfg.gParamList[WNI_CFG_GET_RSP_RES] = result;
2190 pMac->cfg.gParamList[WNI_CFG_GET_RSP_PID] = cfgId;
2191 pMac->cfg.gParamList[WNI_CFG_GET_RSP_PLEN] = valueLen;
2192
2193 /* We need to round up buffer length to word-increment */
2194 valueLen = (((valueLen + 3) >> 2) << 2);
2195 cfg_send_host_msg(pMac, WNI_CFG_GET_RSP,
2196 WNI_CFG_GET_RSP_PARTIAL_LEN + valueLen,
2197 WNI_CFG_GET_RSP_NUM,
2198 pMac->cfg.gParamList, valueLen, pValue);
2199
2200 /* Decrement length */
2201 length -= sizeof(uint32_t);
2202 }
2203 }
2204
2205} /*** end procGetReq() ***/
2206
2207/**---------------------------------------------------------------------
2208 * proc_set_req_internal()
2209 *
2210 * FUNCTION:
2211 * This function processes CFG_SET_REQ message from host.
2212 *
2213 * LOGIC:
2214 *
2215 * ASSUMPTIONS:
2216 * - The message content is coded in TLV format.
2217 * - For string parameter, the length field is byte accurate. However,
2218 * the next TLV set will begin on the next word boundary.
2219 *
2220 * NOTE:
2221 * - For every parameter ID specified on the list, CFG will send a separate
2222 * CFG_SET_RSP back to host.
2223 *
2224 * @param length: message length
2225 * @param pParam: parameter list pointer
2226 * @param fRsp: whether to send response to host. true means sending.
2227 * @return None
2228 *
2229 */
2230static void
2231proc_set_req_internal(tpAniSirGlobal pMac, uint16_t length, uint32_t *pParam,
2232 bool fRsp)
2233{
2234 uint16_t cfgId, valueLen, valueLenRoundedUp4;
2235 uint32_t value, result;
2236
2237 PELOG1(cfg_log(pMac, LOGl, FL("Rcvd cfg set request %d bytes"), length);)
2238
2239 if (!pMac->cfg.gCfgStatus) {
2240 cfgId = (uint16_t) sir_read_u32_n((uint8_t *) pParam);
2241 PELOG1(cfg_log(pMac, LOGW, FL("CFG not ready, param %d"), cfgId);)
2242 pMac->cfg.gParamList[WNI_CFG_SET_CNF_RES] =
2243 WNI_CFG_NOT_READY;
2244 pMac->cfg.gParamList[WNI_CFG_SET_CNF_PID] = cfgId;
2245 if (fRsp) {
2246 cfg_send_host_msg(pMac, WNI_CFG_SET_CNF,
2247 WNI_CFG_SET_CNF_LEN, WNI_CFG_SET_CNF_NUM,
2248 pMac->cfg.gParamList, 0, 0);
2249 }
2250 } else {
2251 /* Process all TLVs in buffer */
2252 while (length >= (sizeof(uint32_t) * 2)) {
2253 cfgId = (uint16_t) *pParam++;
2254 valueLen = (uint16_t) *pParam++;
2255 length -= (sizeof(uint32_t) * 2);
2256 /* value length rounded up to a 4 byte multiple */
2257 valueLenRoundedUp4 = (((valueLen + 3) >> 2) << 2);
2258
2259 /* Check for valid request before proceeding */
2260 if (check_param
2261 (pMac, cfgId, CFG_CTL_WE, WNI_CFG_RO_PARAM,
2262 &result)) {
2263 PELOG1(cfg_log
2264 (pMac, LOGW,
2265 (char *)g_cfg_param_name[cfgId]);
2266 )
2267 /* Process integer parameter */
2268 if ((pMac->cfg.gCfgEntry[cfgId].
2269 control & CFG_CTL_INT) != 0) {
2270 /* Set VALUE */
2271 if (valueLen != sizeof(uint32_t)) {
2272 PELOGE(cfg_log
2273 (pMac, LOGE,
2274 FL
2275 ("Invalid value length %d in set param %d (tot %d)"),
2276 valueLen, cfgId,
2277 length);
2278 )
2279 result =
2280 WNI_CFG_INVALID_LEN;
2281 } else {
2282 value = *pParam;
2283 PELOG1(cfg_log
2284 (pMac, LOGW,
2285 FL
2286 ("Cfg set int %d len %d(%d) val %d"),
2287 cfgId, valueLen,
2288 valueLenRoundedUp4,
2289 value);
2290 )
2291 result =
2292 (cfg_set_int
2293 (pMac, cfgId,
2294 value) ==
2295 eSIR_SUCCESS ?
2296 WNI_CFG_SUCCESS :
2297 WNI_CFG_OTHER_ERROR);
2298 if (result == WNI_CFG_SUCCESS) {
2299 if (cfg_need_restart
2300 (pMac, cfgId)) {
2301 result =
2302 WNI_CFG_NEED_RESTART;
2303 } else
2304 if (cfg_need_reload
2305 (pMac, cfgId)) {
2306 result =
2307 WNI_CFG_NEED_RELOAD;
2308 }
2309 }
2310 }
2311 }
2312 /* Process string parameter */
2313 else {
2314 if (valueLenRoundedUp4 > length) {
2315 PELOGE(cfg_log
2316 (pMac, LOGE,
2317 FL
2318 ("Invalid string length %d"
2319 "in set param %d (tot %d)"),
2320 valueLen, cfgId,
2321 length);
2322 )
2323 result =
2324 WNI_CFG_INVALID_LEN;
2325 } else {
2326 get_str_value((uint8_t *) pParam,
2327 pMac->cfg.gSBuffer,
2328 valueLen);
2329 PELOG1(cfg_log
2330 (pMac, LOGW,
2331 FL
2332 ("Cfg set str %d len %d(%d) bytes"),
2333 cfgId, valueLen,
2334 valueLenRoundedUp4);
2335 )
2336 result =
2337 (cfg_set_str
2338 (pMac, cfgId,
2339 pMac->cfg.gSBuffer,
2340 valueLen) ==
2341 eSIR_SUCCESS ?
2342 WNI_CFG_SUCCESS :
2343 WNI_CFG_OTHER_ERROR);
2344 if (result == WNI_CFG_SUCCESS) {
2345 if (cfg_need_restart
2346 (pMac, cfgId)) {
2347 result =
2348 WNI_CFG_NEED_RESTART;
2349 } else
2350 if (cfg_need_reload
2351 (pMac, cfgId)) {
2352 result =
2353 WNI_CFG_NEED_RELOAD;
2354 }
2355 }
2356 }
2357 }
2358 } else {
2359 PELOGE(cfg_log
2360 (pMac, LOGE,
2361 FL("Check param failed, param %d"),
2362 cfgId);
2363 )
2364 result = WNI_CFG_INVALID_LEN;
2365 }
2366
2367 /* Send confirm message to host */
2368 pMac->cfg.gParamList[WNI_CFG_SET_CNF_RES] = result;
2369 pMac->cfg.gParamList[WNI_CFG_SET_CNF_PID] = cfgId;
2370 if (fRsp) {
2371 cfg_send_host_msg(pMac, WNI_CFG_SET_CNF,
2372 WNI_CFG_SET_CNF_LEN,
2373 WNI_CFG_SET_CNF_NUM,
2374 pMac->cfg.gParamList, 0, 0);
2375 } else {
2376 PELOGW(cfg_log
2377 (pMac, LOG2, " CFGID %d no rsp", cfgId);
2378 )
2379 }
2380
2381 if (valueLenRoundedUp4 > length)
2382 length = 0;
2383 else {
2384 length -= valueLenRoundedUp4;
2385 pParam += (valueLenRoundedUp4 >> 2);
2386 }
2387 }
2388 }
2389}
2390
2391static void proc_set_req(tpAniSirGlobal pMac, uint16_t length, uint32_t *pParam)
2392{
2393 proc_set_req_internal(pMac, length, pParam, true);
2394}
2395
2396static void
2397proc_set_req_no_rsp(tpAniSirGlobal pMac, uint16_t length, uint32_t *pParam)
2398{
2399 proc_set_req_internal(pMac, length, pParam, false);
2400}
2401
2402/**---------------------------------------------------------------------
2403 * check_param()
2404 *
2405 * FUNCTION:
2406 * This function is called to perform various check on a parameter.
2407 *
2408 * LOGIC:
2409 * - If cfgId is out of bound or parameter is not valid, result
2410 * WNI_CFG_INVALID_PID is returned at address specified in pResult.
2411 *
2412 * - If specified 'flag' is not set in the parameter control entry,
2413 * 'failedResult' is returned at address specified in pResult.
2414 *
2415 * ASSUMPTIONS:
2416 * Since this function is used internally, 'pResult' is always valid.
2417 *
2418 * NOTE:
2419 *
2420 * @param None
2421 *
2422 * @return true: Parameter is valid and matches checked condition \n
2423 * @return false: Parameter either is not valid or does not match
2424 * checked condition.
2425 *
2426 */
2427static uint8_t
2428check_param(tpAniSirGlobal pMac, uint16_t cfgId, uint32_t flag,
2429 uint32_t failedResult, uint32_t *pResult)
2430{
2431 /* Check if parameter ID is out of bound */
2432 if (cfgId >= CFG_PARAM_MAX_NUM) {
2433 PELOGE(cfg_log(pMac, LOGE, FL("Invalid param id %d"), cfgId);)
2434 * pResult = WNI_CFG_INVALID_PID;
2435 } else {
2436 /* Check if parameter is valid */
2437 if ((pMac->cfg.gCfgEntry[cfgId].control & CFG_CTL_VALID) == 0) {
2438 PELOGE(cfg_log
2439 (pMac, LOGE, FL("Param id %d not valid"), cfgId);
2440 )
2441 * pResult = WNI_CFG_INVALID_PID;
2442 } else {
2443 /* Check control field against flag */
2444 if ((pMac->cfg.gCfgEntry[cfgId].control & flag) == 0) {
2445 PELOGE(cfg_log
2446 (pMac, LOGE,
2447 FL("Param id %d wrong permissions %x"),
2448 cfgId,
2449 pMac->cfg.gCfgEntry[cfgId].control);
2450 )
2451 * pResult = failedResult;
2452 } else
2453 return true;
2454 }
2455 }
2456 return false;
2457
2458} /*** cfgParamCheck() ***/
2459
2460/**---------------------------------------------------------------------
2461 * get_str_value()
2462 *
2463 * FUNCTION:
2464 * This function copies a string value from the specified buffer.
2465 *
2466 * LOGIC:
2467 *
2468 * ASSUMPTIONS:
2469 *
2470 * NOTE:
2471 *
2472 * @param pBuf: input data buffer
2473 * @param pValue: address where data is returned
2474 * @param length: number of bytes to copy
2475 *
2476 * @return None
2477 *
2478 */
2479static void get_str_value(uint8_t *pBuf, uint8_t *pValue, uint32_t length)
2480{
2481 uint8_t *pEnd;
2482
2483 pEnd = pValue + length;
2484 while (pValue < pEnd)
2485 *pValue++ = *pBuf++;
2486} /*** end get_str_value() ***/
2487
2488/**---------------------------------------------------------------------
2489 * process_cfg_download_req()
2490 *
2491 * FUNCTION: This function does the Cfg Download and is invoked
2492 * only in the case of Prima or the Integrated SOC
2493 * solutions. Not applicable to Volans or Libra
2494 *
2495 * LOGIC:
2496 *
2497 * ASSUMPTIONS:
2498 *
2499 * NOTE:
2500 *
2501 * @param pMac: Pointer to Mac Structure
2502 *
2503 * @return None
2504 *
2505 */
2506
2507void
2508process_cfg_download_req(tpAniSirGlobal pMac)
2509{
2510 int32_t i;
2511 uint32_t index;
2512 uint8_t *pDstTest, *pSrcTest;
2513 uint8_t len;
2514 cfgstatic_string *pStrCfg;
2515 uint32_t bufStart, bufEnd;
2516 uint32_t logLevel, retVal;
2517 uint32_t iCount = 0;
2518 uint32_t sCount = 0;
2519
2520 for (i = 0; i < CFG_PARAM_MAX_NUM ; i++) {
2521 if ((cfg_static[i].control & CFG_CTL_VALID) != 0) {
2522 if (!(cfg_static[i].control & CFG_CTL_INT)) {
2523 pStrCfg = (cfgstatic_string *)cfg_static[i].
2524 pStrData;
2525 if (pStrCfg == NULL) {
2526 PELOGE(cfg_log(pMac, LOGE,
2527 FL("pStrCfg is NULL for CfigID : %d"),
2528 i);)
2529 continue;
2530 }
2531 index = sCount & CFG_BUF_INDX_MASK;
2532 sCount += pStrCfg->maxLen + 1 + 1;
2533 } else {
2534 index = iCount & CFG_BUF_INDX_MASK;
2535 iCount++;
2536 }
2537 } else {
2538 index = 0;
2539 }
2540 pMac->cfg.gCfgEntry[i].control = cfg_static[i].control | index;
2541 }
2542
2543 /*Fill the SBUF wih maxLength*/
2544 bufEnd = pMac->cfg.gCfgMaxSBufSize;
2545 for (i = CFG_PARAM_MAX_NUM - 1; i >= 0; i--) {
2546 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0)
2547 continue;
2548
2549 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
2550 continue;
2551
2552 bufStart = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
2553 pMac->cfg.gCfgSBuf[bufStart] = (uint8_t)(bufEnd - bufStart - 2);
2554
2555 PELOG1(cfgLog(pMac, LOG1, FL("id %d max %d bufStart %d bufEnd %d"),
2556 i, pMac->cfg.gCfgSBuf[bufStart],
2557 bufStart, bufEnd);)
2558 bufEnd = bufStart;
2559 }
2560
2561 for (i = 0; i < CFG_PARAM_MAX_NUM ; i++) {
2562 index = pMac->cfg.gCfgEntry[i].control & CFG_BUF_INDX_MASK;
2563
2564 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_INT) != 0) {
2565 pMac->cfg.gCfgIBufMin[index] = cfg_static[i].cfgIMin;
2566 pMac->cfg.gCfgIBufMax[index] = cfg_static[i].cfgIMax;
2567 pMac->cfg.gCfgIBuf[index] = cfg_static[i].cfgIVal;
2568 } else {
2569 uint8_t maxSavedLen;
2570 if ((pMac->cfg.gCfgEntry[i].control & CFG_CTL_VALID) == 0)
2571 continue;
2572 if (index >= CFG_STA_SBUF_MAX_SIZE)
2573 continue;
2574
2575 pDstTest = &pMac->cfg.gCfgSBuf[index];
2576 pStrCfg = (cfgstatic_string *)cfg_static[i].pStrData;
2577 pSrcTest = pStrCfg->data;
2578 if ((pDstTest == NULL) || (pStrCfg == NULL) ||
2579 (pSrcTest == NULL))
2580 continue;
2581 maxSavedLen = *pDstTest;
2582 len = pStrCfg->length;
2583 if (len > maxSavedLen)
2584 continue;
2585 *pDstTest++ = pStrCfg->maxLen;
2586 *pDstTest++ = len;
2587 while (len) {
2588 *pDstTest++ = *pSrcTest++;
2589 len--;
2590 }
2591 }
2592 }
2593
2594 /* Set the default log level based on config */
2595 wlan_cfg_get_int(pMac, WNI_CFG_LOG_LEVEL, &logLevel);
2596 for (i = 0; i < LOG_ENTRY_NUM; i++)
2597 pMac->utils.gLogEvtLevel[i] = pMac->utils.gLogDbgLevel[i] =
2598 logLevel;
2599
2600 /* Set status to READY */
2601 pMac->cfg.gCfgStatus = CFG_SUCCESS;
2602 retVal = WNI_CFG_SUCCESS;
2603 PELOG1(cfg_log(pMac, LOG1, "<CFG> Completed successfully");)
2604
2605 pMac->cfg.gParamList[WNI_CFG_DNLD_CNF_RES] = retVal;
2606
2607} /*** end ProcessDownloadReq() ***/