blob: 039202571f2ae83582d582bc992aa039e7d34f18 [file] [log] [blame]
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001/*
Houston Hoffmana76591b2015-11-10 16:52:05 -08002 * Copyright (c) 2012-2016 The Linux Foundation. All rights reserved.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08003 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28#ifndef WMA_API_H
29#define WMA_API_H
30
31#include "osdep.h"
32#include "cds_mq.h"
33#include "ani_global.h"
34#include "a_types.h"
35#include "wmi_unified.h"
36#ifdef NOT_YET
37#include "htc_api.h"
38#endif
39#include "lim_global.h"
40
41typedef void *WMA_HANDLE;
42
43/**
44 * enum GEN_PARAM - general parameters
45 * @GEN_VDEV_PARAM_AMPDU: Set ampdu size
46 * @GEN_VDEV_PARAM_AMSDU: Set amsdu size
47 * @GEN_PARAM_DUMP_AGC_START: dump agc start
48 * @GEN_PARAM_DUMP_AGC: dump agc
49 * @GEN_PARAM_DUMP_CHANINFO_START: dump channel info start
50 * @GEN_PARAM_DUMP_CHANINFO: dump channel info
51 * @GEN_PARAM_CRASH_INJECT: inject crash
52 * @GEN_PARAM_DUMP_PCIE_ACCESS_LOG: dump pcie access log
53 * @GEN_PARAM_TX_CHAIN_MASK_CCK: cck tx chain mask
54 */
55typedef enum {
56 GEN_VDEV_PARAM_AMPDU = 0x1,
57 GEN_VDEV_PARAM_AMSDU,
58 GEN_PARAM_DUMP_AGC_START,
59 GEN_PARAM_DUMP_AGC,
60 GEN_PARAM_DUMP_CHANINFO_START,
61 GEN_PARAM_DUMP_CHANINFO,
62 GEN_PARAM_DUMP_WATCHDOG,
63 GEN_PARAM_CRASH_INJECT,
64#ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
65 GEN_PARAM_DUMP_PCIE_ACCESS_LOG,
66#endif
67 GEN_PARAM_MODULATED_DTIM,
Manikandan Mohandcc21ba2016-03-15 14:31:56 -070068 GEN_PARAM_CAPTURE_TSF,
69 GEN_PARAM_RESET_TSF_GPIO,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080070} GEN_PARAM;
71
72#define VDEV_CMD 1
73#define PDEV_CMD 2
74#define GEN_CMD 3
75#define DBG_CMD 4
76#define PPS_CMD 5
77#define QPOWER_CMD 6
78#define GTX_CMD 7
79
80typedef void (*wma_peer_authorized_fp) (uint32_t vdev_id);
81
82
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053083QDF_STATUS wma_pre_start(void *cds_context);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080084
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053085QDF_STATUS wma_mc_process_msg(void *cds_context, cds_msg_t *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080086
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053087QDF_STATUS wma_start(void *cds_context);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080088
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053089QDF_STATUS wma_stop(void *cds_context, uint8_t reason);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080090
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053091QDF_STATUS wma_close(void *cds_context);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080092
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053093QDF_STATUS wma_wmi_service_close(void *cds_context);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080094
Anurag Chouhanfb54ab02016-02-18 18:00:46 +053095QDF_STATUS wma_wmi_work_close(void *cds_context);
Xun Luoa858a472015-11-10 08:24:45 -080096
Govind Singhd76a5b02016-03-08 15:12:14 +053097int wma_rx_ready_event(void *handle, uint8_t *ev, uint32_t len);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080098
Govind Singhd76a5b02016-03-08 15:12:14 +053099int wma_rx_service_ready_event(void *handle, uint8_t *ev, uint32_t len);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800100
Govind Singhd76a5b02016-03-08 15:12:14 +0530101int wma_rx_service_ready_ext_event(void *handle, uint8_t *ev, uint32_t len);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800102
103void wma_setneedshutdown(void *cds_context);
104
105bool wma_needshutdown(void *cds_context);
106
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530107QDF_STATUS wma_wait_for_ready_event(WMA_HANDLE handle);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800108
109uint8_t wma_map_channel(uint8_t mapChannel);
110
111int wma_cli_get_command(int vdev_id, int param_id, int vpdev);
112int wma_cli_set_command(int vdev_id, int param_id, int sval, int vpdev);
113int wma_cli_set2_command(int vdev_id, int param_id, int sval1,
114 int sval2, int vpdev);
115
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530116QDF_STATUS wma_set_htconfig(uint8_t vdev_id, uint16_t ht_capab, int value);
117QDF_STATUS wma_set_reg_domain(void *clientCtxt, v_REGDOMAIN_t regId);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800118
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530119QDF_STATUS wma_get_wcnss_software_version(void *p_cds_gctx,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800120 uint8_t *pVersion,
121 uint32_t versionBufferSize);
Houston Hoffmana76591b2015-11-10 16:52:05 -0800122int wma_runtime_suspend(void);
123int wma_runtime_resume(void);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800124int wma_bus_suspend(void);
Govind Singhd76a5b02016-03-08 15:12:14 +0530125QDF_STATUS wma_suspend_target(WMA_HANDLE handle, int disable_target_intr);
Houston Hoffmana769ed32016-04-14 17:02:51 -0700126void wma_target_suspend_acknowledge(void *context, bool wow_nack);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800127int wma_bus_resume(void);
Govind Singhd76a5b02016-03-08 15:12:14 +0530128QDF_STATUS wma_resume_target(WMA_HANDLE handle);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530129QDF_STATUS wma_disable_wow_in_fw(WMA_HANDLE handle);
130QDF_STATUS wma_disable_d0wow_in_fw(WMA_HANDLE handle);
Houston Hoffmana76591b2015-11-10 16:52:05 -0800131bool wma_is_wow_mode_selected(WMA_HANDLE handle);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530132QDF_STATUS wma_enable_wow_in_fw(WMA_HANDLE handle);
133QDF_STATUS wma_enable_d0wow_in_fw(WMA_HANDLE handle);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800134bool wma_check_scan_in_progress(WMA_HANDLE handle);
135void wma_set_peer_authorized_cb(void *wma_ctx, wma_peer_authorized_fp auth_cb);
Govind Singhd76a5b02016-03-08 15:12:14 +0530136QDF_STATUS wma_set_peer_param(void *wma_ctx, uint8_t *peer_addr,
137 uint32_t param_id,
138 uint32_t param_value, uint32_t vdev_id);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800139#ifdef NOT_YET
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530140QDF_STATUS wma_update_channel_list(WMA_HANDLE handle, void *scan_chan_info);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800141#endif
142
143uint8_t *wma_get_vdev_address_by_vdev_id(uint8_t vdev_id);
144struct wma_txrx_node *wma_get_interface_by_vdev_id(uint8_t vdev_id);
145bool wma_is_vdev_up(uint8_t vdev_id);
146
147void *wma_get_beacon_buffer_by_vdev_id(uint8_t vdev_id, uint32_t *buffer_size);
148
149uint8_t wma_get_fw_wlan_feat_caps(uint8_t featEnumValue);
150tSirRetStatus wma_post_ctrl_msg(tpAniSirGlobal pMac, tSirMsgQ *pMsg);
151
152void wma_enable_disable_wakeup_event(WMA_HANDLE handle,
153 uint32_t vdev_id,
154 uint32_t bitmap,
155 bool enable);
156void wma_register_wow_wakeup_events(WMA_HANDLE handle, uint8_t vdev_id,
157 uint8_t vdev_type, uint8_t sub_type);
158void wma_register_wow_default_patterns(WMA_HANDLE handle, uint8_t vdev_id);
159int8_t wma_get_hw_mode_idx_from_dbs_hw_list(enum hw_mode_ss_config mac0_ss,
160 enum hw_mode_bandwidth mac0_bw,
161 enum hw_mode_ss_config mac1_ss,
162 enum hw_mode_bandwidth mac1_bw,
163 enum hw_mode_dbs_capab dbs,
164 enum hw_mode_agile_dfs_capab dfs);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530165QDF_STATUS wma_get_hw_mode_from_idx(uint32_t idx,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800166 struct sir_hw_mode_params *hw_mode);
167int8_t wma_get_num_dbs_hw_modes(void);
168bool wma_is_hw_dbs_capable(void);
169bool wma_is_hw_agile_dfs_capable(void);
170int8_t wma_get_mac_id_of_vdev(uint32_t vdev_id);
171void wma_update_intf_hw_mode_params(uint32_t vdev_id, uint32_t mac_id,
172 uint32_t cfgd_hw_mode_index);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530173QDF_STATUS wma_get_old_and_new_hw_index(uint32_t *old_hw_mode_index,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800174 uint32_t *new_hw_mode_index);
175void wma_set_dbs_capability_ut(uint32_t dbs);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530176QDF_STATUS wma_get_dbs_hw_modes(bool *one_by_one_dbs, bool *two_by_two_dbs);
177QDF_STATUS wma_get_current_hw_mode(struct sir_hw_mode_params *hw_mode);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800178bool wma_is_dbs_enable(void);
179bool wma_is_agile_dfs_enable(void);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530180QDF_STATUS wma_get_updated_scan_config(uint32_t *scan_config,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800181 bool dbs_scan,
182 bool dbs_plus_agile_scan,
183 bool single_mac_scan_with_dfs);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530184QDF_STATUS wma_get_updated_fw_mode_config(uint32_t *fw_mode_config,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800185 bool dbs,
186 bool agile_dfs);
187bool wma_get_dbs_scan_config(void);
188bool wma_get_dbs_plus_agile_scan_config(void);
189bool wma_get_single_mac_scan_with_dfs_config(void);
190bool wma_get_dbs_config(void);
191bool wma_get_agile_dfs_config(void);
192bool wma_is_dual_mac_disabled_in_ini(void);
193bool wma_get_prev_dbs_config(void);
194bool wma_get_prev_agile_dfs_config(void);
195bool wma_get_prev_dbs_scan_config(void);
196bool wma_get_prev_dbs_plus_agile_scan_config(void);
197bool wma_get_prev_single_mac_scan_with_dfs_config(void);
198
199#define LRO_IPV4_SEED_ARR_SZ 5
200#define LRO_IPV6_SEED_ARR_SZ 11
201
202/**
203 * struct wma_lro_init_cmd_t - set LRO init parameters
204 * @lro_enable: indicates whether lro is enabled
205 * @tcp_flag: If the TCP flags from the packet do not match
206 * the values in this field after masking with TCP flags mask
207 * below, packet is not LRO eligible
208 * @tcp_flag_mask: field for comparing the TCP values provided
209 * above with the TCP flags field in the received packet
210 * @toeplitz_hash_ipv4: contains seed needed to compute the flow id
211 * 5-tuple toeplitz hash for ipv4 packets
212 * @toeplitz_hash_ipv6: contains seed needed to compute the flow id
213 * 5-tuple toeplitz hash for ipv6 packets
214 */
215struct wma_lro_config_cmd_t {
216 uint32_t lro_enable;
217 uint32_t tcp_flag:9,
218 tcp_flag_mask:9;
219 uint32_t toeplitz_hash_ipv4[LRO_IPV4_SEED_ARR_SZ];
220 uint32_t toeplitz_hash_ipv6[LRO_IPV6_SEED_ARR_SZ];
221};
222
223#if defined(FEATURE_LRO)
224int wma_lro_init(struct wma_lro_config_cmd_t *lro_config);
225#endif
226bool wma_is_scan_simultaneous_capable(void);
Ryan Hsu3c8f79f2015-12-02 16:45:09 -0800227
Gupta, Kapil4cb1d7d2016-04-16 18:16:25 -0700228QDF_STATUS wma_remove_beacon_filter(WMA_HANDLE wma,
229 struct beacon_filter_param *filter_params);
230
231QDF_STATUS wma_add_beacon_filter(WMA_HANDLE wma,
232 struct beacon_filter_param *filter_params);
Ryan Hsu3c8f79f2015-12-02 16:45:09 -0800233#ifdef FEATURE_GREEN_AP
234void wma_setup_egap_support(struct wma_tgt_cfg *tgt_cfg, WMA_HANDLE handle);
235void wma_register_egap_event_handle(WMA_HANDLE handle);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530236QDF_STATUS wma_send_egap_conf_params(WMA_HANDLE handle,
Ryan Hsu3c8f79f2015-12-02 16:45:09 -0800237 struct egap_conf_params *egap_params);
238#else
239static inline void wma_setup_egap_support(struct wma_tgt_cfg *tgt_cfg,
240 WMA_HANDLE handle) {}
241static inline void wma_register_egap_event_handle(WMA_HANDLE handle) {}
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530242static inline QDF_STATUS wma_send_egap_conf_params(WMA_HANDLE handle,
Ryan Hsu3c8f79f2015-12-02 16:45:09 -0800243 struct egap_conf_params *egap_params)
244{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530245 return QDF_STATUS_E_NOSUPPORT;
Ryan Hsu3c8f79f2015-12-02 16:45:09 -0800246}
247#endif
Anurag Chouhanfb54ab02016-02-18 18:00:46 +0530248QDF_STATUS wma_set_tx_power_scale(uint8_t vdev_id, int value);
249QDF_STATUS wma_set_tx_power_scale_decr_db(uint8_t vdev_id, int value);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800250#endif