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Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001/*
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08002 * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08003 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28#ifndef WMA_H
29#define WMA_H
30
31#include "a_types.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053032#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080033#include "osapi_linux.h"
34#include "htc_packet.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053035#include "i_qdf_event.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080036#include "wmi_services.h"
37#include "wmi_unified.h"
38#include "wmi_version.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053039#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080040#include "cfg_api.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053041#include "qdf_status.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080042#include "cds_sched.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080043#include "sir_mac_prot_def.h"
44#include "wma_types.h"
45#include "ol_txrx_types.h"
46#include <linux/workqueue.h>
47#include "utils_api.h"
48#include "lim_types.h"
49#include "wmi_unified_api.h"
Dhanashri Atre12a08392016-02-17 13:10:34 -080050#include "cdp_txrx_cmn.h"
Deepak Dhamdheree2dd5442016-05-27 15:05:51 -070051#include "ol_defines.h"
Govind Singh8c46db92016-05-10 14:17:16 +053052#include "dbglog.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080053
54/* Platform specific configuration for max. no. of fragments */
55#define QCA_OL_11AC_TX_MAX_FRAGS 2
56
57/* Private */
58
Rajeev Kumardaf1c612016-04-05 02:56:41 -070059#define WMA_READY_EVENTID_TIMEOUT 6000
60#define WMA_SERVICE_READY_EXT_TIMEOUT 6000
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080061#define WMA_TGT_SUSPEND_COMPLETE_TIMEOUT 6000
62#define WMA_WAKE_LOCK_TIMEOUT 1000
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080063#define WMA_RESUME_TIMEOUT 6000
64#define MAX_MEM_CHUNKS 32
65
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080066#define WMA_CRASH_INJECT_TIMEOUT 5000
67
Govind Singhefc5ccd2016-04-25 11:11:55 +053068/* MAC ID to PDEV ID mapping is as given below
69 * MAC_ID PDEV_ID
70 * 0 1
71 * 1 2
72 * SOC Level WMI_PDEV_ID_SOC
73 */
74#define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1))
75#define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1))
76
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080077/* In prima 12 HW stations are supported including BCAST STA(staId 0)
78 * and SELF STA(staId 1) so total ASSOC stations which can connect to Prima
79 * SoftAP = 12 - 1(Self STa) - 1(Bcast Sta) = 10 Stations.
80 */
81
82#ifdef WLAN_SOFTAP_VSTA_FEATURE
83#define WMA_MAX_SUPPORTED_STAS 38
84#else
85#define WMA_MAX_SUPPORTED_STAS 12
86#endif
87#define WMA_MAX_SUPPORTED_BSS 5
88
89#define FRAGMENT_SIZE 3072
90
91#define WMA_INVALID_VDEV_ID 0xFF
92#define MAX_MEM_CHUNKS 32
93#define WMA_MAX_VDEV_SIZE 20
94#define WMA_VDEV_TBL_ENTRY_ADD 1
95#define WMA_VDEV_TBL_ENTRY_DEL 0
96
97/* 11A/G channel boundary */
98#define WMA_11A_CHANNEL_BEGIN 34
99#define WMA_11A_CHANNEL_END 165
100#define WMA_11G_CHANNEL_BEGIN 1
101#define WMA_11G_CHANNEL_END 14
102
103#define WMA_11P_CHANNEL_BEGIN (170)
104#define WMA_11P_CHANNEL_END (184)
105
106#define WMA_LOGD(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530107 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_DEBUG, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800108#define WMA_LOGI(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530109 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_INFO, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800110#define WMA_LOGW(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530111 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_WARN, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800112#define WMA_LOGE(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530113 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_ERROR, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800114#define WMA_LOGP(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530115 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800116
117#define WMA_DEBUG_ALWAYS
118
119#ifdef WMA_DEBUG_ALWAYS
120#define WMA_LOGA(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530121 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800122#else
123#define WMA_LOGA(args ...)
124#endif
125
126#define ALIGNED_WORD_SIZE 4
127#define WLAN_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
Govind Singhd76a5b02016-03-08 15:12:14 +0530128#define WMA_WILDCARD_PDEV_ID 0x0
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800129
130/* Prefix used by scan req ids generated on the host */
131#define WMA_HOST_SCAN_REQID_PREFIX 0xA000
132/* Prefix used by roam scan req ids generated on the host */
133#define WMA_HOST_ROAM_SCAN_REQID_PREFIX 0xA800
134/* Prefix used by scan requestor id on host */
135#define WMA_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
136
137#define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */
138
139/* Max offchannel duration */
140#define WMA_BURST_SCAN_MAX_NUM_OFFCHANNELS (3)
141#define WMA_SCAN_NPROBES_DEFAULT (2)
142#define WMA_SCAN_IDLE_TIME_DEFAULT (25)
143#define WMA_P2P_SCAN_MAX_BURST_DURATION (180)
144#define WMA_CTS_DURATION_MS_MAX (32)
145#define WMA_GO_MIN_ACTIVE_SCAN_BURST_DURATION (40)
146#define WMA_GO_MAX_ACTIVE_SCAN_BURST_DURATION (120)
147#define WMA_DWELL_TIME_PASSIVE_DEFAULT (110)
148#define WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE (11)
149#define WMA_3PORT_CONC_SCAN_MAX_BURST_DURATION (25)
150
151#define WMA_SEC_TO_USEC (1000000)
152
153#define BEACON_TX_BUFFER_SIZE (512)
154
155/* WMA_ETHER_TYPE_OFFSET = sa(6) + da(6) */
156#define WMA_ETHER_TYPE_OFFSET (6 + 6)
157/* WMA_ICMP_V6_HEADER_OFFSET = sa(6) + da(6) + eth_type(2) + icmp_v6_hdr(6)*/
158#define WMA_ICMP_V6_HEADER_OFFSET (6 + 6 + 2 + 6)
159/* WMA_ICMP_V6_TYPE_OFFSET = sa(6) + da(6) + eth_type(2) + 40 */
160#define WMA_ICMP_V6_TYPE_OFFSET (6 + 6 + 2 + 40)
161#define WMA_ICMP_V6_HEADER_TYPE (0x3A)
162#define WMA_ICMP_V6_RA_TYPE (0x86)
163#define WMA_ICMP_V6_NS_TYPE (0x87)
164#define WMA_ICMP_V6_NA_TYPE (0x88)
165#define WMA_BCAST_MAC_ADDR (0xFF)
166#define WMA_MCAST_IPV4_MAC_ADDR (0x01)
167#define WMA_MCAST_IPV6_MAC_ADDR (0x33)
168
169
170/* Roaming default values
171 * All time and period values are in milliseconds.
172 * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT.
173 */
174
175#define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4)
176#define WMA_NOISE_FLOOR_DBM_DEFAULT (-96)
177#define WMA_ROAM_RSSI_DIFF_DEFAULT (5)
178#define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100)
179#define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110)
180#define WMA_ROAM_MIN_REST_TIME_DEFAULT (50)
181#define WMA_ROAM_MAX_REST_TIME_DEFAULT (500)
182#define WMA_ROAM_LOW_RSSI_TRIGGER_DEFAULT (20)
183#define WMA_ROAM_LOW_RSSI_TRIGGER_VERYLOW (10)
184#define WMA_ROAM_BEACON_WEIGHT_DEFAULT (14)
185#define WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT (120000)
186#define WMA_ROAM_OPP_SCAN_AGING_PERIOD_DEFAULT (WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT * 5)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800187#define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT (10)
188#define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT (10)
189#define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT_P2P (15)
190#define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT_P2P (45)
191
192#define WMA_INVALID_KEY_IDX 0xff
193#define WMA_DFS_RADAR_FOUND 1
194
195#define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1)
196#define WMA_MIN_RF_CHAINS (1)
197
198#ifdef FEATURE_WLAN_EXTSCAN
199#define WMA_MAX_EXTSCAN_MSG_SIZE 1536
200#define WMA_EXTSCAN_REST_TIME 100
201#define WMA_EXTSCAN_MAX_SCAN_TIME 50000
202#define WMA_EXTSCAN_BURST_DURATION 150
203#endif
204
205#define WMA_BCN_BUF_MAX_SIZE 2500
206#define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc)))
207#define WMA_MAX_NOA_DESCRIPTORS 4
208
209#define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1)
210
211#define WMA_WOW_PTRN_MASK_VALID 0xFF
212#define WMA_NUM_BITS_IN_BYTE 8
213
214#define WMA_AP_WOW_DEFAULT_PTRN_MAX 4
215#define WMA_STA_WOW_DEFAULT_PTRN_MAX 4
216
217#define WMA_BSS_STATUS_STARTED 0x1
218#define WMA_BSS_STATUS_STOPPED 0x2
219
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800220#define WMA_TARGET_REQ_TYPE_VDEV_START 0x1
221#define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2
222#define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3
223
224#define WMA_PEER_ASSOC_CNF_START 0x01
225#define WMA_PEER_ASSOC_TIMEOUT (3000) /* 3 seconds */
226
Sandeep Puligilla19ddda22016-01-05 12:18:02 -0800227#define WMA_DELETE_STA_RSP_START 0x02
228#define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */
229
230#define WMA_DEL_P2P_SELF_STA_RSP_START 0x03
231
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800232#define WMA_VDEV_START_REQUEST_TIMEOUT (3000) /* 3 seconds */
233#define WMA_VDEV_STOP_REQUEST_TIMEOUT (3000) /* 3 seconds */
234
Varun Reddy Yeturu83ccb9b2016-06-29 11:55:41 -0700235#define WMA_TGT_INVALID_SNR 0x127
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800236
237#define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */
238#define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */
239#define WMA_MAX_NUM_ARGS 8
240
241#define WMA_SMPS_MASK_LOWER_16BITS 0xFF
242#define WMA_SMPS_MASK_UPPER_3BITS 0x7
243#define WMA_SMPS_PARAM_VALUE_S 29
244
245#define WMA_MAX_SCAN_ID 0x00FF
246
247/*
248 * Setting the Tx Comp Timeout to 1 secs.
249 * TODO: Need to Revist the Timing
250 */
251#define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000
252#define WMA_TX_FRAME_BUFFER_NO_FREE 0
253#define WMA_TX_FRAME_BUFFER_FREE 1
254
255
256/* Default InActivity Time is 200 ms */
257#define POWERSAVE_DEFAULT_INACTIVITY_TIME 200
258
259/* Default Listen Interval */
260#define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1
261
262/*
263 * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID
264 * instead of assigning it to the last valid wmi
265 * cmd+1 to avoid updating this when a command is
266 * added/deleted.
267 */
268#define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1)
269
270#define WMA_NLO_FREQ_THRESH 1000 /* in MHz */
271#define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */
272#define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */
273
274/* Default rssi threshold defined in CFG80211 */
275#define WMA_RSSI_THOLD_DEFAULT -300
276
277#ifdef FEATURE_WLAN_SCAN_PNO
278#define WMA_PNO_MATCH_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */
279#define WMA_PNO_SCAN_COMPLETE_WAKE_LOCK_TIMEOUT (2 * 1000) /* in msec */
280#endif
281#define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */
282#define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
283#define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
284#define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
285#ifdef FEATURE_WLAN_AUTO_SHUTDOWN
286#define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION (5 * 1000) /* in msec */
287#endif
288#define WMA_BMISS_EVENT_WAKE_LOCK_DURATION (4 * 1000) /* in msec */
Sandeep Puligilla19ddda22016-01-05 12:18:02 -0800289#define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION (3 * 1000) /* in msec */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800290
291#define WMA_TXMIC_LEN 8
292#define WMA_RXMIC_LEN 8
293
294/*
295 * Length = (2 octets for Index and CTWin/Opp PS) and
296 * (13 octets for each NOA Descriptors)
297 */
298
299#define WMA_P2P_NOA_IE_OPP_PS_SET (0x80)
300#define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F)
301
302#define WMA_P2P_IE_ID 0xdd
303#define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a }
304#define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */
305#define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */
306
307/* P2P Sub element defintions (according to table 5 of Wifi's P2P spec) */
308#define WMA_P2P_SUB_ELEMENT_STATUS 0
309#define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1
310#define WMA_P2P_SUB_ELEMENT_CAPABILITY 2
311#define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3
312#define WMA_P2P_SUB_ELEMENT_GO_INTENT 4
313#define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5
314#define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6
315#define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7
316#define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8
317#define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9
318#define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10
319#define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11
320#define WMA_P2P_SUB_ELEMENT_NOA 12
321#define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13
322#define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14
323#define WMA_P2P_SUB_ELEMENT_GROUP_ID 15
324#define WMA_P2P_SUB_ELEMENT_INTERFACE 16
325#define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17
326#define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18
327#define WMA_P2P_SUB_ELEMENT_VENDOR 221
328
329/* Macros for handling unaligned memory accesses */
330#define P2PIE_PUT_LE16(a, val) \
331 do { \
332 (a)[1] = ((u16) (val)) >> 8; \
333 (a)[0] = ((u16) (val)) & 0xff; \
334 } while (0)
335
336#define P2PIE_PUT_LE32(a, val) \
337 do { \
338 (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
339 (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
340 (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
341 (a)[0] = (u8) (((u32) (val)) & 0xff); \
342 } while (0)
343
344
345#define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1
346
347#define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1
348#define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2
349#define WMA_DEFAULT_SIFS_BURST_DURATION 8160
350
351#define WMA_VHT_PPS_PAID_MATCH 1
352#define WMA_VHT_PPS_GID_MATCH 2
353#define WMA_VHT_PPS_DELIM_CRC_FAIL 3
354
355#define WMA_DFS_MAX_20M_SUB_CH 8
Vishwajith Upendrabf673e72016-01-19 16:05:40 -0800356#define WMA_80MHZ_START_CENTER_CH_DIFF 6
357#define WMA_160MHZ_START_CENTER_CH_DIFF 14
358#define WMA_NEXT_20MHZ_START_CH_DIFF 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800359
360#define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF
361
362/**
363 * struct probeTime_dwellTime - probe time, dwell time map
364 * @dwell_time: dwell time
365 * @probe_time: repeat probe time
366 */
367typedef struct probeTime_dwellTime {
368 uint8_t dwell_time;
369 uint8_t probe_time;
370} t_probeTime_dwellTime;
371
372static const t_probeTime_dwellTime
373 probe_time_dwell_time_map[WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE] = {
374 {28, 0}, /* 0 SSID */
375 {28, 20}, /* 1 SSID */
376 {28, 20}, /* 2 SSID */
377 {28, 20}, /* 3 SSID */
378 {28, 20}, /* 4 SSID */
379 {28, 20}, /* 5 SSID */
380 {28, 20}, /* 6 SSID */
381 {28, 11}, /* 7 SSID */
382 {28, 11}, /* 8 SSID */
383 {28, 11}, /* 9 SSID */
384 {28, 8} /* 10 SSID */
385};
386
Rajeev Kumar8e3e2832015-11-06 16:02:54 -0800387typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo);
388
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800389/**
390 * enum t_wma_drv_type - wma driver type
391 * @WMA_DRIVER_TYPE_PRODUCTION: production driver type
392 * @WMA_DRIVER_TYPE_MFG: manufacture driver type
393 * @WMA_DRIVER_TYPE_INVALID: invalid driver type
394 */
395typedef enum {
396 WMA_DRIVER_TYPE_PRODUCTION = 0,
397 WMA_DRIVER_TYPE_MFG = 1,
398 WMA_DRIVER_TYPE_INVALID = 0x7FFFFFFF
399} t_wma_drv_type;
400
401#ifdef FEATURE_WLAN_TDLS
402/**
Kabilan Kannan421714b2015-11-23 04:44:59 -0800403 * enum t_wma_tdls_mode - TDLS mode
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800404 * @WMA_TDLS_SUPPORT_NOT_ENABLED: tdls is disable
405 * @WMA_TDLS_SUPPORT_DISABLED: suppress implicit trigger and not respond to peer
406 * @WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY: suppress implicit trigger,
407 * but respond to the peer
408 * @WMA_TDLS_SUPPORT_ENABLED: implicit trigger
Kabilan Kannan421714b2015-11-23 04:44:59 -0800409 * @WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL: External control means
410 * implicit trigger but only to a peer mac configured by user space.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800411 */
412typedef enum {
413 WMA_TDLS_SUPPORT_NOT_ENABLED = 0,
414 WMA_TDLS_SUPPORT_DISABLED,
415 WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY,
416 WMA_TDLS_SUPPORT_ENABLED,
Kabilan Kannan421714b2015-11-23 04:44:59 -0800417 WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800418} t_wma_tdls_mode;
419
420/**
421 * enum wma_tdls_peer_notification - TDLS events
422 * @WMA_TDLS_SHOULD_DISCOVER: tdls discovery recommended for peer (always based
423 * on tx bytes per second > tx_discover threshold
424 * NB: notification will be re-sent after
425 * discovery_request_interval_ms
426 * @WMA_TDLS_SHOULD_TEARDOWN: tdls link tear down recommended for peer
427 * due to tx bytes per second below
428 * tx_teardown_threshold
429 * NB: this notification sent once
430 * @WMA_TDLS_PEER_DISCONNECTED: tx peer TDLS link tear down complete
431 */
432enum wma_tdls_peer_notification {
433 WMA_TDLS_SHOULD_DISCOVER,
434 WMA_TDLS_SHOULD_TEARDOWN,
435 WMA_TDLS_PEER_DISCONNECTED,
436};
437
438/**
439 * enum wma_tdls_peer_reason - TDLS peer reason
440 * @WMA_TDLS_TEARDOWN_REASON_TX: tdls teardown recommended due to low transmits
441 * @WMA_TDLS_TEARDOWN_REASON_RATE: tdls tear down recommended due to
442 * packet rates < AP rates
443 * @WMA_TDLS_TEARDOWN_REASON_RSSI: tdls link tear down recommended
444 * due to poor RSSI
445 * @WMA_TDLS_TEARDOWN_REASON_SCAN: tdls link tear down recommended
446 * due to offchannel scan
447 * @WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE: tdls peer disconnected
448 * due to peer deletion
449 */
450enum wma_tdls_peer_reason {
451 WMA_TDLS_TEARDOWN_REASON_TX,
452 WMA_TDLS_TEARDOWN_REASON_RATE,
453 WMA_TDLS_TEARDOWN_REASON_RSSI,
454 WMA_TDLS_TEARDOWN_REASON_SCAN,
455 WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE,
456};
457#endif /* FEATURE_WLAN_TDLS */
458
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800459/**
Govind Singhd76a5b02016-03-08 15:12:14 +0530460 * enum wma_rx_exec_ctx - wma rx execution context
461 * @WMA_RX_WORK_CTX: work queue context execution
462 * @WMA_RX_TASKLET_CTX: tasklet context execution
463 * @WMA_RX_SERIALIZER_CTX: MC thread context execution
464 *
465 */
466enum wma_rx_exec_ctx {
467 WMA_RX_WORK_CTX,
468 WMA_RX_TASKLET_CTX,
469 WMA_RX_SERIALIZER_CTX
470};
Krunal Soni2e48d012016-05-02 16:55:26 -0700471
472/**
473 * enum wma_phy_idx
474 * @PHY1: to notify caller that PHY1 specific param needed
475 * @PHY2: to notify caller that PHY2 specific param needed
476 * @PHY1_PHY2: to notify caller that both PHY's param needed
477 * Note: Firmware sends phy map in terms of bitmask, so enum
478 * also needs to be defined that way.
479 *
480 * For example, 0x3 = 0011 = BIT0 corresponds to one phy and
481 * BIT1 coresponds to another phy. There is no direct relation between
482 * each bit to particular PHY (ex. PHYA or PHYB).
483 *
484 * In simple terms, 3 means referring both PHYs & 1 or 2 means
485 * referring to either PHYA or PHYB.
486 */
487enum wma_phy_idx {
488 PHY1 = 0x1, /* 0x1 */
489 PHY2, /* 0x2 */
490 PHY1_PHY2, /* 0x3 */
491};
492
Govind Singhd76a5b02016-03-08 15:12:14 +0530493/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800494 * struct wma_mem_chunk - memory chunks
495 * @vaddr: virtual address
496 * @paddr: physical address
497 * @memctx: dma mapped memory
498 * @len: length of data
499 * @req_id: request id
500 *
501 * memory chunck allocated by Host to be managed by FW
502 * used only for low latency interfaces like pcie
503 */
504struct wma_mem_chunk {
505 uint32_t *vaddr;
506 uint32_t paddr;
Anurag Chouhan6d760662016-02-20 16:05:43 +0530507 qdf_dma_mem_context(memctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800508 uint32_t len;
509 uint32_t req_id;
510};
511
512/**
513 * struct p2p_scan_param - p2p scan listen parameters
514 * @scan_id: scan id
515 * @p2p_scan_type: p2p scan type
516 */
517struct p2p_scan_param {
518 uint32_t scan_id;
519 tSirP2pScanType p2p_scan_type;
520};
521
522/**
523 * struct scan_param - scan parameters
524 * @scan_id: scan id
525 * @scan_requestor_id: scan requestor id
526 * @p2p_scan_type: p2p scan type
527 */
528struct scan_param {
529 uint32_t scan_id;
530 uint32_t scan_requestor_id;
531 tSirP2pScanType p2p_scan_type;
Deepak Dhamdhered97bfb32015-10-11 15:16:18 -0700532 uint32_t chan_freq;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800533};
534
535/**
536 * struct beacon_info - structure to store beacon template
537 * @buf: skb ptr
538 * @len: length
539 * @dma_mapped: is it dma mapped or not
540 * @tim_ie_offset: TIM IE offset
541 * @dtim_count: DTIM count
542 * @seq_no: sequence no
543 * @noa_sub_ie: NOA sub IE
544 * @noa_sub_ie_len: NOA sub IE length
545 * @noa_ie: NOA IE
546 * @p2p_ie_offset: p2p IE offset
547 * @lock: lock
548 */
549struct beacon_info {
Nirav Shahcbc6d722016-03-01 16:24:53 +0530550 qdf_nbuf_t buf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800551 uint32_t len;
552 uint8_t dma_mapped;
553 uint32_t tim_ie_offset;
554 uint8_t dtim_count;
555 uint16_t seq_no;
556 uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)];
557 uint16_t noa_sub_ie_len;
558 uint8_t *noa_ie;
559 uint16_t p2p_ie_offset;
Anurag Chouhana37b5b72016-02-21 14:53:42 +0530560 qdf_spinlock_t lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800561};
562
563/**
564 * struct beacon_tim_ie - structure to store TIM IE of beacon
565 * @tim_ie: tim ie
566 * @tim_len: tim ie length
567 * @dtim_count: dtim count
568 * @dtim_period: dtim period
569 * @tim_bitctl: tim bit control
570 * @tim_bitmap: tim bitmap
571 */
572struct beacon_tim_ie {
573 uint8_t tim_ie;
574 uint8_t tim_len;
575 uint8_t dtim_count;
576 uint8_t dtim_period;
577 uint8_t tim_bitctl;
578 uint8_t tim_bitmap[1];
579} __ATTRIB_PACK;
580
581/**
582 * struct pps - packet power save parameter
583 * @paid_match_enable: paid match enable
584 * @gid_match_enable: gid match enable
585 * @tim_clear: time clear
586 * @dtim_clear: dtim clear
587 * @eof_delim: eof delim
588 * @mac_match: mac match
589 * @delim_fail: delim fail
590 * @nsts_zero: nsts zero
591 * @rssi_chk: RSSI check
592 * @ebt_5g: ebt 5GHz
593 */
594struct pps {
595 bool paid_match_enable;
596 bool gid_match_enable;
597 bool tim_clear;
598 bool dtim_clear;
599 bool eof_delim;
600 bool mac_match;
601 bool delim_fail;
602 bool nsts_zero;
603 bool rssi_chk;
604 bool ebt_5g;
605};
606
607/**
608 * struct qpower_params - qpower related parameters
609 * @max_ps_poll_cnt: max ps poll count
610 * @max_tx_before_wake: max tx before wake
611 * @spec_ps_poll_wake_interval: ps poll wake interval
612 * @max_spec_nodata_ps_poll: no data ps poll
613 */
614struct qpower_params {
615 uint32_t max_ps_poll_cnt;
616 uint32_t max_tx_before_wake;
617 uint32_t spec_ps_poll_wake_interval;
618 uint32_t max_spec_nodata_ps_poll;
619};
620
621
622/**
623 * struct gtx_config_t - GTX config
624 * @gtxRTMask: for HT and VHT rate masks
625 * @gtxUsrcfg: host request for GTX mask
626 * @gtxPERThreshold: PER Threshold (default: 10%)
627 * @gtxPERMargin: PER margin (default: 2%)
628 * @gtxTPCstep: TCP step (default: 1)
629 * @gtxTPCMin: TCP min (default: 5)
630 * @gtxBWMask: BW mask (20/40/80/160 Mhz)
631 */
632typedef struct {
633 uint32_t gtxRTMask[2];
634 uint32_t gtxUsrcfg;
635 uint32_t gtxPERThreshold;
636 uint32_t gtxPERMargin;
637 uint32_t gtxTPCstep;
638 uint32_t gtxTPCMin;
639 uint32_t gtxBWMask;
640} gtx_config_t;
641
642/**
643 * struct pdev_cli_config_t - store pdev parameters
644 * @ani_enable: ANI is enabled/disable on target
645 * @ani_poll_len: store ANI polling period
646 * @ani_listen_len: store ANI listening period
647 * @ani_ofdm_level: store ANI OFDM immunity level
648 * @ani_cck_level: store ANI CCK immunity level
649 * @cwmenable: Dynamic bw is enable/disable in fw
650 * @txchainmask: tx chain mask
651 * @rxchainmask: rx chain mask
652 * @txpow2g: tx power limit for 2GHz
653 * @txpow5g: tx power limit for 5GHz
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800654 * @burst_enable: is burst enable/disable
655 * @burst_dur: burst duration
656 *
657 * This structure stores pdev parameters.
658 * Some of these parameters are set in fw and some
659 * parameters are only maintained in host.
660 */
661typedef struct {
662 uint32_t ani_enable;
663 uint32_t ani_poll_len;
664 uint32_t ani_listen_len;
665 uint32_t ani_ofdm_level;
666 uint32_t ani_cck_level;
667 uint32_t cwmenable;
668 uint32_t cts_cbw;
669 uint32_t txchainmask;
670 uint32_t rxchainmask;
671 uint32_t txpow2g;
672 uint32_t txpow5g;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800673 uint32_t burst_enable;
674 uint32_t burst_dur;
675} pdev_cli_config_t;
676
677/**
678 * struct vdev_cli_config_t - store vdev parameters
679 * @nss: nss width
680 * @ldpc: is ldpc is enable/disable
681 * @tx_stbc: TX STBC is enable/disable
682 * @rx_stbc: RX STBC is enable/disable
683 * @shortgi: short gi is enable/disable
684 * @rtscts_en: RTS/CTS is enable/disable
685 * @chwidth: channel width
686 * @tx_rate: tx rate
687 * @ampdu: ampdu size
688 * @amsdu: amsdu size
689 * @erx_adjust: enable/disable early rx enable
690 * @erx_bmiss_num: target bmiss number per sample
691 * @erx_bmiss_cycle: sample cycle
692 * @erx_slop_step: slop_step value
693 * @erx_init_slop: init slop
694 * @erx_adj_pause: pause adjust enable/disable
695 * @erx_dri_sample: enable/disable drift sample
696 * @pps_params: packet power save parameters
697 * @qpower_params: qpower parameters
698 * @gtx_info: GTX offload info
699 *
700 * This structure stores vdev parameters.
701 * Some of these parameters are set in fw and some
702 * parameters are only maintained in host.
703 */
704typedef struct {
705 uint32_t nss;
706 uint32_t ldpc;
707 uint32_t tx_stbc;
708 uint32_t rx_stbc;
709 uint32_t shortgi;
710 uint32_t rtscts_en;
711 uint32_t chwidth;
712 uint32_t tx_rate;
713 uint32_t ampdu;
714 uint32_t amsdu;
715 uint32_t erx_adjust;
716 uint32_t erx_bmiss_num;
717 uint32_t erx_bmiss_cycle;
718 uint32_t erx_slop_step;
719 uint32_t erx_init_slop;
720 uint32_t erx_adj_pause;
721 uint32_t erx_dri_sample;
722 struct pps pps_params;
723 struct qpower_params qpower_params;
724 gtx_config_t gtx_info;
725} vdev_cli_config_t;
726
727/**
728 * struct wma_wow - store wow patterns
729 * @magic_ptrn_enable: magic pattern enable/disable
730 * @wow_enable: wow enable/disable
731 * @wow_enable_cmd_sent: is wow enable command sent to fw
732 * @deauth_enable: is deauth wakeup enable/disable
733 * @disassoc_enable: is disassoc wakeup enable/disable
734 * @bmiss_enable: is bmiss wakeup enable/disable
735 * @gtk_pdev_enable: is GTK based wakeup enable/disable
736 * @gtk_err_enable: is GTK error wakeup enable/disable
737 * @lphb_cache: lphb cache
738 *
739 * This structure stores wow patterns and
740 * wow related parameters in host.
741 */
742struct wma_wow {
743 bool magic_ptrn_enable;
744 bool wow_enable;
745 bool wow_enable_cmd_sent;
746 bool deauth_enable;
747 bool disassoc_enable;
748 bool bmiss_enable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800749 bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS];
750#ifdef FEATURE_WLAN_LPHB
751 /* currently supports only vdev 0.
752 * cache has two entries: one for TCP and one for UDP.
753 */
754 tSirLPHBReq lphb_cache[2];
755#endif
756};
757
758#ifdef WLAN_FEATURE_11W
759#define CMAC_IPN_LEN (6)
760#define WMA_IGTK_KEY_INDEX_4 (4)
761#define WMA_IGTK_KEY_INDEX_5 (5)
762
763/**
764 * struct wma_igtk_ipn_t - GTK IPN info
765 * @ipn: IPN info
766 */
767typedef struct {
768 uint8_t ipn[CMAC_IPN_LEN];
769} wma_igtk_ipn_t;
770
771/**
772 * struct wma_igtk_key_t - GTK key
773 * @key_length: key length
774 * @key: key
775 * @key_id: key id
776 */
777typedef struct {
778 uint16_t key_length;
779 uint8_t key[CSR_AES_KEY_LEN];
780
781 /* IPN is maintained per iGTK keyID
782 * 0th index for iGTK keyID = 4;
783 * 1st index for iGTK KeyID = 5
784 */
785 wma_igtk_ipn_t key_id[2];
786} wma_igtk_key_t;
787#endif
788
789/**
790 * struct vdev_restart_params_t - vdev restart parameters
791 * @vdev_id: vdev id
792 * @ssid: ssid
793 * @flags: flags
794 * @requestor_id: requestor id
795 * @chan: channel
796 * @hidden_ssid_restart_in_progress: hidden ssid restart flag
797 * @ssidHidden: is ssid hidden or not
798 */
799typedef struct {
800 A_UINT32 vdev_id;
801 wmi_ssid ssid;
802 A_UINT32 flags;
803 A_UINT32 requestor_id;
804 A_UINT32 disable_hw_ack;
805 wmi_channel chan;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530806 qdf_atomic_t hidden_ssid_restart_in_progress;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800807 uint8_t ssidHidden;
808} vdev_restart_params_t;
809
810/**
811 * struct wma_txrx_node - txrx node
812 * @addr: mac address
813 * @bssid: bssid
814 * @handle: wma handle
815 * @beacon: beacon info
816 * @vdev_restart_params: vdev restart parameters
817 * @config: per vdev config parameters
818 * @scan_info: scan info
819 * @type: type
820 * @sub_type: sub type
821 * @nlo_match_evt_received: is nlo match event received or not
822 * @pno_in_progress: is pno in progress or not
823 * @plm_in_progress: is plm in progress or not
824 * @ptrn_match_enable: is pattern match is enable or not
825 * @num_wow_default_patterns: number of default wow patterns configured for vdev
826 * @num_wow_user_patterns: number of user wow patterns configured for vdev
827 * @conn_state: connection state
828 * @beaconInterval: beacon interval
829 * @llbCoexist: 11b coexist
830 * @shortSlotTimeSupported: is short slot time supported or not
831 * @dtimPeriod: DTIM period
832 * @chanmode: channel mode
833 * @vht_capable: VHT capablity flag
834 * @ht_capable: HT capablity flag
835 * @mhz: channel frequency in KHz
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700836 * @chan_width: channel bandwidth
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800837 * @vdev_up: is vdev up or not
838 * @tsfadjust: TSF adjust
839 * @addBssStaContext: add bss context
840 * @aid: association id
841 * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled
842 * @key: GTK key
843 * @uapsd_cached_val: uapsd cached value
844 * @stats_rsp: stats response
845 * @fw_stats_set: fw stats value
846 * @del_staself_req: delete sta self request
847 * @bss_status: bss status
848 * @rate_flags: rate flags
849 * @nss: nss value
850 * @is_channel_switch: is channel switch
851 * @pause_bitmap: pause bitmap
852 * @tx_power: tx power in dbm
853 * @max_tx_power: max tx power in dbm
854 * @nwType: network type (802.11a/b/g/n/ac)
855 * @staKeyParams: sta key parameters
856 * @ps_enabled: is powersave enable/disable
857 * @dtim_policy: DTIM policy
858 * @peer_count: peer count
859 * @roam_synch_in_progress: flag is in progress or not
860 * @plink_status_req: link status request
861 * @psnr_req: snr request
862 * @delay_before_vdev_stop: delay
863 * @tx_streams: number of tx streams can be used by the vdev
864 * @rx_streams: number of rx streams can be used by the vdev
865 * @chain_mask: chain mask can be used by the vdev
866 * @mac_id: the mac on which vdev is on
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530867 * @wep_default_key_idx: wep default index for group key
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800868 *
869 * It stores parameters per vdev in wma.
870 */
871struct wma_txrx_node {
872 uint8_t addr[IEEE80211_ADDR_LEN];
873 uint8_t bssid[IEEE80211_ADDR_LEN];
874 void *handle;
875 struct beacon_info *beacon;
876 vdev_restart_params_t vdev_restart_params;
877 vdev_cli_config_t config;
878 struct scan_param scan_info;
879 struct p2p_scan_param p2p_scan_info;
880 uint32_t type;
881 uint32_t sub_type;
882#ifdef FEATURE_WLAN_SCAN_PNO
883 bool nlo_match_evt_received;
884 bool pno_in_progress;
885#endif
Srinivas Girigowda515a9ef2015-12-11 11:00:48 -0800886#ifdef FEATURE_WLAN_ESE
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800887 bool plm_in_progress;
888#endif
889 bool ptrn_match_enable;
890 uint8_t num_wow_default_patterns;
891 uint8_t num_wow_user_patterns;
892 bool conn_state;
893 tSirMacBeaconInterval beaconInterval;
894 uint8_t llbCoexist;
895 uint8_t shortSlotTimeSupported;
896 uint8_t dtimPeriod;
897 WLAN_PHY_MODE chanmode;
898 uint8_t vht_capable;
899 uint8_t ht_capable;
900 A_UINT32 mhz;
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700901 enum phy_ch_width chan_width;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800902 bool vdev_up;
903 uint64_t tsfadjust;
904 void *addBssStaContext;
905 uint8_t aid;
906 uint8_t rmfEnabled;
907#ifdef WLAN_FEATURE_11W
908 wma_igtk_key_t key;
909#endif /* WLAN_FEATURE_11W */
910 uint32_t uapsd_cached_val;
911 tAniGetPEStatsRsp *stats_rsp;
912 uint8_t fw_stats_set;
913 void *del_staself_req;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530914 qdf_atomic_t bss_status;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800915 uint8_t rate_flags;
916 uint8_t nss;
917 bool is_channel_switch;
918 uint16_t pause_bitmap;
Amar Singhala297bfa2015-10-15 15:07:29 -0700919 int8_t tx_power;
920 int8_t max_tx_power;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800921 uint32_t nwType;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800922 void *staKeyParams;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800923 bool ps_enabled;
924 uint32_t dtim_policy;
925 uint32_t peer_count;
926 bool roam_synch_in_progress;
927 void *plink_status_req;
928 void *psnr_req;
929 uint8_t delay_before_vdev_stop;
930#ifdef FEATURE_WLAN_EXTSCAN
931 bool extscan_in_progress;
932#endif
933 uint32_t alt_modulated_dtim;
934 bool alt_modulated_dtim_enabled;
935 uint32_t tx_streams;
936 uint32_t rx_streams;
937 uint32_t chain_mask;
938 uint32_t mac_id;
Varun Reddy Yeturu30bc42c2016-02-04 10:07:30 -0800939 bool roaming_in_progress;
Varun Reddy Yeturu5ab47462016-05-08 18:08:11 -0700940 int32_t roam_synch_delay;
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -0700941 uint8_t nss_2g;
942 uint8_t nss_5g;
Peng Xu8fdaa492016-06-22 10:20:47 -0700943 bool p2p_lo_in_progress;
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530944 uint8_t wep_default_key_idx;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800945};
946
947#if defined(QCA_WIFI_FTM)
948#define MAX_UTF_EVENT_LENGTH 2048
949#define MAX_WMI_UTF_LEN 252
950
951/**
952 * struct SEG_HDR_INFO_STRUCT - header info
953 * @len: length
954 * @msgref: message refrence
955 * @segmentInfo: segment info
956 * @pad: padding
957 */
958typedef struct {
959 A_UINT32 len;
960 A_UINT32 msgref;
961 A_UINT32 segmentInfo;
962 A_UINT32 pad;
963} SEG_HDR_INFO_STRUCT;
964
965/**
966 * struct utf_event_info - UTF event info
967 * @data: data ptr
968 * @length: length
969 * @offset: offset
970 * @currentSeq: curent squence
971 * @expectedSeq: expected sequence
972 */
973struct utf_event_info {
974 uint8_t *data;
975 uint32_t length;
Anurag Chouhan6d760662016-02-20 16:05:43 +0530976 qdf_size_t offset;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800977 uint8_t currentSeq;
978 uint8_t expectedSeq;
979};
980#endif
981
982/**
983 * struct scan_timer_info - scan timer info
984 * @vdev_id: vdev id
985 * @scan_id: scan id
986 */
987typedef struct {
988 uint8_t vdev_id;
989 uint32_t scan_id;
990} scan_timer_info;
991
992/**
993 * struct ibss_power_save_params - IBSS power save parameters
994 * @atimWindowLength: ATIM window length
995 * @isPowerSaveAllowed: is power save allowed
996 * @isPowerCollapseAllowed: is power collapsed allowed
997 * @isAwakeonTxRxEnabled: is awake on tx/rx enabled
998 * @inactivityCount: inactivity count
999 * @txSPEndInactivityTime: tx SP end inactivity time
1000 * @ibssPsWarmupTime: IBSS power save warm up time
1001 * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable
1002 */
1003typedef struct {
1004 uint32_t atimWindowLength;
1005 uint32_t isPowerSaveAllowed;
1006 uint32_t isPowerCollapseAllowed;
1007 uint32_t isAwakeonTxRxEnabled;
1008 uint32_t inactivityCount;
1009 uint32_t txSPEndInactivityTime;
1010 uint32_t ibssPsWarmupTime;
1011 uint32_t ibssPs1RxChainInAtimEnable;
1012} ibss_power_save_params;
1013
1014/**
1015 * struct dbs_hw_mode_info - WLAN_DBS_HW_MODES_TLV Format
1016 * @tlv_header: TLV header, TLV tag and len; tag equals WMITLV_TAG_ARRAY_UINT32
1017 * @hw_mode_list: WLAN_DBS_HW_MODE_LIST entries
1018 */
1019struct dbs_hw_mode_info {
1020 uint32_t tlv_header;
1021 uint32_t *hw_mode_list;
1022};
1023
1024/* Current HTC credit is 2, pool size of 50 is sufficient */
1025#define WMI_DESC_POOL_MAX 50
1026
1027/**
1028 * struct wmi_desc_t - wmi management Tx descriptor.
1029 * @tx_cmpl_cb_func: completion callback function, when DL completion and
1030 * OTA done.
1031 * @ota_post_proc_func: Post process callback function registered.
1032 * @nbuf: Network buffer to be freed.
1033 * @desc_id: WMI descriptor.
1034 */
1035
1036struct wmi_desc_t {
1037 pWMATxRxCompFunc tx_cmpl_cb;
1038 pWMAAckFnTxComp ota_post_proc_cb;
Nirav Shahcbc6d722016-03-01 16:24:53 +05301039 qdf_nbuf_t nbuf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001040 uint32_t desc_id;
1041};
1042
1043/**
1044 * union wmi_desc_elem_t - linked list wmi desc pool.
1045 * @next: Pointer next descritor in the pool.
1046 * @wmi_desc: wmi descriptor element.
1047 */
1048union wmi_desc_elem_t {
1049 union wmi_desc_elem_t *next;
1050 struct wmi_desc_t wmi_desc;
1051};
1052
1053/**
1054 * struct dual_mac_config - Dual MAC configurations
1055 * @prev_scan_config: Previous scan configuration
1056 * @prev_fw_mode_config: Previous FW mode configuration
1057 * @cur_scan_config: Current scan configuration
1058 * @cur_fw_mode_config: Current FW mode configuration
1059 * @req_scan_config: Requested scan configuration
1060 * @req_fw_mode_config: Requested FW mode configuration
1061 */
1062struct dual_mac_config {
1063 uint32_t prev_scan_config;
1064 uint32_t prev_fw_mode_config;
1065 uint32_t cur_scan_config;
1066 uint32_t cur_fw_mode_config;
1067 uint32_t req_scan_config;
1068 uint32_t req_fw_mode_config;
1069
1070};
1071
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001072
1073/**
Komal Seelam02d09342016-02-23 18:03:19 +05301074 * struct wma_ini_config - Structure to hold wma ini configuration
1075 * @max_no_of_peers: Max Number of supported
1076 *
1077 * Placeholder for WMA ini parameters.
1078 */
1079struct wma_ini_config {
1080 uint8_t max_no_of_peers;
1081};
1082
1083/**
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301084 * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID
1085 * @num_channels: Number of channels
1086 * @channel_list: Channel list
1087 */
1088struct wma_valid_channels {
1089 uint8_t num_channels;
1090 uint8_t channel_list[MAX_NUM_CHAN];
1091};
1092
Krunal Soni2e48d012016-05-02 16:55:26 -07001093/**
1094 * struct hw_mode_idx_to_mac_cap_idx - map between hw_mode to capabilities
1095 * @num_of_macs: number of macs/PHYs for given hw_mode through hw_mode_id
1096 * @mac_cap_idx: index of the mac/PHY for given hw_mode through hw_mode_id
1097 * @hw_mode_id: given hw_mode id
1098 */
1099struct hw_mode_idx_to_mac_cap_idx {
1100 uint8_t num_of_macs;
1101 uint8_t mac_cap_idx;
1102 uint8_t hw_mode_id;
1103};
1104
1105/**
1106 * struct extended_caps - new extended caps given by firmware
1107 * @num_hw_modes: number of hardware modes for current SOC
1108 * @each_hw_mode_cap: hw mode id to phy id mapping
1109 * @each_phy_cap_per_hwmode: PHY's caps for each hw mode
1110 * @num_phy_for_hal_reg_cap: number of phy for hal reg cap
1111 * @hw_mode_to_mac_cap_map: map between hw_mode to capabilities
1112 */
1113struct extended_caps {
1114 WMI_SOC_MAC_PHY_HW_MODE_CAPS num_hw_modes;
1115 WMI_HW_MODE_CAPABILITIES *each_hw_mode_cap;
1116 WMI_MAC_PHY_CAPABILITIES *each_phy_cap_per_hwmode;
1117 WMI_SOC_HAL_REG_CAPABILITIES num_phy_for_hal_reg_cap;
1118 WMI_HAL_REG_CAPABILITIES_EXT *each_phy_hal_reg_cap;
1119 struct hw_mode_idx_to_mac_cap_idx *hw_mode_to_mac_cap_map;
1120};
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301121
1122/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001123 * struct t_wma_handle - wma context
1124 * @wmi_handle: wmi handle
1125 * @htc_handle: htc handle
1126 * @cds_context: cds handle
1127 * @mac_context: mac context
1128 * @wma_ready_event: wma rx ready event
1129 * @wma_resume_event: wma resume event
1130 * @target_suspend: target suspend event
1131 * @recovery_event: wma FW recovery event
1132 * @max_station: max stations
1133 * @max_bssid: max bssid
1134 * @frame_xln_reqd: frame transmission required
1135 * @driver_type: driver type
1136 * @myaddr: current mac address
1137 * @hwaddr: mac address from EEPROM
1138 * @target_abi_vers: target firmware version
1139 * @final_abi_vers: The final ABI version to be used for communicating
1140 * @target_fw_version: Target f/w build version
1141 * @lpss_support: LPSS feature is supported in target or not
Ryan Hsu3c8f79f2015-12-02 16:45:09 -08001142 * @egap_support: Enhanced Green AP support flag
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001143 * @wmi_ready: wmi status flag
1144 * @wlan_init_status: wlan init status
Anurag Chouhanf04e84f2016-03-03 10:12:12 +05301145 * @qdf_dev: qdf device
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001146 * @phy_capability: PHY Capability from Target
1147 * @max_frag_entry: Max number of Fragment entry
1148 * @wmi_service_bitmap: wmi services bitmap received from Target
1149 * @wlan_resource_config: resource config
1150 * @frameTransRequired: frame transmission required
1151 * @wmaGlobalSystemRole: global system role
1152 * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac
1153 * @tx_frm_download_comp_event: Event to wait for tx download completion
1154 * @tx_queue_empty_event: wait for tx queue to get flushed
1155 * @umac_ota_ack_cb: Ack Complete Callback registered by umac
1156 * @umac_data_ota_ack_cb: ack complete callback
1157 * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data was done
1158 * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf
1159 * @needShutdown: is shutdown needed or not
1160 * @num_mem_chunks: number of memory chunk
1161 * @mem_chunks: memory chunks
1162 * @tgt_cfg_update_cb: configuration update callback
1163 * @dfs_radar_indication_cb: Callback to indicate radar to HDD
1164 * @reg_cap: regulatory capablities
1165 * @scan_id: scan id
1166 * @interfaces: txrx nodes(per vdev)
1167 * @pdevconfig: pdev related configrations
1168 * @vdev_resp_queue: vdev response queue
1169 * @vdev_respq_lock: vdev response queue lock
1170 * @ht_cap_info: HT capablity info
1171 * @vht_cap_info: VHT capablity info
1172 * @vht_supp_mcs: VHT supported MCS
1173 * @num_rf_chains: number of RF chains
1174 * @utf_event_info: UTF event information
1175 * @is_fw_assert: is fw asserted
1176 * @wow: wow related patterns & parameters
1177 * @no_of_suspend_ind: number of suspend indications
1178 * @no_of_resume_ind: number of resume indications
1179 * @mArpInfo: arp info
1180 * @powersave_mode: power save mode
1181 * @ptrn_match_enable_all_vdev: is pattern match is enable/disable
1182 * @pGetRssiReq: get RSSI request
1183 * @thermal_mgmt_info: Thermal mitigation related info
1184 * @roam_offload_enabled: is roam offload enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001185 * @ol_ini_info: store ini status of arp offload, ns offload
1186 * @ssdp: ssdp flag
Komal Seelam9764a842016-05-24 11:07:23 +05301187 * @enable_mc_list : To Check if Multicast list filtering is enabled in FW
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001188 * @ibss_started: is IBSS started or not
1189 * @ibsskey_info: IBSS key info
1190 * @dfs_ic: DFS umac interface information
1191 * @hddTxFailCb: tx fail indication callback
1192 * @pno_wake_lock: PNO wake lock
1193 * @extscan_wake_lock: extscan wake lock
1194 * @wow_wake_lock: wow wake lock
1195 * @wow_nack: wow negative ack flag
1196 * @ap_client_cnt: ap client count
1197 * @is_wow_bus_suspended: is wow bus suspended flag
1198 * @wma_scan_comp_timer: scan completion timer
1199 * @dfs_phyerr_filter_offload: dfs phy error filter is offloaded or not
1200 * @suitable_ap_hb_failure: better ap found
1201 * @wma_ibss_power_save_params: IBSS Power Save config Parameters
1202 * @IsRArateLimitEnabled: RA rate limiti s enabled or not
1203 * @RArateLimitInterval: RA rate limit interval
1204 * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not
1205 * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not
1206 * @staMaxLIModDtim: station max listen interval
1207 * @staModDtim: station mode DTIM
1208 * @staDynamicDtim: station dynamic DTIM
1209 * @enable_mhf_offload: is MHF offload enable/disable
1210 * @last_mhf_entries_timestamp: timestamp when last entries where set
1211 * @dfs_pri_multiplier: DFS multiplier
1212 * @hw_bd_id: hardware board id
1213 * @hw_bd_info: hardware board info
1214 * @in_d0wow: D0WOW is enable/disable
1215 * @miracast_value: miracast value
1216 * @log_completion_timer: log completion timer
1217 * @mgmt_rx: management rx callback
1218 * @num_dbs_hw_modes: Number of HW modes supported by the FW
1219 * @dbs_mode: DBS HW mode list
1220 * @old_hw_mode_index: Previous configured HW mode index
1221 * @new_hw_mode_index: Current configured HW mode index
Krunal Soni2e48d012016-05-02 16:55:26 -07001222 * @extended_caps phy_caps: extended caps per hw mode
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001223 * @peer_authorized_cb: peer authorized hdd callback
1224 * @ocb_callback: callback to OCB commands
1225 * @ocb_resp: response to OCB commands
1226 * @wow_pno_match_wake_up_count: PNO match wake up count
1227 * @wow_pno_complete_wake_up_count: PNO complete wake up count
1228 * @wow_gscan_wake_up_count: Gscan wake up count
1229 * @wow_low_rssi_wake_up_count: Low rssi wake up count
1230 * @wow_rssi_breach_wake_up_count: RSSI breach wake up count
1231 * @wow_ucast_wake_up_count: WoW unicast packet wake up count
1232 * @wow_bcast_wake_up_count: WoW brodcast packet wake up count
1233 * @wow_ipv4_mcast_wake_up_count: WoW IPV4 mcast packet wake up count
1234 * @wow_ipv6_mcast_wake_up_count: WoW IPV6 mcast packet wake up count
1235 * @wow_ipv6_mcast_ra_stats: WoW IPV6 mcast RA packet wake up count
1236 * @wow_ipv6_mcast_ns_stats: WoW IPV6 mcast NS packet wake up count
1237 * @wow_ipv6_mcast_na_stats: WoW IPV6 mcast NA packet wake up count
1238 * @dual_mac_cfg: Dual mac configuration params for scan and fw mode
1239 *
1240 * @max_scan: maximum scan requests than can be queued
1241 * This structure is global wma context
1242 * It contains global wma module parameters and
1243 * handle of other modules.
1244 * @saved_wmi_init_cmd: Saved WMI INIT command
1245 * @service_ready_ext_evt: Wait event for service ready ext
Sandeep Puligilla19ddda22016-01-05 12:18:02 -08001246 * @wmi_cmd_rsp_wake_lock: wmi command response wake lock
1247 * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301248 * @saved_chan: saved channel list sent as part of WMI_SCAN_CHAN_LIST_CMDID
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001249 */
1250typedef struct {
1251 void *wmi_handle;
1252 void *htc_handle;
1253 void *cds_context;
1254 void *mac_context;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301255 qdf_event_t wma_ready_event;
1256 qdf_event_t wma_resume_event;
1257 qdf_event_t target_suspend;
1258 qdf_event_t runtime_suspend;
1259 qdf_event_t recovery_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001260 uint16_t max_station;
1261 uint16_t max_bssid;
1262 uint32_t frame_xln_reqd;
1263 t_wma_drv_type driver_type;
1264 uint8_t myaddr[IEEE80211_ADDR_LEN];
1265 uint8_t hwaddr[IEEE80211_ADDR_LEN];
1266 wmi_abi_version target_abi_vers;
1267 wmi_abi_version final_abi_vers;
1268 uint32_t target_fw_version;
1269#ifdef WLAN_FEATURE_LPSS
1270 uint8_t lpss_support;
1271#endif
1272 uint8_t ap_arpns_support;
Ryan Hsu3c8f79f2015-12-02 16:45:09 -08001273#ifdef FEATURE_GREEN_AP
1274 bool egap_support;
1275#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001276 bool wmi_ready;
1277 uint32_t wlan_init_status;
Anurag Chouhandf2b2682016-02-29 14:15:27 +05301278 qdf_device_t qdf_dev;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001279 uint32_t phy_capability;
1280 uint32_t max_frag_entry;
1281 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
1282 wmi_resource_config wlan_resource_config;
1283 uint32_t frameTransRequired;
1284 tBssSystemRole wmaGlobalSystemRole;
1285 pWMATxRxCompFunc tx_frm_download_comp_cb;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301286 qdf_event_t tx_frm_download_comp_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001287 /*
1288 * Dummy event to wait for draining MSDUs left in hardware tx
1289 * queue and before requesting VDEV_STOP. Nobody will set this
1290 * and wait will timeout, and code will poll the pending tx
1291 * descriptors number to be zero.
1292 */
Anurag Chouhance0dc992016-02-16 18:18:03 +05301293 qdf_event_t tx_queue_empty_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001294 pWMAAckFnTxComp umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15];
1295 pWMAAckFnTxComp umac_data_ota_ack_cb;
Anurag Chouhan6d760662016-02-20 16:05:43 +05301296 unsigned long last_umac_data_ota_timestamp;
Nirav Shahcbc6d722016-03-01 16:24:53 +05301297 qdf_nbuf_t last_umac_data_nbuf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001298 bool needShutdown;
1299 uint32_t num_mem_chunks;
Govind Singhf25a0f12016-03-08 16:09:48 +05301300 struct wmi_host_mem_chunk mem_chunks[MAX_MEM_CHUNKS];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001301 wma_tgt_cfg_cb tgt_cfg_update_cb;
1302 wma_dfs_radar_indication_cb dfs_radar_indication_cb;
1303 HAL_REG_CAPABILITIES reg_cap;
1304 uint32_t scan_id;
1305 struct wma_txrx_node *interfaces;
1306 pdev_cli_config_t pdevconfig;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301307 qdf_list_t vdev_resp_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301308 qdf_spinlock_t vdev_respq_lock;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301309 qdf_list_t wma_hold_req_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301310 qdf_spinlock_t wma_hold_req_q_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001311 uint32_t ht_cap_info;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001312 uint32_t vht_cap_info;
1313 uint32_t vht_supp_mcs;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001314 uint32_t num_rf_chains;
1315#if defined(QCA_WIFI_FTM)
1316 struct utf_event_info utf_event_info;
1317#endif
1318 uint8_t is_fw_assert;
1319 struct wma_wow wow;
1320 uint8_t no_of_suspend_ind;
1321 uint8_t no_of_resume_ind;
1322 /* Have a back up of arp info to send along
1323 * with ns info suppose if ns also enabled
1324 */
1325 tSirHostOffloadReq mArpInfo;
1326 struct wma_tx_ack_work_ctx *ack_work_ctx;
1327 uint8_t powersave_mode;
1328 bool ptrn_match_enable_all_vdev;
1329 void *pGetRssiReq;
1330 t_thermal_mgmt thermal_mgmt_info;
1331 bool roam_offload_enabled;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001332 /* Here ol_ini_info is used to store ini
1333 * status of arp offload, ns offload
1334 * and others. Currently 1st bit is used
1335 * for arp off load and 2nd bit for ns
1336 * offload currently, rest bits are unused
1337 */
1338 uint8_t ol_ini_info;
1339 bool ssdp;
Komal Seelam9764a842016-05-24 11:07:23 +05301340 bool enable_mc_list;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001341 uint8_t ibss_started;
1342 tSetBssKeyParams ibsskey_info;
1343 struct ieee80211com *dfs_ic;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001344 txFailIndCallback hddTxFailCb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001345#ifdef FEATURE_WLAN_SCAN_PNO
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301346 qdf_wake_lock_t pno_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001347#endif
1348#ifdef FEATURE_WLAN_EXTSCAN
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301349 qdf_wake_lock_t extscan_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001350#endif
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301351 qdf_wake_lock_t wow_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001352 int wow_nack;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301353 qdf_atomic_t is_wow_bus_suspended;
Anurag Chouhan210db072016-02-22 18:42:15 +05301354 qdf_mc_timer_t wma_scan_comp_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001355 uint8_t dfs_phyerr_filter_offload;
1356 bool suitable_ap_hb_failure;
1357 ibss_power_save_params wma_ibss_power_save_params;
1358#ifdef FEATURE_WLAN_RA_FILTERING
1359 bool IsRArateLimitEnabled;
1360 uint16_t RArateLimitInterval;
1361#endif
1362#ifdef WLAN_FEATURE_LPSS
1363 bool is_lpass_enabled;
1364#endif
1365#ifdef WLAN_FEATURE_NAN
1366 bool is_nan_enabled;
1367#endif
1368 uint8_t staMaxLIModDtim;
1369 uint8_t staModDtim;
1370 uint8_t staDynamicDtim;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001371 uint8_t enable_mhf_offload;
1372 unsigned long last_mhf_entries_timestamp;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001373 int32_t dfs_pri_multiplier;
1374 uint32_t hw_bd_id;
1375 uint32_t hw_bd_info[HW_BD_INFO_SIZE];
1376 uint32_t miracast_value;
Anurag Chouhan210db072016-02-22 18:42:15 +05301377 qdf_mc_timer_t log_completion_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001378 wma_mgmt_frame_rx_callback mgmt_rx;
1379 uint32_t num_dbs_hw_modes;
1380 struct dbs_hw_mode_info hw_mode;
1381 uint32_t old_hw_mode_index;
1382 uint32_t new_hw_mode_index;
Krunal Soni2e48d012016-05-02 16:55:26 -07001383 struct extended_caps phy_caps;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301384 qdf_atomic_t scan_id_counter;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001385 wma_peer_authorized_fp peer_authorized_cb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001386 uint32_t wow_pno_match_wake_up_count;
1387 uint32_t wow_pno_complete_wake_up_count;
1388 uint32_t wow_gscan_wake_up_count;
1389 uint32_t wow_low_rssi_wake_up_count;
1390 uint32_t wow_rssi_breach_wake_up_count;
1391 uint32_t wow_ucast_wake_up_count;
1392 uint32_t wow_bcast_wake_up_count;
1393 uint32_t wow_ipv4_mcast_wake_up_count;
1394 uint32_t wow_ipv6_mcast_wake_up_count;
1395 uint32_t wow_ipv6_mcast_ra_stats;
1396 uint32_t wow_ipv6_mcast_ns_stats;
1397 uint32_t wow_ipv6_mcast_na_stats;
Selvaraj, Sridhar172cabc2016-07-05 15:19:24 +05301398 uint32_t wow_oem_response_wake_up_count;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001399
1400 /* OCB request contexts */
1401 struct sir_ocb_config *ocb_config_req;
1402 struct dual_mac_config dual_mac_cfg;
1403 struct {
1404 uint16_t pool_size;
1405 uint16_t num_free;
1406 union wmi_desc_elem_t *array;
1407 union wmi_desc_elem_t *freelist;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301408 qdf_spinlock_t wmi_desc_pool_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001409 } wmi_desc_pool;
1410 uint8_t max_scan;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001411 uint16_t self_gen_frm_pwr;
1412 bool tx_chain_mask_cck;
Chandrasekaran, Manishekarc8416922015-10-14 11:19:00 +05301413 /* Going with a timer instead of wait event because on receiving the
1414 * service ready event, we will be waiting on the MC thread for the
1415 * service extended ready event which is also processed in MC thread.
1416 * This leads to MC thread being stuck. Alternative was to process
1417 * these events in tasklet/workqueue context. But, this leads to
1418 * race conditions when the events are processed in two different
1419 * context. So, processing ready event and extended ready event in
1420 * the serialized MC thread context with a timer.
1421 */
Anurag Chouhan210db072016-02-22 18:42:15 +05301422 qdf_mc_timer_t service_ready_ext_timer;
Varun Reddy Yeturubbbbe232016-02-29 14:01:57 -08001423#ifdef WLAN_FEATURE_ROAM_OFFLOAD
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001424 void (*csr_roam_synch_cb)(tpAniSirGlobal mac,
1425 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturuf907f912016-03-21 15:06:22 -07001426 tpSirBssDescription bss_desc_ptr,
1427 enum sir_roam_op_code reason);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301428 QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001429 roam_offload_synch_ind *roam_synch_data,
1430 tpSirBssDescription bss_desc_ptr);
Varun Reddy Yeturubbbbe232016-02-29 14:01:57 -08001431#endif
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301432 qdf_wake_lock_t wmi_cmd_rsp_wake_lock;
1433 qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock;
Houston Hoffmanc45db892015-11-13 19:59:25 -08001434 qdf_runtime_lock_t wma_runtime_resume_lock;
Krishna Kumaar Natarajan1ae49112015-11-24 21:43:22 -08001435 uint32_t fine_time_measurement_cap;
Rajeev Kumare5a16822016-07-27 13:11:42 -07001436 bool bpf_enabled;
Komal Seelam02d09342016-02-23 18:03:19 +05301437 struct wma_ini_config ini_config;
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301438 struct wma_valid_channels saved_chan;
Deepak Dhamdhere13230d32016-05-26 00:46:53 -07001439 /* NAN datapath support enabled in firmware */
1440 bool nan_datapath_enabled;
Naveen Rawat0fc3f692016-06-22 14:30:54 -07001441 QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx,
Deepak Dhamdhere0f076bd2016-06-02 11:29:21 -07001442 cds_msg_t *msg);
Naveen Rawat64e477e2016-05-20 10:34:56 -07001443 bool sub_20_support;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001444} t_wma_handle, *tp_wma_handle;
1445
1446/**
1447 * struct wma_target_cap - target capabality
1448 * @wmi_service_bitmap: wmi services bitmap
1449 * @wlan_resource_config: resource config
1450 */
1451struct wma_target_cap {
Anurag Chouhance0dc992016-02-16 18:18:03 +05301452 /* wmi services bitmap received from Target */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001453 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
Anurag Chouhance0dc992016-02-16 18:18:03 +05301454 /* default resource config,the os shim can overwrite it */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001455 wmi_resource_config wlan_resource_config;
1456};
1457
1458/**
1459 * struct t_wma_start_req - wma start request parameters
1460 * @pConfigBuffer: config buffer
1461 * @usConfigBufferLen: Length of the config buffer above
1462 * @driver_type: Production or FTM driver
1463 * @pUserData: user data
1464 * @pIndUserData: indication function pointer to send to UMAC
1465 *
1466 * The shared memory between WDI and HAL is 4K so maximum data can be
1467 * transferred from WDI to HAL is 4K
1468 */
1469typedef struct {
1470 void *pConfigBuffer;
1471 uint16_t usConfigBufferLen;
1472 t_wma_drv_type driver_type;
1473 void *pUserData;
1474 void *pIndUserData;
1475} t_wma_start_req;
1476
1477/* Enumeration for Version */
1478typedef enum {
1479 WLAN_HAL_MSG_VERSION0 = 0,
1480 WLAN_HAL_MSG_VERSION1 = 1,
1481 WLAN_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF, /*define as 2 bytes data */
1482 WLAN_HAL_MSG_VERSION_MAX_FIELD = WLAN_HAL_MSG_WCNSS_CTRL_VERSION
1483} tHalHostMsgVersion;
1484
1485/**
1486 * struct sHalMacStartParameter - mac start request parameters
1487 * @driverType: driver type (production/FTM)
1488 * @uConfigBufferLen: length of config buffer
1489 */
Anurag Chouhan6d760662016-02-20 16:05:43 +05301490typedef struct qdf_packed sHalMacStartParameter {
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001491 tDriverType driverType;
1492 uint32_t uConfigBufferLen;
1493
1494 /* Following this there is a TLV formatted buffer of length
1495 * "uConfigBufferLen" bytes containing all config values.
1496 * The TLV is expected to be formatted like this:
1497 * 0 15 31 31+CFG_LEN-1 length-1
1498 * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
1499 */
1500} tHalMacStartParameter, *tpHalMacStartParameter;
1501
1502extern void cds_wma_complete_cback(void *p_cds_context);
1503extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G,
1504 uint16_t regdmn5G, int8_t ctl2G,
1505 int8_t ctl5G);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001506/**
1507 * enum frame_index - Frame index
1508 * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack
1509 * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack
1510 * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack
1511 * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack
1512 * @FRAME_INDEX_MAX: maximum frame index
1513 */
1514enum frame_index {
1515 GENERIC_NODOWNLD_NOACK_COMP_INDEX,
1516 GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX,
1517 GENERIC_DOWNLD_COMP_ACK_COMP_INDEX,
1518 GENERIC_NODOWLOAD_ACK_COMP_INDEX,
1519 FRAME_INDEX_MAX
1520};
1521
1522/**
1523 * struct wma_tx_ack_work_ctx - tx ack work context
1524 * @wma_handle: wma handle
1525 * @sub_type: sub type
1526 * @status: status
1527 * @ack_cmp_work: work structure
1528 */
1529struct wma_tx_ack_work_ctx {
1530 tp_wma_handle wma_handle;
1531 uint16_t sub_type;
1532 int32_t status;
Anurag Chouhan42958bb2016-02-19 15:43:11 +05301533 qdf_work_t ack_cmp_work;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001534};
1535
1536/**
1537 * struct wma_target_req - target request parameters
1538 * @event_timeout: event timeout
1539 * @node: list
1540 * @user_data: user data
1541 * @msg_type: message type
1542 * @vdev_id: vdev id
1543 * @type: type
1544 */
1545struct wma_target_req {
Anurag Chouhan210db072016-02-22 18:42:15 +05301546 qdf_mc_timer_t event_timeout;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301547 qdf_list_node_t node;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001548 void *user_data;
1549 uint32_t msg_type;
1550 uint8_t vdev_id;
1551 uint8_t type;
1552};
1553
1554/**
1555 * struct wma_vdev_start_req - vdev start request parameters
1556 * @beacon_intval: beacon interval
1557 * @dtim_period: dtim period
1558 * @max_txpow: max tx power
1559 * @chan_offset: channel offset
1560 * @is_dfs: is dfs supported or not
1561 * @vdev_id: vdev id
1562 * @chan: channel
1563 * @oper_mode: operating mode
1564 * @ssid: ssid
1565 * @hidden_ssid: hidden ssid
1566 * @pmf_enabled: is pmf enabled or not
1567 * @vht_capable: VHT capabality
1568 * @ht_capable: HT capabality
1569 * @dfs_pri_multiplier: DFS multiplier
1570 * @dot11_mode: 802.11 mode
1571 * @is_half_rate: is the channel operating at 10MHz
1572 * @is_quarter_rate: is the channel operating at 5MHz
1573 * @preferred_tx_streams: policy manager indicates the preferred
1574 * number of transmit streams
1575 * @preferred_rx_streams: policy manager indicates the preferred
1576 * number of receive streams
1577 */
1578struct wma_vdev_start_req {
1579 uint32_t beacon_intval;
1580 uint32_t dtim_period;
1581 int32_t max_txpow;
Kiran Kumar Lokere13644672016-02-29 15:40:10 -08001582 enum phy_ch_width chan_width;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001583 bool is_dfs;
1584 uint8_t vdev_id;
1585 uint8_t chan;
1586 uint8_t oper_mode;
1587 tSirMacSSid ssid;
1588 uint8_t hidden_ssid;
1589 uint8_t pmf_enabled;
1590 uint8_t vht_capable;
1591 uint8_t ch_center_freq_seg0;
1592 uint8_t ch_center_freq_seg1;
1593 uint8_t ht_capable;
1594 int32_t dfs_pri_multiplier;
1595 uint8_t dot11_mode;
1596 bool is_half_rate;
1597 bool is_quarter_rate;
1598 uint32_t preferred_tx_streams;
1599 uint32_t preferred_rx_streams;
1600};
1601
1602/**
1603 * struct wma_set_key_params - set key parameters
1604 * @vdev_id: vdev id
1605 * @def_key_idx: used to see if we have to read the key from cfg
1606 * @key_len: key length
1607 * @peer_mac: peer mac address
1608 * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC
1609 * @key_type: key type
1610 * @key_idx: key index
1611 * @unicast: unicast flag
1612 * @key_data: key data
1613 */
1614struct wma_set_key_params {
1615 uint8_t vdev_id;
1616 /* def_key_idx can be used to see if we have to read the key from cfg */
1617 uint32_t def_key_idx;
1618 uint16_t key_len;
1619 uint8_t peer_mac[IEEE80211_ADDR_LEN];
1620 uint8_t singl_tid_rc;
1621 enum eAniEdType key_type;
1622 uint32_t key_idx;
1623 bool unicast;
1624 uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH];
1625};
1626
1627/**
1628 * struct t_thermal_cmd_params - thermal command parameters
1629 * @minTemp: minimum temprature
1630 * @maxTemp: maximum temprature
1631 * @thermalEnable: thermal enable
1632 */
1633typedef struct {
1634 uint16_t minTemp;
1635 uint16_t maxTemp;
1636 uint8_t thermalEnable;
1637} t_thermal_cmd_params, *tp_thermal_cmd_params;
1638
1639/**
1640 * enum wma_cfg_cmd_id - wma cmd ids
1641 * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command
1642 * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command
1643 * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time
1644 * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota
1645 * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size
1646 * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save
1647 * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable
1648 * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX
1649 * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time
1650 * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP
1651 * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time
1652 * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM
1653 * @WMA_VDEV_DFS_CONTROL_CMDID: DFS control command
1654 * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats
1655 *
1656 * wma command ids for configuration request which
1657 * does not involve sending a wmi command.
1658 */
1659enum wma_cfg_cmd_id {
1660 WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX,
1661 WMA_VDEV_TXRX_FWSTATS_RESET_CMDID,
1662 WMA_VDEV_MCC_SET_TIME_LATENCY,
1663 WMA_VDEV_MCC_SET_TIME_QUOTA,
1664 WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE,
1665 WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED,
1666 WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED,
1667 WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX,
1668 WMA_VDEV_IBSS_SET_INACTIVITY_TIME,
1669 WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME,
1670 WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS,
1671 WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW,
1672 WMA_VDEV_DFS_CONTROL_CMDID,
1673 WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID,
1674 WMA_CMD_ID_MAX
1675};
1676
1677/**
1678 * struct wma_trigger_uapsd_params - trigger uapsd parameters
1679 * @wmm_ac: wmm access catagory
1680 * @user_priority: user priority
1681 * @service_interval: service interval
1682 * @suspend_interval: suspend interval
1683 * @delay_interval: delay interval
1684 */
1685typedef struct wma_trigger_uapsd_params {
1686 uint32_t wmm_ac;
1687 uint32_t user_priority;
1688 uint32_t service_interval;
1689 uint32_t suspend_interval;
1690 uint32_t delay_interval;
1691} t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params;
1692
1693/**
1694 * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station
1695 * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period
1696 * @UAPSD_MAX_SP_LEN_2: max service period = 2
1697 * @UAPSD_MAX_SP_LEN_4: max service period = 4
1698 * @UAPSD_MAX_SP_LEN_6: max service period = 6
1699 */
1700enum uapsd_peer_param_max_sp {
1701 UAPSD_MAX_SP_LEN_UNLIMITED = 0,
1702 UAPSD_MAX_SP_LEN_2 = 2,
1703 UAPSD_MAX_SP_LEN_4 = 4,
1704 UAPSD_MAX_SP_LEN_6 = 6
1705};
1706
1707/**
1708 * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station
1709 * @UAPSD_VO_ENABLED: enable uapsd for voice
1710 * @UAPSD_VI_ENABLED: enable uapsd for video
1711 * @UAPSD_BK_ENABLED: enable uapsd for background
1712 * @UAPSD_BE_ENABLED: enable uapsd for best effort
1713 */
1714enum uapsd_peer_param_enabled_ac {
1715 UAPSD_VO_ENABLED = 0x01,
1716 UAPSD_VI_ENABLED = 0x02,
1717 UAPSD_BK_ENABLED = 0x04,
1718 UAPSD_BE_ENABLED = 0x08
1719};
1720
1721/**
Govind Singha471e5e2015-10-12 17:11:14 +05301722 * enum profile_id_t - Firmware profiling index
1723 * @PROF_CPU_IDLE: cpu idle profile
1724 * @PROF_PPDU_PROC: ppdu processing profile
1725 * @PROF_PPDU_POST: ppdu post profile
1726 * @PROF_HTT_TX_INPUT: htt tx input profile
1727 * @PROF_MSDU_ENQ: msdu enqueue profile
1728 * @PROF_PPDU_POST_HAL: ppdu post profile
1729 * @PROF_COMPUTE_TX_TIME: tx time profile
1730 * @PROF_MAX_ID: max profile index
1731 */
1732enum profile_id_t {
1733 PROF_CPU_IDLE,
1734 PROF_PPDU_PROC,
1735 PROF_PPDU_POST,
1736 PROF_HTT_TX_INPUT,
1737 PROF_MSDU_ENQ,
1738 PROF_PPDU_POST_HAL,
1739 PROF_COMPUTE_TX_TIME,
1740 PROF_MAX_ID,
1741};
1742
1743/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001744 * struct p2p_ie - P2P IE structural definition.
1745 * @p2p_id: p2p id
1746 * @p2p_len: p2p length
1747 * @p2p_oui: p2p OUI
1748 * @p2p_oui_type: p2p OUI type
1749 */
1750struct p2p_ie {
1751 uint8_t p2p_id;
1752 uint8_t p2p_len;
1753 uint8_t p2p_oui[3];
1754 uint8_t p2p_oui_type;
1755} __packed;
1756
1757/**
1758 * struct p2p_noa_descriptor - noa descriptor
1759 * @type_count: 255: continuous schedule, 0: reserved
1760 * @duration: Absent period duration in micro seconds
1761 * @interval: Absent period interval in micro seconds
1762 * @start_time: 32 bit tsf time when in starts
1763 */
1764struct p2p_noa_descriptor {
1765 uint8_t type_count;
1766 uint32_t duration;
1767 uint32_t interval;
1768 uint32_t start_time;
1769} __packed;
1770
1771/**
1772 * struct p2p_sub_element_noa - p2p noa element
1773 * @p2p_sub_id: p2p sub id
1774 * @p2p_sub_len: p2p sub length
1775 * @index: identifies instance of NOA su element
1776 * @oppPS: oppPS state of the AP
1777 * @ctwindow: ctwindow in TUs
1778 * @num_descriptors: number of NOA descriptors
1779 * @noa_descriptors: noa descriptors
1780 */
1781struct p2p_sub_element_noa {
1782 uint8_t p2p_sub_id;
1783 uint8_t p2p_sub_len;
1784 uint8_t index; /* identifies instance of NOA su element */
1785 uint8_t oppPS:1, /* oppPS state of the AP */
1786 ctwindow:7; /* ctwindow in TUs */
1787 uint8_t num_descriptors; /* number of NOA descriptors */
1788 struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS];
1789};
1790
1791/**
1792 * struct wma_decap_info_t - decapsulation info
1793 * @hdr: header
1794 * @hdr_len: header length
1795 */
1796struct wma_decap_info_t {
1797 uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)];
1798 int32_t hdr_len;
1799};
1800
1801/**
1802 * enum packet_power_save - packet power save params
1803 * @WMI_VDEV_PPS_PAID_MATCH: paid match param
1804 * @WMI_VDEV_PPS_GID_MATCH: gid match param
1805 * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param
1806 * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param
1807 * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param
1808 * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param
1809 * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param
1810 * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param
1811 * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param
1812 * @WMI_VDEV_PPS_5G_EBT: 5G ebt param
1813 */
1814typedef enum {
1815 WMI_VDEV_PPS_PAID_MATCH = 0,
1816 WMI_VDEV_PPS_GID_MATCH = 1,
1817 WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2,
1818 WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3,
1819 WMI_VDEV_PPS_EOF_PAD_DELIM = 4,
1820 WMI_VDEV_PPS_MACADDR_MISMATCH = 5,
1821 WMI_VDEV_PPS_DELIM_CRC_FAIL = 6,
1822 WMI_VDEV_PPS_GID_NSTS_ZERO = 7,
1823 WMI_VDEV_PPS_RSSI_CHECK = 8,
1824 WMI_VDEV_VHT_SET_GID_MGMT = 9,
1825 WMI_VDEV_PPS_5G_EBT = 10
1826} packet_power_save;
1827
1828/**
1829 * enum green_tx_param - green tx parameters
1830 * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param
1831 * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param
1832 * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param
1833 * @WMI_VDEV_PARAM_GTX_THRE: thre param
1834 * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param
1835 * @WMI_VDEV_PARAM_GTX_STEP: green tx step param
1836 * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param
1837 * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask
1838 */
1839typedef enum {
1840 WMI_VDEV_PARAM_GTX_HT_MCS,
1841 WMI_VDEV_PARAM_GTX_VHT_MCS,
1842 WMI_VDEV_PARAM_GTX_USR_CFG,
1843 WMI_VDEV_PARAM_GTX_THRE,
1844 WMI_VDEV_PARAM_GTX_MARGIN,
1845 WMI_VDEV_PARAM_GTX_STEP,
1846 WMI_VDEV_PARAM_GTX_MINTPC,
1847 WMI_VDEV_PARAM_GTX_BW_MASK,
1848} green_tx_param;
1849
1850#ifdef FEATURE_WLAN_TDLS
1851/**
1852 * struct wma_tdls_params - TDLS parameters
1853 * @vdev_id: vdev id
1854 * @tdls_state: TDLS state
1855 * @notification_interval_ms: notification inerval
1856 * @tx_discovery_threshold: tx discovery threshold
1857 * @tx_teardown_threshold: tx teardown threashold
1858 * @rssi_teardown_threshold: RSSI teardown threshold
1859 * @rssi_delta: RSSI delta
1860 * @tdls_options: TDLS options
1861 * @peer_traffic_ind_window: raffic indication window
1862 * @peer_traffic_response_timeout: traffic response timeout
1863 * @puapsd_mask: uapsd mask
1864 * @puapsd_inactivity_time: uapsd inactivity time
1865 * @puapsd_rx_frame_threshold: uapsd rx frame threshold
Kabilan Kannanca670be2015-11-23 01:56:12 -08001866 * @teardown_notification_ms: tdls teardown notification interval
Kabilan Kannan421714b2015-11-23 04:44:59 -08001867 * @tdls_peer_kickout_threshold: tdls packet threshold for
1868 * peer kickout operation
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001869 */
1870typedef struct wma_tdls_params {
1871 uint32_t vdev_id;
1872 uint32_t tdls_state;
1873 uint32_t notification_interval_ms;
1874 uint32_t tx_discovery_threshold;
1875 uint32_t tx_teardown_threshold;
1876 int32_t rssi_teardown_threshold;
1877 int32_t rssi_delta;
1878 uint32_t tdls_options;
1879 uint32_t peer_traffic_ind_window;
1880 uint32_t peer_traffic_response_timeout;
1881 uint32_t puapsd_mask;
1882 uint32_t puapsd_inactivity_time;
1883 uint32_t puapsd_rx_frame_threshold;
Kabilan Kannanca670be2015-11-23 01:56:12 -08001884 uint32_t teardown_notification_ms;
Kabilan Kannan421714b2015-11-23 04:44:59 -08001885 uint32_t tdls_peer_kickout_threshold;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001886} t_wma_tdls_params;
1887
1888/**
1889 * struct wma_tdls_peer_event - TDLS peer event
1890 * @vdev_id: vdev id
1891 * @peer_macaddr: peer MAC address
1892 * @peer_status: TDLS peer status
1893 * @peer_reason: TDLS peer reason
1894 */
1895typedef struct {
1896 A_UINT32 vdev_id;
1897 wmi_mac_addr peer_macaddr;
1898 A_UINT32 peer_status;
1899 A_UINT32 peer_reason;
1900} wma_tdls_peer_event;
1901
1902#endif /* FEATURE_WLAN_TDLS */
1903
1904/**
1905 * struct wma_dfs_radar_channel_list - dfs radar channel list
1906 * @nchannels: nuber of channels
1907 * @channels: Channel number including bonded channels on which
1908 * radar is present
1909 */
1910struct wma_dfs_radar_channel_list {
1911 A_UINT32 nchannels;
1912 uint8_t channels[WMA_DFS_MAX_20M_SUB_CH];
1913};
1914
1915/**
1916 * struct wma_dfs_radar_indication - Structure to indicate RADAR
1917 * @vdev_id: vdev id
1918 * @chan_list: Channel list on which RADAR is detected
1919 * @dfs_radar_status: Flag to Indicate RADAR presence on the current channel
1920 * @use_nol: Flag to indicate use NOL
1921 */
1922struct wma_dfs_radar_indication {
1923 A_UINT32 vdev_id;
1924 struct wma_dfs_radar_channel_list chan_list;
1925 uint32_t dfs_radar_status;
1926 int use_nol;
1927};
1928
1929/**
1930 * enum uapsd_ac - U-APSD Access Categories
1931 * @UAPSD_BE: best effort
1932 * @UAPSD_BK: back ground
1933 * @UAPSD_VI: video
1934 * @UAPSD_VO: voice
1935 */
1936enum uapsd_ac {
1937 UAPSD_BE,
1938 UAPSD_BK,
1939 UAPSD_VI,
1940 UAPSD_VO
1941};
1942
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301943QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001944 uint32_t vdev_id, enum uapsd_ac ac);
1945
1946/**
1947 * enum uapsd_up - U-APSD User Priorities
1948 * @UAPSD_UP_BE: best effort
1949 * @UAPSD_UP_BK: back ground
1950 * @UAPSD_UP_RESV: reserve
1951 * @UAPSD_UP_EE: Excellent Effort
1952 * @UAPSD_UP_CL: Critical Applications
1953 * @UAPSD_UP_VI: video
1954 * @UAPSD_UP_VO: voice
1955 * @UAPSD_UP_NC: Network Control
1956 */
1957enum uapsd_up {
1958 UAPSD_UP_BE,
1959 UAPSD_UP_BK,
1960 UAPSD_UP_RESV,
1961 UAPSD_UP_EE,
1962 UAPSD_UP_CL,
1963 UAPSD_UP_VI,
1964 UAPSD_UP_VO,
1965 UAPSD_UP_NC,
1966 UAPSD_UP_MAX
1967};
1968
1969/**
1970 * struct wma_unit_test_cmd - unit test command parameters
1971 * @vdev_id: vdev id
1972 * @module_id: module id
1973 * @num_args: number of arguments
1974 * @args: arguments
1975 */
1976typedef struct wma_unit_test_cmd {
1977 uint32_t vdev_id;
1978 WLAN_MODULE_ID module_id;
1979 uint32_t num_args;
1980 uint32_t args[WMA_MAX_NUM_ARGS];
1981} t_wma_unit_test_cmd;
1982
1983/**
1984 * struct wma_roam_invoke_cmd - roam invoke command
1985 * @vdev_id: vdev id
1986 * @bssid: mac address
1987 * @channel: channel
1988 */
1989struct wma_roam_invoke_cmd {
1990 uint32_t vdev_id;
1991 uint8_t bssid[IEEE80211_ADDR_LEN];
1992 uint32_t channel;
1993};
1994
1995/**
1996 * struct wma_process_fw_event_params - fw event parameters
1997 * @wmi_handle: wmi handle
1998 * @evt_buf: event buffer
1999 */
2000typedef struct {
2001 void *wmi_handle;
2002 void *evt_buf;
2003} wma_process_fw_event_params;
2004
Govind Singhd76a5b02016-03-08 15:12:14 +05302005int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002006
2007A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype,
2008 eCsrEncryptionType encr);
2009A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr);
2010
2011/*
2012 * WMA-DFS Hooks
2013 */
2014int ol_if_dfs_attach(struct ieee80211com *ic, void *ptr, void *radar_info);
2015uint64_t ol_if_get_tsf64(struct ieee80211com *ic);
2016int ol_if_dfs_disable(struct ieee80211com *ic);
Chandrasekaran, Manishekar22a7e1e2015-11-05 10:38:49 +05302017struct dfs_ieee80211_channel *ieee80211_find_channel(struct ieee80211com *ic,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002018 int freq, uint32_t flags);
2019int ol_if_dfs_enable(struct ieee80211com *ic, int *is_fastclk, void *pe);
2020uint32_t ieee80211_ieee2mhz(uint32_t chan, uint32_t flags);
2021int ol_if_dfs_get_ext_busy(struct ieee80211com *ic);
2022int ol_if_dfs_get_mib_cycle_counts_pct(struct ieee80211com *ic,
2023 uint32_t *rxc_pcnt, uint32_t *rxf_pcnt,
2024 uint32_t *txf_pcnt);
2025uint16_t ol_if_dfs_usenol(struct ieee80211com *ic);
2026void ieee80211_mark_dfs(struct ieee80211com *ic,
Chandrasekaran, Manishekar22a7e1e2015-11-05 10:38:49 +05302027 struct dfs_ieee80211_channel *ichan);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002028int wma_dfs_indicate_radar(struct ieee80211com *ic,
Chandrasekaran, Manishekar22a7e1e2015-11-05 10:38:49 +05302029 struct dfs_ieee80211_channel *ichan);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002030uint16_t dfs_usenol(struct ieee80211com *ic);
2031
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302032QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002033 tp_wma_trigger_uapsd_params
2034 trigger_uapsd_params);
2035
2036/* added to get average snr for both data and beacon */
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302037QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002038
2039
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302040QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002041 ol_txrx_vdev_handle tx_rx_vdev_handle,
2042 uint8_t *mac, uint32_t vdev_type, bool add_del);
2043
2044void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle);
2045void wma_log_completion_timeout(void *data);
2046
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302047QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002048 struct rssi_monitor_req *req);
2049
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05302050QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle,
2051 struct wmi_pcl_chan_weights *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002052
Manishekar Chandrasekarand9640342016-04-27 12:28:26 +05302053QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002054 struct sir_hw_mode *msg);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302055QDF_STATUS wma_get_scan_id(uint32_t *scan_id);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002056
Manishekar Chandrasekaran5d46f702016-04-27 12:50:52 +05302057QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002058 struct sir_dual_mac_config *msg);
Archana Ramachandrand41c3ed2016-02-10 15:48:06 -08002059QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle,
2060 struct sir_antenna_mode_param *msg);
Govind Singhd76a5b02016-03-08 15:12:14 +05302061QDF_STATUS wma_crash_inject(tp_wma_handle wma_handle, uint32_t type,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002062 uint32_t delay_time_ms);
2063
2064struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma,
2065 uint8_t vdev_id,
2066 uint32_t msg_type, uint8_t type,
2067 void *params, uint32_t timeout);
2068struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma,
2069 uint8_t vdev_id, uint32_t msg_type,
2070 uint8_t type, void *params,
2071 uint32_t timeout);
2072
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302073QDF_STATUS wma_vdev_start(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002074 struct wma_vdev_start_req *req, bool isRestart);
2075
2076void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id,
2077 uint8_t type);
2078
2079int wmi_desc_pool_init(tp_wma_handle wma_handle, uint32_t pool_size);
2080void wmi_desc_pool_deinit(tp_wma_handle wma_handle);
2081struct wmi_desc_t *wmi_desc_get(tp_wma_handle wma_handle);
2082void wmi_desc_put(tp_wma_handle wma_handle, struct wmi_desc_t *wmi_desc);
2083int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params,
2084 uint32_t len);
Nirav Shah20489972016-06-16 19:20:28 +05302085int wma_mgmt_tx_bundle_completion_handler(void *handle,
2086 uint8_t *cmpl_event_params, uint32_t len);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002087void wma_set_dfs_region(tp_wma_handle wma, uint8_t dfs_region);
Naveen Rawatc0c91cd2015-11-05 14:27:37 -08002088uint32_t wma_get_vht_ch_width(void);
Govind Singhd76a5b02016-03-08 15:12:14 +05302089QDF_STATUS
2090wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param,
2091 A_UINT32 val, A_UINT32 *module_id_bitmap,
2092 A_UINT32 bitmap_len);
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002093#ifdef FEATURE_LFR_SUBNET_DETECTION
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302094QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002095 struct gateway_param_update_req *req);
2096#else
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302097static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002098 struct gateway_param_update_req *req)
2099{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302100 return QDF_STATUS_SUCCESS;
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002101}
2102#endif /* FEATURE_LFR_SUBNET_DETECTION */
2103
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002104#if defined(FEATURE_LRO)
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302105QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002106 struct wma_lro_config_cmd_t *wma_lro_cmd);
2107#else
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302108static inline QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002109 struct wma_lro_config_cmd_t *wma_lro_cmd)
2110{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302111 return QDF_STATUS_SUCCESS;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002112}
2113#endif
Dhanashri Atre1f0cbe42015-11-19 10:56:53 -08002114void
2115wma_indicate_err(enum ol_rx_err_type err_type,
2116 struct ol_error_info *err_info);
Sandeep Puligillae0875662016-02-12 16:09:21 -08002117
2118QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle,
2119 int32_t vdev_id);
2120QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma,
2121 struct obss_ht40_scanind *req);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05302122
2123int wma_get_bpf_caps_event_handler(void *handle,
2124 u_int8_t *cmd_param_info,
2125 u_int32_t len);
Krunal Soniaa664da2016-06-15 23:46:40 -07002126uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05302127QDF_STATUS wma_get_bpf_capabilities(tp_wma_handle wma);
2128QDF_STATUS wma_set_bpf_instructions(tp_wma_handle wma,
2129 struct sir_bpf_set_offload *bpf_set_offload);
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -07002130void wma_process_set_pdev_ie_req(tp_wma_handle wma,
2131 struct set_ie_param *ie_params);
2132void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma,
2133 struct set_ie_param *ie_params);
2134void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma,
2135 struct set_ie_param *ie_params);
Deepak Dhamdhere13983f22016-05-31 19:06:09 -07002136void wma_remove_peer(tp_wma_handle wma, u_int8_t *bssid,
2137 u_int8_t vdev_id, ol_txrx_peer_handle peer,
2138 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07002139
2140QDF_STATUS wma_add_wow_wakeup_event(tp_wma_handle wma,
2141 uint32_t vdev_id,
2142 uint32_t bitmap,
2143 bool enable);
Deepak Dhamdhere0f076bd2016-06-02 11:29:21 -07002144QDF_STATUS wma_create_peer(tp_wma_handle wma, ol_txrx_pdev_handle pdev,
2145 ol_txrx_vdev_handle vdev, u8 peer_addr[6],
2146 u_int32_t peer_type, u_int8_t vdev_id,
2147 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07002148
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002149#endif
Komal Seelam02d09342016-02-23 18:03:19 +05302150struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle);
Abhishek Singh1c676222016-05-09 14:20:28 +05302151WLAN_PHY_MODE wma_chan_phy_mode(u8 chan, enum phy_ch_width chan_width,
2152 u8 dot11_mode);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07002153
2154#ifdef FEATURE_OEM_DATA_SUPPORT
2155QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle,
Krishna Kumaar Natarajanc1fa17d2016-08-03 14:19:20 -07002156 struct oem_data_req *oem_req);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07002157#endif