Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 1 | /* |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame^] | 2 | * Copyright (c) 2011, 2014-2018 The Linux Foundation. All rights reserved. |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _HTT_INTERNAL__H_ |
| 29 | #define _HTT_INTERNAL__H_ |
| 30 | |
| 31 | #include <athdefs.h> /* A_STATUS */ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 32 | #include <qdf_nbuf.h> /* qdf_nbuf_t */ |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 33 | #include <qdf_util.h> /* qdf_assert */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 34 | #include <htc_api.h> /* HTC_PACKET */ |
| 35 | |
| 36 | #include <htt_types.h> |
| 37 | |
| 38 | #ifndef offsetof |
| 39 | #define offsetof(type, field) ((size_t)(&((type *)0)->field)) |
| 40 | #endif |
| 41 | |
| 42 | #undef MS |
| 43 | #define MS(_v, _f) (((_v) & _f ## _MASK) >> _f ## _LSB) |
| 44 | #undef SM |
| 45 | #define SM(_v, _f) (((_v) << _f ## _LSB) & _f ## _MASK) |
| 46 | #undef WO |
| 47 | #define WO(_f) ((_f ## _OFFSET) >> 2) |
| 48 | |
| 49 | #define GET_FIELD(_addr, _f) MS(*((A_UINT32 *)(_addr) + WO(_f)), _f) |
| 50 | |
| 51 | #include <rx_desc.h> |
| 52 | #include <wal_rx_desc.h> /* struct rx_attention, etc */ |
| 53 | |
| 54 | struct htt_host_fw_desc_base { |
| 55 | union { |
| 56 | struct fw_rx_desc_base val; |
| 57 | A_UINT32 dummy_pad; /* make sure it is DOWRD aligned */ |
| 58 | } u; |
| 59 | }; |
| 60 | |
Himanshu Agarwal | 053d455 | 2016-07-20 20:00:34 +0530 | [diff] [blame] | 61 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 62 | /* |
| 63 | * This struct defines the basic descriptor information used by host, |
| 64 | * which is written either by the 11ac HW MAC into the host Rx data |
| 65 | * buffer ring directly or generated by FW and copied from Rx indication |
| 66 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 67 | struct htt_host_rx_desc_base { |
| 68 | struct htt_host_fw_desc_base fw_desc; |
| 69 | struct rx_attention attention; |
| 70 | struct rx_frag_info frag_info; |
| 71 | struct rx_mpdu_start mpdu_start; |
| 72 | struct rx_msdu_start msdu_start; |
| 73 | struct rx_msdu_end msdu_end; |
| 74 | struct rx_mpdu_end mpdu_end; |
| 75 | struct rx_ppdu_start ppdu_start; |
| 76 | struct rx_ppdu_end ppdu_end; |
Manjunathappa Prakash | 70ea728 | 2016-06-17 15:42:45 -0700 | [diff] [blame] | 77 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 78 | /* Increased to support some of offload features */ |
| 79 | #define RX_HTT_HDR_STATUS_LEN 256 |
| 80 | #else |
| 81 | #define RX_HTT_HDR_STATUS_LEN 64 |
| 82 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 83 | char rx_hdr_status[RX_HTT_HDR_STATUS_LEN]; |
| 84 | }; |
| 85 | |
Himanshu Agarwal | 5f5e166 | 2017-05-24 12:37:09 +0530 | [diff] [blame] | 86 | #define RX_DESC_ATTN_MPDU_LEN_ERR_BIT 0x08000000 |
| 87 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 88 | #define RX_STD_DESC_ATTN_OFFSET \ |
| 89 | (offsetof(struct htt_host_rx_desc_base, attention)) |
| 90 | #define RX_STD_DESC_FRAG_INFO_OFFSET \ |
| 91 | (offsetof(struct htt_host_rx_desc_base, frag_info)) |
| 92 | #define RX_STD_DESC_MPDU_START_OFFSET \ |
| 93 | (offsetof(struct htt_host_rx_desc_base, mpdu_start)) |
| 94 | #define RX_STD_DESC_MSDU_START_OFFSET \ |
| 95 | (offsetof(struct htt_host_rx_desc_base, msdu_start)) |
| 96 | #define RX_STD_DESC_MSDU_END_OFFSET \ |
| 97 | (offsetof(struct htt_host_rx_desc_base, msdu_end)) |
| 98 | #define RX_STD_DESC_MPDU_END_OFFSET \ |
| 99 | (offsetof(struct htt_host_rx_desc_base, mpdu_end)) |
| 100 | #define RX_STD_DESC_PPDU_START_OFFSET \ |
| 101 | (offsetof(struct htt_host_rx_desc_base, ppdu_start)) |
| 102 | #define RX_STD_DESC_PPDU_END_OFFSET \ |
| 103 | (offsetof(struct htt_host_rx_desc_base, ppdu_end)) |
| 104 | #define RX_STD_DESC_HDR_STATUS_OFFSET \ |
| 105 | (offsetof(struct htt_host_rx_desc_base, rx_hdr_status)) |
| 106 | |
| 107 | #define RX_STD_DESC_FW_MSDU_OFFSET \ |
| 108 | (offsetof(struct htt_host_rx_desc_base, fw_desc)) |
| 109 | |
| 110 | #define RX_STD_DESC_SIZE (sizeof(struct htt_host_rx_desc_base)) |
| 111 | |
| 112 | #define RX_DESC_ATTN_OFFSET32 (RX_STD_DESC_ATTN_OFFSET >> 2) |
| 113 | #define RX_DESC_FRAG_INFO_OFFSET32 (RX_STD_DESC_FRAG_INFO_OFFSET >> 2) |
| 114 | #define RX_DESC_MPDU_START_OFFSET32 (RX_STD_DESC_MPDU_START_OFFSET >> 2) |
| 115 | #define RX_DESC_MSDU_START_OFFSET32 (RX_STD_DESC_MSDU_START_OFFSET >> 2) |
| 116 | #define RX_DESC_MSDU_END_OFFSET32 (RX_STD_DESC_MSDU_END_OFFSET >> 2) |
| 117 | #define RX_DESC_MPDU_END_OFFSET32 (RX_STD_DESC_MPDU_END_OFFSET >> 2) |
| 118 | #define RX_DESC_PPDU_START_OFFSET32 (RX_STD_DESC_PPDU_START_OFFSET >> 2) |
| 119 | #define RX_DESC_PPDU_END_OFFSET32 (RX_STD_DESC_PPDU_END_OFFSET >> 2) |
| 120 | #define RX_DESC_HDR_STATUS_OFFSET32 (RX_STD_DESC_HDR_STATUS_OFFSET >> 2) |
| 121 | |
| 122 | #define RX_STD_DESC_SIZE_DWORD (RX_STD_DESC_SIZE >> 2) |
| 123 | |
| 124 | /* |
| 125 | * Make sure there is a minimum headroom provided in the rx netbufs |
| 126 | * for use by the OS shim and OS and rx data consumers. |
| 127 | */ |
| 128 | #define HTT_RX_BUF_OS_MIN_HEADROOM 32 |
| 129 | #define HTT_RX_STD_DESC_RESERVATION \ |
| 130 | ((HTT_RX_BUF_OS_MIN_HEADROOM > RX_STD_DESC_SIZE) ? \ |
| 131 | HTT_RX_BUF_OS_MIN_HEADROOM : RX_STD_DESC_SIZE) |
| 132 | #define HTT_RX_DESC_RESERVATION32 \ |
| 133 | (HTT_RX_STD_DESC_RESERVATION >> 2) |
| 134 | |
| 135 | #define HTT_RX_DESC_ALIGN_MASK 7 /* 8-byte alignment */ |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 136 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 137 | #ifdef DEBUG_RX_RING_BUFFER |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 138 | #define NBUF_MAP_ID(skb) \ |
Manjunathappa Prakash | 794366e | 2017-11-07 09:59:21 -0800 | [diff] [blame] | 139 | (((struct qdf_nbuf_cb *)((skb)->cb))->u.rx.dev.priv_cb_m.map_index) |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 140 | |
Leo Chang | 9872676 | 2016-10-28 11:07:18 -0700 | [diff] [blame] | 141 | #ifdef MSM_PLATFORM |
| 142 | #define HTT_ADDRESS_MASK 0xfffffffffffffffe |
| 143 | #else |
| 144 | #define HTT_ADDRESS_MASK 0xfffffffe |
| 145 | #endif /* MSM_PLATFORM */ |
| 146 | |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 147 | /** |
| 148 | * rx_buf_debug: rx_ring history |
| 149 | * |
| 150 | * There are three types of entries in history: |
| 151 | * 1) rx-descriptors posted (and received) |
| 152 | * Both of these events are stored on the same entry |
| 153 | * @paddr : physical address posted on the ring |
| 154 | * @nbuf : virtual address of nbuf containing data |
| 155 | * @ndata : virual address of data (corresponds to physical address) |
| 156 | * @posted: time-stamp when the buffer is posted to the ring |
| 157 | * @recved: time-stamp when the buffer is received (rx_in_order_ind) |
| 158 | * : or 0, if the buffer has not been received yet |
| 159 | * 2) ring alloc-index (fill-index) updates |
| 160 | * @paddr : = 0 |
| 161 | * @nbuf : = 0 |
| 162 | * @ndata : = 0 |
| 163 | * posted : time-stamp when alloc index was updated |
| 164 | * recved : value of alloc index |
| 165 | * 3) htt_rx_in_order_indication reception |
| 166 | * @paddr : = 0 |
| 167 | * @nbuf : = 0 |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 168 | * @ndata : msdu_cnt |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 169 | * @posted: time-stamp when HTT message is recived |
| 170 | * @recvd : 0x48545452584D5367 ('HTTRXMSG') |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 171 | */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 172 | #define HTT_RX_RING_BUFF_DBG_LIST (2 * 1024) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 173 | struct rx_buf_debug { |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 174 | qdf_dma_addr_t paddr; |
| 175 | qdf_nbuf_t nbuf; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 176 | void *nbuf_data; |
| 177 | uint64_t posted; /* timetamp */ |
| 178 | uint64_t recved; /* timestamp */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 179 | int cpu; |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 180 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 181 | }; |
| 182 | #endif |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 183 | |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 184 | static inline struct htt_host_rx_desc_base *htt_rx_desc(qdf_nbuf_t msdu) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 185 | { |
| 186 | return (struct htt_host_rx_desc_base *) |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 187 | (((size_t) (qdf_nbuf_head(msdu) + HTT_RX_DESC_ALIGN_MASK)) & |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 188 | ~HTT_RX_DESC_ALIGN_MASK); |
| 189 | } |
| 190 | |
Dhanashri Atre | 1a6a4ce | 2017-05-03 19:40:33 -0700 | [diff] [blame] | 191 | #if defined(FEATURE_LRO) && defined(HELIUMPLUS) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 192 | /** |
| 193 | * htt_print_rx_desc_lro() - print LRO information in the rx |
| 194 | * descriptor |
| 195 | * @rx_desc: HTT rx descriptor |
| 196 | * |
| 197 | * Prints the LRO related fields in the HTT rx descriptor |
| 198 | * |
| 199 | * Return: none |
| 200 | */ |
| 201 | static inline void htt_print_rx_desc_lro(struct htt_host_rx_desc_base *rx_desc) |
| 202 | { |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 203 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 204 | ("----------------------RX DESC LRO----------------------\n"); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 205 | qdf_print("msdu_end.lro_eligible:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 206 | rx_desc->msdu_end.lro_eligible); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 207 | qdf_print("msdu_start.tcp_only_ack:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 208 | rx_desc->msdu_start.tcp_only_ack); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 209 | qdf_print("msdu_end.tcp_udp_chksum:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 210 | rx_desc->msdu_end.tcp_udp_chksum); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 211 | qdf_print("msdu_end.tcp_seq_number:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 212 | rx_desc->msdu_end.tcp_seq_number); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 213 | qdf_print("msdu_end.tcp_ack_number:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 214 | rx_desc->msdu_end.tcp_ack_number); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 215 | qdf_print("msdu_start.tcp_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 216 | rx_desc->msdu_start.tcp_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 217 | qdf_print("msdu_start.ipv6_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 218 | rx_desc->msdu_start.ipv6_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 219 | qdf_print("msdu_start.ipv4_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 220 | rx_desc->msdu_start.ipv4_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 221 | qdf_print("msdu_start.l3_offset:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 222 | rx_desc->msdu_start.l3_offset); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 223 | qdf_print("msdu_start.l4_offset:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 224 | rx_desc->msdu_start.l4_offset); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 225 | qdf_print("msdu_start.flow_id_toeplitz:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 226 | rx_desc->msdu_start.flow_id_toeplitz); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 227 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 228 | ("---------------------------------------------------------\n"); |
| 229 | } |
| 230 | |
| 231 | /** |
| 232 | * htt_print_rx_desc_lro() - extract LRO information from the rx |
| 233 | * descriptor |
| 234 | * @msdu: network buffer |
| 235 | * @rx_desc: HTT rx descriptor |
| 236 | * |
| 237 | * Extracts the LRO related fields from the HTT rx descriptor |
| 238 | * and stores them in the network buffer's control block |
| 239 | * |
| 240 | * Return: none |
| 241 | */ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 242 | static inline void htt_rx_extract_lro_info(qdf_nbuf_t msdu, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 243 | struct htt_host_rx_desc_base *rx_desc) |
| 244 | { |
Poddar, Siddarth | 37a302d | 2017-06-27 14:19:23 +0530 | [diff] [blame] | 245 | if (rx_desc->attention.tcp_udp_chksum_fail) |
| 246 | QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0; |
| 247 | else |
| 248 | QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = |
| 249 | rx_desc->msdu_end.lro_eligible; |
| 250 | |
| 251 | if (QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu)) { |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 252 | QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = |
| 253 | rx_desc->msdu_start.tcp_only_ack; |
| 254 | QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) = |
| 255 | rx_desc->msdu_end.tcp_udp_chksum; |
| 256 | QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = |
| 257 | rx_desc->msdu_end.tcp_seq_number; |
| 258 | QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = |
| 259 | rx_desc->msdu_end.tcp_ack_number; |
| 260 | QDF_NBUF_CB_RX_TCP_WIN(msdu) = |
| 261 | rx_desc->msdu_end.window_size; |
| 262 | QDF_NBUF_CB_RX_TCP_PROTO(msdu) = |
| 263 | rx_desc->msdu_start.tcp_proto; |
| 264 | QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = |
| 265 | rx_desc->msdu_start.ipv6_proto; |
| 266 | QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = |
| 267 | rx_desc->msdu_start.l4_offset; |
Manjunathappa Prakash | 794366e | 2017-11-07 09:59:21 -0800 | [diff] [blame] | 268 | QDF_NBUF_CB_RX_FLOW_ID(msdu) = |
Poddar, Siddarth | 37a302d | 2017-06-27 14:19:23 +0530 | [diff] [blame] | 269 | rx_desc->msdu_start.flow_id_toeplitz; |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 270 | } |
| 271 | } |
| 272 | #else |
| 273 | static inline void htt_print_rx_desc_lro(struct htt_host_rx_desc_base *rx_desc) |
| 274 | {} |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 275 | static inline void htt_rx_extract_lro_info(qdf_nbuf_t msdu, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 276 | struct htt_host_rx_desc_base *rx_desc) {} |
| 277 | #endif /* FEATURE_LRO */ |
| 278 | |
| 279 | static inline void htt_print_rx_desc(struct htt_host_rx_desc_base *rx_desc) |
| 280 | { |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 281 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 282 | ("----------------------RX DESC----------------------------\n"); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 283 | qdf_print("attention: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 284 | (unsigned int)(*(uint32_t *) &rx_desc->attention)); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 285 | qdf_print("frag_info: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 286 | (unsigned int)(*(uint32_t *) &rx_desc->frag_info)); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 287 | qdf_print("mpdu_start: %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 288 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[0]), |
| 289 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[1]), |
| 290 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[2])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 291 | qdf_print("msdu_start: %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 292 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[0]), |
| 293 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[1]), |
| 294 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[2])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 295 | qdf_print("msdu_end: %#010x %#010x %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 296 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[0]), |
| 297 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[1]), |
| 298 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[2]), |
| 299 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[3]), |
| 300 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[4])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 301 | qdf_print("mpdu_end: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 302 | (unsigned int)(*(uint32_t *) &rx_desc->mpdu_end)); |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 303 | qdf_print("ppdu_start: %#010x %#010x %#010x %#010x %#010x\n" |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 304 | "%#010x %#010x %#010x %#010x %#010x\n", |
| 305 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[0]), |
| 306 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[1]), |
| 307 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[2]), |
| 308 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[3]), |
| 309 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[4]), |
| 310 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[5]), |
| 311 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[6]), |
| 312 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[7]), |
| 313 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[8]), |
| 314 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[9])); |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 315 | qdf_print("ppdu_end: %#010x %#010x %#010x %#010x %#010x\n" |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 316 | "%#010x %#010x %#010x %#010x %#010x\n" |
| 317 | "%#010x,%#010x %#010x %#010x %#010x\n" |
| 318 | "%#010x %#010x %#010x %#010x %#010x\n" "%#010x %#010x\n", |
| 319 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[0]), |
| 320 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[1]), |
| 321 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[2]), |
| 322 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[3]), |
| 323 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[4]), |
| 324 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[5]), |
| 325 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[6]), |
| 326 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[7]), |
| 327 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[8]), |
| 328 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[9]), |
| 329 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[10]), |
| 330 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[11]), |
| 331 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[12]), |
| 332 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[13]), |
| 333 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[14]), |
| 334 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[15]), |
| 335 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[16]), |
| 336 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[17]), |
| 337 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[18]), |
| 338 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[19]), |
| 339 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[20]), |
| 340 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[21])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 341 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 342 | ("---------------------------------------------------------\n"); |
| 343 | } |
| 344 | |
| 345 | #ifndef HTT_ASSERT_LEVEL |
| 346 | #define HTT_ASSERT_LEVEL 3 |
| 347 | #endif |
| 348 | |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 349 | #define HTT_ASSERT_ALWAYS(condition) qdf_assert_always((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 350 | |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 351 | #define HTT_ASSERT0(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 352 | #if HTT_ASSERT_LEVEL > 0 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 353 | #define HTT_ASSERT1(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 354 | #else |
| 355 | #define HTT_ASSERT1(condition) |
| 356 | #endif |
| 357 | |
| 358 | #if HTT_ASSERT_LEVEL > 1 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 359 | #define HTT_ASSERT2(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 360 | #else |
| 361 | #define HTT_ASSERT2(condition) |
| 362 | #endif |
| 363 | |
| 364 | #if HTT_ASSERT_LEVEL > 2 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 365 | #define HTT_ASSERT3(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 366 | #else |
| 367 | #define HTT_ASSERT3(condition) |
| 368 | #endif |
| 369 | |
| 370 | #define HTT_MAC_ADDR_LEN 6 |
| 371 | |
| 372 | /* |
| 373 | * HTT_MAX_SEND_QUEUE_DEPTH - |
| 374 | * How many packets HTC should allow to accumulate in a send queue |
| 375 | * before calling the EpSendFull callback to see whether to retain |
| 376 | * or drop packets. |
| 377 | * This is not relevant for LL, where tx descriptors should be immediately |
| 378 | * downloaded to the target. |
| 379 | * This is not very relevant for HL either, since it is anticipated that |
| 380 | * the HL tx download scheduler will not work this far in advance - rather, |
| 381 | * it will make its decisions just-in-time, so it can be responsive to |
| 382 | * changing conditions. |
| 383 | * Hence, this queue depth threshold spec is mostly just a formality. |
| 384 | */ |
| 385 | #define HTT_MAX_SEND_QUEUE_DEPTH 64 |
| 386 | |
| 387 | #define IS_PWR2(value) (((value) ^ ((value)-1)) == ((value) << 1) - 1) |
| 388 | |
Manjunathappa Prakash | 70ea728 | 2016-06-17 15:42:45 -0700 | [diff] [blame] | 389 | /* Max rx MSDU size including L2 headers */ |
| 390 | #define MSDU_SIZE 1560 |
| 391 | /* Rounding up to a cache line size. */ |
| 392 | #define HTT_RX_BUF_SIZE roundup(MSDU_SIZE + \ |
| 393 | sizeof(struct htt_host_rx_desc_base), \ |
| 394 | QDF_CACHE_LINE_SZ) |
Manjunathappa Prakash | b757372 | 2016-04-21 11:24:07 -0700 | [diff] [blame] | 395 | #define MAX_RX_PAYLOAD_SZ (HTT_RX_BUF_SIZE - RX_STD_DESC_SIZE) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 396 | /* |
| 397 | * DMA_MAP expects the buffer to be an integral number of cache lines. |
| 398 | * Rather than checking the actual cache line size, this code makes a |
| 399 | * conservative estimate of what the cache line size could be. |
| 400 | */ |
| 401 | #define HTT_LOG2_MAX_CACHE_LINE_SIZE 7 /* 2^7 = 128 */ |
| 402 | #define HTT_MAX_CACHE_LINE_SIZE_MASK ((1 << HTT_LOG2_MAX_CACHE_LINE_SIZE) - 1) |
| 403 | |
| 404 | #ifdef BIG_ENDIAN_HOST |
| 405 | /* |
| 406 | * big-endian: bytes within a 4-byte "word" are swapped: |
| 407 | * pre-swap post-swap |
| 408 | * index index |
| 409 | * 0 3 |
| 410 | * 1 2 |
| 411 | * 2 1 |
| 412 | * 3 0 |
| 413 | * 4 7 |
| 414 | * 5 6 |
| 415 | * etc. |
| 416 | * To compute the post-swap index from the pre-swap index, compute |
| 417 | * the byte offset for the start of the word (index & ~0x3) and add |
| 418 | * the swapped byte offset within the word (3 - (index & 0x3)). |
| 419 | */ |
| 420 | #define HTT_ENDIAN_BYTE_IDX_SWAP(idx) (((idx) & ~0x3) + (3 - ((idx) & 0x3))) |
| 421 | #else |
| 422 | /* little-endian: no adjustment needed */ |
| 423 | #define HTT_ENDIAN_BYTE_IDX_SWAP(idx) idx |
| 424 | #endif |
| 425 | |
| 426 | #define HTT_TX_MUTEX_INIT(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 427 | qdf_spinlock_create(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 428 | |
| 429 | #define HTT_TX_MUTEX_ACQUIRE(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 430 | qdf_spin_lock_bh(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 431 | |
| 432 | #define HTT_TX_MUTEX_RELEASE(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 433 | qdf_spin_unlock_bh(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 434 | |
| 435 | #define HTT_TX_MUTEX_DESTROY(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 436 | qdf_spinlock_destroy(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 437 | |
| 438 | #define HTT_TX_DESC_PADDR(_pdev, _tx_desc_vaddr) \ |
| 439 | ((_pdev)->tx_descs.pool_paddr + (uint32_t) \ |
| 440 | ((char *)(_tx_desc_vaddr) - \ |
| 441 | (char *)((_pdev)->tx_descs.pool_vaddr))) |
| 442 | |
| 443 | #ifdef ATH_11AC_TXCOMPACT |
| 444 | |
| 445 | #define HTT_TX_NBUF_QUEUE_MUTEX_INIT(_pdev) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 446 | qdf_spinlock_create(&_pdev->txnbufq_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 447 | |
| 448 | #define HTT_TX_NBUF_QUEUE_MUTEX_DESTROY(_pdev) \ |
| 449 | HTT_TX_MUTEX_DESTROY(&_pdev->txnbufq_mutex) |
| 450 | |
| 451 | #define HTT_TX_NBUF_QUEUE_REMOVE(_pdev, _msdu) do { \ |
| 452 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 453 | _msdu = qdf_nbuf_queue_remove(&_pdev->txnbufq);\ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 454 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 455 | } while (0) |
| 456 | |
| 457 | #define HTT_TX_NBUF_QUEUE_ADD(_pdev, _msdu) do { \ |
| 458 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 459 | qdf_nbuf_queue_add(&_pdev->txnbufq, _msdu); \ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 460 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 461 | } while (0) |
| 462 | |
| 463 | #define HTT_TX_NBUF_QUEUE_INSERT_HEAD(_pdev, _msdu) do { \ |
| 464 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 465 | qdf_nbuf_queue_insert_head(&_pdev->txnbufq, _msdu);\ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 466 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 467 | } while (0) |
| 468 | #else |
| 469 | |
| 470 | #define HTT_TX_NBUF_QUEUE_MUTEX_INIT(_pdev) |
| 471 | #define HTT_TX_NBUF_QUEUE_REMOVE(_pdev, _msdu) |
| 472 | #define HTT_TX_NBUF_QUEUE_ADD(_pdev, _msdu) |
| 473 | #define HTT_TX_NBUF_QUEUE_INSERT_HEAD(_pdev, _msdu) |
| 474 | #define HTT_TX_NBUF_QUEUE_MUTEX_DESTROY(_pdev) |
| 475 | |
| 476 | #endif |
| 477 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 478 | #ifdef CONFIG_HL_SUPPORT |
| 479 | |
| 480 | static inline void htt_tx_resume_handler(void *context) |
| 481 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 482 | } |
| 483 | #else |
| 484 | |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 485 | void htt_tx_resume_handler(void *context); |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 486 | #endif |
| 487 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 488 | #ifdef ATH_11AC_TXCOMPACT |
| 489 | #define HTT_TX_SCHED htt_tx_sched |
| 490 | #else |
| 491 | #define HTT_TX_SCHED(pdev) /* no-op */ |
| 492 | #endif |
| 493 | |
| 494 | int htt_tx_attach(struct htt_pdev_t *pdev, int desc_pool_elems); |
| 495 | |
| 496 | void htt_tx_detach(struct htt_pdev_t *pdev); |
| 497 | |
| 498 | int htt_rx_attach(struct htt_pdev_t *pdev); |
| 499 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 500 | #if defined(CONFIG_HL_SUPPORT) |
| 501 | |
| 502 | static inline void htt_rx_detach(struct htt_pdev_t *pdev) |
| 503 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 504 | } |
| 505 | #else |
| 506 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 507 | void htt_rx_detach(struct htt_pdev_t *pdev); |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 508 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 509 | |
Houston Hoffman | 23e76f9 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 510 | int htt_htc_attach(struct htt_pdev_t *pdev, uint16_t service_id); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 511 | |
| 512 | void htt_t2h_msg_handler(void *context, HTC_PACKET *pkt); |
Manjunathappa Prakash | 585178d | 2016-04-14 01:11:18 -0700 | [diff] [blame] | 513 | #ifdef WLAN_FEATURE_FASTPATH |
| 514 | void htt_t2h_msg_handler_fast(void *htt_pdev, qdf_nbuf_t *cmpl_msdus, |
| 515 | uint32_t num_cmpls); |
| 516 | #else |
| 517 | static inline void htt_t2h_msg_handler_fast(void *htt_pdev, |
| 518 | qdf_nbuf_t *cmpl_msdus, |
| 519 | uint32_t num_cmpls) |
| 520 | { |
| 521 | } |
| 522 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 523 | |
| 524 | void htt_h2t_send_complete(void *context, HTC_PACKET *pkt); |
| 525 | |
Rakesh Pillai | 7fb7a1f | 2017-06-23 14:46:36 +0530 | [diff] [blame] | 526 | QDF_STATUS htt_h2t_ver_req_msg(struct htt_pdev_t *pdev); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 527 | |
Himanshu Agarwal | 18d6b8c | 2017-03-01 16:41:04 +0530 | [diff] [blame] | 528 | #if defined(HELIUMPLUS) |
Rakesh Pillai | 7fb7a1f | 2017-06-23 14:46:36 +0530 | [diff] [blame] | 529 | QDF_STATUS |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 530 | htt_h2t_frag_desc_bank_cfg_msg(struct htt_pdev_t *pdev); |
Himanshu Agarwal | 18d6b8c | 2017-03-01 16:41:04 +0530 | [diff] [blame] | 531 | #endif /* defined(HELIUMPLUS) */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 532 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 533 | extern QDF_STATUS htt_h2t_rx_ring_cfg_msg_ll(struct htt_pdev_t *pdev); |
| 534 | |
Manjunathappa Prakash | fff753c | 2016-09-01 19:34:56 -0700 | [diff] [blame] | 535 | extern QDF_STATUS htt_h2t_rx_ring_rfs_cfg_msg_ll(struct htt_pdev_t *pdev); |
| 536 | |
| 537 | extern QDF_STATUS htt_h2t_rx_ring_rfs_cfg_msg_hl(struct htt_pdev_t *pdev); |
| 538 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 539 | extern QDF_STATUS htt_h2t_rx_ring_cfg_msg_hl(struct htt_pdev_t *pdev); |
| 540 | |
| 541 | extern QDF_STATUS (*htt_h2t_rx_ring_cfg_msg)(struct htt_pdev_t *pdev); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 542 | |
Manikandan Mohan | 83c939c | 2017-04-13 20:23:07 -0700 | [diff] [blame] | 543 | enum htc_send_full_action htt_h2t_full(void *context, HTC_PACKET *pkt); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 544 | |
| 545 | struct htt_htc_pkt *htt_htc_pkt_alloc(struct htt_pdev_t *pdev); |
| 546 | |
| 547 | void htt_htc_pkt_free(struct htt_pdev_t *pdev, struct htt_htc_pkt *pkt); |
| 548 | |
| 549 | void htt_htc_pkt_pool_free(struct htt_pdev_t *pdev); |
| 550 | |
| 551 | #ifdef ATH_11AC_TXCOMPACT |
Yun Park | eea1c9c | 2017-03-08 11:26:37 -0800 | [diff] [blame] | 552 | void htt_htc_misc_pkt_list_trim(struct htt_pdev_t *pdev, int level); |
| 553 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 554 | void |
| 555 | htt_htc_misc_pkt_list_add(struct htt_pdev_t *pdev, struct htt_htc_pkt *pkt); |
| 556 | |
| 557 | void htt_htc_misc_pkt_pool_free(struct htt_pdev_t *pdev); |
| 558 | #endif |
| 559 | |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame^] | 560 | #ifdef CONFIG_HL_SUPPORT |
| 561 | static inline int |
| 562 | htt_rx_hash_list_insert(struct htt_pdev_t *pdev, |
| 563 | qdf_dma_addr_t paddr, |
| 564 | qdf_nbuf_t netbuf) |
| 565 | { |
| 566 | return 0; |
| 567 | } |
| 568 | #else |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 569 | int |
Orhan K AKYILDIZ | 4c878ed | 2017-03-23 13:12:46 -0700 | [diff] [blame] | 570 | htt_rx_hash_list_insert(struct htt_pdev_t *pdev, |
| 571 | qdf_dma_addr_t paddr, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 572 | qdf_nbuf_t netbuf); |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame^] | 573 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 574 | |
Orhan K AKYILDIZ | 4c878ed | 2017-03-23 13:12:46 -0700 | [diff] [blame] | 575 | qdf_nbuf_t |
| 576 | htt_rx_hash_list_lookup(struct htt_pdev_t *pdev, qdf_dma_addr_t paddr); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 577 | |
| 578 | #ifdef IPA_OFFLOAD |
| 579 | int |
| 580 | htt_tx_ipa_uc_attach(struct htt_pdev_t *pdev, |
| 581 | unsigned int uc_tx_buf_sz, |
| 582 | unsigned int uc_tx_buf_cnt, |
| 583 | unsigned int uc_tx_partition_base); |
| 584 | |
| 585 | int |
| 586 | htt_rx_ipa_uc_attach(struct htt_pdev_t *pdev, unsigned int rx_ind_ring_size); |
| 587 | |
| 588 | int htt_tx_ipa_uc_detach(struct htt_pdev_t *pdev); |
| 589 | |
| 590 | int htt_rx_ipa_uc_detach(struct htt_pdev_t *pdev); |
| 591 | #else |
Leo Chang | 8e07361 | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 592 | /** |
| 593 | * htt_tx_ipa_uc_attach() - attach htt ipa uc tx resource |
| 594 | * @pdev: htt context |
| 595 | * @uc_tx_buf_sz: single tx buffer size |
| 596 | * @uc_tx_buf_cnt: total tx buffer count |
| 597 | * @uc_tx_partition_base: tx buffer partition start |
| 598 | * |
| 599 | * Return: 0 success |
| 600 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 601 | static inline int |
| 602 | htt_tx_ipa_uc_attach(struct htt_pdev_t *pdev, |
| 603 | unsigned int uc_tx_buf_sz, |
| 604 | unsigned int uc_tx_buf_cnt, |
| 605 | unsigned int uc_tx_partition_base) |
| 606 | { |
| 607 | return 0; |
| 608 | } |
| 609 | |
Leo Chang | 8e07361 | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 610 | /** |
| 611 | * htt_rx_ipa_uc_attach() - attach htt ipa uc rx resource |
| 612 | * @pdev: htt context |
| 613 | * @rx_ind_ring_size: rx ring size |
| 614 | * |
| 615 | * Return: 0 success |
| 616 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 617 | static inline int |
| 618 | htt_rx_ipa_uc_attach(struct htt_pdev_t *pdev, unsigned int rx_ind_ring_size) |
| 619 | { |
| 620 | return 0; |
| 621 | } |
| 622 | |
| 623 | static inline int htt_tx_ipa_uc_detach(struct htt_pdev_t *pdev) |
| 624 | { |
| 625 | return 0; |
| 626 | } |
| 627 | |
| 628 | static inline int htt_rx_ipa_uc_detach(struct htt_pdev_t *pdev) |
| 629 | { |
| 630 | return 0; |
| 631 | } |
| 632 | #endif /* IPA_OFFLOAD */ |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 633 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 634 | /* Maximum Outstanding Bus Download */ |
| 635 | #define HTT_MAX_BUS_CREDIT 33 |
| 636 | |
| 637 | #ifdef CONFIG_HL_SUPPORT |
| 638 | |
| 639 | /** |
| 640 | * htt_tx_credit_update() - check for diff in bus delta and target delta |
| 641 | * @pdev: pointer to htt device. |
| 642 | * |
| 643 | * Return: min of bus delta and target delta |
| 644 | */ |
| 645 | int |
| 646 | htt_tx_credit_update(struct htt_pdev_t *pdev); |
| 647 | #else |
| 648 | |
| 649 | static inline int |
| 650 | htt_tx_credit_update(struct htt_pdev_t *pdev) |
| 651 | { |
| 652 | return 0; |
| 653 | } |
| 654 | #endif |
| 655 | |
| 656 | |
| 657 | #ifdef FEATURE_HL_GROUP_CREDIT_FLOW_CONTROL |
| 658 | |
| 659 | #define HTT_TX_GROUP_INDEX_OFFSET \ |
| 660 | (sizeof(struct htt_txq_group) / sizeof(u_int32_t)) |
| 661 | |
| 662 | void htt_tx_group_credit_process(struct htt_pdev_t *pdev, u_int32_t *msg_word); |
| 663 | #else |
| 664 | |
| 665 | static inline |
| 666 | void htt_tx_group_credit_process(struct htt_pdev_t *pdev, u_int32_t *msg_word) |
| 667 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 668 | } |
| 669 | #endif |
| 670 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 671 | #ifdef DEBUG_RX_RING_BUFFER |
| 672 | /** |
| 673 | * htt_rx_dbg_rxbuf_init() - init debug rx buff list |
| 674 | * @pdev: pdev handle |
| 675 | * |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 676 | * Allocation is done from bss segment. This uses vmalloc and has a bit |
| 677 | * of an overhead compared to kmalloc (which qdf_mem_alloc wraps). The impact |
| 678 | * of the overhead to performance will need to be quantified. |
| 679 | * |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 680 | * Return: none |
| 681 | */ |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 682 | static struct rx_buf_debug rx_buff_list_bss[HTT_RX_RING_BUFF_DBG_LIST]; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 683 | static inline |
| 684 | void htt_rx_dbg_rxbuf_init(struct htt_pdev_t *pdev) |
| 685 | { |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 686 | pdev->rx_buff_list = rx_buff_list_bss; |
| 687 | qdf_spinlock_create(&(pdev->rx_buff_list_lock)); |
| 688 | pdev->rx_buff_index = 0; |
| 689 | pdev->rx_buff_posted_cum = 0; |
| 690 | pdev->rx_buff_recvd_cum = 0; |
| 691 | pdev->rx_buff_recvd_err = 0; |
| 692 | pdev->refill_retry_timer_starts = 0; |
| 693 | pdev->refill_retry_timer_calls = 0; |
| 694 | pdev->refill_retry_timer_doubles = 0; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 695 | } |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 696 | |
Mohit Khanna | c19888f | 2017-02-09 12:50:15 -0800 | [diff] [blame] | 697 | /** |
| 698 | * htt_display_rx_buf_debug() - display debug rx buff list and some counters |
| 699 | * @pdev: pdev handle |
| 700 | * |
| 701 | * Return: Success |
| 702 | */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 703 | static inline int htt_display_rx_buf_debug(struct htt_pdev_t *pdev) |
| 704 | { |
| 705 | int i; |
| 706 | struct rx_buf_debug *buf; |
| 707 | |
| 708 | if ((pdev != NULL) && |
| 709 | (pdev->rx_buff_list != NULL)) { |
| 710 | buf = pdev->rx_buff_list; |
| 711 | for (i = 0; i < HTT_RX_RING_BUFF_DBG_LIST; i++) { |
| 712 | if (buf[i].posted != 0) |
| 713 | QDF_TRACE(QDF_MODULE_ID_TXRX, |
| 714 | QDF_TRACE_LEVEL_ERROR, |
Jeff Johnson | c13bfe0 | 2017-09-18 08:16:17 -0700 | [diff] [blame] | 715 | "[%d][0x%x] %pK %lu %pK %llu %llu", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 716 | i, buf[i].cpu, |
| 717 | buf[i].nbuf_data, |
| 718 | (unsigned long)buf[i].paddr, |
| 719 | buf[i].nbuf, |
| 720 | buf[i].posted, |
| 721 | buf[i].recved); |
| 722 | } |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 723 | |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 724 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 725 | "rxbuf_idx %d all_posted: %d all_recvd: %d recv_err: %d", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 726 | pdev->rx_buff_index, |
| 727 | pdev->rx_buff_posted_cum, |
| 728 | pdev->rx_buff_recvd_cum, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 729 | pdev->rx_buff_recvd_err); |
| 730 | |
| 731 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 732 | "timer kicks :%d actual :%d restarts:%d debtors: %d fill_n: %d", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 733 | pdev->refill_retry_timer_starts, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 734 | pdev->refill_retry_timer_calls, |
| 735 | pdev->refill_retry_timer_doubles, |
| 736 | pdev->rx_buff_debt_invoked, |
| 737 | pdev->rx_buff_fill_n_invoked); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 738 | } else |
| 739 | return -EINVAL; |
| 740 | return 0; |
| 741 | } |
| 742 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 743 | /** |
| 744 | * htt_rx_dbg_rxbuf_set() - set element of rx buff list |
| 745 | * @pdev: pdev handle |
| 746 | * @paddr: physical address of netbuf |
| 747 | * @rx_netbuf: received netbuf |
| 748 | * |
| 749 | * Return: none |
| 750 | */ |
| 751 | static inline |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 752 | void htt_rx_dbg_rxbuf_set(struct htt_pdev_t *pdev, qdf_dma_addr_t paddr, |
| 753 | qdf_nbuf_t rx_netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 754 | { |
| 755 | if (pdev->rx_buff_list) { |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 756 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 757 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = paddr; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 758 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = rx_netbuf; |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 759 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = |
| 760 | rx_netbuf->data; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 761 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 762 | qdf_get_log_timestamp(); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 763 | pdev->rx_buff_posted_cum++; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 764 | pdev->rx_buff_list[pdev->rx_buff_index].recved = 0; |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 765 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 766 | (1 << qdf_get_cpu()); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 767 | NBUF_MAP_ID(rx_netbuf) = pdev->rx_buff_index; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 768 | if (++pdev->rx_buff_index >= |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 769 | HTT_RX_RING_BUFF_DBG_LIST) |
| 770 | pdev->rx_buff_index = 0; |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 771 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 772 | } |
| 773 | } |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 774 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 775 | /** |
| 776 | * htt_rx_dbg_rxbuf_set() - reset element of rx buff list |
| 777 | * @pdev: pdev handle |
| 778 | * @netbuf: rx sk_buff |
| 779 | * Return: none |
| 780 | */ |
| 781 | static inline |
| 782 | void htt_rx_dbg_rxbuf_reset(struct htt_pdev_t *pdev, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 783 | qdf_nbuf_t netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 784 | { |
| 785 | uint32_t index; |
| 786 | |
| 787 | if (pdev->rx_buff_list) { |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 788 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 789 | index = NBUF_MAP_ID(netbuf); |
| 790 | if (index < HTT_RX_RING_BUFF_DBG_LIST) { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 791 | pdev->rx_buff_list[index].recved = |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 792 | qdf_get_log_timestamp(); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 793 | pdev->rx_buff_recvd_cum++; |
| 794 | } else { |
| 795 | pdev->rx_buff_recvd_err++; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 796 | } |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 797 | pdev->rx_buff_list[pdev->rx_buff_index].cpu |= |
| 798 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 799 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 800 | } |
| 801 | } |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 802 | /** |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 803 | * htt_rx_dbg_rxbuf_indupd() - add a record for alloc index update |
| 804 | * @pdev: pdev handle |
| 805 | * @idx : value of the index |
| 806 | * |
| 807 | * Return: none |
| 808 | */ |
| 809 | static inline |
| 810 | void htt_rx_dbg_rxbuf_indupd(struct htt_pdev_t *pdev, int alloc_index) |
| 811 | { |
| 812 | if (pdev->rx_buff_list) { |
| 813 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
| 814 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = 0; |
| 815 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = 0; |
| 816 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = 0; |
| 817 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
| 818 | qdf_get_log_timestamp(); |
| 819 | pdev->rx_buff_list[pdev->rx_buff_index].recved = |
| 820 | (uint64_t)alloc_index; |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 821 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 822 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 823 | if (++pdev->rx_buff_index >= |
| 824 | HTT_RX_RING_BUFF_DBG_LIST) |
| 825 | pdev->rx_buff_index = 0; |
| 826 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
| 827 | } |
| 828 | } |
| 829 | /** |
| 830 | * htt_rx_dbg_rxbuf_httrxind() - add a record for recipt of htt rx_ind msg |
| 831 | * @pdev: pdev handle |
| 832 | * |
| 833 | * Return: none |
| 834 | */ |
| 835 | static inline |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 836 | void htt_rx_dbg_rxbuf_httrxind(struct htt_pdev_t *pdev, unsigned int msdu_cnt) |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 837 | { |
| 838 | if (pdev->rx_buff_list) { |
| 839 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 840 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = msdu_cnt; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 841 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = 0; |
| 842 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = 0; |
| 843 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
| 844 | qdf_get_log_timestamp(); |
| 845 | pdev->rx_buff_list[pdev->rx_buff_index].recved = |
| 846 | (uint64_t)0x48545452584D5347; /* 'HTTRXMSG' */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 847 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 848 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 849 | if (++pdev->rx_buff_index >= |
| 850 | HTT_RX_RING_BUFF_DBG_LIST) |
| 851 | pdev->rx_buff_index = 0; |
| 852 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
| 853 | } |
| 854 | } |
| 855 | |
| 856 | /** |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 857 | * htt_rx_dbg_rxbuf_deinit() - deinit debug rx buff list |
| 858 | * @pdev: pdev handle |
| 859 | * |
| 860 | * Return: none |
| 861 | */ |
| 862 | static inline |
| 863 | void htt_rx_dbg_rxbuf_deinit(struct htt_pdev_t *pdev) |
| 864 | { |
| 865 | if (pdev->rx_buff_list) |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 866 | pdev->rx_buff_list = NULL; |
Houston Hoffman | 2eac7c4 | 2016-12-12 12:22:52 -0800 | [diff] [blame] | 867 | qdf_spinlock_destroy(&(pdev->rx_buff_list_lock)); |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 868 | } |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 869 | #else |
| 870 | static inline |
| 871 | void htt_rx_dbg_rxbuf_init(struct htt_pdev_t *pdev) |
| 872 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 873 | } |
Mohit Khanna | c19888f | 2017-02-09 12:50:15 -0800 | [diff] [blame] | 874 | static inline int htt_display_rx_buf_debug(struct htt_pdev_t *pdev) |
| 875 | { |
| 876 | return 0; |
| 877 | } |
| 878 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 879 | static inline |
| 880 | void htt_rx_dbg_rxbuf_set(struct htt_pdev_t *pdev, |
| 881 | uint32_t paddr, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 882 | qdf_nbuf_t rx_netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 883 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 884 | } |
| 885 | static inline |
| 886 | void htt_rx_dbg_rxbuf_reset(struct htt_pdev_t *pdev, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 887 | qdf_nbuf_t netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 888 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 889 | } |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 890 | static inline |
Orhan K AKYILDIZ | ba81c51 | 2016-12-21 16:13:07 -0800 | [diff] [blame] | 891 | void htt_rx_dbg_rxbuf_indupd(struct htt_pdev_t *pdev, |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 892 | int alloc_index) |
| 893 | { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 894 | } |
| 895 | static inline |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 896 | void htt_rx_dbg_rxbuf_httrxind(struct htt_pdev_t *pdev, |
| 897 | unsigned int msdu_cnt) |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 898 | { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 899 | } |
| 900 | static inline |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 901 | void htt_rx_dbg_rxbuf_deinit(struct htt_pdev_t *pdev) |
| 902 | { |
| 903 | return; |
| 904 | } |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 905 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 906 | #endif /* _HTT_INTERNAL__H_ */ |