IntegerRegSize is always 8 for sparc

llvm-svn: 5961
diff --git a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
index 50e2fe2..78fb2f2 100644
--- a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
@@ -758,8 +758,7 @@
   // 
   Value* shiftDest = destVal;
   unsigned opSize = target.getTargetData().getTypeSize(argVal1->getType());
-  if ((shiftOpCode == SLL || shiftOpCode == SLLX)
-      && opSize < target.getTargetData().getIntegerRegSize())
+  if ((shiftOpCode == SLL || shiftOpCode == SLLX) && opSize < 8)
     { // put SLL result into a temporary
       shiftDest = new TmpInstruction(argVal1, optArgVal2, "sllTmp");
       mcfi.addTemp(shiftDest);
@@ -2305,7 +2304,7 @@
                                  .addReg(dest, MOTy::Def);
               mvec.push_back(M);
             }
-          else if (destSize < target.getTargetData().getIntegerRegSize())
+          else if (destSize < 8)
             assert(0 && "Unsupported type size: 32 < size < 64 bits");
         }
     }