|  | //===-- RISCVTargetMachine.h - Define TargetMachine for RISCV ---*- C++ -*-===// | 
|  | // | 
|  | //                     The LLVM Compiler Infrastructure | 
|  | // | 
|  | // This file is distributed under the University of Illinois Open Source | 
|  | // License. See LICENSE.TXT for details. | 
|  | // | 
|  | //===----------------------------------------------------------------------===// | 
|  | // | 
|  | // This file declares the RISCV specific subclass of TargetMachine. | 
|  | // | 
|  | //===----------------------------------------------------------------------===// | 
|  |  | 
|  | #ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H | 
|  | #define LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H | 
|  |  | 
|  | #include "MCTargetDesc/RISCVMCTargetDesc.h" | 
|  | #include "RISCVSubtarget.h" | 
|  | #include "llvm/CodeGen/SelectionDAGTargetInfo.h" | 
|  | #include "llvm/IR/DataLayout.h" | 
|  | #include "llvm/Target/TargetMachine.h" | 
|  |  | 
|  | namespace llvm { | 
|  | class RISCVTargetMachine : public LLVMTargetMachine { | 
|  | std::unique_ptr<TargetLoweringObjectFile> TLOF; | 
|  | RISCVSubtarget Subtarget; | 
|  |  | 
|  | public: | 
|  | RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, | 
|  | StringRef FS, const TargetOptions &Options, | 
|  | Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, | 
|  | CodeGenOpt::Level OL, bool JIT); | 
|  |  | 
|  | const RISCVSubtarget *getSubtargetImpl(const Function &) const override { | 
|  | return &Subtarget; | 
|  | } | 
|  |  | 
|  | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; | 
|  |  | 
|  | TargetLoweringObjectFile *getObjFileLowering() const override { | 
|  | return TLOF.get(); | 
|  | } | 
|  | }; | 
|  | } | 
|  |  | 
|  | #endif |