[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: https://reviews.llvm.org/D19906
llvm-svn: 276397
diff --git a/llvm/test/CodeGen/Mips/setultk.ll b/llvm/test/CodeGen/Mips/setultk.ll
index c1ef0aa..a0b0bbf 100644
--- a/llvm/test/CodeGen/Mips/setultk.ll
+++ b/llvm/test/CodeGen/Mips/setultk.ll
@@ -1,4 +1,5 @@
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc -march=mips -mcpu=mips32r6 -mattr=micromips -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR6
@j = global i32 5, align 4
@k = global i32 10, align 4
@@ -14,7 +15,8 @@
%cmp = icmp ult i32 %0, 10
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @r1, align 4
-; 16: sltiu ${{[0-9]+}}, 10 # 16 bit inst
-; 16: move ${{[0-9]+}}, $24
+; 16: sltiu ${{[0-9]+}}, 10 # 16 bit inst
+; MMR6: sltiu ${{[0-9]+}}, ${{[0-9]+}}, 1
+; 16: move ${{[0-9]+}}, $24
ret void
}