[IPRA][ARM] Disable no-CSR optimisation for ARM
This optimisation isn't generally profitable for ARM, because we can
save/restore many registers in the prologue and epilogue using the PUSH
and POP instructions, but mostly use individual LDR/STR instructions for
other spills.
Differential revision: https://reviews.llvm.org/D64910
llvm-svn: 367670
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.h b/llvm/lib/Target/ARM/ARMFrameLowering.h
index 7544ca3..6d8aee5 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.h
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.h
@@ -63,6 +63,11 @@
bool enableShrinkWrapping(const MachineFunction &MF) const override {
return true;
}
+ bool isProfitableForNoCSROpt(const Function &F) const override {
+ // The no-CSR optimisation is bad for code size on ARM, because we can save
+ // many registers with a single PUSH/POP pair.
+ return false;
+ }
private:
void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,