Switch over to use the ArchSpec::GetMachine() instead of ArchSpec::GetCore() to keep the code more portable as we add new core types to ArchSpec.

llvm-svn: 204400
diff --git a/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp b/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
index 37bb7a7..5f13803 100644
--- a/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
+++ b/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
@@ -159,17 +159,15 @@
         switch (target_arch.GetTriple().getOS())
         {
             case llvm::Triple::FreeBSD:
-                switch (target_arch.GetCore())
+                switch (target_arch.GetMachine())
                 {
-                    case ArchSpec::eCore_mips64:
+                    case llvm::Triple::mips64:
                         reg_interface = new RegisterContextFreeBSD_mips64(target_arch);
                         break;
-                    case ArchSpec::eCore_x86_32_i386:
-                    case ArchSpec::eCore_x86_32_i486:
-                    case ArchSpec::eCore_x86_32_i486sx:
+                    case llvm::Triple::x86:
                         reg_interface = new RegisterContextFreeBSD_i386(target_arch);
                         break;
-                    case ArchSpec::eCore_x86_64_x86_64:
+                    case llvm::Triple::X86_64:
                         reg_interface = new RegisterContextFreeBSD_x86_64(target_arch);
                         break;
                     default:
@@ -178,12 +176,10 @@
                 break;
 
             case llvm::Triple::Linux:
-                switch (target_arch.GetCore())
+                switch (target_arch.GetMachine())
                 {
-                    case ArchSpec::eCore_x86_32_i386:
-                    case ArchSpec::eCore_x86_32_i486:
-                    case ArchSpec::eCore_x86_32_i486sx:
-                    case ArchSpec::eCore_x86_64_x86_64:
+                    case llvm::Triple::x86:
+                    case llvm::Triple::X86_64:
                         if (Host::GetArchitecture().GetAddressByteSize() == 4)
                         {
                             // 32-bit hosts run with a RegisterContextLinux_i386 context.
@@ -206,19 +202,17 @@
 
         assert(reg_interface && "OS or CPU not supported!");
 
-        switch (target_arch.GetCore())
+        switch (target_arch.GetMachine())
         {
-            case ArchSpec::eCore_mips64:
+            case llvm::Triple::mips64:
                 {
                     RegisterContextPOSIXProcessMonitor_mips64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_mips64(*this, 0, reg_interface);
                     m_posix_thread = reg_ctx;
                     m_reg_context_sp.reset(reg_ctx);
                     break;
                 }
-            case ArchSpec::eCore_x86_32_i386:
-            case ArchSpec::eCore_x86_32_i486:
-            case ArchSpec::eCore_x86_32_i486sx:
-            case ArchSpec::eCore_x86_64_x86_64:
+            case llvm::Triple::x86:
+            case llvm::Triple::X86_64:
                 {
                     RegisterContextPOSIXProcessMonitor_x86_64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_x86_64(*this, 0, reg_interface);
                     m_posix_thread = reg_ctx;
@@ -609,17 +603,15 @@
     unsigned reg = LLDB_INVALID_REGNUM;
     ArchSpec arch = Host::GetArchitecture();
 
-    switch (arch.GetCore())
+    switch (arch.GetMachine())
     {
     default:
         llvm_unreachable("CPU type not supported!");
         break;
 
-    case ArchSpec::eCore_mips64:
-    case ArchSpec::eCore_x86_32_i386:
-    case ArchSpec::eCore_x86_32_i486:
-    case ArchSpec::eCore_x86_32_i486sx:
-    case ArchSpec::eCore_x86_64_x86_64:
+    case llvm::Triple::mips64:
+    case llvm::Triple::x86:
+    case llvm::Triple::x86_64:
         {
             POSIXBreakpointProtocol* reg_ctx = GetPOSIXBreakpointProtocol();
             reg = reg_ctx->GetRegisterIndexFromOffset(offset);
@@ -641,17 +633,15 @@
     const char * name = nullptr;
     ArchSpec arch = Host::GetArchitecture();
 
-    switch (arch.GetCore())
+    switch (arch.GetMachine())
     {
     default:
         assert(false && "CPU type not supported!");
         break;
 
-    case ArchSpec::eCore_mips64:
-    case ArchSpec::eCore_x86_32_i386:
-    case ArchSpec::eCore_x86_32_i486:
-    case ArchSpec::eCore_x86_32_i486sx:
-    case ArchSpec::eCore_x86_64_x86_64:
+    case llvm::Triple::mips64:
+    case llvm::Triple::x86:
+    case llvm::Triple::x86_64:
         name = GetRegisterContext()->GetRegisterName(reg);
         break;
     }
diff --git a/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp b/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
index f4b1dd7..4ee7e3d 100644
--- a/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
+++ b/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
@@ -643,14 +643,14 @@
     const uint8_t *opcode = NULL;
     size_t opcode_size = 0;
 
-    switch (arch.GetCore())
+    switch (arch.GetMachine())
     {
     default:
         assert(false && "CPU type not supported!");
         break;
 
-    case ArchSpec::eCore_x86_32_i386:
-    case ArchSpec::eCore_x86_64_x86_64:
+    case llvm::Triple::x86:
+    case llvm::Triple::x86_64:
         opcode = g_i386_opcode;
         opcode_size = sizeof(g_i386_opcode);
         break;