|  | //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===// | 
|  | // | 
|  | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | 
|  | // See https://llvm.org/LICENSE.txt for license information. | 
|  | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | 
|  | // | 
|  | //===----------------------------------------------------------------------===// | 
|  | // | 
|  | // This file declares the RISCV specific subclass of TargetSubtargetInfo. | 
|  | // | 
|  | //===----------------------------------------------------------------------===// | 
|  |  | 
|  | #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H | 
|  | #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H | 
|  |  | 
|  | #include "RISCVFrameLowering.h" | 
|  | #include "RISCVISelLowering.h" | 
|  | #include "RISCVInstrInfo.h" | 
|  | #include "Utils/RISCVBaseInfo.h" | 
|  | #include "llvm/CodeGen/SelectionDAGTargetInfo.h" | 
|  | #include "llvm/CodeGen/TargetSubtargetInfo.h" | 
|  | #include "llvm/IR/DataLayout.h" | 
|  | #include "llvm/Target/TargetMachine.h" | 
|  |  | 
|  | #define GET_SUBTARGETINFO_HEADER | 
|  | #include "RISCVGenSubtargetInfo.inc" | 
|  |  | 
|  | namespace llvm { | 
|  | class StringRef; | 
|  |  | 
|  | class RISCVSubtarget : public RISCVGenSubtargetInfo { | 
|  | virtual void anchor(); | 
|  | bool HasStdExtM = false; | 
|  | bool HasStdExtA = false; | 
|  | bool HasStdExtF = false; | 
|  | bool HasStdExtD = false; | 
|  | bool HasStdExtC = false; | 
|  | bool HasRV64 = false; | 
|  | bool EnableLinkerRelax = false; | 
|  | unsigned XLen = 32; | 
|  | MVT XLenVT = MVT::i32; | 
|  | RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown; | 
|  | RISCVFrameLowering FrameLowering; | 
|  | RISCVInstrInfo InstrInfo; | 
|  | RISCVRegisterInfo RegInfo; | 
|  | RISCVTargetLowering TLInfo; | 
|  | SelectionDAGTargetInfo TSInfo; | 
|  |  | 
|  | /// Initializes using the passed in CPU and feature strings so that we can | 
|  | /// use initializer lists for subtarget initialization. | 
|  | RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT, | 
|  | StringRef CPU, StringRef FS, | 
|  | StringRef ABIName); | 
|  |  | 
|  | public: | 
|  | // Initializes the data members to match that of the specified triple. | 
|  | RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS, | 
|  | StringRef ABIName, const TargetMachine &TM); | 
|  |  | 
|  | // Parses features string setting specified subtarget options. The | 
|  | // definition of this function is auto-generated by tblgen. | 
|  | void ParseSubtargetFeatures(StringRef CPU, StringRef FS); | 
|  |  | 
|  | const RISCVFrameLowering *getFrameLowering() const override { | 
|  | return &FrameLowering; | 
|  | } | 
|  | const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; } | 
|  | const RISCVRegisterInfo *getRegisterInfo() const override { | 
|  | return &RegInfo; | 
|  | } | 
|  | const RISCVTargetLowering *getTargetLowering() const override { | 
|  | return &TLInfo; | 
|  | } | 
|  | const SelectionDAGTargetInfo *getSelectionDAGInfo() const override { | 
|  | return &TSInfo; | 
|  | } | 
|  | bool hasStdExtM() const { return HasStdExtM; } | 
|  | bool hasStdExtA() const { return HasStdExtA; } | 
|  | bool hasStdExtF() const { return HasStdExtF; } | 
|  | bool hasStdExtD() const { return HasStdExtD; } | 
|  | bool hasStdExtC() const { return HasStdExtC; } | 
|  | bool is64Bit() const { return HasRV64; } | 
|  | bool enableLinkerRelax() const { return EnableLinkerRelax; } | 
|  | MVT getXLenVT() const { return XLenVT; } | 
|  | unsigned getXLen() const { return XLen; } | 
|  | RISCVABI::ABI getTargetABI() const { return TargetABI; } | 
|  | }; | 
|  | } // End llvm namespace | 
|  |  | 
|  | #endif |